Wave Digital Filter Modeling for

Complex Automotive Sensor

Load Case Verification
A.Basa, T.Nguyen, D.Hammerschmidt
Infineon Technologies AG, Sense & Control

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 Agenda
• Challenges
• Background
• WDF Model Implementation
• WDF Model Validation
• Conclusion

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 Challenges - I
• Event-driven verification on
top with real-value
modeling for automotive
mixed-signal SoCs
• DUT: In-application
verification requirement
– Different bus architectures -
serial, parallel and daisy chain
– Between 1 and 4 sensors per
channel
– Line length 0…12m equal to line
inductance 0…8.7mH
– Capacitive load per sensor
5…20nF
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 Challenges - II
• Fast simulation using a simple but ”accurate” discrete
time model
• Keep the real timing behavior of the real load =>
solve the delay less loop problem
LL/2 LL/2 VSensor
RL/2 RL/2
Master pin RE1 RE2
ECU pin Sensor pin
DSI3 DSI3 DSI3 DSI3
Rest of SoC logic

Sensor Sensor Sensor Sensor

Imaster
Controller &
Transceiver
Vmaster RS
CE CL VSensor
ISensor
+
CS
Noise
Soc Airbag Filtering Wiring DSI3 Sensor
System Circuit Harness channel

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 Background
• Wave Digital Filters (WDF) Theory
– Introduced by Prof. Alfred Fettweis in 1971
– Solve the delay less loop problem by WDF
– Model the voltage and current by means of waves:
a ( x )  b( x )
v( x) 
2
a ( x )  b( x )
i ( x) 
2R L

• Key words: waves(incident/reflected), port resistance, WDF

elements, Scattering adaptors

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 WDF Model Implementation - I
• WDF implementation flow:

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 WDF Model Implementation - II
• ECU Noise Filtering:

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 WDF Model Implementation - III
• Wiring Harness:

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 WDF Model Implementation - IV
• Sensor load:

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 WDF Model Implementation - V
• Sensor bus network - Final WDF Structure:

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 WDF Model Validation - I
• Validation set-up:

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 WDF Model Validation - II
• DSI3 PDCM communication: • DSI3 CRM Command:

• DSI3 Discovery phase : • DSI3 CRM Response:

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 WDF Model Validation - III
• Sensor signal distortion & Slope time effect:

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 Conclusion & Outlook
• An innovative (digital, simple but accurate) modelling
methodology based on WDF theory is presented
• Verification of the DUT within its application circuits

• Synthesize of WDF wiring harness model into FPGA

hardware
• Early in-application integration and validation of
product at system level.

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 Q&A

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