1) Design a 2-bit magnitude comparator to compare equality.

2) Explain Arithmetic logic unit (ALU).

3) Design hexadecimal to binary encoder for 4- bits.
4) Design binary to decimal decoder for 4- bits.
5) Design a 4-bit Gray code to Binary code convertor.
6) Explain in brief multiplication and division of unsigned binary integers.
7) Implement half adder circuit using 4:1 MUX or multiplexers only.
8) Implement using 4:1 MUX.
F=∑ m ( 0, 3, 4, 7)
9) Design full adder using two half adders.
10) Implement the Boolean function with three half adder circuit F=ABC.
11) Implement the following Boolean function with a multiplexer
F (A, B, C, D) = ∑m (0, 1, 3, 4, 8, 9, 15)
12) Design a combinational circuit which has four inputs and one output. The output is
equal to 1 when:
a) All the inputs equal to 1
b) None of the inputs equal to 1
c) An odd number of inputs are equal to 1.
Draw the logic circuits with minimum number of NAND gates.
13) Implement the following logic function using 8:1 MUX
F = ∑m (0, 1, 2, 3, 4, 10, 11, 14,15)
14) Implement the following function using 3 to 8 decoder
F (A, B, C) = ∑m (0, 1, 3, 4, 5, 7)
15) Design 8:1 MUX by using two 4:1 MUX.
16) Design a comparator circuit which compares two 2- bit numbers. It has three outputs
A> B , A< B and A=B . Also show that A< B=A > B . A=B.
17) Design a combinational circuit with 3 inputs and 1 output. The output is high only
when more than one input is high.
18) Design a circuit that generate an even parity bit for 4- bit input and implement it using
only NAND gates.
19) Design 2-bit binary multiplier.
20) Reduce S = ∑ m(1, 2, 4, 5, 6, 8, 9, 12) + d(3, 10, 13, 15) using QM Method.
21) Write short notice on:
A. Propagation Delay
 B. AOI Logic and its advantages
C. Tri State Logic
D. Variable Entered Mapping (Reading and Writing)
22) Design BCD to Seven segment Display Circuit.