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Power Products, Texas Instruments, Inc.
Email: {montu.doshi, vahid.yousefzadeh, james.patterson}@ti.com
Abstract—This paper presents a current controller for an IIN vs1 ip 1 : 1 is vs2 iL,OUT ILED
automotive LED driver based on a zero-voltage switching (ZVS) L1 L2
Cb1 Cb2
Ćuk converter using planar integrated magnetics. The driver
c1(t) c2(t) N
outputs regulated dc current through a string of N = 1-12 LED’s, VIN Q1 Q2 Cout
/('V
VOUT
which implies the need to operate over a wide output voltage
Rs
range (approximately 3-40 V). It is found that the low-frequency T1 i2
gain of the duty-cycle-to-output-current transfer function exhibits vs
3UHDPSOLILHU
weak dependence on the output voltage, which simplifies the *DWH *DWH
GULYHU GULYHU DQDORJFRQGLWLRQLQJ
controller design. A simple integral compensator is used to
achieve wide-bandwidth control of the output current. PWM $'
dimming is performed by turning the converter on and off,
eliminating the need for any additional circuitry or lossy linear
current regulators. Converter turn-on and turn-off strategies u[k] 'LJLWDO,QWHJUDO e[k]
FRPSHQVDWRUDQG IREF
'LJLWDO3:0
are introduced to speed up the on/off transients and facilitate 'LPPLQJFRQWURO PWM_in
high-resolution PWM dimming. Closed-loop current regulation )3*$PRGXOH
performance and PWM dimming are verified by averaged circuit
simulations including a Spice model of the planar integrated
Figure 1: Digitally controlled automotive LED
magnetics structure extracted by a 3D FEM tool. The controller
is implemented digitally and experimental results are presented driver based on a high-frequency ZVS integrated
for a 0.5 A, 3-40 V prototype operating at 2 MHz. magnetics Ćuk converter.
,(((
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[21]. Furthermore, the magnetizing inductance adds additional
iin iL,out
conjugate poles and zeros to the converter’s transfer functions
[22], so the converter in Fig. 1 is a sixth-order system.
ILED
To evaluate the system dynamics, an averaged Spice model vs1 ip 3RUW=
PDWUL[
is vs2
are presented.
The paper is organized as follows. Section II presents Figure 2: Simulation setup using Spice averaged
the small signal modeling approach, and controller design, circuit model of the converter.
together with simulation results. PWM dimming and fast turn-
on and turn-off strategies are discussed in Section III. Digital
implementation of the controller and experimental results are
presented in Section IV. Section V concludes the paper.
II. C ONVERTER DYNAMICS AND C ONTROLLER D ESIGN
The nature of the small-signal dynamics of the converter
shown in Fig. 1 can be examined by Spice ac simulations
using an averaged circuit model of the power stage [23], and
a Spice model of the integrated magnetics extracted using a
3D FEM tool, as described in [10].
A. Small signal modeling of the integrated magnetics Ćuk
converter
A Spice implementation of the averaged switched model
described in [23] is used to obtain small-signal dynamics and,
in particular, the duty-cycle-to-output-inductor-current transfer
function
îL,out (s) Figure 3: Duty-cycle to output inductor current
Gid (s) = . (1) i (s)
ˆ
d(s) transfer function Gid (s) = L,out
d(s) for VIN =
12 V, VOU T = 3 V-to-40 V (N = 1-to-12) and
Since the converter has a very small output capacitor, the output current ILED = 0.5A.
output inductor current is essentially equal to the LED current,
and is hence utilized as the control objective. The simulation transfer function remains approximately constant regardless of
setup is shown in Fig. 2. The converter’s switch network changes in the output voltage. To investigate this property of
(comprising transistors Q1 and Q2 in Fig. 1), is replaced the transfer function analytically, a small signal model of the
by the averaged switch model, and the magnetic components standard Ćuk converter (without the integrated magnetics) is
(Lin , Lout and the transformer) are represented by the Spice considered and solved for low-frequency duty-cycle-to-output-
model of the integrated magnetics structure. An additional current gain Gid,0 The duty-cycle-to-output-inductor-current
resistor Rc is introduced in parallel with the transformer’s transfer function of the standard Ćuk converter is given by:
input port to model its core loss [10]. Using .ac simulation
s2
in the Spice environment, the converter duty-cycle-to-output- Gid0 (1 − Qz wz + wz2 )
s
Gid (s) = s2
, (2)
inductor-current transfer function, as expressed in (1), is found (1 + Qp wp + wp2 )(1 + w )
s s
p2
for VIN = 12 V, VOU T = 3 V-to-40 V (N = 1-to-12) and output
current ILED = 0.5 A. The results are shown in Fig. 3. As can where the low frequency gain is:
be seen from the magnitude plot, the transfer function includes DD Vc + D2 V c
a low-frequency pole located around 10 kHz, multiple high- Gid0 = , (3)
D2 VILED
OU T
frequency poles and zeros due to the magnetizing inductance
of the transformer [22], and a right-half plane zero at a very and Vc = VIN + VOU T . Simplifying (3) results in:
high frequency (> 200 kHz). One may note that the low ILED
frequency gain of the duty-cycle-to-output-inductor-current Gid,0 = . (4)
DD
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iin iL,out
T1
$YHUDJHGVZLWFKHGPRGHO
'XW\F\FOH>@
TV
d
C1
Figure 4: DC gain versus steady-state duty cycle,
3:0JDLQEORFN
D. vc
R1
90
vref
$& Rf iL,out
A plot of the low-frequency gain as a function of steady-state
duty cycle D is shown in Fig. 4. As the duty cycle D varies &RQWUROOHU
from 20% to 80%, representing the corresponding variation in
the converter output voltage, the low frequency gain changes Figure 5: Setup to obtain the converter loop gain
only by about 4 dB, consistent with the frequency responses using Spice .AC simulation.
obtained by ac simulations of the averaged circuit model.
B. Compensator design
Based on the analytical result for the low-frequency gain,
and the detailed Spice model presented in the previous section, &URVVRYHUIUHTXHQF\IF N+]
a closed loop controller is developed to regulate the output
current of the integrated magnetics Ćuk converter as shown in
Fig. 5. The output inductor current is sensed and compared
with a current reference, and the error is processed by an
integral compensator. The output of the compensator is fed
into a pulse-width modulator (PWM), which provides the
modulated duty cycles for the two transistors, Q1 and Q2 . As
3KDVHPDUJLQ R
can be seen from Fig. 5, a test signal source is inserted at the
compensator output to measure the loop gain of the system.
The Spice-simulated loop gain is plotted for various numbers
of LEDs in Fig. 6. The loop gain has a crossover frequency
of around 15 kHz, below the resonant poles and zeros of the
open loop transfer function shown in Fig. 3, while providing
a phase margin of φ =57o at the worst-case operating point
(VOU T = 40 V, corresponding to number of LEDs N = 12.
At this load, the phase of the open loop transfer function Figure 6: The converter loop gain for VIN =
is the lowest, as shown in Fig. 3. The compensator design 12 V, VOU T = 3 V-to-40 V (N = 1-to-12) and
leads to a fast transient response with minimal overshoot in output current ILED = 0.5A.
the LED current. Furthermore, as discussed in the previous
section, since the low frequency gain of the open loop transfer the converter switching frequency, but high enough to avoid
function varies over a relatively narrow range in response to flickering. The converter is turned on when PWMin signal is
changes in the number of LEDs, the crossover frequency also high, and turned off when it is low. When the signal goes high,
remains approximately constant. the gate drivers are enabled and the compensator reference
input is set to Vref = Rf Iref . Conversely, when PWMin
III. D IMMING BY P ULSE -W IDTH M ODULATION goes low, the gate drivers are disabled and consequently the
PWM dimming functionality is added to the feedback con- converter is shut down. At this time, the compensator reference
troller by introducing a new control input, PWMin , as shown input is set to zero and the converter’s output voltage drops
in Fig. 7. PWMin is a pulsating signal with a duty cycle corre- from its steady state value. This prevents any overshoots from
sponding to the required LED brightness. The frequency of the occurring in the LED current in the next PWM dimming
pulses is typically in the 200 Hz to 1 kHz range, well below cycle when the PWMin signal goes high again. A transient
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Figure 7: The simulation setup to perform PWM
dimming.
A. Turn-off strategy
In this sub-section, a turn-off strategy is proposed to shorten
the turn-off time. The strategy consists of the following steps:
• During the on-time, the steady state value of the duty
cycle command is sampled.
• When the PWMin signal goes low, instead of completely
turning off the converter, the converter duty cycle is set
to a fraction (e.g. 90%) of its steady state value to reverse
the power flow and to actively discharge the converter’s
output capacitor. In response, the LED current decays at a
fast rate, and reaches zero when the output voltage falls
below the combined forward voltage drop of the LED
string.
• The converter is turned off when the LED current reaches
zero.
Figure 8: The LED’s current response to a A circuit implementation of the proposed turn-off strategy is
100 mA (400 mA-to-500 mA) change in the shown in Fig. 10. The steady state duty cycle command is
reference current using the subcircuit models of sampled and held by the capacitor Chold . As the PWM in
the switching devices for VIN = 12 V, VOU T = signal goes low, the reference input of the compensator is
3 V-to-50 V (N = 1-to-12). set to zero. At the same time, a switch disconnects the
compensator and supplies the PWM modulator with a fraction
of the previously sampled steady state dutycycle command.
shown in Figs. 9(a) and 9(b), respectively, to highlight the turn- The fraction (e.g. 90%), is set by the voltage divider consisting
off and turn-on transients of the LED current. The turn-off time of R2 and R3 . A comparator monitors the LEDs current and
of the LED current is longest when the number of LEDs N disables the gate drivers once the LEDs current falls below
is maximum, with a fall time of approximately tof f ≈ 40 μs. ILED,of f . After that, both gate drivers are set to zero, and the
Similarly, the turn-on time is also longest for the maximum converter is shut down.
number of LEDs, ton ≈ 40 μs. Strategies considered to Turn-off time transitions of the LED currents with and
speed-up the turn-off and turn-on times are described in the without the turn-off strategy are overlaid in Fig. 11. It can be
remainder of this section. seen that with the proposed turn-off technique, the fall time
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• When the LED current reaches its steady-state value, the
iin iL,out
duty cycle command vc is sampled and stored to be used
during turn-off transient, as described in the previous
3RUW= is IOUT
vs1 ip
PDWUL[
vs2 subsection.
Cb1 )URP' Cb2
)(0WRRO
N
Fig. 12 shows a circuit implementation of the turn-on strategy.
VIN c1 Q1 Rc c2 Q2 Cout VOUT
/('V As the PWM in signal goes high, the PWM modulator input
T1
is connected to the voltage across capacitor Chold . As a
Gate Gate
result, the converter starts operating with duty cycle close to
driver driver
the previously stored value, the output capacitor is charged
C1
up quickly, and the output LED current starts increasing.
PWM_in
Once the LED current approaches its steady state reference
3:0 vc
R1
value ILED,ss , closed-loop current regulation resumes as the
90
compensator output is reconnected to the PWM modulator
Rf iL,out ILED, off
and the reference vref is applied to the compensator reference
input.
vref While the controller implementation is in this section de-
R2 Chold scribed in terms of analog circuits, and verified using ana-
R3
log Spice circuit simulations, the controller is implemented
digitally in an experimental prototype described in the next
section.
Figure 10: Implementation of the proposed turn-
off strategy. iin iL,out
T1
Gate Gate
driver driver
C1
PWM_in
R1
3:0
vc
90
Rf iL,out ILED, SS
Figure 11: Turn-off transition with and without vref
the proposed turn-off strategy. Chold
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Figure 13: Tun-on transition with and without the proposed turn-on strategy for for VIN = 12 V, ILED = 0.5 A
(a) VOU T = 3 V (N = 1) and (b) VOU T = 40 V (N = 12).
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Figure 15: PWM dimming performance for a dimming frequency fdim = 1 kHz and dimming duty cycle (a)
Ddim = 20% and (b) Ddim = 80%. VIN = 12 V, VOU T = 40 V (N = 12), ILED = 0.5 A.
Figure 16: Turn-on and turn-off transitions: (a) turn-on transition for VIN = 12 V, VOU T = 40 V (N = 11) and
(b) turn-off transition for VIN = 12 V, VOU T = 15 V (N = 5).
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