Electronics Lectures Fall2019

ELE250
Electronics I
Fall 2019
Dr.Yusra Obeidat
Email:yusra.obeidat@yu.edu.jo
office: 308
Chapter 1: Semiconductor Diodes
Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

The Diode
• The diode is the first electronic device to be introduced
• It is the simplest of semiconductor devices but plays a very vital role in

electronic systems
• The diode has characteristics that closely match those of a simple

switch.
• It has a range of applications, extending from the simple to the very

complex.

Diode symbol
The Ideal Diode
• The term Ideal refers to any device or system that has ideal characteristics—perfect
in every way.
• It provides a basis for comparison, and it reveals where improvements can still be
made.
• The characteristics of an ideal diode are those of a switch that can conduct current in
only one direction.
• Ideally, a diode will conduct current in the direction defined by the arrow in the
symbol and act like an open circuit to any attempt to establish current in the opposite
direction.
• The forward resistance of ideal diode is zero ohms (short circuit, RD=0 Ω)
• The reverse resistance for ideal diode is infinity (open circuit, RD= ∞)
The Ideal Diode
(a) Conduction and (b) nonconduction states of the ideal

diode as determined by the applied bias.
Ideal diode characteristics
Ohm’s law:

Semiconductor Materials
• The term conductor is applied to any material that will support a
generous flow of charge when a voltage source of limited
magnitude is applied across its terminals.
• An insulator is a material that offers a very low level of conductivity

under pressure from an applied voltage source.
• A semiconductor, therefore, is a material that has a conductivity

level somewhere between the extremes of an insulator and a
conductor.

• The higher the conductivity level, the lower the resistance
level.
Defining the metric units of resistivity.

• Ge and Si have received a great attention in manufacturing semiconductor devices.
• One very important consideration is the fact that they can be manufactured to a
very high purity level.
1. low impurity levels are really necessary.

2. if you consider that the addition of one part impurity (of the proper type) per million
in a wafer of silicon material can change that material from a relatively poor
conductor to a good conductor of electricity.
• The ability to change the characteristics of the material significantly through doping
process.
• The fact that their characteristics can be altered significantly through the application
of heat or light—an important consideration in the development of heat- and light-
sensitive devices
• Some of the unique qualities of Ge and Si are due to their atomic
structure.
• The atoms of both materials form a very definite pattern that is periodic in
nature (i.e., continually repeats itself).
• One complete pattern is called a crystal and the periodic arrangement of

the atoms a lattice.
• For Ge and Si the crystal has the three-dimensional diamond structure of

Fig. 1.5.
• Any material composed solely of repeating crystal structures of the same

kind is called a single-crystal structure.
• For semiconductor materials of practical application in the electronics

field, this single crystal feature exists, and, in addition, the periodicity of
the structure does not change significantly with the addition of impurities
in the doping process.
Covalent Bonding and Intrinsic Materials
• The atom is composed of three basic particles: the electron, the proton,
and the neutron.
• In the atomic lattice, the neutrons and protons form the nucleus, while
the electrons revolve around the nucleus in a fixed orbit.
• The Bohr models of the two most commonly used semiconductors,

germanium and silicon, are shown in Fig. 1.6.
• The germanium atom has 32 orbiting electrons, while silicon has 14

orbiting electrons.
• In each case, there are 4 electrons in the outermost (valence) shell.
• The potential (ionization potential) required to remove any one of these 4

valence electrons is lower than that required for any other electron in the
structure.

• In a pure germanium or silicon crystal, 4 valence
electrons are bonded to 4 adjoining atoms, as shown
in Fig. 1.7 for silicon.
• Both Ge and Si are referred to as tetravalent atoms

because they each have four valence electrons.
• Covalent bonding is a bonding of atoms,

strengthened by the sharing of electrons.

• Although the covalent bond will result in a stronger bond between the valence
electrons and their parent atom, it is still possible for the valence electrons to absorb
sufficient kinetic energy from natural causes to break the covalent bond and assume
the “free” state.
• The term free reveals that their motion is quite sensitive to applied electric fields such
as established by voltage sources or any difference in potential.
• These natural causes include effects such as light energy in the form of photons and
thermal energy from the surrounding medium.
• At room temperature there are approximately 1.5 X10^13 free carriers in a cubic
centimeter of intrinsic silicon material.

• Intrinsic materials are those semiconductors that have been carefully refined to reduce
the impurities to a very low level—essentially as pure as can be made available
through modern technology.
• The free electrons in the material due only to natural causes are referred to as intrinsic
carriers
• The ratio of the number of carriers in germanium to that of silicon is greater than 10³
and would indicate that germanium is a better conductor at room temperature.
• As the temperature rises from absolute zero (0 K), an increasing number of valence
electrons absorb sufficient thermal energy to break the covalent bond and contribute to
the number of free carriers as described above.

• This increased number of carriers will increase the conductivity index and result in a
lower resistance level.
• An increase in temperature of a semiconductor can result in a substantial increase in

the number of free electrons in the material.
• Semiconductor materials such as Ge and Si that show a reduction in resistance with

increase in temperature are said to have a negative temperature coefficient.
• Oppositely: The resistance of most conductors increase with temperature due to the
fact that the numbers of carriers in a conductor will not increase significantly with
temperature, but their vibration pattern about a relatively fixed location will make it
increasingly difficult for electrons to pass through. An increase in temperature therefore
results in an increased resistance level and a positive temperature coefficient.

Energy Levels
• The more distant the electron from the nucleus, the higher the energy state, and any
electron that has left its parent atom has a higher energy state than any electron in
the atomic structure.
• Ionization is the mechanism whereby an electron can absorb sufficient energy to

break away from the atomic structure and enter the conduction band
• The energy associated with each electron is measured in electron volts (eV).
• W=QV eV
• 1 eV=1.6x10^-19 J

Extrinsic Materials-
n- and p-type
• A semiconductor material that has been subjected to the doping process is called an
extrinsic material.
• There are two extrinsic materials of immeasurable importance to semiconductor

device fabrication: n-type and p-type.
• Both the n- and p-type materials are formed by adding a predetermined number of
impurity atoms into a germanium or silicon base.
• The n-type is created by introducing those impurity elements that have five valence
electrons (pentavalent), such as antimony, arsenic, and phosphorus.
• The p-type material is formed by doping a pure germanium or silicon crystal with
impurity atoms having three valence electrons. The elements most frequently used for
this purpose are boron, gallium, and indium.
Extrinsic Materials-
n- and p-type
• Diffused impurities with five valence electrons are called donor atoms.
• The diffused impurities with three valence electrons are called acceptor atoms.
Effect of donor impurities on the energy band

structure.
Antimony impurity in n-type material. Boron impurity in p-type material.

Extrinsic Materials- n- and p-type
• The conventional flow of current is indicated by the direction of hole flow.
• In an n-type material, the electron is called the majority carrier and the hole the minority carrier
• In a p-type material the hole is the majority carrier and the electron is the minority carrier.

Semiconductor Diode
• The semiconductor diode is formed by simply bringing p-type and n-type
materials together.
• At the instant the two materials are “joined” the electrons and holes in the
region of the junction will recombine, resulting in a lack of carriers in the region
near the junction.
• This region of uncovered positive and negative ions is called the depletion region
due to the depletion of carriers in this region.
Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition p n

Semiconductor Diode
1. No Applied Bias (VD=0 V):
• In the absence of an applied bias
voltage, the net flow of charge in any
one direction for a semiconductor diode
is zero.

Semiconductor Diode
2. Reverse-Bias Condition (VD < 0 V):
• The current that exists under reverse-
bias conditions is called the reverse
saturation current and is represented by
I s.

Semiconductor Diode
3. Forward-Bias Condition (VD > 0 V)
• A semiconductor diode is forward-
biased when the association p-type and
positive and n-type and negative has
been established.

Semiconductor Diode Characteristics.
• The general characteristics of a semiconductor diode
can be defined by the following equation for the
forward- and reverse-bias regions:
• The equation above is called: Shockley’s equation

Silicon semiconductor diode characteristics
Zener Region
• The reverse-bias potential that results in a dramatic change in the

characteristics at a very rapid rate in a direction opposite to that of the
positive voltage region is called the Zener potential and is given the symbol
VZ.
• Avalanche breakdown: As the voltage across the diode increases in the

reverse-bias region, the velocity of the minority carriers responsible for the
reverse saturation current Is will also increase. Eventually, their velocity and
associated kinetic energy (WK=½mv²) will be sufficient to release additional
carriers through collisions with otherwise stable atomic structures. That is, an
ionization process will result whereby valence electrons absorb sufficient
energy to leave the parent atom. These additional carriers can then aid the
ionization process to the point where a high avalanche current is established.
Zener Region
• Zener Breakdown: The avalanche region (VZ) can be brought closer
to the vertical axis by increasing the doping levels in the p- and n-
type materials. However, as VZ decreases to very low levels, another
mechanism, called Zener breakdown, will contribute to the sharp
change in the characteristic. It occurs because there is a strong
electric field in the region of the junction that can disrupt the bonding
forces within the atom and “generate” carriers.
• Although the Zener breakdown mechanism is a significant

contributor only at lower levels of VZ, this sharp change in the
characteristic at any level is called the Zener region and diodes
employing this unique portion of the characteristic of a p-n junction
are called Zener diodes
• The maximum reverse-bias potential that can be applied before

entering the Zener region is called the peak inverse voltage (referred
to simply as the PIV rating) or the peak reverse voltage (denoted by
PRV rating).
Silicon Versus Germanium

Temperature Effects
• As the temperature increases the

forward characteristics are actually
becoming more “ideal,” VT
decreases by increasing
temperature.
• The reverse saturation current Is will

just about double in magnitude for
every 10°C increase in temperature.

Resistance Levels
• DC or Static Resistance

Resistance Levels
• AC or Dynamic Resistance
• In general, therefore, the lower the Q-point of operation (smaller current or lower voltage) the
higher the ac resistance.
• The derivative of a function at a point is equal to the slope of the tangent line drawn at that point.
rB represents the semiconductor material

resistance(body resistance) and the contact
resistance between the semiconductor and the
Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition external metallic conductor.
Resistance Levels
• Average AC Resistance
• As with the dc and ac resistance levels, the lower the

level of currents used to determine the average
resistance the higher the resistance level.

Resistance Levels

Diode Equivalent Circuits
• An equivalent circuit is a combination of elements properly chosen to best
represent the actual terminal characteristics of a device, system, or such in
a particular operating region.
1. Piecewise-Linear Equivalent Circuit

2. Simplified Equivalent Circuit

3. Ideal Equivalent Circuit


Diode Specification Sheets
1. The forward voltage VF (at a specified current and temperature)
2. The maximum forward current IF (at a specified temperature)
3. The reverse saturation current IR (at a specified voltage and
temperature)
4. The reverse-voltage rating [PIV or PRV or V(BR), where BR comes from
the term “breakdown” (at a specified temperature)]
5. The maximum power dissipation level at a particular temperature
6. Capacitance levels
7. Reverse recovery time trr
8. Operating temperature range

Diode Specification Sheets

Transition and Diffusion Capacitance
• Electronic devices are inherently sensitive to very high frequencies.
• Most shunt capacitive effects that can be ignored at lower frequencies
because the reactance XC is very large (open-circuit equivalent).
• The capacitive effect cannot be ignored at very high frequencies, since XC
will become sufficiently small due to the high value of f to introduce a low-
reactance “shorting” path.
• In the reverse-bias region we have the transition- or depletion-region
capacitance (CT), while in the forward-bias region we have the diffusion
(CD) or storage capacitance.

Transition and Diffusion Capacitance
• C=A*Ԑ/d
• CT<CD
• XCT>XCD at the same frequency level.

Reverse Recovery Time

Semiconductor Diode Notation

Diode Checking Function
• Ohmmeter Testing

Zener Diodes

Zener Diodes
T0 is the temperature at which VZ is provided

(normally room temperature—25°C), and T1 is the
new level.

Zener Diodes

Light Emitting Diodes
• The light-emitting diode (LED) is a diode that will give off visible light when it is energized.
• In any forward-biased p-n junction there is a recombination of holes and electrons within the
structure and primarily close to the junction.
• The recombination requires that the energy possessed by the unbound free electron be
transferred to another state.
• In all semiconductor p-n junctions some of this energy will be given off as heat and some in
the form of photons.
• In silicon and germanium the greater percentage is given up in the form of heat and the
emitted light is insignificant.
• In other materials, such as gallium arsenide phosphide (GaAsP) or gallium phosphide (GaP),
the number of photons of light energy emitted is sufficient to create a very visible light source.
• The process of giving off light by applying an electrical source of energy is called
electroluminescence.

Chapter 2: Diodes Applications

Load Line Analysis

Diode Approximations

Series Diode Configuration with DC Inputs
• In general, a diode is in the “on” state if the current established by the applied sources is such that its
direction matches that of the arrow in the diode symbol, and VD≥0.7 V for silicon and VD≥0.3 V for
germanium.


Examples

Examples

Examples

Examples

Examples

Examples

Examples

Examples

Parallel and Series-Parallel Configurations
Examples
Solution:

Examples

Examples

Examples

Examples

AND/OR Gates

AND/OR Gates
Examples
Example 2.16: Determine Vo for the network of Fig. 2.38.
Solution:

AND/OR Gates
Examples
Example 2.17: Determine Vo for the network of Fig. 2.41.
Solution:

Sinusoidal Inputs: Half-Wave Rectification





Sinusoidal Inputs: Full-Wave Rectification
Bridge Network:

Bridge Network:

Bridge Network:

Center-Tapped Transformer

Center-Tapped Transformer

Clippers
Series

Clippers
Series
1. Make a mental sketch of the response of the network based on the direction of the
diode and the applied voltage levels.
2. Determine the applied voltage (transition voltage) that will cause a change in state for
the diode.
3. Be continually aware of the defined terminals and polarity of vo.
4. It can be helpful to sketch the input signal above the output and determine the output
at instantaneous values of the input.
Clippers
Series
Figure 2.69 Determining the transition level for the

circuit of Fig. 2.68

Clippers
Series

Clippers
Series

Clippers
Series

Clippers
Parallel

Clippers
Parallel

Clippers

Clippers

Clampers

Clampers
1. Start the analysis of clamping networks by considering that part of the input signal that will forward
bias the diode.
2. During the period that the diode is in the “on” state, assume that the capacitor will charge up
instantaneously to a voltage level determined by the network.
3. Assume that during the period when the diode is in the “off” state the capacitor will hold on to its
established voltage level.
4. Throughout the analysis maintain a continual awareness of the location and reference polarity for vo
to ensure that the proper levels for vo are obtained.
5. Keep in mind the general rule that the total swing of the total output must match the swing of the
input signal.

Clampers

Clampers

Clampers

Zener Diodes

Zener Diodes
• Determine the state of the Zener diode by removing it
from the network and calculating the voltage across the
resulting open circuit.
• Substitute the appropriate equivalent circuit and solve for

the desired unknowns.

1.Fixed Vi, Fixed RL Zener Diodes
(a)
V=<VZ, that means the Zener is open so, IZ=0, VL=VZ

VR=Vi-VL=16-8.73=7.27 V
PZ=0
(b)
V>VZ, that means the Zener is on so VL=VZ=10 V

VR=Vi-VL=16-10=6 V
IR=VR/1k=6 mA
IL=VL/RL=10/3k=3.33 mA,
IZ=IR-IL= 2.67 mA, PZ=IzVz= 26.7 mW< PZM
Zener Diodes
2.Fixed Vi, Variable RL

Zener Diodes
3. Fixed Vi, Variable RL

Zener Diodes
2. Fixed RL, Variable Vi

Zener Diodes

Zener Diodes

Zener Diodes

Zener Diodes

Chapter 2: Extra Examples
Example 1
Example 1
Example 1
Example 2
Example 2
Example 3
Example 3
Example 3
Example 4
Example 5
Example 6
Example 6
Example 6
Example 6
Example 6
Example 6
Voltage Multiplier Circuits
Voltage Doubler

Voltage Doubler

Voltage Tripler and Quadrupler

Chapter 3: Bipolar Junction Transistors

Transistor Construction
• The transistor is a three-layer semiconductor device consisting of either two n- and
one p-type layers of material (npn transistor) or two p- and one n-type layers of material
(pnp transistor).
• The emitter layer is heavily doped, the base is lightly doped, and the collector only
lightly doped.
• Outer layers have widths much greater than the sandwiched p- or n-type material.
• The doping of the sandwiched layer is considerably less than that of the outer layers
(typically, 10:1 or less).
• This lower doping level decreases the conductivity (increases the resistance) of this
material by limiting the number of “free” carriers.
• The term bipolar reflects the fact that holes and electrons participate in the injection
process into the oppositely polarized material.
• The dc biasing is necessary to establish the proper region of operation for ac
amplification.
Transistor Construction
• The terminals have been indicated by the capital letters E for emitter, C for collector, and B for base.

Transistor Operation
• One p-n junction of a transistor is reverse biased, while the other is
forward biased.
• Note the similarities between the situation in Fig3.3 and that of the
forward-biased diode.
• The depletion region has been reduced in width due to the applied bias,
resulting in a heavy flow of majority carriers from the p- to the n-type
material.

• Note the similarities between the situation in Fig.3.4 and that of the
reverse-biased diode.
• The depletion region has been increased in width due to the reverse bias.

• Applying both biasing potentials to a pnp
transistor as in Fig.3.5.
• The resulting majority- and minority-carrier flow

is indicated.
• The widths of the depletion regions indicate

clearly which junction is forward-biased and
which is reverse-biased.
• A large number of majority carriers will diffuse

across the forward-biased p-n junction into the
n-type material.
Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th and 10th editions
• The sandwiched n-type material is very thin

and has a low conductivity,
• A very small number of these carriers will take

the path of high resistance to the base
terminal.
• The magnitude of the base current is typically

on the order of microamperes as compared to
milliamperes for the emitter and collector
currents.
• The larger number of the majority carriers in n-region will diffuse

across the reverse-biased junction into the p-type material
connected to the collector terminal.
• The reason for the relative ease with which the majority carriers
can cross the reverse-biased junction can be explained by
considering that in the reverse-biased diode the injected majority
carriers will appear as minority carriers in the n-type material.
• That means there has been an injection of minority carriers into

the n-type base region material.
• Therefore, all the minority carriers in the depletion region will cross
the reverse-biased junction of a diode accounts for the flow
indicated
• Applying Kirchhoff’s current law to the transistor:
the emitter current is the sum of the collector and base currents
• The collector current, is comprised of two components—the

majority and minority carriers
• For general-purpose transistors, IC is measured in milliamperes,

while ICO is measured in microamperes or nanoamperes.
• ICO, like Is for a reverse-biased diode, is temperature sensitive

and must be examined carefully when applications of wide
temperature ranges are considered.
Common Base Configuration
• It is called common base (CB) since the base is common or reference between input and output
terminals (in this case common to both the emitter and collector terminals).
• The arrow in the graphic symbol defines the direction of emitter current (conventional flow)
through the device.

• To fully describe the behavior of a three-terminal device we need two sets

of characteristics—one for the driving point or input parameters and the
other for the output side.
• The input set for the common-base amplifier will relate an input current
(IE) to an input voltage (VBE) for various levels of output voltage (VCB).
• The output set will relate an output current (IC) to an output voltage (VCB)
for various levels of input current (IE).
• The output or collector set of characteristics has three basic regions of

interest, the active, cutoff, and saturation regions.


• In the active region the collector-base junction is reverse-biased, while

the base-emitter junction is forward-biased.
• As the emitter current increases above zero, the collector current

increases to a magnitude essentially equal to that of the emitter current
• There is almost negligible effect of VCB on the collector current for the
active region.
• IC=~IE

• In the cutoff region the collector-base and base-emitter junctions of a

transistor are both reverse-biased.
• Cutoff region is at the lower end of the active region where the emitter
current (IE) is zero, the collector current is simply that due to the reverse
saturation current ICO

• The saturation region is defined as that region of the characteristics to

the left of VCB=0 V.
• There is an exponential increase in collector current as the voltage V CB

increases toward 0 V.

• The input characteristics reveals that for fixed values of

collector voltage (VCB), as the base-to-emitter voltage
increases, the emitter current increases in a manner that
closely resembles the diode characteristics.
• Increasing levels of VCB have such a small effect on the

characteristics. The change due to changes in VCB can be
ignored.
• Once a transistor is in the “on” state, the base-to-emitter

voltage will be assumed to be: VBE=0.7 V


Alpha(α)
• In the dc mode the levels of IC and IE due to the majority carriers are related by a
quantity called alpha and defined by the following equation:
where IC and IE are the levels of current at the point of operation.
• For practical devices, the level of alpha typically extends from 0.90 to 0.998.
• For ac situations where the point of operation moves on the characteristic curve,
an ac alpha is defined by:
• The ac alpha is formally called the common-base, short-circuit, amplification factor

Biasing
• The proper biasing of the common-base configuration in the active region can be determined quickly using the
approximation IC=~IE and assuming for the moment that IB=~0 µA

Transistor Amplifying Action
The ac input resistance of CB is quite small and typically varies from 10 to 100 Ω.
The output resistance is quite high (the more horizontal the curves the higher the
resistance) and typically varies from 50 kΩ to 1 M Ω.

Example: the output resistance of CB in Fig.3.12 is 100 kΩ and the input resistance is 20
Ω, then

• Typical values of voltage amplification for the CB

configuration vary from 50 to 300.
• The current amplification (IC/IE) is always less than 1 for the

CB configuration; IC=αIE , α<1.
• The basic amplifying action was produced by transferring a

current I from a low to a high-resistance circuit. Hence the
term transistor:

Common Emitter Configuration
• It is called common-emitter configuration since the emitter is common or reference to both the input
and output terminals (in this case common to both the base and collector terminals).
• The active region of the common-emitter configuration can be employed for voltage, current, or power
amplification


• Two sets of characteristics are again necessary to describe fully the behavior of the common-
emitter (CE) configuration:
one for the input or base-emitter circuit and one for the output or collector-emitter circuit.
• For the CE configuration the output characteristics are a plot of the output current (IC) versus output
voltage (VCE) for a range of values of input current (IB).
• The input characteristics are a plot of the input current (IB) versus the input voltage (VBE) for a range
of values of output voltage (VCE).
• The magnitude of IB is in microamperes, compared to milliamperes of IC.
• The curves of IB are not as horizontal as those obtained for IE in the CB configuration, indicating that
the collector-to-emitter voltage will influence the magnitude of the collector current.

• In the active region of a CE amplifier the collector-base junction is reverse-biased, while the base-
emitter junction is forward-biased.
• The active region exists to the right of the vertical dashed line at VCEsat and above the curve for IB equal
to zero.
• The region to the left of VCEsat is called the saturation region.
• The cutoff region for the CE configuration is not as well defined as for the CB configuration.
• IC is not equal to zero when IB is zero.
• Remember that for the CB configuration, when the input current IE was equal to zero, the collector
current was equal only to the reverse saturation current ICO.

• For linear (least distortion) amplification purposes, cutoff for the CE configuration will
be defined by IC=ICEO.

Fig.3.16

Beta β
• In the dc mode the levels of IC and IB are related by a quantity called beta
• For ac situations an ac beta has been defined as:

Common Collector Configuration
• It is called common-collector (CC) configuration since the collector is common or reference to both the
input and output terminals (in this case common to both the base and emitter terminals).

Common Collector Configuration
• It is called common-collector (CC) configuration since the collector is common or reference to both the input and
output terminals (in this case common to both the base and emitter terminals).
• The CC configuration is used primarily for impedance-matching purposes since it has a high input impedance and
low output impedance, opposite to that of the CB and CE configurations.
• The output characteristics of the CC configuration are the same as for the CE configuration.
• For the CC configuration the output characteristics are a plot of IE versus VEC for a range of values of IB.
• The input current, therefore, is the same for both the CE and CC characteristics.
• The horizontal voltage axis for the CC configuration is obtained by simply changing the sign of the collector-to-
emitter voltage of the CE characteristics.
• there is an almost unnoticeable change in the vertical scale of IC of the CE characteristics if IC is replaced by IE for
the common-collector characteristics (since α=~1).

Limits of Operation
• For common emitter configuration:
• For common base configuration:

Specification Sheet

DC Biasing for BJTs
• The analysis or design of a transistor amplifier requires a knowledge of
both the dc and ac response of the system.
• The AC-amplifier is used to raise the level of the applied AC input.
• The improved output AC power level is the result of a transfer of energy

from the applied dc supplies
• The analysis or design of any electronic amplifier has two components:

the dc portion and the ac portion.
• The superposition theorem is applicable, and the investigation of the dc

conditions can be totally separated from the ac response.
DC Biasing for BJTs
• During the design or synthesis stage the choice of parameters for the required
dc levels will affect the ac response, and vice versa.
• The dc level of operation of a transistor is controlled by several factors,

including the range of possible operating points on the device characteristics.
• there is an underlying similarity between the analysis of each configuration:
• In most instances the base current IB is the first quantity to be determined, then
it can be used to find other quantities.

DC Biasing for BJTs
Operating Point
• The term biasing is an all-inclusive term for the application of dc voltages
to establish a fixed level of current and voltage.
• The resulting dc current and voltage establish an operating point on the

characteristics.
• The operating point define the region that will be employed for
amplification of the applied signal.
• The operating point is a fixed point on the characteristics, it is also called

the quiescent point (abbreviated Q-point).

DC Biasing for BJTs
Operating Point
• The term biasing is an all-inclusive term for the application of dc voltages
to establish a fixed level of current and voltage.
• The resulting dc current and voltage establish an operating point on the

characteristics.
• The operating point define the region that will be employed for
amplification of the applied signal.
• The operating point is a fixed point on the characteristics, it is also called

the quiescent point (abbreviated Q-point).

DC Biasing for BJTs
Operating Point

DC Biasing for BJTs
Operating Point
• For the BJT to be biased in its linear or active operating region the
following must be true:
• 1. The base–emitter junction must be forward-biased (p-region voltage

more positive), with a resulting forward-bias voltage of about 0.6 to 0.7 V.
• 2. The base–collector junction must be reverse-biased (n-region more

positive), with the reverse-bias voltage being any value within the
maximum limits of the device.

DC Biasing for BJTs
Operating Point
1. Linear-region operation:
• Base–emitter junction forward biased
• Base–collector junction reverse biased
2. Cutoff-region operation:
• Base–emitter junction reverse biased
• Base–collector junction reverse biased
3. Saturation-region operation:
• Base–emitter junction forward biased
• Base–collector junction forward biased
DC Biasing for BJTs
Fixed-Bias Circuit
2.DC equivalent by making
1. Main circuit capacitors open

DC Biasing for BJTs
Fixed-Bias Circuit
• Forward Bias of Base–Emitter:
• Consider first the base–emitter circuit loop (Fig 4.4):
• Since VCC and VBE are constants, the selection of

a base resistor, RB, sets the level of base current for
the operating point.

DC Biasing for BJTs
Fixed-Bias Circuit
• Collector–Emitter Loop:
• The collector–emitter section of the network appears
in Fig. 4.5 with the indicated direction of current IC
and the resulting polarity across RC.
• Applying Kirchhoff’s voltage law in the clockwise direction around the indicated
closed loop of Fig. 4.5:
Notice: IB is controlled by the level of RB

and IC= βIB , then IC is not a function of the
resistance RC. The change of RC will not affect the
level of IB or IC as long as we remain in the active
region. However, the level of RC will determine the
magnitude of VCE, which is an important parameter.
DC Biasing for BJTs
Fixed-Bias Circuit
Example 4.1:

DC Biasing for BJTs
Fixed-Bias Circuit
Example 4.1-solution
a)
b)
c)
d)

DC Biasing for BJTs
Transistor Saturation
• The term saturation is applied to any system where levels have reached
their maximum values.
• A saturated sponge is one that cannot hold another drop of liquid.
• For a transistor operating in the saturation region, the current is a

maximum value for the design.
• The highest saturation level is defined by the maximum collector current

as provided by the specification sheet.

DC Biasing for BJTs
• Saturation conditions are normally avoided because the base–collector
junction is no longer reverse-biased and the output amplified signal will
be distorted.
• In a saturation region, the characteristic curves join, and the collector-

to-emitter voltage is at or below VCEsat. In addition, the collector current
is relatively high on the characteristics.

DC Biasing for BJTs

DC Biasing for BJTs
To find ICsat you set VCE=0 ,
then ICsat=VCC/RC
Example: find ICsat for circuit shown
Solution: Icsat=VCC/RC=12/2.2k= 5.45 mA

DC Biasing for BJTs
Load Line Analysis

DC Biasing for BJTs
Load Line Analysis

DC Biasing for BJTs
Load Line Analysis

DC Biasing for BJTs
Load Line Analysis

DC Biasing for BJTs
Load Line Analysis

DC Biasing for BJTs
Load Line Analysis

DC Biasing for BJTs
Emitter Stabilized Bias Circuit
• It contains an emitter resistor to
improve the stability level over that
of the fixed-bias configuration.

DC Biasing for BJTs
KVL:
1. Base-Emitter Loop
Notice the difference between this equation and

The equation we got for fixed bias is only in the
dominator an added factor of (Β+1)RE
DC Biasing for BJTs
• Recall the equation of IB:
• A series network that would result in the same equation is

In Fig.4.20.
• Aside from the base-to-emitter voltage VBE, the resistor RE is

reflected to the input base circuit by a factor (β+1).
• The emitter resistor, which is part of the collector–emitter loop

, “appears as” (β+1)RE in the base–emitter loop.
• Since β is typically 50 or more, the emitter resistor

appears to be a great deal larger in the base circuit.
• In general, therefore, for the configuration of Fig. 4.21, Ri is:

DC Biasing for BJTs
2. Emitter-Collector loop:
KVL:

DC Biasing for BJTs
2. Emitter-Collector loop:

DC Biasing for BJTs
Example 4.4:
Determine IB , IC, VCE, VC, VE, VB, VBC

DC Biasing for BJTs
Example 4.4:
Determine IB , IC, VCE, VC, VE, VB, VBC

DC Biasing for BJTs
Improved Bias Stability
• The addition of the emitter resistor to the dc bias of the BJT provides improved stability,
• The dc bias currents and voltages remain closer to where they were set by the circuit when outside
conditions, such as temperature, and transistor beta, change.
Example 4.5:
Fixed-bias
Emitter-stabilized bias

DC Biasing for BJTs
Saturation Level

DC Biasing for BJTs
Saturation Level
Example 4.5:
Determine saturation current level for the network in Fig.4.4
Solution:

DC Biasing for BJTs
Load-Line analysis

DC Biasing for BJTs
Load-Line analysis

DC Biasing for BJTs
Load-Line analysis
Example 4.7:

DC Biasing for BJTs
Load-Line analysis
Example 4.7:
15 µA,
find ICQ and VCEQ

DC Biasing for BJTs
Load-Line analysis
Example 4.7:

DC Biasing for BJTs
Load-Line analysis
Example 4.7:

DC Biasing for BJTs
Load-Line analysis
Example 4.7:

DC Biasing for BJTs
Voltage Divider Bias Circuit
• β is temperature sensitive, especially for silicon transistors, and the actual value of beta is
usually not well defined.
• It would be desirable to develop a bias circuit that is less dependent, or independent of β.

DC Biasing for BJTs
• Exact Analysis
1. DC-equivalent circuit 2.Find Thevenin Equivalent network 2a.Rth by deactivating voltage source
for the input side: (replace by short circuit):

DC Biasing for BJTs
• Exact Analysis
2b.Find Thevenin Equivalent voltage:
ETh: The voltage source VCC is returned to the network and the open-circuit Thevenin voltage of Fig. 4.33
determined as follows:
Applying the voltage-divider rule:

DC Biasing for BJTs
• Exact Analysis
3.Redraw the Thevenin network(Fig.4.34) :

• IBQ can be determined by first applying Kirchhoff’s voltage law in the
clockwise direction for the loop indicated:
-Eth+IBRTh +VBE+REIE=0
• Substituting IE= (β+1)IB,

-Eth+IBRB +VBE+RE (β+1)IB =0 , then IB is:

DC Biasing for BJTs
• Exact Analysis
4.KVL on output loop(Fig4.30)
• Once IB is known we can find IC= βIB
• Then, VCE (KVL on output loop) is:

VCE=VCC- IC(RC+RE), assuming IC=~IE

DC Biasing for BJTs
• Example 4.8:
Determine the dc bias voltage VCE and the current IC for the voltage-divider
configuration of Fig. 4.35.
• Solution-Exact method:

• Example 4.8: DC Biasing for BJTs
• Solution-continue: Voltage Divider Bias Circuit

DC Biasing for BJTs
• Approximate Analysis Voltage Divider Bias Circuit
• The input section of the voltage-divider configuration can be

represented by the network of Fig. 4.36.
• The resistance Ri is the equivalent resistance between base

and ground for the transistor with an emitter resistor RE.
• The reflected resistance between base and emitter is defined

by:
Ri= (β+1)RE.
• If Ri is much larger than the resistance R2, the current IB will be

much smaller than I2 (current always seeks the path of least
resistance) and I2 will be approximately equal to I1.
• If we accept the approximation that IB is essentially zero

amperes compared to I1 or I2, then I1 =I2 and R1 and R2 can be
considered series elements.
DC Biasing for BJTs
• Approximate Analysis
• The voltage across R2, which is the base voltage, can be
determined using the voltage-divider rule (hence the name for the
configuration). That is,
• Since Ri =(β+1)RE=~ βRE ,the condition that will define whether

the approximate approach can be applied will be the following:
• In other words, if β times the value of RE is at least 10 times the

value of R2, the approximate approach can be applied with a high
degree of accuracy.
DC Biasing for BJTs
• Approximate Analysis
• Once VB is determined, then:
• Note in the sequence of calculations that β does not appear

and IB was not calculated.
• The Q-point (as determined by ICQ and VCEQ) is therefore

independent of the value of β which increases the stability.
DC Biasing for BJTs
• Approximate Analysis-
• Example 4.9: solve example 4.8 using approximate
method:
Start by testing the condition:
Then,

DC Biasing for BJTs
• Approximate Analysis-solution of Example 4.9-continue:

DC Biasing for BJTs
Effect of β:
Example 4.10: Repeat example 4.8 if β reduced to 50 and compare
solutions of ICQ and VCEQ

DC Biasing for BJTs
Effect of β:
Example 4.10: Repeat example 4.8 if β reduced to 50 and compare
solutions of ICQ and VCEQ
• The results clearly show the relative insensitivity of the circuit to the
change in β.
• Even though β is drastically cut in half, the levels of ICQ and VCEQ are
essentially the same.

DC Biasing for BJTs
Effect of β:
Notice that:
1. In Fixed-bias configuration when beta decreased from 100 to 50, ICQ decreased from 4.71 mA to 2.35
mA ( a change of 100%), and an increase of VCEQ form1.64 to 6.83 V( a change of over 300%).
2. In Emitter-stabilized bias configuration when beta decreased from 100 to 50, ICQ decreased from 3.63
mA to 2.01 mA( a change of 81%), and an increase of VCEQ form9.11 to 13.97 V( a change of over 35%).
3. For Voltage divider configuration for same decrease in beta , ICQ only decreased from 0.84 mA to 0.81
mA. And VCEQ only changed from12.34 V to 12.69 V( a change of less than 3%)
4. Very good improvement of Q-point stability after using voltage divider bias configuration.

DC Biasing for BJTs
Example 4.11:
Determine ICQ and VCEQ for the circuit shown in Fig.4.37 using the exact and approximate methods and
compare the solutions.

DC Biasing for BJTs
Example 4.11-Solution:
Exact Analysis:

DC Biasing for BJTs
Example 4.11-Solution:
Approximate Analysis:
Test:
Which means that we can’t apply approximate method.

To compare with the results from Exact method:
Notice that we can’t ignore the difference between

the exact and approximate method in this example,
which ensure that we can’t apply approximation
DC Biasing for BJTs
Load-Line analysis

DC Biasing for BJTs
Load-Line analysis

DC Biasing for BJTs
Collector Feedback Configuration
• An improved level of stability can be obtained by introducing a feedback path from collector to base.
• The sensitivity to changes in beta or temperature variations is normally less than encountered for the
fixed-bias or emitter-biased configurations.

DC Biasing for BJTs
Base–Emitter Loop • KVL on emitter loop:
-VCC+RCI’C+IBRB+VBE+REIE=0
• The current through RC is not IC but I’C (where I’C=IC+IB).
• The level of IC and I’C far exceeds the usual level of IB and the
approximation IC =~ I’C is normally employed.
• Substituting IC =~ I’C =βIB and IE=~IC then,
-VCC+RC βIB +IBRB+VBE+RE βIB =0 then,
• In general, therefore, the feedback path results in a reflection of the

resistance RC back to the input circuit, much like the reflection of RE.

DC Biasing for BJTs
Base–Emitter Loop • The equation of IB is like:
• Where V’=VCC-VBE and R’=RC+RE

• Since IC=βIB then,
• The larger of βR’ compared to RB, the less the sensitivity of ICQ to
variations in beta. Obviously, βR’ >>RB and RB+ βR’ =~ βR’ then,
• Then ICQ is independent of β

DC Biasing for BJTs
Collector–Emitter Loop

DC Biasing for BJTs
Example 4.12: Determine the quiescent levels of ICQ and VCEQ for the network of Fig. 4.37.

DC Biasing for BJTs
Example 4.12: Determine the quiescent levels of ICQ and VCEQ for the network of Fig. 4.37.

DC Biasing for BJTs
Example 4.12: Repeat Example 4.11 using a beta of 135

DC Biasing for BJTs

DC Biasing for BJTs
• Even though the level of beta increased by

50%, the level of ICQ only increased by 12.1%
while the level of VCEQ decreased about 20.9%.
• If the network were a fixed-bias design, a 50%

increase in beta would have resulted in a 50%
increase in ICQ and a dramatic change in the
location of the Q-point.

DC Biasing for BJTs
Example 4.13: Determine the dc level of IB and VC for the network of Fig. 4.38.
Solution: Notice here RB=R1+R2

DC Biasing for BJTs
Example 4.13: Determine the dc level of IB and VC for the network of Fig. 4.38.
Solution: Notice here RB=R1+R2

DC Biasing for BJTs
Saturation conditions
• Using the approximation IC =I’C, the equation for the saturation current
is the same as obtained for the voltage-divider and emitter-bias
configurations. That is,
Load-Line Analysis
• Assuming IC=I’C will result in the same load line defined for the
voltage-divider and emitter-biased configurations.
• The level of IBQ will be defined by the chosen bias configuration.

DC Biasing for BJTs
Emitter Follower Configuration (Common collector)
• Find IE and VCEQ for the circuit shown in the following Figure:
DC-equivalent circuit KVL-input loop:

RBIB+VBE+REIE-VEE=0
Using IE=(β+1)IB
RBIB+VBE+RE(β+1)IB -VEE=0, then:
IE=(β+1)IB
KVL-output loop:
+VCE+REIE-VEE=0
VCE=VEE-REIE
DC Biasing for BJTs
• Find IC and VCBQ for the circuit shown in the output-loop:

following Figure: Input-loop:
KVL Input-loop: KVL output-loop:

+VEE-REIE-VBE=0 -VCC+RCIC+VCB=0
VCB=VCC-RCIC

DC Biasing for BJTs
MISCELLANEOUS BIAS
CONFIGURATIONS
a-
• For the network shown:
• a- Find ICQ and VCEQ.
• b- Find VB, VC, VE, and VBC
b-

DC Biasing for BJTs
MISCELLANEOUS BIAS
CONFIGURATIONS
• KVL-input loop
• For the network shown: Find VB and VC

DC Biasing for BJTs
MISCELLANEOUS BIAS
CONFIGURATIONS

DC Biasing for BJTs
MISCELLANEOUS BIAS
CONFIGURATIONS
Find ETh
• For the network shown: Find VB and VC Find RTh

DC Biasing for BJTs
MISCELLANEOUS BIAS
CONFIGURATIONS
• For the network shown: Find VB and VC Redraw input-side

DC Biasing for BJTs
MISCELLANEOUS BIAS
CONFIGURATIONS

DC Biasing for BJTs
MISCELLANEOUS BIAS
CONFIGURATIONS

DC Biasing for BJTs
Design Operations
Example 1:Given the device characteristics of the following figure (a), determine VCC, RB, and RC for the
fixed bias configuration of Figure (b).

DC Biasing for BJTs
Design Operations
Example 1:Given the device characteristics of the following figure (a), determine VCC, RB, and RC for the fixed bias
configuration of Figure (b).

DC Biasing for BJTs
Design Operations
Example 2:Given that ICQ=2 mA and VCEQ= 10 V, determine R1 and RC for the network of the shown figure.

DC Biasing for BJTs
Design Operations
Example 2:Given that ICQ=2 mA and VCEQ= 10 V, determine R1 and RC for the network of the shown figure.

DC Biasing for BJTs
Design Operations
Example 3:The emitter-bias configuration of the following Solution:
figure has the following specifications: ICQ= ½ICsat, ICsat= 8
mA, VC =18 V, and β=110. Determine RC, RE, and RB.

DC Biasing for BJTs
Design Operations
Example 3:The emitter-bias configuration of the
following figure has the following specifications: ICQ= Solution-continue:
½ICsat, ICsat= 8 mA, VC =18 V, and β=110. Determine
RC, RE, and RB.
Standard values:

DC Biasing for BJTs
Design Operations
Example 4:Determine the resistor values for the network of
the following figure for the indicated operating point and
1
supply voltage. Assume VE=10VCC

DC Biasing for BJTs
Design Operations
Example 4-solution:

DC Biasing for BJTs
Design Operations
Example 5:Determine the levels of RC, RE, R1, and R2 for the
network shown for the operating point indicated.
1
Assume VE= VCC
10

DC Biasing for BJTs
Design Operations
Example 5-solution:Determine the levels of RC, RE, R1, and R2 for the
network shown for the operating point indicated.

DC Biasing for BJTs
Design Operations
Example 5-solution:Determine the levels of RC, RE, R1, and R2 for the network shown for the operating
point indicated.

DC Biasing for BJTs
Design Operations
Example 5-solution-continue:Determine the levels of RC, RE, R1, and R2
for the network shown for the operating point indicated.

Transistor Switching Networks
• The level of IB in the active region just before saturation results can be approximated by the following equation:
• For the saturation level we must therefore ensure that the following condition is satisfied:
• Suppose vi=5 V for the network shown in Fig.(a):
vi
then, condition of saturation is satisfied

• Suppose vi=0 V for the network shown in Fig.(a), then the transistor is in cutoff,
IB=0 µA, so IC=ICEO≅ 0 mA

Transistor Switching Network

Example 6:

Example 7: Determine RB and RC for the transistor inverter of the following figure if ICsat =10 mA.



• The total time required for the transistor to switch from the
“off” to the “on” state is designated as ton and defined by:
ton= tr+td
• td is the delay time between the changing state of the input
and the beginning of a response at the output.
• The time element tr is the rise time from 10% to 90% of the
final value.
• The total time required for a transistor to switch from the
“on” to the “off” state is referred to as toff and is defined by:
toff= ts+tf
• ts is the storage time and tf is the fall time from 90% to 10%
of the initial value.

Logic gates
AND-Gate

Logic gates
NAND-Gate

Logic gates
OR-Gate

pnp Transistors
KVL-input loop:
+VCC –RBIB +VBE- REIE=0
IE= (β+1)IB
(
KVL-output loop:
+VCC- ICRc+ VCE – IERE=0
VCE=-VCC+RCIC+IERE
IC≅ IE
VCE=-VCC+ IC (RC+RE)
pnp Transistors
Example: Determine VCE for the voltage-divider bias configuration of the following figure:

pnp Transistors

pnp Transistors

pnp Transistors
Example: Determine IE and VC for the network shown:

BJT Transistor Modeling
• Remember: BJT transistor amplifiers are referred to as current-controlled devices.
• A model is the combination of circuit elements that best approximates the actual behavior of a
semiconductor device under specific operating conditions.
• A model approximates the circuit elements that represents the ac characteristics of the transistor.
• Two models are commonly used for small signal AC-analysis of a transistor:
1. re model
2. hybrid equivalent model
We use re model in this class
• Each circuit to analyze in AC better be converted to two ports system( input port and output port).
• Once the ac equivalent circuit is determined, the graphical symbol of the device can be replaced in the
schematic by the equivalent circuit and the basic methods of ac circuit analysis (mesh analysis, nodal
analysis, and Thévenin’s theorem) can be applied to determine the response of the circuit.

Two Ports System
• The main importat parameters to analyze are: Zi, Zo, Av, Ai

Two Ports System: Input Impedance
• For the input side, the input impedance Zi is defined by Ohm’s law as the following:
𝑉𝑖
𝑍𝑖 =
𝐼 𝑖
• For small-signal analysis, once the input impedance has been determined the same numerical value
can be used for changing levels of applied signal.
i.e. If the input signal Vi is changed, the current Ii can be computed using the same level of input
impedance.

Two Ports System: Output Impedance
• The output impedance is determined at the output terminals looking back into the system with the
applied signal set to zero.
𝑉𝑜
𝑍𝑜 = , at the condition of making Vi=0
𝐼𝑜

BJT Transistor Modeling (Av)
Two Ports System: Voltage Gain
• One of the most important characteristics of an amplifier is the small-signal ac voltage gain as
determined by
𝑉
𝐴𝑣 = 𝑜 ,
𝑉𝑖
𝑉𝑜
• 𝐴𝑣𝑛𝐿 = , when RL=∞ Ω (open circuit)
𝑉𝑖

BJT Transistor Modeling (Av)
Two Ports System: Current Gain
• One of the most important characteristics of an amplifier is the small-signal ac current gain as
determined by
𝐼
𝐴𝑖 = 𝑜 ,
𝐼𝑖
𝑍𝑖
• 𝐴𝑖 =- 𝐴𝑣 ,
𝑅𝐿

The ac equivalent of a network is obtained by:
1. Setting all dc sources to zero and replacing them by a short-circuit equivalent
2. Replacing all capacitors by a short-circuit equivalent
3. Removing all elements bypassed by the short-circuit equivalents introduced by steps

1 and 2.
4. Redrawing the network in a more convenient and logical form

Remove dc supplies (deactivate them) and

Example: Voltage divider circuit
replace capacitors by short circuit


The re Transistor Model: Common Base Configuration
pnp
• The model for npn BJT is similar with opposite current direction.
• Looking from input side : emitter to base is like a pn junction diode.
• The output side has the current Ic that can be represented as a dependent current source of a current
Ic depends on Ie , where Ic=αIe

pnp
• The ac resistance of a diode can be determined by the equation rac= 26 mV/ID, where ID is the dc
current through the diode at the Q (quiescent) point. This same equation can be used to find the ac
resistance of the diode of Fig.b if we simply substitute the emitter current as follows: re= 26 mV/IE
• The subscript e of re was chosen to emphasize that it is the dc level of emitter current.

• Looking to the input to ground : Zin=re

• For the common-base configuration, typical values of Zi range from a few ohms to a maximum of about
50 Ω.
• For the output impedance, if we set the input signal to zero, then Ie=0 mA and Ic=0 mA), resulting in an
open-circuit equivalence at the output terminals. Then, Zo≅ ∞
• For the common-base configuration, typical values of Zo are in the megohm range.

• Remember IV curve for CB-configuration.
• In general, for the common-base configuration the input impedance is relatively small
and the output impedance quite high.

• The voltage gain can be determined by the following steps:
• The current gain can be determined by:

The re Transistor Model: Common Emitter Configuration
• Looking to the input side:
1. the input terminals are B and E,
2. The input current is Ib
3. The input voltage is Vbe
4. the current Ie flows in the emitter terminal
5. The input side (base to emitter) is simply a pn junction diode.
• Looking to the output side: the output current is Ic, where Ic=βIb

To convert to two-ports system:

Looking from base terminal to ground,
Iin=Ib, then:
• That means: a resistive element in the

Remember: re=26mV/IE emitter leg is reflected into the input
circuit by a multiplying factor of β
• Common range of beta is (50-200)

Two ports equivalent system
• For the common-emitter configuration, typical values of Zi defined by βre range from a few hundred
ohms to the kilohm range, with maximums of about 6–7 kΩ.

• Note that the slope of the curves increases with increase in collector current. The steeper the slope,
the less the level of output impedance (Zo).
• Zo=Vo/Io when Vi=0, if Vi=0 , then Ib= Iin=0 so Ic=0 and Zo=ro
• For the common-emitter configuration, typical values of Zo are in the range of 40 to 50 kΩ.
• Let’s assume there is RL parallel with ro and ro>>RL i.e we can neglect the
contribution of ro(assume ro=∞ then:
• Vo= -IoRL
• Io=βIb, then Vo= -βIbRL
• Vi=Ib βre
• Av=Vo/Vi
• Av=-βIbRL/Ib βre
• Av=-RL/re, negative sign indicates that Vi and Vo are out of phase by 180°

BJT Small-Signal Analysis
Common Emitter Fixed-Bias Configuration
• Analyze the following circuit(a) to find Zi , Zo, Av, and Ai
Remember: deactivate all dc-

sources and make all capacitors
short, and remove all bypassed
elements.
(a)
(b)


• Remember: we need to find re from the dc-biasing first: re=26 mV/IE

• β and ro usually given from the specification sheet ( ro=∞ in this class)

• Zi
• Zi= RB//βre

• Zo
• Zo=Vo/Io when Vi=0, Ii=0 and the current source

becomes open circuit as shown to the right :
then: ZO=ro//RC≅ Rc

• Av
• Vo=-IoZo=-IoRc
• Io=Ic, Vo=-IcRc=-βIbRc
• Vi=βreIb
• Av=Vo/Vi=-βIbRc/βreIb
• Av=-Rc/re, phase shift=180°
• Ai

• Ai
phase shift=0°
Remember we can use the following equation directly:





Voltage Divider Bias Configuration



or

Common Emitter Bias Configuration(Unbypassed)

• The input impedance looking into the network to

the right of RB is Zb :
• Since RE>>re:
• Then:

• Zo: With Vi set to zero, Ib=0 and βIb can be

replaced by an open-circuit equivalent:
Zo=RC
• Av:

• Av:

• Ai: The magnitude of RB is often too close to Zb to

permit the approximation Ib=Ii.
• Applying the current-divider rule to the input circuit

will result in


Common Emitter Bias Configuration(bypassed)
It is similar to Fixed bias configuration AC-

analysis
RE

Common Collector Configuration ( Emitter Follower)

Zi:

Zo is best described by first writing the

equation for the current Ib:

• From the equation of Ie we can construct the following network:
• To determine Zo, Vi is set to zero and:
• Since RE >>re, the following approximation is often applied:

• Av
• Since RE >>re

• Ai:

Think about this Think about this



• Av
Phase shift=0

• Ai: assuming RE>>re


• Zi: Since βIb >>I’:

• Zi:follow Collector Feedback Configuration

• Zo: making Vi=0, Ii=0, then current source is open,
• βre will be shorted

• Av:

• Ai:

• Ai:

Collector DC-Feedback Configuration

Zi:
Zo:

Av:
𝑅′ 𝑟𝑜 \\𝑅𝐹2 \\𝑅𝐶
Then, Av=- = − ,
𝑟𝑒 𝑟𝑒

A i:
• for the input side :
• For the output side:

Ai:

Extra Examples
Example 1:
1. For the circuit shown, if VEE=-25 V: Find IC, VCE
2. Find Zin , Zo, Av
ZO

Extra Examples
Example 1:
1. For the circuit shown, if VEE=-25 V, and VCC=16 V: Test the validity of approximation:
Find IC, VCE βRE=100 kΩ
2. Find Zin , Zo, Av DC-Analysis
10R2=200 kΩ
βRE<10R2 that means approximation is
invalid,
So you must use Exact method(Find Rth,
ZO Vth):
Rth=20k//20k=10 kΩ
Vth=-25*20k/40k=-12.5 V
Plot new equivalent circuit to find IB:

Extra Examples
Example 1:
1. For the circuit shown, if VEE=-25 V, and
VCC=16 V: Find IC, VCE DC-Analysis
KVL on input loop:
2. Find Zin , Zo, Av 12.5+10k*IB+0.7+1k(101)*IB-25=0
IB=(25-12.5-0.7)/(10k+101k)
IB=0.106 µA
IC=100*IB=10.63 mA
ZO

Extra Examples
Example 1:
1. For the circuit shown, if VEE=-25 V, and VCC=16 V:
VCE:
Find IC, VCE
2. Find Zin , Zo, Av DC-Analysis KVL on output loop:
-16+2kIE+VCE-25=0
VCE=25+16-2k*10.63m=19.74 V
ZO IE=~IC=10.63 mA
re=26m/10.63mA=2.45 Ω

Extra Examples
Example 1:
Find IC, VCE
2. Find Zin , Zo, Av AC-Analysis
ZO

Extra Examples
Example 1:
Find IC, VCE
2. Find Zin , Zo, Av, Vo when Vin=5mV sin20t AC-Analysis
Zin=20k//20k//βre =10k//100*2.45=10k//0.245k=239.14 Ω
Zo=1k//2k=666.67Ω
Av=-(1k//2k)/re=-666.67/2.45=-272.11
ZO Vo=5mVsin20t*-272.11=-1.36sin20t
ZO
Zin

Extra Examples
Example 2:
1) If AV=200, what is the value of V1 in (V)?
2) If AV=200, what is the value of Zo?
3) If AV=200, what is the value of the input impedance (Zi) in (Ω)?
4) ) If V1= 10 V, what is the value of VBC in (V)?

Extra Examples
Example 2:
DC-Analysis

Extra Examples
Example 2:
AC-Analysis

Extra Examples
Example 2:
Solution:
1)
Common base configuration:
Av=Rc/re=200
re=Rc/200=1.4k/200=7 Ω
re=26mV/IE
IE=26mV/re=26 mV/7=3.71 mA
KVL(input loop): -V1+1k*3.71 mA+0.7+50k*3.71 mA/50=0
V1=3.71+0.7+3.71=8.12 V
2) Zo=1.4 kΩ
3) Zi=RE//re=6.81 Ω

Extra Examples
Example 2:
Solution:
4) KVL (input loop) :
-10+1k*(50)IB+0.7+50kIB=0
IB=(10-0.7)/(50k+50k)=
IB=93 µA
IC=49*93 µA =4.557 mA
Output loop:
VB=50k*93µA=4.65 V
VC=1.4k*4.557mA-12=-5.62 V
VBC=4.65+5.62= 10.27 V

Field Effect Transistors

FETs vs. BJTs
Similarities:
• Three terminals devices with one terminal is capable of controlling the current between
the other two terminals.
• Amplifiers
• Switching devices
• Impedance matching circuits
Differences:
1. FETs are voltage-controlled devices. ID is a function of VGS.
BJTs are current controlled devices. IC is a function of IB.
2. FETs have a higher input impedance at the level of 1M Ω to 100M Ω .

BJTs have higher gains.
3. FETs are less sensitive to temperature variations and are more easily integrated on ICs.
FETs vs. BJTs
Differences:
4. FETs are smaller in construction.
5. BJT: much higher sensitivity to changes in the applied signal(since it has higher gain).
6. npn and pnp BJT, but n-channel and p-channel FET
7. FETs are unipolar: only electrons (n-channel) or holes(p-channels) control the

conduction.
BJTs are bipolar: both electrons and holes control the conduction level

•

• Note that the depletion region is wider
near the top of both p type materials.
• Assuming a uniform resistance in the

n-channel, the resistance of the
channel can be broken down to the
divisions appearing in the Figure to the
right.
• The current ID will establish the voltage

levels through the channel as indicated
on the same figure.
Varying reverse-bias potentials across the
p-n junction of an n-channel JFET.
• The result is that the upper region of the p-type
material will be reverse biased by about 1.5 V,
with the lower region only reverse-biased by
0.5 V.
• Remember from the diode operation that the

greater the applied reverse bias, the wider the
depletion region.
• The fact that the p-n junction is reverse-biased

for the length of the channel results in a gate
current of zero amperes as shown in the same
figure.
Varying reverse-bias potentials across the
• The fact that IG =0 A is an important p-n junction of an n-channel JFET.
characteristic of the JFET.
JFET Operating Characteristics: Saturation
At the pinch-off point:

• Any further increase in VDS doesn’t
produce any increase in ID.
• VDS at pinch-off is denoted as Vp
• ID will be equal to IDSS (drain to

source current at saturation level) at
VDS>=Vp

JFET Operating Characteristics: Saturation
At the pinch-off point:
• The JFET will behave as a current

source with fixed current of ID=IDSS,
but VDS>Vp is determined by the
applied load.
• The ohmic value of the channel is

maximum.

On most specification sheets the pinch-off voltage is specified as VGS(off) rather than VP

Ohmic region can be used for an automatic gain
Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition control system
When VGS=Vp

ID
ID

Fig.5.14
• Normally: IDSS and VP or VGS(off) are given in the datasheet.
• Max power or current
• VDSmax and so on

There is no direct electrical connection between the gate terminal and the channel of a MOSFET.
It is the insulating layer of SiO2 in the MOSFET construction that accounts

for the very desirable high input impedance of the device.

Change in channel and depletion region
with increasing level of VDS for a fixed
value of VGS.

Summery
JFET
D-type MOSFET E-type MOSFET

Type VGS Vp VDS IDS
JFET n <0 <0 >0 2

𝑉𝐺𝑆
𝐼𝐷𝑆𝑆 1−
𝑉𝑝
p >0 >0 <0 2
𝑉𝐺𝑆
𝑉𝑝
MOSFET-depletion mode n <0 <0 >0 2
𝑉𝐺𝑆
𝑉𝑝
p >0 >0 <0 2
𝑉𝐺𝑆
𝑉𝑝
MOSFET-enhancement n >0 <0 >0 2
𝑉𝐺𝑆
mode 𝐼𝐷𝑆𝑆 1−
𝑉𝑝
p <0 >0 <0 2
𝑉𝐺𝑆
𝑉𝑝
2
E-type n >0 Vth>0 >0 𝑘 𝑉𝐺𝑆 − 𝑉𝑡ℎ
MOSFET p <0 Vth<0 <0 𝑘 𝑉𝐺𝑆 − 𝑉𝑡ℎ 2

General Amplifiers Configurations
• BJT amplifiers: FET Amplifiers:

Common Base (Av>0, phase=0) Common Gate (Av>0, phase=0)
Common Emitter (Av<0, phase=180) Common Source(Av<0, phase=180)
Common Collector (Av<=1, phase=0) Common Drain (Av<=1, phase=0)

Fixed-Bias Configuration

• The zero voltage drop across RG permit

replacing RG by short circuit.
• VGS is fixed quantity (-VGG) hence the
name fixed-bias)

• Graphical analysis: we need to plot the Transfer characteristics curve:
• The fixed level of VGS has been superimposed as a vertical line at VGS= -VGG.
• At any point on the vertical line, the level of VGS is -VGG
• The level of ID must simply be determined on this vertical line.
• The point where the two curves intersect is the operating point or Q-point (ID,
VGS).

• The drain-to-source voltage of the output section can be determined by

applying Kirchhoff’s voltage law in the output loop as follows:

Self-Bias Configuration
• The self-bias configuration eliminates the need for two dc supplies.

• The controlling gate-to-source voltage is now determined by the voltage across a
resistor RS introduced in the source leg of the configuration


• The current through RS is the source current IS, but IS=ID and:
VRS =IDRS
• Note in this case that VGS is a function of the output current ID and not
fixed in magnitude as occurred for the fixed-bias configuration.

• A mathematical solution could be obtained simply by substituting into

Shockley’s equation as shown below:
• By performing the squaring process indicated and rearranging terms, an

equation of the following form can be obtained:
• The quadratic equation can then be solved for the appropriate solution for
ID.

• The drain-to-source voltage of the output section can be determined by
applying Kirchhoff’s voltage law in the output loop as follows:

Graphical Approach:
• Draw a straight line between the two points. The most obvious
condition to apply is ID =0 A since it results in VGS=-IDRS = 0 V.
• A second point can be chosen by assuming either ID or VGS and
find the other:


Effect of changing RS:

Examples
Example 1: determine VGSQ, IDQ, VDS, VD, VG, VS for the following circuit:

Examples

Examples

Examples

Examples

Examples

Examples

Examples
Example 3: Find the quiescent point for the network shown if:
(a) RS=100 Ω.
(b) RS=10 kΩ.
(a)
(b)

Examples
Example 4: determine VGSQ, IDQ, VDS

Examples

Examples

Examples

Examples

Examples
Example 5: Repeat Example 4 with RS=150 Ω.determine VGSQ, IDQ, VDS

Examples
Example 5: Repeat Example 4 with RS=150 Ω.determine VGSQ, IDQ, VDS

Examples
, ID=IDSS

Examples

Examples

Examples

Examples

Combinational Networks







Design
Example 8: determine RD and RS for the network shown to achieve the Q-point
shown in the transfer curve :

Design
Example 8: determine RD and RS for the network shown to achieve the Q-point
shown in the transfer curve :

Design
Example 9: determine RD and VDD for the network shown if: VDS=1/2 VDD, ID=ID(on),
VGS=VGS(on)

Design
Example 9: determine RD and VDD for the network shown if: VDS=1/2 VDD, ID=ID(on),
VGS=VGS(on)

FET Amplifiers

• In the specification sheet gm is given as yfs
• The unit of gm is S and the range for JFET is between (1000 to 5000)µS
Plotting gm vs. VGS

Plotting gm vs. ID

Zo: Setting Vi =0 V as required by the definition of Zo will establish Vgs as 0 V also.
The result is gmVgs=0 mA, and the current source can be replaced by an open-circuit
equivalent.

Voltage Gain (Av)

bypassed

Un-bypassed

Un-bypassed

Un-bypassed

• Setting Vi=0 V will result in the gate
terminal being connected directly to
ground.
• The fact that Vgs and Vo are across the
same parallel network results in Vo= -Vgs.

Voltage Gain

Common Gate Circuit
Applying KVL around the output perimeter of the network:

Common Gate Circuit

Common Gate Circuit

Zi: Applying Kirchhoff’s current law to the output circuit (at node D)

Voltage gain:

DESIGNING FET AMPLIFIER NETWORKS
Example1: Design the fixed-bias network shown to have an ac gain of 10. That is, determine the value of
RD.

RD.

RD.
The closest standard value is 2 kΩ

RD.

Example2: Choose the values of RD and RS for the network shown that will result in a gain
of 8 using a relatively high level of gm for this device defined at VGSQ=0.25VP.




Example 1
Examples
Example 1-solution Examples
Examples
Example 2
Example 3
Examples
Zi=RG
Examples
Example 4
Examples
Example 4
Examples
Example 5
Examples
Example 5
Examples
Example 6
Examples
Example 6

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ELE250

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

• It is the simplest of semiconductor devices but plays a very vital role in

• The diode has characteristics that closely match those of a simple

• It has a range of applications, extending from the simple to the very

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

(a) Conduction and (b) nonconduction states of the ideal

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

• An insulator is a material that offers a very low level of conductivity

• A semiconductor, therefore, is a material that has a conductivity

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Defining the metric units of resistivity.

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

1. low impurity levels are really necessary.

• One complete pattern is called a crystal and the periodic arrangement of

• For Ge and Si the crystal has the three-dimensional diamond structure of

• Any material composed solely of repeating crystal structures of the same

• For semiconductor materials of practical application in the electronics

• The Bohr models of the two most commonly used semiconductors,

• The germanium atom has 32 orbiting electrons, while silicon has 14

• In each case, there are 4 electrons in the outermost (valence) shell.

• The potential (ionization potential) required to remove any one of these 4

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

• Both Ge and Si are referred to as tetravalent atoms

• Covalent bonding is a bonding of atoms,

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

• An increase in temperature of a semiconductor can result in a substantial increase in

• Semiconductor materials such as Ge and Si that show a reduction in resistance with

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

• Ionization is the mechanism whereby an electron can absorb sufficient energy to

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

• There are two extrinsic materials of immeasurable importance to semiconductor

Effect of donor impurities on the energy band

Antimony impurity in n-type material. Boron impurity in p-type material.

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition p n

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

• The equation above is called: Shockley’s equation

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

• The reverse-bias potential that results in a dramatic change in the

• Avalanche breakdown: As the voltage across the diode increases in the

• Although the Zener breakdown mechanism is a significant

• The maximum reverse-bias potential that can be applied before

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

• As the temperature increases the

• The reverse saturation current Is will

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

rB represents the semiconductor material

• As with the dc and ac resistance levels, the lower the

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition

Ref.Electronic Devices and Circuit Theory-Robert Boylestad-Louis Nashelsky 7th edition