Model VP-7722P and VP-7722A are identical except indication of "A"

or "P".

The model name VP-7722P a ppears in manual should be read as VP-7722A.

A U D I 0 A N A L Y Z E R

------
- ------------------ --- ---
- - -- ------- - -----

V P - 7 7 2 2 A

----
--- ---- ------ ----
-- ------------
--- ---- ------

S E R V I C E H A N U A L

Matsushita Communication
lnO..strial Co., Ltd.
4-3-1, Tsunashima·Higashl
Kohol<u·ku, Yokohama, Japan
Tel: (045) 531·1231 Printe d in Japan
l T-' 3822·671
 VP- 7 7 22P 3-1

3. CIRCUIT DESCRIPTION

3.1 POWER SUPPLY A4

Three power supply systems are installed , those are , for the digital
� ·

circuit , oscillator , and analyzer .

3.1.l Power supply for the digital circuit

�

Three types of AC power are supplied from the secondary of power trans-
former Tl , which are used for the +SV ( A ) , +SV ( B ) and -SV power supplie s .
The +SV ( A ) power supply i s rectified b y diode CRl ( S30SC4F) and i s supplied
to the smoothing capacitors Cll through Cl4. The power supply after
smoothing is fed to the regulator composed of Ul2 (NJM2930-S) and Ql

...
( 2SB1055 ) . The regulated power is supplied to the digital circuit via
connectors P21 , J76 , J21 , and P76 .

The same smoothing capacitors for the +SV ( A ) power supply are used for
the +SV (B) and the power is regulated by the regulator composed of Ull
(NJM2930-5) and Q 2 ( 2SB1055) . The regulated +SV ( B ) power supply is f e d to
the digital circuit via connectors J76 and P76 .

The -SV power supply is rectified by diodes CRll and CR 1 2 (V06B) and fed
to the smoothing capacitors C23 and C24 . The smoothed power is fed to the
regulator circuit of U l 2 ( NJM790SA ) , then supplied to the digital circuit as
•,'·t

the regulated -SV power via connectors J76 , P21 , P76 and J21 .

Each power supply circuit has a 3-pin regulator and the common is shown
..__/ with ..,f, , which is connected to the chass i s .

3 .1 . 2 Power supply f o r the oscillator

One AC power system from the secondary of power transformer Tl is fed to
the power supply for the oscillator . The power is rectified by diode CR1 7
(S 2VB10F ) . The position ( + ) side i s smoothed by capacitor C65 , while the
neg ative ( - ) side is smoothed by capacitor C67.

The +24V power supply is fed from smoothing capacitor C65 to the
re gulat or circuit of u l 6 ( NJM78M24A) . The regulator +24V power supply is fed
to the oscillator circuit via connector J21 and P21 .
VP-7722P 3-2 v

The -24V power supply is fed from smoothing capacitor C67 to the
regulator circuit of Ul7 ( NJM79M24A). The regulated -24V power supply is fed r
to the oscillator circuit via connector J21 and P2 1 .

The +lSV power supply is fed from the regulated +24V output to the d
regulator circuit composed of Ul8 ( NJM78Ml2A ) , U20 (NJM4558 1 / 2 ) and VR12 t
(RD6. 2EB2 ).The regulated +lSV power supply is fed to the oscillator � circuit
via connectors J 2 1 and P21 . The VR1 2 is a Zener diode for the reference
voltage and is connected to pin 5 of U20. The +lSV is divided by resistors a

R43 through R45 and the divided voltage i s fed to pin 6 o f U20. The voltage i

dif ference between pins 5 and 6 of U20 is amplified , then fed from output pin
7 to the GND pin of Ul8 to make the Ul8 output voltage to a constant level at
+ 1 5 v. p

The -lSV power supply i s fed from the regulated -24V output to the
regulator composed o f Ul9 ( NJM79Ml 2A) and U20 ( NJM4558 1 / 2 ) . The regulated
-lSV is supplied to the oscillator circuit via connectors J 2 1 and P21 . The
common reference voltage i s supplied to pin 3 o f U20 . The voltage difference
between +lSV and -lSV is divided by resistors R47 and R48 , fed to pin 2,
amplified by U20 , and fed t o the GND pin o f U 1 9 so that the U19 output
voltage is a constant level at - 1 5 V .

The c ommon is shown with � , which is floated from the chassis by a

resistor R285 ( AS ) . The +SV for the digital circuit is used as the power
supply for relays in the oscillator circuit .

3.1.3 Power supply for the analyzer

Two power supply systems are connected to the analyzer section from the
secondary of power $Upply transformer Tl , and are used as +lSV ·(A) , -l SV ( A )
and +SV ( A ) power suppli e s . The ±lSV power supplies are rectified by CR16
(SVBlOF) and the +lSV i s smoothed by CSl while the -lSV, by CSS .

The +lSV ( A ) power supply i s fed to the regulator composed of Qll through
Ql3 , UlS ( NJM4558 1 / 2 ) and VRll (RD6 . 2EB2 ) . The regulated +lSV ( A ) power
supply is fed to the analyzer circuit via connectors J21 and P21. · VRll is
the Zener diode for the reference voltage . UlS i s the differential amplifier
who controls the series regulator composed o f transistors Qll through Q 1 3 .
 VP- 7722P 3-3

The - lSV (A) power supply is fed from smoothing capacitor CSS to the
r egulator composed of Q14 through Q16 and U lS ( NJM4558 1 / 2 ) . The regulated
- 1 5 is supplied to the analyzer circuit via connectors J21 and P21 .
The common is used as the reference voltage for UlS. The voltage

he difference after dividing by resistors R34 and R35 is amplified to control

12 the series regulator composed of transistors Q14 through Q 1 6 .

it
72

ce The +SV ( A) power supply i s rectified by CRl S (S4VB10F ) , smoothed by C35 ,

·rs and fed to the regulator o f U14 ( SI-3052V) . The regulated +SV power supply

.ge is fed to the analyzer circuit via connectors P 2 1 and J21 •

�
1in
'
The common is shown with , which i s connected to the chassis at a
at
point on the ANALOG MPX board •

.._/

:he
:ed
rhe
1ce
2,
put

a
wer

the
(A)
:R16

rngh
)wer
is
VP-7722P 3-4

3.2 OSCILLATOR AS, A6

The oscillator is made up with the OSC A6 and ATT AS boards. The main
oscillator for the 10 Hz to 1 10 kHz oscillation is installed on the OSC
board . The amplitude of the oscillation.is controlled with the amplitude
regulator.

Onthe ATT board are the oscillator for the IMD TEST source , � mixer and
output amplitude controller .

3.2.1 OSC board A6

The main oscillator consists of the amplifier composed of transistors Ql
through Q13 , and the bridged-T RC oscillator composed of ·resistors RlO
through R37 , capacitors C l through C3 and C l l through C 1 9 .
Figure 3-1 shows the circuit diagram o f the oscillator block .

c
R R

fo
2 JtRC fil
=

Where: n i s 25.

ALC

Figure 3-1 Oscillator block

.,

VP- 7 7 22P 3-5

The br idged-T circuit is inserted in the negative feedback loop as the

in ampl ifier A. Since the signal attenuation factor of the bridged-T �ircui t ,

whe n the f r equency i s fo ZXRCll1l

SC = , is l /n, an amplification of n times is

de given to the positive feedback loop for a stable oscillation . The capacitor
shown with nC in Figure 3- 1 is switched by tenfold each time the frequency
band is changed . The resistances of resistors R are changed in small steps

nd to switch frequencies within a band. The 1 2-bi t , BCD ( binary code decimal)
'2
signal i s used for the least significant digit and the lOth digi t . The HEX
signal is used for the four more-significant digits.

Ql For a stable oscillation , the automatic level controllers are installed

to the positive feedback loop in serie s . The analog multiplier plays the
roll equivalent to the variable resistor of the automatic level controller US
(MC1 494L). The AC input level to the common-phase input of the oscillator
amplifier is controlled according to the output level of the oscillator level
detector , which will be discussed later , via the phase inversion amplifier U3
( NE5534) .

A peak detector is used as the oscillator level detecto r . The output

from oscillator is peak-detected at the track-and-hold circuit composed of
transistors Q25 through Q27 via buffer amplifier Ul2 (NJM082DT) . C59 is the
capacitor for the "hold", which is forced discharged at every cycle of the
oscillation frequency by the discharger composed of U9 (NJM31 1D), UlO
(TC4528BP), Ull (TC401 1BP) and Q28. The threshold level for the tracking
circuit is determined by the reference voltage produced by UlS (TL081) and
VRS.

The voltage held at C59 is fed to buffer amplifier U l 2 , then to sample­

and-h old circuit Ul3 ( µPC649C). The sampling timing is determined by the
timi ng circuit composed of U9 through Ull so that the peak voltage of each
cy cle of the oscillation frequency is hel d . The held voltage is supplied to
the analog multiplier as the differential voltage via the fast AGC and slow
AGC of Ul6 (NJM082DT) . The reference voltage for the AGC circuits is
determined by UlS and V RS .
VP-7722P 3-6

When the peak detection system is used , the oscillation is likely to be

stopped because of the external noise when the frequency is changed and some
time is required for restart of the oscillation. The oscillation restart
circuit composed of U7 ( NJM3 1 1D ) , U8 ( TC4S28BP ), U6 ( AN6914 ) , and transistors
Q22 and Q23 serially monitors the oscillation level and restarts the
oscillation when stopped by increasing the gain of the oscillation loop .

3. 2. 2 ATT board
The attenuator consists of 10 600n .il-type attenuators for 0 . 1 dB through
Sl . 2 dB attenuation . The combination of Kl8 through K27 allows the setting
of up to 99. 9 dB by 0 . 1 dB steps.

The bridged-T RC oscillator is used for the IMD ( inter-modulation

distortion) TEST source· as in the case of the main oscillator . The
oscillator is made of U27 ( NJM082DT) and the AGC is applied by Q38, CRIS and
CR16. The oscillation spots are SO Hz and 60 Hz , and the oscillation
frequency is switched by analog switch U26 (TL1 9 1 C ) .

U23 (NESS34) mixes the IMD TEST source and the main oscillation and the
mixing ratio is between 1 : 1 and 8 : 1. The mixing ratio is switched by analog
switch U22 (µPD4066 ) and the signal after mixing is fed to the attenuator.

The reverse power protector composed of U36 through U3 9 and K28 is

installed t o the OSC output terminal t o protect the attenuator from burning
when an excessive external power is applied.

3.3 PREAMPLIFIER A7
The identical PREAMP boards are installed; one for the L channel and the
other for the R channel. These two boards act as the input for L and R
channels. The following four functions are given to the PREAMP boards :
( 1 ) Input attenuator ( O dB through 30 dB, 1 0 dB steps)
( 2 ) Preamplifier ( amplification: 0 dB through 2 7 . S dB, level function :
10 dB steps, distortion : 2 . S dB steps)
( 3 ) Detection of input level and average value
( 4 ) Filtration for the IMD measurement
 VP-7722P 3-7

3.3. 1 Input connector A7-1

Two input connectors of A and B per a channel is installed in the input
cir cuit so that the balanced measurement can be performed. In the unbalanced
inp ut, the input A circuit alone is used . In the balanced input , the
differential signal between inputs A and B are measured.

3.3.2 Input attenuator A7-1

The input attenuator is activated when the input signal level 1 s greater
l than 3 . 1 6 Vrms . The built-in -10 dB and -20 dB attenuators are switched by
Kl and K2 for attenuation of 0 dB , -10 d B , -20 dB and -30 d B .

3.3.3 Preamplifier A7-1

The preamplifier consists of three discrete differential ampl ifiers ( A7-
e 3) converts the balanced input to the signal-ended signal. Amplifier Al
d alone i s activated for the input of unbalanced signal. The amplification
n factors of amplifiers Al and A2 can be changed between 0 dB and 2 7 . 5 dB by
2.5 dB steps by means of switching of K3 through K 6 . The input signal level
can be conditioned to 3 . 1 6 Vrms with the combination of the input attenuator
e and preamplifier by 2 . 5 dB steps ( total of 24 steps) .

This 2 . 5 dB step control is used in the distortion measurement to prevent

adversely influenced signal-to-noise ratio, but the preamplifier operates
.S with 10 dB steps in the level measurement •

tg
3.3 . 4 Average detector A7-2
The signal after the preamplif ier is fed to the average detector which
.
detects the input signal level in the DISTORTION, SINAD, THD, RATIO and
AVERAGE measurement s . The level value detected is used as the denominator
R for the ratio calculatio n . The detected DC signal is converted to the
digital data by the A/D converter in the digital circuit for the calculation
process b y the microprocessor .
n:

The detector consists of U31 ( µPC157C) and U32 ( µPC157C), and uses the
avera ge detection system. The cutoff frequency of smoothing low-pass filter
C34 (NJM082BD)is switched to two stages by U33 (TL191CN) to increase the
mea sur ement speed.
VP-7722P 3-8

3.3.5 IMD measurement filter A7-2

The output from the preamplif ier is also supplied to the IMD measurement
filter (IMD represents the inter-modulation distortion) . The IMD measurement
circuit consists of the 500 Hz high-pass filter composed of U4 and US
( NJM082BM) , the ABSOLUTE VALUE circuit of Ul , the SOO Hz low-pass filter
composed of U2 and U3 , and the 10 Hz low-pass filter of U3 . Figure 3-2 shows
the block diagram of the IMD measurement circui t . �

Numerator level

From U4 ' US Ul U2 , U3
L
.... U3
Pre amp
SOOHz ABSOLUTE SOOHz lOHz
0
HPF VALUE LPF LPF

:::>
To counter for HF measurement Denominator level

Figure 3-2 Block diagram of IMD measurement circuit

The IMD measurement circuit feeds the mixed signal of the low frequency
( SO Hz/60 Hz) and the high frequency (for example , 7 kHz) to the testing unit
and detects the inter-modulation component that appears in the dual sideband
of the high frequency signa l . See Figure 3-3 for the detection mechanism.

IMD spectrum :

efH- fl e.fH 't fl

e.tH-2fl� �
� <f>H2fl

=Jce.fH T fL -t etH -fL/-t-( efwt 2fL.-tefH-2f L)

erl
VP-7722P 3-9 /

500Hz high-pass filter output spectrum and waveform:

ABSO LUTE VALUE output waveform:

500Hz LPF output waveform ( numerator level) and lOHz LPF output waveform
( denominator level ) :

� .<:: ---s;; t Numerator level

---=--7 � __
----=: ::: _�t
Denominator level

Figure 3-3 Detection method for IMO measurement

VP-7722P 3-10

3.4 lST,. 2ND NOTCH BOARDS AS,. A9

The notch circuit ( the fundamental wave rejection filter) consists of two
stages; lst and 2nd NOTCH board s . Two-stage multiple feedback is used to
obtain wide, but steep rejection of the fundamental wav e .

3.4.1 lst NOTCH board

The lst notch filter consists of the U12 (NE5534) and the !LC circuit
composed of the automatic tuning circuit U23 and automatic balancing circuit
U21 . Analog multipliers are installed in both circuits as the variable
resistors so that the chopper of the field-effect transistor , sync detection
circuit , can yield the minimum fundamental wave rejection factor . Figure 3-4
shows the block diagram of the lst notch circuit.

inp ut ATT
u12· $ Ull $
-
lST NOTCH 2ND NOTCH
20dB
FILTER FILTER

t
40dB out put

tU18,U23 QlS
AUTOMATIC
- TUNING ITTJNE CHOPPEii

f
CIRCUIT

U18,U21 Q14
AUTOMATIC
BALANCING BALANCE
CHOPPER

f
CIRCUIT

U16,U17

90° PHASE
SHIFTER

Figure 3-4 Block diagram of lst notch circuit

vp-7722P 4.-0

4. ADJUSTMENT

Described in this section are adjustment required when faulty operation is detected or any of

electronic components is replaced.

Many of adjustment procedures described this section require servicing after removal of

covers.

WARNING

Disconnect power cable from the power source before removing the covers.

When servicing with power on, particular care must be paid to avoid personal injury, After

removing the covers with the power cable disconnected,mount the instrument on the service bench

so that the portion to be serviced is easily accessible. Then connect the power cable and turn the

power on.

EQUIPMENT REQUIRED

Equipment required for the adjustment are listed below.

Digital voltmeter VP-2660B or equivalent

Oscilloscope VP-5512A or equivalent

Differential voltmeter Fluke 931AB or equivalent

Frequency counter Frequency: lOHz to 500kHz

RC oscillator VP-7214A or equivalent

AC voltage calibrator Fluke 5100 or equivalent

6000 termination 6000 ±0.1%

Calibrated VP-7722A
VP-7722P -
I

4.1 PREPARATION
Preparations required for ad j u.s tments are as follows :

( 1 ) Turn power on and allow the instrument for warm-up for at least 30
minut e s .

( 2 ) Install all printed circuit boards t o the correct positions a s shown

in Figure 4-1.

Rear panel
r.--- Shield case --- :-i
I I
I I
A3 ANALOG MPX I I
I I
I I
I I 1
I I
I
I
fl
UJ
a:
I
>- I- I
I
....J a:

(.)
a. UJ

I
UJ

(.) (.)
a. :r :r >

I
:::> ....J a: z <C a:

(.)
(/) I- I- 0 l.L. a: LLJ

I
a. a. 0 0 a: LLJ I-

I
a: � x z z LLJ I- z

:JI: I- (.) LLJ LLJ ...... "O .......

UJ < < Cl a. I- en :::i

...... (.) I
(/) z < 0

...... C\J
I
0 I- (/) a: a: (/) c <C Cl �
a. <C 0 a. a.
c
- I
...... ...... - ...... -
C\J ('I) 'o:t Ln
'o:t Ln cc I'- I'- CD Cl I
I
< <C < < < < <C <C <C < <C <C

I
�--------------:J

�gU �� fR� up_

Front panel

board
per
Wfew
v
th mah ks include
i s s own.
adjustment controls.

Figure 4-1 PCB slots conf igurn

 7722 P 4-2

POWER SUPPLY A4
The POWER SUPPLY board consists of the following 11 sections :

Powe r suppl y for the oscil lator

± 24 V and ±15 V
30 The common side is floated from the chassis with 200 resisto r .

Power supply for the analyzer

hown ±15 V and +5 V

The commo n side is connected to the chassis.

Power supply for the digital control section

+5 V (A)t +5 V ( B ) t and -5 V
The common side is connected to the chassis .

Power supply for the fan motor

+1 2 v

The common side is connected to the chassis .

Adjustments required for the power supply are the +15 V for the oscil­
or and the +15 V for the analyzer •

• 1 OSC lSV
Connect a digital voltmeter to point 1 shown in Figure 4-2 . Adjust OSC
control R44 so that the meter reads +15 V ±100 mV •

2 ANA
f
• 15V

cont rol � so
Connec t the di ital voltmeter to point 2 shown in Figure 4-2 . Adjust
15V that the meter reads +15 V ±100 mV .
·o 1 s.

Voltage che cks

the digital voltmeter to points shown in Figure 4-2 and check

meas u red voltages satisfy the specifications listed in Table 4- 1 .
VP-7722P

@ 0:-24V
..@ : �\
,+2 v

••••••••••••••••••
••••••••••••••••••
\
Os

Ar

{j) A:+SV Che

l �
-�
�;;1.
For

.,
,. ••
••

11
HAS
0
!\� "

G
.

... I ••

l
.... I

. � "[� .J r. !l��
0 : Oscillator voltage reguretor
A: Analyzer voltage reguretor

Figure 4-2 Test points on POWER SUPPLY b9ard

 4-4
772 2P

Table 4-1 Voltage of each check point

Test point Specifications

®
®�@
24 v Within ±1000 mV
-24 v

�/osc COM
Within ±1000 mV
.--/
0
Oscillator section 15 v (D Within ±100 mV
-15 v Within ±150 mV
@
.,.
15 v Within ±100 mV
An al yz er se ct io n -1 5 v ®�® Within ±150 mV
__...-
5 v Q) ANA COM Within ±250 mV

..
... Check the power supply voltages for the digital section and the fan motor
0
'j
•
I DIGITAL MOTHER board •

�
( 1) 5 V (A) : ±250 mV or less
( 2) 5 V ( B) : ±250 mV o r less
( 3) -5 V : ±250 mV or less

�-·
(4) 12 V : ±1000 mV or less

For the power supply deviation, check the following voltages and verify
those voltages are within the specifications .
+24 v 3
A -15 V 6 Ripple voltage must be within 100 mVp- p .
A +15 V 2

MASTER BOARD Al4

80 MH z reference frequency
The adjustment procedure is as follow s :

a frequency counter t o test point TPl via an oscilloscope probe .

Connect an oscilloscope to test point TPl .

� 2 o o th. v p,f
coil L6 for the maximum amplitude (approximately 400 mVp-p) .

Adjust tr·immer
c60 for a frequency o f 80 . 0000 MHz.
1

VP-7722P p-772

4.3.2 80 MHz VCO 2) Ad

The adjustment and check procedures are as follows : is

( 1 ) Supply a 3 V , 2 kHz signal from the internal oscillato r . 3) Ch.

am

( 2 ) S e t the front panel t o THDl mode, input range to 3 . 16 V , and measure

range to 0 . 001% ( f ixed range ) .

( 3 ) Connect an oscilloscope to test point TP3 . Adjust coil L3 for - 1 . 5 V .

( 4 ) Verify that voltages measured a t test point TP3 i s between - 2 V and

when the oscillator frequency is changed between 90 kHz and 1 10 kHz .

( 5 ) Fix the coil with wax.

. 4 3
.

4.4 OSCILLATOR BOARD A6 Th(

4.4.1 Offset of oscillator amplifier

The adustment procedure is as follows : 1) Cc
elow :

( 1 ) Set the FREQUENCY of the oscillator to 400 Hz and the OUTPUT to 1 4 dB.
'
( 2 ) Connect a digital voltmeter , to the OSC OUTPUT of the VP-77 22P as sh
below. Adjust OSC OFFSET control R52 (abbreviated as OSC OST on
circuit diagram) so that the plus and minus indications of the digi
voltmeter is balanced . Digital voltmeter VP-77 22A

t 2) Set
DC mV OSC OUT

3) Adj

(3) Set the distortion control R65 to counterclockwise.

4) Con
.0119
4 . 4.2 ALC
The adjustment and check procedures are as follows :

( 1 ) Connect an oscilloscope to test point TP2 ( the U3 output ) . Set

FREQUENCY to 1 kHz and the OUTPUT to 14 dB .
 _7722 P 4-6

) Adjust ALC control R56 so that the waveform observed on the oscilloscope
is the smallest .

Change the oscillation frequency as listed in Table 4-2 and the waveform
amplitude is approximately as shown in the table •

. sur
Table 4-2 ALC amplitude limit

Oscillation frequency Test frequency Voltage at TP2 (Vp-p)

1 0 . 0 to 1 5 9 . 9 Hz 10 Hz Approx . 800 mV �I\/
0 . 1 60 to 1 . 599 KHz 1 . 5 KHz Approx. 100 mV L foe».,

�Hz.
1 . 60 to 1 5 . 99 KHz 1 . 6 KHz Approx . 500 mV
"-- 7,·
- i, C ''�

1 6 . 0 to 1 10 . 0 KHz 40 KHz Approx . 1 500 mV .:: 1 -b v'

.3 Output
The adustment and check procedures are as follows :

Connect a differential voltmeter to the OSC OUTPUT terminal as shown

ow:

1 4 dB
VP-7722A Differential voltmeter

as

Set the oscillation FREQUENCY to 400 Hz and the OUTPUT to 1 4 . 0 d B .

, o. 12; 9
G q '2; 4 -1-7)
Adjust ��TD contra R139 so that the output voltage is 1 0 . 0237 Vrms ± 1 % .
.

a 600n termination and measure the voltage. The voltage must be

±2% • ...rft/7 ./0 '1-(12f
VP-7722P

(5) Change the oscillation frequency as listed in Table 4-3 and

flatness as specified in the table .

Table 4-3 Flatness verification

With 600n termination Open termination

Test frequency Unit (Reference)
(Specification)
10.0 Within ±3% ±3%
20 . 0
159.9 Within ±0.5% ±0 . 5%
Hz
1 60
400 Reference Reference
1599
1.60
Within ±0 . 5% ±0.5%
1 5 . 99
KHz
20.0
1 10. 0 Within ±3% ±3%

4.4 . 4 Frequency check

The frequency check procedure is as follows:

(1) Connect a frequency counter to the OSC OUTPUT terminal . If a

VP-7722P i s available in addition the one to be tested, connect as
on the right. COUNTER or VP-7722P
VP-7722P
fr

I I
0 0 th·

( 2 ) Change the oscillation frequency as listed in Table 4-4 and

frequency .
Table 4-4 Frequency check

Frequency accuracy
Test frequency
(Specifications)
100 . 0 Hz Within ±3 %
1.000 KHz
Within ±2%
10.00 KHz
100 . 0 KHz Within ±3%
 4-8
722P

che A'fl'ENUATOR BOARD AS

1-�tiAA,,?
lM J) >ov-rl.e C•tv .
Lf oscill ator output for IMD test signal
t(.,-1.J.. 6 -1 r;Us>v\.
1
2 /(U t_
Th e ad justment procedure is as follows :

Connec t a differential voltmeter to test point TPl (U27 output ) .

1inatio
·ence) Adjust LF AMPTD R236 so that the level at the LF 60 Hz open termination
is 4 . 000 Vrms ± 1 % .

5%
2 Output voltage check of IMD test signal
The check procedure is as follow s :
:!nee

Terminate the OSC OUTPUT terminal with a 600n termination, then measure
the output voltage with a differential voltmeter .

Check that the measured output voltages are 1.5849 Vrms ±10% when the
I Ip c:f -fo l.7l.f.J 4-
mixing ratio N is changed from 1 : 1 to 8 : 1.

LF Frequency check of IMD test signal

The check procedure is as follow s :

Connect a frequency counter to test point TPl (U27 output ) .

122P

J
that the LF frequency is 50 Hz ±3% or 60 Hz ±3% when the LF
'

switch of the GP-IB address switch on the rear panel is set to

50 Hz or 60 Hz position.
SO Hz ±3% = 48.5 Hz to 51 . 5 Hz
60 Hz ±3% = 58.2 Hz to 6 1 . 8 Hz

LF frequ ency synchronization to line frequency

The check proce dure for the IMD test signal LF frequency synchronization
the line fre que
ncy is as fol low s :

LF frequency to 50 Hz .

Connect the
J77 on the POWER SUPPLY boa rd A4 and J52 on the ATTENUATOR
boa rd Wi th
a ca ble ( EMCB0330A56V ) .

·�'
VP-7 7 2 2P

( 3 ) Observe the waveform of test point TPl with an oscilloscope · ·and Outp1
that the triggering occures with the line frequency .

( 4 ) Remove the cable connected between. POWER SUPPLY and ATTENUATOR

Check that the waveform on the oscilloscope freerun s .
Note : The rms voltage of the composite signal such a s the IMD test
only be measured with a true rms response vol tmeter .

4.5.5 Attenuation check t

The check procedure for the attenuation factor of the attenuator
follows :
( 1 ) Set the SOURCE mode (NORM/IMD ) to NORM . PREAMPL
Offse
( 2 ) Set the oscillation frequency to 400 Hz.
Since
( 3 ) Terminate the OSC OUTPUT terminal with a 6000 termination.
digital voltmeter to the OSC OUTPUT terminal .

( 4 ) Change the output level according to Table 4-5 and check that the
level at each output level setting is within the specification. MOD
INPI
Table 4-5 Attenuation check RAN1

Attenuation factor Specification

-

1 4 . 0 dB Reference
1 3 . 9 dB 0 . 1 dB
po i n t s !
1 3 . 8 dB 0 . 2 dB
1 3 . 6 dB 0 . 4 dB
1 3 . 2 dB 0 . 8 dB
1 2 . 4 dB 1 . 6 dB ±0. 0 5 dB
AdJ
=
±0 . 5%
1 0 . 8 dB 3 . 2 dB St

7 . 6 dB 6 . 4 dB
S·
1 . 2 dB 1 2 . 8 dB
- 1 1 . 6 dB 25 . 6 dB
-37 . 2 dB 5 1 . 2 dB

Note : Accurate checking of attenuation factor should be performed wit

substitution method using a standard attenuator , but the above meth
be used in the field .
 7722?
4-10

OFF atten uator check

ind . 6 Out put
The check procedure is as follow s :

� bo Set the oscillator frequency t o 10.00 kHz , and the OUTPUT to 1 4 . 0 dB.

the AMPTD key , the - key three times

Set the output to OFF by pressing
more , and the ENTRY key .

that the output level is attenuated to -100 dB or less with a

or digit al voltmet er or a calibra ted VP-7722P.

PREAMPLIFIER ( L CHANNEL) A7
Offset adjustment of preamplifier

Since three off set t rimmers that have the same part number are
installed on the PREAMPLIFIER ( L ) board , they are called the OSTl , OST2

and OST3 as shown in Figure 4-3 .

Front panel setting s :

MODE : LEVEL
INPUT SELECTOR: L only ( R only for adjustments in Section 4 . 7 )
RANGE : 3 1 6 mV fixed range
Terminate the A and B input terminals with 600n termination s .

Adjust the offset to 0 V according to the steps and waveforms measured at

points shown in Table 4-6 .

Table 4-6 Preamplif ier ( 1 ) off set adjustment

Ad justmen t Floating
step Test point Adjustment control
selector
Step 1 Adjust to 0 VDC with OSTl
NOT FLT TPl
(R1 1 ) .
Step 2 Adjust to 0 VDC with OST2
FLT TP2
( R 1 1).
Ste p 3 Adjust to 0 VDC with OST3
FLT TP3 (R1 1 ).
VP-7722P

Tl

�
"'

;;
.

:I*:��':.:�·t===:=::1-
==:: -
.. .......-
. ...
..
1
..
(<
..
� .. 09) 9Cn.

111111111
.. 5j

. .._."' ir
"

::::::===
.. .. ""-·

......
E-t a�
(/)
0

......
0...
::E:
<

�
Q
0
::E: R7
::E:
0 th
u
t:...
;::.::

10
("")
E-<
(/)
0

("") Ad
0...
:2::
<

_J
Figure 4-3 Adjus tment controls on PREAMPLIFIER board
 4-1 2
7 722P

•2 Common r e jection ratio

The adj ustment procedure for the common rejection ratio is as follows :

Set the RANGE to 3.16 V fixed range , and the floating selector to FLT .

) Set the oscillator frequency to

::::::::...
1 kHz, and the OUTPUT to 4 . 0 dB D I I
Supply the 't
(open terminal) .
osc
L
signal simultaneously to A and B A
B
inpu t terminals of the analyzer

as shown in Fig ure 4-4.

T-branch

Figure 4-4 Adj ustment setup

an oscilloscope to test point TP3. Adjust lkHz COM MODE control
R72 so that the 1 kHz signal component is rejected and the waveform is
the smallest.

Connect a 500 kHz low distortion RC oscillator , whose output is set to

10 dB, instead of the internal oscillator of the VP-7722P.

Adjust HF COM MODE C82 so that the waveform measured at test point TP3 is
the smalles t .

A input preattenuator

The setup for the A input preattenuator adjustment is as follows :

osc VP-7722A

Open termination
J
The adJust
·
ment procedure for the A input preattenuato r is as follows :

the flo ati ng sel ect

or to NON FLT . Connect an oscilloscope to ·test
point TPl.

·'.'
VP-7722P

( 2 ) Connect a RC oscillator to the A input terminal and set its Thi

1 4 . 0 dB (10 Vrms ) .
Se!
( 3 ) Adjust controls for flatness of · waveform observed on the po:

according to steps shown in Table 4-7 .

Front panel settings : Sin

MODE : DISTN ter

INPUT SELECTOR : L only ( R only for adjustment in Section

RC OSC FREQUENCY : 1 kHz through 500 kHz Adj
wav
RANGE : 100% fixed range

Table 4-7 A input preattenuator adjustment

Adjustment Test Adjustment control

Input range Remarks
step point and method
Adjust 10 dB ATr control Adjust 100 kllz to 100%
Step 1 lOV fixed range TPl (C37) for an optimum 1 kHz, 100% reference.
flatness. Check flatness at SOO
Adj1
is within ±10%. ste1
Adjust 20 dB ATr control
31.6V fixed
Step 2 TPl (C33) for an optimum Same as above
range
flatness.

Check that flatness bet

lOG'/ fixed St
TPl 100 kHz and SOO kllz is
Step 3 range Check for abnormal flatness
within ±1S% at l kHz, 1
reference.
St

No te : Accurately calibrate the oscilloscope probe before the adjustment

4.6 . 4 B input preattenuator

succ
The setup for the B input preattenuator adjus tment is as follows :

I1
The ;

Set
to tt
 4-14
p- 7722P

output The ad j ustment procedure for the A input preattenuator is as follows :

l) Set
the floating selector to � FLT . Connect an oscilloscope to test

cillos point TP3 .

Z) Simu ltaneously supply signals from the RC oscillator to A and B input

termi nals . (Connection is the same as that in Figure 4-4 of 4.6.2 ( 2 ) . )

1?

on 4 . 6
3 ) Adjust controls shown in Table 4-8 for the minimum common rejection

wa vefor m observed on the oscilloscope which is set to the 5 mV range.

Conditions :
RC oscillator frequency : 1 kHz through 500 kHz
others : Same as 4 . 6 . 3

ks Table 4-8 B input attenuator adjustment

·ence.
Ad justmen t Test Adj ustment control
Input range Remarks
step point and method
Adjust 10 dD ATI' control Set to 1 kHz and adjust for
Ste p 1 lQV fixed range TP3 (CS7) for maximum common minimum waveform deflection
bove
rejection ratio. at SOO kHz.
Adjust 20 dB ATI' control
31.6V fixed
Step 2 TP3 (CS3) for maximum common Same as above
range rejection ratio.

lOOV fixed Check for abnormal common Variable between 1 kllz and
Step 3 TP3 rejection ratio.
range SOO kHz, 100 mVp-p or less.

Make sure the shield plate is installed before preceding to the

succeedin g proce dure s .
s:

Input level display

The adjustment and check procedures are as follows :

Set the floating selector to NON FLT . Connect an AC voltage calibrator

to the A inp ut terminal.

Se t
the MODE to DISTN , the input range to 3. 1 6 fixed range , and the
measu rement range to the 100% fixed range .
VP-7722P

( 3 ) Set the voltage calibrator output to 30 mV . Adjust I/P DC OST

R90 for a display reading of 0.030 V on the LEVEL display on the
area of the VP-7722P. p

( 4 ) Change the voltage calibrator output to 3 V. Adjust I/P DC control

for a display reading of 3 . 000 V . 4

(5) Verify that Steps ( 3) and ( 4 ) are well adjusted . tl

l�
(6) Check that each range of the input level is correct when voltages list
in Table 4-9 are supplied from the voltage calibrator . 4.

4,g

Note : Never connect a termination to the voltage calibrator . Otherwi se ,

instrument may be burnt .
 � ;1
� I

p-77 22 P 4-16

• 7 PREAMPLIFIER ( R CHANNEL) A7
The composition of the PREAMPLIFIER ( R ) board is identical with the

REAMPL IFIER ( L ) board . The adjustment procedures are identical, except the
I

I
·npu t selector i s set to "R only . "

I '

.8 !ST NOTCH BOARD A8

The offset adjustment of the 2nd notch amplifier and the adjustment "for

he fundamental wave rejection must be performed before adjustments of the

st NOTCH board •

. 8.1 Offset adjustment of 2nd notch amplifier ( A q)

The adjustment procedure is as follows :

1) Disconnect the jumper at the the 2nd notch input stage shown in Figure 4-
5 to shortcircuit the input.

D{ sconnec t here .

Shortcircuit
the input . ·

Aq 2ND NOTCH

Figure 4-5 2nd notch input circuit.

2) Set the input range to 133 mV , the RANGE to 0.1%, and the MODE to DISTN.

CA�)
3) Adju st REJ OST control R61 so that the DC component of signal measured at
v
the test point connected to the Ul 9 output is 0 V. TP I

Fundamental wave rejection of 2nd notch stage (A q)

The adjustment procedure for the fundamental wave rejection o f 2nd notch
age is as follows :
VP-7722P VP-772:

( 1 ) Remove the wiring for the input shortcircuit described in 4 . 8. 1 (5) Ad

Connect input stages of lst a n d 2 n d notch stages as shown i n Figure TP:

·
' �ate:

at:
co·

Se
kH
Connect with a wire .
wa

1ST NOTCH 2ND NOTCH Ma

ad
C21

Th

Se
1ST NOTCH Board
me
Figure 4-6 Connection for fundamental wave rejection adjustment
Me

( 2 ) Front panel settings : it

OSCILLATOR FREQUENCY : 1 kHz
OSCILLATOR OUTPUT : 1 0 dB ( 600n load) Cc

MODE : DISTN RJ
INPUT, MEASUREMENT RANGE : 3 . 1 6 v , 100% fixed range 7

INPUT SELECTOR : L only

FLOATING SELECTOR : NON FLT
NOTCH HOLD : 1 kHz
FAST/SLOW : SLOW

( 3) Connect the OSC OUTPUT terminal to the L-channel A input of

measurement section .

( 4) Connect an oscilloscope to test point TPl connected t o the

the 2nd NOTCH board .
 4-1 8

(S) Adjust REJ ADJ control R l 2 s o that the amplitude o f waveform measured at
TPl is the sma llest .

�ote: If the oscillator frequency deviates more than 1 % from 100 kHz, use an
oth er RC oscillator. Measure the frequency accuracy with a frequency
cou nte r .

(6) S e t the oscillator frequency to 100 kHz ± 1 %, and the NOTCH HOLD t o 100
kHz. Adjust trimmers C l l and C 1 3 for the minimum amplitude in the same
way as Step ( 5 ) .

Make sure to return the jumper wire to the original condition after the
adjustment s .

Offset adjustment o f auto tuning circuit { AJ)

The adjustment procedure is as follows :

Set the MODE to DISTN, the input range to 3 . 1 6 V fixed range , and the
measurement range to 0 . 01 % fixed range . Set the FAST/SLOW to SLOW.

Measure the frequency o f an oscilloscope with a frequency counter and set

it to nearest to 1 kHz.

Connect the oscilloscope to pin 7 of U20. Adjust OFFSET control OST2

Rl64 of the auto tuning circuit for a DC component 4-
r
of 0 V. See Figure
7 for the position o f the OFFSET control .
I:

�:II
VP-7722P

100 KHz REJ

ro ............
"
l; T,:� 1(
Z

D �l 6+s+�*"'I; I -:j
I B!al;l;l�I'�
1 •
C24

I
(69 C61 "'

.......
a111 111S
• ..,

/
-
•

K14 C26

"'
?t C2S
·ii- -ii-

-H-
C29

I
•02

uu

[ [ .. [ C=i :I
•••
-il--
KU Cll •
C31

.. 0 .. - " • �..__ •

:; a-. ••= •••

U22
=

I
o
c; .,.,., .,.,., ----il--­ ----i l---
Cll ,lS
- R166 K16.

...._____, 1•234567891
ii-

J; 1:1!1:'=1!1·D�1�1�1!1!1:1
CIO •

•I•• •I•• ; •• ii - ----ii---

C36

2
C34

sl
· ·
.
--ii-
..
•
•
----ii---

:1 =I :1 :1 =I :1
Cll C37
lST NOTCH

� __.I 2 __.I •._p

U21 U27 U26

Ou"
C91•
....__ ....__ ___.
•
__

D D DDD D
•
K6
•
KS
•
K4
•
0
•
Kl
•
Kl
a1n
•116
•111
•
0
..
:)
• •

�; 0
..
..

!: C 11

...._._.
...., ..____
..,.._ ________, . 19 2
.. 17

. _J
,,6 COM ..
_ _ ___

•19l
•194

OST 2

(:
Figure 4-7 Auto tuning circuit on lst NOTCH board

4.8 . 4 Offset of lst notch amplifier

( 1 ) Set the MODE to LEVEL and the measurement range to 0.316 mV fixed
Terminate the A terminal of the L input with a 600n termination.

( 2 ) Ad just OFFSET control R75 of the lst notch amplifier so that the
component appears at the outp�1::_ o f 2nd notch a...!!!Ql ifier ..J].L9- is 0 V .
_ _ _
/l.q l"P r

(3) Recheck the characteristics of 4 . 8 . 3 . I f needed , repeat the adjustment•

 4-20
p-772 2P

.8 .
5 fundamental wave rejection circuit

Th e adjustment procedure for the fundamental wave rejection circuit as

he pre para
tion for the fine adjustments described latter is as follows :

l ) Set the MODE to DISTN , the input range to 3 . 16 V fixed range , and the
measurement range to 0 . 01% fixed range . Set FAST/SLOW to SLOW .

Set the frequency of the oscillator to 1 0 Hz and the output to 10 dB

( 600n load ) . Supply the oscillator output to the input terminal of the
VP-7722P measurement sectio n . The NOTCH HOLD may not be used .

3) Connect an oscilloscope to the test point under the KlO relay on the lst
NOTCH board shown in Figure 4-8 . Set the oscilloscope to the AC
coupling.

( 4 ) Adjust REJ3 control R82 so that the remainders of the fundamental wave
and harmonic component are the smallest.

5) Change the oscillator frequency to 1 kHz .

I� (6) Alternately adjust 1 kHz REJ REJl and REJ2 controls R l lS and R 1 18 so that
the remainder s of the fundamental wave and harmonic component are the
smallest . Set the oscilloscope to the AC coupling and 10 mV range .

7) Repeat Steps ( 4) through ( 6) a few times for an optimum conditions .

( 8 ) Recheck the characteristics o f 4 . 8 . 3 . I f neede d , repeat the adjustment s .

Repeat the ad justment o f 4 . 8 . 4 after all adjustments described here­

after as the fine adj ustment in the harmonic measurement mod e .
ii
�'.�("��'
-. 11 '
� •
'
.

ttzvr··�
ll6...

<
'"O
I
.....i
.....i
N
REJ 3 N
R75 Adjust the rejection '"O
.REJ 2 Adjust the rejection factor at 1 kHz .

- ::
factor at 10 Hz.

• � (X)
... :: :r :: :::
REJ 1

.
I lJ 1 1 ;; � . - 0� ·1 D ·1 ::.i::J.:;:;:;�
"' ( ',,,., . I
. 19J (61 llU ltl - C6•
00

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• - Cl -
I I
n - � n
· n KH
:: Ul l .

:J{::[::[::
00
"::;

[_� ] CJ"" l r r o-·

... .

vT.. .L

T 1111 T
.... - � :? : : : • :! C21

-
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- T •
T :.l
• n :a: &111 .... • • • Iii .
. ••

, ; ::: �; t;tg d t ,.3[ [ [ [ � h t I

.,. ....
.... "'T"T

ut�1
u

10• c1s <2•

uu
•
- .... ..._ u v
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"l

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1·1 I •
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I
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ii- -ii- '
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I
o o 0 0 i: ., • a a .. - ' '
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o e - ••1

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I
• ,. , •c s:? �
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--ii--
--0---. -

C=i : I
...

1
o a •-:cs1 �

D
(j
- �

- il .I
M C l-n-
•

•U •••

Yrl,, 1 1 "l tt '"-1

•
111 111 111 11
::: UJS
- >• -
• •

<>•
:c ' i
::: - =
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•

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I
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. • •

,, ,,... '
·
; : ..
- _!!!...
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; <>>
" ' ' ·;··' ., ,, " ,.. u;v;
u ";""' :;;
"
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. I
--..t---
CJS
I . . ..

1(0MaJ.ld�hh ) )J: h�: h��t�

w 1;fthMfil
NP

f i""J , .. ,. .. , •• _ ____L___
_...
'?°.... � � 12
.. �
.. L__J ;: � a ... ;

• u+ -\ \
... ...

<9J! �H�\-1
[ =i�u C41"!7;- <�� uuou
• :;

ll" r . <.:J 2 - ·DA�.

�

6 <'.:)
·.: _
I "
.... __

o. . , J.>
. . ...
t ' ;.

1 �.. �:-
.

'

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o

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_ _ _ _ • _

1
. o

(JI

!I �1 � ;I . :q qq ;p1 =PI =1 :\ =P I : 1 :j : 1 = 1 :p 1 :\ = I ; I =I
"'
;n- I ST NOTCH
--ii---
. .. . . . . . I
---i i---

D
v-"
o. . ..
UH U'1 UH

I
=

; 0 c. >
.• I > · I ·> I

= 0
�s: ·� ��,. u 11 0 D D D D D D D D
) D fff ' -
·

� ·� · � ��
'
:!TI: ·
U
;

e1 T� GG 1
"' 00'-
KIJ Kil K.
IO K9 .Kl K7 U

L
K4

1�m
. . . . . . . U
. U
. Kl
. l lll
...

;;j

Connect an oscilloscope to the output

of Ul 9 on ZNB- NOTCH board .
IsT
Figure 4-8 Adjustment controls on !ST NOTCH board

'°
,,..-... ,.....
--.J
'-'
°'
'-' '-' '-'
-
N
-
.....
00
.

o. n er D>
,,..-... � ,,..-... ..__, ..__,
.
 rI
'I

4-22

.8.6 80 kHz fundamental wave rejection

The adjustment and check procedures are as follows :

l) Set the MODE to DISTN , the input range to the 3 . 1 6 V fixed range , and the
measurement range to 0 . 0 1 % fixed range .
I
.1I

2) Set the oscillator output to 80 kHz and the output to 1 0 dB ( 6000 locffl ) .
Adjust the MODIFY control on the front panel for a frequency nearest to
80 kHz .

3 ) Set the NOTCH HOLD to 80 kHz .

4 ) Connect an oscilloscope to output pins 1 and 7 o f Ul8 using two probes to

measure the DC currents simultaneously in the CHOP mode .

� S) Adjust trimmer C 2 1 so that the output of pin 7 is 0 V , then trimmer C24

so that the output of pin 1 is 0 V .

6) Turn the MODIFY control for a oscillator frequency o f slightly higher

than 80 kHz +1. 3% ( 8 1 . 04 kHz ) .

· 7) Adjust green trimmer C 2 1 so that the voltage is slightly toward the minus
side ( saturated at ±10 V ) .

8 ) Check the auto tuning width o f the following frequencies :

(a) Approx . 1 % of 40 kHz upper limit 40 . 4 kHz : Notch-hold at 40 kHz
( b ) Approx - 1 % of 37. 5 kHz lower limi t : 37. 1 2 5 kHz : Notch-hold at 37. 5 kHz
( c ) Approx . -1% of 20 kHz lower limit : 1 9 . 8 kHz : Notch-hold at 20 kHz
( d ) Approx. 0 . 7% to 1% of 1 0 Hz upper limi t : 1 0 . 0 7 Hz to 10 . 1 Hz :
Notch-hold at 10 Hz
9 ) Set the front panel t o :
OSC FREQUENCY : 1 6 kHz
UNIT : dB
INPlIT RANGE : +10 dB fixed range
MEASUREMENT RANGE : -20 dB fixed range
NOTCH HOLD : 16 kHz
Check that the measured value is -46 dB or less with the above settings .
VP-7722P VP

( 10 ) Reset the NOTCH HOLD . 4,

Verify that the auto tuning functions when the oscillator frequency
changed between 16 kHz and 1 10 kHz .
(1
Note : Measure the output pins 1 and 7 of 018 and check if DC voltages
satilated at ±10 V . (2
1%
Change the frequency with 0 . 1 kHz steps for frequencies between 1 6
and 20 kHz , and with 1 kHz steps for frequencies between 20 kHz (3
kHz .
(4
Remarks : I f the variable area of trimmer C 2 1 i s narrow and the

0
impossible , add ECCFlH of approximately 220 KC parallel to C22 on
reverse side of the printed circuit board . Rer

4.9 2ND NOTCH BOARD A9

4.9.1 HPF offset
The adjustment procedure for the high-pass filter offset i s as follows: 4 . �

( 1 ) Set the MODE t o DISTN and terminate the input terminal with a
termination . Set the input range to 3 . 1 6 fixed range and the measure
range to 0 . 01% fixed range .
( \ ( 2;
( 2 ) Connect an oscilloscope to pin 1 o f 0 2 2 .
o:
( 3 ) Adjust PSOPHO control R80 f o r a OV offse t . (

4.9.2 PSOPHO offset

The adjustment procedure i s as follows :

( 1 ) Set the PSOPHO A to o n .

( 2 ) Connect an oscilloscope to pin 1 of 0 2 2 . Adjust WTD OST control Rl09 f O)

a o V offset .

( 3 ) Return the PSOPHO A to o f f .

 yp-7722 P 4-24

4• 9 . 3 Offset amplifier 2

'lCy The adjustment procedure for the offset amplifier 2 is as follows :

( l ) Connect an oscilloscope to pin 1 of U25 .

re
(2) Fix the measurement range to 0 . 001%.
6
nd (3 ) Adjust AMP OST1 control R l 3 7 for a OV offset .

( 4) Check that the offset is the minimum when the measurement range is

en t sequentially changed from 100% to 0 . 001%.

n
Remarks : The offset must be 1 50 mV or less in all measurement range s . In
general , the offset is the largest at the 0 . 1% range . Read the offset at
the center of waveforms for 0 . 01 % and 0 . 001% range s .

Gain and o f fs e t o f average response

The adjus tment and check procedures are as follows :
I,

reme ( 1 ) Set the response to the RMS response and the FAST/SLOW to SLOW. iP.,J.. HRaftw� i.J

( 2 ) Supply a 10 mV calibration signal to the input terminal .

( 3 ) Adjust RMS OST control Rl64 for a display reading of 0 . 010 V .,

( 4 ) Supply a 3 . 000 V calibration signal to the input termina l .

( 5 ) Adjust RMS ADJ control R l 6 1 f o r a display reading of 3 . 000 V .

( 6 ) Repeat Steps ( 2 ) and ( 5 ) for optimum conditions .

Check that the display readings at all ranges when calibration signals of
all LEVEL measurement ranges are fed to the input terminal.
( S pecifications : ±2% o f full scale)
VP-7722P p- 7 722P

4.9.5 PSOPHO gain 3 ) Set t

The adjustment procedure is as follows :
Set t

( 1 ) Set the response to the AVE response �

(S) Adjus
( 2 ) Supply an 1 kHz , appr oximately 3 V signal from the internal oscillato ; to be

the input terminal .

( 3 ) Set the RELATIVE LEVEL to on . Set the PSOPHO A to on. Adjust WTD The a

control RllO for a display reading of 0 . 00 dB.

( 1 ) Adjus

4 .10 . lST NOTCH BOARD A8

4 . 10 . 1 Deviation of 1 kHz 2nd harmonic
The adjustment procedure of the deviation of 1 kHz 2nd harmonic is
follows :

( 1 ) The adjustment setup i s :

VP-7722P t o b e adjusted VP-7722P for calibration

Front pan

OSC F
osc 0

T-branch UNIT:
MEASU.

Front panel setting s : INPUT

VP-7722P t o be adjusted MEASU:

VP-7722P for calibration
OSC FREQUENCY : 1 kHz NOTCH
2 kHz
OSC OUTPUT : 10 dB -10 dB
UNIT: ( 2 ) Set
dB Optional
MEASUREMENT MODE : DISTN Optional f requc

INPUT RANGE: 10 dB fixed range Optional

1 3 ) Inc re•
MEASUREMENT RANGE: -20 dB fixed range Optional
frequc

( 2 ) Set the output of the calibration VP-7722P to off by pressing the A

key , the - key three time s , and the ENTRY key . 4) Adjus·
of - 2(
 4-26

Set the NOTCH HOLD of the VP-7722P to be adjusted to 1 kHz .

( �) Set the output of the calibration VP-7722P t o -10 dB .

( S) Adju st variable resistor R22 so that the display reading o f the VP-7722P
to be adjusted is -20. 45 dB ±0 . 05 dB ( between -20 . 4 and -20 . 5 ) .

4.10 . 2 Deviation of 100 kHz 2nd harmonic

D
The adjus tment and check procedures are as follows :

( 1 ) Adj ustment setup i s :

,i

i.s VP-7722P VP-7201A

lf,j
I
i•

'I
Front pane 1 settings : 'i
.

VP-7722P to be adjusted VP-7 201P for calibration

OSC FREQUENCY : 100 kHz 200 kHz
OSC OUTPUT : 1 0 dB -64 dB

I
UNIT : dB Optional ,1

I
MEASUREMENT MODE : DISTN Optional
INPUT RANGE : 10 dB fixed range Optional \
n
MEASUREMENT RANGE : -20 dB fixed range Optional
NOTCH HOLD : AUTO

(2) Set the oscillator frequency of the VP-7 722P to be adjusted to a

frequency nearest to 100 kHz and notch-hold that frequency .

( ) ) Incr ease the output o f the calibration VP-7201P b y +60 dB . Set the
fre quenc y of that VP-7722P to 200 kHz .

A d j us t trimmer Cll for a display reading of the VP-7722P to be adjusted

of - 20 . 00 dB .
VP-7 722P 4

( 5 ) Check that the display reads as follows when the frequency of the (3 ) Cha
7 201P is changed to 300 kHz and 500 kHz : Alt
300 kHz : -20 . 00 dB ± 1 dB rerr.
500 kHz : -20 . 00 dB ±6 dB the

Note 1 : The output display o f the VP-7 201P i s set to open terminal out ( 4 ) Set
unlike the VP-7722P. If a 600n termination i s connected when the out the
display is -4 . 0 dB , an output of - 1 0 dB can be obtained .
Set

Note 2 : The deviation of 100 kHz harmonic is slightly influenced by the

shield plate . A value of -20 . 00 may be obtained after the shield pl the
is installed if the adjustment of Step ( 4 ) is set to approximately -19, R-c

dB . -12

4 . 10 . 3 Fundamental wave rejection circuit 4.11 A

The adjustment and check procedures are as follows : The

( 1 ) The adjust setup i s : Con

inp
Se t
3.1

MO
osc
"'' u-+------+-0

Mea
Oscilloscope
600D. of

Front panel settings :

OSC FREQUENCY : 1 . 6 kHz ( 3 ) Set

OSC OUTPUT : 1 0 dB
INPUT RANGE : 1 0 dB (4)

MEASUREMENT RANGE : -100 dB

MEASUREMENT MODE : THDl
NOTCH HOLD : 1 . 6 kHz

( 2 ) Observe the waveform displayed on the monitor oscilloscope . Adjust

control R82 so that the remainder o f fundamental wave and the meas
value in the THDl mode are the smalles t .
 4-28
vr-7722 P

Change the oscillator frequency to 1 . 5 kHz and the notch hold to 1 . 5 kHz .
Alternately adjust REJl and REJ2 controls R l l 5 and R l l 8 so that the

rem ainder of fundamental wave and the measured value in the THDl mode are
the smalles t .

( 4 ) Set the oscillator frequency and the notch hold t o 1 . 6 kHz . Check that
..
the characteristics adjusted in Step ( 2 ) are satisfactory .

( 5 ) Set the oscilloscope f requency to 1 kHz and reset the notch hold . Set
the floating switch to FLT . Verify that measured values are proper when
the input terminals are sequentially changed to L-channel A , L-channel B ,
R-channel A and R-channel B . The values should fall between - 1 1 5 dB and
-120 dB.

4.11 A/D CONVERTER BOARD Al 1

The adjustment procedure for the A/D CONVERTER board i s as follows :

Connect a voltage calibrator to the

input terminal as shown on the right. ) A �.I -·I ,,,/
Set the voltage caliqrator output to
3 . 162 V . L /R ri- p�j"

( 2 ) Measure the level in the LEVEL mode at the 3 . 1 6 fixed range . Take note
of the measured result.

( 3 ) Set the VP-7722P to the AVERAGERmode and 3 . 1 6 fixed range .

( 4 ) Adjust FS ADJ control R4 so that the measured value is approximately the

same with that in Step ( 2 ) . Since identical value can hardly obtained ,
an approximate value is acceptabl e .

re
4. 1 2 TROU B LESHOOTING FLOW CHA RT
for VP-7722A

Does the display NO Check A13 Inter­

change when any face circuit.
key is pressed?

YES

NO
Is the OSC output
level correct?

YES

Does the LEVEL NO

measure correctly?

YES

NO
Does the DISTN
measure correctly?
 4-3 a

NO
Is the TPl output Check the OSC &
of OSC circuit ALC circuits.
correct?

YES

Check the ATI

circuit.

l
,

Is the DC OUTPUT NO Is the A7 Pre am NO Check A7 Pre

level of rear panel output (R76) leve amp L and R.
- -
.. ..
correct? correct?

YES
�

Check AS and A9
YES Notch filter circuits.

NO
Is the pin 1 ofU22 Check All AID
-
pulse signal of All ..
Converter circuit.
correct?

YES
·�
Check Al4 Master
CPU circuit.
 VP-77 �

Does the fundamental NO Check AS lst notch

frequency reduced and A9 2nd notch
at A9 TPl of 2nd notch filters.
filter circuit.

YES

Check A7-2 Pre

amp U31 to U34.

Is the DSP MONITOR NO Check A12

output of rear panel Dispay assy
correct? circuit.

YES

Check All AID

Cconverter circuit.
Ql,U3 and U4

Is the GP-IB
NO Set the switch to
address switch correct position.
setting correct?

YES

Check A13 Inter­

face assy circuit.
U4, U5 and U7
VP-77 22P 6- 1

CIRCUIT DIAGRAMS

• PANEL & CHASSIS A1 • • • • • • • • • • • • . • • . • • . • • . • . • • . • • . • • . • • • • • . . . • 6- 2

• TRANSFORMER ASSY A2 . • • • • • • . . • • • • . . • . . • • . • . • . . • . • • . . • . . . . . . . . 6- 3
• ANALOG MP X A3 . . . . . . . . . . . . . . ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 4
• POWER SUPPLY A4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- s
•
ATT ASSY AS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 6
•
OSC ASSY A6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .� . . . . . . 6- 7
• PRE AMP L,R A7-1 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • · · · · · · · · · 6 - 8
• PRE AMP L,R A7-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 9
• AMP L,R A7-3 . . . . . . . . . . . • • . . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . 6- 1 0
• FARST. NOTCH ASSY A8 • . • • • • • • • • • • • . • . • . . . . • . • • . . . . . . . . • . . . . . . 6- 1 1
• SECOND . NOTCH ASSY 6- 1 2
A9 . . • • . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

• DIGITAL MOTHER ASSY AlO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 13

• A/D CONVERTER ASSY A l l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 1 4
• DISPLAY ASSY Al2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 1 5
• INTERFACE ASSY Al3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 1 6
• MASTER ASSY A14 . . . . . . . • . . . . . . • . . . . • . . . . . . . . . . • . . . . . . . . . . . . . . 6- 1 7
• COUNTER ASSY A l S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 18
• MAIN PANEL A 1 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 19
• SUB PANEL A17 . . . . . . . . . • . . • . . . . • . . . . . . . • • . • . • . . . . . • . • • . . . . . ()- 20
• REMOTE ASSY A18 . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . • . . . . • . . . . . . . 6- 21
• IHF BPF WITH 1 9 KHZ NOTCH OPT! • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • ()- 2 2
• DOLBY WEIGHTING OPT2 . . . . • . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 23
• CCITT PS3 PROG WEIGHTING OPT3 . . . . . . . • . . . • . . . • . . . . • . . . . . . . 6- 2 4
• CCITT PS3 TEL WEIGHTING OPT4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 25
• DIN AUDIO WEIGHTING OPTS . . . . • . . . . . • . . . . . . . . . . . . . . . . . . . • . . . . . 6- 26
• C-MESSAGE WEIGHTING OPT7 • . . . . . . . . . . . . • . . • . • • • . • . . • • . . . . • . . . . 6- 2 7
• 6- 28
1 KHZ BAND PASS FILTER OPT8 . • . • . . • . . • . . . . . • . . . . . . . . . . . . . . . . .

• 3 KHZ BAND PASS FILTER OPT9 . • . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 -29

• OPT6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6- 3 0
20 KHZ LOW PASS FILTER
VP-7722P.

CA2J TRANS ASSY

 6-_ 2 �

oc
SYNC
DSP DSP
MONITOR MON ITM
CA 1 15 1 CP- 18

J, .l .n2J .l J21515
REMOTE ASST Jli JlJ Jl 2
.ne 1
8!11T PARALLEL

P 1 2J P l l515
J16
7, 2 2

PJS
C) C)
"' "'

t
,.. ....
JJS ..,

... :;
-<

"' )­
en
)-

)­ < )­ "'
"'
... "' "'
)­

N. N
"'
"' N ... ... "' "' <

�
"' "' "'
<
< .., )­ u "' < "' "' a::
"'

"'
,..

a::
,., ...

<
"'

-< CL CL "' �
"'

en a:: ..,
"' )-

IL '")
"'

:r
"'

<
"'

u -< ffi -< � -<

..,

....
.., .., ... ... ...

�
<
0 0 CL .... "'
....
-< -<
z z <
< 0 :c u 0
..... "'

�
N ,._

; :r;
iii
"'
- ...

�
CL

....

....
JJ7
--< "'
CL

JJJ ,l

PJJ

P 1 2i

J l 2 "4 J12 J

P l 22

J122

l'IOMITOR
OUTPUT
A

PANEL & �KASSIS� Al

VP-7722P,

FI
2 50V
I . 6AT
 6- 3

-- --. -

16

C2

-{--<
P71
(-
0.1
1
2 (-
3 (-
(-

QI]
0
mIJ
0
P72
I (-
2 (-
)Q 3 (-
4 (-

�
L}-<
- 3
1 (-
(-
[ill] Dill !� �
2
0 0
(-
(-

�� 4 1
F

(-
I
(-

I !
2

(-
(-
P75
01
1 (-
f-
256 1 05 5
2
3 f-
4 f-
5 f-
6 f-
02
25 6 1 05 5

TRANSFORMER ASSY A2
 VP-7722P

J21
B

I
�
�
'

D GND� 1 5 >h
PJl JJ l
�
0 GND +
50/�--4
1 � >i-- o GNO
13 �
OLCK l -+ 12 �
OLCK3 f
OLCK2 � 11
10 �
OLCK4 � 9
07 � 6
-J25I A • 5'
·06 + 7 -{!sj A G�

04 +
05 --tt 6
5 -j24I A GN

1
DJ � 4
-...
02 -I-+ 3 -J23J A• 1 5
01 + 2 A•SV -J22j A • 1 5

·t
oo-tt I l
UTD ONf 30 OOlF -j2ij A- 1 5
C1
D GNO � 29 1 0V
_

6CM3-!-+ 26 -l2oJ A- 1 5
GCM2 + 27
SCMl -tt 26 -J1 gJ
SCMO f 25 -11 ej
SBM7 � 24
SBM6 -4 23 -j1 7j
SBM5 + 22
68M4 --4 2 1 ... -l16J
6BM3 + 20
'

...
0
n rv
-41 sl
SBNI f 1 6
SBM2 � 1 9
,_ II)
a: Q..
; -11 4I
>-t-;i
SBMO � 1 7
D GND � 1 6 -11 ::ii

PJ2
-4
I
1
JJ2
J J. 4-1
-j1 2i
-11 1 I
-+
� ...
2
� 3 -j1 oj 0•2 H
...... ...
'

I
NN
,_ II) -jg I O• 24V
a: ...

6 0-24

6
... 5
'

...
0
- rv
>- If)
CZ: Q..
3
2
lK

POUER SUPPI
 J22 J2J J24 J25 J26 J2 7
B " B " B " B " B " B "
• 5V 32 • 5V ----1 I " GND
-jJ2I " GND l---J2 -jJ2j A GND f---J2 --j I " GND
D GND J I D GND -jJij I��� I -13il l��f -jJ j2N6!]jf-
1 jyfth ;1c" I
J----j 1 12N6QlJ
0 GNO 30 0 GNO -j:iol A GNO �Joj A GNO -j:iol A GNO �Joj A GNO
J26
-5V 29 -5V -j29I�b�i -{g9I�b�I -j29I -j29I A GNO < 10 <
-12e1 JB I 1 D f--.keI JB I D I ...gel A GND f---e-j2 l A GND -j2el ....gel11TD IN I < 9 <

-{g7l 1 e I 1 c f-l,271 1 0 I C 27 A•5V 27 A•5V !j

-{g5l
20 JA f---1251 20 JA A•5V 26 A•5V 26 A•5V A•5V :I

I�
A• 1
'
, I
_tl
_..g5l 1 11 JC f---1251 1 11 JC _..g5l 11 GND f---25I-j A GND f---25 -j I A GND f---25 --j I A GND < 6 <
I
-j24I 2A JO l--121I 211 JO -i21I " GND l---21 ----1 I A GND 1---{?4I A GND f---1-j2 I A GND I
I< 7 <
I
...gJjFRI 28 f---J-{i IFR I 28 _J

11
�
•
I
...g:ij 11• 1 5v �2JI A• l5V �2Jj A• l5V �2Jl A• l 5V I< 6
I
I
A• I !
-l22l 2c IFR2f--.k2l 2c IFR21 2 A• 5V 22 A• 5V .....u.
I

I
I
I

...g1l 11- 1 sv f---1--g I A- I 5V l-2----1 II A- I 5 v �1l 11- 1 5v

Tu
-12 1 I K2 f---2--l 1 I K2 I< 5 (
I
-j2oi 0 A- I 5V I
I

�
-j1 91 -j1 9ICNT CLl -j1 9ICNT !RJ -jI 9BEAS DCI I
-j1 91 I
I
-j1 al -j1 el A GND f---1-j eI A GND -j1 el -j1 el A GND I I
!
I
-j1 71 -j1 71 -j1 71 1'CHI
-j1 71"'Dm1CH�1 7l'"QlJ 4 < !
J
I 1 '" OC ...
<

p
-j1 61 -j1 61 -j1 61 1 6 A GND 1 6 A GND l < ' �" Ill

-j1 51 -j1 5I -j1 51 -j1 51 -j1 5�ro ou TI 2 I I � Q. I

I l /f' DC _.

1 1 /• DC ...
<

J -j1 1I -j1 41 -11 1I -j1 1I -l1 JI I

, ..,.,, []It )
1 1,. DC _.
I ·� []It)
I

J -j1 :il 0 GNO �1 JI 0 GNO -11 JI -11 JI -11 JI -11 21

J -j121 s IN f---1--l 2I s IN 12 l 12 FLT LCK7
J -j1 1I o GND f---1--l I I 0 GND 11 DO 1 1 DO DO DO OPTl0"4
llEIGHTIHG
F I LTER
11

1 0 0•2 1V 1 0 0•21V 10 DI 10 DI 10 DI DI
0- T
9 0•24V 9 0•2 1V 9 02 9 D2 9 1 02 9 02 �'

on iw :
6 o-21v 6 o-2 1v 6 DJ e DJ e l OJ e DJ
�-=ta
7 0-2 4V 7 o-21v 7 D1 7 D1 7 1 D1 7 D1
6 0 GND 6 0 GND 6 05 6 05 6 05 6 05
5 0 GND 5 0 GNO 5 06 5 06 5 06 5 06 ,.,
,,,
I QC
4 O• l5V 4 O• I SV 4 07 07 07 07
J O• l 5V J O• l5V --i :i I
2 0- 1 5V 2 0- 15V --i 2 I
1 0- 1 5V l D- 1 5V LCKI L CK2 LCKJ LCK6
.Y OSC ATT OSC PRE AMPL CL) PRE AMPL CRJ l ST NOTCH 2ND NOTCH
 J57 I P57

� �
rt I
ND ·NotsH l'CBJ
A ��u�
� 4- ��

\7J56 I
3
--t< 1 0
9
J26

�1 4-
I

I
r-+-<
P56
I �
�
- CFROM 2ND NOTCH l'tBl
I REJ OUT
I
I
I <!Oo=17o
A• t 5V A- 1!5V
I A • l !5V A- t 5V
1� A• l5V
I _,...___,,_
a'-

,--}-< 7
RI0
R 12 J33 P33
:----+-< e
4 .7K
I MON ITOR
� L._j OUT WT
2
IK

I ��
3
1 r+
� 3 �N . C
6
I
:----+-<
I
I
I
I
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:- · · '
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I
I
I
I
I
I
n· ,,,
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I
I : I
R I B ',
I
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I
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<..:
7"- ·_,_._.
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l.;.
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MEAS DC
I
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DC
3 UP DC
I I I� DC

I IP DC ....ao.-'--L'--+----.Li

I
I
l �" Q I

=-+<
A• r sv -}< 4 �A• l 5V

-o+ +--
A- I SV +< 5 f+-- A- 1 5V
2 < , ,,, n. 1
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A GND
II t/� oc
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1 9DSP l /P

!
11':>
I

OPTIO'I A- 15V C4
t· tC5
A• 1 5 V A- 1 5V

: IOOIF I
I : I I

l I7 rr
l/ E I GHTING 35V
I OOIF _
3!5V

l
F I LTER A• I !5V A- I 5V

0.T Q.. I ...-...-....-.-;� .J_,.

1
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A • 5V
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6I
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1 RI7
l
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l
_,
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CRt
N A t 50
CR2
NAf 50

C3
A- t!5v A- rsv
Rt6

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• I 00 .IF IK
3!5V

.ANALOG ___MPX A3
 >i
J75 P7

C2
5 >-1
5
>-+
0. I
UI I 2
I
RI I NJM 293 0- 5
I
33 I
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3
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Cl I + Cl2 + C13 + c14 + Cl5 I

L
C15
4 1 0000.IF 1 0000.IF 1 0000.IF 3 >-r
I
1 0000.IF 1 00.ui= 1 00.Lf"

J751
1 5V 1 5V 1 5V 1 5\' 1 5V 1 0V
I
I
I

I I

-----
_j +1
r- -
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E
I

I
7

I
I e
Ul2
P72 J72 Rl2 NJM2930-5
CR 1 I V05B 2
ouri------;..,.,.
33
I C23 �_,,.,--.... 1N
GNO CIB
2200.LJF 4
I 2 J
I C17 1 00.LJF
I
1 5V 1 0V
I
1 00.c..f

I �
CR l 2 V05B 1 5V 5
I
I
I
U13
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111
I
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I
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ou r
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:11
Jc:
I 0.LJi=
C24 C25
+ +
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1 5V
1 00.c..f

:1I -"""-1---+4
1 0V 31
U2 1
5 00 H A
F13 S 1 - 3 1 22V 31

I
3
CR 1 3 V05B

rC0 4. 5
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C2B
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I I

II
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4 2�
I 35V

!
CR l 4 V05B

I
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C27 0 . I
P21
I ;
I
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I II
I
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I I
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I
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J75 P75
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I
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l
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0. I

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1 0V

l
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:1
P74

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I

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I
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I
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.. �I I
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0 I
I I
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w 35
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5 >-t:-- GND S2V8 1 0F

I
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+
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I

: �e
I
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+
+ I
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I
I

I U l '
J I 8 >-t-GND '

l
JIA GND I �J.JI

, >-\-
308 >,-GND
l�
I
-+---_,. .--� .---1-�-t 30A >4-GND

J
C4 5 C45
46 �
7V 0 . I ...._---:""7 298 -sv C63

I
'------1""7 29A >-t-- 5 V
1 0.1

U-------, w
C65
2200 1£
I
JS\-

+
P21 J2 1
.------1'""7 278 >4-A+ 5 V
>­
.___ _J
C67
Q._ R•
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Aoo -f7 1 9 1
AD2 ---t-7 2 1 . I
AD I -;-7 20 )
!'.?
AD3 ---f? 22 )
AD4 --1-7 23
U0 � 24
Ul -;-7 25 Sl 1
u2 ---f7 25 >f-N . C .
� 27 �
�---1-7 26 �
50160 + 29 >+ : -- +-
----- �
0
A GND --t7 3 0
. "'
, m
ID

L_
•

0 ..J
ID
VP-7722P.

C4
1 000
±I X C5 R8
2000 2 . 67K
tl x ±I X
Cl C2 C3 R9
+ 1 5V 1

f
P28 0 . 1 0 . 1 5 . 35K
.Q. I
J28 ±IX t l :t.

.-kl, L,,I1, � T �� .
NJM0820T
'

u:o
1

G�: ( :..·4K
I ,.
�:49K
tlX tlX
2� C7
1 000
I
t l :t.
I I I
RIO
I .....__ _ _.__
_ __J ea

I
57 . 5K 270
0 I KHZ GA I N AOJ
I I
I :? I X �
T ±I X
I
I

I I
I I I
I

I
R2 1
I 10
A+ \ 5 V -t{ 6 tt------·• 1 5V 1
·1 I + C\6
I
<t-t-1-----!+---1 sv1
I - 47LF
I I I
R22
10
35V
A- I SV -r< 5
I II - C\7
4 7LF

1,l
I
A GND--i°<
I
7 ' + 35V

�
A GNO+ I �
I I I
0 GNOf 3
I I I
UTD ON -t< 4
 6-2i ·

---- ·----·- --- -

Cl I Rl4
2000 4 . 22K .
t l Y. tl Y.
R l 3 Rl5 Cl5
• 1 5V 1 I J.F
6 . 45K 6 . 45K

I
50V P26 J26
�JM0 62DT _ t_1�:1.
·�.,__ _t
._.. --+- �r:1�
.·- ...-
� -------=;+
,....._ 2 >-l-1J TO OUT
I
I
�
C12
R20 I
I OK >-t-A GNO

�
RI I . 1 000 - 1 5V 1 R l 7
t l Y. I OK
I OK
Rl5 C13 Cl4 t l Y.
...
ce cg
t1 x
2700 220 ....._ 1 0 .7K 1 300 1 20 '----s � l 6
� �
T t 1 x T ts_x
_____

R12 t 1 Y. it I x t5 x 200
I OK Rl9
tlX I OK

O 1 5KHz GA I N AOJ
I

!HF BPF WITH 1 9 KHZ NOTCH OPTl

 VP-7722P.

f
,

.I

J28 R
2.
I I I
IJTD I N -k ±I

+8�
g

NJM082DT R5�.
A GND ±I

I I
I I
I I
I I
I I
I I
I I
I I RI1
I I
I'
A• I 5V -t< 5 !�
�---�0 --- + 1 5V 1
1 + CB

�<r1---�l���--.;_­
1
I I
47.LJF

I
_

1 R12 35V

GND +
I ·1
4
A- 1 5V-t-( 5
I
1

I I I
A 7

GND ---+< I
I Io I
D GND -t<
I I
� I
A

3
I I
I
I

_I
�TD ON -t< 4
 • 6-23

- - -,
. - ---- -------

I
-·- -

R3 C3
4 3K -- 0 . 0 1 5
+ 1 5V 1 Cl
2
± 1 7.
.

± 1 7. 10.uF
1 5V
T R4
P26 J26
>4-1.1ro OUT

� 1
6 . 04K C5 R6 • I
I I
2
± 1 7. 0.01
\l
30. l K I

� �? �o
T I I
4
RIO
- 1 5V 1 ± 1 7. ±lX ! OK >-t-A GND
C4
R7 RB R9
1K I . 5K 500
±1% ±1%

------
- -- - - -- -

DOLBY WEIGHTING OPT2

 VP-7722P

' .

R23
7 1 . 5K
± 1 /.

�i� !
II
Cl I R2 1 C2 1
• 1 5V
J28 I P28 1 3 . 3K 4700 +1

61
----"!! 5�
1
�
\JTD IN ---!..( 9 <J-
._
±IX
i-
±I X
---i l • +
>-- -r-·�_.-

�o T �; �2K
-
c 22 I R22
ii f
I
-
I .
Rl 1 -
u<
1 4 . 3K NJMoa2so- A

�
i C:-:
I C12
± 1 :;.:

I
'7
l
0.2- \J R24 R2!
±IX 4 . 99K 28
± P: :!: 1 !

l V'
A GND -+ 8 f+-1

II I
Rl
I
I
�
�
< - - -
l..0....-
.,.,.
A l 5V� 6 • .. - -+ 1 5V
1 .
I
+ I - -

I + C l
::m: 47 .uF
- I 35V
R2 \J
I
A - 1 5V-t< 5 +-+-
I
,
10
__,,.
..,_,,
,__ 1 5V R53 C53 1

:' I ':· +�
II
_ I C2
1 3 . 7K 0 :0 1

]
___ ___

± I /. ±IX
TI!. 4 7 .l.Jf R52
35V

III
5 . 49K
A GND -+ 7 ±1 x
fR5l
5 . 49K C5tJ.- oi
OOO "'

�
·
�
I

A GND -j-<
\ITD ON f 4
7
1P
/. • 1 ,,
·( • 1----- ----l
-
I -Q
±

f+-1
-
C5 1
1 000
D GND -t< 3 ±1 x
I
 6-24 "

�i�
11
C31
R43 C43
3000
9 . 75K
• ! 5V ±I X
R42
R31 3 . 92K
>'-
7 ±I X

r-·wv-_.._,,.,._....,
± 1 /,
1 0 . 7K
____ _
R41
C42
NJM08�SD-A 3 . 92K RH iC44
1 000
±I X ±IX 25 . 5K 2200 T
R.25 :!: I X ±IX
2 6 . 0K C4 1 'V
±I X 1 00 0
±I X

C6 1
1----� 0 . 02

I I >-t-1.JTD OUT
±I X

�
S.P P28 ..!28
2
>i-A GND

i
K + 1 5V

I
. ·'
i
R55
! OK

I
'V

- - ·---· -- - ------ - - - ---

. . ..,,

CCITT P53 PROG WEIGHTING OPT3

l
VP-.772.2P

- · · - ------ --- -- �

Rl R2 R5 R7
.
P 2 8 1 8 2K
+ 1 5V1
J28 1 8 . 2K 1 9K 1 9 . 5K
:1: 1 % :1: 1 % NJMOQ2DT :1: 1 % :1: 1 %
\JTD J N -k I

8 11, ���o � � � i
g

I
I I
I I Cl c2· C4 C5 C5
A. GND-t<
C3 5800 390 0 I 00
0.01
I :t I /.
55 :1: 1 % ±IX ±5x - I 5V1
I
I I R3
I I lK
I I ±Ix
I I R4
I I 500
I I R5
I I 1 . 95K
I I

+
±IX
I I RIB
I 10
A+ l 5V 5 + 1 5V 1
I
I
I I + C15
47 J.E

+
I I
I
I I Rl9 35V
�I l/'A
10
A- 1 5V 5

GND -}<
I

I�
I I I
A 7

GND f
I

I
A 10
I I

:n
D GND -k 3
I
I I
\JTD ON -t( 4
 . ··--· �

6-25

--- - � - - -- - · - -- . - ·-

RlO
5 . 9K

I
±1 x
CB C9
550 0 . 047
±I X
±5x I .
'

RB R9 Rl ClO R13
5 . 9K 5 . 52K + I 5V1 1
215 . l K C12 C13 C14
4 . 5K 0 . 047 ±1 x 0 . 02 0 . 02
±IX ±1x ±1 x 0 . 02 + \ 5V 1
6
7
± I /. ± 1 x
s U2
C7 NJMOB2DT R l 4� 5
0.\� 7 8 . 71'\ 5 . 52K
±\ X ±1 x ±1 x
±1 x - 1 5V1

+ Cl5
I O..uF P2B J28
1 6V
2 >4-1.JTD OUT
I I
. I I

�
I
>-t-A GND

• ,

CCITT P53 TEL WEIGHTING OPT4

VP-7722P

:. 1 C2 C3

!:· 1e�-l i.
Z• 12 0 i2) 12
J2 8 .p 2c + 1 /.1 2 R 4 P.5
��----Ej-�I'
+- , /.
•

r-'l.
r • •

:: 1 %
2 A sr
i R. 2·, · F. 3 �J M0 5 BD - ;� z ;� %
·:� G�� � � - �.
"1v I ± l /.
52 . 3K · j' 7 . 8 K � 3 57 K
±\ % T
:!: l /. ±1 % 3300 -
- 1 5V t . C4
T
v
-------�;---�
±1 % �
4700 v
'--- ---1
e
r-.......:

A+ ! 5V --( 5

! 0..--y.,
R. 1 0
·
A - t 5V --< 5 f---'N - 1 5V I -

J
.· 7
f 35V
C10
47 .UF
_

·ro oN --< 4
D . GND --< 3

.A. GND --< 7 �

•

A . GND --< 1 0 H I

"Q
 6-26

R6 R7

l'?��0-0..-T �-
NJM0628D- A 2 K 2K
±} % ±!%
a.P P28 J2 8
7 NJM0623D- A
1
2 )-- \JT D OUT i
>-�--��·V\I\ ea R. 9

..... j
'

±!%
- 1 5V 1
! 0K
V
! 0 .UF
11r-�����___. I
C6
9 1 00
1 6V j7 >-- A . G ND
. . v v

DIN AUDIO WEIGHTING OPTS

VP-7722P.

Rl R2 + 1 5Vt
J28 P28 1 2 . 5K 34 . 8K
±1 x ± P�
l.JTD l N f 9

�;?�o �55
I I Cl
I
I C2 C3
270 C4
A GN0 --4-< 8 n 0 . 022
I ± I x ±5X
I I
I I
I I R3
I I 1 . 47K
I ±IX
I R.4
I I 500
I I R5
I I R18 1 . 95K
I I 10 ±I X

I
A+ I 5V -{-< 5
,
+ I 5Vt
+ C16
I 47.UF

I
I 35V
I
I

I R19
I 10
A- 1 5V -+< 5 . - I 5Vt
C17

�
A GND-{-< 7 47.uf +
I I 35V
A GND-k 1 0
I I

I
D GND-+< 3
I
IJTO O N + 4 :D
I
 6- 27 :.

R8
3.0IK
:t I i':
C9
C6 270
18 ±5%

C7 CID
470 0 . 022
i2X !-! %

Cl \ RIO
ea
470 0 . 022 9 . 53K
±2% :tl % :t\ %
R6 R9 R7
3.0IK 5 . 62K + I 5V1 C\3
:t I Y. 825 + I 5V1
:t I Y. . :t l % 0 . 02

r
'

C5 NJM082DT
iV1 O. I
T :t l %
?

+ Ct5
I O.uF J28
1 6V P28

l
2 >-f-1.no OUT

.qf
R13
I I
I
! OK
I >-t-A GND

C-MESSAGE WEIGHTING OPT7

 VP-7722P

r-- � RS
1 5 . 8�
.t l :/.

R2 R!:l C2 CJ

:I: 1
0.01 0.01
.t l Y.
1 5 . 6K
.t 1 Y.
I OI\
.t P': Y.

• 1 5111
Rl Ri'
+ 1 5V 1
.t 1 Y.
J26 p28 30 . 1 t; R'.$ 1 5 .6K

-k
I I
• 30. 1 1\ .t l :/.

I
\ITD lN 9

I
.t p:

I
+
I I
h
I
I

NJM062DT NJM0620T

A . CND 6

I R 'I R9

I
90 . 91\ 30. I K
.t 1 :I.
I

I
:1:1 Y.

I I
I
I
I
I
I
A·• ! 5V � 6
I
l R27
22
• I 5V1
R18
J0 . 9K
.t 1 7.

I I +

I I
C l 'I

I
-1 !SV1
I
2 2 .IJF
3 5 \/
R26

A .. 15V-k 5
I
22

I
I I
Cl5 Rl9 R22
+
I I
I

_,......._) +
22.1.4= ! OK 1 5 . SK

J=J
:1:1 7.

i
35V :l: l X

-+
l 5V 1

I<
A . CND 7 R20

1 Y.
27 . 4K
.t

:µ
10
D GND 3
\ITD ON -r< ... NJM062DT
- t 5V 1

R2 1

::1: 1
90 .
•

L _ _
 6-28

R15
1 5 . 5K
:t I /.

RIO Rl3 . CS C7
l OK 1 5 . 6 !{ 0.01 0.01
:t I /. :t I /. :t I /. :t I /.

+ 1 5V 1 R14 Rl5
Rl 1 1 5 . 6!\ • 1 5V 1
1 5 . 6!<
30 . l K 7 :t I /. :t l /.
:t l =�

NJM062DT NJM052DT

Rl2
90 . 9K
:t I /.

P. 1 7
5K
R25
1 5 . 6!<
:t I /.

C9 ClI
0.01 0.01
:t I /. %IX

R24
+ 1 5V 1
1 5 . 6!<
±I X

NJM062DT

J28
>i-- u ro our
I
I
I
>-t-A . GND

. .,

1 KHZ BAND PASS FILTER OPTS

 VP-7722P

--- - ---

R8 ·

1 5 .SK
±1 %

Cl CJ
350 360
±I Y. ± 1 Y.
t-­
R2 R5 C2 C4
I OK 1 5 . 8K 3000 3000
± I :t. ± I Y. ±I Y.
t--
± 1 7.

,
. R1 R5 R7
+ 1 5V1

. I I I
. J28
1 5 . 8K
P25 3 0 . I K RJ
± 1 Y.
1 5 . 5K
30 . I K 7 ± P: ± 1 Y.
\ITD t N -k 9 ± 1 :1.

+ h
I . I NJM052DT NJM052DT
· 1 5V1
A . CND 8

I I R4
I
R9
I 90 . 9K 30 . I K
±1 Y.
I I ± 1 Y.
I I
I I
I I
I I

I
I

,--
I
I
Rl8
R27 30 . 9K
tj- -M -

-
- • 1 5V 1
22 ± 1 Y.
A.. 1 5V·-h 6
I Cli
I

I I •

2 2 1'"
I
I '1
_
35V
1\26
A·· 1 5V -I-( 5
22

!I!
- 1 5V1
C15
+ 221'"
35V
I I I

! I l
Rl9 R22

+ '1,
! OK 1 5 . SK
±1 :t. ±1 Y.

4--,
. A . CNO 7 + 1 5V 1
R20

tj.-J
� 27 . 4K

-+
±1 Y.
1 < 10
D GND· -l-< 3
IJTD ON < 4 NJM052DT
• 1 5V1

I
L - ---
 -

6-29

Rl5
1 5 . 8K
:1: 1 x

CS C7
350 350
:1: 1 x :!: I X

RIO R13 C5 08
I OK 1 5 . 8K 3000 3000
:!: I X :l: I X :!: I X :!: I X

+ 1 5V 1 Rl4 Rt5
Rl 1 1 5 . 6K + 1 5V 1
t 5 . 8K
30. I K 7
t p i; :l: J x
:!: I X

NJM082QT NJM0820T
- J SV 1

Rl2
K 90 . 9K
:l: J x

:lK

Rt7
5K
R25
1 5 . 5K
:!: I X

C9 Cl I
350 350
:I: 1 7. :1: 1 x

CIO Ct2
3000 3000
:l: J X :!: I X

R24
+ 1 5V 1
1 5 . 6K
:!: I X

NJM062DT

R2t
90 . 9K Ct3
0.1 P28 J28
>f-1no

07 1I
:1: 1 %
2 OUT
R25
i!OO K
I
I
I I
>f-A . CNO

I
I
I
. .,,,

3 KHZ BAND PASS FILTER OPT9

 VP-7722P

VI PA LH- 1 l o '? E:

Wi;:) I N -----<< 9 r;

<
¥
, A·��D �

~
4.

R3
3

4.C?-1 �
- r; v, 1 /'.

)
\J
R �

< < 1 r;.v.

lo
- A l�V

tI �":
{, w.

...-..,
3SV

�6

) A-ISV
< S" <
lo
- 1';1/,

rI
w.

3
- c

4 7,,..
:3 S V

\7
< 4

J
WT;:> ON

< .:!

j.
D·<:.N v

A-G-Nv <
�/
?.ID

//
I
 6:-30 ';

C J
IO.)J
�'S"

'I
&· P

�
>- wm o
vr

I
R4
l o "-.

RI I > A ·GN £)

rI
=! .q2 1:::
I /.
t .2 k;.
•

t ....

20 KHZ LOW PASS FILTER OPT6