Ahsonullah University oh Soienee B Technology Deparchment oh Compuctere Seicne B Engineercing Qourse No: OSE 2214 Course THe : Bed Ny ee oa Preagrearnming sessional Dede of Perclremanee; 02/05/2029 Date ob Submiseion? 09/05 (202% Submitted “To : Ms. “Tahsin Aziz Ms Nowrdin Talbassum Zubwitled By- Gireoap 1 CL Name + dbn Omar 1D g 202)0104121 Sections A &Question 1) How can oomputere ec ceele| perchorc- wmanee benetit freon aaahe memored 2 Answer: Cyshe re 15 type at computerc memory ict ty destand +o store freequent ly oeresed arta ond tnstreuctions in a lo ection ct con be qulaly cated by “Hae prreetsore When yaure compictere peeds to oeaess deta quia. but aartt Pind t+ in anche, th will look fore th within Phe Random Aaaats Memary (RAM). RAM 5 Hu math type ch awmpelere oes net stores firferemaction and preartam — preeceesé: H's fell away rom | the @PD than Ce LAY and tott as Pash | i acrkaally 100 Hines faster. —Haan anche 15 | elandacd RAM. | Cowhe memory aan reduse he memory acces sHme ore the ime 4 ctokes tore the Privo aessore to acess = data ticom Hae ain | memory, H's beenuse the cache 13 muchalosere to he z : osere to the preoeessore “Hiah main memo: So dele can be acacssed mort quialeys Tee anche meworey shores breequarrty used dicks and fnatrenctions. the preoeessore aah reclreine -this dela winch wore quiakly Hun ah tb tant to fateh it from ain memorey ore cdlisk etorcage. Cache memory con also help to improve memory bandwidth. This i5 becaute arta thet is Hreequertty used is Storad tn the Rees reducing +e need fore He preo easerre +o access main memory: This 5 how aathe wrcmercy con reesubt in eu honainy computer preoess ds perctore mayer.Diseuss — bus aonneatHons of io de vatercooompuchere wrth appreoprel® sa aaa | Answer 7 cpmmuntacts with memory and | A preoce so0mt ich treave | To circeutts by using atgnals th along a 4et of wires ore connections dallest buses sth aonnect +h arffercent aomporescts, Source pra three ldinek of siqmmb: acldree. date and aowtrol, And Hera are “Hares buses! | addmss bus databus and aovtreo] bus. } | Address Bus Datla Bus Faget: Bus Aonneetfons of a Mieroaompulett| - aowtreel ou To remd tHe camber of A memory foaction, the CPU places “He address of Fhe memory loartion on Hu edlrcees bus, and it ruceives Ht data, serrt ET He memory circentts, on te dah bus A aortral etquel ts requires sto jneforan “the memory perctorm a read operestion. “The OPU sends vel onthe aortreol bie.