Professional Documents
Culture Documents
AND
MICROCONTROLLERS
By
P.A.Sravanthi
Asst.Prof.,
ECE Dept.,
GMRIT
Evolution of
Microprocessors
Bus structure of 8086 based computer system:
• - A set of conductors, used for communicating
information between the components in a
computer system is called System-Bus.
• - Internal Bus: connects two minor components
within a major component (or IC), such the
connection between the control unit and internal
registers of the MPU)
• - External Bus: connects two major components,
such as MPU and an interface (Memory or
input/output).
• Although some systems include more than one
external bus, 8086 and 8088 processors contain
one bus called system-bus.
• Typical system-bus includes; Address-bus
(carries physical address of memory storages
or input/output locations), Data-bus (carries
data to be read or written into MPU registers)
and Control-bus(carries information to control
the read or write operation).
Flag register (8-bit)
Instruction set of 8086
1. Data copy/Transfer instructions
2. Arithmetic and Logical instructions
3. Branch instructions
4. Loop instructions
5. Machine control instructions
6. Flag Manipulation instructions
7. Shift and Rotate instructions
8. String instructions
Procedures and Macros
Writing and using Procedures
• To avoid writing the sequence of instructions
in the program each time, we can write the
sequence as a separate subprogram called a
procedure
47
Contd..
• A RET instruction at the end of the procedure
returns execution to the next instruction in
the main line
48
MAINLINE OR CALLING
PROGRAM
PROCEDURE
INSTRUCTIONS
CALL
NEXT MAINLINE
INSTRUCTIONS
RET
49
Main Line Instructions
Lower level
Procedure Procedure
CALL CALL
Next Main Line
Instructions
RET
RET
50
8086 CALL and RET Instructions
• A CALL instruction in the mainline program
loads the Instruction Pointer and in some
cases also the code segment register with the
starting address of the procedure
51
The CALL Instruction Overview
• The 8086 CALL instruction performs 2 operations
when it executes
52
Contd..
• If the CALL is to a procedure in the same code
segment, then the call is near, and only the
instruction pointer contents will be saved on
the stack
54
The CALL and RET instructions
The 8086 RET instruction:
• When 8086 does near call it saves the instruction
pointer value after the CALL instruction on to the
stack.
…
…
DISPLAY MSG1
…
DISPLAY MSG2
…
…
Macros vs Procedures
• Disadvantage
– assembler copies the macro code into the program at each
macro invocation
– if the number of macro invocations within the program is
large then the program will be much larger than when
using procedures
EENG4005
Procedure
ASSUME CS:CODE, DS:DATA PROCEDURE PROC NEAR
DATA SEGMENT
XOR CL,CL
N1 DW 2458H
N2 DW 8956H ADD AL,BL
OUTPUT DW 02H DUP(0) ADC AH,BH
DATA ENDS JNC XYZ
CODE SEGMENT INC CL
START: MOV AX,DATA
XYZ: RET
MOV DS,AX
MOV AX,N1 PROCEDURE ENDP
MOV BX,N2 CODE ENDS
CALL PROCEDURE END START
MOV [OUTPUT],AX
MOV [OUTPUT+2],CL
HLT
MACROS
ASSUME CS:CODE, DS:DATA CODE SEGMENT
DATA SEGMENT START: MOV AX,DATA
MSG1 DB 10,13,”GMRIT” MOV DS,AX
MSG2 DB 10,13,”RAJAM” XYZ MSG1
DATA ENDS XYZ MSG2
XYZ MACRO MSG HLT
MOV AH,09H CODE ENDS
LEA MSG END START
INT 21H
ENDM
PROGRAMMABLE PERIPHERAL
INTERFACE -8255
Features:
• It is a programmable device.
A1 A0 Select
0 0 PA
0 1 PB
1 0 PC
Control
1 1
reg.
Block Diagram
Data Bus buffer:
• It is a 8-bit bidirectional Data bus.
PORT A:
• This is a 8-bit buffered I/O latch.
• It can be programmed by mode 0 , mode 1, mode 2 .
PORT B:
• This is a 8-bit buffer I/O latch.
• It can be programmed by mode 0 and mode 1.
PORT C:
• This is a 8-bit Unlatched buffer Input and an Output latch.
• It is splitted into two parts.
• It can be programmed by bit set/reset operation.
Operation modes:
Bit Set/Reset Mode(BSR):
• The PORT C can be Set or Reset by sending OUT instruction to the
CONTROL registers.
I/O Modes:
MODE 0 (Simple input / Output):
• In this mode , port A, port B and port C is used as individually
(Simply).
• Features:
• Outputs are latched , Inputs are buffered not latched.
• Ports do not have Handshake or interrupt capability.
ROL ; reading port C upper and
JNC WAIT ; rotating through carry.
IN AL,Port A ; If EOC, read digital equivalent in AL
HLT ; Stop
8257 DMA Controller
Pin Diagram of 8257
Interfacing a DMA controller with a system
Mode Set Register
Status Register
8257 Register Selection
Type 0 interrupts: This interrupt is also known as the divide by zero
interrupt. For cases where the quotient becomes particularly large to be
placed / adjusted an error might occur.
Type 1 interrupts: This is also known as the single step interrupt. This type
of interrupt is primarily used for debugging purposes in assembly language.