You are on page 1of 8

Elements of Computing Systems-1

Combinational Logic (Part 3)

Dr. Jyothish Lal G, Assistant Professor (Sr. Gr)


Department of AI / Center for Computational Engineering and Networking (CEN)
Amrita School of AI, Coimbatore
Acknowledgment: Prof. Noam Nisan, Prof. Shimon Schocken
Carry look-ahead adder
• Consider the ith stage in the addition process
• We define a carry generate and carry
propagate function as
G i = Ai B i
Pi = Ai  B i

When Ai=1, Bi=1, there will be a carry generation


When Ai=0, Bi=1 or Ai=1, Bi=0 there will be carry propagation Ci+1=Gi+PiCi

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 2


Ci+1
=G +P C
Design of 4 bit Carry Look Ahead Logic
i i i
4 AND2, 2 AND3 s, 1 AND4, 2
OR2, 1 OR3, 1 OR4 gates required

4
2

1
2
1
3

1
1 2

1
1

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 3


EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 4
CLA Without Full adder

So we need XOR gates only to get the sum

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 5


EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 6
Hack exercise
• Implement 4-bit Carry look-ahead adder

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 7


Thank You

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 8

You might also like