BABU BANARASI DAS

NORTHERN INDIA INSTITUTE OF TECHNOLOGY, LUCKNOW

B. TECH. – MODEL PAPER
ACADEMIC SESSION 2022-23(EVEN SEMESTER) @ SECOND YEAR

Microprocessors (KCS-403)
Time: 3hrs Max Marks: 100
NOTE: Attempt all sections
SECTION A
Q01. Attempt ALL parts in brief: [10x 02 =20]
CO
1A If the 8085 adds 87H and 79H, specify the contents of the accumulator and the status of the S, Z, and CY 2
flags.
1B What is advantages of assembly language? 1
1C If the memory chip size is 256X1 bits, how many chips are required to make up 1K bytes of memory? 1
1D What physical address is represented by:(i) 4370 : 561E H (ii) 7A32 : 0028 H 3

1E How does the microprocessor differentiate between data and instruction? 1

1F Compare RET and POP instruction in microprocessor. 2
1G Explain the following assembler directives: 3
(i) DT (ii) ENDP
1H What is microprocessor ? Give power supply and clock frequency of 8085. 2
1I How DMA Operations are Performed? 5

1J What is maskable and non maskable interrupt in 8085? 4

SECTION B
Q 02 Attempt any THREE Questions from this section [03 x 10 =30]
2A Explain addressing modes of 8085 microprocessor with examples. 2
2B Write an ALP for 8085 to arrange the five numbers in ascending order. 4
2C In mode 1 what are the control signals when ports A and B act as input ports. Discuss the control signals. 5
Draw the timing waveforms for such a strobed input.
2D Define the meaning of interrupt and discuss all type of interrupts of 8085 Microprocessor. 2
2E How Instruction cycle, Machine Cycle, Clock Cycle and T-States are related to each other? Explain them 2
with proper sketches ? Draw Timing diagram of SUI 28H.
2F Write a program to move blocks of bits from source location starting at 2500 to destination 4
location starting from 2600 where size of blocks is 05 bytes.

SECTION C
Attempt all question from this section [05 x 10 =50]
Q 03 Attempt any TWO Parts of the Following [05 x 02 = 10]
3A Interface one 1K x8 EPROMs and one 4K x8 RAM chips with 8085. Draw suitable memory map also. 2
3B Write down the differences between minimum and maximum mode of 8086. 3
3C Write down the differences between 8085 and 8086. 3
Q 04 Attempt any TWO Parts of the Following [05 x 02 = 10]
4A Write the short note on ‘Evolution of Microprocessor’ 1
4B Describe the function of following pins in 8085.i) READY ii) IO/M’ iii)HOLD &HLDA’ iv)ALE 2

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 4C What is segmentation? Give usages, advantages of segmentation. 3
Q 05 Attempt any TWO Parts of the Following [05 x 02 = 10]
5A Explain the all flags of 8086 microprocessor and also draw the flag register. 3
5B Write the difference between I/O mapped I/O and memory mapped I/O. 1
5C Write an ALP for 8085 microprocessor to multiply two 8 bit numbers stored in memory locations 2300H 4
and 2301H . Store the result in memory locations 2500H and 2501H.
Q 06 Attempt any TWO Parts of the Following [05 x 02 = 10]
6A Explain the 8253 control word format and setup the 8253 as a square wave generator with 1 ms period if 5
the input frequency to 8253 is 1MHz.
6B Explain the working of bus De-Multiplexing with the help of appropriate diagram of 8085 microprocessor. 2
6C ̅ (ii) DEN (iii) ̅̅̅̅̅̅̅
Briefly explain the following pins of 8086 microprocessor- (i) DT/ R LOCK (iv) MN 3
̅̅̅̅̅
/ MX
Q 07 Attempt any TWO Parts of the Following [05 x 02 = 10]
7A Write down the main effect and addressing mode in the following instruction- 2
(i) DAA (ii) DAD Reg. Pair iii) STAX Reg. Pair iv)CPI 8-bit data v) RLC
7B Explain Looping, Counting and Indexing. 4
7C Write a delay routine to produce a time delay of 0.5 msec in 8085 processor-based system whose clock 4
source is 6 MHz quartz crystal.

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 MODEL PAPER SOLUTION
Microprocessors (KCS-403)

SECTION A

1A If the 8085 adds 87H and 79H, specify the contents of the accumulator and the status of the S, Z, and
CY flags.
Ans The sum of 87H and 79H=100H. Therefore, the accumulator will have 00H, and the flags will be S=0, Z=1,
: CY=1

1B What is advantages of assembly language?

Ans Advantages of assembly language
: It allows complex jobs to run in a simpler way.
It is memory efficient, as it requires less memory.
It is faster in speed, as its execution time is less.
It is mainly hardware oriented.
It requires less instruction to get the result.
It is used for critical jobs.
It is not required to keep track of memory locations.
It is a low-level embedded system.

1C If the memory chip size is 256X1 bits, how many chips are required to make up 1K bytes of memory?
Ans 1K bytes = 1024 bytes = (1024*8) bits
:
(1024*8) / (256*1) = 32 .

Therefore 32 memory chip size is 256X1 bits are required to build 1K bytes of memory

1D What physical address is represented by:(i) 4370 : 561E H (ii) 7A32 : 0028 H
Ans
: It is calculated by using this formula: physical address=segment address * 10H + offset address
i) 4370 : 561E H
segment address=4370 H
offset address=561E H
physical address= 4370* 10H + 561E H= 48D1E H
ii) 7A32 : 0028 H
segment address=7A32 H
offset address=0028 H
physical address= 7A32* 10H + 0028 H= 7A348 H

1E How does the microprocessor differentiate between data and instruction?

Ans
:

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 When the first m/c code of an instruction is fetched and decoded in the instruction register, the
microprocessor recognizes the number of bytes required to fetch the entire instruction. For example MVI A,
Data, the second byte is always considered as data

1F Compare RET and POP instruction in microprocessor.

Ans
: The programmer uses the instruction PUSH to save the contents of the register pair on the stack. RET
transfers the contents of the top two locations of the stack to the PC. POP transfers the contents of the top
two locations of the stack to the specified register pair. H
1G Explain the following assembler directives:
(i) DT (ii) ENDP

Ans DT: Define Ten Bytes: The DT directive directs the assembler to define the specified variable requiring 10-
: bytes for its storage and initialize the 10-bytes with the specified values.
ENDP: END Of Procedure: The ENDP directive is used to indicate the end of a procedure.

1H What is microprocessor ? Give power supply and clock frequency of 8085.

Ans A microprocessor is a multipurpose, programmable logic device that reads binary instructions from a storage
: device called memory accepts binary data as input and processes data according to those instructions and
provides result as output. The power supply of 8085 is +5V and clock frequency in 3MHz.
1I How DMA Operations are Performed?
Ans Following is the sequence of operations performed by a DMA −
: Initially, when any device has to send data between the device and the memory, the device has to send DMA
request (DRQ) to DMA controller.
The DMA controller sends Hold request (HRQ) to the CPU and waits for the CPU to assert the HLDA.
Then the microprocessor tri-states all the data bus, address bus, and control bus. The CPU leaves the control
over bus and acknowledges the HOLD request through HLDA signal.
Now the CPU is in HOLD state and the DMA controller has to manage the operations over buses between
the CPU, memory, and I/O devices.
1J What is maskable and non maskable interrupt in 8085?
Ans Maskable Interrupts are those which can be disabled or ignored by the microprocessor. ... INTR, RST 7.5,
: RST 6.5, RST 5.5 are maskable interrupts in 8085 microprocessor. Non-Maskable Interrupts are those which
cannot be disabled or ignored by microprocessor. TRAP is a non-maskable interrupt.

SECTION B

2A
Explain addressing modes of 8085 microprocessor with examples.
Ans Every instruction of a program has to operate on a data. The method of specifying the data to be
: operated by the instruction is called Addressing.
The 8085 has the following 5 different types of addressing.
1. Immediate Addressing
2. Direct Addressing
3. Register Addressing
4. Register Indirect Addressing
5. Implied Addressing
Immediate Addressing: In immediate addressing mode, the data is specified in the instruction
itself. The data will be a part of the program instruction. All instructions that have ‘I’ in their
mnemonics are of Immediate addressing type .

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 Eg. MVI B, 3EH - Move the data 3EH given in the instruction to B register.
Direct Addressing: In direct addressing mode, the address of the data is specified in the
instruction. The data will be in memory. In this addressing mode, the program instructions and
data can be stored in different memory blocks. This type of addressing can be identified by 16-bit
address present in the instruction
.Eg. LDA 1050H - Load the data available in memory location 1050H in accumulator.
Register Addressing :In register addressing mode, the instruction specifies the name of the
register in which the data isavailable. This type of addressing can be identified by register names
(such as ‘A’, ‘B’, ..) in the instruction.
Eg. MOV A, B -Move the content of B register to A register.
Register Indirect: Addressing In register indirect addressing mode, the instruction specifies the
name of the register in which theaddress of the data is available. Here the data will be in memory
and the address will be in the register pair. This type of addressing can be identified by letter ‘M’
present in the instruction.
Eg. MOV A, M - The memory data addressed by HL pair is moved to A register.
Implied Addressing: In implied addressing mode, the instruction itself specifies the type of
operation and location of data to be operated. This type of instruction does not have any address,
register name, immediate data specified along with it.
.Eg. CMA - Complement the content of accumulator.

Write an ALP for 8085 to arrange the five numbers in ascending order.
2B
Ans Algorithm
:
1. Initialize HL pair as memory pointer
2. Get the count at 4200 into C - register
3. Copy it in D - register (for bubble sort (N-1) times required)
4. Get the first value in A - register
5. Compare it with the value at next location
6. If they are out of order, exchange the contents of A - register and Memory
7. Decrement D - register content by 1
8. Repeat steps 5 and 7 till the value in D- register become zero
9. Decrement C - register content by 1
10. Repeat steps 3 to 9 till the value in C - register becomes zero

Program :
LXI H,5000 ;Set pointer for array
MOV C,M ;Load the Count
DCR C ;Decrement Count
REPEAT: MOV D,C
LXI H,5001
LOOP: MOV A,M ;copy content of memory location to Accumulator
INX H
CMP M
JC SKIP ;jump to skip if carry generated
MOV B,M ;copy content of memory location to B - Register
MOV M,A ;copy content of Accumulator to memory location
DCX H ;Decrement content of HL pair of registers

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 MOV M,B ;copy content of B - Register to memory location
INX H ;Increment content of HL pair of registers
SKIP: DCR D ;Decrement content of Register - D
JNZ LOOP ;jump to loop if not equal to zero
DCR C ;Decrement count
JNZ REPEAT ;jump to repeat if not equal to zero
HLT ;Terminate Program
In mode 1 what are the control signals when ports A and B act as input ports.
2C
Discuss the control signals. Draw the timing waveforms for such a strobed
input.
Ans.
The following are the control signals when ports A and B act as input ports (under mode 1)
STBA , IBFA, INTEA for Port A and STBB , IBFB, INTEB for Port B, respectively. The details
about the input control signals are discussed below:
STB (Strobe input): This is an active low signal generated by a peripheral device. When a
peripheral device has some valid data, it sends the same via Port A or B and ææææ sends a low
STB signal. This data is accepted by 8255 and it generates a IBF and INTR (provided INTE is set
previously).
IBF (Input buffer full): On receipt of STB signal from peripheral device, data is stored in 8255
by its input latch. In its turn, 8255 generates a high IBF. IBF is reset when CPU reads the data.
INTR (Interrupt request): This active high output signal is generated only if STB , IBF and
INTE are all set at the same time. This signal interrupts the CPU via its INTR (pin no. 10 of
8085).
INTE (Interrupt Enable): This is an internal F/F which can be set/reset using the BSR mode. It
must be set if INTR signal is to be effective.
The following figure shows Port A in Mode 1 (input), along with the timing diagrams.

2D Define the meaning of interrupt and discuss all type of interrupts of 8085 Microprocessor.
Interrupt is a signal send by an external device to the processor, to the processor to perform a
particular task or work. Mainly in the microprocessor based system the interrupts are used for data
transfer between the peripheral and the microprocessor.When a peripheral is ready for data transfer,
it interrupts the processor by sending an appropriate signal to the interrupt pin of the processor. If
the processor accepts the interrupt then the processor suspends its current activity and executes an
interrupt service subroutine to complete the data transfer between the peripheral and processor.

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 After executing the interrupt service routine the processor resumes its current activity. This type of
data transfer scheme is called interrupt driven data transfer scheme.

8085 supports two types of interrupts. They are

1. Hardware interrupts-

• Peripheral device activates interrupt by activating the respective pin.

• In response to the interrupt request, microprocessor completes the current instruction
execution in main program and transfer program control to interrupt service routine.
• In ISR routine, required task is completed. Task may be to read data, to write data, to
update the status, to update the counter etc.
• After completing the task, the program control is transferred back to the main
program.These types of interrupts where the microprocessor pins are used to receive
interrupt requests are called hardware interrupts.
• The microprocessor 8085 has five hardware interrupts. They are TRAP, RST 7.5, RST
6.5, RST 5.5 and INTR.

TRAP:

• It is a non-mask-able edge and level triggered interrupt.

• It is unaffected by any mask or interrupt enable.
• The TRAP signal must make a LOW to HIGH transition and remain HIGH until
acknowledged. This avoids false triggering due to noise or glitches.
• It has the highest priority among all interrupts.
• This interrupt transfers the microprocessor’s control to location 0024 H.

RST 7.5:

• It is mask-able, edge triggered interrupt request input line. This interrupt is triggered at
the rising edge of the signal.
• It has highest priority among all mask-able interrupts and second priority among all
interrupts.
• The interrupt vector location for this interrupt is 003C H.

RST 6.5 and RST 5.5:

• These are level triggered, mask-able interrupt request input lines.

• RST 6.5 transfers microprocessor’s control to location 0034 H while RST 5.5 transfers
microprocessor’s control to location 002C H.

INTR:

• It is level triggered, mask-able interrupt request input line.

• This interrupt works in conjunction with RST N or CALL instruction.

1. Software interrupts-

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 • In case of software interrupts the cause of the interrupt is the execution of the instruction.
• The microprocessor 8085 has eight instructions. These eight instructions are RST 0 to
RST 7. Such interrupts are called as software interrupts.
• They allow the microprocessor to transfer program control from the main program to the
subroutine program i.e. predefined service routine addresses.
• Predefined service routine is also referred to as ISR.
• After completing the subroutine program, the program control returns back to the main
program.
• The vector locations for RST N instruction are as follows-

Instruction Address of ISR

RST 0 0000H (8x0) = 0000H
RST 1 0008H (8x1) = 0008H
RST 2 0010H (8x2) = 0010H
RST 3 0018H (8x3) = 0018H
RST 4 0020H (8x4) = 0020H
RST 5 0028H (8x5) = 0028H
RST 6 0030H (8x6) = 0030H
RST 7 0038H (8x7) = 0038H

• The difference between two successive locations is only 8 bytes. Hence jump instruction
must be stored into corresponding location to transfer microprocessor’s control to user
defined ISR address.
• Software interrupts are not used to handle asynchronous events. They are used to call
software routines like single step, break point etc.

How Instruction cycle, Machine Cycle, Clock Cycle and T-States are related to each other? Draw
2E
the timing diagram for opcode fetch, Memory Read &Write of 8085 processor.
Ans
: Timing Diagram is a graphical representation. It represents the execution time taken by each
instruction in a graphical format. The execution time is represented in T-states.Instruction
Cycle:The time required to execute an instruction is called instruction cycle.Machine Cycle:The
time required to access the memory or input/output devices is called machine cycle.T-State:•The
machine cycle and instruction cycle takes multiple clock periods. •A portion of an operation
carried out in one system clock period is called as T-state.
Opcode fetch:
The microprocessor requires instructions to perform any particular action. In order to perform
these actions microprocessor utilizes Opcode which is a part of an instruction which provides
detail(ie. Which operation µp needs to perform) to microprocessor.

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 Operation:
• During T1 state, microprocessor uses IO/M(bar), S0, S1 signals are used to instruct
microprocessor to fetch opcode.
• Thus when IO/M(bar)=0, S0=S1= 1, it indicates opcode fetch operation.
• During this operation 8085 transmits 16-bit address and also uses ALE signal for address
latching.
• At T2 state microprocessor uses read signal and make data ready from that memory location to
read opcode from memory and at the same time program counter increments by 1 and points next
instruction to be fetched.
• In this state microprocessor also checks READY input signal, if this pin is at low logic level ie.
'0' then microprocessor adds wait state immediately between T2 and T3.
• At T3, microprocessor reads opcode and store it into instruction register to decode it further.
• During T4 microprocessor performs internal operation like decoding opcode and providing
necessary actions.
• The opcode is decoded to know whether T5 or T6 states are required, if they are not required
then µp performs next operation.
Memory Read:
Operation:
• It is used to fetch one byte from the memory.
• It requires 3 T-States.
• It can be used to fetch operand or data from the memory.
• During T1, A8-A15 contains higher byte of address. At the same time ALE is high. Therefore
Lower byte of address A0-A7 is selected from AD0-AD7.
• Since it is memory ready operation, IO/M(bar) goes low.
• During T2 ALE goes low, RD(bar) goes low. Address is removed from AD0-AD7 and data
D0-D7 appears on AD0-AD7.
• During T3, Data remains on AD0-AD7 till RD(bar) is at low signal.

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 Memory Write:
Operation:
• It is used to send one byte into memory.
• It requires 3 T-States.
• During T1, ALE is high and contains lower address A0-A7 from AD0-AD7.
• A8-A15 contains higher byte of address.
• As it is memory operation, IO/M(bar) goes low.
• During T2, ALE goes low, WR(bar) goes low and Address is removed from AD0-AD7 and
then data appears on AD0-AD7.
• Data remains on AD0-AD7 till WR(bar) is low.

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 2F Write a program to move blocks of bits from source location starting at 2500 to destination
location starting from 2600 where size of blocks is 05 bytes.

Ans Algorithm –
:
1. Load register pair H-L with the address 2500H
2. Load register pair D-E with the address 2600H
3. Move the content at memory location into accumulator
4. Store the content of accumulator into memory pointed by D-E
5. Increment value of register pair H-L and D-E by 1
6. Decrements value of register C by 1
7. If zero flag not equal to 1, go to step 3
8. Stop

PROGRAM:

Mnemonics Operands Comment

MVI C, 05 [C] <- 05
LXI H, 2500 [H-L] <- 2500
LXI D, 2600 [D-E] <- 2600
MOV A, M [A] <- [[H-L]]
STAX D [A] -> [[D-E]]
INX H [H-L] <- [H-L] + 1
INX D [D-E] <- [D-E] + 1
DCR C [C] <- [C] – 1
JNZ 2008 Jump if not zero to 2008
HLT Stop

Explanation – Registers A, D, E, H, L, C are used for general purpose:

1. MOV is used to transfer the data from memory to accumulator (1 Byte)

2. LXI is used to load register pair immediately using 16-bit address (3 Byte instruction)
3. MVI is used to move data immediately into any of registers (2 Byte)
4. STAX is used to store accumulator into register pair indirectly (3 Byte instruction)
5. DCR is used to decrease register by 1 (1 Byte instruction)
6. INX is used to increase register pair by 1 (1 Byte instruction)
7. JNZ is used to jump if not zero to given memory location (3 Byte instruction)
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 8. HLT is used to halt the program

SECTION C

Interface one 1K x8 EPROMs and one 4K x8 RAM chips with 8085. Draw suitable memory map also.
3A
An
s:

3B write down the differences between minimum and maximum mode of 8086.

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 3C Write down the differences between 8085 and 8086.
An
s:

4A Write the short note on ‘Evolution of Microprocessor’.

An Evolution of Microprocessors
s:

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 4-bit Microprocessors: The first microprocessor was introduced in 1971 by Intel Corp. It was named Intel
4004 as it was a 4 bit processor. It was a processor on a single chip. It could perform simple arithmetic and
logic operations such as addition, subtraction, boolean AND and boolean OR. It had a control unit capable
of performing control functions like fetching an instruction from memory, decoding it, and generating control
pulses to execute it. It was able to operate on 4 bits of data at a time.This first microprocessor was quite a
success in industry. Soon other microprocessors were also introduced. Intel introduced the enhanced version
of 4004, the 4040.
8-bit Microprocessors: The first 8 bit microprocessor which could perform arithmetic and logic operations
on 8 bit words was introduced in 1973 again by Intel. This was Intel 8008 and was later followed by an
improved version, Intel 8088. Some other 8 bit processors are Zilog-80 and Motorola M6800.
16-bit Microprocessors The 8-bit processors were followed by 16 bit processors. They are Intel 8086 and
80286.
32-bit Microprocessors : The 32 bit microprocessors were introduced by several companies but the most
popular one is Intel 80386.
Pentium Series :Instead of 80586, Intel came out with a new processor namely Pentium processor. Its
performance is closer to RISC performance. Pentium was followed by Pentium Pro CPU. Pentium Pro allows
multiple CPUs in a single system in order to achieve multiprocessing.The MMX extension was added to
Pentium Pro and the result was Pentiuum II. The Pentium III provided high performance floating point
operations for certain types of computations by using the SIMD extensions to the instruction set. These new
instructions makesthe Pentium III faster than high-end RISC CPUs.

4B Describe the function of following pins in 8085.i) READY ii) IO/M’ iii)HOLD &HLDA’ iv)ALE
An
s:
Ready: This is an active high input control signal. It is used by microprocessor to detect whether
a peripheral has completed (or is Ready for) the data transfer or not. The main function of this
pin is to synchronize slower peripheral to faster microprocessor.
IO/M’: It is a status signal. It is used to differentiate between memory locations and I/O
operations. When this signal is low (IO/M = 0) it denotes the memory related operations. When
this signal is high (10/M = 1) it denotes an I/O operation.
HOLD: This signal indicates that another master is requesting for the use of address
bus, data bus and control bus.
HLDA (i.e Hold-Acknowledge) is an Output-signal which is used by the 8085 Microprocessor
which passes an acknowledgement-signal to HOLD that the HOLD-Request has been received by
the 8085 Microprocessor & it will withdraw the Buses in the next clock cycle.
ALE is address latch enable signal which is used to demultiplex the address/data bus. It is
connected to enable pin of latch.During the first T state of any instruction cycle ALE is high
indicating address is available on multiplexed higher order address/data bus which can be latched

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 in to latch Ic.when ALE is low it indicates that the address is latced in the latch and higher order
multiplexed address/data bus is carrying data.
4C What is segmentation? Give usages, advantages of segmentation

An Segmentation is the process in which the main memory of the computer is logically divided into
s: different segments and each segment has its own base address. It is basically used to enhance the
speed of execution of the computer system, so that the processor is able to fetch and execute the
data from the memory easily and fast.

Need for Segmentation –

The Bus Interface Unit (BIU) contains four 16 bit special purpose registers (mentioned below)
called as Segment Registers.

• Code segment register (CS): is used for addressing memory location in the code segment
of the memory, where the executable program is stored.
• Data segment register (DS): points to the data segment of the memory where the data is
stored.
• Extra Segment Register (ES): also refers to a segment in the memory which is another
data segment in the memory.
• Stack Segment Register (SS): is used for addressing stack segment of the memory. The
stack segment is that segment of memory which is used to store stack data.

The number of address lines in 8086 is 20, 8086 BIU will send 20bit address, so as to access one
of the 1MB memory locations. The four segment registers actually contain the upper 16 bits of the
starting addresses of the four memory segments of 64 KB each with which the 8086 is working at
that instant of time. A segment is a logical unit of memory that may be up to 64 kilobytes long.
Each segment is made up of contiguous memory locations. It is an independent, separately
addressable unit. Starting address will always be changing. It will not be fixed. Note that the 8086
does not work the whole 1MB memory at any given time. However, it works only with four 64KB
segments within the whole 1MB memory.Below is the one way of positioning four 64 kilobyte
segments within the 1M byte memory space of an 8086.Types Of Segmentation –

1. Overlapping Segment – A segment starts at a particular address and its maximum size
can go up to 64kilobytes. But if another segment starts along with this 64kilobytes location
of the first segment, then the two are said to be Overlapping Segment.
2. Non-Overlapped Segment – A segment starts at a particular address and its maximum
size can go up to 64kilobytes. But if another segment starts before this 64kilobytes
location of the first segment, then the two segments are said to be Non-Overlapped
Segment.

Rules of Segmentation Segmentation process follows some rules as follows:

• The starting address of a segment should be such that it can be evenly divided by 16.
• Minimum size of a segment can be 16 bytes and the maximum can be 64 kB.

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 Advantages of the Segmentation The main advantages of segmentation are as follows:

• It provides a powerful memory management mechanism.

• Data related or stack related operations can be performed in different segments.
• Code related operation can be done in separate code segments.
• It allows to processes to easily share data.
• It allows to extend the address ability of the processor, i.e. segmentation allows the use of
16 bit registers to give an addressing capability of 1 Megabytes. Without segmentation, it
would require 20 bit registers.
• It is possible to enhance the memory size of code data or stack segments beyond 64 KB by
allotting more than one segment for each area.

Explain the all flags of 8086 microprocessor and also draw the flag register.
5A The Flag register is a Special Purpose Register. Depending upon the value of result after any
An arithmetic and logical operation the flag bits become set (1) or reset (0).
s:

There are total 9 flags in 8086 and the flag register is divided into two types:

(a) Status Flags – There are 6 flag registers in 8086 microprocessor which become set(1) or
reset(0) depending upon condition after either 8-bit or 16-bit operation. These flags are
conditional/status flags. 5 of these flags are same as in case of 8085 microprocessor and their
working is also same as in 8085 microprocessor. The sixth one is the overflow flag.

The 6 status flags are:

1. Sign Flag (S) – After any operation if the MSB (B(7)) of the result is 1, it indicates the
number is negative and the sign flag becomes set, i.e. 1. If the MSB is 0, it indicates the
number is positive and the sign flag becomes reset i.e. 0.
1- MSB is 1 (negative)
0- MSB is 0 (positive)

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 2. Zero Flag (Z) – After any arithmetical or logical operation if the result is 0 (00)H, the zero
flag becomes set i.e. 1, otherwise it becomes reset i.e. 0.
00H zero flag is 1.
1- zero result
0- non-zero result
3. Auxiliary Carry Flag (AC) – This flag is used in BCD number system(0-9). If after any
arithmetic or logical operation D(3) generates any carry and passes on to B(4) this flag
becomes set i.e. 1, otherwise it becomes reset i.e. 0. This is the only flag register which is
not accessible by the programmer

1-carry out from bit 3 on addition or borrow into bit 3 on subtraction

0-otherwise

4. Parity Flag (P) – If after any arithmetic or logical operation the result has even parity, an
even number of 1 bits, the parity register becomes set i.e. 1, otherwise it becomes reset i.e.
0.

1-accumulator has even number of 1 bits

0-accumulator has odd parity.

5. Carry Flag (CY) – Carry is generated when performing n bit operations and the result is
more than n bits, then this flag becomes set i.e. 1, otherwise it becomes reset i.e. 0.
During subtraction (A-B), if A>B it becomes reset and if (A<B) it becomes set.
Carry flag is also called borrow flag.

1-carry out from MSB bit on addition or borrow into MSB bit on subtraction
0-no carry out or borrow into MSB bit

6. Overflow Flag (O) – This flag will be set (1) if the result of a signed operation is too large
to fit in the number of bits available to represent it, otherwise reset (0). After any
operation, if D[6] generates any carry and passes to D[7] OR if D[6] does not generates
carry but D[7] generates, overflow flag becomes set, i.e., 1. If D[6] and D[7] both generate
carry or both do not generate any carry, then overflow flag becomes reset, i.e., 0.

(b) Control Flags – The control flags enable or disable certain operations of the microprocessor.
There are 3 control flags in 8086 microprocessor and these are:

1. Directional Flag (D) – This flag is specifically used in string instructions.

If directional flag is set (1), then access the string data from higher memory location
towards lower memory location.
If directional flag is reset (0), then access the string data from lower memory location
towards higher memory location.
2. Interrupt Flag (I) – This flag is for interrupts.
If interrupt flag is set (1), the microprocessor will recognize interrupt requests from the
peripherals.
If interrupt flag is reset (0), the microprocessor will not recognize any interrupt requests
and will ignore them.

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 3. Trap Flag (T) – This flag is used for on-chip debugging. Setting trap flag puts the
microprocessor into single step mode for debugging. In single stepping, the
microprocessor executes a instruction and enters into single step ISR.
If trap flag is set (1), the CPU automatically generates an internal interrupt after each
instruction, allowing a program to be inspected as it executes instruction by instruction.
If trap flag is reset (0), no function is performed.

5B Write the difference between I/O mapped I/O and memory mapped I/O.
An
s:

5C Write an ALP for 8085 microprocessor to multiply two 8 bit numbers stored in memory locations 2300H
and 2301H . Store the result in memory locations 2500H and 2501H.
An
s: Multiply two 8 bit numbers stored at address 2050 and 2051. Result is stored at address 3050 and
3051.

Algorithm –

1. We are taking adding the number 43 seven(7) times in this example.

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 2. As the multiplication of two 8 bit numbers can be maximum of 16 bits so we need
register pair to store the result.

Program –

Memory Address Mnemonics Comment

2000 LHLD 2050 H←2051, L←2050
2003 XCHG H↔D, L↔E
2004 MOV C, D C←D
2005 MVI D 00 D←00
2007 LXI H 0000 H←00, L←00
200A DAD D HL←HL+DE
200B DCR C C←C-1
200C JNZ 200A If Zero Flag=0, goto 200A
200F SHLD 3050 H→3051, L→3050
2012 HLT
Q 06 Attempt any TWO Parts of the Following [05 x 02 = 10]

6A Explain the 8253 control word format and write an assembly language program in 8085
microprocessor which generates 1 KHz square waveform by using counter 1 as a binary counter if
clock frequency of 8254 is 2 MHz.

Assumption – Assume the port addresses are 80 H, 81 H, 82 H, 83 H for C0(Counter 0),

C1(Counter 1), C2(Counter 2), CR(Control Register).

For the above problem, 8254 must work in Mode 3 which is the square wave generator.
Count for register is given as clock frequency / square wave frequency

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 count = 2 MHz / 1 KHz
= 2000
= (07D0) H
Now the data is 16 bit so value of RW1 = 1 and RW0 = 1 in Control Register. As we want to
select C1 (Counter 1) the value of SC1 = 0 and SC0 = 1 in Control Register. Value of M2 = 0, M1
= 1 and M2 = 1 for Mode 3 in Control Register. For binary counter value of LSB in CR is 0.

Hence the Control Register(CR) is given by,

Algorithm –

1. Move the data 76 in A

2. Display the contents of A to port 83
3. Move the data D0 in A
4. Display the contents of A to port 81
5. Move the data 07 in A
6. Display the contents of A to port 81
7. Stop

Program –

MEMORY ADDRESS MNEMONICS COMMENT

2000 MVI A 76 A <- 76
2002 OUT 83 CR <- A
2004 MVI A D0 A <- D0
2006 OUT 81 C1 <- A
2008 MVI A 07 A <- 07
200A OUT 81 C1 <- A
200C HLT Stop

Explanation–

1. MVI A 76 is used to move the content of CR(Control Register) to register A.

2. OUT 83 is used to assign the value of A to port 83 which is Control Register.
3. MVI A D0 is used to move the move the lower byte of data of Counter 1 to register A.
4. OUT 81 is used to assign the value of A to port 81 which is Counter 1.
5. MVI A 07 is used to move the move the higher byte of data of Counter 1 to register A.
6. OUT 81 is used to assign the value of A to port 81 which is Counter 1.
7. HLT is used end the program.

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 6B Explain the working of bus De-Multiplexing with the help of appropriate diagram of 8085 microprocessor.
Demultiplexing the Bus AD7– AD0•
Ans The high order address is placed on the address bus and hold for 3 clk periods, •The low order address is
: lost after the first clk period, this address needs to be hold however we need to use latch •The address AD7
– AD0 is connected as inputs to the latch 74LS373. •The ALE signal is connected to the enable (G) pin of
the latch and the OC – Output control – of the latch is grounded

6C ̅ (ii) DEN (iii) ̅̅̅̅̅̅̅

Briefly explain the following pins of 8086 microprocessor- (i) DT/ R LOCK (iv) MN
/̅̅̅̅̅
MX
Ans
: ̅
(i) DT/ R
 This output signal is used to decide the direction of date flow through the bi-directional buffer.
 If DT/ R ‘= 1 indicates transmitting
= 0 indicates receiving the data.
(ii) DEN : Data bus enable signal indicates the availability of valid data over the address/data lines.
 It is used to enable the bidirectional buffer to seprate the data from multiplexed address/data signal.
 It is active from the middle of T2 until the middle T4.
iii) ̅̅̅̅̅̅̅
LOCK :
(iv) MN /̅̅̅̅̅
MX
When MN/MX’=0 Maximum Mode
=1 Minimum Mode

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 The logic level at this pin decides whether the processor is to operate in either minimum or maximum
mode.

7A Write down the main effect and addressing mode in the following instruction-
Ans (i) DAA (ii) DAD Reg. Pair iii) STAX Reg. Pair iv)CPI 8-bit data v) RLC
: (i) DAA : The contents of the accumulator are changed from a binary value to two 4-bit binary coded
decimal (BCD) digits. This is the only instruction that uses the auxiliary flag to perform the binary to BCD
conversion, and the conversion procedure is described below. S, Z, AC, P, CY flags are altered to reflect
the results of the operation .If the value of the low-order 4-bits in the accumulator is greater than 9 or if AC
flag is set, the instruction adds 6 to the low-order four bits.If the value of the high-order 4-bits in the
accumulator is greater than 9 or if the Carry flag is set, the instruction adds 6to the high-order four bits.
ii)DAD Reg. Pair: The 16-bit contents of the specified register pair are added tothe contents of the HL
register and the sum is stored in theHL register. The contents of the source register pair are notaltered. If
the result is larger than 16 bits, the CY flag is set.No other flags are affected.Example: DAD H
iii)STAX Reg. pair: he contents of the accumulator are copied into the memorylocation specified by the
contents of the operand (registerpair). The contents of the accumulator are not altered.Example: STAX B
Compare immediate with accumulator
iv)CPI 8-bit data :The second byte (8-bit data) is compared with the contents ofthe accumulator. The
values being compared remainunchanged. The result of the comparison is shown by settingthe flags of the
PSW as follows:if (A) < data: carry flag is setif (A) = data: zero flag is setif (A) > data: carry and zero flags
are resetExample: CPI 89H
V)RLC (Rotate accumulator left ):Each binary bit of the accumulator is rotated left by oneposition. Bit
D7is placed in the position of D0as well as inthe Carry flag. CY is modified according to bit D7. S, Z,
P,AC are not affected.

7B
Explain Looping, Counting and Indexing.

Ans Looping: In this technique, the program is instructed to execute certain set of instructions
: repeatedly to execute a particular task number of times. For example, to add ten numbers
stored in the consecutive memory locations we have to perform addition ten times.

Counting: This technique allows programmer to count how many times the instruction/set
of instructions are executed.

Indexing: This technique allows programmer to point or refer the data stored in sequential
memory locations one by one. Let us see the program loop to understand looping, counting
and indexing.

The program loop is the basic structure which forces the processor to repeat a sequence of
instructions. Loops have four sections.

1 Initialization section. 2. Processing section.

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 3. Loop control section 4. Result section.

1. The initialization section establishes the starting values of

loop counters for counting how many times loop is executed,

address registers for indexing which give pointers to memory locations and

other variables

2. The actual data manipulation occurs in the processing section. This is the section which
does the work.

3. The loop control section updates counters, indices (pointers) for the next iteration.

4. The result section analyzes and stores the results

Note :The processor executes initialization section and result section only once, while it may
execute processing section and loop control section many times. Thus, the execution time of
the loop will be mainly dependent on the execution time of the processing section and loop
control section. The flowchart 1 shows typical program loop. The processing section in this
flowchart is always executed at least once. If you interchange the position ofthe processing
and loop control section then it is possible that the processing section may not be executed at
all, if necessary. Refer flowchart 2.

7C Write a delay routine to produce a time delay of 0.5 msec in 8085 processor-based system
whose clock source is 6 MHz quartz crystal.

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 Solution
The delay required is 0.5 msec, hence an 8-bit register of8085 can be used to store a Count
valueand then decrement to zero. The delay routine is written as a subroutine as shown
below.
Delay routine
MVI D, N ; Load the count value, N in D-register.
Loop: DCR D ; Decrement the count.
JNZ Loop ; If count is zero go to
RET ; Return to main program.
The following table shows the T-state required for execution of the instructions in the
subroutine.

Calculation to find the count value, N:

External clock frequency = 6 Mhz
Internal clock frequency = External Frequency / 2
=6/2
= 3 Mhz
Time period for 1 T-State = 1 / Internal clock frequency
= 1 / 3x106
= 0.333μS
No. of T-states required
for delay of 0.5mS = Required time delay / Time for one T-state
= 0.5mS / 0.333μS
= 1500.10
≈ 1500 = 150010
From above table, we know that;
14N + 32 = 1500
N = (1500 – 32) / 14 = 104.85710 ≈ 10510 = 69H
Therefore by replacing the count value, N by 69H in the above program , a delay of 0.5mSec can
be produced.

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