CSC201: Digital Logic Design

Level 2 – 1st Semester

Digital Logic Design

Section (3)

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

Application to the lecture:

1. Signed Numbers.
2. Arithmetic operations in 1’s & 2’s Complement (-,+).
3. Revision on chapter 1.

Agenda
Practical part:
1. Create (Half & Full) Adder circuit.
CSC201: Digital Logic Design
Level 2 – 1st Semester

Signed Numbers
CSC201: Digital Logic Design
Level 2 – 1st Semester

Sign Numbers:
All number explain before is a (unsigned) numbers.
There are three ways in which signed binary numbers may be expressed:
1. Signed magnitude (SM).
2. One’s complement.
3. Two’s complement.
In signed numbers representation, represent is an 8-bit:
• The sign number is a bit in the 8-bit to the left. Sign (8) Value of the number (0:7)
• The value of the number in the 7 bits to the right.

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

1. Sign Magnitude (SM):

The most significant bit (MSB): is usually the bit farthest to the left.
MSB used to represent the sign of the value.
• MSB = 0 → positive.
• MSB = 1 → negative.
Example: Represent (50) in 8-digits (+ & -): Represent (37) in 8-digits (+ & -):
50 → 011 0010 (unsigned) 37 → 010 0101(unsigned)
+50 → 0011 0010 +37 → 0010 0101
-50 → 1011 0010 -37 → 1010 0101

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

1. Sign Magnitude (SM):

Determine the decimal value of this signed binary number expressed in sign
magnitude:
Example 1: (1001 1011)2: Example 2: (0100 0011)2:

That means the number

will be a negative number That means the number
will be a positive number

16 + 8 + 2 + 1 = (-27)10 64 + 2 + 1 = (+67)10

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

2. 1’s Complement: Find 1’s Complement:

• Example 1:
5 = 00000101
Complement Digits

-5 11111010

• Example 2:
-13 = 11110011
Complement Digits

13 00001100

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

2. 1’s Complement:
Find 1’s Complement:

Binary number (unsigned) 1’S Complement

1010 0101

11010 00101

110111 001000

1011011 0100100

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

2. 1’s Complement:
Determine the decimal value of this signed binary number expressed in 1’s
Complement: (We didn't come with 1’s Complement because the number is already 1’s complement)
Example 1: (1011 0001)2: Example 2: (0110 1110)2:

That means the number That means the number

will be a negative number will be a positive number
And we will calculate And we will calculate
(original weight) - sign digit original weight only
+1

(1 + 16 + 32) - 128 + 1 = (-78)10 64+ 32 + 8 + 4 +2 = (+110)10

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

3. 2’s Complement:
• Example 1: 5 = 00000101
Complement Digits

11111010
+1
Add 1
-5 = 11111011

• Example 2: -13 = 11110011

Complement Digits

00001100
+1
Add 1
13 = 00001101

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

3. 2’s Complement:
Find 2’s Complement:

Binary number 1’S Complement 2’S Complement

1010 0101 + 1 0110

11010 00101 + 1 00110

110111 001000 + 1 001001

1011011 0100100 + 1 0100101

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

3. 2’s Complement:
Determine the decimal value of this signed binary number expressed in 2’s
Complement:
Example 1: (0101 0110)2: Example 2: (1101 0111)2:

That means the number

will be a positive number That means the number
And we will calculate will be a negative number
original weight only And we will calculate
(original weight) - sign digit

64 + 16 + 4 + 2 = (+86)10 (64 + 16 + 4 + 2 + 1) – 128 = (-41)10

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

1’s & 2’s Complement

Arithmetic operations
(+ & -)
CSC201: Digital Logic Design
Level 2 – 1st Semester

If you Have Carry or not:

1’s Compliment 2’s Compliment

we will add Carry to the result.
With Carry (+) we will Ignore Carry.
(Result + Carry)

Without Carry (-) Do 1’s compliment to the result. Do 2’s compliment to the result.

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

Practical Part
CSC201: Digital Logic Design
Level 2 – 1st Semester

Adder:
• Adder: in electronics, an adder is a digital circuit that performs the
addition of numbers.
• in modern computers, adders reside in the arithmetic logic unit (ALU).

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

A Sum (S)

Half Adder
B Carry (C)
Types of Adder:
1. Half Adder.
A
2. Full Adder. Sum (S)
B
Full Adder
Carry Out
Carry in

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

XOR Circuit:
• Before starting with half adder circuit we have to understand with XOR
Gate.

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

Half Adder:
• The most basic arithmetic operation is the addition of two binary digits.
• This simple addition consists of four possible elementary operations:
0+0=0
0+1=1
1+0=1
1 + 1 = 10
• Half adder: is a combinational circuit that performs the addition of two bits.

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

Half Adder:
• Let us consider x and y as the inputs to the half adder as Sum and Carry
are the outputs.
x y Sum Carry
Sum = x . y + x . y = x + y 0 0 0 0
0 1 1 0
XOR Gate
1 0 1 0
1 1 0 1

Carry = x . y Truth table for half adder

AND Gate

Eng. Norhan Ahmed

 A
CSC201: Digital Logic Design Sum (S)
Level 2 – 1st Semester B Full Adder
Carry Out
Carry in
Full Adder:
• Full adder is one of the most important blocks of an ALU.
• Full adder: performs the addition of three bits (two significant bits and
previous carry).
• To create a full adder we implement two half adders.
Carry-in Sum (S)
Sum

Half Adder
A Sum Carry
Carry-Out
Half Adder
B
Carry

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

Full Adder:
• Let us consider x, y and (Carry-in = z) as the inputs to the half adder as
Sum and Carry-out are the outputs. x y z Sum Carry-out
0 0 0 0 0
0 0 1 1 0
Sum = ( x + y)+ z
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
Carry-out = ( x + y)z+xy
1 1 0 0 1
1 1 1 1 1
Truth table for Full adder

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

Compression between Adder Types (Half Adder & Full Adder):

Half adder Full adder
It is used for 2-bit addition. It is used for 3-bit addition.
One Ex-OR gate and one AND gate are used. One Ex-OR gate, three AND gates, and one OR gate are used.

Output is the sum of two signals. Output is the sum of three signals.

Half adder circuit is simple. Full adder circuit is complicated.

There are two input and two output terminals. There are three input terminals and two output terminals.

It cannot be used as a full adder. It can be used as a half adder.

Example: Calculators, computers, digital measuring devices, etc. Example: Multiple bit addition, digital processors, etc.

Eng. Norhan Ahmed

CSC201: Digital Logic Design
Level 2 – 1st Semester

Any Questions
Eng. Norhan Ahmed
CSC201: Digital Logic Design
Level 2 – 1st Semester

Thank You
Eng. Norhan Ahmed