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Leiterplatten-Layout
A PCB layout A
© ROSENBERGER HOCHFREQUENZTECHNIK GMBH & Co. KG or THIRD PARTY

B 501
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The reproduction, distribution and utilization of this document as well as the communication

Feedthrough SMD
3
3
2.6
vias ( 0.3)
to GND (11x)
3.6

3.2

B B

2.9
4.4

4.8

2
3.3
cut out

1.3
solder areas
1.1 vias ( 0.4) 0.325
to GND
0.8 1.2
C C
2.4 1.2

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D D

A wide variety of transmission line topologies and pcb-parameters like

permittivity, substrate thickness, and board-stack up are applied by
customers. These parameters have a strong impact on the high frequency
performance of the mounted connector.
Please note, that the given layout is not optimised to fit all of the
possible board configurations regarding RF-performance, it represents a
PD_FB_01

recommendation for optimum solderability of the connector.

In order to guarantee optimum high frequency properties of the connector,
E an RF-analysis of the connector to board transition is recommended. E

general tolerance scale: weight[g]: 10.251

4:1 ( ) surface[mm 2]: ofin[.1]
ISO 2768 RN 006-01 material:
-METRIC-

dimensions <0,5
mH and symmetry
date name title:
vertraulich / confidential drawn 11.09.2014 S_Andorfer
check. 25.01.2021 M_Rahberger
Leiterplatten-Layout
appr. 25.01.2021 M_Moder PCB layout
dimensioning incl. plating
F drawing-no.: sheet: F
ISO-Projektion

a01 21-0015 A_Youmsi-Mou 22.01.2021 Size ISO 14405 MB_501 1

Tolerancing ISO 8015 1
Methode 1

a00 14-1309 S_Andorfer 17.09.2014 of:

rev. change-no name date remarks: .
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