6 5 4 3 2 1

REVISION RECORD

LTR ECO NO: APPROVED: DATE:

RFCON-2PIN

MAIN ANT CON0101

DIV ANT

1
AVDD2V8

J103 J104 ANT113 ANT112 ANT111

C108 100pF

II
P08-AB001F050

P08-AB001F050

P08-AB001F050
1 R101 1.5nH 2 1 R102 0R

NC
RFIN II OUT IN II ANT_CON [1]

TRANSCEIVER

GND

GND
II
GND
GND
GND

U101

C160

4
818000291 II II

3
II II

VDD
818000500
2
3
4

C103

C104
R103 0R 0R/NC C107 0R R188 47pF 3 SW_DRX_FDD_B8 [1]

C102
H108 13 RF1

C131

NC
NC
II ANT

II

II
9

NC

NC

V101 5V/33pF/NC
RF2 SW_DRX_FDD/WCDMA_B3 [1]

NC

NC
2 SW_DRX_FDD/WCDMA_B5[1]
RF3
10 SW_DRX_FDD_B40/B1
[1]
II RF4
II 1
VC1614

C106
RF5

L102

C105
7
[3] RFCTL_12 V1 11
RF6

NC
6
D [3]
[3]
RFCTL_13
RFCTL_14
5
V2
V3
RF7
14
12
D
RF8

100nF

100nF
10pF

10pF

10pF

10pF

10pF
GND

2.2uF

4.7uF
C163

C162

C164

C165

C166

C167

C168

C199

C189
2.2uF
NC
VDDDCXO

15
IV II II II II IV II IV II II
VDDRF0

C169
U100
VDDWRF VDDRF0
RF-TRANSCEIVER-SR3593G

RF
POWER DECOUPLE
K5 B1 C181

II
VDD1V8XO RX_CAP1V5 100nF

E10 C182

II
RX_CAP1V8

LTE/WCDMA PAM
H15 100nF
VDD1V8TX (width>=0.3mm)
VBAT VDDWPA
J8 C197

II
RX_CAP_SYN 100nF
J6
VDD1V8RF (width>=0.3mm)
RX IQ
AVDD2V8
R123 0R K3 R8 L140 47nH
VDD1V5RF (width>=0.3mm) RX_IP RXIP_MADC [3]
R124 NC
VDD_WPA [1] P7 L141 47nH
RX_IN RXIN_MADC [3]

K7 P9 L145 47nH
C133 VDD1V1DIG RX_QP RXQP_MADC [3]
0R common-pad 47nH
0R

II
R127 N8 L146
C134 100pF/NC [1] PWR_DET II RX_QN RXQN_MADC [3]
VBAT DET

II
VDD_WPA

R128
R129

120R
DRX IQ

120R
J14
RF_PDET

II

II
M13 L147 47nH

7
DRX_IP RXIP_MADC_DIV [3]
C124 C127

II

II
common-pad GRX

VDD
100pF 10pF N14 L148 47nH
DRX_IN RXIN_MADC_DIV [3]
C125 C128

II

II
L149 47nH
[3] RFCTL_4
1nF 100nF common-pad 4 3 C187 2.2nH RF_RX_GSM_B5/B8 A14
GRX_LB (GSM LB ONLY, 729-960MHz) DRX_QP
P15
RXQP_MADC_DIV [3]
10uF C126 C129 10uF ANT RF1 PAM_TX_FDD/WCDMA_B8[1]

II
VI

VI
B15 R14 L157 47nH
U107 RF_RX_GSM_B2/B3 GRX_HB (GSM/TDS ONLY, 729-960MHz) DRX_QN RXQN_MADC_DIV [3]

15
C130 C119 56pF
II

II

II
2 C188 2.2nH/NC
0R PAM_TX_FDD/WCDMA_B5 [1]
RFASWMT2628ATF09/NC RF2

GND15

II
PRX TX IQ

C100
VBAT C144

L100

L103
NC

II
NC
NC

NC
1
[3] RFCTL_8 VC1 0R

II

II
RF_RX_FDD_B28A B7 P11 R106
8 5 PRX_L0 TX_IP II TXIP_MDAC [3]
1 14 [3] RFCTL_9 VC2 RF3

33pF/NC

33pF/NC

12nH/NC
VEN_LB RFOUT_LB 0R R107
R10

15nH
C113 47pF C114 0R TX_IN II TXIN_MDAC [3]
II

II

[1] RF_TX_LB_GSM B3

R120

R121

GND
GND
RF_RX_FDD_B20/B17 PRX_L1
C101 R100 3.0nH 2 13 II II P13 0R R108

II
[1] RF_TX_LB_T/R_PAM 3.0nH II RFIN_LB GND TX_QP II TXQP_MDAC [3]
100pF

L176

L177
22uF

47pF

12 R109

6
3 RF_RX_FDD_B28B A2 R12 0R
VBATT VCC PRX_L2 (ALL BAND, 699-960MHz) TX_QN II TXQN_MDAC [3]

2.7pF
NC

NC

VI II II C172

II
II
R104 47pF 4 11 C149 C150 [1] RF_RX_FDD/WCDMA_B5 B5 NC
C116

U103

II

II
C117

C115

II RFIN_HB RFOUT_HB 0R 0R PRX_L3 SPI

L105

L104

5 10
NC CPL_IN

R119
VC5369 A4 L14 [3]

NC
[1] RF_RX_FDD/WCDMA_B8 PRX_L4 SPI_LE SPI_LE_RF0

II
51R
6 9 II AVDD2V8 M15
VMODE GND SPI_CLK SPI_CLK_RF0 [3]
A6

C143
PRX_M1

II
7 8 L16
VEN_HB CPL_OUT SPI_DATA SPI_DATA_RF0 [3]

NC
R113
10

19

24

25

26

27

36

37

C109 47pF C110 0R

R190
C120 [1] A8
9

RF_RX_GSM_B2
II

II

II
[1] RF_TX_HB_GSM [1] RF_TX_HB_T/R_PAM 0R 100pF PRX_M2 (ALL BAND, 1710-2170MHz)

II
C151 RTC
VCC

VBATT

NC

NC

NC

NC

NC

NC

NC

R0614 0R

NC
II

NC
B9
NC

[1]
NC

2 22 C118 47pF RF_RX_FDD/GSM_B3 PRX_M3

II

M1 RF XO/32K low current mode

LB_IN ANT ANT_CON [1]

II

II
XO_MODE DCXO_LOW_CUR [2]

7
II II 3
HB_IN A10

VDD
RF_RX_FDD_B7
C111

C112

PRX_H1 RF 32K output 0R/NC

M3 R0613 [2]
CLK_32K II PMU_32K_IN

R126

R112
C 35
4
ANT RF1
3 0R PAM_TX_FDD/WCDMA_B1 [1]
[1] RF_RX_TDD_B40/B41 B11
PRX_H2 C

II
TRX1 SW_TRX_FDD/WCDMA_B1 [1] C190
34
U108 (ALL BAND, 2110-2690MHz) CLK
TRX2 TDD_B40_RX [1] RF_RX_FDD/WCDMA_B4 A12
PRX_H3 [7]
RFASWMT2628ATF09 2 1.0nH P1 C923 26MHZ_FROM_SYSTEM

II
5 U102 33 [3] RFCTL_5 RF2 PAM_TX_FDD_B3 [1] REFOUT1

II
[1,3] RFFE_SCLK0 SCL TRX3 SW_TRX_FDD/GSM_B3 [1] C192 1nF
B13

L107

L108
6 32 1 [1] RF_RX_FDD/WCDMA_B1 PRX_H4
[1,3] RFFE_SDA0 SDATA TRX4 SW_RX_GSM_B2 [1] [3] RFCTL_10 VC1 N2 C198

II
VC7910-31 [3] RFCTL_6 REFOUT2 WB_26M_IN [9]
8 5 NC
7 31 [3] RFCTL_11 VC2 RF3
VDD1V8 VIO TRX5 SW_TRX_FDD/WCDMA_B5 [1]
1.5K/1%
DRX P3 C178

II
6.2nH
R105 AP_26M_IN [3]

10nH
8 30 [3] RFCTL_7 REFOUT3

GND
GND
[3] RF_PA_RAMP II VRAMP TRX6 SW_TRX_FDD/WCDMA_B8 [1] II II 1nF
L122 22pF [1] RF_DRX_FDD/WCDMA_B8 G2

C180
17 29

L119
DRX_L0
II

[1] [1]
470pF

PWR_DET CPL TRX7 TRX_BAND40/BAND41 R6 C179 [3]

33pF

33pF
CP_26M_IN

II
9

6
II RF_CLK 1nF
100nF

28 II II

C121
TRX8 SW_TRX_FDD_B7 L2

C122

C123
DRX_L1
GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

NC

NC

NC
II II
ramp network
L178

L121

H3 T1
DRX_L2 (ALL BAND, 699-960MHz) XO_P TRANS_26M_IN [1]
1

11

12

13

14

15

16

18

20

21

23

38

39

[1] J2 R2 [1]
RF_DRX_FDD/WCDMA_B5 DRX_L3 XO_N XO_N

K1
DRX_L4 NC
H1 A16
RF_DRX_FDD/WCDMA_B1 DRX_M1 NC-1
J16
NC-2
F3
DRX_M2 (ALL BAND, 1710-2170MHz)
K15
NC-3
TDD B40/B41/B7 PAM [1] RF_DRX_FDD_B3
E2
DRX_M3 NC-4
N4

R4
NC-5
F1
DRX_H1
R16
NC-6
D3 T3
DRX_H2 NC-7
VDD_WPA VBAT (ALL BAND, 2110-2690MHz)
T5
NC-8
D1
RF_DRX_FDD_B7 DRX_H3
T9
NC-9

[1] RF_DRX_FDD/WCDMA_B1/B40 C2 T15

DRX_H4 NC-10

U105

4.7uF
TX GND

22uF
10pF

10pF
1nF

1nF
U104 RF-SAW-DUPLEX-SAYEY1G74BC0B0A
RF-SAW-DUPLEX-SAYEY897MGA0F0A FDDLTE/WCDMA/GSM_B3
FDDLTE/WCDMA/GSM_B5 SD18-0836R8UUQ1 [1] SW_TRX_FDD/GSM_B3
1.5nH 6
SAYEY1G74BC0B0A
ANT TX
3 PAM_TX_FDD_B3 [1]
II II VI II II VI [1] RF_TX_LB_T/R_PAM
D15
TX_LB1
II

C152

C153
C136

C137

C132
C173
C145 0R 6 3 C139
ANT TX PAM_TX_FDD/WCDMA_B5 [1] D7
II

SW_TRX_FDD/WCDMA_B5
4.3nH

[1] VSS-1
0R
NC

L197 1.2nH E14

1 L183 47pF RF_RX_FDD/GSM_B3 [1] TX_LB2 (ALL BAND, 699-915MHz)
RX D9
II

1 L130 47pF L131 12nH 5 C140 VSS-2

NC
5.6nH

RX RF_RX_FDD/WCDMA_B5[1] GND3
2.4nH
CLOSE TO U100
NC

5
C148

GND3 C14 D13

4 8 [1] RF_TX_LB_GSM TX_LB3 VSS-3
GND2 GND5
4 8
NC

NC

GND2 GND5 E8
L195

L116

2 7 II VSS-4
NC

GND1 GND4 C16

R175
2 7 [1] RF_TX_HB_GSM TX_HB0
GND1 GND4 F5
L118
L129

II II VSS-5
L106

C146

C147

F15 F9

II

15

16
RF_TX_MB_T/R_PAM TX_HB1 VSS-6

8
L196

(ALL BAND, 1710-2690MHz)

NC
G6

VCC1

VCC2

VBATT
VSS-7
CLOSE TO U100 [1] RF_TX_B40_T/R_PAM E16
TX_HB2
G10
C138 1.0pF/NC VSS-8
[1]RF_TX_B40_T/R_PAM 3.0pF 3 21 L143
RFIN_H B7

II

II
[1] RF_TX_HB_T/R_PAM C183 G16 M11

II
22pF TX_HB3 VSS-9

23 R118 47pF/NC
B40

II
II
27 R117 47pF/NC

C184
U106 T/R1

II
FDDLTE/WCDMA/B8 RF-SAW-DUPLEX-SAYEY836MBA0F0A

NC
U116
L124 B8514 5
47pF [1,3] RFFE_SDA0 SDATA
[1] SW_TRX_FDD/WCDMA_B8 6 3 PAM_TX_FDD/WCDMA_B8 [1]
ANT TX VC7824-31
[1,3] 6
RFFE_SCLK0 SCLK
19
B GSM_B2_RX U118 12nH B38 SW_TRX_BAND40/BAND41 [1]
B
6.2nH

1 C154 L126 7
II
NC

RX 47pF RF_RX_FDD/WCDMA_B8 [1] VDD1V8 VIO

47pF SFHG60CA002 5 28
L120 C176 47pF 0R GND3 T/R2 TDDL_B40/41_RX
18nH

1 4 L142 4
II

II

[1] SW_RX_GSM_B2 UBLN1 UBLN2 RF_RX_GSM_B2 [1] NC

10pF
4 8 25 R116 47pF/NC
GND2 GND5 B41
2.4nH

II
18
NC
L123
NC
NC

2 2 7
GND1 GND1 GND4 II II
Dual TCXO/Share TCXO/TSX
L194

L125
C155

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND
5 3

C177
GND3 GND2
NC

CLOSE TO U100
L136

L139

10

11

12

13

14

17

20

22

24

26

29
L134

26M Configuration X101 Y800 C0600 R0640 C0602 R0600 R0608 R0609 R0611 R0601 C0601 C198 R0602 C189 C837 C838 C839 C850 C852 C833

Dual TCXO TCXO TCXO 1000pF NF NF NF NF 0 ohm NF 0ohm 10pF 0 ohm 0 ohm 100nF NF NF 1000pF NF NF 1000pF
CLOSE TO U100

U112 Defualt Share TCXO NF TCXO NF 0ohm NF NF NF NF NF NF NF NF 0 ohm 100nF 1nF 1nF NF NF NF 1nF
B40 Post PA SF14112350B4001T
B9609

[1]
TRX_BAND40/BAND41 0R 4
OUT IN
1 1.5nH TSX(TBD) 2,4 Thermistor TSX NF 1000pF NF 1uF 100K 0 ohm NF 0ohm NF NF 0 ohm NF 2.2uF NF NF 1000pF 1uF 1000pF NF
6 5 4 3 2 1 SW_TRX_BAND40/BAND41 [1]

II

II
L111 L112

GND

GND

GND
2.2nH

3.9nH

NC
NC
REVISION RECORD

2
TDD_B40_RX
LTR ECO NO: APPROVED: DATE:
L110

L113

L115

L117
U115 U113
FDDLTE/WCDMA_B1 SD18-1950R8UUQ1 SFHG05AA002
L185 1.0nH 4 1 L167 2.7nH
II

L171 1.8nH 6 3
[1] TDD_B40_RX UBLN2 UBLN1 RF_RX_TDD_B40/B41[1]
[1] SW_TRX_FDD/WCDMA_B1 ANT TX PAM_TX_FDD/WCDMA_B1 [1]
NC

3.3nH

2.7nH

2
GND1
NC

D 1 L198
D
3.9nH

47pF 0R 0R RF_RX_FDD/WCDMA_B1 [1]

RX
II

II

5 C193 C196 3 5
2.0nH

GND3 II GND2 GND3 II

C195

L114

L127
NC

4 8
GND2 GND5
L182

L109
L181

2 7 II C0602

II
GND1 GND4 1uF/NC
R0600 100K/NC
[9] GPS_TSEN_VREFP II
L199

CLOSE TO U100
CLOSE TO U116 R0608 0R/NC
[9] GPS_TSEN_IN II
CLOSE TO U100

co-pad R0640
II
0R
TRANS_26M_IN' [9]
VDDDCXO

0R/NC R0601
X101 II
XTAL-TCXO-26MHZ-DSB221SDA

C C C0600 3 4 C0601

II

II
[1] TRANS_26M_IN OUT VCC
0R/NC 10pF/NC
DSB221SDA/NC

DIV PATH FDD_B5_Diversity Rx path[MATCH]

L158 39pF
1
SAFFB881MAN0F0A
4
U120

L161 1.0nH L164 15nH [9] GPS_TSEN_VREFN

R0609

R0611
II

II
0/NC

0R/NC
2
GND GND
1 0R
II
R0602

XO_N [1]
II

II
FDD/WCDMA_B3_Diversity Rx path[MATCH] [1] SW_DRX_FDD/WCDMA_B5 UBLN1 UBLN2 RF_DRX_FDD/WCDMA_B5 [1]
2.2pF

NC
FDD/TDD_B1/B40/B41_Diversity Rx path[MATCH] U111

3.0pF
U109 RF-SAW-SAFFB2G65AA0F0A 2
GND1

A SFHG52AA002 SFHG42AA002 5 3
A
3.9nH

C156 1 4 C157 L138 3.0nH C135 1 4 3.0nH GND3 GND2 II

1.5nH L163
II

II

II

[1] SW_DRX_FDD_B40/B1 UBLN1 UBLN2 RF_DRX_FDD/WCDMA_B1/B40 [1] UBAL1 UBAL2 RF_DRX_FDD_B3 [1]
C191

[1] SW_DRX_FDD/WCDMA_B3
II

39pF 1.5nH 8.2pF C142

L162

L165
3.6nH

L159
NC
C141
4.3nH
NC

2 2
NC

GND1 GND1 II
5 3 II 5 3 II
L186

GND3 GND2 II GND3 GND2

C170
C158
L132

5.1nH

B B
L128
L137

CLOSE TO U100
NC

B40:SFHG52AA002
CLOSE TO U100
CLOSE TO U100
U110
RF-SAW-SAFFB942MAN0F0A
FDD/WCDMA_B8_Diversity Rx path[MATCH] TITLE & REV:
SFH942AA002
C161 47pF 1 4 C159 47pF L184 12nH
SP9832A-2_CS_SCH_V0.1.0
II

II

[1] SW_DRX_FDD_B8 UBLN1 UBLN2 RF_DRX_FDD/WCDMA_B8 [1]

L135

COMPANY:
2.2pF

2
<Company Name> DOCUMENT NO.:
L133 18nH

GND1
5
GND3 GND2
3
II GSM 850/900/1800/1900?WCDMA 850/1900 LTE Banda2/4/7/17
C171
9.1nH

TITLE:
DESIGNER: DATED: DEPARTMENT:
B5:SAFFB881MAN0F0A River.Du
DRAWN: DATED:
<Title> B8:SFH942AA002
CLOSE TO U100 2015-10-12 Hardware DEPT.
DATED:
<Drawn By> <Drawn Date>
A CHECKED: DATED:
A EQA:
Mulder.Han
COMPANY:

CODE: SIZE: DRAWING NO: REV: 2015-10-12 Spreadtrum communications, Inc.

<Checked By> <Checked Date>
APPROVED: DATED:
QUALITY CONTROL: DATED:
Gang.Xu
<QC By> <QC Date> <Code> A0<Drawing Number>
<Revision> 2015-10-12 CONFIDENTIAL AND PROPRIETARY SHEET: 9 OF 23

RELEASED: DATED:
<Released By> <Release Date>SCALE: <Scale> SHEET: 1OF 13
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

PMU_ANALOG
PMU_POWER

[2]
[2]

[2]

RTC_MODE
OSC32KO
OSC32KI

VBATBK
D D
VBAT VBAT

Option for Xtal(crystal)-less or Xtal osc

4.7uF
MIC_BIAS

10uF

10uF
C209

C210

C298

D6
A6

B6

B8

C7

A8
E6
1uF

OSC32KI

OSC32KO

VBATBK

RTC_MODE

ADCI1

ADCI2

ADCI3
(10mA / ON)
IV

C201
AUXMIC_BIAS
VBAT must pass C209 C210
Then to PIN K10 H8 E9 E8 E5 J6 F9 E10 G10
MICBIAS ADI_SCLK
H5
ADI_SCLK [3]
C15 H4
C298 must be close to PIN E10 F9 [4] MIC_P MICP ADI_SYNC ADI_SYNC [3]
VBAT [4] MIC_N D15 RTC ADC G2
MICN ADI_D ADI_D [3]
VBAT 60-80MIL

K10

E10
H8

E9

E8

E5

F9
J6
G8
HEADMIC_BIAS AUXMICBIAS
C2
AUD_SCLK AUD_SCLK [3]

VBATCG

VBATAUD

VBATA

VBATA

VBATD

VBATD

VBATPA

VBATPA
(width>=0.3mm)

(width>=0.3mm)

(width>=0.5mm)

(width>=0.5mm)

(width>=0.5mm)
A13
AVDDVB AUXMIC_P AUXMICP
A14 F1
AUXMIC_N AUXMICN AUD_ADSYNC AUD_ADSYNC [3]
1uF C221 D1
P9 G15 AUD_ADD0 [3]

IV
VBATDRV AVDDVB H9 AUD_ADD0
HEADMICBIAS
(30mA / OFF)
R6 VDDAO E14 G1

1uF
VBATDRV [4] HEADMIC_P AUD_DASYNC [3]
HEADMICP AUD_DASYNC
C211 10uF R8 J15 2.2uF C222
VBATDRV VBAT VDDAO IV F14 G3

IV
[4] HEADMIC_N HEADMICN AUD_DAD0 AUD_DAD0 [3]
VBATAUD(150mA / OFF)

C202
P7

(width>=1.5mm)
VBATDRV AVDDPA R201 1K/1% H10 G5

A die To D die INTERFACE

VBATDRV
[4] HEADMIC_IN_DET HEADMIC_IN AUD_DAD1 AUD_DAD1 [3]
10uF P6 F10 10uF C223
C212 VBATDRV VBATPA AVDDPA
(400mA / OFF) G14 D2
P8 AVDD2V8 AIL1 XTL_BUF_EN0 XTL_BUF_EN0 [3]
VBATDRV
2.2uF C224 F15 E2 [3]
P5 A4 AIR1 XTL_BUF_EN1 XTL_BUF_EN1
VBATDRV VBATA AVDD_2V8

IV
At least C212must close IC P10
(100mA / ON)

AUDIO
VBATDRV VDD2V8 K12
[4] AORP AORP
E3
N5 A10 EXT_RST_B EXT_RST_B [3]
VBATDRV VDD_2V8 K13
[4] AORN AORN
VDDCORE (200mA / On) VDDSDIO
N10
VBATDRV E4 ANA_INT [3]
ANA_INT
VBATD [4] HP_DET J10
HEADSET_L_INT
J5
C213 L200 0.68uH VDD_SDIO J9 D3 [3]
10uF R5 GND_DET CHIP_SLEEP CHIP_SLEEP

DCDC CORE
LX_CORE (100mA / OFF)

(2000mA / ON)
VDDSIM0 K14
T5 [2] HP_L HEAD_P_L
LX_CORE
C3
VDD_SIM0 J14 F2
T4 [2] HP_R HEAD_P_R CLK32K CLK_32K [3]
LX_CORE (200mA / OFF) VDDSIM1
C14 U0200-A
R4 B3 [4] EAR_P EARP
VDDARM [3] VFBCORE VFB_CORE VBATA VDD_SIM1
(200mA / OFF) B14 ASIC-SC2723G-170-0.4
VDDSIM2 [4] EAR_N EARN
D4 [3]
CLKIN_26MHZ PMU_26M_IN
T6 A2 1uF C226

CLK
IV
DCDC ARM

LX_ARM VDD_SIM2 F12

(3000mA / ON)

C214 22uF L201 0.47uH_1.0_TDK [4] PAOUT_P PA_OUTP

(200mA / OFF)
VI

0603C-22 R7 VDDUSB DCXO 32KHz input

LX_ARM [4] PAOUT_N E12 C6 PMU_32K_IN [1]
PA_OUTN CLK32K_DCXO
T7 J1
LX_ARM VDD_USB
(60mA / OFF) VDDCAMMOT
PIN K8 VREFN First to C203 1uF H13
VCOM
R211 0R

II
VBATD C203
T2
C [3] VFBARM VFB_ARM
A11 C
VDDMEM VDD_CAMMOT
Then to main GND [2,4] AMPG_VCOM 1uF H12
VCMI DPIN
R2
BB_USB_DP [3]

II
(100mA / OFF) C204
VDDCAMA
DCDC WRF DCDC MEM

POWER
C215 L202 1.0uH_2A R1
(800mA / ON)

USB
10uF N1 DMIN BB_USB_DM [3]
LX_MEM 1uF C227 K8
B4 VREFN

IV
VBATA VDD_CAMA
(150mA / OFF)
VDDEMMCCORE P3
P1 DPOUT CON_USB_DP [8]
VDDWRF VFB_MEM 2.2uF C228
C9
VDD_EMMCCORE P2

IV
DMOUT CON_USB_DM [8]
(300mA / ON)
L203 VDDSDCORE C205 1uF L10
2.2uH
(300mA / ON)

T9 CPNEG

IV
LX_RF
0603 size should be use for C216 VDD_SDCORE
B9
U0200-B (300mA / OFF)
C216 10uF VDDDCXO C206 1uF/10V M13 E7
R3 ASIC-SC2723G-170-0.4 CAP_P EXTRSTN EXTRSTN
VFB_RF VBATD

CLASS G AMP
VDDWPA B10
VDD_DCXO N13 J2

SYSTEM
CAP_N PBINT PBINT [8]
(50mA / ON)
VDDWIFIPA H3
C217 4.7uF L204 2.2uH T11 PBINT2 PBINT2
DCDC WPA

LX_WPA
(700mA / OFF)

C10 4.7uF C229

VDD_WIFIPA [2] HP_L C207 2.2uF L14

IV

IV
HEAD_AMPG_INL
(500mA / OFF) J3
R10 PIN Bypass VBAT VFB>0.25mm R10 [2] HP_R C208 2.2uF L15
PRODT

IV
VDDEMMCIO HEAD_AMPG_INR
VFB_WPA(700mA) B2
(NC) PTEST
VDDWCN [3]RF_APT_DAC T12
APC_WPA VDD_GEN0
R12
AVDD1V8
VDDEMMCIO>12mil The power of U0200.R12 and U0200.T14 pin is swapped, [4] HP_GDRO_L
M14
HEAD_DRO_L
(200mA / ON)
1uF/NF C230
The change should be modified by SW M15 B5 R210 0R/NC
T14 [4] HEAD_DRO_R WHTLED DCXO_LOW_CUR DCXO_LOW_CUR [1]

IV
HP_GDRO_R
GAUGE BAT DET DCDC GEN DCDC CON

L205 VDD_GEN1
(300mA / OFF)

C218 2.2uF 2.2uH T8 DCXO low power mode

LX_CON (100mA / ON)
IV

VDDRF0 VBATA
L8 H2 WB_CLK_REQ [9]
[2,4] AMPG_VCOM AMPG_VCOM EXT_XTL_EN0
R13 2.2uF C231

WHTLED_IB0

WHTLED_IB1

WHTLED_IB2

WHTLED_IB3
VDD_RF0

IV
T3
VDDLDO VFB_CON (200mA / On)
VDD1V8

H6 2.2uF C232
DCDC GEN VDD_1V8

IV
C219 L206 2.2uH
(800mA / ON)

10uF P15
LX_GEN (200mA / ON)
VDDCAMCORE

C11

B13

C12

C13
BATDET_VREF
R14
VDD_CAMD
R11
VDCDC_GEN
(800mA) (150mA / OFF)
VDDCAMIO
R11 PIN VDCDC_GEN>0.5mm
VDD_CAMIO
R15 WHTLED_IB[2:0] is used for RGB LED if need.
K5
BATDET_VREF (200mA / OFF) VDDAMP
[8] BAT_TEMP_ADC B7
BAT_DET C233
1uF

N14 2.2uF
VDDAMP
IV

IV (200mA / OFF)
K3
C220

[8] SENSE_P
FUEL

SENSE_P
B1
(NC) VPP
[8] SENSE_N K2
SENSE_N
B11
VBATD VDD_VIBR VIB_CTRL
(200mA / OFF)
K6
CHARGE

CHGR_MODE
50ma
NC SINK

[8] VBAT_SENSE L2 B12 [6]

VBATSEN VBATD KPLED_OUT KPLED
(50mA / OFF)
[2] ISENSE K1

[6] FLASH_SINK
ISENSE
VDRV L6
VDRV NC
T1
II
All capacitors must be close to U0200.
47pF/NC
C390

M1 T15
VDRV2 NC
R398 GND
VCHG_OVP
100R L5

M3
VCHG

CC_COMP
NC

NC
A15

A1
Following LDO power supply caps can not be deleted.
1uF

II
M2
CV_COMP
AVDDVB,VDDAO,AVDD2V8,VDD_RF0
AGNDVB
VSSDRV

VSSDRV

VSSDRV

VSSDRV

VSSDRV

VSSDRV

VSSDRV

CPGND
VSSPA

VSSPA
C297

VDD_WIFIPA,AVDDPA,VDDAMP
VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS
L7

F7

F8

G6

G7

H7

J7

K7

N9

N8

N7

N6

M6

M7

M5

D12

D13

M10

K9

B B

BKBT RTC
USB CHARGE 2.0A/1.5A OTG VBATBK
[2] OSC32KO
VBATBK VBATBK

10K/NC

10K/NC
VCHG_OVP

R207

R208
10uF
VCHG
should afford 1.45A current X200

C234
Option for Xtal(crystal)-less or Xtal osc
R323 OR [2] RTC_MODE [2] OSC32KI
VCHG_OVP [2] U201
[2] OSC32KI
100pF/NC

U310 L380

0R
A1 C1 1.0uH_2A
VBUS SW
B3 A2
100pF/NC

IN OUT
1uF/25V

C2 A3 A2 C2
IN OUT VBUS SW II II
C3 B2 32.765K/7pF
IN OUT

R206
VCHG_D II

C235

C236
C3
SW

6.8pF

6.8pF
C386
1uF/25V/NC

22uF/10V

IV II
B1 E1 R215 0R
R320 0R/NC ISENSE [2]
C385
C381

C1 B1 PMID CSIN
0R/NC

OVLO VBUS_DET
100nF
33nF/16V

B2
VIII PMID
A1 IV
GND
GND
GND

0.068R

EN
B3 D1 II
C382
C371

PMID PGND
C384

ET9539L/NC ET9520A IV
A4
B4
C4

D2
PGND
R322

C383

+/-1%

[3] I2C1_SDA
B4
SDA PGND
D3
1% 1/4W
>16V

[3] A4
I2C1_SCL SCL
A3
R340

NC

E2 E4
[3] CHG_EN DISABLE VBAT VBAT
D4
OTG
100nF/NC

22uF

C4 E3
[3] CHG_PD STAT VREG RTC Mode X200 R206 R207 R208 R211 R210 C235 C236 R0613 R0614 C189
1uF
10K

II
Default crystal osc 32K Crystal 0R NF NF 0R NF 6.8pF 6.8pF NF 0R 100nF
C387

C389

II
C388

R388 10K
32K-less(TBD) NF NF 10K 10K NF 0R NF NF 0R NF 2.2uF
R381

A A
10K/NC
R382

TITLE & REV:

SP9832A-2_CS_SCH_V0.1.0
DOCUMENT NO.:
Default Pre-Charge current R382 R388

500mA NF 10Kohm DESIGNER: DATED: DEPARTMENT:

River.Du 2015-10-12 Hardware DEPT.
100mA 10Kohm NF EQA:
DATED:
COMPANY:
Mulder.Han 2015-10-12
Spreadtrum communications, Inc.
APPROVED: DATED:
Gang.Xu 2015-10-12 CONFIDENTIAL AND PROPRIETARY SHEET: 6 OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

[3] EMD[00:31]
AE2
MEMORY T4

(VMEM)
EMD00 [5]

CLK
EMD[0] CLKDPMEM EMCLK_P
EMD01 AE3 T5
EMD[1] LPDDR2/3 CLKDMMEM EMCLK_N [5]
EMD02 AD3
EMD[2] EMMC
EMD03 AC3 U3 [5]
EMD[3] EMCKE[0] EMCKE0
EMD04 AC2
EMD[4]
U2

LANE-0
DIGITAL
EMCS_N[0] EMCSN0 [5]
AC1

(VMEM)
EMD05 EMD[5]

CTRL and CMD

V1 [5]
EMCS_N[1] EMCSN1
EMD06 AB1
EMD[6]
EMD07 AB2 P4 [5]
EMD[7] EMODT[0] EMODT

(VMEM)
AA1 W5
EMDQM0 EMDQM[0] EMDTO[0]
[5]

E28
DIGTAL D23 INTERFACE [5] EMDQS0_P
AB3
EMDQS[0]
EMDTO[1]
Y4

SPI RF0
[1] RFSDA0/GPIO1 KEYOUT[0]/GPIO121 GPS_GPIO0 [9] V26 [1]
SPI_DATA_RF0 MAIN_RXIP RXIP_MADC AB4 R3

MADC IQ
(VIO1)
AG19 [5] EMDQS0_N EMDQS_N[0] EMATO
E27 B22 WB_RST [9] [2] ADI_SCLK ADI_SCLK/SDA5
[1] SPI_CLK_RF0 RFSCK0/GPIO2 KEYOUT[1]/GPIO122 U26 [1]
MAIN_RXIN RXIN_MADC
AG18 [3] EMD[00:31]
F24 B23 ADI_SYNC ADI_SYNC/SCL5
D [1] SPI_LE_RF0 RFSEN0/GPIO3 (WPU) KEYOUT[2]/PWMB(G0)/GPIO123 PWM_CHARGE [2]
[2] ADI_D AH19
MAIN_RXQP
V25
RXQP_MADC [1] EMD08 L3
EMD[8] EMA[0:9] D

KEYPAD
ADI_D
W25 RXQN_MADC [1] EMA0
E25 MAIN_RXQN EMD09 L1 Y3

(VIO1)
(WPU) KEYIN[0]/EXTINT2/GPIO124 KEYIN0 [8] EMD[9] EMA[0]
F25

SPI RF1
RFSDA1/GPIO4 AH23 EMA1
E24 AUD_SCLK AUD_SCLK/IIS2CLK EMD10 K1 W4

(VIO1)
KEYIN1 [8] [2]

MADC.DIV IQ
H25 (WPU) KEYIN[1]/EXTINT3/GPIO125 EMD[10] EMA[1]
RFSCK1/GPIO5 [8] W28 RXIP_MADC_DIV [1] EMA2
C23 USBID_CTRL MAIN_DIV_RXIP EMD11 J4 W2
KEYIN[2]/EXTINT4/PLL_LOCK/GPIO126 [2] AUD_ADSYNC AJ20 EMD[11] EMA[2]
J25 AUD_ADSYNC
RFSEN1/GPIO6 (WPU) V28 EMA3
MAIN_DIV_RXIN RXIN_MADC_DIV [1] EMD12 J1 V2

LANE-1

ADDRESS
AH22 EMD[12] EMA[3]
AUD_ADD0/IIS2DI

(VMEM)
[2] AUD_ADD0 Y29
B25 MAIN_DIV_RXQP H2 W1 EMA4

(VMEM)
SPI0_DO/SDA1/GPIO91 [2] RXQP_MADC_DIV [1] EMD13 EMD[13] EMA[4]
J28 I2C1_SDA
RFCTL_0

A to D Interface
RFCTL[0]/GPIO19 [2] AUD_DASYNC AH20 W29 EMA5

SPI 0
B26 AUD_DASYNC/IIS2LRCK MAIN_DIV_RXQN RXQN_MADC_DIV [1] EMD14 H3 R1

(VIO1)
SPI0_DI/GPIO92 CHG_EN [2] EMD[14] EMA[5]
RFCTL_1 J27

FOR LTE / WCDMA / TDS / GSM

RFCTL[1]/GPIO20 AE21 EMA6
C26 [2] AUD_DAD0 AUD_DAD0/IIS2DO EMD15 G3 P1
SPI0_CLK/SCL1/GPIO93 I2C1_SCL [2] EMD[15] EMA[6]
RFCTL_2 K29
RFCTL[2]/GPIO21 AF19 AA28

(VIO1)
B24 AUD_DAD1 MAIN_TXIP R2 EMA7

MDAC IQ
[2] AUD_DAD1 TXIP_MDAC [1]
K28 (WPU) SPI0_CSN/GPIO90 GPIO90_LCD_EN
L2
EMA[7]
RFCTL_3 RFCTL[3]/GPIO22 Y28 EMDQM1 EMDQM[1]
MAIN_TXIN TXIN_MDAC [1] [5] N2 EMA8
[2] XTL_BUF_EN0 AH21 EMA[8]
[1] RFCTL_4 L29 XTL_BUF_EN0
RFCTL[4]/GPIO23 Y26 EMA9
A23 [7] MAIN_TXQP TXQP_MDAC [1] K4 N4
SPI2_DO/GPIO53 SPI2_DO [2] XTL_BUF_EN1 AJ21 [5] EMDQS1_P EMDQS[1] EMA[9]
[1] RFCTL_5 L28 XTL_BUF_EN1
RFCTL[5]/GPIO24 Y27

SPI 2
B21 MAIN_TXQN TXQN_MDAC K3

(VIO1)
SPI2_DI/GPIO54 SPI2_DI [7] [1] [5] EMDQS1_N EMDQS_N[1]
[1] RFCTL_6 K26
RFCTL[6]/GPIO25 AF22
A24 [7] [2] EXT_RST_B EXT_RST_B U2100-B
SPI2_CLK/GPIO55 SPI2_CLK [3] EMD[00:31] VREFCA
[1] RFCTL_7 K25
RFCTL[7]/GPIO26 T28 ASIC-SC9832A-492-0.4
A21 SEC_RXIP EMD16 AG4

SADC IQ
M27 (WPU) SPI2_CSN/GPIO52 SPI2_CSN [7] [2] ANA_INT AE22
ANA_INT
EMD[16]
R5
[1] RFCTL_8 RFCTL[8]/GPIO27 T29 EMVREFO_CA
SEC_RXIN EMD17 AJ3
EMD[17] VREFDQ
M28

VREF
(VMEM)
[1] RFCTL_9 RFCTL[9]/GPIO28 R300 15R [2] AG22 U27
AH16 [8] CHIP_SLEEP CHIP_SLEEP SEC_RXQP EMD18 AF4
SD0_CLK0/GPIO153 TF_SD0_CLK0 EMD[18]
L25
[1] RFCTL_10 RFCTL[10]/GPIO29 T27
AF16 TF_SD0_CMD [8] SEC_RXQN EMD19 AH3 V5
SD0_CMD/GPIO150 EMD[19] EMVREFO_DQ
N29

SDIO 0
[1] RFCTL_11 RFCTL[11]/GPIO30 [2] AF20
AF15 CLK_32K CLK_32K EMD20 AG3

LANE-2
[8]

(VSD)
SD0_D[0]/GPIO151 TF_SD0_D0 EMD[20]
M26

(VMEM)
[1] RFCTL_12 RFCTL[12]/GPIO31 P25
AH17 SEC_TXIP AH4

(VMEM)
EMD21

SDAC IQ
SD0_D[1]/GPIO152 TF_SD0_D1 [8] EMD[21] 240R/1%

ZQ
N28 AA2 R306
[1] RFCTL_13 RFCTL[13]/GPIO32 P26 EMZQ
AF18 SEC_TXIN EMD22 AF1

PTEST
RFCTRL
SD0_D[2]/GPIO149 TF_SD0_D2 [8] EMD[22]

(VIO1)
N27

(VIO1)
[1] RFCTL_14 RFCTL[14]/GPIO33 AJ23 T26
AE18 PTEST SEC_TXQP EMD23 AG1
SD0_D[3]/GPIO148 TF_SD0_D3 [8] EMD[23]
RFCTL_15 E29
RFCTL[15]/GPIO7 C333 R25

II
SEC_TXQN

STRAPPIN
NC
RFCTL_16 F28 AE1 A5
RFCTL[16]/GPIO8
AG15 R301 0R [5] EMDQM2 EMDQM[2] (WPU) NFD[0]/GPIO112

(VNF0)
SD1_CLK/GPIO64 WF_SD1_CLK [9] AH8
RFCTL_17 H26 [6] MDSI_DATA0_P MDSI_DATAP0 A6
RFCTL[17]/GPIO9 AA27 RF_PA_RAMP [1] (WPU) NFD[1]/GPIO113
SD1_CMD/GPIO65
AF14 WF_SD1_CMD [9]
[6] AH7
APCOUT0 [5] EMDQS2_P
AF3
EMDQS[2] NC,Don't use as the GPIO
G29 MDSI_DATA0_N MDSI_DATAN0 B6

SDIO 1
RFCTL_18 RFCTL[18]/GPIO10 (WPU) NFD[2]/GPIO114
AE14 AF2

(VIO1)
SD1_D[0]/GPIO66 WF_SD1_D0 [9] AB29 [5] EMDQS2_N EMDQS_N[2]
APCOUT1 B8
[6] MDSI_DATA1_P AJ8 (WPU) NFD[3]/GPIO115

APC
AE13 MDSI_DATAP1

MIPI DISPLAY
SD1_D[1]/GPIO67 WF_SD1_D1 [9] [3] EMD[00:31]
RFCTL_19 G25 E7 [5]
RFCTL[19]/GPIO11 AJ9 AA26 [2] EMMC_D7/GPIO101 EMMC_D7
AH15 [9] [6] MDSI_DATA1_N MDSI_DATAN1 APCOUT2 RF_APT_DAC EMD24 F2
SD1_D[2]/GPIO68 WF_SD1_D2 EMD[24]
RFCTL_20 G28 C7 [5]
RFCTL[20]/GPIO12 EMMC_D6/GPIO100
FOR LTE ONLY

AJ15 F1 EMMC_D6
SD1_D[3]/GPIO69 [9] AG9 AB28 EMD25 EMD[25]
K24 WF_SD1_D3 [6] MDSI_DATA2_P MDSI_DATAP2 APCOUT3 E5
RFCTL_21 RFCTL[21]/GPIO13 EMMC_D5/GPIO103 EMMC_D5 [5]
EMD26 D2
[6] MDSI_DATA2_N AF9 U2100-C EMD[26]
RFCTL_22 F26 MDSI_DATAN2 B5 [5]
RFCTL[22]/GPIO14 EMMC_D4/GPIO104 EMMC_D4
AB26 [8] ASIC-SC9832A-492-0.4 EMD27 D1
SIMCLK0/GPIO157 SIM0_CLK U29 EMD[27]

(VSIM0)
AFCOUT0 RF_AFCOUT D4

SIM0
AF10 EMMC_D3/GPIO106 EMMC_D3 [5]
[6] MDSI_DATA3_P

eMMC
AFC
AC28 MDSI_DATAP3 EMD28 E4

(VNF1)
LANE-3
SIMDA0/GPIO158 SIM0_DA [8] EMD[28] [5]
H29 A3

(VMEM)
RFCTL_23 RFCTL[23]/GPIO15 AG10 U28 EMMC_D2/GPIO109 EMMC_D2
AD28 [6] MDSI_DATA3_N MDSI_DATAN3 AFCOUT1 D3
SIMRST0/GPIO159 [8] EMD29 EMD[29]
H27 SIM0_RST B7
RFCTL_24 RFCTL[24]/GPIO16 EMMC_D1/GPIO108 EMMC_D1 [5]
EMD30 C2

CLK_OUT
[6] MDSI_CLK_P AH10 EMD[30]
RFCTL_25 H28 MDSI_CLKP [2] C4 [5]
RFCTL[25]/GPIO17 G17 PMU_26M_IN EMMC_D0/GPIO98 EMMC_D0
AD27 CLK26M_SINE_O EMD31 C1
SIMCLK1/GPIO160 SIM1_CLK [8] [6] MDSI_CLK_N AH9 EMD[31]
(VSIM1)

J26 MDSI_CLKN
SIM1
[9] WCN_LTECOEXIST_RX RFCTL[26]/GPIO18
AD26 D7 R307 33R
SIMDA1/GPIO161 SIM1_DA [8] D21 AP_26M_IN (H) EMMC_CLK/GPIO102 EMMC_CLK [5]
(FOR AP) CLK26M_SINE0 [1] G1
R302 4.02K/1%
AH11 EMDQM3 EMDQM[3]

CLK_IN
AE27 MDSI_REXT [5] D5 [5]
[9] M25
SIMRST1/GPIO162 SIM1_RST [8] (WPU)EMMC_CMD/GPIO99 EMMC_CMD
WCN_LTECOEXIST_TX RFCTL[27]/GPIO34 G20
(FOR CP) CLK26M_SINE1 CP_26M_IN [1] F4 B3 [5]
[5] EMDQS3_P EMDQS[3] EMMC_RST/GPIO107 EMMC_RST
P28
RFCTL[28]/RFFE_SCK1/GPIO38 B11
AB25 I2C4_SCL [7] [6] CAM0_DATA0_P MCSI0_DATAP0 F3 B4
SIMCLK2/SCL4/GPIO154 [5] EMDQS3_N EMDQS_N[3] GPIO105
(VSIM2)

N24
SIM2

RFCTL[29]/RFFE_SDA1/GPIO39 [6] B10 B16

AC25 I2C4_SDA [7] CAM0_DATA0_N MCSI0_DATAN0 LVDS_DATAP0
SIMDA2/SDA4/GPIO155
B17
AD25 LVDS_DATAN0
A11
RFFE(MIPI)

SIMRST2/CLK_AUX1/GPIO156 GPIO156_LCD_EN [6] CAM0_DATA1_P MCSI0_DATAP1

C N26 [6] CAM0_DATA1_N
A12
MCSI0_DATAN1 LVDS_DATAP1
D18 C

MIPI CAMRA 0
(VIO1)

[1] RFFE_SCLK0 RFFE_SCK0/GPIO36

D28
(VIO1)

I2C2_SCL
IIC2

(WPU) SCL2/GPIO127 [5] D19

[1] R28 U2100-A LVDS_DATAN1
RFFE_SDA0 RFFE_SDA0/GPIO37 [6] C12
C28 I2C2_SDA [5] CAM0_DATA2_P MCSI0_DATAP2
ASIC-SC9832A-492-0.4 (WPU) SDA2/GPIO128
C13 E18

LVDS(NC)
[6] CAM0_DATA2_N MCSI0_DATAN2 LVDS_DATAP2
E19
D27 LVDS_DATAN2
(VIO2)

IIC3

A9 (WPU) SCL3/EXT_XTL_EN0/GPIO146 I2C3_SCL [6] [6] CAM0_DATA3_P

E12
MCSI0_DATAP3
CAM_AFPWDN CCIRD[0]/GPIO40
D26 [6]
(WPU) SDA3/EXT_XTL_EN1/GPIO147 I2C3_SDA D12 B19
C8
CCIRD[1]/GPIO41
I2C3: CTP [6] CAM0_DATA3_N

B13
MCSI0_DATAN3 LVDS_DATAP3

LVDS_DATAN3
B18
EXINT

CAM_MCLK R310 0R A8 D25 CTP_INT [6] [6] CAM0_CLK_P MCSI0_CLKP

(VIO2)

[6] CMMCLK/CLK_AUX2/GPIO42 EXTINT0/WDRST/GPIO144

[6] B12 A20
33nF/NC E8 E26 CAM0_CLK_N MCSI0_CLKN LVDS_DATAP4
CMPCLK/CLK_CP0_DSP/GPIO43 EXTINT1/GPIO145 CTP_RST [6]
II

C330 B20
LVDS_DATAN4
CCIR
(VCAM)

R303 4.02K/1%B14
[6] CAM_RST0 D8 MCSI0_REXT
CMRST0/GPIO44
AH28 [9] VDDARM
IIS0DI/GPIO56 BT_PCM_OUT A17
[6] CAM_RST1 D9 LVDS_CLKP
CMRST1/GPIO45
AG27
(VIO1)

IIS0

[9]

[6] CAM_PWDN0 F8
CMPD0/GPIO46
IIS0DO/GPIO57

IIS0CLK/GPIO58
AH27
BT_PCM_IN
BT_PCM_CLK [9]
[6]

[6]
CAM1_DATA0_P

CAM1_DATA0_N
D14

D15
MCSI1_DATAP0 LVDS_CLKN
A18

U11
POWER V14

HSIC(NC)
MCSI1_DATAN0 VDDARM VFB_ARM VFBARM [2]

MIPI CAMRA 1
[6] E9 AJ27 [9]
CAM_PWDN1 CMPD1/GPIO47 IIS0LRCK/GPIO59 BT_PCM_SYNC AC16 U12 U14
HSIC_DATA VDDARM VFB_ARM_N

1uF

FB
A15

C301

C302
CAM1_DATA1_P

2.2uF
[6] MCSI1_DATAP1

10uF
AC15 U13
C10 HSIC_STROBE VDDARM
[6] I2C0_SCL SCL0/GPIO48 (WPU) B15 W17
IIS1DI/GPIO130
AF29 [9] [6] CAM1_DATA1_N MCSI1_DATAN1 VI II IV V12
VFB_CORE VFBCORE [2]
B9 GPS_PDN VDDARM
SDA0/GPIO49 (WPU) W16

VDDARM INPUT
[6] I2C0_SDA AF28 VFB_CORE_N

C300
200R/1%
(VIO1)

R305
IIS1

IIS1DO/GPIO131 CHG_PD [2] CAM1_CLK_P C16 AH18 V13

[6] MCSI1_CLKP VRES VDDARM
VDDMEM
AF27 BT_WAKE_HOST [9]
IIS1CLK/GPIO132 [6] CAM1_CLK_N C15 V11

USB
MCSI1_CLKN VDDARM
AD17 P10
AG28 [9] DP BB_USB_DP [2] VDDMEM
IIS1LRCK/GPIO133 BT_HOST_WAKE W12
AF11 VDDARM
(VIO1)

[6] 4.02K/1% A14

LCM

LCM_RSTN LCM_RSTN/GPIO50 R304 AD16 BB_USB_DM [2] N10

MCSI1_REXT DM VDDMEM
W13
VDDARM
M10

VDDMEM INPUT
LCM_FMARK AG11 AF26 VDDMEM
DSI_TE/GPIO51 (H) U0TXD/GPIO60 BT_U0RXD [9] W14
VDDARM

1uF
UART0

L11

C334
1uF
AE26 VDDMEM

10uF
(VIO1)

(WPU) U0RXD/GPIO61 BT_U0TXD [9] Y11

VDDARM
L10
AE25 [9] IV II VI VDDMEM
U0CTS/GPIO62 BT_U0RTS Y12
VDDARM
T10

C304
AG14 AG26 VDDMEM

C305

1uF
BT_U0CTS [9]

4.7uF
[6] GPIO134_VLCD_EN TRACECLK/SPI1_CLK/SD2_CLK/GPIO134 U0RTS/GPIO63 Y13

C313
1uF
VDDARM
Y10
VDDMEM
Y14
AJ14 VDDARM II
UART2 UART1

[6] STBYB_EN TRACECTRL/SPI1_DI/SD2_CMD/GPIO135 [8] W11 IV IV

AH26 BB_U1TXD VDDMEM
(VIO1)

(H) U1TXD/GPIO70

C311

C312
TRACE DATA

[8] R10
AH14 AE24 BB_U1RXD VDDCORE VDDMEM
[4] AUDIO_PA_EN TRACEDAT[0]/SPI1_DO/SD2_D0/GPIO136 (WPU) U1RXD/GPIO71
V10
AH13 VDDMEM
(VIO1)

[6] FRONT_FLASH_EN TRACEDAT[1]/SPI1_CSN/SD2_D1/GPIO137

P17 U10
AF12 AJ26 VDDCORE VDDMEM
(VIO1)

[6] LCM_BL_PWM TRACEDAT[2]/PWMC/SD2_D2/GPIO138 U2TXD/GPIO72 GPIO72_OTG_EN

T11
[5] G_INT AE12 AF24 VDDCORE
TRACEDAT[3]/IIS3DI/SD2_D3/GPIO139 U2RXD/GPIO73 GPIO73_STAT_EN
T12 U23 AVDD1V8
[5] PROX_INT AG12 VDDCORE AVDD_BB
TRACEDAT[4]/IIS3DO/SD2_D4/GPIO140
[9] K13
[8] AH12 AH25 GPS_U0RXD VDDCORE
TF_DET TRACEDAT[5]/IIS3CLK/SD2_D5/GPIO141 U3TXD/GPIO74
UART3

K14

0603C-22
[6] AJ12 AH24 GPS_U0TXD [9] VDDCORE 2.2uF
CAMERA_FLASH_EN
(VIO1)

TRACEDAT[6]/IIS3LRCK/SD2_D6/GPIO142 U3RXD/GPIO75 C314

100nF

IV
22uF
K15 F18

C308
2.2uF
[6] CAMERA_TORCH_EN AJ11 AJ24 VDDCORE AVDD_PLL
TRACEDAT[7]/WF_COEXIST/SD2_D7/GPIO143 U3CTS/GPIO76 GPS_U0RTS [9]
K16
AF23 VI II VDDCORE
U3RTS/GPIO77 GPS_U0CTS [9] IV W10
EMVDD_PLL
K17

C306
VDDCORE

C307
UART4

L16
AD23 KEY_CAM [8] VDDCORE
(VIO1)
ARM JTAG

U4TXD/GPIO78
L17
AG23 EINT_GYRO [5] VDDCORE
(VIO1)

U4RXD/GPIO79 G13 100nF

AE6 AVDD_LVDS

II
TOUCH_ID_POWER_EN MTCK/GPIO82 L18 C315
VDDCORE
[7] AF6
DTV_POWER_EN MTMS/GPIO83 (WPU) L19

100nF/NC
B27 VDDCORE
MEMS MIC

MEMS_MIC_CLK0/WF_COEXIST_G0/GPIO94 WF_COEXIST [9]

L20 G10

C310
A27 [8] VDDCORE MCSI_AVDD

10uF
BAT_ID
(VIO1)

MEMS_MIC_DATA0/BEIDOU_COEXIST/GPIO95
B AG6
MEMS_MIC_CLK1/EXT_XTL_EN2/GPIO96
B28
GPS_CLK_REQ [9] VI II
M18
VDDCORE B
TOUCH_ID_SHUTDOWN DTDO_LTE/GPIO85 M19
C27 VDDCORE

C309
DSP JTAG

AH6
MEMS_MIC_DATA1/EXT_XTL_EN3/GPIO97 WF_WAKE_HOST [9]
GND VSS
U17
MDSI_AVDD
AC10

VDDCORE INPUT
TOUCH_ID_IRQ DTDI_LTE/GPIO86 (WPU) M20
VDDCORE

POWER INPUT
(VIO1)

F9 U20
[7] AJ6 VSS VSS
FS_NRST DTCK_LTE/GPIO87 N18
D29 VDDCORE
CLK_AUX0/PROBE_CLK/GPIO129 CON_32K_IN [9] K11 V15
AH5 VSS VSS
(VIO1)

CLK

DTMS_LTE/GPIO88 (WPU) N19

VDDCORE HSIC_VDD12
AJ17
K12 V16 U2100-D
AJ5 N25 VSS VSS
FS_INTERRUPT DRTCK_LTE/GPIO89 (H) XTL_EN/GPIO35 P13
VDDCORE
K18 V17 ASIC-SC9832A-492-0.4
VSS VSS
P18
VDDCORE
K19 V20 AJ18
VSS VSS VDDUSB
P19 VDDUSB
VDDCORE
L12 W15 1uF
VSS VSS

II
R13 C316
VDDCORE
L13 T14
VSS VSS
R17 F7 100nF
VDDCORE VNF0

II
L14 W20 C317
VSS VSS
R18
VDDCORE VDD1V8
L15 Y15
VSS VSS
R19
VDDCORE
M11 Y16 G6
VSS VSS VNF1
T17 VDDEMMCIO
VDDCORE
M12 AC7 100nF
VSS VSS

II
T18 C318
VDDCORE
M13 AC12
VSS VSS
T19 D10
VDDCORE VCAM
M14 AC13 VDDCAMIO
VSS VSS C319 1uF
U18
VDDCORE

IV
M15 AC11
VSS VSS
U19
VDDCORE 0R
M16 AE19 AE15 R309
VSS VSS
V18
VSD
R308 0R/NC VDDSDIO R308 Only support SD2.0
VDDCORE VDDSDCORE
M17 G23
VSS VSS
V19 1uF
R309 Support SD3.0 & SD2.0
VDDCORE

II
N11 AE17 C320
VSS VSS VDDSIM0
T13 AC29
VDDCORE VSIM0
N12 B2
VSS EMVSSQ
W18 100nF
VDDCORE

II
N13 E1 C321
VSS EMVSSQ
W19
VDDCORE
N14 H1 AE29
VSS EMVSSQ VSIM1
Y17 VDDSIM1
VDDCORE
N15 AJ1
GND

100nF
GND

VSS EMVSSQ

II
U2100-E Y18 C322
VDDCORE
N16
VSS ASIC-SC9832A-492-0.4 EMVSSQ
AC4
0R
default
VSIM2
AE28 R200
VDD1V8 R200 For 1V8 SIM2 IO interface
N20 H4
VSS EMVSSQ 0R/NC
R202 VDD2V8
P11
VSS EMVSSQ
A1 R202 For 2V8 SIM2 IO interface
AJ29
NC
P12 AD1
VSS EMVSSQ
AH1 F22 VDD1V8
NC VIO1
P14 K5
VSS EMVSSQ
A28 M24 100nF
NC VIO1

II
P15 J5 C323
VSS EMVSSQ
A2 Y19
NC VIO1
P16 AD4
VSS EMVSSQ

NC
A29
NC
P20 M1
VSS EMVSSQ
AH29 R314 0R VDD1V8
NC
R11 M4 E23 R313 0R/NC
VSS EMVSSQ
AJ2
VIO2 VDD2V8 VIO2=VDD1V8 For 1.8V CTP IO interface
NC C324 1uF
R12 N6
VSS EMVSSQ VIO2=VDD2V8 For 2.8V CTP IO interface

IV
AJ28
NC
R14 T1
VSS EMVSSQ AVDD2V8
B1 AA25
NC AVDD28
R15 AC17
VSS HSIC_VSS12 C325 1uF
B29
NC

IV
R16
VSS
P23 T24
AGND_AFC NC

BP
R20 P29 BP_LDO_CAP
VSS LDO_CAP
G11 T25
MCSI_AGND NC
T15

1uF
K710A_SH_RFAK710A_SH_GPSA VSS
A SH1 SH2 SH3 SH4 T16
VSS
MDSI_AGND
AE10
IV A
F14

C326
K710A_SH_DTVA AVSS_LVDS
K710A_SH_BBA
AGND

T20
VSS
C19
AVSS_LVDS
U15
VSS
F20
AVSS_PLL
U16
VSS
U24
AVSS_BB
AD24
VSS
AG7
MDSI_AGND
N17
VSS
D13
MCSI_AGND

TITLE & REV:

SP9832A-2_CS_SCH_V0.1.0
DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

River.Du 2015-10-12 Hardware DEPT.

DATED:
EQA: COMPANY:
Mulder.Han 2015-10-12
Spreadtrum communications, Inc.
APPROVED: DATED:
Gang.Xu 2015-10-12 CONFIDENTIAL AND PROPRIETARY SHEET: 10 OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

MAIN MIC
RECEIVER
Close to BB Close to MIC
MIC_BIAS

510R 1.5K/1%
Close to RCV
R403 R404

D [2] MIC_P
R401 1K/1% 100nF D
II
C401

100pF
MIC401

2.2uF

C408
B405 0R
IV 1 [2]EAR_P
II

100pF
C405
2

C422
REC401
RECEIVER
R402 1K/1% 100nF
[2] MIC_N MIC II 1
II

C402
2

47pF

47pF
33pF(NF)

33pF(NF)

C406

C407
R405 510R R406 1.5K/1%
C403

C404
MIC1
B408 0R
II II [2]EAR_N
II II

47pF

47pF
C420

C421
II II

Internal SPEAKER PA
Close to BB

C C
R420 600R/500mA/NC [4]
[2] PAOUT_P SPK+

R421 600R/500mA/NC
[2] PAOUT_N SPK- [4]

NC

NC
C423

C424
II II

HEAD MIC Cap need used together

Or del together if no EMI issue
Del Cap when change Bead to 0ohm Rs
Close to BB Close to MIC
HEADMIC_BIAS
1K/1%
R409

C414 4.7uF(NF)
IV

220nF
II

C415
R407 1K 100nF
[2] HEADMIC_P II
II

C409 SPK402
100pF
C413

2K

II
External SPK PA

100pF
C475
R410

II SPK

R408 1K 100nF SPK2

WB0801-002R-TAGF
[2] HEADMIC_N II HEADMIC_IN_DET[2,4]
II

C410
47pF

47pF
C411

C412

V409 7V/33pF/NC

V410 7V/33pF/NC
B B
II II
II II

C482

C483
56pF

56pF
VBAT

C468 C474
C470 4.7uF

IV

IV
IV
2.2uF 2.2uF
100nF

II
C462

Note:C3122 C3166 use 1uF Cap

D2

D1
A3
B3

C1

B1
B2
¹Ø¶ÏÒý½Å£¬µÍÓÐЧ£»Ö§³ÖÒ»ÏßÂö³å·½Ê½¿ØÖÆ
[3] AUDIO_PA_EN

VDD
VDD
C1P

C1N

C2P

C2N
C2N
10uF/10V
D3

10K/1%/NC
A4 PVDD
SHDN

R450
II
C472

3.5mm Headphone Jack R461

U461
[4] SPK+
close to SPK

C471
C463
II

II AW87318 120R/900mA
47nF B407
3K/1% A1 B4
INP VOP II SPK401
[2] AORP

100pF
II B406 120R/900mA
[2] A2 D4
C465
AORN R462
220pF INN VON
C464
II

47nF II

V407 7V/33pF/NC

V408 7V/33pF/NC
GND
GND
GND
3K/1%
Close to Jack II II
II II II II SPK

C2
C3
C4
[4] SPK-

C450

C451

C466

C469
10nF/NC

10nF/NC
C467

C473

close to PA

56pF

56pF
1nF

1nF
SPK1

WB0801-002R-TAGF
VDD2V8
47pF(NF)

share GND via

220K/NC
C416

Close to Audio PA
II

II
R412

R411 10K
[2] HP_DET II

R413 33R B401 1K/200mA

[2] HP_GDRO_L II HEAD_P_LL [4]
R414 33R B402 1K/200mA
[2] HP_GDRO_R II HEAD_P_RR [4]
C417
II

[9] FM_ANT 1nF FM_ANT_GND [4]

B403 1K/200mA [4]
[2,4] HEADMIC_IN_DET HEADMIC_INN
A A
V401 5V/33pF/NC

V413 5V/33pF/NC
5V/33pF

C3138 closed to earphone connector

1nF

1nF
C418

C419

1K/200mA

II II 5V/0.5pF
V412

V405
B404

fc>=40KHz
0R R415 TITLE & REV:
[2] AMPG_VCOM II
SP9832A-2_CS_SCH_V0.1.0
DOCUMENT NO.:
J401

[4] 2 FM/GND
FM_ANT_GND
[4] HEAD_P_RR 3 AUDIO_R
[4] HEAD_P_LL 5 AUDIO_L
DESIGNER: DATED: DEPARTMENT:
4 AUDIO_L River.Du 2015-10-12 Hardware DEPT.
[4] HEADMIC_INN 1 MIC
JAF00-05062-0108 DATED:
EQA: COMPANY:
Mulder.Han 2015-10-12
Spreadtrum communications, Inc.
APPROVED: DATED:
Gang.Xu 2015-10-12 CONFIDENTIAL AND PROPRIETARY SHEET: 13 OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

eMMC+LPDDR3 G Sensor
VDD2V8

U510

[3,5] 1 6
I2C2_SCL SCL VDD

1uF/NC
[3,5] 5
I2C2_SDA SDA
R512 0R 4
[3] G_INT INT II IV

C520
2 3

C521
NC GND

10nF
D MXC4005XC
D

VDD1V8

0R
R501
VDDMEM

VDD1V8 VBAT VDD2V8

4.7uF
1uF

10uF
IV II II VI IV II II II II

C501

C502

C503

4.7K/NC
100nF(NF)
100nF

100nF

C506

C507

C508

C509
C505
C504

100nF

100nF

100nF

2.2uF

1uF
IV II

C570
C571
R570
W11
M10

M12
AA3

AA5

AB3

AB4

AB9

AA9

H12

N11

AB5

AB8
K10

K12

R11

V10

V12

Y12
T10

T12

P11
J11

W5
M5
G5

G9

H8

U8

U9

N5

U5
Y8

K5

R5

V5
P5

P8

T5
F3

F4

F9

L8

L9

F5

F8

L2

L5
J5
VDDEMMCCORE
U550

VDD1

VDD1

VDD1

VDD1

VDD1

VDD1

VDD1

VDD1

VDD1

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2

VDD2
1
VDD
4 5
LEDA LEDC
K2
VDDCA [3,5] 2 6
B3 I2C2_SCL SCL LDR
VCC [3,5] 8
N2 I2C2_SDA SDA
VDDCA [3] 7
B12 PROX_INT INT
VCC
U2

4.7uF
VDDCA
B13
VDDEMMCCORE VCC
V2
VDDCA 3
IV II II C4 GND
VCC

C512

C511
C510

100nF

100nF
D8
VCC MN25713E
VDDEMMCIO
LPDDR3 Power CK
P3
EMCLK_P [3]
N3
A4

B6
VCCQ
CK

T2
EMCLK_N [3]
IIC address£º0x48
VCCQ CKE0 EMCKE0 [3]
B9 R2
4.7uF

VDDEMMCIO VCCQ CKE1

eMMC Power
C7

LightSensor
VCCQ
IV II II U3 [3]
CS0 EMCSN0
C11
C514

C515
C513

VCCQ
100nF

100nF

T3
CS1 EMCSN1 [3]

C CA0
Y2
EMA0 [3]
C
A11
VDDI
Y3
CA1 EMA1 [3]
W2 [3]
CA2 EMA2

1uF
W3 [3]
CA3 EMA3
IV V3
CA4 EMA4 [3]
C516

L3 [3]
CA5 EMA5
K3
CA6 EMA6 [3]
J3
CA7 EMA7 [3]
J2 [3]
CA8 EMA8
A7 VDD1V8
RCLK
H2
CA9 EMA9 [3]

B8
[3] EMMC_CLK CLKM
W12 [3,5] I2C2_SCL
DQ0 EMD00 [3]

DQ1
V11
EMD01 [3] EINT_GYRO [3]
A6 [3,5] I2C2_SDA
[3] EMMC_CMD CMD

15
V13

6
DQ2 EMD02 [3]
U11

SDA/SDI

SCL/SCLK

CS

RESV

INT
DQ3 EMD03 [3]
C2 U13
[3] EMMC_RST RST eMMC DQ4 EMD04 [3]
T11 9 RESV GND 13
DQ5 EMD05 [3]
EMMC_D[0:7] T13 10 RESV
DQ6 EMD06 [3]
EMMC_D0 A9
DAT0 11
R12 RESV U551
DQ7 EMD07 [3]
EMMC_D1 B10 ICM-20608D
DAT1 12 RESV
EMMC_D2 C6 R10 [3]
DAT2 DM0 EMDQM0
EMMC_D3 B5 VDD2V8
DAT3 16
T9 VDD
DQS0 EMDQS0_P [3]
EMMC_D4 C9

AD0/SDO

100nF
REGOUT
DAT4
R9

VDDIO

FSYNC
DQS0 EMDQS0_N [3]

RESV
EMMC_D5 A10
DAT5
II
EMMC_D6 A5

C573
DAT6
N12

14

7
DQ8 EMD08 [3]
EMMC_D7 B4
DAT7
M13
DQ9 EMD09 [3] VDD1V8

470nF
M11
DQ10 EMD10 [3]

10nF
L13 II
DQ11 EMD11 [3]

C574
L11 II
DQ12 EMD12 [3]

C580
U500

LPDDR3
K11
DQ13 EMD13 [3]
8GB+8Gb K13
DQ14 EMD14 [3]
J12
DQ15 EMD15 [3]

DM1
N10
EMDQM1
[3] Gyro I2C Address: 0x68 (Write:0xD0, Read:0xD1)

A1
DNU
DQS1

DQS1
M9

N9

AB12
EMDQS1_P

EMDQS1_N
[3]

[3]
gyroscope sensor
DNU & RFU

DQ16 EMD16 [3]

A14
DNU
AB11
DQ17 EMD17 [3]
AA1
DNU
AB10
DQ18 EMD18 [3]
B AA14
DNU
DQ19
AA13
EMD19 [3]
B
AB1
DNU
AA12
DQ20 EMD20 [3]
AB2
DNU
AA10
DQ21 EMD21 [3]
AB13
DNU
Y13
DQ22 EMD22 [3]
AB14
DNU
Y11
DQ23 EMD23 [3]

W10
DM2 EMDQM2 [3]

Y9
DQS2 EMDQS2_P [3]
A2 W9
VSF DQS2 EMDQS2_N [3]
A13
VSF
B1 H11
VSF DQ24 EMD24 [3]
B14 H13
VSF DQ25 EMD25 [3]
U552
D2 G10
VSF DQ26 EMD26 [3] A3
NC

TEST
A2
D3 G12 NC
VSF DQ27 EMD27 [3] B3 B2
[3,5] I2C2_SCL SCL NC
C3 C2
D4 G13 [3,5] I2C2_SDA SDA NC
VSF DQ28 EMD28 [3] B1
VSA
VDD1V8 C1 A1
D5 F10 VDD VDA
VSF DQ29 EMD29 [3] VDD2V8

1uF

4.7uF
D6 F11
VSF DQ30 EMD30 [3] MMC3630
F12 IV
DQ31 [3] IV
EMD31

C576

C578
J10 [3]
DM3 EMDQM3

A3 H9
VSSM DQS3 EMDQS3_P [3]
A8 J9

A12
VSSM

VSSM
DQS3 EMDQS3_N [3]
7λµØÖ·ÊÇ0x30
B2
VSSM 240R/1%
G2 R504
ZQ0
B7
VSSM 240R/1%
G3 R505
NC(ZQ1)
B11
VSSM
C3

magnetometer sensor
VSSM
C5 P10 [3]
VSSM NC(ODT)
C8
GND EMODT
VREFDQ
VSSM
C10
VSSM
P13
VREFDQ
C12
VSSM
C13
VSSM
D7 M2 II
VSSM VREFCA
C517

VREFCA
10nF
VSSCA

VSSCA

VSSCA

VSSCA

VSSCA

VSSCA

VSSCA
VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ

VSSQ
VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS
AA2

AA4

AA8

F2

G4

G8

H3

H5

L4

M3

M4

N4

N8

P4

P12

R3

R4

R8

T4

Y4

Y5

AA11

F13

G11

H10

J8

J13

K8

K9

L10

L12

M8

N13

P9

R13

T8

U10

U12

V8

V9

W8

W13

Y10

H4

J4

K4

P2

U4

V4

W4

A II A
C518
10nF

TITLE & REV:

SP9832A-2_CS_SCH_V0.1.0
DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

River.Du 2015-10-12 Hardware DEPT.
DATED:
EQA: COMPANY:
Mulder.Han
2015-10-12 Spreadtrum communications, Inc.
APPROVED: DATED:

Gang.Xu 2015-10-12 CONFIDENTIAL AND PROPRIETARY SHEET: 8 OF 23

 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

5.0" HD LCM(MIPI) J601

[6] 1
LED+ LED+
2
LED+
[6] LCD_VGH 3
LCD_VGH
[6] LCD_VGL 4
LCD_VGL
[6] LCD_UPDN 5
UPDN
[6] LCD_SHLR 6
SHLR

CAMERA MIPI
[6] 7
LED- LED-
8
LED-
[6] LCD_AVDD 9
10R R631 LCD+10V
10
GND
[6] LCM_DATAP3 11
MIPI_TDP3
1 4 [6] [6] LCM_DATAN3 12
[3] MDSI_DATA1_P LCM_DATAP1 MIPI_TDN3
U600 13
GND
2 3 [6] LCM_DATAP2 14
[3] MDSI_DATA1_N ACFT4A2G900E/NC LCM_DATAN1 [6] MIPI_TDP2
[6] LCM_DATAN2 15
MIPI_TDN2
R632 16
10R GND R608 10R
17 R694 10R
[6] LCM_CLKP MIPI_TCP
18
D [6] LCM_CLKN
19
20
MIPI_TCN
GND [3]
CAM0_DATA3_P 1 4 [6]
CAM0_DATA3P [3] CAM0_DATA0_P
1
U624
4
CAM0_DATA0P [6] D
[6] LCM_DATAP1 MIPI_TDP1 U629
[6] 21 [3] 2 3 [6]
LCM_DATAN1 MIPI_TDN1 CAM0_DATA3_N 2 3 [6]
CAM0_DATA3N [3] CAM0_DATA0_N CAM0_DATA0N
22 ACFT4A2G900E/NC
GND ACFT4A2G900E/NC
R633 [6] 23 R693 10R
10R LCM_DATAP0 MIPI_TDP0 R609 10R
[6] 24
LCM_DATAN0 MIPI_TDN0
25 R692 10R
GND
1 4 [6] [3] STBYB_EN 26
[3] MDSI_CLK_P LCM_CLKP STBYB
U602 [6] 27 [3] [6]
LCM_RSTN_2 LRSTB CAM0_DATA2_P 1 4 CAM0_DATA2P R610 10R
2 3 [6] 28 31
[3] MDSI_CLK_N LCM_CLKN [6] VLCD_1V8 VDD GND U628
ACFT4A2G900E/NC 29 32 [6]
VDD GND CAM0_DATA2_N
[3] 2 3 CAM0_DATA2N
R634 [6] 30
10R LCD_VCOM VCOM ACFT4A2G900E/NC [3] 1 4 [6]
CAM1_DATA1_N U625 CAM1_DATA1N
R691 10R
P1_LCM_30PIN_ZIF [3] 2 3 [6]
CAM1_DATA1_P ACFT4A2G900E/NC CAM1_DATA1P
R617 10R
[3,6] LCM_RSTN

R635 R604 10R R618 10R

10R

V602
[3] 1 4
CAM0_CLK_P U622 CAM0_CLKP [6] [3] 1 4 [6]
1 4 [6] CAM1_DATA0_N U626 CAM1_DATA0N
[3] MDSI_DATA0_P LCM_DATAP0
U603 2 3
2 3
[3] CAM0_CLK_N ACFT4A2G900E/NC CAM0_CLKN [6] [3] CAM1_DATA0_P
2 3
CAM1_DATA0P
[6]

5V/15pF/NC
[3] MDSI_DATA0_N ACFT4A2G900E/NC LCM_DATAN0 [6] ACFT4A2G900E/NC
R605 10R
10R R636 R619 10R

10R R620 10R

R606

Back Light Driver for 2 line 10 LEDs In Series [3] CAM0_DATA1_P

1
U623
4
CAM0_DATA1P [6] [3] CAM1_CLK_N
1
U627
4
CAM1_CLKN [6]
10R R637
2 3 2 3
0R L602 10uH D601 RB160VA-40 [3] CAM0_DATA1_N CAM0_DATA1N [6] [3] CAM1_CLK_P CAM1_CLKP [6]
B601 ACFT4A2G900E/NC ACFT4A2G900E/NC
1 4 [6] VBAT LED+ [6]
[3]

1uF/50V
MDSI_DATA2_P LCM_DATAP2

100pF
4.7uF
U604 R607 10R R621 10R

C607
2 3
[3] MDSI_DATA2_N ACFT4A2G900E/NC LCM_DATAN2 [6]
IV
U601 VIII II
10R R638

C605
ET5120

C606
6 1
VIN LX

5
R639 VOUT
10R
1 4 [6] [3] 4 3 [6]

10K/1%/NC
[3] MDSI_DATA3_P LCM_DATAP3 LCM_BL_PWM EN FB LED-

GND
U605
2 3
[3] MDSI_DATA3_N ACFT4A2G900E/NC LCM_DATAN3 [6]
FB=200mV

2R
2
10R R650

R615

R616
FLASH LED_BACK Imax=200mA R670 0R/NC
[1,2,4,5,6,7,8] VBAT
[2,6] 0R/NC FLASH_B+[6]
FLASH_SINK R671
FLASH_B1- [6]
R672 0R/NC FLASH_B2- [6]

C VBAT
C
R630 0R
VDD1V8
VBAT
U608

R688 150K/1% [3]

NO U606 leakage 10mA R689
1
ISETM ENM
11 CAMERA_TORCH_EN
20K/1% 2 10 [3]
ISETF ENF CAMERA_FLASH_EN
3
VLCD_1V8 [1,2,3,5,6,7,8,9] VDD1V8 AGND
4 14 FLASH_B1- [6]
IN LED2

10uF/NC
ET9382 12 FLASH_B2- [6]
LED1

100nF
U606

10uF
9
4.7uF

FLASH_B+ [6]
C631

[6] OUT
VLCD_1V8 8
L633 OUT

R667
1.0uH_1.0 5

1uF/25V
II LX
4 1 6

10K
10K
IN OUT LX

C646
C648

C647
7 13
PGND AGND

4.7K/1%

4.7K/1%
15

R665

R666
GNDPAD IV

NC
10nF
C635

C681
R683
R682
3 2
10uF
C636

EN GND
GND

II [6] LCD_SHLR
[6]LCD_UPDN
5

[3,6] GPIO134_VLCD_EN [6]LCM_RSTN_2

R657

10K/1% R658
1uF/25V

1nF
NC
C659

C660

4.7K/1%
R663

R664

R628
0R

NC
NC

R662
II II [3,6] LCM_RSTN
C619

NC
R668
RB520S-30 D613
LCD_VGH [6]
1K/1%
1uF/25V

Front CAMERA 2M Sensor

VBAT [1,2,4,5,6,7,8] C641
RB520S-30 D612

BACK CAMERA 5M Sensor

10K/1%

R643

1uF/25V
C639

C608
Q604
1

PNP_EMT3 C640
D607
R651 1K/1% C643 1uF/25V IV
[6] LCD_VGL

4.7uF
R645
2

1nF

-8.0V RB520S-30 1uF/25V J606

C637
4.7K/1%

NC

D609 1
R642

J605 GND
3

VDDCAMMOT
10K/1%

2
R611

R699 0R 1 VDDCAMCORE TDP0

NC

II IV GND R652 0R 3
RB520S-30 [2,6]VDDCAMA R698 0R 2 VDDCAMA TDN0
R6560R

TDP0 4
[3,6] CAM_PWDN0 3 GND
C638

TDN0 VDDCAMIO 5
4 [3,6]I2C0_SDA TDP1 VDDCAMMOT VDDCAMIO VDDCAMA
Q601 VDDCAMIO VDDCAMA [2,6]
VDDCAMCORE GND 6 VDDCAMCORE
VDDCAMCORE 5 [3,6] I2C0_SCL TDN1
3

[2,6]
VDDCAMMOT TDP1 7
DTC143ZE 6 [3,6]CAM_PWDN1 GND
[6] LCD_AVDD [2,3,6]VDDCAMIO TDN1 R601 0R 8
LCD_AVDD[6]
2

[3,6] [3] 7 NC
GPIO134_VLCD_EN GND 9

3.3K/1%
C627 CAM_RST0 8 [6] CAM0_CLKN NC

R661
IV 10.3V NC 10
9 [6] CAM0_CLKP GND

1uF

1uF

1uF
[3,6] NC 11

C610

C611

C613

0603C
1uF

1uF

1uF
4.7uF I2C0_SCL 10 NC

C612

C614

C653
1uF

10uF
D615
1

[3,6] GND 12

C620
I2C0_SDA 11 [6] CAM0_DATA0N NC
13
Connect GPIO to CPU L601 10uH
II II
[6] CAM1_DATA1P
12
13
NC
NC
[6] CAM0_DATA0P 14
GND
TCP
II II II
II
10uF/16V

1uF/25V

II [6] CAM1_DATA1N GND 15

14 [6] CAM0_DATA1N TCN

C616
TCP 16
1nF

U607 ET5120 RB160VA-40 [6] LCD_VCOM 15 [6] CAM0_DATA1P GND

C624

LCD_AVDD_VBATPOWER [6] CAM1_DATA0P TCN 17

1uF
[6] 16 RESET
CAM1_DATA0N GND CAM0_DATA2N 18

10uF
6 1 17 [6] LPTE
1M/1%

VIN LX II IV RESET [6]CAM0_DATA2P 19

R653

VIII II II 18 VCC2.8V

R660
C644

×¢ÒâʹÓøߵçѹµçÈÝ II [6] CAM1_CLKP LPTE 20

2K
C626

19 VCC2.8V
C625

[6]

R659

C632
VCC2.8V 21
2.2nF

CAM1_CLKN

C634
5 20 CAM0_DATA3N
[6] IOVCC1.8V

100nF
VOUT VCC2.8V 22

NC
21 [6]CAM0_DATA3P IOVCC1.8V

C633
[3,6] CAM_MCLK IOVCC1.8V 23
22 LEDA
IOVCC1.8V [3]CAM_RST1 24
GPIO134_VLCD_EN 4 3 [6] FLASH_F- 23 LEDK
[3,6] EN FB LEDA 25
GND

24 [3,6] CAM_MCLK GND

[1,2,4,5,6,7,8] VBAT LEDK
25
GND FH26-25S-0.3SHW
NC

AP3128AE3036ES6 FH26-25S-0.3SHW
B IV
FB=300mV B
C628

[3,6] CAM_PWDN0
30K/1%
R654

[3,6] CAM_PWDN1
R655
NC

NC

NC
C609

C615
II II

U612

SEN0
SEN1
1
2
SEN0
SEN1
[6]
[6]
FLASH LED_FRONT
FLASH LED_FRONT FLASH LED_BACK
3 [6]
B602 600R/450mA SEN2 SEN2
VDD2V8 11 4 [6]
AVDD2V8 SEN3 SEN3
5
V606

C664
2.2uF

SEN4 SEN4 [6]

2.2uF 6 [6]
12 SEN5
VARISTOR/NC

SEN5
IV

AVDD1V8 7
IV SEN6 [6]
35
36

8 SEN6
SEN7 SEN7 [6] J603
2.2uF 13 9

×¢ÒâÆÌÍ-É¢ÈÈ
IV

DVDD1V2 SEN8 SEN8 [6] 1 34

C663 10 SEN9 [6] SENSOR_OPT1[6]
C662

SEN9 2 33
22 DRV17 [6] SEN9
DRV17 [6] 3 32
GT910 23 [6] SEN8 DRV0[6]
DRV16 DRV16 [6] 4 31 DRV1[6]
15 24 [6] SEN7

×¢ÒâÆÌÍ-É¢ÈÈ
INT DRV15 DRV15 5 30 DRV2[6]
DRV14
25 [6] [6] SEN6 6 29
[6] CTP_INT_LCM 26 DRV14 [6] [6] SEN5 DRV3[6]
16 DRV13 DRV13 [6] 7 28 DRV4[6]
[6] SENSOR_OPT1 SENSOR_OPT1 27 [6] SEN4
R669 300K/1% DRV12 DRV12 [6] [6] SEN3 8 27 DRV5[6]
28
R673 2K DRV11 DRV11 [6] [6] SEN2 9 26 DRV6[6] R648 0R
[6] SENSOR_OPT2 17 29 [6] FLASH_F-
SENSOR_OPT2 DRV10 DRV10 [6] [6] SEN1 10 25 DRV7[6]
30
DRV9
[3,6] I2C3_SDA
18
I2C_SDA
DRV8
DRV7
31
32
DRV9
DRV8
DRV7
[6]
[6]
[6] [6]SENSOR_OPT2
[6] SEN0
11
12
13
24
23
22
DRV8[6]
DRV9[6]
DRV10[6]
[2] KPLED
60ma R626 0R/NC
33
DRV6 DRV6 [6] 14 21 DRV11[6]
19 34
[3,6] I2C3_SCL
C668
20
I2C_SCK DRV5
DRV4
DRV3
35
36
DRV5
DRV4
[6]
[6]
[6] DRV17
[6] DRV16
15
16
17
20
19
18
DRV12[6]
DRV13[6]
[2,6] FLASH_SINK
170ma R649 0R
IV

VDDIO 37 DRV3 [6] DRV14[6]

DRV2 [6] [6] DRV15
38 DRV2
2.2uF DRV1 DRV1 [6] 200ma
37
38

[3,6] 21 39
CTP_RST /RSTB DRV0 DRV0 [6]
[1,2,4,5,6,7,8] [6]
DGND
AGND

VBAT FLASH_B+
GND

100ma

1uF

D603

D604
1uF
14
40
41

3
2

2
D602

D
IV
2016-100mA

2016-200mA

2
IV
100ma
+

+
C623

+
2
C645

[3] Q620

10K/1%/NC
FRONT_FLASH_EN G

S
1
DTC143ZE/NC
-

-
1

R680
100ma 200ma
VDD1V8 [6] FLASH_F- [6] FLASH_B1-

A [6] FLASH_B2-
A
10K/1%
R624

R623 680R
[3] CTP_INT CTP_INT_LCM [6]

[3,6] I2C3_SDA
TITLE & REV:
[3,6] I2C3_SCL
SP9832A-2_CS_SCH_V0.1.0
[3,6] CTP_RST
2k/NC

2k/NC
V601

V603

V604
V605

DOCUMENT NO.:
II II
R625

R627
C671

C674
10nF
1nF

DESIGNER: DATED: DEPARTMENT:

2015-10-12 Hardware DEPT.
River.Du
DATED:
EQA: COMPANY:
Mulder.Han 2015-10-12
[1,2,3,5,6,7,8,9] VDD1V8
Spreadtrum communications, Inc.
APPROVED: DATED:
Gang.Xu 2015-10-12 CONFIDENTIAL AND PROPRIETARY SHEET: 14 OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D D

DTV

[3,7] FS_NRST

R910 0R/NC
DTV_26M_XON [7]
C921 R909 0R

II
10nF 26MHZ_FROM_SYSTEM [1]
DTV_26M_XOP [7]

NC
C920
VDD1V8
II

D1

G1
B2

B1

E2

F1
LAN_UOUT

MIX_UIN

CPOUT

XOUT

XI

XO
J610 ant matching L923 6.8nH L924 6.8nH

4.7K/NC

4.7K/NC
C4
L902 15nH TOUT1
1 10pF C902 A2 C3

II
RFIN UHF_IN TOUT2

II
C900 100pF F7
TSCK

4.0pF
6.2pF

NC

NC
C9223 G7

II
TSDO

GND
GND
GND

II
6.2pF C925 E7
TSDEN
A3 D7

R915

R916
VL_IN TSSYNC

5V/0.5pF
E4

L900

L901
2
3
4
818000531 II GPIO0
F2

V103
GPIO1

C924
A4 D5
VH_IN GPIO2
C6
GPIO3
C5 [3,7] I2C4_SCL
GPIO4
E5
GPIO5
A5 F3 [3,7] I2C4_SDA
LNA_VOUT GPIO6
C7
GPIO7
F4
GPIO8
F5
GPIO9
B4 B6
MIX_VIN GPO0
U901 E6 [7]
SCK SPI_CLK_DTV
A1
VSSRF [7]
G6 SPI_CS_DTV
VDDIO_1V8 MN88553H-EL SS
B3

C B5
VSSRF

VSSRF
MOSI
F6

D6
SPI_MOSI_DTV
[7]

SPI_MISO_DTV [7]
SPI for data C
MISO
A6

C1
VSSAD

VOUT_V
SCL

SDA
H7

D8
R912

R913
0R

0R
I2C4_SCL

I2C4_SDA
[3,7]
[3,7]
I2C for control
C2

D2
VSSVCO
SADR0
G3 add: 0x61h
VSSPLL
G2
E1
VOUT_X
SADR1
G5
need pullup
SADR2
B7
VOUT_LOG
D4
NPD_LOG
A7
VDDA
C8 FS_NRST [3,7]

1uF/NC
NRST
G4 R911 0R/NC
SPISEL
IV II H8
VSS

C904

C903
100nF
SPI Interface

VDDL

VDDL

VDDL

VDDI

0R
VSS

VSS

VSS

VSS

VSS

VSS

VSS
A8

F8

G8

H1

H2

H3

H5

B8

E8

H6

H4
SPI_MISO to AP SPI data input

R903
100nF

100nF
C917

C916
II II
SPI_CS to AP SPI CS
[3]

[3]
SPI2_DO

SPI2_DI
R684
R685
33R

33R
SPI_MOSI_DTV [7]
SPI_MISO_DTV [7]
SPI_CLK to AP SPI CLOCK
[3]
[3]
SPI2_CLK

SPI2_CSN
R686

R687
33R

33R
SPI_CLK_DTV
SPI_CS_DTV
[7]

[7]
SPI_MOSI to AP SPI DATA OUPUT
I2C_SCL to AP I2C CLOCK
I2C_SDA to AP I2C DATA
FS_INTERRUPT to AP INTERRUPT pin
FS_NRST to AP GPIO

there is not Power down PIN, so need to control 1.8v for power down VDD1V8 LDO_1V8
U903

4 1
1V8 X901
VBAT IN OUT LDO_1V8

0R/NC

0R
1.8VLDO R920
1uF

B 3 2 IV
VDDIO_1V8 [7] DTV_26M_XON
1 3 0R/NC
DTV_26M_XOP [7] B
DTV_POWER_EN EN GND
90mA typ. Peak 140mA 2 4
GND

[3]
C910
4.7K/NC

L905
R902
II II
5
1uF

26M/8pF/NC

C930

C931
NC

NC
IV
C909
R900

26M

SUB
A610 A611 A612

J615

R695 0R 1
RFIN
V610 5V/0.5pF/NC

NC

GND
GND
GND

II 818000500
4
3
2
L610

C656
NC

A A

TITLE & REV:

SP9832A-2_CS_SCH_V0.1.0
DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

2015-10-12 Hardware DEPT.
River.Du
DATED:
EQA: COMPANY:
Mulder.Han 2015-10-12
Spreadtrum communications, Inc.
APPROVED: DATED:
Gang.Xu 2015-10-12 CONFIDENTIAL AND PROPRIETARY SHEET: 15 OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

5pin Micro USB

SIDEKEY [8] CAMERA R712 1K
1K
KEY_CAM[3]

USB BOOT CONTROL [8]

[8]
KEYIN-
KEYIN+
R708
R709
R710
1K
1K
KEYIN1 [3]
KEYIN0 [3]
[8] PBINT_FPC PBINT [2]

NBOOT = Float----->NAND BOOT BATTERY

V702

V703

V707
V708
D D
NBOOT = 0 ----->USB BOOT Side Key must be with ESD protect Special package,Be careful on SMT

VCHG PBINT2 is only for auto power on. R799 0R

J702 VBAT VBAT_SENSE [2]

5V/15pF/NC
C701 rated voltage >16V CON201

1uF/25V
2
[8] KEYIN- CON702 1

ES07P4N3 D501
[8] 3 [8] 1
KEYIN+ KEYIN+

PTVSHC1DF12VB

3
10uF
IV [8] 2
KEYIN-
4 3

ES45D3HP
D502
[8] PBINT_FPC [8] PBINT_FPC 2

C701
[8] 4
5 CAMERA 5

V704
[8]

ESD5641D07/NC D704
C711 CAMERA

1
2

22uF

3
6

GND

GND
FPC_5PIN II
SENSE_P [2]

C705
C704

D703
100nF
8

0.02R
1
2
J701 ZF2-AB06F10A

+/-1%
6
SHELL
1
VBUS
7
SHELL

R706
[2] CON_USB_DM 2
D-
8
SHELL
[2] 3
CON_USB_DP D+
9
R713 1K/1% SHELL SENSE_N [2]
4
[3,8] USBID_CTRL ID
V701 5V/33pF/NC

5 VDD1V8
GND
V705

V706

VDD1V8
Press KEYIN0+GND when power up
WKUBI011
12V/0.2pF/NC

12V/0.2pF/NC

will make the phone boot from USB Battery temperature monitor

47K/1%

8
[3,8] USBID_CTRL

R703

47K/1%

GND
R704
[1,2,3,5,6,7,8,9]
R721 NC If not use,BAT_TEMP_ADC connect to GND
VDD1V8 1
+
2
[2] BAT_TEMP_ADC R222 510R +
3
SOD923 4
5
NTC
-
-
J205

R223 510R 6

C703
[3] BAT_ID ID

GND
R701 1K/1% II

C710
[3] BB_U1RXD

7
470pF
II
[3] BB_U1TXD R702 1K/1%
NBOOT

470pF
C C

SIM0 & SIM1 VDDSIM0

VDDSIM0

J710
P1
VCC
[3,8] SIM0_RST P2
RST
[3,8] SIM0_CLK P3 P10
CLK G1
P9
G1
[3,8] P5 P8
SIM0_RST GND G2
P6 P4

5V/33pF/NC

5V/33pF/NC

5V/33pF/NC

5V/33pF/NC
[3,8] SIM0_CLK VPP G2
[3,8] [3,8] P7
SIM0_DA SIM0_DA I/O

II
S08-306B15F1

C707
V709

V710

V711

V712
1uF
SIM 2
VDDSIM1

VDDSIM1

J704
1
[3,8] VCC
SIM1_RST 9
[3,8] VCC
SIM1_CLK
[3,8] SIM1_DA [3,8] 2
SIM1_RST RST
10
RST
B 5V/33pF/NC
B
5V/33pF/NC

5V/33pF/NC

5V/33pF/NC
[3,8] 3
SIM1_CLK CLK
11
CLK
1uF

4
NC
12

VIBRATOR
IV NC
C708

5 13
V713

V714

V715

V716
GND GND
6 14
VPP GND
[3,8] 7 15
SIM1_DA I/O GND
8 16
NC GND

Reserved(0402)for RF desense consideration

R797 0R
VIB_CTRL

VIB1
M701
1uF

+
IV
C706

MOTOR-F103030-146

should afford 200mA current

TF VDDSDCORE
VDDSDCORE
2.2uF
C709

NC

IV II
100nF/NC

R711
C799

13 8
GND DAT1 TF_SD0_D1 [3,8]
12 7 [3,8]
GND DAT0 TF_SD0_D0
11 6
TF_SD0_D2 [3,8] GND VSS
10 5
TF_SD0_D3 [3,8] GND CLK TF_SD0_CLK0 [3,8]
4
TF_SD0_CMD [3,8] VDD
3
CMD
2 TF_SD0_CMD [3,8]
TF_SD0_CLK0 [3,8] R716 0R/NC 9
CD/DAT3
1 TF_SD0_D3 [3,8]
[3] TF_DET SWITCH DAT2 TF_SD0_D2 [3,8]
TF_SD0_D0 [3,8]
5V/33pF/NC

TF_SD0_D1 [3,8]
5V/33pF/NC

5V/33pF/NC

5V/33pF/NC

5V/33pF/NC

5V/33pF/NC

5V/33pF/NC

J703
A A
V727
V720

V722

V723

V724

V725

V726

MARK POINT TITLE & REV:

SP9832A-2_CS_SCH_V0.1.0
NC-FIDUCIALMARK NC-FIDUCIALMARK NC-FIDUCIALMARK NC-FIDUCIALMARK
FD701 FD702 FD703 FD704 DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

1

River.Du 2015-10-12 Hardware DEPT.

DATED:
EQA: COMPANY:
Mulder.Han
2015-10-12 Spreadtrum communications, Inc.
APPROVED: DATED:
Gang.Xu CONFIDENTIAL AND PROPRIETARY SHEET: 18 OF 23
2015-10-12
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

D BT&WIFI&GPS ANT MARLIN D

R857 NC R858 NC

ANT802
ANT801 RFDIP1608060TS6T20/NC
P08-AB001F050 P08-AB001F050
4 3 R852 NC
GND HB DPX_WF [9]

R851 NC 5 2 II
ANT GND

C853
NC
VDDWIFIPA
6 GND LB 1

U7210
DPX_GPS [9]

5V/33pF/NC

0603C-22
R801 0R

27pF/NC
22uF
NC

C811
II
R851 For External Diplexer VI II

C801
L801
V801

C840
NC
R850 For Internal Diplexer
VDD1V8
If you need better RF performance,please use the external diplexer
U7201-A
BWFG-SC2342A-175-0.4

1uF
BT/WIFI/FM

C807
II
POWER INPUT UART
L12 E18 [3]
AVDD33_PA U0TXD BT_U0TXD
E17 [3]
VDDWCN U0RXD BT_U0RXD
A14 D17
DVDD18_IO U0RTS BT_U0RTS [3]
C17

GPS SAW LNA

U0CTS BT_U0CTS [3]
VDDSIM2
B18
DVDD16_CORE
D18
U1TXD

SDIO

GND
G8
AVDD16_TRX_ISM
A12

0R
SD_CLK WF_SD1_CLK [3]
E9 A13
AVDD16_AFE SD_CMD WF_SD1_CMD [3]
A15

R810
SD_D0 WF_SD1_D0 [3]
M15
AVDD16_FM
[9] B15
GPS_LNA_EN SD_D1 WF_SD1_D1 [3]

1uF/NC

1uF/NC
27pF/NC
INTERNAL

1uF

1uF

II
C819 C813 B16

C808

C809

C810

C812
U7201-C

II
1nF SD_D2 WF_SD1_D2 [3]
1uF D9
AVDD13_AFE

II
C814 B17 BWFG-SC2342A-175-0.4
SD_D3 WF_SD1_D3 [3]
II II II II

27pF/NC A17
DVDD11_CORE
IIS GND
U804

II
C817 B10
U803 IISDI BT_PCM_IN [3] GND GND

EN

VCC
1uF

II
C841 A10 B13 G16
B8813 RF IISDO BT_PCM_OUT [3] VSS VSS
L808 3.3nH 1 4 C820 C818 6.8nH 3 6 C826 B11 B14 H3
II

II
[9] DPX_GPS IN OUT 33pF RF_IN RF_OUT 33pF GPS_RF_IN [9] IISCLK BT_PCM_CLK [3] VSS VSS
M6
DIP_ANT_IN
GND

GND

GND

C11 [3] C3 J5
IISLRCK BT_PCM_SYNC VSS VSS

GND

GND
NC

M8 C5 H5
GPIO
2

DIP_RF_IN DIP_WF_IN VSS VSS

2
II L17 C6 H10
BGU7005 GPIO0 WF_WAKE_HOST [3] VSS VSS
M10
C816
L806

[9] RF_ISM_P RF_ISM_P

K17 [3] C10 H11
GPIO1 BT_WAKE_HOST VSS VSS
NC

H9
RF_ISM_N
C GPIO2
J17
BT_HOST_WAKE [3] C12
VSS VSS
H12
C
NC

H17 C14 H13

NC FM GPIO3 WF_COEXIST [3] VSS VSS

II
C824 C15 H14
CLK VSS VSS
L804

L809 M14
[4] FM_ANT FM_LANT
27nH B9 C16 H15
OSC_26M WB_26M_IN1 [9] VSS VSS
10pF/NC L14 D3 H16
FM_SANT VSS VSS

II
C861 L18 [3,9]
CLK_32K CON_32K_IN
D4 J3
VSS VSS
CTRL JTAG D5
VSS VSS
J7
[3] J18 F17
WB_RST RST_N MTCK WCN_LTECOEXIST_TX[3] D6 J8
VSS VSS
F18
MTDO

WIFI/BT SAW LNA

[2] WB_CLK_REQ A9 D10 J9
XTLEN VSS VSS
H18
MTDI
D11 J10
VSS VSS
M17 G17 WCN_LTECOEXIST_RX[3]
PTEST MTMS
D12 J11
VSS VSS
1 of 3 D13
VSS VSS
J12

D14 J13
VSS VSS
D16 J15
VSS VSS
E3 J16
R859 VSS VSS
NC
E4 K5
VSS VSS
U802 E5 K6
VSS VSS
E6 K8
VSS VSS
L802 1.0nH SF-245003-C23 2.0nH L805
4 1 [9]
[9] DPX_WF OUT IN RF_ISM_P E8 K10
VSS VSS
GND

GND

GND

E10 K11
15nH

VSS VSS
15nH

E12 K12
VSS VSS

GE2
II E14 K13
L810

VSS VSS
C825
L803

E16 K14
NC

VSS VSS
F3 K16
VSS VSS
F4 L1
VSS VSS
F5 L2
VSS VSS
F6 L4
VSS VSS
F8 L5
VSS VSS
F9 L6
VSS VSS
F10 L7
VSS VSS
F11 L8
VSS VSS
F12 L9
VSS VSS
F13 L10
VDD1V8 VSS VSS
DPX selection F15
VSS VSS
L11

VALUE R7213 R7206 R7224 R7223 R7253 R7252 G4

VSS VSS
L13

G5 L15
VSS VSS
External DPX 0ohm NF 0ohm NF 0ohm NF U7201-B
H2 L16
BWFG-SC2342A-175-0.4 VSS VSS
VDDWCN

1uF/NC
Internal DPX NF 0ohm NF 0ohm NF 0ohm G9
VSS VSS
M2

1uF
C830

C831
GPS G10
VSS VSS
M5

II II POWER INPUT UART G11

VSS VSS
M7
B4 C4 GPS_U0TXD [3]
GE2_VDDIO GE2_UART_TXD
G12 M9
VSS VSS
H1 B3
GE2_VDDIO GE2_UART_RXD GPS_U0RXD
B JTAG
[3] G13
VSS VSS
M11
B
G14
VSS
A6 B2
GE2_DVDD16_CORE GE2_MTCK 3 of 3
A2 [3]
GE2_MTDO GPS_U0CTS
E7 B1
GE2_AVDD16_AFE GE2_MTDI GPS_U0RTS [3]
C2
GE2_MTMS
H6
GE2_AVDD16_RX_VCO

1uF/NC

1uF/NC
SPI

1uF
C832

C836

C844
C845

II
27pF/NC INTERNAL GE2_SPI_CLK
G3
II II II 1uF G7
GE2_AVDD13_AFE

II
C846 G2
GE2_SPI_DO
C847 A5 F2

II
27pF/NC GE2_DVDD11_CORE GE2_SPI_DI
1uF J1
GE2_SPI_CS

II
C848
RF
C849 J4
II

[9] GPS_RF_IN 3.0pF GE2_RF_IN GPIO

3.3nH

M4 F1
DIP_GPS_OUT DIP_GPS_OUT GE2_GPIO0 GPS_GPIO0 [3]
VDDDCXO
II NC GE2_GPIO1
C1
C851

A1
A1_NC
L807
NC

R815
A18
A18_NC CLK
M1 D2
M1_NC GE2_CLK_32K CON_32K_IN [3,9]
M18

0R
M18_NC 1nF/NC WB_26M_IN [1,9] Y800

II
H7 C852 XTAL-TCXO-26MHZ-DSB221SDA
GE2_VCO_MONITOR
CTRL
B5 D7 1nF 0R 3 4
GE2_T_DIG GE2_XO_IN OUT VCC

II

II
C833 C856
A3 ζȴ«¸ÐÆ÷²Î¿¼µçÔ´
[3] GPS_PDN GE2_CHIP_EN TSEN temperature sensor reference supply
26M/1.8V

22pF
1uF
K1 B6 2 1

C835

C834
[9] GPS_LNA_EN GE2_LNA_EN GE2_TSEN_VREFP GPS_TSEN_VREFP [1] GND GND
1nF
[1] TRANS_26M_IN'

II
R807 0R/NC E2 C7 C837

R814
[3] GPS_CLK_REQ GE2_XTLEN GE2_TSEN_IN GPS_TSEN_IN [1] II II
temperature sensor reference input
E1 B7
GE2_PTEST GE2_TSEN_VREFN GPS_TSEN_VREFN [1]
1nF
WB_26M_IN1

II
temperature sensor reference grong [9] C838
2 of 3
R808
10K

CO-PAD

NC
1uF/NC
0R/NC
NC WB_26M_IN [1,9]

II
C839

C850
II

C7233
Main GND Point
It's not a component

A A

TITLE & REV:

SP9832A-2_CS_SCH_V0.1.0
DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

River.Du Hardware DEPT.
2015-10-12
DATED:
EQA: COMPANY:
Mulder.Han
2015-10-12 Spreadtrum communications, Inc.
APPROVED: DATED:
Gang.Xu CONFIDENTIAL AND PROPRIETARY
2015-10-12 SHEET: 23 OF 23
 6 5 4 3 2 1
REVISION RECORD

LTR ECO NO: APPROVED: DATE:

BLOCK DIAGRAM
D D

MAIN ANT GGE/TDS/WCDMA/TDD/FDD

MRX FLASH EMCP

FEM SPI EMMC
TX RAM LPDDR3
SR3593G IQ
DIV ANT MIPI DSI LCD
26M CTP
IIC3
SWTICH DRX
MIPI CSI 2 lane
C
FRONT CAMERA C
IIC0
Trans 26M
TCXO(NF) SC9832A MIPI CSI 4 lane REAR CAMERA

TCXO 0.5ppm IIC2 SENSOR

ADI interface ADI interface Headset

GPS 26M BT WIFI 26M
WCN Single ANT Audio Reciever

Quad Cortex A7 1.5G

SDIO LDO
DUAL GPU Speech Speaker
B

UART
MALI 400 SC2723 Main Mic
B

SC2342A I2S DCDC AUX Mic

Vibrator Vibrator
SPI
32K crystal
RTC
32K
USB PHY USB 2.0 Backup battery

Micro USB Battery

KEY PAD SIM0/1 SDIO
A A

Swithcing Charger
KEY PAD SIM0/1 T Card TITLE & REV:

SP9832A-2_CS_SCH_V0.1.0
DOCUMENT NO.:

DESIGNER: DATED: DEPARTMENT:

River.Du Hardware DEPT.
2015-10-12
DATED:
EQA: COMPANY:

Mulder.Han 2015-10-12 Spreadtrum communications, Inc.

APPROVED: DATED:

Gang.Xu 2015-10-12 CONFIDENTIAL AND PROPRIETARY SHEET: 1 OF 23