V381 41 (2019090500017967) Decrypt

00 M
0
RD 17 SI
PRELIMINARY AND SUBJECT TO CHANGE
(C 96 C TABLE OF CONTENTS
)2 7 ON
SHEET NO. SHEET NAME SHEET NO. SHEET NAME
1 TOC 26 SMALL RAIL REGULATORS
2 NAVI10 PCIe Interface 27 NAVI10 DECAPS
0 F
3 NAVI10 GPIOs 28 NAVI10 POWER
4 NAVI10 XTAL 29 NAVI10 GND
石 19 jo ID
5 NAVI10 MEM CHAB 30 POWER MANAGEMENT
6 NAVI10 MEM CHCD 31 SVI2 & BAMACO
7 NAVI10 MEM CHEF 32 MECHANICAL & THERMAL
8 NAVI10 MEM CHGH 33 DEBUG
阿 09 ne EN
9 GDDR6 MEM CHAB 34 BLOCK DIAGRAM
10 GDDR6 MEM CHCD 35 REVISION HISTORY
11 GDDR6 MEM CHEF
12 GDDR6 MEM CHGH
鋒 05 pe TI
13 NAVI10 TMDPA - DP
14 NAVI10 TMDPC - HDMI
15 NAVI10 TMDPEF - DP DP
16 GFX & SOC CONTROLLER
01 i( AL
17 VDDCR_GFX PHASES 2 and 5
20 VDDCR_GFX PHASES 6 and VDDCR_SOC
21 MVDD_VDDCI CONTROLLER
(0
22 REG MVDD
裴
23 REG VDDCI
24 REG 0.75V
25 REG 1.8V
00 RM 亮
68 A工樂
76 程 )
0) 課
(1) NAVI10 PCIe Edge Connector +3.3V_BUS
1
C101
0.1uF
6.3V
10%
2
1
R100
00
PLACE THESE CAPS AS CLOSE TO C100
0.1uF 10K
PCIE CONNECTOR AS POSSIBLE 6.3V 5%
10% U100
2
0R 3 5
A VCC
UNNAMED_2_74AUP1G57_I254_B
30,25 +1.8V_EN R103 1 2 5% 1 4 PERST#_BUF 16,21,30,32

IN B Y OUT
6 GND 2
C
M
+3.3V_BUS +3.3V_BUS
74AUP1G57GM
MPCIE1 U1A
DNI
0
+12V_BUS
symbol 1 R1081 2 10K 5%
RD 17 SI
RESERVE FOR PCIE SLEW RATE
A2 A11 PERST# AV26 PERSTB
+12V PERST# R101 R102
1
2
A3 45.3K 45.3K
+12V 1% 1%
C110 C118 C103 C104 B1 +12V Q100B R131 0R 5%
10uF 10uF 10uF 10uF B2 B5 SMCLK 6
UNNAMED_2_MOSN_I163_S
1 0R 1 2 GPUSMCLK AW28 AV27
+12V SMCLK BSS138PS 5% SMBCLK WAKEB
16V 16V 16V 16V
5
DNI
20%
DNI
20% 20% 20%
B3 +12V 1
R136 2
2
2
+3.3V_BUS
Q100A R132 0R 5%
UNNAMED_2_MOSN_I130_S PX_EN_T
B6 SMDATA 3 4 0R 1 2 GPUSMDAT AV28 SMBDAT PX_EN AT37 R109 1 2 1K 1% PX_EN
SMDAT BSS138PS 5% OUT 30,32,33
A9 +3.3V 1
R137 2
1
(C 96 C
A10 +3.3V DNI
PCIE_REFCLKP R150
C105 C106 C107 C108 B8 +3.3V REFCLK+ A13 PCIE_REFCLKP
2 BC22 PCIE_REFCLKP
PCIE_REFCLKN 1K
10uF 1uF 0.1uF 0.01uF A14 2 BB22 PCIE_REFCLKN 5%
6.3V 6.3V 10V 10V REFCLK-
10%
2
2
B10 3.3Vaux PCIE_RX0P
PETp0 B14 BE25 PCIE_RX0P
PCIE_RX0N
PETn0 B15 BD25 PCIE_RX0N
A4 GND +3.3V_BUS
)2 7 ON
PCIE_RX1P
A12 GND PETp1 B19 BG26 PCIE_RX1P
PCIE_RX1N
A15 GND PETn1 B20 BF26 PCIE_RX1N
A18 GND PCIE_RX2P
A20 GND PETp2 B23 BE27 PCIE_RX2P R56
PCIE_RX2N
A23 B24 BD27 PCIE_RX2N
10K
GND PETn2 5%
A24 GND PCIE_RX3P R55 CLKREQ#_PCIE
A27 B27 BG28 PCIE_RX3P CLKREQB AW26 CLKREQ# 2 1
GND PETp3 PCIE_RX3N 2
A28 GND PETn3 B28 BF28 PCIE_RX3N 5% 0R
F
A31 GND
0
PCIE_RX4P
A34 GND PETp4 B33 BE29 PCIE_RX4P
PCIE_RX4N
These termination should be as short as possible, neve exceed 500mil A37 GND PETn4 B34 BD29 PCIE_RX4N
A38 GND PCIE_RX5P
石 19 jo ID
A41 GND PETp5 B37 BG30 PCIE_RX5P
UNNAMED_2_CAP_I201_A CLKREQ#_PCIE PCIE_RX5N
R4210 1 242.2R 1% C4200 1 21pF 2 B12 A42 GND PETn5 B38 BF30 PCIE_RX5N
50V A45 GND

UNNAMED_2_CAP_I202_A PCIE_REFCLKP PCIE_RX6P
R4211 1 242.2R 1%C4201 1 0.25pF 21pF 2 A13 A46 GND PETp6 B41 BE31 PCIE_RX6P
PCIE_RX6N
50V A49 GND PETn6 B42 BD31 PCIE_RX6N
UNNAMED_2_CAP_I200_A PCIE_REFCLKN
R4212 1 242.2R 1%C4202 1 0.25pF 21pF 2 A14 A51 GND PCIE_RX7P
50V A54 GND PETp7 B45 BG32 PCIE_RX7P
UNNAMED_2_CAP_I204_A RSVD_A19 PCIE_RX7N
R4213 1 242.2R 1%C4203 1 0.25pF 21pF 2 A19 A55 GND PETn7 B46 BF32 PCIE_RX7N
A58
阿 09 ne EN
50V
UNNAMED_2_CAP_I203_A
GND PCIE_RX8P
R4214 1 242.2R 1%C4204 1 21pF PWRBRK# B30 A59 B50 BE34 PCIE_RX8P
0.25pF 2 GND PETp8 PCIE_RX8N
50V A62 GND PETn8 B51 BD34 PCIE_RX8N
UNNAMED_2_CAP_I199_A PRSNT2_B31
R4215 1 242.2R 1%C4205 1 0.25pF 21pF 2 B31 A63 GND PCIE_RX9P
50V A70 GND

UNNAMED_2_CAP_I182_A RSVD_A33 PCIE_RX10P
R4217 1 242.2R 1%C4207 1 0.25pF 21pF 2 A33 A71 GND PETp10 B58 BE36 PCIE_RX10P
PCIE_RX10N
A74 B59 BD36
鋒 05 pe TI
50V GND PETn10 PCIE_RX10N
UNNAMED_2_CAP_I183_A PRSNT2_B48
R4218 1 242.2R 1%C4208 1 0.25pF 21pF 2 B48 A75 GND PCIE_RX11P
50V A82 GND

UNNAMED_2_CAP_I180_A PCIE_RX12P
R4220 1 242.2R 1%C4210 1 21pF PRESENCE B81 B4 B66 BE38 PCIE_RX12P
0.25pF 2 GND PETp12 PCIE_RX12N
50V B7 GND PETn12 B67 BD38 PCIE_RX12N
UNNAMED_2_CAP_I179_A RSVD_B82
R4221 1 242.2R 1%C4211 1 0.25pF 21pF 2 B82 B13 GND SCHEMATIC PCIE_RX13P
50V B16 GND PETp13 B70 BG40 PCIE_RX13P
01 i( AL
UNNAMED_2_CAP_I178_A PRSNT2_B17 PCIE_RX13N
R4222 1 242.2R 1%C4212 1 0.25pF 21pF 2 B17 B18 GND PETn13 B71 BF40 PCIE_RX13N
50V B21 GND PCIE_RX14P

0.25pF B22 GND PETp14 B74 BE41 PCIE_RX14P
PCIE_RX14N
B25 GND PETn14 B75 BD41 PCIE_RX14N
B26 GND PCIE_RX15P
B29 GND PETp15 B78 BG42 PCIE_RX15P
PCIE_RX15N
B32 GND PETn15 B79 BF42 PCIE_RX15N
B35 GND
B36 GND
(0
PCIE_TX0P
B39 A16 PERP0 C125 1 2
0.22uF 25V BA23 PCIE_TX0P
GND PERp0 PCIE_TX0N
B40 A17 PERN0 1 2 AY23
裴
GND PERn0 C126 0.22uF 25V PCIE_TX0N
B43 GND PCIE_TX1P
B44 A21 PERP1 C127 1 2
0.22uF 25V BC24 PCIE_TX1P
GND PERp1 PCIE_TX1N
B47 A22 PERN1 C128 1 2
0.22uF 25V BB24 PCIE_TX1N
GND PERn1
B49 GND PCIE_TX2P
B52 A25 PERP2 C133 1 2
GND PERp2 PCIE_TX2N
B53 A26 PERN2 C134 1 2
0.22uF 25V AY25 PCIE_TX2N
GND PERn2
00 RM 亮
B56 GND
PCIE_TX3P
B57 A29 PERP3 C135 1 2
GND PERp3
PCIE_TX3N
B60 Mechanical Key A30 PERN3 C136 1 2
GND PERn3
B61 GND PCIE_TX4P
B64 A35 PERP4 C137 1 2
GND PERp4 PCIE_TX4N
B65 A36 PERN4 C138 1 2
GND PERn4
B68 GND
PCIE_TX5P
B69 A39 PERP5 C139 1 2
GND PERp5 PCIE_TX5N
68 A工樂
B72 A40 PERN5 C140 1 2
0.22uF 25V BB28
GND PERn5 PCIE_TX5N SYMBOL LEGEND
B73 GND PCIE_TX6P
B76 A43 PERP6 C141 1 2
0.22uF 25V BA29 PCIE_TX6P DNI DO NOT
GND PERp6 2mA max current
PCIE_TX6N
B77 A44 PERN6 C142 1 2
0.22uF 25V AY29 PCIE_TX6N INSTALL
GND PERn6
B80 GND PCIE_TX7P
A47 PERP7 C143 1 2
0.22uF 25V BC30 PCIE_TX7P b or # ACTIVE
PERp7 PCIE_TX7N
A48 PERN7 C144 1 2
0.22uF 25V BB30 PCIE_TX7N LOW
PERn7 PCIE_ZVSS R155
B9 JTAG1 PCIE_ZVSS AY19 1 2
PCIE_TX8P
A5 A52 PERP8 C145 1 2
0.22uF 25V BA31
76
JTAG2 PERp8 PCIE_TX8P 200R 1% BUO BRING UP
JTAGIO_LOOP PCIE_TX8N
A6 A53 PERN8 C146 1 2
0.22uF 25V AY31 PCIE_TX8N ONLY
JTAG3 PERn8
)
A7 JTAG4 Should minimize the wire
PCIE_TX9P
A8 A56 PERP9 C147 1 2
0.22uF 25V BC32
JTAG5 PERp9 PCIE_TX9P resistance and parasitic DIGITAL
PCIE_TX9N
A57 PERN9 1 2 BB32
程
PERn9 C148 0.22uF 25V PCIE_TX9N capacitance from external board GROUND
device to internal bump.

+3.3V_BUS PCIE_TX10P
2 PRESENCE A1 PRSNT1# PERp10 A60 PERP10 C149 1 2
0.22uF 25V BA34 PCIE_TX10P ANALOG
PRSNT2_B17 PCIE_TX10N
B17 A61 PERN10 C150 1 2
0.22uF 25V AY34
2 PRSNT2#_B17 PERn10 PCIE_TX10N - total trace resistance < 1 ohm GROUND
PRSNT2_B31
2 B31 PRSNT2#_B31 - total parasitic capacitance < 10pF
0)
PRSNT2_B48 PCIE_TX11P
B48 A64 PERP11 C151 1 2
2 PRSNT2#_B48 PERp11
PCIE_TX11N
B81 A65 PERN11 C152 1 2
PRSNT2#_B81 PERn11
R4271 PCIE_TX12P
100K A68 PERP12 C153 1 2
0.22uF 25V BA36
課
PERp12 PCIE_TX12P
5% PCIE_TX12N
B11 A69 PERN12 C154 1 2
CLKREQ#_PCIE WAKE# PERn12
2 B12 CLKREQ#
PCIE_TX13P
32 GPU_PWRBRK# 1
R121 2 0R2 5% PWRBRK# B30 PWRBRK# PERp13 A72 PERP13 C155 1 2
OUT PERN13
PCIE_TX13N
PERn13 A73 C156 1 2
RSVD_A19 PCIE_TX14P
A19 A76 PERP14 C157 1 2
2 RSVD_A32 RSVD_A19 PERp14 PCIE_TX14N
A32 A77 PERN14 C158 1 2
2 RSVD_A33
RSVD_A32 PERn14
2 A33 RSVD_A33
RSVD_A50 PCIE_TX15P
A50 A80 PERP15 C159 1 2
2 RSVD_B82 RSVD_A50 PERp15 PCIE_TX15N
B82 A81 PERN15 C160 1 2
2 RSVD_B82 PERn15
Navi10 REV 0.91

x16 GEN4 PCIe
GPIO_5_REG_HOT
3 0R2 1
R38 VDDGFX_SOC_REG_HOT 16
IN
DNI
0R2 1
R39 MVDD_VDDCI_OCP# 21
IN
00
DNI
0R2 1
R40 MVDD_VDDCI_REG_HOT 23
IN
U1B
PINSTRAP_0 AW22 PINSTRAP_0 symbol 2 GPIO_0 AU29

PINSTRAP_1 AV22 AT30
M
PINSTRAP_1 GPIO_1
PINSTRAP_2 AV23 PINSTRAP_2 GPIO_2 AT29
REMOVE 跳頁 PINSTRAP_3 AW24 PINSTRAP_3 GPIO_3 AR30
0
PINSTRAP_4 AV24 PINSTRAP_4 GPIO_4 AU31 GPIO_4_PCC VDDCR_SOC & VDDCR_MEM PCC (High)
IN 16
PINSTRAP_5 AV25 AT31 GPIO_5_REG_HOT
RD 17 SI
PINSTRAP_5 GPIO_5 VR HOT
PINSTRAP_6 AU25 PINSTRAP_6 GPIO_6 AU32
REMOVE 跳頁 USB POWER DETECT
PINSTRAP_7 AU26 PINSTRAP_7 GPIO_7_ROMSCK AU35
GPIO_7_ROMSCK
ROM Control; ROMSCK
3
GPIO_8_ROMSI
GPIO_8_ROMSI AR32 3 ROM Control; ROMSI
GPIO_9_ROMSO
GPIO_9_ROMSO AU34 3 ROM Control; ROMSO
GPIO_10_ROMCS#
GPIO_10_ROMCSB AT34 3 ROM COntrol; ROMSCB / Pinstrap Note: Internal PU/PD at GPIO pad is ~40k
GPIO_11
GPIO_11 AV31 3 Pinstrap strength in 14nm design spec
GPIO_12
GPIO_12 AW30 3 Pinstrap
GPIO_13
GPIO_13 AV30 3 Pinstrap Internal
Default
(C 96 C
GPIO_14 AT32 +1.8V +3.3V_BUS
GPIO_15 User
GPIO_15 AW32 3 Pinstrap Val u e Definition
GPIO_16 AV32 GPIO_16 Pinstrap
GPIO_17 AV34 GPIO_17 Pinstrap
GPIO_18 REMOVE 跳頁 PINSTRAP_6
GPIO_18 AW35 Pinstrap 1
R60 210K 3
STRAP_BIF_GEN4_DIS_A
GPIO_19
GPIO_19 AV35 3 Pinstrap 1
MR60 210K 0 0: PCIe GEN 4 supported
GPIO_20 AV36 1: PCIe GEN 4 not supported
)2 7 ON
PINSTRAP_7
1
R61 210K 3
PINSTRAP_BIF_CLK_PM_EN
1
MR61 210K 0 0: CLKREQ# power management capability is disabled
1: CLKREQ# power management capability is enabled
BIF
GPIO_13
BA20 GENERICA 1
R62 210K 3
PINSTRAP_BIF_LC_TX_SWING
AW13 GENERICB GPIO_SVC0 AT25 SVC0 0R2 1 R42 SVC_GFX_SOC 16 1
MR62 210K 0
OUT
F
GPIO_SVD0 AT24 SVD0 0R2 1 R43 SVD_GFX_SOC
OUT 16
0
HPD1 AY11 HPD1 GPIO_SVT0 AU24 SVT0 0R2 1 R41 SVT_GFX_SOC
15 IN IN 16
15 GENERICC_HPD2 AY12 GENERICC_HPD2
IN GPIO_15
AY13 GENERICD_HPD3 Overlap pads 1
R63 210K 3
PINSTRAP_BIF_VGA_DIS
0
石 19 jo ID
14 GENERICE_HPD4 BA13 GENERICE_HPD4 1
R58 210K 1
MR58 210K 1
MR63 210K 0: VGA controller capacity enabled
IN
BA16 GENERICF_HPD5 1: The device won't be recognised as the system's VGA controller
13 GENERICG_HPD6 AY17 GENERICG_HPD6 1
R59 210K 1
MR59 210K +1.8V
+3.3V_BUS IN
PINSTRAP_5
GPIO_SVC1 AT23 SVC1 0R2 1 R49 SVC_MVDD_VDDCI 31 1
R64 210K 3
0 PINSTRAP_AUD_PORT_CONN[2:0]
SVD1
OUT
2 10K 1 R51 GPIO_SVD1 AR24 0R2 1 R52 SVD_MVDD_VDDCI 31 1
MR64 210K
OUT
2 10K 1 R50 GPIO_SVT1 AR23 SVT1 0R2 1 R53 SVT_MVDD_VDDCI 31 Number of audio-capable display outputs
IN PINSTRAP_4
16,21,33 REGULATOR_SCL 1 2 0R R30
SCL AU28 SCL 1
R65 210K 3
0
OUT SDA
1 2 0R AV29 1 210K
阿 09 ne EN
21,33,16 REGULATOR_SDA R31 SDA MR65 0: All endpoints connected 4: 3 endpoints connected
BI
1: 6 endpoints connected 5: 2 endpoints connected
PINSTRAP_3
0
DCE
1
R66 210K 3 2: 5 endpoints connected 6: 1 endpoint connected
33 DDCVGACLK BE43 DDCVGACLK 1
MR66 210K 3: 4 endpoints connected 7: 0 endpoints connected
OUT
33 DDCVGADATA BG45 DDCVGADATA
+1.8V BI
SWAPLOCKA AV13
GPIO_12
SWAPLOCKB AV12 1
R67 210K 3
0 PINSTRAP_AUD[1:0]
+1.8V +1.8V 1
MR67 210K
鋒 05 pe TI
R4093 GENLK_CLK AW11 1: Audio for DisplayPort only
GPIO_11
1K
GENLK_VSYNC AW12 1
R68 210K 3
0 2: Audio for DisplayPort and HDMI if dongle is detected
1
MR68 210K 3: Audio for DisplayPort and native HDMI
UNNAMED_3_NAVI10T9C2_I12_TESTPGS5
R4096 R4092 AT19 TEST_PG_S5 BL_ENABLE AP10

1K 1K 0R2 1 R11
UNNAMED_3_NAVI10T9C2_I12_PSEN
AT35 PS_EN BL_PWM_DIM AP11
DIGON AM11
GPIO_18
SVI2 BOOT UP VOLTAGE (VDDGFX/VDDC) 1
R69 210K 3
0
TEST_PG
Platform
AR14 TEST_PG 1
MR69 210K
01 i( AL
TEST_PG_BACO
AR18 TEST_PG_BACO BAMACO_EN AR38 BAMACO_EN 30,31 SVC SVD VOLTAGE
OUT GPIO_17
Navi10 REV 0.91 DNI 1
R70 210K 3
0
R19 0 0 1.1V 1
MR70 210K
1K 0 1 1.0V GPIO_16
1 0 0.9V 1
R71 210K 3
0
1 1 0.8V 1
MR71 210K
(0
PINSTRAP_2
1
R72 210K 3
1
1 210K
裴
MR72
PINSTRAP_1
1
R73 210K 3
0
1
MR73 210K
PINSTRAP_0
1
R74 210K 3
1
+3.3V_BUS
1
MR74 210K
00 RM 亮
R4294 GPIO_19
0R0402 1
R75 210K 3
PINSTRAP_SMBUS_ADDR
R4295
SMU
1
MR75 210K 0: 0x41h
1: 0x40h
0R0402 +3.3V_BUS Unprotected FLASH
U3 BIOS1
GPIO_10_ROMCS#
PINSTRAP_BIOS_ROM_EN
68 A工樂
3 WP VDD 8 1
R76 210K 3
GPIO_9_ROMSO GPIO_9_ROMSO_R
3 RP1B 2 7 33R 2 SO HOLD 7 1
MR76 210K 1 0: Disable the external BIOS ROM device
GPIO_8_ROMSI GPIO_8_ROMSI_R BIOS
1
3 RP1A 1 8 33R 5 SI 1: Enable the external BIOS ROM device

GPIO_7_ROMSCK GPIO_7_ROMSCK_R
3 RP1C 3 6 33R 6 SCK C7
GPIO_10_ROMCS# GPIO_10_ROMCS#_R 0.1uF
3 RP1D 4 5 33R 1 CE GND 4
10V
SCHEMATIC
2
GD25Q80C
76 程 )
0) 課
00 M
0
RD 17 SI
(C 96 C
)2 7 ON
0
石 19 jo ID F +1.8V
1
B33
2
OSC_VDD18
100MHz oscilator option
100.00000 MHZ
4
Y2
阿 09 ne EN
4
1
120R VDD GND
C61 C62 C63 3 1 1

R48 2 1K 5%
25%
10uF 0.1uF 2.2uF CLK NC
6.3V 6.3V 6.3V
10%
2
U1E
MY2
OSC_VDD18 OSC_100M
symbol 5 4 3
鋒 05 pe TI
4 VDD OUT 4
XTALIN MR46 OSC_100M
XTALIN BG24 1 220R 1% 4
UNNAMED_4_OSC_I48_OE
1 2
OE GND
NA
XTALOUT BF24 OVERLAP WITH Y2
+1.8V (Verify rail)

100MHz 1.8V CLK chip
01 i( AL
R86 1 2 2.2K 1% XTRIG6 AP24 XTRIG6
R85 1 2 2.2K 1% XTRIG7 AP22 XTRIG7
XTRIG* are for debug purpose PLLCHARZ1_H AP38 PLLCHARZ1_H
AP37 PLLCHARZ1_L
PLLCHARZ1_L
+3.3V_BUS (Verify rail)
OSC_GAIN2
R95 1 2 10K 5% AV14 OSC_GAIN2
OSC_GAIN1
R94 1 2 10K 5% AW14 OSC_GAIN1
(0
OSC_GAIN0
R93 1 2 10K 5% AY14 OSC_GAIN0 ANALOGIO AU14 ANALOGIO 1
R47 216.2K 1%
裴
Navi10 REV 0.91 DNI
OSC_GAIN[2:0] = 3'd6
on Production Board
00 RM 亮 Route 50 ohms single-ended/100 ohms diff

and keep short
68 A工樂
UNNAMED_4_CAP_I14_B
1
C13 2
0.1uF 6.3V 1
R13 251.1R 1%
UNNAMED_4_CAP_I13_B
1
C14 10% 2
0.1uF 6.3V 1
R17 251.1R 1%
10%
76 程 )
0) 課
NAVI 10 MEM INTERFACE CH A/B
00 M
0
RD 17 SI
DQA0_<0>
DQA0_<1>
(C 96 C DQA0_<0>
3
DQA0_<1>
3
DQA0_<2>
0
1
DQA0_<0>
DQA0_<1>
BB47
BA44
DQA0_0
DQA0_1
U1L
symbol 12
DQA1_0
5
9
DQA1_1
BB43
BB45
DQA1_<0>
DQA1_<1>
DQA1_<2>
3
3
DQA1_<0>
DQA1_<1>
DQB0_<0>
DQB0_<1>
DQB0_<0>
3
DQB0_<1>
3
DQB0_<2>
AH45
AG44
DQB0_0
DQB0_1
U1M
symbol 13
DQB1_0
DQB1_1
AH41
AG40
DQB1_<0>
DQB1_<1>
DQB1_<2>
3
3
DQB1_<0>
DQB1_<1>
)2 7 ON
DQA0_<2>
2 BA46 DQA0_2 5
9
DQA1_2 BA42 AG46 DQB0_2 DQB1_2 AG42
DQA0_<2> 3
DQA0_<3> DQA0_<3> DQA1_<3> 3 DQA1_<2> DQB0_<2> 3
DQB0_<3> DQB1_<3> 3 DQB1_<2>
3 AY47 DQA0_3 5
9
DQA1_3 AY41 AF47 DQB0_3 DQB1_3 AF43
DQA0_<3> 3
DQB0_<4> DQB1_<4> 3 DQB1_<3>
4 AV46 DQA0_4 5
9
DQA1_4 AV40 AE46 DQB0_4 DQB1_4 AE40
DQA0_<4> 3
DQB0_<5> DQB1_<5> 3 DQB1_<4>
5 AU47 DQA0_5 5
9
DQA1_5 AU43 AD45 DQB0_5 DQB1_5 AD43
DQA0_<5> 3
DQB0_<6> DQB1_<6> 3 DQB1_<5>
6 AU45 DQA0_6 5
9
DQA1_6 AU41 AD47 DQB0_6 DQB1_6 AD41
DQA0_<6> 3
DQB0_<7> DQB1_<7> 3 DQB1_<6>
7 AT44 DQA0_7 5
9
DQA1_7 AT40 AC46 DQB0_7 DQB1_7 AC40
DQA0_<7> 3
DQB0_<8> DQB1_<8> 3 DQB1_<7>
8 AP46 DQA0_8 5
9
DQA1_8 AP40 AA44 DQB0_8 DQB1_8 AA40
DQA0_<8> 3
DQB0_<9> DQB1_<9> 3 DQB1_<8>
9 AM47 DQA0_9 5
9
DQA1_9 AM43 Y45 DQB0_9 DQB1_9 Y43
DQA0_<9> 3
DQB0_<10> DQB1_<10> 3 DQB1_<9>
F
10 AM45 DQA0_10 DQA1_109
5 AM41 Y47 DQB0_10 DQB1_10 Y41
3 3 3 3
0
DQA0_<10> DQA0_<11> 11
DQA0_<11>
AL44 AL42 DQA1_<11> DQA1_<10> DQB0_<10> DQB0_<11> W46 W42 DQB1_<11> DQB1_<10>
DQA0_11 DQA1_119
5 DQB0_11 DQB1_11
DQA0_<11> 3
DQB0_<12> DQB1_<12> 3 DQB1_<11>
12 AK45 DQA0_12 DQA1_129
5 AK41 V47 DQB0_12 DQB1_12 V41
DQA0_<12> 3
DQB0_<13> DQB1_<13> 3 DQB1_<12>
13 AJ44 DQA0_13 DQA1_139
5 AJ42 U46 DQB0_13 DQB1_13 U42
DQA0_<13> 3
DQB0_<14> DQB1_<14> 3 DQB1_<13>
石 19 jo ID
14 AJ46 DQA0_14 DQA1_149
5 AJ40 U44 DQB0_14 DQB1_14 U40
DQA0_<14> 3
DQB0_<15> DQB1_<15> 3 DQB1_<14>
15 AH47 DQA0_15 DQA1_159
5 AH43 T45 DQB0_15 DQB1_15 T43
DQA0_<15> 3 3 DQA1_<15> DQB0_<15> 3 3 DQB1_<15>
9
AL34 CAA0_0 CAA1_0 AL38 5 0 AD35 CAB0_0 CAB1_0 AD39 0
3 CAA0_<0> CAA1_<0> 3 3 CAB0_<0>1 CAB1_<0> 3
1 AF36 CAA0_1 5
9
CAA1_1 AE37 1 W34 CAB0_1 CAB1_1 V39 1
3 CAA0_<1> CAA1_<1> 3 3 CAB0_<1>2 CAB1_<1> 3
2 AK36 CAA0_2 5
9
CAA1_2 AL37 2 AC35 CAB0_2 CAB1_2 AD38 2
3 CAA0_<2> CAA1_<2> 3 3 CAB0_<2>3 CAB1_<2> 3
3 AE34 CAA0_3 5
9
CAA1_3 AF39 3 V36 CAB0_3 CAB1_3 W37 3
3 CAA0_<3> CAA1_<3> 3 3 CAB0_<3>4 CAB1_<3> 3
4 AK35 CAA0_4 5
9
CAA1_4 AJ38 4 AC34 CAB0_4 CAB1_4 AB39 4
3 CAA0_<4> CAA1_<4> 3 3 CAB0_<4>5 CAB1_<4> 3
5 AG35 AG37 5 Y35 Y39 5
阿 09 ne EN
CAA0_5 5
9
CAA1_5 CAB0_5 CAB1_5
3 CAA0_<5> CAA1_<5> 3 3 CAB0_<5>6 CAB1_<5> 3
6 AE35 CAA0_6 5
9
CAA1_6 AF38 6 V35 CAB0_6 CAB1_6 W38 6
3 CAA0_<6> CAA1_<6> 3 3 CAB0_<6>7 CAB1_<6> 3
7 AG34 CAA0_7 5
9
CAA1_7 AG38 7 Y36 CAB0_7 CAB1_7 Y38 7
3 CAA0_<7> CAA1_<7> 3 3 CAB0_<7>8 CAB1_<7> 3
8 AJ35 CAA0_8 5
9
CAA1_8 AJ37 8 AB36 CAB0_8 CAB1_8 AB38 8
3 CAA0_<8> CAA1_<8> 3 3 CAB0_<8>9 CAB1_<8> 3
9 AL35 CAA0_9 5
9
CAA1_9 AK38 9 AD36 CAB0_9 CAB1_9 AC37 9
3 CAA0_<9> CAA1_<9> 3 3 CAB0_<9> CAB1_<9> 3
9 WCKA0_0 AR47 WCKA0_0 WCKA1_0 AR43 WCKA1_0 9
BI BI
9 WCKA0B_0 AT46 WCKA0B_0 WCKA1B_0 AT42 WCKA1B_0 9 9 WCKB0_0 AB45 WCKB0_0 WCKB1_0 AB43 WCKB1_0 9
BI BI BI BI
WCKB0B_0 AC44 AC42 WCKB1B_0
鋒 05 pe TI
9 WCKB0B_0 WCKB1B_0 9
BI BI
9 WCKA0_1 AR45 WCKA0_1 WCKA1_1 AR41 WCKA1_1 9
BI BI
9 WCKA0B_1 AP44 WCKA0B_1 WCKA1B_1 AP42 WCKA1B_1 9 9 WCKB0_1 AB47 WCKB0_1 WCKB1_1 AB41 WCKB1_1 9
BI BI BI BI
9 WCKB0B_1 AA46 WCKB0B_1 WCKB1B_1 AA42 WCKB1B_1 9
BI BI
9 EDCA0_0 AV44 EDCA0_0 EDCA1_0 AY43 EDCA1_0 9
BI BI
9 EDCA0_1 AL46 EDCA0_1 EDCA1_1 AK43 EDCA1_1 9 9 EDCB0_0 AE44 EDCB0_0 EDCB1_0 AF41 EDCB1_0 9
BI BI BI BI
9 EDCB0_1 W44 EDCB0_1 EDCB1_1 V43 EDCB1_1 9
BI BI
9 DBIA0_0 AY45 DBIA0_0 DBIA1_0 AV42 DBIA1_0 9
BI BI
9 DBIA0_1 AK47 DBIA0_1 DBIA1_1 AL40 DBIA1_1 9 9 DBIB0_0 AF45 DBIB0_0 DBIB1_0 AE42 DBIB1_0 9
BI BI BI BI
01 i( AL
9 DBIB0_1 V45 DBIB0_1 DBIB1_1 W40 DBIB1_1 9
BI BI
9 CABIA0 AJ34 CABIA0 CABIA1 AK39 CABIA1 9
OUT OUT
9 CABIB0 AB35 CABIB0 CABIB1 AC38 CABIB1 9
OUT OUT
9 CKEA0 AF35 CKEA0 CKEA1 AH39 CKEA1 9
OUT OUT
9 CKEB0 W35 CKEB0 CKEB1 AA38 CKEB1 9
OUT OUT
9 CKA AH36 CKA
OUT
9 CKAB AH35 CKAB 9 CKB AA35 CKB
OUT OUT
9 CKBB AA36 CKBB
OUT
9 OUT
DRAM_RSTB_A
R3601
(0 2
裴
49.9R 1% R3602
1 UNNAMED_5_CAP_I4_A 2
10R 1%
1
DRAM_RSTA
AM39 DRAM_RSTA 9 OUT
DRAM_RSTB_B
R3611
2
49.9R 1%
1 UNNAMED_5_CAP_I63_A
R3610
2
10R 1%
1
DRAM_RSTB
AE38 DRAM_RSTB
1
1
00 RM 亮
C3600 R3603 C3603 R3607
120pF 5.1K Navi10 REV 0.91 120pF 5.1K Navi10 REV 0.91
50V 1% 50V 1%
5% 5%
2
2
68 A工樂
76 程 )
0) 課
GDDR6x16 CHAB Memory
00 M
U2000 U2100
0
DQA0_<15> G13 M13
DQA1_<10> DQA1_<0> DQB0_<15>
G13 M13
DQB1_<10> DQB1_<0>
RD 17 SI
9 5 15 9 5 9 5 10
DQA0_<15> 3
DQA0_<14> DQ15_A DQ15_B DQA1_<9> DQA1_<1> 3 DQA1_<0> DQB0_<0> DQB0_<14> DQ15_A DQ15_B DQB1_<9> DQB1_<1> 3 DQB1_<0>
F13 N13 9 5 14 9 5 F13 N13 9 5 9
DQA0_<14> 3
DQA0_<12> DQ14_A DQ14_B DQA1_<11> DQA1_<2> 3 DQA1_<1> DQB0_<0> 3
DQB0_<1> DQB0_<12> DQ14_A DQ14_B DQB1_<11> DQB1_<2> 3 DQB1_<1>
E13 P13 9 5 12 9 5 E13 P13 9 5 11
DQA0_<12> 3
E12 P12 9 5 13 9 5 E12 P12 9 5 8
DQA0_<13> 3
B13 U13 9 5 11 9 5 B13 U13 9 5 13
DQA0_<11> 3
B12 U12 9 5 9 9 5 B12 U12 9 5 12
DQA0_<9> 3
A12 V12 9 5 10 9 5 A12 V12 9 5 15
DQA0_<10> 3
B11 U11 9 5 8 9 5 B11 U11 9 5 14
DQA0_<8> 3
G2 M2 9 5 0 9 5 G2 M2 9 5 5
DQA0_<0> 3
F2 N2 9 5 1 9 5 F2 N2 9 5 6
DQA0_<1> 3
E2 P2 9 5 3 9 5 E2 P2 9 5 4
3 3 3 3
(C 96 C
DQA0_<3> DQA0_<2> DQ5_A DQ5_B DQA1_<7> DQA1_<11> DQA1_<10> DQB0_<9> DQB0_<10> DQB0_<2> DQ5_A DQ5_B DQB1_<7> DQB1_<11> DQB1_<10>
E3 P3 9 5 2 9 5 E3 P3 9 5 7
DQA0_<2> 3
B2 U2 9 5 4 9 5 B2 U2 9 5 1
DQA0_<4> 3
B3 U3 9 5 6 9 5 B3 U3 9 5 3
DQA0_<6> 3
A3 V3 9 5 5 9 5 A3 V3 9 5 0
DQA0_<5> 3
B4 U4 9 5 7 9 5 B4 U4 9 5 2
DQA0_<7> 3 DQ0_A DQ0_B 3 DQA1_<15> DQB0_<14> 3
DQB0_<15> DQ0_A DQ0_B 3 DQB1_<15>
DQB0_<15> 3
0 0
CAA0_<9> CAA1_<9> CAA1_<0> 3 CAB0_<9> CAB1_<9> CAB1_<0> 3
9 9 5 J3 K3 9 5 1 9 9 5 J3 K3 9 5 9 1
3 CAA0_<0> CAA0_<8> CA9_A CA9_B CAA1_<8> CAA1_<1> 3 3 CAB0_<0>1 CAB0_<8> CA9_A CA9_B CAB1_<8> CAB1_<1> 3
8 9 5 J4 K4 9 5 2 8 9 5 J4 K4 9 5 8 2
)2 7 ON
7 9 5 J11 K11 9 5 3 7 9 5 J11 K11 9 5 7 3
6 9 5 J12 K12 9 5 4 6 9 5 J12 K12 9 5 6 4
5 9 5 H10 L10 9 5 5 5 9 5 H10 L10 9 5 5 5
4 9 5 H5 L5 9 5 6 4 9 5 H5 L5 9 5 4 6
3 9 5 H12 L12 9 5 7 3 9 5 H12 L12 9 5 3 7
2 9 5 G4 M4 9 5 8 2 9 5 G4 M4 9 5 2 8
1 9 5 G11 M11 9 5 9 1 9 5 G11 M11 9 5 1 9
0 9 5 H3 L3 9 5 0 9 5 H3 L3 9 5 0
3 CAA0_<9> CA0_A CA0_B 3 CAB0_<9> CA0_A CA0_B
F
5 CKEA0 G10 CKE_N_A CKE_N_B M10 CKEA1 5 5 CKEB0 G10 CKE_N_A CKE_N_B M10 CKEB1 5
0
IN IN IN IN
5 WCKA0_1 D11 WCK1_t_A/NC WCK1_T_B R11 WCKA1_1 5 5 WCKB0_1 D11 WCK1_t_A/NC WCK1_T_B R11 WCKB1_1 5
IN IN IN IN
5 WCKA0B_1 D10 WCK1_c_A/NC WCK1_C_B R10 WCKA1B_1 5 5 WCKB0B_1 D10 WCK1_c_A/NC WCK1_C_B R10 WCKB1B_1 5
IN IN IN IN
石 19 jo ID
5 WCKA0_0 D4 WCK0_T_B/NC R4 WCKA1_0 5 5 WCKB0_0 D4 WCK0_T_B/NC R4 WCKB1_0 5
IN WCK0_t_A IN IN WCK0_t_A IN
5 WCKA0B_0 D5 WCK0_C_B/NC R5 WCKA1B_0 5 5 WCKB0B_0 D5 WCK0_C_B/NC R5 WCKB1B_0 5
IN WCK0_c_A IN IN WCK0_c_A IN
5 EDCA0_1 C13 T13 EDCA1_1 5 5 EDCB0_1 C13 T13 EDCB1_1 5

OUT EDC1_A EDC1_B OUT BI EDC1_A EDC1_B BI
5 EDCA0_0 C2 T2 EDCA1_0 5 5 EDCB0_0 C2 T2 EDCB1_0 5
OUT EDC0_A EDC0_B OUT BI EDC0_A EDC0_B BI
5 DBIA0_1 D13 R13 DBIA1_1 5 5 DBIB0_1 D13 R13 DBIB1_1 5

BI DBI1_A DBI1_B BI OUT DBI1_A DBI1_B OUT
5 DBIA0_0 D2 R2 DBIA1_0 5 5 DBIB0_0 D2 R2 DBIB1_0 5
+VDD_MEM BI DBI0_A DBI0_B BI +VDD_MEM OUT DBI0_A DBI0_B OUT
J5 K5 J5 K5
阿 09 ne EN
5 CABIA0 CABI_N_A CABI_N_B CABIA1 5 5 CABIB0 CABI_N_A CABI_N_B CABIB1 5
IN IN IN IN
1
R2007 22.37K 1% 1
R2107 22.37K 1%
VREFC_A VREFC_B
1
R2008 25.49K 1% K1 1
R2108 25.49K 1% K1
VREFC VREFC
1
C2000 2
1uF 6.3V 1
C2100 2
1uF 6.3V
ZQ_A0 ZQ_A1 ZQ_B0 ZQ_B1

10% 1
R2006 2120R 1% J14 K14 1
R2013 2120R 1% 10% 1
R2106 2120R 1% J14 K14 1
R2113 2120R 1%
ZQ_A ZQ_B ZQ_A ZQ_B
G5 RFU_A/NC RFU_B/NC M5 G5 RFU_A/NC RFU_B/NC M5
5 CKA J10 5 CKB J10

IN CK_t IN CK_t
5 CKAB K10 5 CKBB K10
IN CK_c IN CK_c
鋒 05 pe TI
5 DRAM_RSTB_A J1 5 DRAM_RSTB_B J1
IN RESET_n IN RESET_n
N5 TCK
N5 TCK
F10 TDI
F10 TDI
N10 N10
TDO TDO
F5 F5
TMS TMS
01 i( AL
+VDD_MEM +VDD_MEM
V14 U14 V14 U14

VDD_12 VSS_52 VDD_12 VSS_52
A14 R14 A14 R14
L13 VDD_10 VSS_50
N14 L13 VDD_10 VSS_50
N14
H13 VDD_9 VSS_49
M14 H13 VDD_9 VSS_49
M14
P10 VDD_8
G14 GDDR6 CHA +VDD_MEM Decoupling Caps P10 VDD_8
G14
VSS_48 VSS_48
P5 VDD_7 F14 P5 VDD_7 F14
VSS_47 VSS_47
E10 VDD_6 D14 E10 VDD_6 D14
VSS_46 +VDD_MEM VSS_46
E5 VDD_5 VSS_45
B14 E5 VDD_5 VSS_45
B14
(0
L2 VDD_4 VSS_44
V13 L2 VDD_4 VSS_44
V13
H2 A13 H2 A13
裴
1
V1 T12 V1 T12
A1 R12 C2040 C2020 C2021 C2022 C2023 C2024 C2025 C2026 C2027 C2028 C2029 A1 R12
N12 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF N12
VSS_40 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V VSS_40
VSS_39
M12 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
VSS_39
M12
2
2
+VDD_MEM +VDD_MEM
G12 G12
VSS_38 VSS_38
F12 F12
VSS_37 VSS_37
1
1
T14 D12 T14 D12
VDDQ_28 VSS_36 VDDQ_28 VSS_36
00 RM 亮
P14 VDDQ_27 VSS_35
C12 C2041 C2030 C2031 C2032 C2033 C2034 C2035 C2036 C2037 C2038 C2039 P14 VDDQ_27 VSS_35
C12
L14 V11 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF L14 V11
VDDQ_26 VSS_34 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V VDDQ_26 VSS_34
H14 T10 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
H14 T10
2
2
E14 P11 E14 P11
+VPP
C14 L11 C14 L11
K13 VDDQ_22 VSS_30
H11 K13 VDDQ_22 VSS_30
H11
J13 VDDQ_21 VSS_29
E11 J13 VDDQ_21 VSS_29
E11
1
1
N11 T5 N11 T5
T11 A11 C2042 C2043 C2044 C2045 C2046 T11 A11
U10 V4 10uF 1uF 1uF 1uF 1uF U10 V4
68 A工樂
VDDQ_18 VSS_26 4V 6.3V 6.3V 6.3V 6.3V VDDQ_18 VSS_26
T4 VDDQ_17
C10 10% 10% 10% 10% 10%
T4 VDDQ_17
C10
2
2
VSS_25 VSS_25
F11 VDDQ_16 VSS_24
P4 F11 VDDQ_16 VSS_24
P4
B10 L4 B10 L4
U5 H4 U5 H4
C11 E4 C11 E4
C4 VDDQ_12
C5 C4 VDDQ_12
C5
VSS_20 VSS_20
B5 VDDQ_11 VSS_19
A4 B5 VDDQ_11 VSS_19
A4
N4 T3 N4 T3
F4 R3 F4 R3
K2 N3 GDDR6 CHB +VDD_MEM Decoupling Caps K2 N3
76
J2 VDDQ_7 VSS_15
M3 J2 VDDQ_7 VSS_15
M3
+VDD_MEM
T1 G3 T1 G3
)
P1 F3 P1 F3
L1 D3 L1 D3
程
H1 C3 H1 C3
1
1
E1 VDDQ_2 VSS_10
V2 E1 VDDQ_2 VSS_10
V2
C1 VDDQ_1 VSS_9
A2 C2140 C2120 C2121 C2122 C2123 C2124 C2125 C2126 C2127 C2128 C2129 C1 VDDQ_1 VSS_9
A2
U1 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF U1
R1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
R1
VSS_7 VSS_7
2
2
+VPP +VPP
0)
N1 N1
VSS_6 VSS_6
VSS_5
M1 VSS_5
M1
1
1
V10 VPP_4 VSS_4
G1 V10 VPP_4 VSS_4
G1
A10 F1 C2141 C2130 C2131 C2132 C2133 C2134 C2135 C2136 C2137 C2138 C2139 A10 F1
VPP_3 VSS_3 VPP_3 VSS_3
V5 D1 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF V5 D1
課
VPP_2 VSS_2 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V VPP_2 VSS_2
A5 GDDR6 B1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
A5 GDDR6 B1
2
2
+VPP
1
C2142 C2143 C2144 C2145 C2146

10uF 1uF 1uF 1uF 1uF
4V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10%
2
+VDD_MEM
DNI NS2000
2 1 FB_MVDD_1 21
OUT
DNI NS2001
2 1 FB_MVSS_1 21
OUT
DNI NS2002
2 1 FB_MVDD_2 21
OUT
DNI NS2003
2 1 FB_MVSS_2 21
OUT
GDDR6x16 CHCD Memory
00 M
0
DQC0_<0> U2200 U2300
DQC0_<0> 4
DQC0_<1> DQC1_<0> DQD0_<0>
RD 17 SI
DQC0_<1> 4
DQC0_<2> 10 DQC0_<15> DQC1_<10> DQC1_<1> 4 DQC1_<0> DQD0_<0> 4
DQD0_<1> 10 DQD0_<15> DQD1_<9> 10
DQD1_<0>
15 6 G13 M13 10 6 15 6 G13 M13 10 6 9 6 0
DQC0_<2> 4
DQC0_<3> DQC0_<14> DQ15_A DQ15_B DQC1_<8> DQC1_<2> 4 DQC1_<1> DQD0_<1> 4
DQD0_<2> DQD0_<14> DQ15_A DQ15_B DQD1_<11> DQD1_<1> 4 DQD1_<0>
14 F13 N13 10 6 14 F13 N13 10 6 11 1
DQC0_<3> 4
12 E13 P13 10 6 12 E13 P13 10 6 10 2
DQC0_<4> 4
13 E12 P12 10 6 13 E12 P12 10 6 8 3
DQC0_<5> 4
11 B13 U13 10 6 11 B13 U13 10 6 12 4
DQC0_<6> 4
9 10 6 B12 U12 10 6 9 10 6 B12 U12 10 6 13 5
DQC0_<7> 4
10 A12 V12 10 6 10 A12 V12 10 6 14 6
DQC0_<8> 4
8 10 6 B11 U11 10 6 8 10 6 B11 U11 10 6 15 7
DQC0_<9> 4
0 10 6 G2 M2 10 6 0 10 6 G2 M2 10 6 5 8
DQC0_<10> 4
1 10 6 F2 N2 10 6 1 10 6 F2 N2 10 6 6 9
4 DQC1_<11> 4 4 4
(C 96 C
DQC0_<11> DQC0_<12> DQC0_<3> DQ6_A DQ6_B DQC1_<4> DQC1_<10> DQD0_<10> DQD0_<11> DQD0_<3> DQ6_A DQ6_B DQD1_<4> DQD1_<10> DQD1_<9>
3 10 6 E2 P2 10 6 3 10 6 E2 P2 10 6 4 10
DQC0_<12> 4
2 10 6 E3 P3 10 6 2 10 6 E3 P3 10 6 7 11
DQC0_<13> 4
4 10 6 B2 U2 10 6 4 10 6 B2 U2 10 6 2 12
DQC0_<14> 4
6 10 6 B3 U3 10 6 6 10 6 B3 U3 10 6 3 13
DQC0_<15> 4 DQC0_<5> DQ2_A DQ2_B DQC1_<0> DQC1_<15> 4 DQC1_<14> DQD0_<14> 4
5 10 6 A3 V3 10 6 5 10 6 A3 V3 10 6 0 14
DQC0_<7> DQ1_A DQ1_B DQC1_<1> 4 DQC1_<15> DQD0_<15> 4 DQD0_<7> DQ1_A DQ1_B DQD1_<1> DQD1_<15> 4 DQD1_<14>
7 10 6 B4 U4 10 6 7 10 6 B4 U4 10 6 1 15
3 CAC0_<0> DQ0_A DQ0_B DQ0_A DQ0_B 4 DQD1_<15>
1 0
3 CAC0_<1> CAC1_<0> 3 3 CAD0_<0>
2 1 1
3 CAC0_<2> CAC0_<9> CAC1_<9> CAC1_<1> 3 3 CAD0_<1> CAD0_<9> CAD1_<9> CAD1_<0> 3
3 9 10 6 J3 K3 10 6 2 2 9 10 6 J3 K3 10 6 9 1
)2 7 ON
3 CAC0_<3> CAC0_<8> CA9_A CA9_B CAC1_<8> CAC1_<2> 3 3 CAD0_<2> CAD0_<8> CA9_A CA9_B CAD1_<8> CAD1_<1> 3
4 8 10 6 J4 K4 10 6 3 3 8 10 6 J4 K4 10 6 8 2
5 7 10 6 J11 K11 10 6 4 4 7 10 6 J11 K11 10 6 7 3
6 6 10 6 J12 K12 10 6 5 5 6 10 6 J12 K12 10 6 6 4
7 5 10 6 H10 L10 10 6 6 6 5 10 6 H10 L10 10 6 5 5
8 4 10 6 H5 L5 10 6 7 7 4 10 6 H5 L5 10 6 4 6
9 3 10 6 H12 L12 10 6 8 8 3 10 6 H12 L12 10 6 3 7
2 10 6 G4 M4 10 6 9 9 2 10 6 G4 M4 10 6 2 8
CAC0_<1> CA2_A CA2_B CAC1_<1> CAC1_<9> 3 3 CAD0_<9> CAD0_<1> CA2_A CA2_B CAD1_<1> CAD1_<8> 3
1 10 6 G11 M11 10 6 1 10 6 G11 M11 10 6 1 9
CAC0_<0> CA1_A CA1_B CAC1_<0> CAD0_<0> CA1_A CA1_B CAD1_<0> CAD1_<9> 3
0 10 6 H3 L3 10 6 0 10 6 H3 L3 10 6 0
CA0_A CA0_B CA0_A CA0_B
0 F
6 CKEC0 G10 CKE_N_A CKE_N_B M10 CKEC1 6 6 CKED0 G10 CKE_N_A CKE_N_B M10 CKED1 6
IN IN IN IN
6 WCKC0_1 D11 WCK1_t_A/NC WCK1_T_B R11 WCKC1_1 6 6 WCKD0_1 D11 WCK1_t_A/NC WCK1_T_B R11 WCKD1_1 6
IN IN IN IN
6 WCKC0B_1 D10 WCK1_c_A/NC WCK1_C_B R10 WCKC1B_1 6 6 WCKD0B_1 D10 WCK1_c_A/NC WCK1_C_B R10 WCKD1B_1 6
IN IN IN IN
石 19 jo ID
6 WCKC0_0 D4 WCK0_T_B/NC R4 WCKC1_0 6 6 WCKD0_0 D4 WCK0_T_B/NC R4 WCKD1_0 6
6 WCKC0B_0 D5 WCK0_C_B/NC R5 WCKC1B_0 6 6 WCKD0B_0 D5 WCK0_C_B/NC R5 WCKD1B_0 6
6 EDCC0_1 C13 T13 EDCC1_1 6 6 EDCD0_1 C13 T13 EDCD1_1 6

OUT EDC1_A EDC1_B OUT OUT EDC1_A EDC1_B OUT
6 EDCC0_0 C2 T2 EDCC1_0 6 6 EDCD0_0 C2 T2 EDCD1_0 6
6 DBIC0_1 D13 R13 DBIC1_1 6 6 DBID0_1 D13 R13 DBID1_1 6

BI DBI1_A DBI1_B BI BI DBI1_A DBI1_B BI
6 DBIC0_0 D2 R2 DBIC1_0 6 6 DBID0_0 D2 R2 DBID1_0 6
+VDD_MEM BI DBI0_A DBI0_B BI +VDD_MEM BI DBI0_A DBI0_B BI
阿 09 ne EN
6 CABIC0 J5 CABI_N_A CABI_N_B K5 CABIC1 6 6 CABID0 J5 CABI_N_A CABI_N_B K5 CABID1 6
IN IN IN IN
1
R2207 22.37K 1% 1
R2307 22.37K 1%
VREFC_C VREFC_D
1
R2208 25.49K 1% K1 1
R2308 25.49K 1% K1
VREFC VREFC
1
C2200 2
1uF 6.3V 1
C2300 2
1uF 6.3V
ZQ_C0 ZQ_C1 ZQ_D0 ZQ_D1

10% 1
R2206 2120R 1% J14 K14 1
R2213 2120R 1% 10% 1
R2306 2120R 1% J14 K14 1
R2313 2120R 1%
ZQ_A ZQ_B ZQ_A ZQ_B
6 CKC J10 6 CKD J10

IN CK_t IN CK_t
鋒 05 pe TI
6 CKCB K10 6 CKDB K10
IN CK_c IN CK_c
6 DRAM_RSTB_C J1 6 DRAM_RSTB_D J1
N5 TCK
N5 TCK
F10 F10
TDI TDI
N10 N10
TDO TDO
F5 F5
TMS TMS
01 i( AL
+VDD_MEM +VDD_MEM
V14 U14 V14 U14

A14 VDD_11 VSS_51
R14 A14 VDD_11 VSS_51
R14
L13 VDD_10 VSS_50
N14 L13 VDD_10 VSS_50
N14
H13 M14 H13 M14
P10 VDD_8 G14 P10 VDD_8 G14
VSS_48 VSS_48
P5 VDD_7 F14 GDDR6 CHC +VDD_MEM Decoupling Caps P5 VDD_7 F14
VSS_47 VSS_47
E10 VDD_6 VSS_46
D14 E10 VDD_6 VSS_46
D14
(0
E5 VDD_5 VSS_45
B14 E5 VDD_5 VSS_45
B14
+VDD_MEM
L2 V13 L2 V13
裴
H2 A13 H2 A13
V1 T12 V1 T12
1
1
A1 VDD_1 VSS_41
R12 A1 VDD_1 VSS_41
R12
VSS_40
N12 C2240 C2220 C2221 C2222 C2223 C2224 C2225 C2226 C2227 C2228 C2229 VSS_40
N12
M12 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF M12
+VDD_MEM +VDD_MEM
G12 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
G12
VSS_38 VSS_38
2
2
F12 F12
VSS_37 VSS_37
00 RM 亮
T14 VDDQ_28 VSS_36
D12 T14 VDDQ_28 VSS_36
D12
1
1
P14 VDDQ_27 VSS_35
C12 P14 VDDQ_27 VSS_35
C12
L14 V11 C2241 C2230 C2231 C2232 C2233 C2234 C2235 C2236 C2237 C2238 C2239 L14 V11
H14 T10 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF H14 T10
E14 P11 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
E14 P11
2
2
C14 VDDQ_23 VSS_31
L11 C14 VDDQ_23 VSS_31
L11
+VPP
K13 VDDQ_22 VSS_30
H11
J13 E11 J13 E11
N11 T5 N11 T5
1
T11 A11 T11 A11
68 A工樂
U10 VDDQ_18 VSS_26
V4 C2242 C2243 C2244 C2245 C2246 U10 VDDQ_18 VSS_26
V4
T4 C10 10uF 1uF 1uF 1uF 1uF T4 C10
F11 P4 10% 10% 10% 10% 10%
F11 P4
2
B10 L4 B10 L4
U5 H4 U5 H4
C11 VDDQ_13 VSS_21
E4 C11 VDDQ_13 VSS_21
E4
C4 VDDQ_12
C5 C4 VDDQ_12
C5
VSS_20 VSS_20
B5 A4 B5 A4
N4 T3 N4 T3
F4 R3 F4 R3
76
K2 N3 GDDR6 CHD +VDD_MEM Decoupling Caps K2 N3
J2 M3 J2 M3
)
T1 G3 T1 G3
+VDD_MEM
P1 F3 P1 F3
程
L1 D3 L1 D3
H1 VDDQ_3 VSS_11
C3 H1 VDDQ_3 VSS_11
C3
1
1
E1 VDDQ_2 VSS_10
V2 E1 VDDQ_2 VSS_10
V2
C1 A2 C2340 C2320 C2321 C2322 C2323 C2324 C2325 C2326 C2327 C2328 C2329 C1 A2
0)
R1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
R1
VSS_7 VSS_7
2
2
+VPP +VPP
VSS_6
N1 VSS_6
N1
VSS_5
M1 VSS_5
M1
1
V10 G1 V10 G1
課
A5 VPP_1 GDDR6 VSS_1
B1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
A5 VPP_1 GDDR6 VSS_1
B1
2
+VPP
1
C2342 C2343 C2344 C2345 C2346

4V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10%
2
2
GDDR6x16 CHEF Memory
00 M
0
U2400 U2500
RD 17 SI
0 0
DQE0_<0> 6 11 7
DQE1_<6>
G13 M13 11 7
DQE0_<0>
0
DQE1_<0> 5 11 7
DQF1_<5>
G13 M13 11 7
DQF0_<0>
0
DQF1_<0>
6 DQE0_<0> DQE0_<1> DQE1_<4> DQ15_A DQ15_B DQE0_<1> DQE1_<1> DQE1_<0> 6 DQF0_<0> DQF1_<7> DQ15_A DQ15_B DQF0_<1> DQF1_<1> DQF1_<0> 6
1 1 4 11 7 F13 N13 11 7 1 0 7 11 7 F13 N13 11 7 1
6 DQE0_<1> DQE0_<2> DQE1_<5> DQ14_A DQ14_B DQE0_<3> DQE1_<2> DQE1_<1> 6 6 DQF0_<0> DQF0_<1> DQF1_<6> DQ14_A DQ14_B DQF0_<3> DQF1_<2> DQF1_<1> 6
2 2 5 11 7 E13 P13 11 7 3 1 6 11 7 E13 P13 11 7 3
3 3 7 11 7 E12 P12 11 7 2 2 4 11 7 E12 P12 11 7 2
4 4 3 11 7 B13 U13 11 7 4 3 2 11 7 B13 U13 11 7 4
5 5 2 11 7 B12 U12 11 7 6 4 3 11 7 B12 U12 11 7 6
6 6 1 11 7 A12 V12 11 7 5 5 0 11 7 A12 V12 11 7 5
7 7 0 11 7 B11 U11 11 7 7 6 1 11 7 B11 U11 11 7 7
8 8 10 G2 M2 11 7 15 7 10 G2 M2 11 7 15
9 9 9 11 7 F2 N2 11 7 14 8 9 11 7 F2 N2 11 7 14
6 6 6 6
(C 96 C
DQE0_<9> DQE0_<10> DQE1_<11> DQ6_A DQ6_B DQE0_<12> DQE1_<10> DQE1_<9> DQF0_<8> DQF0_<9> DQF1_<11> DQ6_A DQ6_B DQF0_<12> DQF1_<10> DQF1_<9>
10 10 11 E2 P2 11 7 12 9 11 E2 P2 11 7 12
11 11 8 11 7 E3 P3 11 7 13 10 8 11 7 E3 P3 11 7 13
12 12 13 B2 U2 11 7 11 11 13 B2 U2 11 7 11
13 13 12 B3 U3 11 7 9 12 12 B3 U3 11 7 9
14 14 15 A3 V3 11 7 10 13 15 A3 V3 11 7 10
15 15 14 B4 U4 11 7 8 14 14 B4 U4 11 7 8
6 DQE0_<15> DQ0_A DQ0_B DQE1_<15> 6 6 DQF0_<14> 15
DQF0_<15> DQ0_A DQ0_B DQF1_<15> 6
6 DQF0_<15>
3 CAE0_<0> CAE1_<9> CAE0_<9> CAE1_<0> 3 CAF1_<9> CAF0_<9> CAF1_<0> 3
1 9 11 7 J3 K3 11 7 9 1 9 11 7 J3 K3 11 7 9 1
)2 7 ON
3 CAE0_<1> CAE1_<8> CA9_A CA9_B CAE0_<8> CAE1_<1> 3 3 CAF0_<0> CAF1_<8> CA9_A CA9_B CAF0_<8> CAF1_<1> 3
2 8 11 7 J4 K4 11 7 8 2 1 8 11 7 J4 K4 11 7 8 2
3 7 11 7 J11 K11 11 7 7 3 2 7 11 7 J11 K11 11 7 7 3
4 6 11 7 J12 K12 11 7 6 4 3 6 11 7 J12 K12 11 7 6 4
5 5 11 7 H10 L10 11 7 5 5 4 5 11 7 H10 L10 11 7 5 5
6 4 11 7 H5 L5 11 7 4 6 5 4 11 7 H5 L5 11 7 4 6
7 3 11 7 H12 L12 11 7 3 7 6 3 11 7 H12 L12 11 7 3 7
8 2 11 7 G4 M4 11 7 2 8 7 2 11 7 G4 M4 11 7 2 8
9 1 11 7 G11 M11 11 7 1 9 8 1 11 7 G11 M11 11 7 1 9
0 11 7 H3 L3 11 7 0 9 0 11 7 H3 L3 11 7 0
CA0_A CA0_B 3 CAF0_<9> CA0_A CA0_B
0 F
7 CKEE1 G10 CKE_N_A CKE_N_B M10 CKEE0 7 7 CKEF1 G10 CKE_N_A CKE_N_B M10 CKEF0 7
IN IN IN IN
7 WCKE1_0 D11 WCK1_t_A/NC WCK1_T_B R11 WCKE0_0 7 7 WCKF1_0 D11 WCK1_t_A/NC WCK1_T_B R11 WCKF0_0 7
IN IN IN IN
7 WCKE1B_0 D10 WCK1_c_A/NC WCK1_C_B R10 WCKE0B_0 7 7 WCKF1B_0 D10 WCK1_c_A/NC WCK1_C_B R10 WCKF0B_0 7
IN IN IN IN
石 19 jo ID
7 WCKE1_1 D4 WCK0_T_B/NC R4 WCKE0_1 7 7 WCKF1_1 D4 WCK0_T_B/NC R4 WCKF0_1 7
7 WCKE1B_1 D5 WCK0_C_B/NC R5 WCKE0B_1 7 7 WCKF1B_1 D5 WCK0_C_B/NC R5 WCKF0B_1 7
7 EDCE1_0 C13 T13 EDCE0_0 7 7 EDCF1_0 C13 T13 EDCF0_0 7

7 EDCE1_1 C2 T2 EDCE0_1 7 7 EDCF1_1 C2 T2 EDCF0_1 7
7 DBIE1_0 D13 R13 DBIE0_0 7 7 DBIF1_0 D13 R13 DBIF0_0 7

7 DBIE1_1 D2 R2 DBIE0_1 7 7 DBIF1_1 D2 R2 DBIF0_1 7
阿 09 ne EN
7 CABIE1 J5 CABI_N_A CABI_N_B K5 CABIE0 7 7 CABIF1 J5 CABI_N_A CABI_N_B K5 CABIF0 7
IN IN IN IN
1
R2407 22.37K 1% 1
R2507 22.37K 1%
VREFC_E VREFC_F
1
R2408 25.49K 1% K1 1
R2508 25.49K 1% K1
VREFC VREFC
1
C2400 2
1uF 6.3V 1
C2500 2
1uF 6.3V
ZQ_E1 ZQ_E0 ZQ_F1 ZQ_F0

10% 1
R2406 2120R 1% J14 K14 1
R2413 2120R 1% 10% 1
R2506 2120R 1% J14 K14 1
R2513 2120R 1%
ZQ_A ZQ_B ZQ_A ZQ_B
7 CKE J10 7 CKF J10

IN CK_t IN CK_t
鋒 05 pe TI
7 CKEB K10 7 CKFB K10
IN CK_c IN CK_c
7 DRAM_RSTB_E J1 7 DRAM_RSTB_F J1
N5 TCK
N5 TCK
F10 F10
TDI TDI
N10 N10
TDO TDO
F5 F5
TMS TMS
01 i( AL
+VDD_MEM +VDD_MEM
V14 U14 V14 U14

A14 VDD_11 VSS_51
R14 A14 VDD_11 VSS_51
R14
L13 VDD_10 VSS_50
N14 L13 VDD_10 VSS_50
N14
H13 M14 H13 M14
P10 VDD_8 G14 P10 VDD_8 G14
VSS_48 VSS_48
P5 VDD_7 F14 GDDR6 CHE +VDD_MEM Decoupling Caps P5 VDD_7 F14
VSS_47 VSS_47
E10 VDD_6 VSS_46
D14
(0
E5 VDD_5 VSS_45
B14 E5 VDD_5 VSS_45
B14
+VDD_MEM
L2 V13 L2 V13
裴
H2 A13 H2 A13
V1 T12 V1 T12
1
A1 VDD_1 VSS_41
R12 A1 VDD_1 VSS_41
R12
VSS_40
N12 C2440 C2420 C2421 C2422 C2423 C2424 C2425 C2426 C2427 C2428 C2429 VSS_40
N12
M12 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF M12
+VDD_MEM +VDD_MEM
G12 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
G12
VSS_38 VSS_38
2
2
F12 F12
VSS_37 VSS_37
00 RM 亮
T14 VDDQ_28 VSS_36
D12
1
1
P14 VDDQ_27 VSS_35
C12 P14 VDDQ_27 VSS_35
C12
L14 V11 C2441 C2430 C2431 C2432 C2433 C2434 C2435 C2436 C2437 C2438 C2439 L14 V11
H14 T10 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF H14 T10
E14 P11 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
E14 P11
2
2
C14 VDDQ_23 VSS_31
L11 C14 VDDQ_23 VSS_31
L11
+VPP
K13 VDDQ_22 VSS_30
H11
J13 E11 J13 E11
N11 T5 N11 T5
1
1
T11 A11 T11 A11
68 A工樂
U10 VDDQ_18 VSS_26
V4 C2442 C2443 C2444 C2445 C2446 U10 VDDQ_18 VSS_26
V4
T4 C10 10uF 1uF 1uF 1uF 1uF T4 C10
F11 P4 10% 10% 10% 10% 10%
F11 P4
2
B10 L4 2 B10 L4
U5 H4 U5 H4
C11 VDDQ_13 VSS_21
E4
C4 VDDQ_12
C5 C4 VDDQ_12
C5
VSS_20 VSS_20
B5 A4 B5 A4
N4 T3 N4 T3
F4 R3 F4 R3
76
K2 N3 GDDR6 CHF +VDD_MEM Decoupling Caps K2 N3
J2 M3 J2 M3
)
T1 G3 T1 G3
+VDD_MEM
P1 F3 P1 F3
程
L1 D3 L1 D3
H1 VDDQ_3 VSS_11
C3 H1 VDDQ_3 VSS_11
C3
1
1
E1 VDDQ_2 VSS_10
V2 E1 VDDQ_2 VSS_10
V2
0)
R1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
R1
VSS_7 VSS_7
2
2
+VPP +VPP
VSS_6
N1 VSS_6
N1
VSS_5
M1 VSS_5
M1
1
1
V10 G1 V10 G1
課
A5 VPP_1 VSS_1
B1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
A5 VPP_1 VSS_1
B1
2
+VPP
2
GDDR6 GDDR6
1
C2542 C2543 C2544 C2545 C2546

4V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10%
2
19ci203
GDDR6x16 CHGH Memory
00 M
0
U2600 U2700
RD 17 SI
0
DQG0_<0>
8 DQG0_<0> DQG0_<1> DQG1_<5> DQG0_<0> DQH0_<0> DQH1_<5> DQH0_<0>
1 5 12 8 G13 M13 12 8 0 0 5 12 8 G13 M13 12 8 0
8 DQG0_<1> DQG0_<2> DQG1_<6> DQ15_A DQ15_B DQG0_<1> DQG1_<0> 8 DQH0_<0> DQH0_<1> DQH1_<6> DQ15_A DQ15_B DQH0_<1> DQH1_<0>
2 6 12 8 F13 N13 12 8 1 1 6 12 8 F13 N13 12 8 1
8 DQG0_<2> DQG0_<3> DQG1_<4> DQ14_A DQ14_B DQG0_<3> DQG1_<1> 16
DQG1_<0> 8 8 DQH0_<1> DQH0_<2> DQH1_<4> DQ14_A DQ14_B DQH0_<3> DQH1_<1> DQH1_<0> 8
3 4 12 8 E13 P13 12 8 3 2 4 12 8 E13 P13 12 8 3
4 7 12 8 E12 P12 12 8 2 3 7 12 8 E12 P12 12 8 2
8 DQG0_<4> DQG0_<5> DQG1_<2> DQ12_A DQ12_B DQG0_<4> DQG1_<3> 20 DQG1_<2> 8 8 DQH0_<3> DQH0_<4> DQH1_<2> DQ12_A DQ12_B DQH0_<4> DQH1_<3> DQH1_<2> 8
5 2 12 8 B13 U13 12 8 4 4 2 12 8 B13 U13 12 8 4
6 3 12 8 B12 U12 12 8 6 5 3 12 8 B12 U12 12 8 6
7 0 12 8 A12 V12 12 8 5 6 0 12 8 A12 V12 12 8 5
8 1 12 8 B11 U11 12 8 7 7 1 12 8 B11 U11 12 8 7
9 10 G2 M2 12 8 15 8 10 G2 M2 12 8 15
8 8 8 8
(C 96 C
DQG0_<9> DQG0_<10> DQG1_<9> DQ7_A DQ7_B DQG0_<14> DQG1_<8> 18 DQG1_<7> DQH0_<8> DQH0_<9> DQH1_<9> DQ7_A DQ7_B DQH0_<14> DQH1_<8> DQH1_<7>
10 9 12 8 F2 N2 12 8 14 9 9 12 8 F2 N2 12 8 14
11 11 E2 P2 12 8 12 10 11 E2 P2 12 8 12
12 8 12 8 E3 P3 12 8 13 8 12 8 E3 P3 12 8 13
13 14 B2 U2 12 8 11 13 B2 U2 12 8 11
14 12 B3 U3 12 8 9 13 12 B3 U3 12 8 9
15 15 A3 V3 12 8 10 14 15 A3 V3 12 8 10
8 DQG0_<15> DQG1_<13> DQ1_A DQ1_B DQG0_<8> DQG1_<14> 31 DQG1_<13> 8 8 DQH0_<14> DQH0_<15> DQH1_<14> DQ1_A DQ1_B DQH0_<8> DQH1_<14> DQH1_<13> 8
13 B4 U4 12 8 8 15 14 B4 U4 12 8 8
DQ0_A DQ0_B DQG1_<15> 30 DQG1_<14> 8 8 DQH0_<15> DQ0_A DQ0_B DQH1_<15> DQH1_<14> 8
3 CAG0_<0> 26
DQG1_<15> 8 DQH1_<15> 8
1
)2 7 ON
3 CAG0_<1> CAG1_<9> CAG0_<9> 3 CAH0_<0> CAH1_<9> CAH0_<9>
2 9 12 8 J3 K3 12 8 9 1 9 12 8 J3 K3 12 8 9
3 CAG0_<2> CAG1_<8> CA9_A CA9_B CAG0_<8> CAG1_<0> 3 3 CAH0_<1> CAH1_<8> CA9_A CA9_B CAH0_<8> CAH1_<0> 3
3 8 12 8 J4 K4 12 8 8 1 2 8 12 8 J4 K4 12 8 8 1
4 7 12 8 J11 K11 12 8 7 2 3 7 12 8 J11 K11 12 8 7 2
5 6 12 8 J12 K12 12 8 6 3 4 6 12 8 J12 K12 12 8 6 3
6 5 12 8 H10 L10 12 8 5 4 5 5 12 8 H10 L10 12 8 5 4
7 4 12 8 H5 L5 12 8 4 5 6 4 12 8 H5 L5 12 8 4 5
8 3 12 8 H12 L12 12 8 3 6 7 3 12 8 H12 L12 12 8 3 6
9 2 12 8 G4 M4 12 8 2 7 8 2 12 8 G4 M4 12 8 2 7
1 12 8 G11 M11 12 8 1 8 9 1 12 8 G11 M11 12 8 1 8
CAG1_<0> CA1_A CA1_B CAG0_<0> CAG1_<8> 3 3 CAH0_<9> CAH1_<0> CA1_A CA1_B CAH0_<0> CAH1_<8> 3
F
0 12 8 H3 L3 12 8 0 9 0 12 8 H3 L3 12 8 0 9
CAG1_<9> 3 CAH1_<9> 3
0
CA0_A CA0_B CA0_A CA0_B
8 CKEG1 G10 CKE_N_A CKE_N_B M10 CKEG0 8 8 CKEH1 G10 CKE_N_A CKE_N_B M10 CKEH0 8
IN IN IN IN
8 WCKG1_0 D11 WCK1_t_A/NC WCK1_T_B R11 WCKG0_0 8 8 WCKH1_0 D11 WCK1_t_A/NC WCK1_T_B R11 WCKH0_0 8
IN IN IN IN
石 19 jo ID
8 WCKG1B_0 D10 WCK1_c_A/NC WCK1_C_B R10 WCKG0B_0 8 8 WCKH1B_0 D10 WCK1_c_A/NC WCK1_C_B R10 WCKH0B_0 8
IN IN IN IN
8 WCKG1_1 D4 WCK0_T_B/NC R4 WCKG0_1 8 8 WCKH1_1 D4 WCK0_T_B/NC R4 WCKH0_1 8

8 WCKG1B_1 D5 WCK0_C_B/NC R5 WCKG0B_1 8 8 WCKH1B_1 D5 WCK0_C_B/NC R5 WCKH0B_1 8
8 EDCG1_0 C13 T13 EDCG0_0 8 8 EDCH1_0 C13 T13 EDCH0_0 8

8 EDCG1_1 C2 T2 EDCG0_1 8 8 EDCH1_1 C2 T2 EDCH0_1 8
8 DBIG1_0 D13 R13 DBIG0_0 8 8 DBIH1_0 D13 R13 DBIH0_0 8

D2 R2 D2 R2
阿 09 ne EN
8 DBIG1_1 DBIG0_1 8 8 DBIH1_1 DBIH0_1 8
8 CABIG1 J5 CABI_N_A CABI_N_B K5 CABIG0 8 8 CABIH1 J5 CABI_N_A CABI_N_B K5 CABIH0 8

IN IN IN IN
1
R2607 22.37K 1% 1
R2707 22.37K 1%
VREFC_G VREFC_H
1
R2608 25.49K 1% K1 1
R2708 25.49K 1% K1
VREFC VREFC
1
C2600 2
1uF 6.3V 1
C2700 2
1uF 6.3V
ZQ_G1 ZQ_G0 ZQ_H1 ZQ_H0

10% 1
R2606 2120R 1% J14 K14 1
R2613 2120R 1% 10% 1
R2706 2120R 1% J14 K14 1
R2713 2120R 1%
ZQ_A ZQ_B ZQ_A ZQ_B
鋒 05 pe TI
8 CKG J10 8 CKH J10
IN CK_t IN CK_t
8 CKGB K10 8 CKHB K10
IN CK_c IN CK_c
8 DRAM_RSTB_G J1 8 DRAM_RSTB_H J1
N5 N5
TCK TCK
F10 F10
TDI TDI
N10 N10
TDO TDO
F5 F5
01 i( AL
TMS TMS
+VDD_MEM +VDD_MEM
V14 VDD_12 VSS_52

U14 V14 VDD_12 VSS_52
U14
A14 VDD_11 VSS_51
R14 A14 VDD_11 VSS_51
R14
L13 N14 L13 N14
H13 M14 H13 M14
P10 VDD_8 G14 P10 VDD_8 G14
VSS_48 VSS_48
P5 VDD_7 VSS_47
F14 P5 VDD_7 VSS_47
F14
GDDR6 CHG +VDD_MEM Decoupling Caps
(0
E10 VDD_6 VSS_46
D14
E5 B14 E5 B14
裴
+VDD_MEM
L2 V13 L2 V13
H2 A13 H2 A13
V1 VDD_2 VSS_42
T12 V1 VDD_2 VSS_42
T12
A1 VDD_1 VSS_41
R12 A1 VDD_1 VSS_41
R12
1
1
N12 N12
VSS_40 VSS_40
M12 C2640 C2620 C2621 C2622 C2623 C2624 C2625 C2626 C2627 C2628 C2629 M12
VSS_39 VSS_39
+VDD_MEM 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF +VDD_MEM
G12 G12
00 RM 亮
VSS_37
F12 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
VSS_37
F12
2
2
T14 VDDQ_28 VSS_36
D12
P14 C12 P14 C12
1
1
L14 V11 L14 V11
H14 T10 C2641 C2630 C2631 C2632 C2633 C2634 C2635 C2636 C2637 C2638 C2639 H14 T10
E14 P11 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF E14 P11
C14 VDDQ_23 VSS_31
L11 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C14 VDDQ_23 VSS_31
L11
2
2
K13 H11 K13 H11
+VPP
J13 E11 J13 E11
N11 T5 N11 T5
68 A工樂
T11 VSS_27
A11 T11 VSS_27
A11
VDDQ_19 VDDQ_19
1
1
U10 VDDQ_18 VSS_26
V4 U10 VDDQ_18 VSS_26
V4
T4 C10 C2642 C2643 C2644 C2645 C2646 T4 C10
F11 P4 10uF 1uF 1uF 1uF 1uF F11 P4
B10 L4 10% 10% 10% 10% 10%
B10 L4
2
U5 VDDQ_14 VSS_22
H4 U5 VDDQ_14 VSS_22
H4
C11 VDDQ_13 VSS_21
E4
C4 C5 C4 C5
B5 A4 B5 A4
N4 T3 N4 T3
76
F4 VDDQ_9 VSS_17
R3 F4 VDDQ_9 VSS_17
R3
K2 N3 GDDR6 CHH +VDD_MEM Decoupling Caps K2 N3
)
J2 M3 J2 M3
+VDD_MEM
T1 G3 T1 G3
程
P1 F3 P1 F3
L1 VDDQ_4 VSS_12
D3 L1 VDDQ_4 VSS_12
D3
H1 VDDQ_3 VSS_11
C3 H1 VDDQ_3 VSS_11
C3
1
1
E1 V2 E1 V2
10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
0)
U1 U1
VSS_7
R1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
VSS_7
R1
2
2
+VPP +VPP
VSS_6
N1 VSS_6
N1
M1 M1
VSS_5 VSS_5
1
1
V10 G1 V10 G1
課
A5 VPP_1 VSS_1
B1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
A5 VPP_1 VSS_1
B1
2
+VPP
GDDR6 GDDR6
1
C2742 C2743 C2744 C2745 C2746

4V
10%
6.3V
10%
6.3V
10%
6.3V
10%
6.3V
10%
2
2
NAVI10 TMDP A/B
00 M
+3.3V_BUS
0
RD 17 SI U1G
symbol 7
R1500
2.2K
5%
R1501
2.2K
5%
R1502
2.2K
5%
R1503
2.2K
5%
USBPD_I2C_MASTER_SCL
USBPD_I2C_MASTER_SDA
1
R87 22.2K 5%
AW21
AW20
AY16
U1Z
symbol 26
USBPD_I2C_MASTER_SCL
USBPD_I2C_MASTER_SDA
UNNAMED_13_NAVI10T9C2_I172_USBPDINTERRUPT
USB_PD_INTERRUPT
(C 96 C
USBPD_I2C_SLAVE_SCL
USBC1_RXP2/TX2P_DPB0P BE19 AT21 USBPD_I2C_SLAVE_SCL
USBPD_I2C_SLAVE_SDA
AR21 USBPD_I2C_SLAVE_SDA
USBC1_RXN2/TX2M_DPB0N BF19
UNNAMED_13_NAVI10T9C2_I172_USBVAUXPRESENT
+3.3V_BUS
USBC1_TXP2/TX1P_DPB1P BF18 1
MR80 210K 5% AV16 USB_VAUX_PRESENT
USBC1_TXN2/TX1M_DPB1N BG18
BE17 R82
)2 7 ON
USBC1_TXP1/USB_0_TXP1/TX0P_DPB2P
10K
5%
USBC1_TXN1/USB_0_TXN1/TX0M_DPB2N BF17
UNNAMED_13_NAVI10T9C2_I172_USBOCP0 UNNAMED_13_NAVI10T9C2_I172_USBOCP1
+3.3V_BUS 1
R81 210K 5% AW17 USB_OCP0 USB_OCP1 AV17
USBC1_RXP1/USB_0_RXP1/TXCBP_DPB3P BF16
USBC1_RXN1/USB_0_RXN1/TXCBM_DPB3N BG16 AY20 USB20_TXRTUNE USB21_TXRTUNE AT20
DDCAUX5P BC14
F
DDCAUX5N BB14
0
BA21 USB20_DP0 USB21_DP0 AT22
Navi10 REV 0.91 AY21 USB20_DM0 USB21_DM0 AR22
石 19 jo ID
Navi10 REV 0.91
阿 09 ne EN
鋒 05 pe TI
U1F
+3.3V_DPA
J1801
+3.3V_BUS
symbol 6 USBC0_RXP2_TX2P_DPA0P C1801 DPA_0P F1801
USBC0_RXP2/TX2P_DPA0P BE23 2 1 0.1uF 6.3V 13 1 ML_Lane_0p DP_PWR 20 2 1
1
USBC0_RXN2_TX2M_DPA0N C1802 DPA_0N 1.5A
USBC0_RXN2/TX2M_DPA0N BF23 2 10% 1 0.1uF 6.3V 13 3 ML_Lane_0n C1811 C1812
22uF 100uF
USBC0_TXP2_TX1P_DPA1P C1803 DPA_1P 6.3V 6.3V
USBC0_TXP2/TX1P_DPA1P BF22 2 10% 1 0.1uF 6.3V 13 4 ML_Lane_1p
20%
2
USBC0_TXN2_TX1M_DPA1N C1804 DPA_1N
BG22 2 1 0.1uF 6.3V 13 6
01 i( AL
USBC0_TXN2/TX1M_DPA1N 10% ML_Lane_1n
USB1_ZVSS USBC0_TXP1_TX0P_DPA2P C1805 DPA_2P

R1735 1 2 200R 1% AY18 USB1_ZVSS USBC0_TXP1/USB_0_TXP0/TX0P_DPA2P BE21 2 10% 1 0.1uF 6.3V 13 7 ML_Lane_2p
USB0_ZVSS USBC0_TXN1_TX0M_DPA2N C1806 DPA_2N

R1736 1 2 200R 1% BA18 USB0_ZVSS USBC0_TXN1/USB_0_TXN0/TX0M_DPA2N BF21 2 10% 1 0.1uF 6.3V 13 9 ML_Lane_2n
USBC0_RXP1_TXCAP_DPA3P C1807 DPA_3P

USBC0_RXP1/USB_0_RXP0/TXCAP_DPA3P BF20 2 10% 1 0.1uF 6.3V 13 10 ML_Lane_3p
USBC0_RXN1_TXCAM_DPA3N C1808 DPA_3N

USBC0_RXN1/USB_0_RXN0/TXCAM_DPA3N BG20 2 10% 1 0.1uF 6.3V 13 12 ML_Lane_3n
UNNAMED_13_CAP_I136_B DPA_AUXP
BD16 DDCAUX6P R1809 1 2 100R 1% 2
C1809 1 0.1uF 6.3V 13 15
DDCAUX6P 10% AUX_CHp
(0
R1803 2 1 100K 5%
UNNAMED_13_CAP_I135_B DPA_AUXN
BC16 DDCAUX6N R1810 1 2 100R 1% 2
C1810 1 0.1uF 6.3V 13 17
DDCAUX6N AUX_CHn
裴
10%
R1804 2 1 100K 5% +3.3V_DPA

Navi10 REV 0.91 +12V_BUS_B +12V_BUS_B +3.3V_BUS
Q1806A Q1806B 10%
1
2N7002DW UNNAMED_13_MOSN_I129_D
2N7002DW
C1813 C1814 4 3 6 1 PWR_RTN 19
3
47pF 47pF G1
50V 50V Q1807B Q1807A DPA_HPD G1
Q1803B
UNNAMED_13_NPN_I147_B
2N7002DW 2N7002DW R1801 R1802 5 R1805 1 210K 5% 13 18 Hot_Det G2 G2

2
UNNAMED_13_MOSN_I131_D
1 6 3 4 DPA_AUXN 10K 10K G3

5% 5% MMDT3904-7 G3
5
00 RM 亮
3 GENERICG_HPD6 R1806 1 2
10K 5% G4 G4
OUT
4
GND_0 2
3
GND_1 5
DPA_DONGLE_DET
2
5
AUX3_BYPSS_EN
6
1 13 13 CONFIG 1 GND_2 8
Q1803A 2
11 SCREW1801
GND_3
Q1804 R1807 2 11M 5% 14 16
MMDT3904-7 CONFIG 2 GND_6 SC R EW
2
2N7002E
1
DP_RECEPTACLE_W/TAB
R1808 5.1M 5% DPA_CONFIG2
68 A工樂
DPA_3N
76 程 )
D1801
DPA_1N
D1802
0)
13 1 3 13 1 3
DPA_3P DPA_1P
13 2 8 13 2 8
DPA_2N DPA_0N
13 4 13 4
課
6 DPA_2P
6 DPA_0P
DPA_2P DPA_0P
13 5 7 DPA_2N
13 5 7 DPA_0N
9 DPA_3P
9 DPA_1P
DNI 10 DPA_3N
DNI 10 DPA_1N
ESD8004 ESD8004
DNI MD1804
1 2
ESD131-B1-W0201
DNI D1804
DPA_HPD
D1803 2 1
DPA_AUXN 13
13 1 3
ESD5V3U1U-02LRH
DPA_AUXP
13 2 8
UNNAMED_13_ESD8104M_I186_IO3
4
6 DPA_DONGLE_DET
DPA_DONGLE_DET
13 5 7
9 DPA_AUXP
DNI 10 DPA_AUXN
ESD8004
NAVI10 TMDP C/D
00 M
U1I
0
symbol 9
TX2P_DPD0P BE14
RD 17 SI
TX2M_DPD0N BF14
TX1P_DPD1P BF13
TX1M_DPD1N BG13
TX0P_DPD2P BE12
TX0M_DPD2N BF12
(C 96 C
TXCDP_DPD3P BF11
TXCDM_DPD3N BG11
DDCAUX3P BC10
DDCAUX3N BB10
Navi10 REV 0.91
)2 7 ON
0
石 19 jo ID F U1H
symbol 8
TX2P_DPC0P BD20 DPC0P 1

C1870
UNNAMED_14_CAP_I26_B
2
0.1uF
<PositionInPackage>
6.3V
<PositionInPackage> 1
UNNAMED_14_IND_I63_B
2 100nH 1
R1870 2499R 1%
<PositionInPackage> 1
R1880 23.3R 1% 14 CTX2P 1 TMDS Data 2+
J1850
+5V Pwr 18
+5V_VESA
1
BC20 DPC0N 1
C1871 2
0.1uF 6.3V L1880 1
R1881 23.3R 1% 14 CTX2N 3
TX2M_DPC0N 10%
<PositionInPackage> TMDS Data 2- <PositionInPackage>
<PositionInPackage> 1 5%
2 100nH 1
R1871 2499R 1% C1850
BC19 DPC1P 1
C1872 2
0.1uF 6.3V L1881 1
R1882 23.3R 1% 14 CTX1P 4 1uF
TX1P_DPC1P 10%
<PositionInPackage> TMDS Data 1+ 16V
<PositionInPackage> 1 5% 2 100nH 1
R1872 2499R 1%
10%
2
BB19 DPC1N 1
C1873 2
0.1uF 6.3V L1882 1
R1883 23.3R 1% 14 CTX1N 6
TX1M_DPC1N 10%
<PositionInPackage> TMDS Data 1-
1 2 1 2499R
阿 09 ne EN
<PositionInPackage> 100nH R1873 1%
5%
BD18 DPC2P 1
C1874 2
0.1uF 6.3V L1883 1
R1884 23.3R 1% 14 CTX0P 7
TX0P_DPC2P 10%
<PositionInPackage> TMDS Data 0+
R1874 2499R 1%
BC18 DPC2N 1
C1875 2
0.1uF 6.3V L1884 1
R1885 23.3R 1% 14 CTX0N 9
TX0M_DPC2N 10%
<PositionInPackage> TMDS Data 0-
R1875 2499R 1%
DPC_ZVSS DPC3P
CTXCP
R1730 1 2 200R 1% BC11 DPC_ZVSS TXCCP_DPC3P BC17 1
C1876 10% 2
0.1uF 6.3V L1885 <PositionInPackage> 1
R1886 23.3R 1% 14 10 TMDS Clock+
<PositionInPackage> 1 5%
2 100nH 1
R1876 2499R 1%
DPD_ZVSS DPC3N
CTXCN
R1731 1 2 200R 1% BD11 DPD_ZVSS TXCCM_DPC3N BB17 1
C1877 10% 2
0.1uF 6.3V L1886 <PositionInPackage> 1
R1887 23.3R 1% 14 12 TMDS Clock-
1 5% 2 100nH 1
R1877 2499R 1%
DPE_ZVSS DDCAUX4P +12V_BUS_B
R1732 1 2 200R 1% BB12 DPE_ZVSS DDCAUX4P BD13 10% L1887
鋒 05 pe TI
DPF_ZVSS 5% DPC_GND
R1734 1 2 200R 1% BC12 DPF_ZVSS DDCAUX4N BC13 DDCAUX4N
<PositionInPackage>
Navi10 REV 0.91 R1888
100K
5%
3
DVI_HDMI_EN DDC4CLK_HDMI
1 Q1850 14 15 DDC Clock
1
<PositionInPackage> 2N7002L DDC4DAT_HDMI
C1878 14 16 DDC Data D0 Shld 8
2
0.1uF 5
01 i( AL
16V D1 Shld
+3.3V_BUS +5V_VESA
10%
D2 Shld 2
2
Clk Shld 11
+3.3V_BUS
GND (+5V) 17
HPD_HDMI
14 19 Hot Plog Detect
<PositionInPackage>
<PositionInPackage> <PositionInPackage>
<PositionInPackage> CASE 20 SCREW1850
R1851 R1852 Q1852B R1853 R1854 14 NC CASE 21
2
10K 10K 2.2K 2.2K 22
5% 5% 2N7002DW 5% 5% CASE SC R EW
13 CEC CASE 23
1 6
HDMI_W/TAB
(0
4 3 DDC4DAT_HDMI
裴
+3.3V_BUS
Q1852A
+3.3V_BUS
2N7002DW
3
<PositionInPackage>
Q1851 1 1
R1855 210K 5%
MMBT3904 <PositionInPackage>
3 GENERICE_HPD4 1
R1856 210K 5%
OUT
2
00 RM 亮
OPTIONAL ESD PROTECTION DIODES
68 A工樂
D1850 D1851
CTXCN 1 3 CTX1N 1 3
14 14
CTXCP 2 8 CTX1P 2 8
14 14
CTX0N 4 CTX2N 4
14 14
6 CTX0P 6 CTX2P
CTX0P 5 7 CTX2P 5 7
14 14
9 CTXCP 9 CTX1P
10 10
76
CTXCN CTX1N
)
ESD8104MUTAG ESD8104MUTAG
程
DNI MD1853
1 2
0)
ESD131-B1-W0201
DNI D1853
HPD_HDMI
D1852 2 1
14
1 3
ESD5V3U1U-02LRH
課
2 8
DDC4DAT_HDMI
14 4
6 DDC4CLK_HDMI
DDC4CLK_HDMI
14 5 7
9
10
ESD8104MUTAG
00
(9) NAVI10 TMDP E/F
U1K
symbol 11
TX2P_DPF0P BD6
0
RD 17 SI M DPF_C0P
2
C1901 1 0.1uF 6.3V 15
DPF_0P
1
J1901
ML_Lane_0p DP_PWR 20
+3.3V_DPF
2
F1901
1
+3.3V_BUS
1
DPF_0N 1.5A
DPF_C0N
TX2M_DPF0N BE5 2
C1902 10% 1 0.1uF 6.3V 15 3 ML_Lane_0n C1911 C1912
22uF 100uF
DPF_C1P DPF_1P 6.3V 6.3V
TX1P_DPF1P BG5 2
C1903 10% 1 0.1uF 6.3V 15 4 ML_Lane_1p
20% 20%
2
DPF_C1N DPF_1N
TX1M_DPF1N BG3 2
C1904 10% 1 0.1uF 6.3V 15 6 ML_Lane_1n
(C 96 C
DPF_C2P DPF_2P
TX0P_DPF2P BE3 2
C1905 10% 1 0.1uF 6.3V 15 7 ML_Lane_2p
DPF_C2N DPF_2N
TX0M_DPF2N BF2 2
C1906 10% 1 0.1uF 6.3V 15 9 ML_Lane_2n
DPF_C3P DPF_3P
TXCFP_DPF3P BC2 2
C1907 10% 1 0.1uF 6.3V 15 10 ML_Lane_3p
DPF_C3N DPF_3N
TXCFM_DPF3N BE1 2
C1908 10% 1 0.1uF 6.3V 15 12 ML_Lane_3n
UNNAMED_15_CAP_I39_B DPF_AUXP
BC7 AUX1P R1909 1 2 100R 1% 2
C1909 1 0.1uF 6.3V 15 15
)2 7 ON
DDCAUX1P 10% AUX_CHp
R1903 2 1 100K 5%
UNNAMED_15_CAP_I38_B DPF_AUXN
DDCAUX1N BB7 AUX1N R1910 1 2 100R 1% 2
C1910 10% 1 0.1uF 6.3V 15 17 AUX_CHn
1
1
R1904 2 1 100K 5% +3.3V_DPF
C1913 C1914 Q1906A Q1906B 10%
47pF 47pF
50V 50V 2N7002DW UNNAMED_15_MOSN_I20_D
2N7002DW
4 3 6 1 PWR_RTN 19
2
3
Q1907B Q1907A G1 G1
DPF_HPD
Q1903B
2N7002DW 2N7002DW R1901 R1902 5 R1905 1 210K 5% 15 18 Hot_Det G2 G2

1 6 3 4 10K 10K G3
5% 5% MMDT3904-7 G3
2
F
3 HPD1 R1906 1 2
10K 5% G4 G4
0
OUT
4
GND_0 2
3
GND_1 5
5
AUX1_BYPSS_EN DPF_DONGLE_DET
6
1 15 13 CONFIG 1 GND_2 8
Q1903A 2
11 SCREW1901
GND_3
石 19 jo ID
Q1904 R1907 2 11M 5% 14 16
MMDT3904-7 CONFIG 2 GND_6 SC R EW
2
2N7002E
1
DP_RECEPTACLE_W/TAB
R1908 5.1M 5% DPF_CONFIG2
U1J +3.3V_DPE
J1911 +3.3V_BUS
阿 09 ne EN
symbol 10 DPE_0P F1911
DPE_C0P
TX2P_DPE0P BE10 2
C1921 1 0.1uF 6.3V 15 1 ML_Lane_0p DP_PWR 20 2 1
1
DPE_0N 1.5A
DPE_C0N
TX2M_DPE0N BF10 2
C1922 10% 1 0.1uF 6.3V 15 3 ML_Lane_0n C1931 C1932
22uF 100uF
DPE_1P 6.3V 6.3V
DPE_C1P
TX1P_DPE1P BF8 2
C1923 10% 1 0.1uF 6.3V 15 4 ML_Lane_1p
20% 20%
2
DPE_C1N DPE_1N
TX1M_DPE1N BG8 2
C1924 10% 1 0.1uF 6.3V 15 6 ML_Lane_1n
DPE_C2P DPE_2P
TX0P_DPE2P BE7 2
C1925 10% 1 0.1uF 6.3V 15 7 ML_Lane_2p
鋒 05 pe TI
DPE_C2N DPE_2N
TX0M_DPE2N BF7 2
C1926 10% 1 0.1uF 6.3V 15 9 ML_Lane_2n
DPE_C3P DPE_3P
TXCEP_DPE3P BF6 2
C1927 10% 1 0.1uF 6.3V 15 10 ML_Lane_3p
DPE_C3N DPE_3N
TXCEM_DPE3N BG6 2
C1928 10% 1 0.1uF 6.3V 15 12 ML_Lane_3n
UNNAMED_15_CAP_I25_B DPE_AUXP
DDCAUX2P BD8 AUX2P R1929 1 2 100R 1% 2
C1929 10% 1 0.1uF 6.3V 15 15 AUX_CHp
R1923 2 1 100K 5%
UNNAMED_15_CAP_I24_B DPE_AUXN
BC8 R1930 1 2 100R 1% 2
C1930 1 0.1uF 6.3V 15 17
01 i( AL
DDCAUX2N AUX2N 10% AUX_CHn
1
R1924 2 1 100K 5% +3.3V_DPE

C1933 C1934 Q1926A Q1926B 10%
47pF 47pF
50V 50V 2N7002DW UNNAMED_15_MOSN_I11_D
2N7002DW
4 3 6 1 PWR_RTN 19
2
3
Q1927B Q1927A G1 G1
UNNAMED_15_NPN_I66_B DPE_HPD
Q1923B 5 R1925 1 210K 5% 15 18 G2
2N7002DW UNNAMED_15_MOSN_I14_D
2N7002DW R1921 R1922 Hot_Det G2
1 6 3 4 10K 10K G3
5% 5% MMDT3904-7 G3
5
3 GENERICC_HPD2 R1926 1 2
10K 5% G4 G4
OUT
4
GND_0 2
3
GND_1 5
AUX2_BYPSS_EN DPE_DONGLE_DET
2
(0
1 15 13 CONFIG 1 GND_2 8
6
GND_3 11 SCREW1911
裴
Q1923A 2
UNNAMED_15_MOSN_I59_D Q1924 R1927 2 11M 5% 14 16
CONFIG 2 GND_6 SC R EW
2
MMDT3904-7 2N7002E
1
DP_RECEPTACLE_W/TAB
R1928 5.1M 5% DPE_CONFIG2
6140073700G
00 RM 亮
68 A工樂
D1901 D1902 D1911 D1912
DPF_3N DPF_1N DPE_3N DPE_1N
15 1 3 15 1 3 15 1 3 15 1 3
DPF_3P DPF_1P DPE_3P DPE_1P
15 2 8 15 2 8 15 2 8 15 2 8
DPF_2N DPF_0N DPE_2N DPE_0N
15 4 15 4 15 4 15 4
6 DPF_2P
6 DPF_0P
6 DPE_2P
6 DPE_0P
76
15 5 7 DPF_2N
15 5 7 DPF_0N
15 5 7 DPE_2N
15 5 7 DPE_0N
9 9 9 9
)
DNI 10 DPF_3N
DNI 10 DPF_1N
DNI 10 DPE_3N
DNI 10 DPE_1N
程
ESD8004 ESD8004 ESD8004 ESD8004
0)
DNI MD1904 DNI MD1914
1 2 1 2
課
ESD131-B1-W0201 ESD131-B1-W0201
DNI D1904 DNI D1914
DPF_HPD DPE_HPD
D1903 2 1 D1913 2 1
DPF_AUXN 15 DPE_AUXN 15
15 1 3 15 1 3
ESD5V3U1U-02LRH ESD5V3U1U-02LRH
DPF_AUXP DPE_AUXP
15 2 8 15 2 8
UNNAMED_15_ESD8104M_I1_IO3 UNNAMED_15_ESD8104M_I48_IO3
4 4
6 DPF_DONGLE_DET
6 DPE_DONGLE_DET
DPF_DONGLE_DET DPE_DONGLE_DET
15 5 7 15 5 7
9 DPF_AUXP
9 DPE_AUXP
DNI 10 DPF_AUXN
DNI 10 DPE_AUXN
ESD8004 ESD8004
+3.3V_BUS
20 IN
SOC_RCS_P 1 R500
4.02K
2 PRELIMINARY AND SUBJECT TO CHANGE
1%
1
R501 C500
4.87K 56pF
1% 50V
2
20 SOC_RCS_N 1 R502 2
IN
4.02K
00
1%
20 SOC_LOC_P 1 R503 2
IN
100R 1%
1
28 FB_VDDCR_SOC 1 R504 2
IN
NS500 DNI 0R C501
FB_VSS_SOC 0.0033uF
1 2 1 2
M
28,16 FB_VSS_A R505
IN 50V
0R
2
0
20 SOC_LOC_N 1 R506 2
IN
1
RD 17 SI
100R 1%
17 GFX_RCS_P 1 R507 2 C502 C503
IN 4.7uF 0.1uF
2.32K
1% 6.3V 16V
2
R508 C504 R509 R510 R511 R512
2.94K 100pF 10K 1K 10K 10K
U500 DNI
38
1% 50V 1% 1% 1% 1%
2
GFX_RCS_N 1 R513 2
VCC
17 IN RCS_P_L2 IR35217M
2.32K 40 RCSP_L2 PWM1 28 GFX_PWM1 18
1% RCS_M_L2 OUT
(C 96 C
39 RCSM_L2 PWM2 29
17 GFX_LOC_P 1 R514 2 PWM3 30 GFX_PWM2 17
IN VSEN_L2 OUT
100R 1% 37 VSEN_L2 PWM4 31
VRTN_L2
36 VRTN_L2 PWM5 32 GFX_PWM3 19
OUT
1
28 FB_VDDCR_GFX 1 R515 2 PWM6 33
IN RCS_P_L1
0R C505 2 RCSP GFX_PWM4 18
0.0033uF RCS_M_L1 OUT
28,16 FB_VSS_A 1 R516 2 3 RCSM PWM1_L2/PWM8 35
IN 50V
0R PWM2_L2/PWM7 34
)2 7 ON
2
VSEN_L1
5 VSEN
VRTN_L1
17 GFX_LOC_N 1 R517 2 6 VRTN
IN
100R 1% VRDY1 11
18 GFX_I1_P 54 ISEN1 SOC_PWM1 20
IN OUT
55 IRTN1 VRDY2 4
18 GFX_I1_N 52 ISEN2
IN
53 IRTN2 NC#13 13
17 GFX_I2_P 50 ISEN3 NC#15 15
IN
F
51 IRTN3 NC#41 41
0
GFX_I2_N 48 ISEN4
VDDCR_GFX_PWR_GOOD REMOVE 跳頁
17 IN
49 IRTN4
19 GFX_I3_P 46 ISEN5 VRHOT_ICRIT# 20

IN
石 19 jo ID
47 IRTN5 VDDGFX_SOC_REG_HOT 3
OUT
19 GFX_I3_N 1 ISEN6
IN UNNAMED_19_IR35217M_I163_SMALERT
56 IRTN6 SM_ALERT# 23
18 GFX_I4_P
IN GFX_IMON
42 ISEN1_L2/ISEN8 IMON 7
18 GFX_I4_N 43 IRTN1_L2/IRTN8
IN
1
44 ISEN2_L2/ISEN7 DNI
2
45 IRTN2_L2/IRTN7 C510
R4292 R4293 1000pF
阿 09 ne EN
50V
9 TSEN1 SVT/SV_ALERT# 17
2
1
0R 0R
27 TSEN2/VAUXSEN
UNNAMED_19_IR35217M_I163_IOUTALERT
IOUT_ALERT#/PIN_ALERT# 26
14 VINSEN SVT_GFX_SOC 3
OUT
DNI
20 SOC_I1_P 24 SM_DIO CFILT 10
IN C513
1
1 2 25
鋒 05 pe TI
SM_CLK
20 SOC_I1_N 22pF 50V TH 57 C514 C515 1 R521 2 GPIO_4_PCC 3

IN 1000pF 1uF
OUT
16 VDDIO/SV_ADDR TH 58 0R
50V 6.3V
TH 59
2
TH 60
18 SVC/SV_CLK TH 61
19 SVD/SV_DIO TH 62
17 GFX_TSEN_P TH 63
IN
1
12 PWROK/EN_L2/CATFLT TH 64
01 i( AL
C517 TH 65
100pF TH 66
R523 50V
13.3K 8 67
I_IN TH
1%
2
TH 68
1 2 70
17 GFX_TSEN_N R524 TH
IN
1
0R 21 EN TH 69
TH 71 C531 R530 R526
SOC_TSEN_P 22 ADDR_PROT TH 72 1uF 10K 10K
20 IN 6.3V 5% 5%
1
2
(0
C518
1
100pF
裴
R525 50V Force PWM
13.3K CH-5u3A78mS-HF
1% C519
2
C525
0.01uF
R527 1 2
SOC_TSEN_N 1 R528 2
50V
845R L500
20 IN 1% +5V_GATE_DRV
2
0.1uF 25V
0R 10%
1 2
1
+12V_EXT_A
00 RM 亮
1 R533 2 C698 U501
23
22
21
20
19
18
1
1
0.01uF
26.1K 1% 10V DNI
10% C691
BOOT
PGND
VIN
VCC
LX
SS
+12V_EXT_B C523 C692 C693 C694 C695 C526
2
R535 0.01uF GFX_SOC_CONFIG UNNAMED_19_GS9238_I205_PGOOD
0.1uF 10uF 10uF 10uF 10uF 100uF
1 R534 2 VEN_H 2.5V 1
1K 50V POK 10V 16V 16V 16V 16V 6.3V
26.1K 1% 1% 2 R536 1 UNNAMED_19_CAP_I170_A 2 17
EN LX
2
2
+12V_BUS_B 5.1K 3
UNNAMED_19_GS9238_I205_PFM
16
DNI R537 R538 BIOS 5% PFM LX
1
1 R539 2 UNNAMED_19_CAP_I73_A 10K 10K 4 AGND 15
1% 1% PGND DNI DNI
26.1K 1% C532
5 FB 14 R626 C696
PGND
68 A工樂
0.01uF UNNAMED_19_GS9238_I205_TON
6 TON 13 10K 470pF
16V DNI PGND 5% 50V
REGULATOR_SDA PR1 0 35217_SDA 12
3,21,33IN R540 PGND
2
RES1005 R11-0000012-W08 10K
NS501
5%
AIN
VIN
VIN
35217_SCL
1
LX
LX
PR2 0
3,21,33IN REGULATOR_SCL DNI DNI
C520
GS9230-ATQ
1
RES1005 R11-0000012-W08
DNI DNI R531 C697 1 2 DNI
10
11
7
8
9
VDDIO_SVI0 +12V_BUS_B 7.5K 470pF 150pF 50V
C527 C528 5% 50V
1
1
+1.8V 47pF 47pF

50V 50V 10%
2
1 R542 2 C530 1 R529 2
2
0.01uF 10.5K
76
0R R624
50V HEADER 1X3 442K 1 R532 2 1
C521
2
1%
1%
2
VOUT = 5V
)
2.2R 1uF 16V
35217_SCL 3 5% R541
1.87K
35217_SDA 2 1%
1
程
3 SVC_GFX_SOC
IN 1
600KHz C524 C529 C522
SVD_GFX_SOC 10uF 1uF 0.1uF
3 IN PJP1 16V 16V
10%
16V
10%
SIP3
2
I_IN
COMMON
0)
1
DNI DNI DNI DNI VVVV30701S

C534 C535 R543 C533 N31-1030161-H06
47pF 47pF 10K 1000pF
50V 50V 1% 50V SN74AHC1G09DBV
課
2
DNI DNI U502B

1
R544 C536
VDDGFX_VDDC_EN 100K 1000pF
30 IN 1% 50V C537
0.01uF
50V
2
R545
2
10K
1%
3
U502A
2,21,30,32 PERST#_BUF 1
IN VDDGFX_SOC_PWROK
4
2
SN74AHC1G09DBV
1
PRELIMINARY AND SUBJECT TO CHANGE R51-0103T22-M09
R573
10K
1%
GFX_RCS_P
OUT 16
2
R0402 GFX_RCS_N 16
OUT
DNI
17,18,19,20 GFX_THWN 1 R574 2
IN
8.66K 1% GFX_TSEN_P 16
OUT
GFX_TSEN_N 16
OUT
1
+12V_EXT_A
00
R575 GFX_LOC_P 16
47K
OUT
1% B-Constant 4050
1
GFX_LOC_N
1
OUT 16
2
+
C563 C564 C565 C566 C567 C568

C562 10uF 10uF 10uF 10uF 1uF 0.1uF
NA 16V 16V 16V 25V 16V
CD270u16SO-HF-8
M
2
2
C_P2_5_D6_3_H9 C0805_67
C71-27117Z1-AO5 C0805_67
2
+VDDCR_GFX
NS509
2
+3.3V_BUS
DNI
+5V_GATE_DRV CH-0.2u40A0.62m-HF
NS510
DNI
RD 17 SI
L503
1
1 R564 2
1
2.2R
GFX_PH2A
1 2
R4226
2A_VCIN
0R
1
1%
+
R565
U505
29
10
11
10K 1 R566 2
8
9
R11-0000012-W08 U2702 C569 C570 C571 C572 C573 C574 C575 C4270 C4271 C4272
2A_BOOT 1R CD820u2.5 CD820u2.5 CD820u2.5 CD820u2.5 CD820u2.5 CD820u2.5 CD820u2.5 CD820u2.5 CD820u2.5 CD820u2.5
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
2
5%
GFX_PWM2A
2A_ZCD_EN
3 8 BOOT 5 C577 2A_BP C_P2_5_D6_3_H9_5
C_P2_5_D6_3_H9_5
C_P2_5_D6_3_H9_5
C_P2_5_D6_3_H9_5
C_P2_5_D6_3_H9_5C_P2_5_D6_3_H9_5 C_P2_5_D6_3_H9_5
C_P2_5_D6_3_H9_5 C_P2_5_D6_3_H9_5
C_P2_5_D6_3_H9_5
(C 96 C
VCC PWM1 1 2 C71-82103F1-AO5
C71-82103F1-AO5
C71-82103F1-AO5
C71-82103F1-AO5
C71-82103F1-AO5 C71-82103F1-AO5
C71-82103F1-AO5
C71-82103F1-AO5
C71-82103F1-AO5
C71-82103F1-AO5
2
C4216
0.22uF 25V
C4215 2 1 2 2 7 2A_PHASE
1
ZCD_EN* PHASE
0.22uF V1P8
16VC11-2242633-W08 7 GFX_PWM2B
PWM2 C578 C579 C580 C581 C582 C583 C584 C585 C586 C587 C588 C589 C590 C591
0.47uF GFX_PWM2 1 DNI
16 IN PWM_IN
1
R568 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
16V R4227 16 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
10K SW1
4 6 17
2
SW2
+3.3V_BUS FUNCTION
R11-0000012-W08 PWM3
SW3 18 R569
1% 19 2.2R
)2 7 ON
1
SW4
C11-4742023-W08 0R DNI DNI DNI DNI DNI DNI DNI DNI DNI DNI DNI DNI DNI DNI
9 5 SW5 20 DNI C592 C593 C594 C595 C596 C597 C598 C599 C600 C601 C602 C603 C604 C605
GND PWM4
SW6 21
GFX_PWM2A
2A_SWRC
DNI R570 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
1 22 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
1
PWM SW7 0R
R3599MTRPBF_DFN8-RH 23
2
SW8 C606
24
I32-3599M0C-I08 SW9 1000pF
GND 25 50V
1
SW10
26
2
SW11 DNI C608 C609 C610 C611 C612 C613 C614 C615 C616 C617 C618 C619 C620 C621
R571 C607
F
10K 4.7uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
0
6.3V SiC620ArCD GH 6 2A_GH 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
2
1
27 DNI
GL1
C622 R572
1
石 19 jo ID
4.7uF 10K
GL2 33 6.3V
SP49 NS2005 C400 C401 C402 C403 C404 C405 C406 C407 C408 C409 C410 C411 C412 C413
2
XXXV30701S 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
30 2A_GFX_THWN
CISEN_2_R1
2
THWN
PLACE BETWEEN OUTPUT BULK CAP AND ASIC
16 GFX_DIS_N 31 DSBL_N
OUT 要
放靠近 P WM
ER1184
1
3.32K/4
阿 09 ne EN
DNI
NC500 R11-3321T12-W08
0.01uF
EC1513
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
25V
GFX_I2_N 16
OUT
2
0.22u/16V/04
32
12
13
14
15
28
4
C11-2242512-M09 GFX_I2_P 16
OUT
鋒 05 pe TI
ER1185
3.32K/4
OT P
R11-3321T12-W08 要
放靠近 P WM
CISEN_2_R2
1DNI R627 2
1
0R
5% SP50 NS2004
colay 302045 GFX_THWN GFX_THWN XXXV30701S

+12V_EXT_A 1DNI R4281 2 17,18,19,20 17,18,19,20 1DNI R4282 2
OUT OUT
01 i( AL
0R 0R
2
5% 5%
1
1
1
+
C624 C625 C626 C627 C628 C629

10uF 10uF 10uF 10uF 1uF 0.1uF colay 302045
C623 16V 16V 16V 16V 25V 16V
CD270u16SO-HF-8
2
C_P2_5_D6_3_H9 C0805_67 C0805_67

C71-27117Z1-AO5 +VDDCR_GFX
(0
1 2
L504
裴
R576
2.2R
GFX_PH2B
1 2
2B_VCIN
U506
29
10
11
3
8
9
R577
10K 1 2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
R578
2B_BOOT
BOOT 5 1R
00 RM 亮
5%
2B_ZCDEN
C631 2B_BP
2 ZCD_EN* PHASE 7 2B_PHASE 1 2
0.22uF 25V
DNI SW1 16
R580 SW2 17
10K 18
SW3
SW4 19
68 A工樂
20 R581
SW5 2.2R
SW6 21
GFX_PWM2B 1 22
DNI
PWM SW7
23
2B_SWRC
SW8 DNI R582
1
24 0R
SW9
25 C632
SW10
DNI SW11 26 1000pF
50V
1
6 2B_GH
2
DNI
76
R583 C633 SiC620ArCD GH
10K 4.7uF
6.3V
)
GL1 27
2
DNI
33
程
GL2 C634 R584
4.7uF 10K
6.3V
2B_GFX_THWN
2
THWN 30
0)
16 GFX_DIS_N 20 19 18 17 31 DSBL_N
OUT
課
1
DNI
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
NC501
0.01uF
25V
32
12
13
14
15
28
2
OT P
GFX_THWN 1DNI R4285 2

17,18,19,20 OUT
0R
5%
colay 302045
+12V_EXT_A
1
1
+
C539 C540 C541 C542 C543 C544
C538 10uF 10uF 10uF 10uF 1uF 0.1uF
16V 16V 16V 16V 25V 16V
CD270u16SO-HF-8
2
2
C_P2_5_D6_3_H9
C71-27117Z1-AO5 C0805_67 C0805_67
+VDDCR_GFX
CH-0.2u40A0.62m-HF
00
+5V_GATE_DRV
1 R546 2
L501
2.2R
GFX_PH1A
1 2
1AVCIN
U503
29
10
11
3
8
9
M
R547
10K 1 2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
R548
1A_BOOT
BOOT 5 1R
0
5%
1A_ZCD_EN
C546 1A_BP
2 7 1A_PHASE
1 2
RD 17 SI
ZCD_EN* PHASE
0.22uF 25V
DNI SW1 16
+3.3V_BUS
R550 SW2 17
10K 18
SW3
SW4 19
20 R551
SW5 2.2R
SW6 21
R4223 GFX_PWM1A DNI
(C 96 C
0R 1 PWM SW7 22
1% 23
1ASWRC
SW8 DNI R552
1
24 0R
SW9
R11-0000012-W08 U2701 25 C547
SW10
GFX_PWM1A DNI SW11 26 1000pF
3 8 50V
1
VCC PWM1
2
C4214
6 1A_GH
2
DNI
C4213 2 1 2 R553 C548 SiC620ArCD GH
10K 4.7uF
0.22uF 16V
C11-2242633-W08
V1P8
7 GFX_PWM1B 6.3V
)2 7 ON
0.47uF 1
PWM2 GL1 27 colay 302045
2
GFX_PWM1
1
16 IN PWM_IN
1
16V R4224 DNI

GL2 33 C549 R554
C11-4742023-W08 4 6
1
+3.3V_BUS FUNCTION PWM3 4.7uF 10K
R11-0000012-W08 6.3V
SP47 NS28
1% 1A_GFX_THWN 2 GFX_THWN
2
0R THWN 30 1DNI R4275 17,18,19,20
XXXV30701S
9 5 OUT
GND PWM4 0R
CISEN_1_R1
2
5%
16 GFX_DIS_N 31 DSBL_N
OUT
0 F
R3599MTRPBF_DFN8-RH
要
放靠近 P WM
I32-3599M0C-I08 ER1180
GND
1
DNI 3.32K/4
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
R11-3321T12-W08
石 19 jo ID
NC502
0.01uF
25V EC1512
GFX_I1_N 16
OUT
4
32
12
13
14
15
28
0.22u/16V/04
C11-2242512-M09 GFX_I1_P 16
OUT
ER1183
阿 09 ne EN
3.32K/4
R11-3321T12-W08
CISEN_1_R2
1
SP48 NS39
XXXV30701S
2
鋒 05 pe TI
+12V_EXT_A
1
1
1
+
C551 C552 C553 C554 C555 C556

C550 10uF 10uF 10uF 10uF 1uF 0.1uF
01 i( AL
16V 16V 16V 16V 25V 16V
CD270u16SO-HF-8
2
C_P2_5_D6_3_H9 C0805_67 C0805_67

1 R555 2
L502
2.2R
GFX_PH1B
1 2
1BVCIN
U504
29
10
11
(0
3
8
9
R556
10K 1 2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
裴
R557
1B_BOOT
BOOT 5 1R
5%
UNNAMED_21_RES_I15_B
1B_BP
1B_ZCD_EN C558
0.22uF 25V
DNI SW1 16
00 RM 亮
R559 SW2 17
10K 18
SW3
SW4 19
20 R560
SW5 2.2R
SW6 21
GFX_PWM1B 1 22
DNI
PWM SW7
23
1BSWRC
SW8 DNI R561
1
24 0R
SW9
68 A工樂
25 C559
SW10
DNI SW11 26 1000pF
50V
1
2
6 1B_GH DNI
10K 4.7uF
6.3V
GL1 27
2
DNI colay 302045

GL2 33 C561 R563
4.7uF 10K
76
6.3V
1B_GFX_THWN GFX_THWN
2
)
THWN 30 1DNI R4278 2 17,18,19,20
OUT
0R
5%
31
程
16 GFX_DIS_N DSBL_N
OUT
1
DNI
0)
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
NC503
0.01uF
25V
32
12
13
14
15
28
2
課
+12V_EXT_B
1
1
+
C636 C637 C638 C639 C640 C641
C635 10uF 10uF 10uF 10uF 1uF 0.1uF
16V 16V 16V 16V 25V 16V
CD270u16SO-HF-8
2
2
00
C_P2_5_D6_3_H9 C0805_67 C0805_67
1 R585 2
L505
2.2R
GFX_PH3A
1 2
3A_VCIN
U507
29
10
11
3
8
9
R586
0
10K 1 2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
R587
3A_BOOT
5 1R
RD 17 SI
BOOT 5%
3A_ZCD_EN
C643 3A_BP
2 ZCD_EN* PHASE 7 3A_PHASE 1 2
0.22uF 25V
DNI SW1 16
+3.3V_BUS
R589 SW2 17
10K 18
SW3
SW4 19
R590
(C 96 C
SW5 20
2.2R
SW6 21
R4228 GFX_PWM3A 1 22
DNI
0R PWM SW7
1% 23
3A_SWRC
SW8 DNI R591
1
24 0R
R11-0000012-W08 SW9
U2703 25 C644
SW10
GFX_PWM3A DNI SW11 26 1000pF
3 8 50V
1
VCC PWM1
2
C4218
)2 7 ON
2
6 3A_GH DNI
C4217 2 1 2 R592 C645 SiC620ArCD GH
10K 4.7uF
0.22uF V1P8
16VC11-2242633-W08 7 GFX_PWM3B 6.3V
0.47uF PWM2 GL1 27
1
2
GFX_PWM3
1
16 IN PWM_IN
1
16V R4229 DNI

GL2 33 C646 R593
4 6 4.7uF 10K
+3.3V_BUS FUNCTION
R11-0000012-W08 PWM3 6.3V
1% 3A_GFX_THWN
2
0R THWN 30
C11-4742023-W08 9 5
F
GND PWM4
0
16 GFX_DIS_N 20 19 18 17 31 DSBL_N
OUT
R3599MTRPBF_DFN8-RH
I32-3599M0C-I08
1
石 19 jo ID
GND SP51 NS2007
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
1
DNI
XXXV30701S
NC504
CISEN_3_R1
2
0.01uF
25V
4
32
12
13
14
15
28
2
要放靠近 PW
M
ER1186
3.32K/4
阿 09 ne EN
R11-3321T12-W08
EC1514
colay 302045 GFX_I3_N
OUT 16
0.22u/16V/04
C11-2242512-M09 GFX_I3_P 16
GFX_THWN OUT
17,18,19,20 1DNI R4288 2
OUT
0R
鋒 05 pe TI
5%
ER1187
+12V_EXT_B
3.32K/4
R11-3321T12-W08
CISEN_3_R2
1
1
1
SP52 NS2006
+
C648 C649 C650 C651 C652 C653

C647 10uF 10uF 10uF 10uF 1uF 0.1uF XXXV30701S
16V 16V 16V 16V 25V 16V
CD270u16SO-HF-8
01 i( AL
2
2
C_P2_5_D6_3_H9 C0805_67 C0805_67
1 R594 2
L506
2.2R
GFX_PH3B
1 2
3B_VCIN
U508 29
10
11
3
8
9
R595
(0
10K 1 2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
3B_BOOT
R596
5 1R
裴
BOOT 5%
3B_ZCD_EN
C655 3B_BP
0.22uF 25V
DNI SW1 16
R598 SW2 17
00 RM 亮
10K 18
SW3
SW4 19
20 R599
SW5 2.2R
SW6 21
GFX_PWM3B 1 22
DNI
PWM SW7
23
3B_SWRC
SW8 DNI R600
1
24 0R
SW9
25 C656
SW10
68 A工樂
DNI SW11 26 1000pF
50V
1
2
6 3B_GH DNI
10K 4.7uF
6.3V
GL1 27
2
1
DNI
GL2 33 C658 R602
4.7uF 10K
6.3V
76
3B_GFX_THWN
2
THWN 30
)
16 GFX_DIS_N 20 19 18 17 31 DSBL_N
OUT
程
1
DNI
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
NC505
0)
0.01uF
25V
32
12
13
14
15
28
2
課 17,18,19,20 OUT
GFX_THWN
colay 302045
1DNI R4289
0R
5%
2
00 M
0
RD 17 SI
(C 96 C
+12V_EXT_B
SOC_LOC_P 16
OUT
1
1
1
R612 SOC_LOC_N 16
OUT
1
10K
)2 7 ON
+
C672 C673 C674 C675 C676 C677 1%

C671 10uF 10uF 10uF 10uF 1uF 0.1uF SOC_RCS_P
16V 16V 16V 16V 25V 16V R51-0103T22-M09 OUT 16
2
CD270u16SO-HF-8 CH-0.2u40A0.62m-HF R0402
SOC_RCS_N
OUT 16
2
2
C_P2_5_D6_3_H9 C0805_67 C0805_67 L516
C71-27117Z1-AO5 +VDDCR_SOC
2
+5V_GATE_DRV
NS526
NS527
1 2
DNI
DNI
1 R613 2
1
2.2R
F
SOC_PH
1
+
U510 DNI DNI DNI DNI
29
10
11
3
8
9
C678 C679 C680 C681 C682 C683
R614 SP55 SP56 C684
10K CD820u2.5
UNNAMED_23_RES_I34_A
1 2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
R615 22uF 22uF 22uF 22uF 22uF 22uF
XXXV30701S XXXV30701S
石 19 jo ID
2
4V 4V 4V 4V 4V 4V
BOOT 5 1R
C_P2_5_D6_3_H9_5
2
5% C685
1 2 1 2
R616 C71-82103F1-AO5
C686
2 ZCD_EN* PHASE 7 1 2 1.15K 0.22uF 16V
1%
0.22uF 25V
DNI VSWH1 16
NS528
NS529
1
1
R617 VSWH2 17
10K 18
VSWH3 DNI DNI
阿 09 ne EN
VSWH4 19
2
20 R618
VSWH5 2.2R
VSWH6 21
DNI
16 SOC_PWM1 1 PWM VSWH7 22 SOC_I1_N 16
IN OUT
23
VSWH8 DNI R619
1
24 0R
VSWH9
25 C687 SOC_I1_P
VSWH10 OUT 16
VSWH11 26 1000pF
50V
鋒 05 pe TI
2
6 UNNAMED_23_RES_I32_B DNI
R620 C688 NC1
10K 4.7uF
6.3V
GL1 27
2
1
SIC632ACD-T1-GE3 DNI
GL2 33 C689 R621
4.7uF 10K
6.3V
DNI
2
SOC_THWN
30
01 i( AL
THWN 1 R622 2
DNI 8.66K 1%
31 DSBL_N 1 R628 2 SOC_TSEN_P 16
OUT
0R
5% DNI
UNNAMED_23_RES_I7_B
1 R625 2 SOC_TSEN_N 16
OUT
1
0R
5%
1
DNI R623
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
47K
NC507 1%
0.01uF
25V
2
(0
32
12
13
14
15
28
2
裴
00 RM 亮
68 A工樂
76 程 )
0) 課
+3.3V_BUS
3,21 MVDD_VDDCI_OCP# 1 R773 2

OUT
10K
5%
MVDD_PGOOD 2 R701 1
00
10K
5%
REMOVE 跳頁
VDDCI_PGOOD 2 R700 1
10K
5%
0
RD 17 SI M +3.3V_BUS
5
U700B
(C 96 C
U700A
1
2,16,30,32 PERST#_BUF 1
IN
4 C700
MVDD_PGOOD MVDD_VDDCI_PWRGD 0.1uF +12V_EXT_A
21 1 R702 2 2 +5V_GATE_DRV
6.3V
NC7SZ08P5X
0R
2
NC7SZ08P5X
VDDCI_PGOOD UNNAMED_24_RES_I77_B
21 1 R703 2 1 1 R704 2
0R DNI 0R DNI
)2 7 ON
C808 R712 R705
0.1uF 3.3R 1K
6.3V +1.8V 1%
2
R707 VDDIO_SVI1
0R 1 R708 2 MVDD_VDDCI_DRON
5% OUT 22,23 MVDD_CSSUM
21 VCC1
2.2R 21 1 R706 2 MVDD_ISENP1 22,21
IN
1
47K
MVDD_PWM1 22
OUT 0.1%
1
C701
MVDD_CSCOMP
AGND1
1uF 1 R714 2 1 R715 2 MVDD_ISENN1 1 R709 2
1 R710 2 1 R711 2 MVDD_ISENP2
C703 C704 22,21 21 22,21
IN IN
0
6.3V
1
4.7uF 0.01uF 0R 47K 100K 47K
10V 25V 10K 1%
2
5% 0.1% 1% 0.1%
C705 R713
2
C702
1
0.01uF 1 2 1 2
DNI 50V
石 19 jo ID
MVDD_VDDCI_PWROK 820pF 50V
31 OUT C707 R717
11
13
2
U701 0.1uF 100K 1 R718 2 MVDD_ISENP1 100K
25V 1% IN 22,21 MVDD_ILM 1% C706
1 2.49K 1 2 1 2
VCC
VRMP
31 SVD_MVDD_VDDCI_VR PWROK 21 R716
BI
2
1%
2 32 AGND1 23.7K
VR_SVT1 SVD DRON 1%
SVT_MVDD_VDDCI_VR 1 R721 2 3 31 1000pF 50V
31 OUT SVT PWM1/SR
0R 4 SVC CSN1 34UNNAMED_24_CAP_I141_A
31 SVC_MVDD_VDDCI_VR 5 VDDIO CSP1 33 R719 R720 DNI
IN
AGND1
1 R724 2 1K 3.4K
1% 1% DNI
C708
24.9K 1 21 2 1 2 MVDD_ISENN1
阿 09 ne EN
R722 R723 22,21
1% IN
1
10
30 VDD_MEM_VDDCI_EN EN 10R 1% 10R 1%
IN UNNAMED_24_NCP81022_I190_PWM2IMAXNB
1000pF 50V
PWM2/IMAXNB 29 C709
MVDD_PGOOD UNNAMED_24_NCP81022_I190_CSN2
0.0022uF
9 38 1 R737 2 VCC1 1 R725 2 MVDD_ISENN2
21 VDD_PWRGD CSN2 21 22,21
MVDD_DROOP 50V IN
1
AGND1
CSP2 37 2K 21 1 R727 2 10R 1%
2
MVDD_FB C713 UNNAMED_24_CAP_I75_B 1%
R729 C712 21 1 R730 2 UNNAMED_24_CAP_I40_A 1 2 1 R731 2 0R
100K 100pF 50
UNNAMED_24_NCP81022_I190_DIFF
MVDD_PWM2
1% 50V 0R DNI 10R 1% DIFF OUT 22
680pF 50V MVDD_CSREF
AGND1
DNI PWM3/IMAX 30 1 R736 2 21
2
C715 C716
1
1
UNNAMED_24_CAP_I62_A UNNAMED_24_CAP_I69_A
1 R733 2 1 R734 21 2 1 R735 21 2 47 36UNNAMED_24_CAP_I109_A 37.4K
鋒 05 pe TI
COMP CSN3
1%
C717 24.9K 1% 47.5R 1% 6.81K CSP3 35UNNAMED_24_CAP_I109_B C714
0.0056uF 330pF 50V 1% 0.0022uF 50V 1000pF
1 R726 2 MVDD_ISENN2 22,21
16V IN 50V
1
48 FB 0R DNI
2
2
C718
1
UNNAMED_24_CAP_I68_B UNNAMED_24_NCP81022_I190_PWM4ADD
1 R738 2 1 2 2% 28 1 R751 2 VCC1 21
PWM4/ADD DNI C710
47pF 50V 49
UNNAMED_24_NCP81022_I190_TRBST
39
UNNAMED_24_NCP81022_I190_CSN4
0.01uF 2K
1K 1% DNI MVDD_FB TRBST CSN4 C711 R728 50V 1%
FB_MVDD_1 1 R825 2
AGND1 1 R845 2 21 40 0.1uF 100K AGND1
9 IN CSP4 25V 1%
2
0R 3.32K 1% 1 R732 2 MVDD_ISENP2 22,21
IN
2
9 FB_MVDD_2 1 R823 2 DNI AGND1 2.49K DNI
IN
01 i( AL
FB_MVDD_VR MVDD_CSSUM 1%
AGND1
0R 1 R819 2 51 VDD CSSUM 43 21 AGND1 1 R741 2
1K 0R
0.1% FB_MVDD_VSS_VR MVDD_CSCOMP
1
DNI 52 VSS CSCOMP 44 21

1
AGND1
R818 C720 1 R743 2
2K 1000pF DNI 1 R745 2
0.1% 50V C721 DNI C722 45.3K 1%
0.1uF MVDD_ILM
FB_MVSS_1 1 R824 2 0.1uF 24.9K 42 46
9 IOUT ILIM 21
IN 16V 16V
2
1% C723 UNNAMED_24_CAP_I67_B
0R 1 R820 2 1 2
2
9 FB_MVSS_2 1 R826 2 0R AGND1 0.1uF 16V

IN MVDD_DROOP VCC1
0R DNI
DROOP 45 21 1 R748 2 21
(0
VDDCI_PGOOD VDDCI_CSSUM
AGND1 AGND1 21 8 VDDNB_PWRGD 2K 21 1 R746 2 VDDCI_ISENP1 23,21
MVDD_CSREF IN
AGND1
41 47K
裴
CSREF 21
UNNAMED_24_NCP81022_I190_DIFFNB 0.1%
17 DIFFNB
VDDCI_FB C725 UNNAMED_24_CAP_I33_B VDDCI_CSCOMP UNNAMED_24_RES_I131_B
21 1 R753 2 UNNAMED_24_CAP_I31_A 1 2 1 R754 2 21 1 R749 2 1 R750 2

C726
UNNAMED_24_CAP_I53_A C727
0R DNI 10R 1% 1 R755 21 2 1 R756 21 2 19 COMPNB

47K
100K 1%
0.1%
1
680pF 50V 6.81K 27 VDDCI_PWM1

47.5R 1% PWM1NB/SRNB OUT 23 R752
330pF 50V 1% 0.0022uF 50V C724
AGND1
C729 1 R758 2 CSN1NB 26UNNAMED_24_CAP_I101_A 1 R759 2 1 2 1 2 VDDCI_CSSUM
0.0056uF 25UNNAMED_24_CAP_I101_B 1000pF 50V

16V 24.9K 1% CSP1NB 10K 1%
00 RM 亮
C730
100K
1 R760 2 1 2 2% 16 FBNB
2
VDDCI_ILM 1% C728
1
1K 1%
47pF 50V 21 1 R757 2 1 2
VDDCI_FB UNNAMED_24_NCP81022_I190_TRBSTNB
21 18 TRBSTNB C731 1 R763 2 VDDCI_ISENN1 23,21
16.5K 1000pF 50V
VDDCI_CSSUM IN 1%
1
AGND1 24 0.01uF 10R
CSSUMNB 21 DNI 50V 1%
C733 R767
2
VDDCI_CSCOMP
22 0.1uF 100K 1 R768 2 VDDCI_ISENP1
CSCOMPNB 21 23,21 R761 R762 DNI
FB_VDDNB 25V 1% IN 1K 3.4K
28 FB_VDDCI_MEM 1 R769 2 15 VDDNB 2.49K DNI
IN 1% 1%
2
1% C732
1
0R 1 R770 2 AGND1 1 R765 21 2

1 R766 2 VDDCI_ISENN1 23,21
IN
68 A工樂
1
+VDDCI_MEM
AGND1
25.5K 23
DNI NS702 DNI C735 IOUTNB 10R 1% 10R 1%
FB_VDDCI_LOC 1% VDDCI_ILM 1000pF 50V
2 1 1 R764 2 0.1uF 20
16V ILIMNB 21 C734
C737
0.0022uF
100R 1 2
50V
2
5% VDDCI_DROOP
0.1uF 16V 21 1 R771 2
1
6 SCL 0R
VDDCI_DROOP
3,16,33 REGULATOR_SCL AGND1 7 SDA DROOPNB 21 21 C736
IN 1000pF
14MVDD_VDDCI_OCP#
OCP_L 50V
3,33,16 REGULATOR_SDA
BI
2
AGND_59
AGND_57
AGND_55
AGND_54
AGND_56
AGND_58
AGND_60
76
AGND_1
MVDD_VDDCI_OCP#
ROSC
3 21
)
AGND1
NCP81022 NS700 DNI
12
59
57
55
53
54
56
58
60
1 2
程
UNNAMED_24_NCP81022_I190_ROSC
NS701 DNI
R774 1 2
0)
30K
1%
AGND1
課
AGND1 AGND1
19ci203
+12V_EXT_A
00
CAP1608_2012_1_45H CAP1005 CAP1005
1
1
DNI
+
C739 C740 C741 C742 C743 C744
C738 10uF 10uF 10uF 10uF 1uF 0.1uF
16V 16V 16V 16V 25V 16V
C100u16SO-HF-6
M
2
2
C_D_7343
C0805_67 C0805_67 CAP1608_2012_1_45H +VDD_MEM
0
+5V_GATE_DRV
RD 17 SI
1 R775 2
2.2R
MVDD_PH1
L701 0.22uH
1
U702 SMD_12X8 COMMON DNI DNI DNI DNI DNI DNI
29
10
11
3
8
9
C745 C746 C747 C748 C749 C750 C751 C752 C753 C754 C755 C756
R776 VVVV371104 C757 C758 C4219
10K
1 2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
R777 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
5 1R 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 470uF_2.5V 470uF_2.5V 470uF_2.5V
BOOT COMMON COMMON COMMON
2
5%
C760
UNNAMED_44_CAP_I53_B VVVV336D01V05 VVVV336D01V05 VVVV336D01V05
(C 96 C
2 ZCD_EN* PHASE 7 1 2
C71-47102KE-P01 C71-47102KE-P01 C71-47102KE-P01
0.22uF 25V +VDD_MEM +VDD_MEM
DNI SW1 16
NS704
NS705
1
1
R779 SW2 17 DNI DNI
10K 18 C4278 C4279
SW3
SW4 19 DNI DNI 22uF 22uF
C4275 C4276 C4277
2
R780 4V 4V
SW5 20
2.2R 470uF_2.5V 470uF_2.5V 470uF_2.5V
)2 7 ON
2
SW6 21
DNI COMMON COMMON COMMON
21 MVDD_PWM1 1 PWM SW7 22 C0603 C0603
IN VVVV336D01V05 VVVV336D01V05 VVVV336D01V05
23
SW8 DNI R781 C71-47102KE-P01 C71-47102KE-P01 C71-47102KE-P01
1
24 0R
SW9
25 C761
SW10
SW11 26 1000pF
50V
1
DNI
2
F
10K 4.7uF
0
colay 302045 6.3V
27
GL1
1
DNI
GL2 33 C763 R783
石 19 jo ID
4.7uF 10K MVDD_ISENN1
6.3V OUT 21
2
THWN 30
MVDD_ISENP1 21
UNNAMED_44_RES_I14_B OUT
21,22,23 IN MVDD_VDDCI_DRON 1 R827 2 1 R4272 2 31 DSBL_N
0R 0R
5% 5%
RES1005 RES1005 MVDD_THWN
OUT 22,23
阿 09 ne EN
DNI
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
C809
0.01uF
25V
32
12
13
14
15
28
2
鋒 05 pe TI 4
OT P
1 R842 2
100R
01 i( AL
5%
+12V_EXT_A
CAP1608_2012_1_45H
(0
1
裴
1
1
+
C766 C767 C768 C769 C770

C765 10uF 10uF 10uF 1uF 0.1uF
C764 10uF 16V 16V 16V 25V 16V
16V
C100u16SO-HF-6 CAP1005 CAP1005
2
2
2
C_D_7343 +VDD_MEM
C0805_67 C0805_67 CAP1608_2012_1_45H
+5V_GATE_DRV
00 RM 亮
1 R787 2
2.2R
MVDD_PH2
L703 0.22uH
U703 SMD_12X8 COMMON

29
10
11
3
8
9
R788 VVVV371104
10K 1
2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
R789
BOOT 5 1R
5%
68 A工樂
C772
2 7 1 2
UNNAMED_44_INDSENSE6P_I38_6
ZCD_EN* PHASE
0.22uF 25V
DNI VSWH1 16
NS707
NS708
1
1
R791 VSWH2 17
10K 18
VSWH3
VSWH4 19 DNI DNI
2
20 R792
76
VSWH5 2.2R
VSWH6 21
)
DNI
21 MVDD_PWM2 1 PWM VSWH7 22 MVDD_ISENN2 21
IN OUT
23
VSWH8 DNI R793

1
24 0R
程
VSWH9
25 C773 MVDD_ISENP2
VSWH10 OUT 21
VSWH11 26 1000pF
50V
1
DNI
2
R794 C774 NC1
0)
MVDD_THWN
10K 4.7uF
6.3V OUT 22,23
GL1 27
2
SIC632ACD-T1-GE3 DNI
33
課
GL2 C775 R795
4.7uF 10K
6.3V
colay 302045
2
THWN 30
21,22,23 IN MVDD_VDDCI_DRON 1 R828 2 1 R4273 2 31 DSBL_N

0R 0R
5% 5%
RES1005
1
DNI
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
C810
0.01uF
25V
2
4
32
12
13
14
15
28
1 R843 2
100R
5%
+12V_BUS_B
1
00
1
1
1
+
C777 C778 C779 C780 C781 C782

C776 10uF 10uF 10uF 10uF 1uF 0.1uF
M
16V 16V 16V 16V 25V 16V
C100u16SO-HF-6
2
CAP1608_2012_1_45H
CAP1608_2012_1_45H
CAP1005 CAP1005
2
C_D_7343
C0805_67 C0805_67
0
+VDDCI_MEM
RD 17 SI
+5V_GATE_DRV
1 R797 2
2.2R
VDDCI_PH
L705 0.22uH
1
U704 SMD_12X8 COMMON DNI DNI DNI DNI
29
10
11
3
8
9
C783 C784 C785 C786 C787 C788
C789
R798 VVVV371104
10K UNNAMED_40_RES_I50_A
1 2 470uF_2.5V
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
R799 22uF 22uF 22uF 22uF 22uF 22uF
4V 4V 4V 4V 4V 4V COMMON
BOOT 5 1R
2
5%
(C 96 C
VVVV336D01V05
C791
C71-47102KE-P01
2 ZCD_EN* PHASE 7 1 2
0.22uF 25V
DNI SW1 16
NS712
NS713
1
1
R801 SW2 17
10K 18
SW3
SW4 19 DNI DNI
)2 7 ON
2
20 R802
SW5 2.2R
SW6 21
DNI
21 VDDCI_PWM1 1 PWM SW7 22 VDDCI_ISENN1 21
IN OUT
23
SW8 DNI R803
1
24 0R
SW9
25 C792 VDDCI_ISENP1
SW10 OUT 21
DNI SW11 26 1000pF
50V
1
SiC620ArCD
2
F
R804 C793 GH
0
10K 4.7uF
6.3V
GL1 27
1
DNI
colay 302045
石 19 jo ID
GL2 33 C794 R805
4.7uF 10K
6.3V
2
THWN 30 VDDCI_THWN 23
OUT
21,22 MVDD_VDDCI_DRON 1 R829 2 1 R4274 2 31 DSBL_N

IN 0R
0R
5% 5%
RES1005
阿 09 ne EN
1
DNI
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
C811
0.01uF
25V
32
12
13
14
15
28
2
鋒 05 pe TI
01 i( AL
+1.8V +3.3V_BUS
1 R841 2
100R
5%
1 MR839 2
0R
5%
DNI
1 R839 2
(0
0R
5%
裴
R837
15.4K
1%
R834 1 R838 2
00 RM 亮
10K 57.6K
1% 1%
5
1
U2 R840
1 10K
DNI R835 1%
MVDD_THWN 1 R830 2 100K
22
V+
IN 1%
10K Place@HOT SPOT LMV331 4 MVDD_VDDCI_REG_HOT 3
OUT
2
1%
DNI DNI
V-
23 VDDCI_THWN 1 R831 2 1 R832 2 3

IN
68 A工樂
1
10K 57.6K
1% 1%
C807
1
1uF
6.3V
2
R833 R836 C805 C806
2
10K 4.75K 1000pF 1000pF
1% 1% 50V 50V
10% 10%
2
76 程 ) 1
DNI
R844
0R
5%
2
0) 課
00 M
FB_0V75_N
FB_0V75_P
0
RD 17 SI
+12V_BUS_B
+3.3V_BUS
1
B900 DNI
30R
2
UNNAMED_25_BEAD_I13_B
<New PN> R0603
(C 96 C
)2 7 ON
1
B901
1 2 C900 C901 C902 C903 C928
30R L02-3008103-T19 R0603 10uF 10uF 10uF 10uF 0.1uF
+12V_BUS_B 16V 16V 16V 16V 16V
C11-106A514-M09
C11-1042012-M09
2
C11-106A514-M09
C11-106A514-M09
C11-106A514-M09
+3.3V_BUS
0 F
0V75_CSP
1
R900
,1Ohm,1%,1/16W,0402,
C904 1% R901
石 19 jo ID
,0.033uF,16V,X7R 10K
16V 1%
R11-0010T12-W08
2
0V75_CSN
1
R11-0103T12-W08
C905 R902 C11-3332512-S02 +0.75V_PG 30
,4700pF,50V,X7R,0402,10%, ,3.01KOhm,1%,1/16W,0402
OUT
16V 1%
1
C11-4722812-M09
2
R11-3011T12-W08 C906
,10uF,16V,X6S,0805,20%
16V
阿 09 ne EN
R903 C11-106A514-M09
2
,301Ohm,1%,1/16W,0402,
1%
R11-3010T32-W08
15
U901
1
C11-106A514-M09 +0.75V_PH
13 6
VCC
CSP PGOOD C907
10uF
16V
12 CSN 1 R905
2 1 R906 2
2
VCCP 1 24.3K 1% 2K 1%
2
R11-2432T12-W08 R11-0202T12-W08
鋒 05 pe TI
C908 0V8 DNI DNI
NS900
NS901
1
1 2 10 VSEN
4 Q900
BOOT C909
1
47pF 50V 0.22uF +0.75V
9
25V
C11-4701812-M09 8 COMP 4 <New PN> <New PN>
C11-224A612-M09
2
C910 UNNAMED_25_CAP_I24_B
1 R907 2 1 2 UG 5 3 1 2
1
10K 1% 68nF 50V 2

R11-0103T12-W08 C11-6822812-S02
UNNAMED_25_FDMC8200_I23_G1
C929 R908 9 FB 1
C930 L900
1
1000pF 12.4K 1
2 3 10
PHASE DNI
01 i( AL
50V 0.1% CH-1.0u11A6.8mS-HF
470pF 50V DNI 5 + +
DNI APPLY C911 C931 C932 C912 C913
2
<New PN> <New PN> 11 6 0.1uF 22uF 22uF 330uF 330uF

FBG UNNAMED_25_FDMC8200_I23_G2 4V 4V 4V 2V 2V
LG 2 8 7
2
UNNAMED_25_GS7250_I22_ROSCEN
14 ROSC/EN THM 17 PE642DT
THM 18 APPLY APPLY <New PN>
C11-1042012-M09
THM 19
UNNAMED_25_GS7250_I22_SYNC C11-226A224-M09
R909 7 SYNC THM 20
GND
41.2K
C11-226A224-M09
R925 1%
(0
100K
1%
16
3
GS7260
裴
R11-4122T12-W08 R910
5 Q903A
UNNAMED_25_MOSN_I19_G
0R APPLY
R11-0104T22-W08 5%
2N7002DW
6
D03-7002D10-D07 R11-0000062-W08
4
+0.75V_EN 2 Q903B
30 IN
2N7002DW
D03-7002D10-D07 R926
00 RM 亮
1
1
49.9K
1% DNI
R927 C941
100K 100pF
1% 50V <New PN>
DNI
2
R11-0104T22-W08 <New PN>
68 A工樂
76 程 )
0) 課
00 M
FB_1.8V_N
FB_1.8V_P
0
RD 17 SI
+12V_BUS_B
+3.3V_BUS
1
DNI
B902
30R
2
<New PN>
UNNAMED_26_BEAD_I14_B
R0603
(C 96 C
)2 7 ON
1
B903 L02-3008103-T19
1 2 C914 C915 C916 C917 C933
30R R0603 10uF 10uF 10uF 10uF 0.1uF
+12V_BUS_B 16V 16V 16V 16V 16V
2
C11-106A514-M09
C11-106A514-M09 +3.3V_BUS
C11-106A514-M09
C11-1042012-M09
C11-106A514-M09
0 F
1V8_CSP
1
R911
1R
C918 1% R912
石 19 jo ID
0.033uF 10K
16V 1%
R11-0010T12-W08
2
1V8_CSN
1
C11-3332512-S02
R11-0103T12-W08
C919 R913 1.8V_PWR_GOOD 30
,4700pF,50V,X7R,0402,10% 3.01KOhm,1%,1/16W,0402
OUT
16V 1%
1
2
C11-4722812-M09 C920
R11-3011T12-W08
1uF
16V
阿 09 ne EN
R914 C11-105A512-T04
2
,301Ohm,1%,1/16W,0402,
1%
15
U902
1
R11-3010T32-W08
+1.8V_PH
13 6
VCC
CSP PGOOD C921
1uF
16V ,24.3KOhm,1%,1/16W ,2KOhm,1%,1/16W,0402
12 CSN 1 R916 2
1 R917 2
C11-105A512-T04
2
VCCP 1 1% 1%
2
R11-2432T12-W08 R11-0202T12-W08
鋒 05 pe TI
0V8 DNI DNI
C922
NS902
NS903
1
1 2 10 VSEN
4 Q902
BOOT C923
1
,47pF,50V,NPO,0402,5%, 0.22uF 9 +1.8V
L902
50V 25V <New PN><New PN>
C11-4701812-M09 8 COMP 4 DNI
C11-224A612-M09
2
C924
1 R918 2 1 50V
2 UG 5 3 1 2 UNNAMED_26_CAP_I37_A
1 2
1
,10KOhm,1%,
1% ,6800pF,50V 2 0.47uH
C11-6822812-S02
C934 R919 R11-0103T12-W08 9 FB 1 Co-lay <New PN>

C935 L901
1
1000pF ,1.5KOhm,1%,
1 DNI 2 PHASE 3 10 DNI 1 R920 2
01 i( AL
50V 1% CH-1.0u11A6.8mS-HF
470pF 50V 5 + +
DNI C925 C936 C937 C926 C927 0R
2
<New PN> <New PN> 11 6 0.1uF 22uF 22uF 470uF 100uF R11-0000034-W08
FBG 4V 4V 4V 2.5V 4V
R11-0152T12-W08
LG 2 8 7 1 R921 2
2
UNNAMED_26_GS7250_I23_ROSCEN
0R
14 ROSC/EN THM 17 PE642DT R11-0000034-W08
THM 18 APPLY C11-1042012-M09 C11-226A224-M09
R915 THM 19 C11-226A224-M09
100K <New PN> C71-101041G-S03
UNNAMED_26_GS7250_I23_SYNC
R922 7 SYNC THM 20

GND
1%
3
41.2K
1%
(0
Q904A
5
R11-0104T22-W08
16
R11-4122T12-W08 GS7260
裴
2N7002DW R923 APPLY
6
0R
D03-7002D10-D07 5%
4
+1.8V_EN 2 Q904B
30,2 IN
2N7002DW R11-0000062-W08
R928
D03-7002D10-D07
1
1
49.9K
1%
R929 C940 DNI
00 RM 亮
100K 100pF
1% 50V <New PN>
DNI
2
<New PN>
R11-0104T22-W08
68 A工樂
76 程 )
0) 課
00 M
0
REGULATOR FOR +5V RAILS
RD 17 SI
IOUT = 50mA
(C 96 C +12V_BUS_B +5V_VESA
)2 7 ON
U303 F400
3 IN VR5V OUT 2 UNNAMED_41_CAP_I27_A 1 2
200mA
1
24V
GND
TAB
C431 C425 C426 C430
10uF 1uF 10uF 1uF
16V 6.3V 16V 6.3V
4
F
20% 20% 10%
0
2
2
AZ1117CH-5.0
石 19 jo ID
阿 09 ne EN
鋒 05 pe TI
+3.3V_BUS
+3.3V_BUS
+5V_GATE_DRV
DNI
1 MR700 2 R808
0R 10K
01 i( AL
2 R809 1 UNNAMED_41_CAP_I69_A VPP_PWR_GOOD 30
OUT
1R
1%
1
C795 +VPP
10uF
6.3V
2
U705
10 VDD POK 1
(0 NS715
1
9 3
裴
EN VOUT DNI
VOUT 4
2
6 VIN1 VOUT 5
1
7 VIN2
8 2 VPP_FB C798
VIN3 FB C796 C797
10uF 10uF
30 VPP_EN 0.1uF
IN 6.3V 6.3V 16V
1
1
11 TH1 TH3 13 DNI
00 RM 亮 2
2
C800 12 TH2 TH4 14 R810 C801
10uF 2.4K OHM 0.0012uF
6.3V 1% 50V
1
GS7162TD-R
2
2
C799
0.01uF
16V
2
R471
68 A工樂
1.2K OHM
1%
76 程 )
0) 課
+VDDCI_MEM decoupling caps (1uF - 0402) +VDDCI_MEM decoupling caps (22uF - 0805)
00
C1540 - C1549
+VDDCI_MEM +VDDCI_MEM
C1684 - C1687 C1640 - C1642
+VDDCR_GFX decoupling caps (1uF - 0402)
1
+VDDCR_GFX
C1670 C1671 C1672 C1673 C1674 C1675 C1676 C1677 C1678 C1679 C1686 C1640 C1641
M
C1200 - C1329 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 22uF 22uF 22uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 4V
2
1
1
C1200 C1202 C1203 C1204 C1205 C1207 C1208 C1209
RD 17 SI
1
10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF
4V 4V 4V 4V 4V 4V 4V 4V C1697 C1696 C1695 C1694 C1693 C1692
2
2
+VDDIO_MEM decoupling caps (1uF - 0402) 1uF 1uF 1uF 1uF 1uF 1uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
1
1
+VDD_MEM
2
C1210 C1211 C1215 C1216 C1217 C1218 C1219 C1450 - C1509
10uF 10uF 10uF 10uF 10uF 10uF 10uF
4V 4V 4V 4V 4V 4V 4V
1
2
2
C1452 C1454 C1455 C1463 C1458 C1459
1
1
(C 96 C
1uF 1uF 1uF 1uF 1uF 1uF
C1220 C1221 C1222 C1226 C1227 C1228 C1257 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V +VDDCI_MEM
2
10uF 10uF 10uF 10uF 10uF 10uF 10uF
4V 4V 4V 4V 4V 4V 4V
2
1
1
1
C1330 C1331 C1332 C1333 C1334 C1335 C1336 C1337 C1338 C1339
C1239 C1241 C1242 C1243 C1245 C1246 C1247 C1249 C1254 C1255 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF
)2 7 ON
2
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
2
2
1
1
C1260 C1261 C1262 C1263 C1264 C1265 C1266 C1267 C1268 C1269
C1340 C1341 C1342 C1343 C1344 C1345 C1346 C1347 C1348 C1349
10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
2
2
1
1
+VDDCI_MEM decoupling caps (10uF - 0402)
F
C1270 C1271 C1272 C1273 C1278 C1279
0
4V 4V 4V 4V 4V 4V
2
2
1
石 19 jo ID
C1280 C1281 C1282 C1283 C1284 C1285 C1286 C1287 C1288 C1289
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
2
2
1
C1290 C1291 C1292 C1293 C1294 C1295 C1296 C1297 C1298 C1299
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
阿 09 ne EN
2
+VDDIO_MEM decoupling caps (22uF)

1
C1301 C1302 C1303 C1304 C1305 C1306 C1307 C1308 C1309

10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF C1510 - C1539
4V 4V 4V 4V 4V 4V 4V 4V 4V
2
+VDD_MEM 0805
1
C1310 C1311 C1312 C1313 C1314 C1315 C1316 C1317 C1318 C1319
鋒 05 pe TI
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
1
2
C1487 C1698
1
22uF 22uF
C1320 C1321 C1322 C1323 C1324 C1325 C1326 C1327 C1328 C1329 4V 4V
2
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
2
01 i( AL
(0 裴
00 RM 亮
+VDDIO_MEM decoupling caps (1uF)
+VDDCR_SOC
C1650 - C1669 0201
+VDD_MEM
1
C1683 C1682 C1681 C1680

0805 22uF 22uF 22uF 22uF
4V 4V 4V 4V
68 A工樂
1
1
2
C1650 C1651 C1652 C1653 C1654 C1655 C1656 C1657 C1658 C1659
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
2
2
1
1
C1660 C1661 C1662 C1663 C1664 C1665 C1666 C1667 C1668 C1669
76
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
2
)
1
程
C1644 C1645 C1646 C1647 C1648 C1649
+VDDCR_SOC decoupling caps (1uF - 0402) 4V 4V 4V 4V 4V 4V
2
0)
+VDDCR_SOC
課
1
C1370 C1371 C1372 C1373 C1374 C1375 C1376 C1377 C1231 C1232
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
2
2
00
+VDDCR_GFX +VDDCR_SOC +VDDCI_MEM +VDD_MEM
U1T U1U +3.3V_BUS +3.3V_BUS
AM32 AP31 U1V

VDDCR_GFX#136 VDDCR_SOC#25 symbol 21
symbol 20
AM29 VDDCR_GFX#134 VDDCR_SOC#24 AP30 R30 VDDCI_MEM#18 VDDIO_MEM#1 L13 BA8 VDDIO_33#1 symbol 22 VDD_33_S5#1 BA10
1
AM25 AP27 R29 L16 BB8 BA11
M
VDDCR_GFX#132 VDDCR_SOC#23 VDDCI_MEM#17 VDDIO_MEM#2 VDDIO_33#2 VDD_33_S5#2
AM20 VDDCR_GFX#130 VDDCR_SOC#22 AP21 R27 VDDCI_MEM#16 VDDIO_MEM#3 L18 C2 C3 C4 C5 C1570 C1571 C1572 C1573
AM16 AP20 R26 L20 1uF 1uF 1uF 1uF AY10 1uF 1uF 1uF 1uF
VDDCR_GFX#128 VDDCR_SOC#21 VDDCI_MEM#15 VDDIO_MEM#4 VDD_33_S5P
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
AL30 AP18 R22 L23
0
VDDCR_GFX#126 VDDCR_SOC#20 VDDCI_MEM#14 VDDIO_MEM#5
2
AL26 VDDCR_GFX#124 VDDCR_SOC#19 AP17 R21 VDDCI_MEM#13 VDDIO_MEM#6 L25
AL21 AN33 R19 L28
RD 17 SI
AL17 VDDCR_GFX#120 VDDCR_SOC#15 AN31 R18 VDDCI_MEM#11 VDDIO_MEM#8 L30
+1.8V +1.8V
AK31 VDDCR_GFX#118 VDDCR_SOC#13 AN28 R16 VDDCI_MEM#10 VDDIO_MEM#9 L32
AK27 VDDCR_GFX#116 VDDCR_SOC#11 AN26 R15 VDDCI_MEM#9 VDDIO_MEM#10 L35
AK22 VDDCR_GFX#114 VDDCR_SOC#9 AN22 P32 VDDCI_MEM#8 VDDIO_MEM#11 M12 AT12 VDD_18#1 VDD_18_S5#1 AR19
1
AK18 VDDCR_GFX#112 VDDCR_SOC#7 AN20 P25 VDDCI_MEM#7 VDDIO_MEM#12 M36 AT16 VDD_18#2 VDD_18_S5#2 AR20
AJ32 VDDCR_GFX#110 VDDCR_SOC#5 AN17 P24 VDDCI_MEM#6 VDDIO_MEM#13 P14 C117 C116 C132 AT17 VDD_18#3 C1574 C1575 C1576 C1577
AJ28 AN15 P23 P34 10uF 10uF 10uF AU19 AU18 1uF 1uF 1uF 1uF
VDDCR_GFX#108 VDDCR_SOC#3 VDDCI_MEM#5 VDDIO_MEM#14 VDD_18#4 VDD_18_S5P
4V 4V 4V 6.3V 6.3V 6.3V 6.3V
AJ23 VDDCR_GFX#106 VDDCR_SOC#1 AM15 P16 VDDCI_MEM#4 VDDIO_MEM#15 T11 10% 10% 10%
AU20 VDD_18#5
2
AJ19 VDDCR_GFX#104 VDDCR_SOC#2 AM33 N25 VDDCI_MEM#3 VDDIO_MEM#16 T37 AV18 VDD_18#6
1
AH32 AN16 N24 V14 AW19
(C 96 C
VDDCR_GFX#102 VDDCR_SOC#4 VDDCI_MEM#2 VDDIO_MEM#17 VDD_18#7
1
AH29 VDDCR_GFX#100 VDDCR_SOC#6 AN19 N23 VDDCI_MEM#1 VDDIO_MEM#18 V34 C111 C112 C113 C114 C115
AH25 AN21 R32 Y14 1uF 1uF 1uF 1uF 1uF
6.3V 6.3V 6.3V 6.3V 6.3V C1578 C1579
AH20 AN25 R33 Y34 10uF 10uF
4V 4V
2
AH16 VDDCR_GFX#94 VDDCR_SOC#12 AN27 T14 VDDCI_MEM#21 VDDIO_MEM#21 AB11 10% 10%
2
AG30 VDDCR_GFX#92 VDDCR_SOC#14 AN29 T15 VDDCI_MEM#22 VDDIO_MEM#22 AB37
AG26 VDDCR_GFX#90 VDDCR_SOC#16 AN32 T33 VDDCI_MEM#23 VDDIO_MEM#23 AD11
AG21 VDDCR_GFX#88 VDDCR_SOC#18 AP16 T34 VDDCI_MEM#24 VDDIO_MEM#24 AD37
AG17 VDDCR_GFX#86 Y15 VDDCI_MEM#25 VDDIO_MEM#25 AF11
+0.75V +0.75V
AF31 Y33 AF37
)2 7 ON
VDDCR_GFX#84 VDDCI_MEM#26 VDDIO_MEM#26
AF27 VDDCR_GFX#82 AA15 VDDCI_MEM#27 VDDIO_MEM#27 AH11
AF22 VDDCR_GFX#80 AA33 VDDCI_MEM#28 VDDIO_MEM#28 AH37 AR25 VDD_075#1 VDDCR_075_S5#1 AV20
1
AF18 VDDCR_GFX#78 AB15 VDDCI_MEM#29 VDDIO_MEM#29 AK11 AR26 VDD_075#2 VDDCR_075_S5#2 AV21
AE32 VDDCR_GFX#76 AB33 VDDCI_MEM#30 VDDIO_MEM#30 AK37 C180 C181 C182 AR27 VDD_075#3 C1580 C1581 C1582 C1583
AE28 AC15 AM14 10uF 10uF 10uF AR28 AU22 1uF 1uF 1uF 1uF
VDDCR_GFX#74 VDDCI_MEM#31 VDDIO_MEM#31 VDD_075#4 VDDCR_075_S5P
4V 4V 4V 6.3V 6.3V 6.3V 6.3V
AE23 VDDCR_GFX#72 AC33 VDDCI_MEM#32 VDDIO_MEM#32 AM34 10% 10% 10%
AR29 VDD_075#5
2
AE19 VDDCR_GFX#70 AE15 VDDCI_MEM#33 AR31 VDD_075#6
AC32 VDDCR_GFX#68 AE33 VDDCI_MEM#34 AU30 VDD_075#7
1
AC29 VDDCR_GFX#66 AF14 VDDCI_MEM#35
F
AC27 VDDCR_GFX#65 AF15 VDDCI_MEM#36 C119 C120 C121 C122 C123 C1584 C1585
0
AC22 AF33 1uF 1uF 1uF 1uF 1uF AU23 10uF 10uF
VDDCR_GFX#63 VDDCI_MEM#37
6.3V 6.3V 6.3V 6.3V 6.3V VDD_075 4V 4V
AC18 VDDCR_GFX#61 AF34 VDDCI_MEM#38
10% 10% 10%
2
AB32 VDDCR_GFX#59 AH15 VDDCI_MEM#39
AB28 VDDCR_GFX#57 AH33 VDDCI_MEM#40
石 19 jo ID
+0.75V
AB23 VDDCR_GFX#55 AJ15 VDDCI_MEM#41 FB_VDDIO_MEM AP13
AB19 VDDCR_GFX#53 AJ33 VDDCI_MEM#42 FB_VDDCI_MEM AM12 FB_VDDCI_MEM 21
OUT
AA32 VDDCR_GFX#51 AK14 VDDCI_MEM#43
1
AA29 VDDCR_GFX#49 AK15 VDDCI_MEM#44
AA25 VDDCR_GFX#47 AK33 VDDCI_MEM#45 FB_VSS_B AM13 C109
AA20 AK34 1uF
VDDCR_GFX#45 VDDCI_MEM#46
6.3V
AA16 VDDCR_GFX#43
2
Navi10 REV 0.91
Y30 VDDCR_GFX#41
Y26 VDDCR_GFX#39
Y21
阿 09 ne EN
VDDCR_GFX#37
Y17 VDDCR_GFX#35
W31 VDDCR_GFX#33
W27 VDDCR_GFX#31
W22 VDDCR_GFX#29
W18 VDDCR_GFX#27
V32 VDDCR_GFX#25
V28 VDDCR_GFX#23
V23 VDDCR_GFX#21 VSS AT13
V19 VDDCR_GFX#19
鋒 05 pe TI
U32 VDDCR_GFX#17
U29 VDDCR_GFX#15
U25 VDDCR_GFX#13
U20 VDDCR_GFX#11
Navi10 REV 0.91
T21 VDDCR_GFX#3
T23 VDDCR_GFX#4
T26 VDDCR_GFX#5
T19 VDDCR_GFX#2
T17 VDDCR_GFX#1
T28
01 i( AL
VDDCR_GFX#6
T30 VDDCR_GFX#7
T32 VDDCR_GFX#8
U16 VDDCR_GFX#9
U18 VDDCR_GFX#10
U22 VDDCR_GFX#12
U27 VDDCR_GFX#14
U31 VDDCR_GFX#16
V17 VDDCR_GFX#18
V21 VDDCR_GFX#20
V26 VDDCR_GFX#22
(0
V30 VDDCR_GFX#24
W16 VDDCR_GFX#26
裴
W20 VDDCR_GFX#28
W25 VDDCR_GFX#30
W29 VDDCR_GFX#32
W32 VDDCR_GFX#34
Y19 VDDCR_GFX#36
Y23 VDDCR_GFX#38
Y28 VDDCR_GFX#40
00 RM 亮
Y32 VDDCR_GFX#42
AA18 VDDCR_GFX#44
AA22 VDDCR_GFX#46
AA27 VDDCR_GFX#48
AA31 VDDCR_GFX#50
AB17 VDDCR_GFX#52
AB21 VDDCR_GFX#54
AB26 VDDCR_GFX#56
AB30 VDDCR_GFX#58
AC16 VDDCR_GFX#60
68 A工樂
AC20 VDDCR_GFX#62
AC25 VDDCR_GFX#64
AC31 VDDCR_GFX#67
AE17 VDDCR_GFX#69
AE21 VDDCR_GFX#71
AE26 VDDCR_GFX#73
AE30 VDDCR_GFX#75
AF16 VDDCR_GFX#77
AF20 VDDCR_GFX#79
AF25 VDDCR_GFX#81
76
AF29 VDDCR_GFX#83
AF32
)
VDDCR_GFX#85
AG19 VDDCR_GFX#87
AG23 VDDCR_GFX#89
程
AG28 VDDCR_GFX#91
AG32 VDDCR_GFX#93
AH18 VDDCR_GFX#95
AH22 VDDCR_GFX#97
AH27 VDDCR_GFX#99
0)
AH31 VDDCR_GFX#101
AJ17 VDDCR_GFX#103
AJ21 VDDCR_GFX#105
AJ26 VDDCR_GFX#107
AJ30
課
VDDCR_GFX#109
AK16 VDDCR_GFX#111
AK20 VDDCR_GFX#113
AK25 VDDCR_GFX#115
AK29 VDDCR_GFX#117
AK32 VDDCR_GFX#119
AL19 VDDCR_GFX#121
AL23 VDDCR_GFX#123
AL28 VDDCR_GFX#125
AL32 VDDCR_GFX#127
AM18 VDDCR_GFX#129
AM22 VDDCR_GFX#131
AM27 VDDCR_GFX#133
AM31 VDDCR_GFX#135
FB_VDDCR_SOC AP35 FB_VDDCR_SOC 16

OUT
FB_VDDCR_GFX AM37 FB_VDDCR_GFX 16

OUT
FB_VSS_A AM36 FB_VSS_A 16

OUT
Navi10 REV 0.91
PRELIMINARY AND SUBJECT TO CHANGE BA17 BE42
VSS#658 VSS#742
BA14 VSS#657 symbol 25 VSS#744 BF5
U1W BA12 VSS#656 VSS#746 BF27
BA7 U1Y BF31
U1X VSS#655 VSS#748
H26 VSS#137 symbol 23 VSS#250 T27 AF2 VSS#421 VSS#488 AJ27 BA5 VSS#654 VSS#759 BG14
symbol 24
H22 VSS#136 VSS#249 T25 AE47 VSS#420 VSS#487 AJ25 BA3 VSS#653 VSS#761 BG19
H20 VSS#135 VSS#248 T22 AE45 VSS#419 VSS#486 AJ22 BA1 VSS#652 VSS#760 BG17
H18 VSS#134 VSS#247 T20 AE43 VSS#418 VSS#485 AJ20 AY46 VSS#651 VSS#765 BG27
00
H8 VSS#130 VSS#243 T6 AE31 VSS#414 VSS#481 AJ9 AY37 VSS#647 VSS#750 BF36
H6 VSS#129 VSS#242 T4 AE29 VSS#413 VSS#480 AJ7 AY35 VSS#646 VSS#749 BF34
H4 VSS#128 VSS#241 T2 AE27 VSS#412 VSS#479 AJ5 AY32 VSS#645 VSS#741 BE40
H2 VSS#127 VSS#240 R31 AE25 VSS#411 VSS#478 AJ3 AY30 VSS#644 VSS#740 BE37
G47 R28 AE22 AJ1 AY28 BE35
M
VSS#126 VSS#239 VSS#410 VSS#477 VSS#643 VSS#739
G45 VSS#125 VSS#238 R25 AE20 VSS#409 VSS#476 AH46 AY26 VSS#642 VSS#738 BE32
G41 R20 AE16 AH42 AY22 BE28
0
G36 P47 AE9 AH38 AY6 BE24
RD 17 SI
G34 VSS#120 VSS#233 P45 AE7 VSS#404 VSS#471 AH34 AY4 VSS#637 VSS#733 BE22
G31 VSS#119 VSS#232 P43 AE5 VSS#403 VSS#470 AH30 AY2 VSS#636 VSS#732 BE20
G29 VSS#118 VSS#231 P41 AE3 VSS#402 VSS#469 AH28 AW36 VSS#635 VSS#731 BE18
G27 VSS#117 VSS#230 P39 AE1 VSS#401 VSS#468 AH26 AW34 VSS#634 VSS#730 BE16 U1AA
G21 VSS#116 VSS#229 P36 AD46 VSS#400 VSS#467 AH23 AW31 VSS#633 VSS#729 BE13
G12 VSS#112 VSS#225 P22 AD34 VSS#396 VSS#463 AH14 AW23 VSS#629 VSS#725 BD42
G10 P20 AD14 AH10 AW18 BD40
(C 96 C
G7 VSS#110 VSS#223 P18 AD8 VSS#394 VSS#461 AH8 AW16 VSS#627 VSS#723 BD37
symbol 27
G5 VSS#109 VSS#222 P12 AD6 VSS#393 VSS#460 AH6 AV47 VSS#626 VSS#722 BD35
G3 VSS#108 VSS#221 P9 AD4 VSS#392 VSS#459 AH4 AV45 VSS#625 VSS#721 BD32
G1 VSS#107 VSS#220 P7 AD2 VSS#391 VSS#458 AH2 AV43 VSS#624 VSS#720 BD30 AV10 FREE#32
F46 VSS#106 VSS#219 P5 AC47 VSS#390 VSS#457 AG47 AV41 VSS#623 VSS#719 BD28 AU38 FREE#31
F44 VSS#105 VSS#218 P3 AC45 VSS#389 VSS#456 AG45 AV38 VSS#622 VSS#718 BD26 K25 FREE#30
F40 VSS#104 VSS#217 P1 AC43 VSS#388 VSS#455 AG43 AV19 VSS#621 VSS#717 BD24 K24 FREE#29
F37 VSS#103 VSS#216 N46 AC41 VSS#387 VSS#454 AG41 AV11 VSS#620 VSS#716 BD23 K23 FREE#28
F35 N44 AC39 AG39 AV7 BD22 J25
)2 7 ON
VSS#102 VSS#215 VSS#386 VSS#453 VSS#619 VSS#715 FREE#27
F32 VSS#101 VSS#214 N42 AC36 VSS#385 VSS#452 AG36 AV5 VSS#618 VSS#714 BD21 J24 FREE#26
F30 VSS#100 VSS#213 N40 AC30 VSS#384 VSS#451 AG33 AV3 VSS#617 VSS#713 BD19 J23 FREE#25
F28 VSS#99 VSS#212 N38 AC28 VSS#383 VSS#450 AG31 AV1 VSS#616 VSS#712 BD17 H25 FREE#24
F26 VSS#98 VSS#211 N35 AC26 VSS#382 VSS#449 AG29 AU46 VSS#615 VSS#711 BD14 H24 FREE#23
F22 VSS#97 VSS#210 N13 AC23 VSS#381 VSS#448 AG27 AU44 VSS#614 VSS#710 BD12 H23 FREE#22
F20 VSS#96 VSS#209 N10 AC21 VSS#380 VSS#447 AG25 AU42 VSS#613 VSS#709 BD10 G25 FREE#21
F18 VSS#95 VSS#208 N8 AC19 VSS#379 VSS#446 AG22 AU40 VSS#612 VSS#708 BD7 G24 FREE#20
F16 VSS#94 VSS#207 N6 AC17 VSS#378 VSS#445 AG20 AU36 VSS#611 VSS#707 BC47 G23 FREE#19
F13 VSS#93 VSS#206 N4 AC12 VSS#377 VSS#444 AG18 AU21 VSS#610 VSS#706 BC45 F25 FREE#18
F
F11 VSS#92 VSS#205 N2 AC9 VSS#376 VSS#443 AG16 AU17 VSS#609 VSS#705 BC41 F24 FREE#17
0
F8 VSS#91 VSS#204 M47 AC7 VSS#375 VSS#442 AG15 AU16 VSS#608 VSS#704 BC38 F23 FREE#16
F4 VSS#90 VSS#203 M45 AC5 VSS#374 VSS#441 AG12 AU13 VSS#607 VSS#703 BC36 E25 FREE#15
F2 VSS#89 VSS#202 M43 AC3 VSS#373 VSS#440 AG9 AU10 VSS#606 VSS#702 BC34 E24 FREE#14
E47 VSS#88 VSS#201 M41 AC1 VSS#372 VSS#439 AG7 AU8 VSS#605 VSS#701 BC31 E23 FREE#13
石 19 jo ID
E45 VSS#87 VSS#200 M39 AB46 VSS#371 VSS#438 AG5 AU6 VSS#604 VSS#700 BC29 D25 FREE#12
E38 VSS#84 VSS#197 M29 AB40 VSS#368 VSS#435 AF46 AT47 VSS#601 VSS#697 BC23 C25 FREE#9
E31 VSS#81 VSS#194 M24 AB29 VSS#365 VSS#432 AF40 AT41 VSS#598 VSS#694 BC5 B25 FREE#6
E21 M19 AB22 AF26 AT14 BB46 A25
阿 09 ne EN
VSS#78 VSS#191 VSS#362 VSS#429 VSS#595 VSS#691 FREE#3
E19 VSS#77 VSS#190 M17 AB20 VSS#361 VSS#428 AF23 AT9 VSS#594 VSS#690 BB44 A24 FREE#2
E17 VSS#76 VSS#189 M14 AB18 VSS#360 VSS#427 AF21 AT7 VSS#593 VSS#689 BB41 A23 FREE#1
E14 VSS#75 VSS#188 M9 AB16 VSS#359 VSS#426 AF19 AT5 VSS#592 VSS#688 BB38
E7 VSS#72 VSS#185 M3 AB6 VSS#356 VSS#423 AF6 AR46 VSS#589 VSS#685 BB31
E5 VSS#71 VSS#184 M1 AB4 VSS#355 VSS#422 AF4 AR44 VSS#588 VSS#684 BB29 Navi10 REV 0.91
E3 VSS#70 VSS#183 L46 AB2 VSS#354 VSS#276 U45 AR42 VSS#587 VSS#683 BB27
E1 VSS#69 VSS#182 L44 AA47 VSS#353 VSS#275 U43 AR40 VSS#586 VSS#682 BB25
鋒 05 pe TI
D42 VSS#68 VSS#181 L42 AA45 VSS#352 VSS#274 U41 AR37 VSS#585 VSS#681 BB23
D20 L4 AA23 U19 AR4 BA47
01 i( AL
D18 VSS#58 VSS#171 L2 AA21 VSS#342 VSS#264 U17 AR2 VSS#575 VSS#671 BA45
D16 VSS#57 VSS#170 K47 AA19 VSS#341 VSS#263 U15 AP47 VSS#574 VSS#670 BA43
C43 VSS#52 VSS#165 K37 AA7 VSS#336 VSS#258 U3 AP36 VSS#569 VSS#665 BA32
C41 VSS#51 VSS#164 K32 AA5 VSS#335 VSS#257 U1 AP34 VSS#568 VSS#664 BA30
C38 VSS#50 VSS#163 K16 AA3 VSS#334 VSS#256 T46 AP32 VSS#567 VSS#663 BA28
C36 VSS#49 VSS#162 K11 AA1 VSS#333 VSS#255 T44 AP29 VSS#566 VSS#662 BA26
(0
C34 VSS#48 VSS#161 K10 Y46 VSS#332 VSS#254 T42 BG12 VSS#758 VSS#661 BA24
裴
C27 VSS#45 VSS#158 K3 Y40 VSS#329 VSS#251 T29 BG2 VSS#755 VSS#565 AP28
C21 VSS#44 VSS#157 K1 Y37 VSS#328 VSS#500 AK8 BF47 VSS#754 VSS#564 AP26
C19 VSS#43 VSS#156 J36 Y31 VSS#327 VSS#499 AK6 BF43 VSS#753 VSS#563 AP23
C12 VSS#40 VSS#153 J29 Y25 VSS#324 VSS#496 AJ47 BG29 VSS#766 VSS#560 AP12
00 RM 亮
B47 VSS#36 VSS#149 J17 Y16 VSS#320 VSS#492 AJ39 BG38 VSS#770 VSS#556 AP3
B42 VSS#35 VSS#148 J14 Y11 VSS#319 VSS#491 AJ36 BG41 VSS#771 VSS#555 AP1
B40 VSS#34 VSS#147 J12 Y8 VSS#318 VSS#490 AJ31 BG43 VSS#772 VSS#554 AN30
B37 VSS#33 VSS#146 H46 Y6 VSS#317 VSS#489 AJ29 BG46 VSS#773 VSS#553 AN23
B35 VSS#32 VSS#145 H44 Y4 VSS#316 BF1 VSS#743 VSS#552 AN18
B32 VSS#31 VSS#144 H42 Y2 VSS#315 VSS#551 AM46
B30 VSS#30 VSS#143 H40 W47 VSS#314 VSS#550 AM44
68 A工樂
B16 VSS#24 W30 VSS#308 VSS#544 AM28
B13 VSS#23 W28 VSS#307 VSS#543 AM26
B11 VSS#22 W26 VSS#306 VSS#542 AM23
B8 VSS#21 W23 VSS#305 VSS#541 AM21
B6 VSS#20 W21 VSS#304 VSS#540 AM19
76
B1 VSS#19 W19 VSS#303 VSS#539 AM17
A46 W17 AM10
)
VSS#18 VSS#302 VSS#538
A43 VSS#17 W12 VSS#301 VSS#537 AM8
A41 VSS#16 W9 VSS#300 VSS#536 AM6
程
A38 VSS#15 W7 VSS#299 VSS#535 AM4
A36 VSS#14 W5 VSS#298 VSS#534 AM2
A34 VSS#13 W3 VSS#297 VSS#533 AL47
A31 VSS#12 W1 VSS#296 VSS#532 AL45
A29 VSS#11 V46 VSS#295 VSS#531 AL43
0)
A27 VSS#10 V44 VSS#294 VSS#530 AL41
A21 VSS#9 V42 VSS#293 VSS#529 AL39
A19 VSS#8 V40 VSS#292 VSS#528 AL36
A17 VSS#7 V37 VSS#291 VSS#527 AL33
A14 V31 AL31
課
VSS#6 VSS#290 VSS#526
A12 VSS#5 V29 VSS#289 VSS#525 AL29
A10 VSS#4 V27 VSS#288 VSS#524 AL27
A7 VSS#3 V25 VSS#287 VSS#523 AL25
A5 VSS#2 V22 VSS#286 VSS#522 AL22
A2 VSS#1 V20 VSS#285 VSS#521 AL20
Navi10 REV 0.91
V18 VSS#284 VSS#520 AL18
V16 VSS#283 VSS#519 AL16
V11 VSS#282 VSS#518 AL15
V8 VSS#281 VSS#517 AL12
V6 VSS#280 VSS#516 AL9
U47 VSS#277 VSS#513 AL3
Navi10 REV 0.91 VSS#512 AL1
VSS#511 AK46
VSS#510 AK44
VSS#509 AK42
VSS#508 AK40
VSS#507 AK30
VSS#506 AK28
VSS#505 AK26
VSS#504 AK23
VSS#503 AK21
VSS#502 AK19
VSS#501 AK17
VSS#747 BF29
VSS#745 BF25
Navi10 REV 0.91
19ci203
+3.3V_BUS
PRELIMINARY AND SUBJECT TO CHANGE HW default power up sequence
R1105
32,30 CTF_PWRB 1 2 0R 5%
IN
R1010
1K
1%
+12V_BUS 1.8V
+12V_BUS_B +3.3V_BUS
F1913 0.75V
2 1 L1002 0.47uH
00
SMD_5X5 COMMON +1.8V_EN 2,25
OUT
1
+12V_BUS_B
FUSE-6A_S321611-RH
C102PCIE
VVVV336D01V05 R1003
VDDCR_GFX
10uF D07-2600600-L07 5.11K
16V 1%
6
20%
2
R1004 2 Q1000A
VDDCR_SOC
1
11.3K MMDT3904
M
1%
6
C1005
1
0.1uF
2 Q1001A 16V
MMDT3904 10% VPP
2
+12V_EXT_A
1
UNNAMED_30_NPN_I86_C
RD 17 SI
R1005
1K MVDDC
1%
+12V_EXT_A_CON
+12V_EXT_A_S R1006
+12V_EXT_A 11.3K MVDDQ
F1912 1%
3
J1000
0.33uH
+12V 6 2 1 L1000 5 Q1001B

VDDCI_MEM
1
7 SMD_9X8 COMMON MMDT3904

+12V
+12V 8 FUSE-6A_S321611-RH C1000
4
1
VVVV336D01V05 47pF
R1068
50V
D07-2600600-L07 5% 1K
(C 96 C
C1001 1%
2
10uF
16V
20%
2
GND 1
GND 2
GND 4
SENSE_1 3 POWER UP SEQUENCE

SENSE_A
SENSE_2 5
)2 7 ON
BUS RAILS (3.3V/12V UP) -> +1.8V -> 0.75V -> VDDGFX/VDDSOC
POWER_HEADER -> VPP -> VDDCI/MVDD
POWCONN_D8_10
12V_BUS and 12V_EXT_A power-up sequence
1
COMMON
VVVV33601022 C1002
N93-08M0361-W06 47pF
50V
DNI
5%
2
25 1.8V_PWR_GOOD 1
R1007 2 0R 5% +0.75V_EN 24
GND IN OUT
0 F
32,30 CTF_PWRB 1
R1008 2 0R 5%
IN
+12V_EXT_A
石 19 jo ID
+3.3V_BUS
24,30 +0.75V_PG 1
R1009 2 0R 5% VPP_EN 26
IN OUT
R1023
10K +3.3V_BUS
1%
3
R1024 5 Q1000B
2.32K MMDT3904 +3.3V_BUS
1%
1
R1013
4
2 10K
阿 09 ne EN
Q1021A C1026
5%
MMDT3904 0.1uF
VDDGFX_VDDC_EN 30,16
16V
10% OUT
R1035
2
10K
R1025 5%
+12V_EXT_B
3
1K
1%
+12V_EXT_B_CON +12V_EXT_B Q1026
+12V_EXT_B_S 1
MMBT3904T
F1902
3
J1001
2
+12V 6 2 1 L1001 0.33uH R1026 24,30 +0.75V_PG 1
R1034 2 0RUNNAMED_30_CAP_I404_A
5% 1 Q1024
IN
1
1
11.3K
+12V 7 SMD_9X8 COMMON
1% DNI 2N7002L
鋒 05 pe TI 3
+12V 8 FUSE-6A_S321611-RH C1022 C1023
2
1
VVVV336D01V05
47pF
5 R1012 1uF
50V Q1021B DNI
0R 6.3V
D07-2600600-L07 C1021
5% MMDT3904 5%
10%
2
2
10uF
16V
4
20%
R1027
2
1K
GND 1 1%
GND 2
GND 4
01 i( AL
SENSE_1 SENSE_B
SENSE_2 5
26 VPP_PWR_GOOD 1
R1042 2 0R 5% VDD_MEM_VDDCI_EN 21
IN OUT
1
POWER_HEADER
POWCONN_D8_10
C1003
COMMON 47pF
50V
VVVV33601022
DNI
5% 3.3V_BUS and 12V_EXT_B (6PIN/8PIN) power-up sequence
2
N93-08M0361-W06
GND
(0 裴 IN BACO MODE
TURN OFF VDDCR_GFX, VDDCR_SOC, VDDCI, VPP and MVDD

+3.3V_BUS
00 RM 亮
DNI
R1056
IN BAMACO MODE 10K
1%
TURN OFF VDDCR_GFX, VDDCR_SOC, VDDCI(turn off by SVI2)

+0.75V_PG 24,30
OUT
3
2,32,33 IN PX_EN R1014 2 1 10K 5% 5 Q1019B
68 A工樂
MMDT3904
+3.3V_BUS
4
6
R1028 2 1 2
3,31 BAMACO_EN 10K 5% Q1019A R1015 DNI

IN MMDT3904 10K
5%
1
DNI R1055
1
10K
C1024 5%
1uF
6.3V
10%
VDDGFX_VDDC_EN 30,16
OUT
2
76
6
)
R1047 1 2
5.1K 5% 2 Q1018A
MMDT3904
1
R1021
10K
5%
0)
課
3
R1016 UNNAMED_30_NPN_I493_B
2,16,21,32 PERST#_BUF 2 1 5 Q1018B R1018

IN MMDT3904 0R
1% 10K 5%
4
R1017
10K
1%
00 M
0
RD 17 SI Resistor could be placed inside the analog switch.
1
0R
R1060
2
5%
DNI
(C 96 C
+3.3V_BUS +1.8V
DNI
1
U1002
C1016 R1061
0.1uF 8 7 10K
16V VCC OE1 5%
3 SVT_MVDD_VDDCI 10%
2 1B OE2 3
IN
)2 7 ON
2
6 2B 1A 1 SVT_MVDD_VDDCI_VR 21
OUT
4 GND 2A 5
NC7WB66K8X
Isolation for SVT when 1.8V to GPU is off during BOMACO
0 F
Resistor be placed close the analog switch. DNI
R1048
石 19 jo ID
1 2
0R 5% DNI
R1049
1 2
0R 5%
+3.3V_BUS
MVDDC/VDDCI_MEM VOLTAGE CONTROL
1
U1000
阿 09 ne EN
C1014
0.1uF 8 7
16V VCC OE1
3 SVC_MVDD_VDDCI 10%
2 1B OE2 3
IN
2
3 SVD_MVDD_VDDCI 6 2B 1A 1 SVC_MVDD_VDDCI_VR 21
IN OUT
4 GND 2A 5 SVD_MVDD_VDDCI_VR 21
BI
+3.3V_BUS
NC7WB66K8X
R1066 R1029
+3.3V_BUS Overlap pads
100R 100R 1
R1038 210K 5% 1
MR1038 210K 5%
鋒 05 pe TI
5% 5%
3
1 210K 1 210K
R1067 R1039 5% MR1039 5% +1.8V
10K 2
UNNAMED_45_MOSN_I19_D Q1004B 5 Q1004A
5% R1037
10K
2N7002DW 2N7002DW 5%
D1000
4
MACO_EN#
T=51us 1
3
R1063 Q1003B R1032 UNNAMED_45_DIODECOMK_I37_A2
Q1003A
21 MVDD_VDDCI_PWROK 1 2 UNNAMED_45_CAP_I17_A 2 3,30 BAMACO_EN 1 2 2 3 5
IN IN
01 i( AL
0R 5% DNI 2N7002DW 0R 5% 2N7002DW SVI2 BOOT UP VOLTAGE (VDDCI_MEM/MVDD)
1
1
BAT54C
DNI
4
R1064 C1012 NA R1033 C1013 SVC SVD VOLTAGE
10K 22pF 1 MR1032 2 UNNAMED_45_CAP_I39_A 10K 22pF
5% 50V 5% 50V
10% 10%
0R 5% 0 0 1.1V
2
2
0 1 1.0V
DNI 1 0 0.9V
1 1 0.8V
R1046
2 1
(0
3
5% 0R
Q1006
1
裴
R1045
2N7002E
0R SVC/SVD need to pull high during MACO mode
5%
2
R1065
100K
5%
00 RM 亮
68 A工樂
76 程 )
0) 課
MT210 MT211 MT212
MT207 H_R220D125 H_R220D125 H_R220D125
+12V_BUS_B
MT200 H_R220D125 1 1 1
H_R220D125 1 DNI DNI DNI
1 DNI
DNI
MT208
1
MT203 H_R220D125
H_R220D125 L1888
1 B200
1 DNI 220L2A-50 220R
MT209
00
DNI
MT204 H_R220D125 25%
2
H_R220D125 1 FANOUT_P
DNI
MT216
1 MT214
1
MT213 H_R220D125
DNI H_R220D125
H_R220D125 1 MC200
1 DNI 10uF
1 DNI 16V R240
DNI 20% 20K
M
5%
2
UNNAMED_31_MOSP_I179_G
0
Q211 R213
AO3415L 0R
5%
DNI
RD 17 SI
R243
20K
5%
3
+3.3V_BUS
6
CTF_OUT R246 UNNAMED_31_NPN_I148_B
2 Q212A
32 20K
5% MMDT3904-7 R272
Fiji_fansinks Fiji_fansinks Fiji_fansinks Fiji_fansinks 20K
HS201A HS201B HS201C HS201D 5%
1
(C 96 C
6
Q213A
2,30,33 PX_EN 20K 2
IN
3
5% MMDT3904-7
+3.3V_BUS Q212B
5
1
MMDT3904-7
4
1
C208 2
0.1uF 6.3V
3
Q213B
5
)2 7 ON
1 10% 20K
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
5% MMDT3904-7
4
R218
0R U201 +3.3V_BUS
5%
DNI
1 A VCC 8
UNNAMED_31_74VC1G123_I139_REXT
2 B Rext/Cext 7
MR218 UNNAMED_31_74VC1G123_I139_CLRN UNNAMED_31_74VC1G123_I139_CEXT R249
2,16,21,30,32 PERST#_BUF 1 2 3 CLR Cext 6 1 2
10uF C2106.3V 2 1
IN UNNAMED_31_74VC1G123_I139_Q
0R 5% 4 GND Q 5 5% 1M
NA NA
F
MT217 MT218
0
SN74LVC1G123DCT NA
ASSY201 BAV99
3
SCHEMATIC SCHEMATIC
BRACKET 1 2
石 19 jo ID
+3.3V_BUS +3.3V_BUS +12V_BUS_B +3.3V_BUS
DUAL
D203
For 4-WIRE FAN ONLY

2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
8020058200G
LM96 external GPU
temperature sensor R207 R208 R266
10K 10K 10K
DNI
5% 5% 5%
R206
5.1K PWM_FAN MJ201
5%
4 TOWS_SIP4_2MM_1
FAN_IN FAN_TACH
3 MALE
阿 09 ne EN
R209 1K
FANOUT_P_Q 2.00MM
3
2 COMMON
1% VVVV3603303
1
R210 1K 1 Q200 1 N32-1040AA1-H06
6
MMBT3904T
REMOVE 跳頁 5% C211 R211
R258
1
1 2 2 Q201A 0.1uF 3.83K

16V
FAN_OUT 1%
2
5% 0R2 R212 1 10K 5% MMDT3904-7 C204 Fan Connector
2
10uF
16V
1
20%
DNI
2
OVERLAP J201 AND MJ201
鋒 05 pe TI
3
DNI PERST#_BUF_R
R214 Q201B
2,16,21,30,32 PERST#_BUF 1 2 5
IN
10K 5% MMDT3904-7 R215
0R
DNI 5%
4
R216
2.61K
1%
01 i( AL
+3.3V_BUS
+3.3V_BUS +3.3V_BUS U250
3 5
FAN_IN A VCC UNNAMED_31_74AUP1G57_I190_Y FAN_IN_ASIC
32 1 4 1
R260 2 0R 5%
B Y
1
6 C GND 2
(0
R227 C268
20K 0.1uF
74AUP1G57GM
裴
5% 6.3V
2
10%
2
UNNAMED_31_PNP_I49_B
1 Q207
MMBT3906T
1
R259 2 0R 5%
3
R229
3
REMOVE CTF_GATE2 (LMXXXX) 20K
5%
CTF_OUT UNNAMED_31_NPN_I105_B
1
UNNAMED_31_PNP_I49_C
R236
32 2 1
R220 22.2K 5% 1 Q204
00 RM 亮
0R MMBT3904T
5%
2
3
1 Q210 R232
20K
MMBT3904T 5%
2
R233 4.7K R234 47K CTF_PWRB 30
OUT
68 A工樂
5% 5%
3
Place close to its CTLR

1
1
MR230 22.2K1 5% Q209
R235
1
100K
5% C209 MMBT3904T
0.01uF
10V
2
UNNAMED_31_DIODESERIES_I15_COM
D202 3
2
BAT54S
NA
R239
2
1K
5%
76 )
2,16,21,30,32 PERST#_BUF
IN
0) 程 J18
3 1
J17
課
4 2
impedence X_PIN1*2
FM1 FM2 FM3 FM4
U1D
TS_A
AR36 ALERT_L symbol 4 TS_A AP25 SCHEMATIC
TP12
OPT OPT OPT OPT

REMOVE PROCHOT_L AW37 PROCHOT_L Differential Routing F_PAD_X F_PAD_X F_PAD_X F_PAD_X
DPLUS BC43
CTF AV37 CTF DMINUS BC42 REMOVE lm96163
J19
J16 FM5 FM6 FM7 FM8
2 GPU_PWRBRK# AR39 PWRBRKB 3 1
IN FAN_IN_ASIC
FANIN BF46 32 33 4 2
FAN_OUT
AT38 TEMPIN FANOUT BE45 32
impedence
X_PIN1*2
OPT OPT OPT OPT
PUMPIN BE47 F_PAD_X F_PAD_X F_PAD_X F_PAD_X
UNNAMED_31_NAVI10T9C2_I14_PUMPOUT
AU39 TEMPINRETURN PUMPOUT BC46
Navi10 REV 0.91
R262
10K
5%
R341
10K
5%
00 M
0
RD 17 SI
(C 96 C
)2 7 ON
0
石 19 jo ID F
阿 09 ne EN +1.8V
+1.8V
鋒 05 pe TI
R4109
R4074 R4075 R4076 R4077 1K
10K 10K 10K 10K 5%
5% 5% 5% 5%
U1C
BP_0
BP_1
AT28 BP_0 symbol3 TCK AU9
AT27 BP_1 TMS AT11
BP_2
BP_3
AU27 BP_2 TDI AT10
AT26 AR10
01 i( AL
BP_3 TDO
TRST_L AU12
GPU_TESTEN
TESTEN AR9 GPU_DBREQ#
DBREQ_L AR12 33R HDT_DBREQ#
1 5% 2
R4115 R4108
R270
1
1 2 DIECRACKMON AT36 TEST6
1K
0R 5% 5% C4103
0.01uF
6.3V
Navi10 REV 0.91 10%
2
(0 裴
00 RM 亮
RADEON Lightbar header
68 A工樂
76 程 )
0) 課
00 M
0
RD 17 SI
(C 96 C
External Connector
)2 7 ON
+12V_EXT_A/B
0 F
JTAG/I2C
Debug
石 19 jo ID
Debug Header
TMD PA DP
POWER REGULATORS DBGDATA[7:0]

TMDPB
阿 09 ne EN
From +12V EXT_A/B
Regulator HOT
GPIO5
+VDDCR_GFX, VDDCR_SOC
PCC HDMI
GPIO4 TMDPC
From +12V EXT_B/+3.3AUX Straps GPIOs
鋒 05 pe TI
0.75V_S5 1.8V_S5
TMDPD
USB_5V VBUS_PWR_USBC0
BIOS ROM
From +12V_BUS TMDPE
01 i( AL
Thermal DP
Speed control DDCVGA
+MVDD, +VDDCI_MEM, FAN
& temperature INTER R U PT
PROCHOT_L
TMDPF
FAN sense Temp. Sensing D+/D- DP
From +12V_BUS
FAN_OUT
(0
Built-in PWM
裴
+5V +5V_VESA FAN_IN
SVI2/I2C/Power Management
00 RM 亮
From +3.3V Direct:
POWER DELIVERY
VDDRN_33, +VPP
1.8V, 0.75V
68 A工樂
100MHz
REFCLK Clock
Temperature Critical
CTF
76 )
PCI-Express
Power Sequencing
程
and Control Circuit
0)
+3.3V_BUS
PCI-Express Bus
課
+12V_BUS
NAVI10 CR
Firmware Programming
00
Debug 5V_LED
J12
1
2
M
GND
SMDAT3 3
+3.3V_BUS
SMCLK3 4
0
5
+3.3V_BUS +3.3V_BUS
RD 17 SI
H1X5 GND GND
Near Vin of MCU
DNI
XXXV336D015
N31-1050161-H06
U630
47
46
45
44
43
42
41
40
37
39
49
48
38
C2088 C2089 C2085 C2086 C2087
PWM15/GSW7/TACH1/GPB7
PWM14/GSW6/TACH0/GPB6
PWM9/GSW1/GPB1
PWM8/GSW0/GPB0
SSCE1#/PWM7/GPA7
PWM13/GSW5/GPB5
PWM12/GSW4/GPB4
PWM11/GSW3/GPB3
PWM10/GSW2/GPB2
VSTBY33-4
VSS-3
VSS-2
GND
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
+3.3V_BUS 16V 16V 16V 16V 16V
(C 96 C
10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R
CAP1005 CAP1005 CAP1005 CAP1005 CAP1005
COMMON COMMON COMMON COMMON COMMON
VVVV336D015 VVVV336D015 VVVV336D015
C11-1042542-T04C11-1042542-T04 C11-1042542-T04
R252 R251 33 OUT
DDCVGACLK R4058 0 VVVV336D015 SMCLK2 1 VVVV336D015 VVVV336D015
COMMONR11-0000012-W08 SMCLK0/GPC0
10K
5%
10K
5%
36 C11-1042542-T04 C11-1042542-T04
)2 7 ON
SMOSI1/PWM6/GPA6
33 BI
DDCVGADATA R4059 0 VVVV336D015 SMDAT2 2 +3.3V_BUS
SMDAT0/GPC1
DDCVGACLK
IN 3
COMMONR11-0000012-W08 35 GND
SSCK1/PWM5/GPA5
DDCVGADATA
BI 3 SMCLK3 3 R4062 +3.3V_BUS
SMCLK1/GPC2
GLK1/SMISO1/PWM4/GPA4
34 10k
0402
SMDAT3 4 5%
R4063 +3.3V_BUS
SMDAT1/GPC3 LED_C
F
COMMON
33 10k
0
SSCE0#/PWM3/GPA3 XXXV336D015 0402
5
TXD/GPC4 SDI_A
5%
(Not) R4064
it8295 SMOSI0/PWM2/GPA2
32 COMMON
10k
XXXV336D015
石 19 jo ID
0402
+3.3V_BUS +3.3V_BUS 6 5%
LED_A
+3.3V_BUS
RXD/GPC5
SSCK0/PWM1/GPA1
31 LED_A COMMON
XXXV336D015 5V_LED LED_B 5V_LED
7
R4065 VSTBY33
100k GLK0/SMISO0/PWM0/GPA0
30 (Not)
5%
C2083 0.1uF J13
1 216V VCOREB2 8 +3.3V_BUS
6
0402 GND X7R VCOREB2
29 LED_A J14
阿 09 ne EN
6
COMMON 0402 4
R4060 R4061 VSTBY33-3
R11-0104T22-R01 C11-1042542-T04COMMON SDI_A
2.2k 2.2k 10% 3 4
WRST# 9
2 3
5% 5% WRST#
28
0402 0402 GPD0 1 2
COMMON COMMON
+3.3V_BUS 1
R11-0222012-W08 C2084 10
VSS
SMCLK3 R11-0222012-W08 27 N32-1040FW0-H06
5
C1u6.3X50402-HF VSTBY33-2
BH1X4HS-1.25PITCH_NATURAL-RH
5
SMDAT3 C11-1057612-M09 11 N32-1040FW0-H06
鋒 05 pe TI
GPE0
26 BH1X4HS-1.25PITCH_NATURAL-RH
GPG0
12
GPE1
25
GPF7
VSTBY33-1
GND
VCOREB
GND
VSS-1
GPE2
GPE3
GPE4
GPE5
GPF4
GPF5
GPF6
DM
DP
GND
01 i( AL 13
14
15
16
17
18
19
20
21
22
23
24
B07-8295F0C-I15
VCOREB
VVVV336D015 +3.3V_BUS
GND
(0
C2090
1
0.1uF
裴
16V
10%
X7R
2
0402
COMMON
C11-1042542-T04
VVVV336D015
00 RM 亮
GND
+12V_EXT_A
5V_LED
68 A工樂
C2069 C2080
0.1uF 10uF
16V 16V
10% 20%
X7R X6S U629
0402 0805 MP1475DJ
76
COMMON COMMON 0.807V
VVVV3603303 VVVV3603303 SOT23_8
)
+3.3V_BUS C11-1042542-T04 COMMON
C11-1067534-T04 LED_5V_SW_BOOTR4052 20ohm LED_5V_SW_BOOT_R
GND GND 2 VIN BOOT 5 0402 5 % COMMON
程
VVVV3603303 C2071
R4049 1k LED_5V_ENABLE R11-0200012-W08 0.1uF
6 EN/FSYNC 16V
0402 5 % COMMON 5V_LED
10%
VVVV3603303 X7R
R11-0102032-W08 LED__5V_SW_VCC LED_5V_SW_PHASE L605 5uH 3A/78mOhm
0)
7 VCC SW 3 0402
COMMON SMD_5X5 COMMON
C2082 C2075 C2070 R4050 VVVV3603303 VVVV3603303
0.100
1nF 0.1uF 0.1uF 100k LED_5V_SW_ISET C11-1042542-T04 L04-0507010-L65 C2073 C2072 C2074
1 MOD/PG
50V 16V 16V 1% 22uF 22uF 0.1uF
課
10% 10% 10% 0402
4 LED_5V_SW_FB R4053 16.5kLED_5V_SW_FB_R 6.3V 6.3V 16V
X7R X7R X7R COMMON GND FB 8 20% 20% 10%
0402 0402 0402 VVVV3603303 0402 1 % COMMON VVVV3603303 X6S X6S X7R
COMMON COMMON COMMON R11-0104T22-R01 VVVV3603303 VVVV3603303 C2081 15pF C11-1501012-W08 0805 0805 0402
VVVV3603303 VVVV3603303 VVVV3603303 I9C-P147519-M03 R11-1652T12-W08 0402 50V COMMON COMMON COMMON COMMON
C0G
GND C11-1022012-S02
GND C11-1042542-T04
GND C11-1042542-T04
2% VVVV3603303 VVVV3603303 VVVV3603303
R4051 R4055 40.2k LED_5V_SW_FB_SENSE
R4056 0ohm C11-226A314-M09 C11-226A314-M09 C11-1042542-T04
11.3k
0402 1 % COMMON 04020.05 ohm
COMMON
1% R4054 VVVV3603303 VVVV3603303
0402 7.68k R11-4022T12-R01 R11-0000012-W08
DNI GND
1% R4057 0ohm
XXXV3603303
0402
<New PN> COMMON 04020.05 ohm
DNI
VVVV3603303 XXXV3603303
R11-7681T12-R01 <New PN>
GND
GND
+12V_EXT_B
1
1
+
C4242 C4230 C4240 C4229 C4237 C4236
C4273 10uF 10uF 10uF 10uF 1uF 0.1uF
16V 16V 16V 16V 25V 16V
CD270u16SO-HF-8
2
2
C_P2_5_D6_3_H9 C0805_67 C0805_67
00
1 R4255 2
L507
2.2R
GFX_PH4A
1 2
4A_VCIN
U2704
29
10
11
M
8
9
R4254
10K 1 2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
R4265
4A_BOOT
0
BOOT 5 1R
5%
4A_ZCD_EN
C4224
RD 17 SI
4A_BP
2 ZCD_EN* PHASE 7 4A_PHASE 1 2
0.22uF 25V
DNI SW1 16
R4258 SW2 17
+3.3V_BUS 10K 18
SW3
SW4 19
20 R4256
SW5 2.2R
SW6 21
(C 96 C
GFX_PWM4A 1 22
DNI
PWM SW7
R4268 23
4A_SWRC
0R SW8 DNI R4266
1
1% 24 0R
SW9
25 C4222
SW10
R11-0000012-W08 U2706 26 1000pF
DNI SW11
50V
1
3 8 GFX_PWM4A
2
VCC PWM1 6 4A_GH DNI
2
C4227 R4253 C4232 SiC620ArCD GH

10K 4.7uF
)2 7 ON
C4221 2 1 2 6.3V
0.22uF 16V V1P8 GFX_PWM4B GL1 27
C11-2242633-W08 7
1
0.47uF PWM2 DNI
16 GFX_PWM4 1
IN PWM_IN 33
1
16V R4270 GL2 C4225 R4263

4.7uF 10K
C11-4742023-W08 4 6 6.3V
+3.3V_BUS FUNCTION PWM3
R11-0000012-W08 4A_GFX_THWN
2
THWN 30
1%
0R
9 5
GND PWM4 GFX_DIS_N 20 19 18 17 31
F
16 OUT DSBL_N
0
R3599MTRPBF_DFN8-RH
1
I32-3599M0C-I08
1
DNI SP53 NS2009
石 19 jo ID
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
GND XXXV30701S
NC508
0.01uF
25V CISEN_4_R1
2
2
4
32
12
13
14
15
28
要
放靠近 P WM
ER1188
3.32K/4
R11-3321T12-W08
阿 09 ne EN
EC1515
colay 302045 GFX_I4_N
OUT 16
0.22u/16V/04
C11-2242512-M09 GFX_I4_P 16
GFX_THWN OUT
17,18,19,20 1DNI R4290 2
OUT
0R
5%
+12V_EXT_B ER1189
鋒 05 pe TI
3.32K/4
R11-3321T12-W08
CISEN_4_R2
1
1
1
+
C4233 C4226 C4238 C4231 C4228 C4234 SP54 NS2008

C4274 10uF 10uF 10uF 10uF 1uF 0.1uF
16V 16V 16V 16V 25V 16V XXXV30701S
CD270u16SO-HF-8
2
2
C_P2_5_D6_3_H9 C0805_67 C0805_67
01 i( AL
1 R4259 2
L508
2.2R
GFX_PH4B 1 2
4B_VCIN
U2705
29
10
11
3
8
9
R4267
10K 1 2
VDRV
VCIN
VIN1
VIN2
VIN3
VIN4
R4269
4B_BOOT
BOOT 5 1R
(0
5%
4B_ZCD_EN
C4239 4B_BP
2 7 4B_PHASE 1 2
裴
ZCD_EN* PHASE
0.22uF 25V
DNI SW1 16
R4262 SW2 17
10K 18
SW3
SW4 19
00 RM 亮
20 R4264
SW5 2.2R
SW6 21
GFX_PWM4B 1 22
DNI
PWM SW7
23
4B_SWRC
SW8 DNI R4257
1
24 0R
SW9
25 C4235
SW10
DNI SW11 26 1000pF
50V
1
68 A工樂
6 4B_GH DNI
10K 4.7uF
6.3V
GL1 27
2
1
DNI
GL2 33 C4220 R4260
4.7uF 10K
6.3V
4B_GFX_THWN
2
THWN 30
76
16 GFX_DIS_N 20 19 18 17 31 DSBL_N
OUT
程 )
1
DNI
CGND1
CGND2
PGND1
PGND2
PGND3
PGND4
PGND5
NC509
0.01uF
25V
0)
2
4
32
12
13
14
15
28
課
colay 302045
GFX_THWN 1DNI R4291 2

17,18,19,20 OUT
0R
5%
00 M
0
RD 17 SI
(C 96 C
)2 7 ON
0
石 19 jo ID F
阿 09 ne EN
鋒 05 pe TI
01 i( AL
(0 裴
00 RM 亮
68 A工樂
76 程 )
0) 課
NAVI 10 MEM INTERFACE CH C/D
00 M
0
RD 17 SI
(C 96 C
U1O
U1N symbol 15 10
symbol 14
DQD0_<0> C42 DQD0_0 DQD1_0 H36 6 DQD1_<0> 0
DQC0_<0> DQC1_<0> DQD0_<0> 4
DQD0_<1> DQD1_<1> 4 DQD1_<0>
T47 DQC0_0 DQC1_0 T41 D41 DQD0_1 10
6
DQD1_1 E35 1
DQC0_<0> 4
DQC0_<1> DQC1_<1> 4 DQC1_<0> DQD0_<1> 4
DQD0_<2> DQD1_<2> 4 DQD1_<1>
P46 DQC0_1 DQC1_110
6 P42 B41 DQD0_2 10
6
DQD1_2 G35 2
DQC0_<1> 4
DQC0_<2> DQC1_<2> 4 DQC1_<1> DQD0_<2> 4
DQD0_<3> DQD1_<3> 4 DQD1_<2>
P44 DQC0_2 DQC1_210
6 P40 A40 DQD0_3 10
6
DQD1_3 F34 3
DQC0_<2> 4
DQC0_<3> DQC1_<3> 4 DQC1_<2> DQD0_<3> 4
DQD0_<4> DQD1_<4> 4 DQD1_<3>
N45 DQC0_3 DQC1_310
6 N43 B38 DQD0_4 10
6
DQD1_4 G32 4
DQC0_<3> 4
DQC0_<4> DQC1_<4> 4 DQC1_<3> DQD0_<4> 4
DQD0_<5> DQD1_<5> 4 DQD1_<4>
)2 7 ON
M44 DQC0_4 DQC1_410
6 M40 A37 DQD0_5 10
6
DQD1_5 H31 5
DQC0_<4> 4
DQC0_<5> DQC1_<5> 4 DQC1_<4> DQD0_<5> 4
DQD0_<6> DQD1_<6> 4 DQD1_<5>
L45 DQC0_5 DQC1_510
6 L43 C37 DQD0_6 10
6
DQD1_6 F31 6
DQC0_<5> 4
DQC0_<6> DQC1_<6> 4 DQC1_<5> DQD0_<6> 4
DQD0_<7> DQD1_<7> 4 DQD1_<6>
L47 DQC0_6 DQC1_610
6 L41 D36 DQD0_7 10
6
DQD1_7 E30 7
DQC0_<6> 4
DQC0_<7> DQC1_<7> 4 DQC1_<6> DQD0_<7> 4
DQD0_<8> DQD1_<8> 4 DQD1_<7>
K46 DQC0_7 DQC1_710
6 K40 B34 DQD0_8 10
6
DQD1_8 E28 8
DQC0_<7> 4
DQC0_<8> DQC1_<8> 4 DQC1_<7> DQD0_<8> 4
DQD0_<9> DQD1_<9> 4 DQD1_<8>
G44 DQC0_8 DQC1_810
6 F43 A32 DQD0_9 10
6
DQD1_9 C28 9
DQC0_<8> 4
DQC0_<9> DQC1_<9> 4 DQC1_<8> DQD0_<9> 4
DQD0_<10> DQD1_<10> 4 DQD1_<9>
F45 DQC0_9 DQC1_910
6 E42 C32 DQD0_10 10
6
DQD1_10 D27 10
DQC0_<9> 4
DQC0_<10> DQC1_<10> 4 DQC1_<9> DQD0_<10> 4
DQD0_<11> DQD1_<11> 4 DQD1_<10>
F47 DQC0_10 DQC1_1010
6 F41 D31 DQD0_11 10
6
DQD1_11 H27 11
DQC0_<10> 4
DQC0_<11> DQC1_<11> 4 DQC1_<10> DQD0_<11> 4
DQD0_<12> DQD1_<12> 4 DQD1_<11>
E46 DQC0_11 DQC1_1110
6 G40 C30 DQD0_12 10
6
DQD1_12 G26 12
DQC0_<11> 4
DQC0_<12> DQC1_<12> 4 DQC1_<11> DQD0_<12> 4
DQD0_<13> DQD1_<13> 4 DQD1_<12>
F
B46 DQC0_12 DQC1_1210
6 H38 D29 DQD0_13 10
6
DQD1_13 E26 13
4 DQC1_<13> 4 4 4
0
DQC0_<12> DQC0_<13> A45 E37
DQC1_<12> DQD0_<13> DQD0_<14> B29 C26 DQD1_<14> DQD1_<13>
DQC0_13 DQC1_1310
6 DQD0_14 10
6
DQD1_14 14
DQC0_<13> 4
DQC0_<14> DQC1_<14> 4 DQC1_<13> DQD0_<14> 4
DQD0_<15> DQD1_<15> 4 DQD1_<14>
B43 DQC0_14 DQC1_1410
6 G37 A28 DQD0_15 10
6
DQD1_15 A26 15
DQC0_<14> 4
DQC0_<15> DQC1_<15> 4 DQC1_<14> DQD0_<15> 4 4 DQD1_<15>
A42 DQC0_15 DQC1_1510
6 F36
DQC0_<15> 4 4 DQC1_<15>
石 19 jo ID
M32 CAD0_0 CAD1_0 K31
3 CAD0_<0> CAD1_<0> 3
U34 CAC0_0 CAC1_0 U38 0 1 P27 CAD0_1 10
6
CAD1_1 K26 1
3 CAC0_<0> CAC1_<0> 3 3 CAD0_<1> CAD1_<1> 3
1 L36 CAC0_1 CAC1_110
6 K34 1 2 P31 CAD0_2 10
6
CAD1_2 L31 2
3 CAC0_<1> CAC1_<1> 3 3 CAD0_<2> CAD1_<2> 3
2 T36 CAC0_2 CAC1_210
6 U37 2 3 M26 CAD0_3 10
6
CAD1_3 J26 3
3 CAC0_<2> CAC1_<2> 3 3 CAD0_<3> CAD1_<3> 3
3 J37 CAC0_3 CAC1_310
6 L34 3 4 N31 CAD0_4 10
6
CAD1_4 K29 4
3 CAC0_<3> CAC1_<3> 3 3 CAD0_<4> CAD1_<4> 3
4 T35 CAC0_4 CAC1_410
6 N39 4 5 N28 CAD0_5 10
6
CAD1_5 K28 5
3 CAC0_<4> CAC1_<4> 3 3 CAD0_<5> CAD1_<5> 3
5 M37 CAC0_5 CAC1_510
6 N34 5 6 N26 CAD0_6 10
6
CAD1_6 L27 6
3 CAC0_<5> CAC1_<5> 3 3 CAD0_<6> CAD1_<6> 3
6 K36 CAC0_6 CAC1_610
6 J35 6 7 M28 CAD0_7 10
6
CAD1_7 K27 7
3 CAC0_<6> CAC1_<6> 3 3 CAD0_<7> CAD1_<7> 3
7 M38 CAC1_710 K35 7 8 N30 10 L29 8
阿 09 ne EN
CAC0_7 6 CAD0_8 6
CAD1_8
3 CAC0_<7> CAC1_<7> 3 3 CAD0_<8> CAD1_<8> 3
8 P37 CAC0_8 CAC1_810
6 P38 8 9 N32 CAD0_9 10
6
CAD1_9 K30 9
3 CAC0_<8> CAC1_<8> 3 3 CAD0_<9> CAD1_<9> 3
9 U35 CAC0_9 CAC1_910
6 T38 9
3 CAC0_<9> CAC1_<9> 3
10 WCKD0_0 A35 WCKD0_0 WCKD1_0 H29 WCKD1_0 10
BI BI
10 WCKC0_0 H45 WCKC0_0 WCKC1_0 H43 WCKC1_0 10 10 WCKD0B_0 B36 WCKD0B_0 WCKD1B_0 G30 WCKD1B_0 10
BI BI BI BI
10 WCKC0B_0 K44 WCKC0B_0 WCKC1B_0 K42 WCKC1B_0 10
BI BI
10 WCKD0_1 C35 WCKD0_1 WCKD1_1 F29 WCKD1_1 10
BI BI
10 WCKC0_1 H47 WCKC0_1 WCKC1_1 H41 WCKC1_1 10 10 WCKD0B_1 D34 WCKD0B_1 WCKD1B_1 G28 WCKD1B_1 10
BI BI BI BI
WCKC0B_1 G46 WCKC0B_1 G42 WCKC1B_1
鋒 05 pe TI
10 WCKC1B_1 10
BI BI
10 EDCD0_0 D38 EDCD0_0 EDCD1_0 H34 EDCD1_0 10
BI BI
10 EDCC0_0 M46 EDCC0_0 EDCC1_0 N41 EDCC1_0 10 10 EDCD0_1 B31 EDCD0_1 EDCD1_1 B27 EDCD1_1 10
BI BI BI BI
10 EDCC0_1 C47 EDCC0_1 EDCC1_1 F38 EDCC1_1 10
BI BI
10 DBID0_0 C40 DBID0_0 DBID1_0 E32 DBID1_0 10
BI BI
10 DBIC0_0 N47 DBIC0_0 DBIC1_0 M42 DBIC1_0 10 10 DBID0_1 A30 DBID0_1 DBID1_1 F27 DBID1_1 10
BI BI BI BI
10 DBIC0_1 C45 DBIC0_1 DBIC1_1 E40 DBIC1_1 10
BI BI
10 CABID0 M30 CABID0 CABID1 J30 CABID1 10
OUT OUT
10 CABIC0 P35 CABIC0 CABIC1 T39 CABIC1 10
OUT OUT
01 i( AL
10 CKED0 N27 CKED0 CKED1 J28 CKED1 10
OUT OUT
10 CKEC0 L39 CKEC0 CKEC1 M35 CKEC1 10
OUT OUT
10 CKD P29 CKD
OUT
10 CKC N36 CKC 10 CKDB N29 CKDB
OUT +VDD_MEM OUT
10 CKCB N37 CKCB
OUT
R3623 MEM_CALRC
1% 2
118R 1 W33 MEM_CALR_0
R3615
(0
40.2R
1% R3618 49.9R 1% R3619 10R 1%
DRAM_RSTD
2 1 UNNAMED_6_CAP_I68_A 2 1 J32
裴
R3612 1% 49.9R R3613 1% 10R 10 DRAM_RSTB_D DRAM_RSTD
DRAM_RSTC
MVREFDC
OUT
10 DRAM_RSTB_C 2 1 UNNAMED_6_CAP_I5_A 2 1 V38 DRAM_RSTC MVREFD_0 V33
OUT
1
1
1
C3606 R3620
120pF 5.1K
C3604 R3614 C3605 R3616 50V 1%
120pF 5.1K 1uF 100R 5% Navi10 REV 0.91
50V 1% 6.3V 1%
2
5% Navi10 REV 0.91 10%
00 RM 亮
2
68 A工樂
76 程 )
0) 課
AMD - PLATFORM HARDWARE ENG
#48, No.1387, ZHANGDONG ROAD
SHANGHAI, CHINA 201203
SHEET: NAVI10 MEM CHCD
Mon Apr 15 05:57:57 2019 1.00

CONFIDENTIAL AND PROPRIETARY TO ADVANCED MICRO DEVICES INC.
C 2018 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD, and
is provided only to entities under a non-disclosure agreement with AMD
for evaluation purposes. Further distribution or disclosure is strictly

prohibited. Use of this schematic and design for any purpose other than
evaluation requires a Board Technology License Agreement with AMD.

AMD makes no representations or warranties of any kind regarding this
schematic and design, including, not limited to, any implied warranty
of merchantability or fitness for a particular purpose, and disclaims
responsibility for any consequences resulting from use of the

DATE: REV:
information included herein.
SHEET NUMBER: 6 OF 35 TITLE:
NAVI10 G6X16Mode DP DP HDMI DP

DOCUMENT NUMBER: 105_D199xx_00A
NOTES: NOTE
NAVI 10 MEM INTERFACE CH E/F
00 M
0
RD 17 SI
(C 96 C
U1P
U1Q
symbol 16 symbol 17
0 0
DQE0_<0> A20 DQE0_0 DQE1_0 A22
0
DQE1_<0> 0
DQF0_<0> A6 DQF0_0 DQF1_0 F12 DQF1_<0>
6 DQE0_<0> DQE0_<1> DQE1_<1> DQE1_<0> 6 6 DQF0_<0> DQF0_<1> B5 DQF1_<1> DQF1_<0> 6
1 1 B19 DQE0_1 7
11
DQE1_1 C22
1 1
DQF0_1 7
11
DQF1_1 G11
6 DQE0_<1> DQE0_<2> DQE1_<2> DQE1_<1> 6 6 DQF0_<1> DQF0_<2> A3 DQF1_<2> DQF1_<1> 6
2 2 D19 DQE0_2 7
11
DQE1_2 E22
2 2
DQF0_2 7
11
DQF1_2 E11
6 DQE0_<2> DQE0_<3> DQE1_<3> DQE1_<2> 6 6 DQF0_<2> DQF0_<3> B2 DQF1_<3> DQF1_<2> 6
3 3 C18 DQE0_3 7
11
DQE1_3 G22
3 3
DQF0_3 7
11
DQF1_3 H10
6 DQE0_<3> DQE0_<4> DQE1_<4> DQE1_<3> 6 6 DQF0_<3> DQF0_<4> E2 DQF1_<4> DQF1_<3> 6
)2 7 ON
4 4 D17 DQE0_4 7
11
DQE1_4 H21
4 4
DQF0_4 7
11
DQF1_4 G8
6 DQE0_<4> DQE0_<5> DQE1_<5> DQE1_<4> 6 6 DQF0_<4> DQF0_<5> F1 DQF1_<5> DQF1_<4> 6
5 5 C16 DQE0_5 7
11
DQE1_5 D21
5 5
DQF0_5 7
11
DQF1_5 F7
6 DQE0_<5> DQE0_<6> DQE1_<6> DQE1_<5> 6 6 DQF0_<5> DQF0_<6> F3 DQF1_<6> DQF1_<5> 6
6 6 A16 DQE0_6 7
11
DQE1_6 C20
6 6
DQF0_6 7
11
DQF1_6 E6
6 DQE0_<6> DQE0_<7> DQE1_<7> DQE1_<6> 6 6 DQF0_<6> DQF0_<7> G4 DQF1_<7> DQF1_<6> 6
7 7 B14 DQE0_7 7
11
DQE1_7 E20
7 7
DQF0_7 7
11
DQF1_7 F5
6 DQE0_<7> DQE0_<8> DQE1_<8> DQE1_<7> 6 6 DQF0_<7> DQF0_<8> K2 DQF1_<8> DQF1_<7> 6
8 8 D12 DQE0_8 7
11
DQE1_8 E18
8 8
DQF0_8 7
11
DQF1_8 K8
6 DQE0_<8> DQE0_<9> DQE1_<9> DQE1_<8> 6 6 DQF0_<8> DQF0_<9> L1 DQF1_<9> DQF1_<8> 6
9 9 C11 DQE0_9 7
11
DQE1_9 F17
9 9
DQF0_9 7
11
DQF1_9 L7
6 DQE0_<9> DQE0_<10> DQE1_<10> DQE1_<9> 6 6 DQF0_<9> DQF0_<10> L3 DQF1_<10> DQF1_<9> 6
10 10 A11 DQE0_10 7
11
DQE1_10 H17
10 10
DQF0_10 7
11
DQF1_10 L5 10
6 DQE0_<10> DQE0_<11> DQE1_<11> DQE1_<10> 6 6 DQF0_<10> DQF0_<11> M4 DQF1_<11> DQF1_<10> 6
11 11 B10 DQE0_11 7
11
DQE1_11 G16
11 11
DQF0_11 7
11
DQF1_11 M8 11
6 DQE0_<11> DQE0_<12> DQE1_<12> DQE1_<11> 6 6 DQF0_<11> DQF0_<12> N3 DQF1_<12> DQF1_<11> 6
F
12 12 A8 DQE0_12 7
11
DQE1_12 F14
12 12
DQF0_12 7
11
DQF1_12 N5 12
6 6 6 6
0
DQE0_<12> 13 13
DQE0_<13> B7 7
11 G13
13
DQE1_<13> DQE1_<12> DQF0_<12> 13
DQF0_<13> P4 7
11 P8 13
DQF1_<13> DQF1_<12>
DQE0_13 DQE1_13 DQF0_13 DQF1_13
6 DQE0_<13> DQE0_<14> DQE1_<14> DQE1_<13> 6 6 DQF0_<13> DQF0_<14> P2 DQF1_<14> DQF1_<13> 6
14 14 D7 DQE0_14 7
11
DQE1_14 E13
14 14
DQF0_14 7
11
DQF1_14 P6 14
6 DQE0_<14> DQE0_<15> DQE1_<15> DQE1_<14> 6 6 DQF0_<14> DQF0_<15> T1 DQF1_<15> DQF1_<14> 6
15 15 C6 DQE0_15 7
11
DQE1_15 H12
15 15
DQF0_15 7
11
DQF1_15 T7 15
6 DQE0_<15> DQE1_<15> 6 6 DQF0_<15> DQF1_<15> 6
石 19 jo ID
M16 CAE0_0 CAE1_0 K17 U14 CAF0_0 CAF1_0 U10
3 CAE0_<0> CAE1_<0> 3 3 CAF0_<0> CAF1_<0> 3
1 P21 CAE0_1 7
11
CAE1_1 K22 1 1 L12 CAF0_1 7
11
CAF1_1 K14 1
3 CAE0_<1> CAE1_<1> 3 3 CAF0_<1> CAF1_<1> 3
2 P17 CAE0_2 7
11
CAE1_2 L17 2 2 T12 CAF0_2 7
11
CAF1_2 U11 2
3 CAE0_<2> CAE1_<2> 3 3 CAF0_<2> CAF1_<2> 3
3 M22 CAE0_3 7
11
CAE1_3 J22 3 3 J11 CAF0_3 7
11
CAF1_3 L14 3
3 CAE0_<3> CAE1_<3> 3 3 CAF0_<3> CAF1_<3> 3
4 N17 CAE0_4 7
11
CAE1_4 K19 4 4 T13 CAF0_4 7
11
CAF1_4 N9 4
3 CAE0_<4> CAE1_<4> 3 3 CAF0_<4> CAF1_<4> 3
5 N20 CAE0_5 7
11
CAE1_5 K20 5 5 M11 CAF0_5 7
11
CAF1_5 N14 5
3 CAE0_<5> CAE1_<5> 3 3 CAF0_<5> CAF1_<5> 3
6 N22 CAE0_6 7
11
CAE1_6 L21 6 6 K12 CAF0_6 7
11
CAF1_6 J13 6
3 CAE0_<6> CAE1_<6> 3 3 CAF0_<6> CAF1_<6> 3
7 M20 K21 7 7 M10 K13 7
阿 09 ne EN
CAE0_7 7
11
CAE1_7 CAF0_7 7
11
CAF1_7
3 CAE0_<7> CAE1_<7> 3 3 CAF0_<7> CAF1_<7> 3
8 N18 CAE0_8 7
11
CAE1_8 L19 8 8 P11 CAF0_8 7
11
CAF1_8 P10 8
3 CAE0_<8> CAE1_<8> 3 3 CAF0_<8> CAF1_<8> 3
9 N16 CAE0_9 7
11
CAE1_9 K18 9 9 U13 CAF0_9 7
11
CAF1_9 T10 9
3 CAE0_<9> CAE1_<9> 3 3 CAF0_<9> CAF1_<9> 3
11 WCKE0_0 C13 WCKE0_0 WCKE1_0 F19 WCKE1_0 11 11 WCKF0_0 H1 WCKF0_0 WCKF1_0 H7 WCKF1_0 11
BI BI BI BI
11 WCKE0B_0 D14 WCKE0B_0 WCKE1B_0 G20 WCKE1B_0 11 11 WCKF0B_0 G2 WCKF0B_0 WCKF1B_0 G6 WCKF1B_0 11
BI BI BI BI
11 WCKE0_1 A13 WCKE0_1 WCKE1_1 H19 WCKE1_1 11 11 WCKF0_1 H3 WCKF0_1 WCKF1_1 H5 WCKF1_1 11
BI BI BI BI
WCKE0B_1 B12 WCKE0B_1 WCKE1B_1 G18 WCKE1B_1 WCKF0B_1 K4 K6 WCKF1B_1
鋒 05 pe TI
11 11 11 WCKF0B_1 WCKF1B_1 11
BI BI BI BI
11 EDCE0_0 B17 EDCE0_0 EDCE1_0 B21 EDCE1_0 11 11 EDCF0_0 C1 EDCF0_0 EDCF1_0 F10 EDCF1_0 11
BI BI BI BI
11 EDCE0_1 D10 EDCE0_1 EDCE1_1 H14 EDCE1_1 11 11 EDCF0_1 M2 EDCF0_1 EDCF1_1 N7 EDCF1_1 11
BI BI BI BI
11 DBIE0_0 A18 DBIE0_0 DBIE1_0 F21 DBIE1_0 11 11 DBIF0_0 C3 DBIF0_0 DBIF1_0 E8 DBIF1_0 11
BI BI BI BI
11 DBIE0_1 C8 DBIE0_1 DBIE1_1 E16 DBIE1_1 11 11 DBIF0_1 N1 DBIF0_1 DBIF1_1 M6 DBIF1_1 11
BI BI BI BI
11 CABIE0 M18 CABIE0 CABIE1 J18 CABIE1 11 11 CABIF0 P13 CABIF0 CABIF1 T9 CABIF1 11
OUT OUT OUT OUT
01 i( AL
11 CKEE0 N21 CKEE0 CKEE1 J20 CKEE1 11 11 CKEF0 L9 CKEF0 CKEF1 M13 CKEF1 11
OUT OUT OUT OUT
11 CKE P19 CKE 11 CKF N12 CKF

OUT OUT +VDD_MEM
11 CKEB N19 CKEB 11 CKFB N11 CKFB
OUT OUT
R3630 MEM_CALRF
1% 2
118R 1 W15 MEM_CALR_1
R3634
(0
40.2R
1%
裴
R3625 49.9R 1% R3626 10R 1% R3631 49.9R 1% R3632 10R 1%
DRAM_RSTE DRAM_RSTF
DRAM_RSTB_E 2 1 UNNAMED_7_CAP_I4_A 2 1 J16 DRAM_RSTE DRAM_RSTB_F 2 1 UNNAMED_7_CAP_I64_A 2 1 V10 DRAM_RSTF MVREFD_1 V15 MVREFDF
11 OUT 11 OUT
1
1
C3608 R3627 C3610 R3633 C3611 R3635
120pF 5.1K 120pF 5.1K 1uF 100R
50V 1% Navi10 REV 0.91 50V 1% Navi10 REV 0.91 6.3V 1%
5% 5% 10%
00 RM 亮
2
2
68 A工樂
76 程 )
0) 課
SHEET: NAVI10 MEM CHEF
Mon Apr 15 05:57:57 2019 1.00




DATE: REV:

NOTES: NOTE
NAVI 10 MEM INTERFACE CH G/H
00 M
0
RD 17 SI
8
8
(C 96 C
DQG0_<0>
DQG0_<1>
0
1
DQG0_<0>
DQG0_<1>
DQG0_<2>
T3
U4
DQG0_0
DQG0_1
U1R
symbol 18
DQG1_0
12
8
DQG1_1
T5
U8
DQG1_<0>
DQG1_<1>
DQG1_<2>
16
DQG1_<0>
DQG1_<1>
8
8 8 DQH0_<0>
0
DQH0_<0> AH1
DQH0_<1> AJ2
DQH0_0
U1S
symbol 19
DQH1_0 AH5 DQH1_<0>
DQH1_<1> DQH1_<0> 8
)2 7 ON
23
2 U2 DQG0_2 12
8
DQG1_2 U6 1
DQH0_1 12
8
DQH1_1 AJ8
8 DQG0_<2> DQG0_<3> DQG1_<3> 20
DQG1_<2> 8 8 DQH0_<1> DQH0_<2> AJ4 DQH1_<2> DQH1_<1> 8
3 V1 DQG0_3 12
8
DQG1_3 V7 2
DQH0_2 12
8
DQH1_2 AJ6
8 DQG0_<3> DQG0_<4> DQG1_<4> 22
DQG1_<3> 8 8 DQH0_<2> DQH0_<3> AK3 DQH1_<3> DQH1_<2> 8
4 W2 DQG0_4 12
8
DQG1_4 W6 3
DQH0_3 12
8
DQH1_3 AK7
8 DQG0_<4> DQG0_<5> DQG1_<5> 19
DQG1_<4> 8 8 DQH0_<3> DQH0_<4> AL4 DQH1_<4> DQH1_<3> 8
5 Y1 DQG0_5 12
8
DQG1_5 Y7 4
DQH0_4 12
8
DQH1_4 AL6
8 DQG0_<5> DQG0_<6> DQG1_<6> 21
DQG1_<5> 8 8 DQH0_<4> DQH0_<5> AM3 DQH1_<5> DQH1_<4> 8
6 Y3 DQG0_6 12
8
DQG1_6 Y5 5
DQH0_5 12
8
DQH1_5 AM7
8 DQG0_<6> DQG0_<7> DQG1_<7> 17
DQG1_<6> 8 8 DQH0_<5> DQH0_<6> AM1 DQH1_<6> DQH1_<5> 8
7 AA4 DQG0_7 12
8
DQG1_7 AA8 6
DQH0_6 12
8
DQH1_6 AM5
8 DQG0_<7> DQG0_<8> DQG1_<8> 18
DQG1_<7> 8 8 DQH0_<6> DQH0_<7> AP2 DQH1_<7> DQH1_<6> 8
8 AC2 DQG0_8 12
8
DQG1_8 AC8 7
DQH0_7 12
8
DQH1_7 AP8
8 DQG0_<8> DQG0_<9> DQG1_<9> 27
DQG1_<8> 8 8 DQH0_<7> DQH0_<8> AT4 DQH1_<8> DQH1_<7> 8
9 AD1 DQG0_9 12
8
DQG1_9 AD7 8
DQH0_8 12
8
DQH1_8 AT8
8 DQG0_<9> DQG0_<10> DQG1_<10> 25
DQG1_<9> 8 8 DQH0_<8> DQH0_<9> AU3 DQH1_<9> DQH1_<8> 8
F
10 AD3 DQG0_10 12
8
DQG1_10 AD5 9
DQH0_9 12
8
DQH1_9 AU7
8 8 8 8
0
DQG0_<10> 11
DQG0_<11> AE2 12
8 AE8 DQG1_<11> 29
DQG1_<10> DQH0_<9> 10
DQH0_<10>AU1 12
8 AU5 DQH1_<10> DQH1_<9>
DQG0_11 DQG1_11 DQH0_10 DQH1_10
8 DQG0_<11> DQG0_<12> DQG1_<12> 24
DQG1_<11> 8 8 DQH0_<10> DQH0_<11>AV2 DQH1_<11> DQH1_<10> 8
12 AF1 DQG0_12 12
8
DQG1_12 AF5 DQH0_11 12
8
DQH1_11 AV8
8 DQG0_<12> DQG0_<13> DQG1_<13> 28
DQG1_<12> 8 8 DQH0_<11> DQH0_<12>AY1 DQH1_<12> DQH1_<11> 8
13 AG2 DQG0_13 12
8
DQG1_13 AG6 DQH0_12 12
8
DQH1_12 AY7
8 DQG0_<13> DQG0_<14> DQG1_<14> 31
DQG1_<13> 8 8 DQH0_<12> DQH0_<13>BA2 DQH1_<13> DQH1_<12> 8
石 19 jo ID
14 AG4 DQG0_14 12
8
DQG1_14 AG8 13
DQH0_13 12
8
DQH1_13 BA6
8 DQG0_<14> DQG0_<15> DQG1_<15> 30
DQG1_<14> 8 8 DQH0_<13> DQH0_<14>BA4 DQH1_<14> DQH1_<13> 8
15 AH3 DQG0_15 12
8
DQG1_15 AH7 14
DQH0_14 12
8
DQH1_14 BB3
8 DQG0_<15> 26
DQG1_<15> 8 8 DQH0_<14> DQH0_<15>BB1 DQH1_<15> DQH1_<14> 8
15
DQH0_15 12
8
DQH1_15 BB5
8 DQH0_<15> DQH1_<15> 8
AD13 CAG0_0 CAG1_0 AD9
3 CAG0_<0> CAG1_<0> 3
1 W14 CAG0_1 12
8
CAG1_1 V9 1 AL14 CAH0_0 12 CAH1_0
8 AL10
3 CAG0_<1> CAG1_<1> 3 3 CAH0_<0> CAH1_<0> 3
2 AC13 CAG0_2 12 CAG1_2
8 AD10 2 1 AF12 CAH0_1 12 CAH1_1
8 AE11 1
3 CAG0_<2> CAG1_<2> 3 3 CAH0_<1> CAH1_<1> 3
3 V12 CAG0_3 12
8
CAG1_3 W11 3 2 AK12 CAH0_2 12 CAH1_2
8 AL11 2
3 CAG0_<3> CAG1_<3> 3 3 CAH0_<2> CAH1_<2> 3
4 AC14 CAG0_4 12
8
CAG1_4 AB9 4 3 AE14 CAH0_3 12
8
CAH1_3 AF9 3
3 CAG0_<4> CAG1_<4> 3 3 CAH0_<3> CAH1_<3> 3
5 Y13 12 Y9 5 4 AK13 12 CAH1_4 AJ10 4
阿 09 ne EN
CAG0_5 8
CAG1_5 CAH0_4 8
3 CAG0_<5> CAG1_<5> 3 3 CAH0_<4> CAH1_<4> 3
6 V13 CAG0_6 12
8
CAG1_6 W10 6 5 AG13 CAH0_5 12 CAH1_5
8 AG11 5
3 CAG0_<6> CAG1_<6> 3 3 CAH0_<5> CAH1_<5> 3
7 Y12 CAG0_7 12
8
CAG1_7 Y10 7 6 AE13 CAH0_6 12 CAH1_6
8 AF10 6
3 CAG0_<7> CAG1_<7> 3 3 CAH0_<6> CAH1_<6> 3
8 AB12 CAG0_8 12 CAG1_8
8 AB10 8 7 AG14 CAH0_7 12 CAH1_7
8 AG10 7
3 CAG0_<8> CAG1_<8> 3 3 CAH0_<7> CAH1_<7> 3
9 AD12 CAG0_9 12 CAG1_9
8 AC11 9 8 AJ13 CAH0_8 12 CAH1_8
8 AJ11 8
3 CAG0_<9> CAG1_<9> 3 3 CAH0_<8> CAH1_<8> 3
9 AL13 CAH0_9 12 CAH1_9
8 AK10 9
3 CAH0_<9> CAH1_<9> 3
12 WCKG0_0 AB1 WCKG0_0 WCKG1_0 AB7 WCKG1_0 12
BI BI
12 WCKG0B_0 AA2 WCKG0B_0 WCKG1B_0 AA6 WCKG1B_0 12 12 WCKH0_0 AR3 WCKH0_0 WCKH1_0 AR7 WCKH1_0 12
BI BI BI BI
WCKH0B_0 AP4 AP6 WCKH1B_0
鋒 05 pe TI
12 WCKH0B_0 WCKH1B_0 12
BI BI
12 WCKG0_1 AB3 WCKG0_1 WCKG1_1 AB5 WCKG1_1 12
BI BI
12 WCKG0B_1 AC4 WCKG0B_1 WCKG1B_1 AC6 WCKG1B_1 12 12 WCKH0_1 AR1 WCKH0_1 WCKH1_1 AR5 WCKH1_1 12
BI BI BI BI
12 WCKH0B_1 AT2 WCKH0B_1 WCKH1B_1 AT6 WCKH1B_1 12
BI BI
12 EDCG0_0 W4 EDCG0_0 EDCG1_0 V5 EDCG1_0 12
BI BI
12 EDCG0_1 AE4 EDCG0_1 EDCG1_1 AF7 EDCG1_1 12 12 DBIH0_0 AK1 DBIH0_0 DBIH1_0 AL8 DBIH1_0 12
BI BI BI BI
12 DBIH0_1 AY3 DBIH0_1 DBIH1_1 AV6 DBIH1_1 12
BI BI
12 DBIG0_0 V3 DBIG0_0 DBIG1_0 W8 DBIG1_0 12
BI BI
12 DBIG0_1 AF3 DBIG0_1 DBIG1_1 AE6 DBIG1_1 12 12 EDCH0_0 AL2 EDCH0_0 EDCH1_0 AK5 EDCH1_0 12
BI BI BI BI
01 i( AL
12 EDCH0_1 AV4 EDCH0_1 EDCH1_1 AY5 EDCH1_1 12
BI BI
12 CABIG0 AB13 CABIG0 CABIG1 AC10 CABIG1 12
OUT OUT
12 CABIH0 AJ14 CABIH0 CABIH1 AK9 CABIH1 12
OUT OUT
12 CKEG0 W13 CKEG0 CKEG1 AA10 CKEG1 12
OUT OUT
12 CKEH0 AF13 CKEH0 CKEH1 AH9 CKEH1 12
OUT OUT
12 CKG AA13 CKG
OUT
12 CKGB AA12 CKGB 12 CKH AH12 CKH
OUT OUT
12 CKHB AH13 CKHB
OUT
12 OUT
DRAM_RSTB_G
R3637
2
(0
49.9R 1%
裴
R3638
1 UNNAMED_8_CAP_I18_A 2
10R 1%
1
DRAM_RSTG
AE10 DRAM_RSTG
12 OUT
DRAM_RSTB_H
R3643
2
49.9R 1%
1 UNNAMED_8_CAP_I66_A
R3644
2
10R
1
1% DRAM_RSTH
AM9 DRAM_RSTH
1
1
C3615 R3639
00 RM 亮
120pF 5.1K
50V 1% C3613 R3645
5% Navi10 REV 0.91 120pF 5.1K
50V 1%
2
5% Navi10 REV 0.91
2
68 A工樂
76 程 )
0) 課
SHEET: NAVI10 MEM CHGH
Mon Apr 15 05:57:58 2019 1.00




DATE: REV:

NOTES: NOTE

V381 41 (2019090500017967) Decrypt

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V381 41 (2019090500017967) Decrypt

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00 M

1 TOC 26 SMALL RAIL REGULATORS

2 NAVI10 PCIe Interface 27 NAVI10 DECAPS

4 NAVI10 XTAL 29 NAVI10 GND

6 NAVI10 MEM CHCD 31 SVI2 & BAMACO

7 NAVI10 MEM CHEF 32 MECHANICAL & THERMAL

8 NAVI10 MEM CHGH 33 DEBUG

10 GDDR6 MEM CHCD 35 REVISION HISTORY

11 GDDR6 MEM CHEF

12 GDDR6 MEM CHGH

14 NAVI10 TMDPC - HDMI

16 GFX & SOC CONTROLLER

18 VDDCR_GFX PHASES 1 and 4

19 VDDCR_GFX PHASES 3 and 7

20 VDDCR_GFX PHASES 6 and VDDCR_SOC

PRELIMINARY AND SUBJECT TO CHANGE

30,25 +1.8V_EN R103 1 2 5% 1 4 PERST#_BUF 16,21,30,32

50V A45 GND

50V A70 GND

50V A82 GND

50V B21 GND PCIE_RX14P

device to internal bump.

Navi10 REV 0.91

PINSTRAP_0 AW22 PINSTRAP_0 symbol 2 GPIO_0 AU29

R4096 R4092 AT19 TEST_PG_S5 BL_ENABLE AP10

3 RP1A 1 8 33R 5 SI 1: Enable the external BIOS ROM device

C61 C62 C63 3 1 1

+1.8V (Verify rail)

XTRIG* are for debug purpose PLLCHARZ1_H AP38 PLLCHARZ1_H

00 RM 亮 Route 50 ohms single-ended/100 ohms diff

5 EDCA0_1 C13 T13 EDCA1_1 5 5 EDCB0_1 C13 T13 EDCB1_1 5

5 DBIA0_1 D13 R13 DBIA1_1 5 5 DBIB0_1 D13 R13 DBIB1_1 5

ZQ_A0 ZQ_A1 ZQ_B0 ZQ_B1

5 CKA J10 5 CKB J10

V14 U14 V14 U14

C2142 C2143 C2144 C2145 C2146

6 EDCC0_1 C13 T13 EDCC1_1 6 6 EDCD0_1 C13 T13 EDCD1_1 6

6 DBIC0_1 D13 R13 DBIC1_1 6 6 DBID0_1 D13 R13 DBID1_1 6

ZQ_C0 ZQ_C1 ZQ_D0 ZQ_D1

6 CKC J10 6 CKD J10

V14 U14 V14 U14

T11 A11 T11 A11

C2342 C2343 C2344 C2345 C2346

7 EDCE1_0 C13 T13 EDCE0_0 7 7 EDCF1_0 C13 T13 EDCF0_0 7

7 DBIE1_0 D13 R13 DBIE0_0 7 7 DBIF1_0 D13 R13 DBIF0_0 7

ZQ_E1 ZQ_E0 ZQ_F1 ZQ_F0

7 CKE J10 7 CKF J10

V14 U14 V14 U14

C2542 C2543 C2544 C2545 C2546

8 WCKG1_1 D4 WCK0_T_B/NC R4 WCKG0_1 8 8 WCKH1_1 D4 WCK0_T_B/NC R4 WCKH0_1 8

8 EDCG1_0 C13 T13 EDCG0_0 8 8 EDCH1_0 C13 T13 EDCH0_0 8

8 DBIG1_0 D13 R13 DBIG0_0 8 8 DBIH1_0 D13 R13 DBIH0_0 8

8 CABIG1 J5 CABI_N_A CABI_N_B K5 CABIG0 8 8 CABIH1 J5 CABI_N_A CABI_N_B K5 CABIH0 8

ZQ_G1 ZQ_G0 ZQ_H1 ZQ_H0

V14 VDD_12 VSS_52

C2742 C2743 C2744 C2745 C2746

PRELIMINARY AND SUBJECT TO CHANGE

USBC1_RXN1/USB_0_RXN1/TXCBM_DPB3N BG16 AY20 USB20_TXRTUNE USB21_TXRTUNE AT20

USB1_ZVSS USBC0_TXP1_TX0P_DPA2P C1805 DPA_2P

USB0_ZVSS USBC0_TXN1_TX0M_DPA2N C1806 DPA_2N

USBC0_RXP1_TXCAP_DPA3P C1807 DPA_3P

USBC0_RXN1_TXCAM_DPA3N C1808 DPA_3N

R1804 2 1 100K 5% +3.3V_DPA