TIME
* Medium scale integration
* TTL logic i.c.s
* Synchronous alarm
* Reset facility
digi - clock
* Nixie number tubes
TnE prices of all integrated circuits have fallen
considerably in the last year, and the most
dramatic drop of all has been in the price of digital
devices. The new low prices have brought even the
complex "medium scale integration" TTL circuits
into the ever widening sphere of amateur projects.
The digital clock described here makes full use of this
newly available technology.
The use of both discrete component logic circuitry
and RTL i.c.s in attempts to realise a practical clock
design proved to have their attendant disadvantages in
such a complex system. TTL provides the noise immunity
necessary to give reliable time keeping and opens up
the possibility of simplifying wiring further by using
it in the medium scale integration (MSI) form. (Detailed
articles on the functioning of TTL and MSI appear in
the current Logic ICs series.)
DESIGN FEATURES
As can be seen from the photographs in these pages,
the clock forms an attractive and useful item of
equipment for the home or office.
A Contil MOD -2 case is used to house the design,
and the display is provided by four gas -filled number
indicating "Nixie" tubes.
An alarm circuit is incorporated, the alarm time
being entered by means of thumb -wheel switches
which conveniently give an output directly in binary
coded decimal form.
The 50Hz from the mains supply is used to drive the
clock as this proves to be surprisingly constant in
practice, and quite capable of providing the accuracy
required. A crystal oscillator could be employed, but
it would require extra divider stages, and probably
temperature control to gain a significant increase in
accuracy.
The circuit employs a total of twenty dual -in -line
i.c. packages, fourteen MSI/TTL types, four SSI/TTL
types, and two integrated transistor arrays used in the
analogue circuitry. Only three discrete transistors and
a few diodes are used apart from the i.c.s in the counting
and timing circuits.
The logic circuitry is built entirely on two "Dualine"
i.c. cards, providing a neat layout and a considerable
simplification of the wiring up compared with the
perforated s.r.b.p. boards commonly used for such
projects. These i.c. cards have provision for either nine
or fifteen d.i.l. 14/16 pin packages with ground and
950
2 0
Vcc rails provided to each package position. Each i.c.
pin is provided with a two hole copper pad for wiring
up, and blank holes are available for the use of terminal
pins.
Either a single sided Olin 22 -way edge connector or
a 44 -way double -sided edge connector is provided on
each board, although in this design, to save the con-
siderable expense of sockets, solder terminations are
made to these edge contacts.
The circuit boards are mounted flat against the
chassis, spaced from it by about fin. The chassis is
earthed to act as a ground plane and also to provide
screening from the power supply components mounted
above.
The power requirements are +5V at up to I amp,
well regulated and filtered for the i.c.s, and 180V to
power the "Nixie" tubes.
A novel voltage regulator circuit, employing fold -
back current limiting, and built with an integrated
transistor array is used to supply the 5V required by the
logic circuitry. A simple Zener diode/emitter follower
combination provides the 180V supply for the "Nixies"
and decimal point indicator neon. A switch is provided
to allow the clock to be run at two fast speeds for
initial time setting.
SYSTEM OPERATION
A block diagram of the clock circuit is given in Fig. I.
The low voltage power supply provides 10V to the
low voltage regulator which also uses the 200V supply
for biasing. The 5V output from this regulator is
used to power all the logic i.c.s, and is decoupled on
each board by both tantalum electrolytics and small
r.f. capacitors.
The transformer which provides the 200V supply to
the "Nixie" regulator also gives a 6.3V 50Hz output
which is squared and used as the timing waveform
for the clock. This 50Hz is frequency divided by a
factor of 3,000 by a series string of four MSI counter
i.c.s to provide the one pulse per minute rate required
by the clock counters.
These minute pulses are further divided by ten in a
decade counter package, the four outputs of which
being decoded to ten line decimal and used to drive the
0 to 9 minutes "Nixie". The pulses from the +10
package occur once every ten minutes and are used to
drive the +6 tens -of -minutes counter. The outputs
from this are also decoded (three lines to six lines) to
drive the tens -of -minutes display.
Practical Electronics December 1970
 Olw FOR AN ALL -ELECTRONIC DIGITAL CLOCK

111 001=Th

By R. W. Coles
°T
The pulses from the -:-6 package occur once every
hour and are used to drive a -:- 12 counter which
provides the binary coded decimal inputs to the hours
and tens -of -hours display decoder/drivers. Note here
that the twelve hour clock system was used for this
design to make the clock acceptable for domestic
use.
The binary coded decimal outputs of the tens -of-
minutes and hours counters are also fed to the alarm
circuit, where the digital code is constantly compared
with a similar (but negated) binary pattern from the
1114,1111, T1
alarm -time switches. When the alarm time and the
display time are exactly equal, the comparator registers
this equality, and sets a bistable latch which in turn
initiates the alarm sounder.
The oscillator for the alarm sounder can best be
described as a "tristable, astable multivibrator" which
oscillates alternately at two different audio frequencies
producing a rapidly varying bleep tone. When the
alarm circuit is active this tone is gated to a speaker to
provide an output which is difficult to ignore.
The alarm circuit may be reset by means of a

MINS X 10 ALARM SETTING

2 SWITCHES 0/P IN B.C.D.

EQUAL ALARM
COMPARATOR
SOUNDER

+1, TO ALL I.C.s

10V IA
3,000 5 VOLT
REGULATOR
E POWER
SUPPLY

HR S 010 HR S MINS X10 MINS 230V

DECODER DECODER DECODER DECODER 50Hz
0

6.3V
50Hz

TO
180 VOLT 200V 20mA
NIXIE POWER
ANODES 11-'\./Vs-- REGULATOR
SUPPLY
0
NIXIE DISPLAY TUBES

Practical Electronics December 1970 95I

 SCHMITT TRIGGER IC2 IC3 IC4 IC5
SN7490 SN7490 5N7490 6 Ppm SN7492
RI R2 50Hz
D2 22011
22011 11 10 1Hz 10 : 6
5
OR 1
6.3V 10Hz 1PPs p
1
12
50Hz 13 12
rx., A BD A BD BC
BO D
D1
I /P
0/P 11
n A 0/P I/P 0/P 11
A 0/P I/P 0/P 11
I/P 0/P 8
I/P I/P
4.7V 14 14
ZENER tiGIa
r ORO QR0
3
R9Q
11 10 2 3

IC1 a
1,2SN7400

IC1 b
I'25/47400 G1d 51
G1c
Id lo I9 IC IC7
SN7C490 SN74982 SN7490
SN7400
HOURS COUNTER MINUTES X 10 COUNTER MINUTES COUNTER
HOURS X 10 LATCH
B
0-10
13 2 63 6 13

11 0" 0-*
G3c 2 9 Ro 0-4
RD 14 R00 1
E 10 089 A A 9 SIC
BD I/P I/P I/P
8 ' C B BC A 0/P C B BD A
0/P C B BD A
A 4 T10
0/P 0/P I/P 0/P 0/P 0/P I/P 0/P 0/P 0/P I/P 0/P 11
0
E
5
0/P 1 9 11 1 12 8 9 1 12
6 9 12

-- A IC6
A -o- A SN7410
SPEED SELECTOR GATE
B

C C B D C B

IC14 GATES 14
ICII IC12 IC13
SN7441 SN7441 SN7441
SN7441
COUNTERS 5

4 7 4 7 4 7 DECODER DRIVERS 5
4 7 6

D C B D C B D
D C B

DISPLAY
GATES 7
DECODER
DRIVERS
COUNTERS 10
2 1 10 6 15 8 9 13 14 14 11 2
16 15 8 9 13 14
DECODER/DRIVERS 12

0 0 0 0 0 0 0 0 0 0 666 1611518 19 113 1011

NEON 115a a a a a a 011
7 9 1 2 3 4 7 89 1 2 34 5 6 7 8 9
DECADE 1 2 3 4 5 6 7 c,;) 1 2 34 56 8 56
c,13) ( CO.
DRIVERS
.0
C dr .,...0 (3 6)
R4 R5 V3 R6
R3 VI V2
22 GN -5A 22 GN-5A 22 GVN4-5 A
22 GN -5A
kfl kA kfl
+180V Kt

Fig. 2. Circuit diagram of the main clock board only incorporating the dividers, counters and decoder drivers. All pin connections of the i.c.s which are used in the
clock circuit are labelled and numbered. The decoupling capacitors and power supply connections are shown on the right
 miniature toggle switch on the front panel, which will
also deactivate. this circuit altogether when required.
Now that we have a general grasp of the clock
operation we can'pass on to considering each section in
detail, beginning this'month with the main clock board.
The other sections will follow later together with the
appropriate diagrams and components lists.
MAIN CLOCK CIRCUIT BOARD
All the logic i.c.s for the main clock counting section
are mounted on a Dualine i.c. printed circuit card
type DL I 10/44. This particular board has positions for
fifteen digital integrated logic (DIL) i.c.s; only fourteen
are used in this application.
The board also has copper strips for connecting
wires and + Vtc and "ground" runs. At one end is a
double -sided 44 -way edge connection which is used to
carry all the inputs and outputs required.
From the simplified circuit diagram in Fig. 2, it
can be seen that the gates are shown individually; the
MSI circuits incorporating several flip-flops are given
Underside view of the clock chassis showing the main
Clock Board 'A' at the top and the Alarm Board 'B' at the
bottom
Practical ElectrOnics December 1970
in block form, to emphasise the treatment of these
devices as complete building blocks. The internal
logic and pin connections of these devices are given
separately in Fig. 3, along with the gate package
diagrams.
The SN7490N counter contains four flip-flops
grouped to form a divide -by -five counter (BCD), and a
separate divide -by -two stage (A). These counters
may be used separately or in series to form a decade
counter, only one external link wire being required in
this mode.
This device also contains two gated reset lines, one of
which sets all the flip-flops to the zero state (R0), and
the other setting the flip-flops to the 1001 condition
(R9). The reset facility is only used in the hours
counter of this clock, so all other reset inputs are
grounded to de -activate them.
The SN7492N counter also contains four flip-flops,
but in this device they are grouped to form a divide -by-
six and divide -by -two stage, which may be used
independently or in series to form a divide -by -twelve
counter.
One important reservation should be noted here:
the BCD stage may be used as a divide -by -six stage in
the divider, but its outputs do not follow the binary
code in this mode. Where this is necessary, as in the
"tens -of -minutes" counter, a divide -by -six stage is
formed by cascading the two internal counters, and
using the C flip-flop as an output. The binary outputs
to be decoded are taken from the ABC outputs in this
case.
The SN744I AN decoder/driver package is used, as
the name implies, to decode the binary outputs from
the clock counters and convert to decimal outputs
suitable for driving a high voltage "Nixie" tube. These
outputs are taken from the "free" collectors of ten
transistors with high collector -breakdown voltage
characteristics, provided in the device. The decoding is
carried out by an internal gating array, and to provide
the same logic and drive capability using small scale
integrated (SSI) circuits it would be necessary to use at
least five DIL gate packages, and ten discrete tran-
sistors, so the advantages offered by the 7441 are
obvious.
DETAILED CIRCUIT OPERATION
The 6-3V r.m.s. 50Hz sine wave input from the
power supply, needs to be converted into a square
d.c. pulse train before it can be used to drive the
divider chain IC2 to IC5.
Zener diode DI is used to achieve this. DI is
reverse biased until the sine wave input reaches 4.7V
positive with respect to ground. At this point it breaks
down and limits the positive excursion to this voltage
level, in effect giving a square top to the waveform.
As the sine wave input swings negative, the same diode
conducts in the forward direction, limiting the negative
excursion to -600mV.
The d.c. pulses formed in this manner are
square topped, but their rise and fall times are much
too slow to be used to drive TTL gates directly, as
there is a danger of parasitic oscillations during the
transition through the gate's active, or threshold,
region.
This oscillation, which would cause false triggering
in the following counters, is avoided by using a
Schmitt trigger with positive feedback to speed up the
transition. In this circuit two gates from a 7400
package are used to form the Schmitt with d.c. positive
feedback via a resistor R2.
953
 The silicon diode D2 is necessary when triggering
SIMON :MO) this kind of circuit from low impedance sources, as
A
/P K 0/P 0/F 660 0/1. 0/P in this case. The output produced is a d.c. square wave
with very fast positive and negative edges, ideally
suited to form the input to the divider flip-flops.
DIVIDERS
The first divider stage, IC2 is a 7490 used in the
divide -by -five mode, giving an output pulse train at
10Hz. The wiring of this stage is very simple, the
BD input and the D output being the only connections
necessary apart from grounding the resets and wiring
up the power lines.
15D A, GATE NC 1,c, No GAT The second divider stage, IC3, is also a 7490, being
1/F
used this time in the divide -by -ten mode, and giving
SN (482p 1 Bppj ) an output of 1Hz. In this case the A input and the D
i /P
A
NC 0/P 1)! P GAO 0/P 0/P output are used, and an external link from the A
F -,-,1 Fi F F,71 FT, F-1 output to the BD input is necessary.
__J Li J L The next two stages divide by sixty to produce
-177J.-..1 C.-+ J D.- minute pulses to drive the clock counter proper.
-1 -EP ---+SP --cp -PCP These are arranged so that if necessary they could be
6 i K i 8 e K 8 decoded in the same fashion as the hours and minutes
counters to provide a two -digit "seconds" display.
This type of display was not considered necessary
in the prototype, but if the clock is to be used to time,
sO for example, sports events, some constructors may
Li 12 j [2] LLI
1

j consider the extra expense worthwhile. Of course, if

BC NC NC NC +Yu ac DATE this course is followed, an extra pair of 7441 packages
P
will be required, and there is only room for one of these
51174001 (8000) on the board as it stands.
+Yu

TIME CORRECTION
The pulses supplied by IC5 are ready to operate
the counting circuits for each display tube. IC6 is a
triple 3 -input gate package used with one of the spare
gates in ICI to form a speed selector gate. It is used
when setting the clock to the correct time initially, and
is controlled by SI.
The three gates G lc, G2a and G2b each have one of
their inputs connected to one of three timebase speeds,
CND 10Hz, 1Hz, and the normal speed pulse per minute.
I

(1010)
A three -pole, three-way switch is used to control the
wcc
5/1743611
other input or inputs in such a way that only one gate
is enabled with a "I" input, the others having "0"
connected, so that their particular input pulses are not
allowed through.
The three gates have active level low outputs (due to
the inversion inherent in the NAND gate), and may
therefore be fed to a fourth gate, G2c, which is used as a
NOR, giving a single output to drive the counters.
The control switch is connected as in the diagram; an
open circuit represents a I input, and a ground con-
nection for a "0".
In retrospect it may be a very good idea to wire the
three "I" tags to Vcc through a kilohm resistor,
I
5/17441AN (15P41 )
rather than use an open circuit which could lead to
noise pick-up. No trouble has been experienced in the
ri;-1 171 171 Fl Fl prototype from this source, but the fastidious will no
doubt wish to incorporate this simple modification, to
be absolutely sure.
Some readers may have realised that a one -pole
9 1 0 1 5 6 / three-way switch could be used to replace the gate/
BCD -TD -DI PEAL switch system used here. Although this simplification
0E000ER/D1D0E0
seems worthwhile on a circuit diagram, in practice it
would necessitate taking the signal path off the board
in a long loop to the switch and back, a distance of
LI WEJUHUHU +Pm -
well over the maximum of ten inches recommended for
single wire driving with TTL circuits.
Fig. 3. Arrangement of logk in each i.c. package When the switch is set to the fast position, a complete
type with pin corrections 12 hour cycle is completed in 72 seconds, making it

4
Practical Electronics December 1970
 easy to set the clock to the correct hour, and when set decoded, drives the 0 output of the 7441. Similarly, at
to the slow position a minute is clocked up every 10 o'clock the equivalent binary count is 1001, which
second, facilitating the final setting. In the normal will activate the 9 output of the 7441. Fortunately this
position of course, the clock operates at the speed of problem is easily overcome by wiring the cathode I

real time.
MINUTES COUNTERS
The 7490 and 7492 packages which form the "minutes"
and "tens -of -minutes" counters operate in exactly the
same fashion as they did in the divider stages considered
previously, except that here the outputs are fed to the
7441 decoder/drivers, to operate the display.
The 7492 is wired in a slightly different way from its
division counterpart to facilitate decoding as explained
earlier. Only three inputs to the "tens -of -minutes"
decoder are needed to provide the necessary six decimal
outputs, and the D input from each 7441 is taken to
ground to simulate a "0" level.
HOURS COUNTER
A consideration of the display sequence for the
"hours" Nixies reveals that in the 12 hour clock
system, no simple count/decode system is possible.
Of the several solutions considered, the one used here
satisfies the conditions best, and gives a count sequence
sufficiently close to the binary coded decimal inputs
required by the alarm comparator, that it could be
easily altered merely by adding a "1" in an adder
circuit.
The "truth -table" for the hours counter and display
is given in Fig. 4. A quick glance at the "Hours"
column shows that zero hours never occurs (unlike in
the 24 hour system) and the start of the sequence can
best be taken as o'clock. 1
Considering the hours Nixie first, it is seen that it
starts with a I, counts normally to 9, then goes to 0 and
counts up to 2 before being reset to the start condition.
An immediate snag occurs here because the binary
count equivalent to o'clock is 0000, which, when
I still used to drive this display, using only the A input.
of the Nixie to the 0 output of the 7441, and so on, so
that the 0 Nixie cathode ends up wired to the 9 decoder
output.
After 10 o'clock the 7490 recycles normally to 0000,
and again displays a I, just as we require. Two counts
later it is necessary for the 7490 to be reset forcibly
back to one again, as the 12 hour sequence has been
completed. This is performed by detecting the "13
o'clock" state with the Ro reset gate, and immediately
resetting. The 7490 thus carries out one full count and
one partial count in each 12 hour period.
TENS OF HOURS COUNTER
Having grasped the principles of the hours sequence,
the tens of hours display should follow quite easily, as
another glance at the table shows that this Nixie must
go to a 1 at 10 o'clock and be reset to 0 at I o'clock.
The tens -of -hours count is registered on a simple
set/reset bistable formed from two cross -coupled gates
in the usual fashion. This latch is set by a further
gate at 10 o'clock, when it is opened by the hours
count of'100I. The latch is reset by the fourth gate at
"13 o'clock", and of course this reset is coincidental
with the 7490 reset, and is detected in the same way.
The truth table shows that the logic required to set
the latch is A AND D; the logic to reset both it and the
7490 is B AND E. It follows that 2 -input NAND gates are
ideal for the job, and in the case of the reset condition
the B AND E state is detected simultaneously by gate
G3a and the Ro gate of the 7490.
Decoding of the tens -of -hours latch is not required
to drive the Nixie, because when the E output is up a I
is displayed, and when the E output is up, a 0 is dis-
played. For the sake of simplicity however, a 7441 is

HOURS TENS
COMPONENTS . . .
COUNT S

,--------"---s 0/P'S LATCH 0/P

MAIN CLOCK BOARD
TEN
HOURS
Resistors
HOUR HOURS
NIXIE
NIXIE
A B C D E RI, R2 220 0 2% fW metal oxide (2 off)
Capacitors
O'CLOCK 0 0 0 0
CI 22p.F I5V tantalum bead type or elect.
1 1 0 0
C2, C3 0.047pF 250V met. foil.
2 . 0 2 1 0 0 0 0
Diodes
3 . 0 3 0 1 0 0 0 DI 4.7V 400mW Zener (e.g. 1S2047 Texas)
4 ,. 0 4 1 1 0 0 0 D2 I N9I4 silicon diode for switching
5 . 0 5 0 0 0 0 0
Integrated Circuits
ICI, 10 SN7400N (BP00)
6 . 0 6 1 0 1 0 0 quad 2 -input gates (2 off)
7 ., 0 7 0 1 1 0 0 IC2, 3, 4, 7, 9 SN7490N (BP90)
8 . 0 8 1 1 1 0 0
decade counters (5 off)
105, 8 SN7492N (BP9I)
9 ., 0 9 0 0 1 0 0 12 counters (2 off)
10 . 1 0 1 0 0 1 1
106 SN7410N (BPIO)
. triple 3 -input gate
11 0 0 0 0
1 1 1
ICI I, 12, 13, 14 SN7441AN (BP4I)
12 . 1 2 1 0 0 0 1 BCD to decimal decoder/
0 1 0 0 drivers (4 off)
Further notes on purchasing i.c.s given in the article
THIS TRANSIENT STATE DETECTED 8 COUNTER 8 LATCH RESET "Making the Most of Logic ICs"
7490 RECYCLES
Miscellaneous
Dualine type DL 110/44 printed circuit card
TENS HOURS LATCH SET (Shirehall Electronics Ltd., Station Yard,
Borough Green, Sevenoaks, Kent.)
Fig. 4. Truth table for the hours counter and display

Practical Electronics December 1970 955

 RI
A BCDEFGH ABCDEFGH ABCDEFGH ABCDEFGH
A BC REFG
+1613 r nj 0 0 0 0 0
H
000 000 000 0000 000 0000 Cl
000
BLANK 1
2 .wo I pior o 0 op3Th o
o 000 000
.41- 00
000 0000 000 0000
0
00
0
000
3 -to
4 0 0
00 00 ,10.0 0000
D1 NMI MESE MEC El 123
6
7
5
000 e ass_
0000 0 0
O 0
0000 000
000twoo0
0
0000
000
0001 (
0000000
0,0000
o
GRD
0000 00
0 -. C2 oo
BLANK 1 0-0 oo 00000 00000000 00000000 o 0c oo
-1-Vcc 0-0 I4 44.0......_
o 0 10, o o 0 0 0 oo
2 0-0 000060"41ft......
etko 0001000 000 0000 ,0 o oo
3 O 100-.V.4 o - Is 0 oft 6.42 B.s-o-e00000 0 000 00
4 O o N o oo

5
0
11121K
14
NEM oo
oo
oo
GRD
6
70-0
0-0 O
o
00
0
00
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.41.....4100
00
0
0
0 I 0 000
lo
oo
oo oo
00
BLANK 1

2
3
4
0-0
'046 0.3
O
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000l0000
cof1::* oo
00
0

13
oo

00
19

Io
5
II
00000000
- 000l0000
000m0000
000f0000
O
oo
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00
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MERE MAE o 044
5
60-0
70-o
BLANK 8 o -o
00000000
000 4000
000000 0 0000
00
1C13

0
0
0 000100
000llocao
0000 00
0000 000
22

GRD o 001 0 0
A BCDEFG H BCDEFGH ABCD F H A B CD E IF H A BCDEFGH

16 15 3 38 42 41 39 36 43 20 21 18 271 32 9126 33
40 35 44 22 17 28 30 25 34
OTHER OUTLET NUMBERS SHOWN ARROWED ABOVE

TOP OF BOARD Fig. 5. Wiring of the main clock Dualine printed circuit
(i.e. Vcc RAIL UPPERMOST) Board 'A' with edge connector outlet coding on lead -out
wires. Plain side terminations on top to outlets 1 to 22,
copper side terminations to outlets 23 to 44. The ground
10 0BCD
0 0 0EFGH
0 0 0-* ROW OF BLANK HOLES rail is connected to outlet 11, the V, rail to outlet 12
INCLUDED

NOT INCLUDED
IN REF. SYSTEM
ICS
possible commensurate with a neat layout. Where
adjacent printed copper pads are connected (such as on
REFERENCE CODE FOR IC6) this may be simply carried out on the underside
7
THIS HOLE= I C5/6H of the board with a solder run, to save the tedium of
producing tiny wire links. Discrete components
CI, C2, C3, DI, D2, RI and R2 are best added after
the rest of the wiring.
Fig. 6. Interconnection coding of the main clock board Wiring to the edge connector is facilitated by using
outlets for each i.c. position matrix the coding adopted in Figs. 5 and 6.
The wiring is carried out on the top of the board,
If desired a couple of discrete transistors could be even that which connects to the upper edge connector
used instead, driven directly from the complementary pads. The outputs are numbered with their respective
E outputs. circuit references for interconnection at a later stage.
This completes the description of the main clock It is recommended that at each stage of wiring up, a
board circuit, except perhaps to mention that the circuit is drawn up from the wiring actually carried
+ Vcc rail is decoupled near its edge contact with a out so that this may be checked against the circuit
22µF tantalum electrolytic capacitor. Two 0.047µ,F given. A mistake could be very difficult to rectify
capacitors, spaced out on the board, effectively remove when the faulty link is buried under several other layers
h.f. noise on this supply line generated by the logic of wire.
itself. This is normal practice and should be adopted It is also a good idea to connect the board to a 5V
in any i.c. logic application. supply and, using a 6.3V heater transformer as a
timing input source, check the counter operation
WIRING UP before adding the edge connector wiring. Nixie
The board wiring is shown in Fig. 5, and should be outputs can be checked by connecting a voltmeter
carried out with thin flexible p.v.c. covered con- across them to ground, and using a 4.7 kilohm resistor
necting wire. Interconnections must be kept as short as to Vcc to simulate a load. To be continued

956 Practical Electronics December 1970

 11111 11111,
By R. W. Coles
T °T o
THE alarm board "B" carries the logic and oscillator
circuitry required by the alarm system, and the
5 volt regulator, which provides the highly stable supply
required by all the i.c.s used in the clock. The board
is physically smaller than the main clock board "A",
being a "Dualine" DL109/22, which has positions for
nine 14/16 pin DIL packages, and is equipped with a
single -sided 22 -way edge connector.
Six i.c.s are used in all, but two of these are CA3046
transistor arrays which are 14 -pin packages containing
five individual transistors. These are not members of
the TTL family used to perform all the clock and alarm
logic.
ALARM OPERATION
The time at which the alarm is required to sound is
entered by means of a bank of thumbwheel switches
S2a and S2b mounted adjacent to the display on the
front of the clock.
These switches are so constructed that they give a
four -bit binary coded decimal output pattern for each
number selected. This b.c.d. word is continuously
compared with the b.c.d. output from the clock counters
in a digital comparator (see Fig. 7). When the switch
setting and the display are the same, the output of the
comparator falls to a low level and is used to set a
simple "latch" bistable in IC18.
The output of the latch enables a gate G5c which
allows the alarm tone through to a 40 ohm moving -coil
speaker, and thus the alarm is sounded. The alarm will
58
'WENN"
r -a
Part 2
continue indefinitely unless reset by means of the
miniature toggle switch S3, also mounted on the front
of the clock.
The alarm setting accuracy could be extended to any
degree by simply adding more switches and increasing
the comparator size. A setting to within 0.1 second is
quite possible if required, but with the prototype the
system was intended for domestic use, and time setting
in ten minute increments was considered adequate.
It was also considered unnecessary to include the
hours 10.0 to 12.50 in the comparison, thus saving an
expensive switch bank which would have been necessary
in the "tens -of -hours" position. If this expense is
unimportant, or if the aesthetic consequences of using
a toggle switch in this role (for this is all that is required
in this position) can be tolerated, these times are easily
added because the comparator as described has allow-
ance for this extra switch.
There is therefore a considerable amount of flexibility
in the alarm circuitry which allows individual con-
structors to tailor the system to their own requirements.
ALARM CIRCUIT
The circuit of the alarm system is given in Fig. 7,
and it can be seen that it is not very complicated at all.
Of course, the alarm circuit can be omitted altogether
without affecting the remainder of the clock circuit.
The digital comparator is formed from two SN7483
MSI packages, each containing four complete full -
adders, with internally connected ripple through carry.
Practical Electronics January 1971
Each package has four A inputs, four B inputs, four
"sum" outputs and a "carry -in" to the first adder and
"carry -out" of the last.
These circuits are mainly intended for high-speed
multiple bit parallel addition in computer arithmetic
units, but binary adders are versatile devices, capable of
performing several logic operations. The availability
of four such devices in one package opens all manner of
possibilities to the logic designer.
To understand exactly how these circuits can be used
as comparators, consider Fig. Fig. 8a shows the
truth table of an "exclusive-oR" gate, which is some -
should be equal to the switch outputs before the com-
pleted comparator registers an equality. To achieve
this, the eight sum outputs from the adders (each of
which registers equality of one digit) are fed to an
SN7430 8 -input NAND gate G4 in IC17, the output of
which will only fall to a logic 0 when all the individual
comparisons are valid.
The output of this gate will remain low for ten
minutes, until a further increment in the "tens -of -
minutes" count invalidates the comparison. A period
8. of this length would probably be sufficient for alerting
the sleeper, but to make absolutely sure that the alarm
+10V

R13
27011
IC15
SN7483N 1S1
4013
MINUTES X 10 IC19
COUNTER fB 7
B2 CA3046 11
OUTPUTS 4
FROM ICB B3
16
B4
6
LATCH E OUTPUT LOGIC "1 ALARM
FROM IC10 OSCILLATOR
TRD
I3ZI

A4 4
S24 3 IC17
4 A3 5N 7430N 10
ALARM TIME
MINUTES X 10 2 A2
10 3 R12
( 0 -5
Al C in GND 5 5600
4 13

d7b 131 112 G4

10 G54

IC16
SN7483N 12

11
11
E17
6 5
HOURS
COUNTER
B2
4 051 G541
OUTPUTS B3 SET
FROM 1C9 16 11 2 0

I OFF
IC18
A4 4
15
580400N C7a'a:
S2 I 4 53
3
ALARM TIME 8 ALARM
A2
HOURS ( 1-9) SET
10
Al Cu, GND
Fig. 7. Block diagram of the alarm circuit using five integrated circuits and
showing their pin connections. The full circuit of the alarm oscillator appears
in Fig. 10

times called a "non-equivalence" gate because its out- cannot be ignored, the output of IC17 sets a latch
put is a logic I only when its inputs are exactly opposite. formed from two cross -coupled 2 -input NAND gates
To use such a gate as an' equivalence circuit which G5a and G5b in IC18, which ensures that the alarm
gives a logic I output when its inputs are identical, it is tone will continue until reset, even if this process takes
only necessary to invert one of those inputs by means longer than ten minutes.
of an inverter gate, or if complementary inputs are
available anyway, to compare the true form of one INPUTS
input with the negated form of the other. It follows A B OUTPUT
(a)
then that this type of gate could be used to build the
complete alarm comparator we require. 0 0 0
As Fig. 8b shows, the truth table of a full -adder is 0
identical to that of the "exclusive-oR" gate, if we 0
ignore the carry output and keep the carry input at 0. 0

In fact, using the SN7483 as four "exclusive-oR" gates

suits our comparator design admirably. The inverted C,,, B I C, +1
form of one of the words to be compared is already
A

0 0 0 0
available, because 'the thumbwheel switches giVe out- 0
0 0 LOGICAL REPRESENTATION
puts in this form. The fact that we do have a carry 0 1 1

0
input available can be put to good use in correcting 0 0 1 1

the lagging output of the hours counter. O 1 1 0 1

(I)

EIGHT DIGIT EQUALITY Fig. 8a. Truth table for "exclusive -OR" function
So far this article has only considered the comparison Truth table for full adder when Cin = 0
of single digits, but all eight digits from the counters Fig. 813.

61
Practical Electronics January 1971
 ALARM TIME SWITCHES
The switches used to set the alarm time were chosen
from the Birch-Stolec "standard" range, and both
o o
banks are coded S.B.10.N1248. These switches are 034 56 034 560
well suited to this application because they give an 02 02 70
7 0
output on four lines which conforms to the binary code, 80. 8
a separate pattern being produced for each of the ten 9 o 980 0 9
0
positions of the numbered wheel. 0

Any number of switch banks can be mounted to- OUTPUTS

gether if the constructor wishes to expand the alarm
system, the final assembly being finished off by means
of a pair of end cheeks which give a neat appearance
and provide the mounting holes. DECIMAL A (1) 8 (2) C (4) 0 (8)
The principle on which these switches are based is 0 1 1 1 1

that of a four -track printed, gold plated stator, traversed 1 0 1 1 1

by four phosphor bronze rotor contacts. The life of 2 1 0 1 1

this assembly is at least 100,000 operational cycles when 3 0 0 1 1

switching 24 watts, so in this application the life will be 4 1 1 0 1

much extended due to the very small current being 5 0 1 0 1

carried. 6 1 0 0 1

To fabricate a similar system using wafer switches, a 7 0 0 0 1

four pole ten -way switch would be required in each 8 1 I 1 0

position, with a considerable amount of wiring necessary 9 0 1 i 0

to programme the required code.

The wafer switch system does provide a useful way
of explaining the action however, and a diagram with
output logic table conforming to the thumbwheel
switch coding is given in Fig. 9. Note that the output
is in the complement form (assuming positive logic).
A logic 0 is represented by a ground connection, and a
logic 1 by an open circuit.
DIGITAL COMPARISON
As discussed earlier, this inverted code is just what
is required for connection to the comparator. Of
course, numbers one to nine only are required as inputs
to the hours comparator, and numbers zero to five for
the tens -of -minutes circuit. Stops could be fitted to
the switches if desired, although this is not really
necessary; blanking the undesired numbers with paint
would be a simple alternative.
Only six positions are required for the tens -of -
minutes switch. It follows, therefore, that the full
output of four digits is not needed. In fact, the "8" out-
put from this switch can be ignored in the comparison,
leaving a spare comparator section in IC15, which is
put to good use as an "inhibit" while the "tens -of -hours
latch" E output is high. Remember that the alarm
system is not operative during this three-hour period as
it stands.
This inhibiting logic is simply achieved by comparing
the E line with a permanent "1", thus only permitting
a 1 output from this section when the E line is at 0.
As an alternative, it would be possible to ignore this
spare comparator section, and feed the E output from
ICIO (Fig. 2) to the 8 -input gate in IC17 which, when
using this method, would have an input available. This
system was not used in the prototype simply to retain
the design simplification of feeding only true outputs
from the main clock board.
HOURS COUNT CORRECTION
So far so good, but up to now we have ignored the
point made last month that the hours counter outputs
do not conform directly to the binary code, 0000
representing decimal 1 instead of 0, and so on up to
1000 representing 9 instead of 8.
The thumbwheel switches, being "off -the -shelf"
items, do not allow for this idiosyncrasy. The com-
parison as previously described would reveal that, when
62.
Fig. 9. Wiring of a 4 -pole 10 -way switch to give a
four -bit binary coded decimal output in complement
form. The truth table shows positive logic
the switch was set to, say, four o'clock, the alarm would
sound at five o'clock, and so on, a most unhappy state
of affairs.
It is evident, however, that the code output from the
hours counter could be corrected by simply adding
binary 0001 to it, increasing its binary value by one.
This simple conversion could be carried out using a
four -bit parallel adder such as the SN7483N. (A four -
bit adder is necessary because carries must be allowed
for over all four bits.)
A separate SN7483N could be employed to carry out
this correction, but as these circuits are used as com-
parators anyway, this is not necessary. A 1 can be
added in by feeding a carry in on the "carry" input to
the least significant adder. Admittedly this is all a
little difficult to grasp, but it does work, and the best
way of proving it is to set an example down as a sum,
thus:
Hours display: 7, Switch setting: 7.
Binary 7: 0111
Therefore switch output (inverted): 10001
Hours counter output: 01101 add
= 1110
1 (plus 1 carry)
= 1111 equal (alarm
sounds)
RISK OF TRANSIENT OPERATION
During the "paper" design of this part of the clock it
occurred to the author that, due to the relatively
lengthy propagation delay of the SN7483N, and the
non -synchronous inputs from the MSI ripple counters,
it might be possible for all the adder outputs to be at 1
when the comparison should not show equal, thus
giving a transient output from IC17.
As any such transient "low" output longer than a
few nanoseconds is likely to set the latch and sound the
alarm (at the wrong time), this state of affairs must
obviously be avoided. A good deal of thought was
Practical Electronics January 1971
 +56 REGULATED
R3 R6 R7 R8 RIO
R5
8'2 56011 8 2411 56011 8.2k11 56011 811
kfl 56011 IC18 PIN 12
C6
228F

IC18 PIN .3

56016
0 0478F
LS1

11 12 14

TRC TRB

3
SET
IC19
CA3046
53

Fig. 10. Alarm oscillator circuit using an integrated package of five transistors.
THE is unused

put in to discover whether this could in fact occur. It
was decided that the only way to find out was to "try
it and see"!
In the event, it was found impossible to generate this
condition in the completed clock, and so all was well,
but the point has been made because, with the wrong
combination of adders and counters, it was thought
to be a possible occurrence.
If any reader should be unlucky enough to experience
this phenomenon, the solution is simply to gate the
comparison with a clock waveform from one of the
divider stages not used in the comparison. In this
way the output from IC17 could be strobed only after
the hours and tens -of -minutes counters have changed
and the SN7483N "carries" have propagated.
Obviously some circuit modifications would be
necessary to achieve this.
ALARM OSCILLATOR
The alarm oscillator circuit is shown in Fig. 10,
which may attract the interest of those who are not
otherwise concerned with the clock, because, of its
obvious applications in malty other designs.
The circuit was described by A. B. Blackwell -Jones
in a letter to Wireless World (August 1967). He
called it a "Trivibrator" or "Donkey Simulator", a
very apt pair of names indeed. The circuit is based on
the usual two transistor astable multivibrator arrange-
ment, to which an extra transistor has been added, so
that three separate cross -coupled timing networks
result instead of the usual one, as shown in Fig. 11.
Each of the timing networks has a different natural
understanding this extension of the idea. It will help
to refer to Fig. 11.
CIRCUIT OPERATION
Either transistor TRA or TRC will be saturated at
any time. This saturation will last for about 0.1
second, as controlled by the 5Hz timing
coupling them. The saturated transistor is unable to
react via its a.f. timing network with TRB during this
time, so this tone is not produced. Meanwhile, how-
ever, the other transistor (of the pair TRA or TRC) is
not saturated by the 1.f. arm and is free to interact via
its a.f. timing network with TRB, giving an a.f. output
of the appropriate frequency. When the 04 second
period has expired the l.f. arm changes over,
saturating the other (TRA or TRC) transistor, and
allowing the other a.f. tone to be produced, and so on.
The only unfamiliar parts of the circuitry are the two
resistors, R4 and R9, which are necessary in the trivi-
brator to prevent the very low impedance of the l.f.
coupling capacitors shunting the a.f. arms. In effect,
the capacitors C4 and C6 coupling this section are
taken to taps on the CR timing resistance chain.
I
OUTPUT (ALTERNATE BURSTS OF 1kHz
TRB AND UN: SQUARE NAVE)
-1(
CROSS COUPLED CROSS COUPLED
/0 '0 2kHz
,zeo 1kHz

frequency, two being audio tones of about one and two

kilohertz respectively, and the other being a low
frequency timing circuit giving a 5Hz gating effect.
The output is taken from the centre transistor of the
two a.f. arms, and consists of alternate bursts of the
two tones, each lasting for about 0.2 second, controlled -1( -K
by the l.f. arm. When fed to the speaker this tone TRC
CROSS COUPLED
TRA
gives a very pleasing "space age" warble effect. /0 1' 5Hz
If the reader is familiar with the basic multivibrator Principle of operation of the alarm oscillator
circuit action, there should be no problem at all in Fig. II.
6 .,
Practical Electronics January 1971
 The output of the oscillator is taken from TRB via
a resistor R11 to gate G5c (Fig. 7), where it is held
until allowed through by a logic 1 input from the alarm
latch G5a. Note that the alarm oscillator runs
continuously, whether the latch is set or not.
When G5c is not enabled, its output will be at a
permanent 1, or positive, level. If this output is fed
to the simple saturating switch used to drive the speaker
directly, although the alarm would not sound, this
transistor would be hard on, giving a high power drain
and possibly damaging the speaker. To avoid this,
G5d is interposed between G5c and the switch TRD to
act as an inverter, ensuring that when the alarm circuit
is inactive, the output transistor will be off, and no
current will flow through the speaker.
The three transistors forming the oscillator, and the
transistor used to drive the speaker, are all contained
in an integrated package IC19. The other transistor
in this array is not used, but it is vital that its emitter
(pin 13) should be grounded, as it is connected to the
substrate of the device. An open circuit on this pin
would jeopardise the isolation between the separate
transistors.
The positive supply for the al. output stage is taken
from the unregulated 10V line, not to gain any power
advantage, but to isolate the 5V line powering the
logic circuitry from any ripple produced.
The emitter of the output stage is grounded through
the combined "alarm-off/reset" switch S3. When this
switch is in the "off" position the alarm cannot sound
. under any conditions, and a 0 is fed to G5b to reset the
latch ready for the next alarm setting.
Note that during the ten-minute period that the alarm
output from IC17 is active, it is not possible to reset the
latch by simply flicking the switch up and down.
This concludes the description of the alarm circuitry;
the 5V regulator, which is wired up on the same board,
follows next. It is recommended that the 5V regulator
be wired up before the alarm circuit as will be realised
later in this article.
FIVE VOLT REGULATOR
The 5V regulator uses a total of seven transistors,
five being contained in another CA3046 (IC20), one
being a discrete 2N706, and the last being a plastic
encapsulated power transistor, type MJE521, which is
mounted off the board using the chassis as a heat sink.
The regulator features fold -back current limiting,
excellent temperature stability, and an output imped-
ance of less than 01 ohm from d.c. to 100kHz together
with line regulation of better than 10mV per volt.
Inputs to the circuit are 10V d.c. (nominal) and
200V d.c. (nominal), provided by conventional power
supplies which are described next month. The regu-
lator circuit is shown in Fig. 12.
The 200V line is reduced to provide a 12V biasing
supply set by a discrete Zener diode D3, which is
bypassed by CI to suppress any high voltage transient
surge when switching on. The 12V is used to power
the temperature compensated 7.5V reference supply and
the differential amplifier. Using a separate bias supply
rather than the unregulated 10V to power these sections
gives a great improvement in line and load regulation,
and increases ripple rejection.
In the alarm oscillator circuit the advantages con-
ferred by employing a transistor array were those of
compactness and convenience, but in this circuit the
benefits of the monolithic construction provide a
specification which could not be equalled simply by
replacing the array with discrete devices. Because
66
each transistor is mounted in close thermal contact
with its neighbours, tight temperature tracking is
assured, enabling the construction of an accurately
compensated reference and a differential amplifier
with a negligible input offset voltage temperature
coefficient.
As each transistor was made at the same time and
experienced the same diffusion process, parameter
matching is also assured. The transistors' Vbe are
guaranteed to be within 5mV of each other; all these
factors can be put to good use in this type of circuit.
REFERENCE SUPPLY
The reference supply is provided by TRD and TRE,
which are not used as transistors in this application,
but as a Zener diode and forward diode respectively.
The use of a base emitter junction as a Zener is not new,
and the transistors in the CA3046 provide a breakdown
voltage of about seven volts when used in this way,
with a temperature coefficient of plus 2mV/degree C.
A temperature induced variation of this order is not
serious in itself, but if it occurs at the same time as
other variations, it could take the 5V supply outside
the necessary design limits of plus or minus 250mV.
To eliminate this drift, a forward biased diode,
formed from another base emitter junction (TRE), is
connected in series with TRD. A junction biased in
this way exhibits a forward voltage of around 600mV,
but it has a negative temperature coefficient of 2mV/
degree C, which cancels the plus 2mV/degree C of the
TRD "Zener" junction.
A variable potential divider is used to tap off an
accurate 5V from the reference line, and is used as an
input to the non -inverting input of the differential
amplifier (TRA and TRB). A capacitor CI 1 is used
to bypass any noise which may be present on this
supply.
Because a 5V reference is used, the differential ampli-
fier can be used in the voltage -follower mode, with the
final 5V output being fed back directly to the inverting
input without the usual potential divider chain being
interposed. This connection gives a maximum value
of loop gain for good regulation, and also increases
the frequency response of the amplifier, giving good
transient response.
DIFFERENTIAL AMPLIFIER
A differential amplifier was used because of its high
voltage gain and absence of temperature problems
which affect single -ended designs.
The output of the "error" amplifier is taken from the
collector of TRA and used to drive the base of TR1
which, with the series pass power transistor TR2,
forms a compound emitter follower with a very high
current gain, and consequently low output impedance.
TR2 has to pass all the current required by the load,
which could be as high as 1A, and is therefore a power
device bolted to a heat -sink.
FOLDBACK CURRENT LIMITING
The foldback current limiting circuit is provided by
TRC with R21, R22, and R23. The following para-
graphs describe its operation using Fig. 12.
As many constructors are aware, a short-circuit on
the output of a semiconductor regulator can wreak
havoc with the regulator devices in a matter of micro-
seconds, and with a project of this complexity a short-
circuit is very likely to occur, especially in the early
stages of testing. Protection against this sort of disaster
Practical Electronics January 1971
 R14 1511.11
+12V
-4.-/VV\-
+200V +10V (NOMINAL )
R19 UNREGULATED
(NOMINAL) R17 R18
3.3
8200. 33k11 110

D3
152120 .71 Ci°
0.1pF
12V - TRI TR2
2N706 MJE521 +5V
REGULATED

R22 3.30
7.5V REFERENCE R21 4W
3-3k0
R15
1Icfl 1C20
CA3046
10 2

VRI
SET TRD
OUTPUT
VOLTS 11

V-
.11c11
14 TRC

THE
TR)
II TRA
12

13 3
C12
R16 R20
R23
1.8k0 1.8k0 1k0
0 T22pF
T 1PF

GROUND LINE

Fig. I2a. Circuit diagram of the 5V regulator circuit including foldback current limiting

UNREGULATED CURRENT SENSE RESISTOR 6

+12V BIAS 101/ (0.611)

5

3 POWER TRANSISTOR I
DISSIPATION 3W
Ic
(a) 2
F 1 v-j.,
REGULATED
OUTPUT POWER TRANSISTOR 1t
1 DISSIPATION 9W 1p
CURRENT LIMIT
REFERENCE I
TRANSISTOR
0.1 0.2 03 04 05 06 0.7 08 09 1.0
FEEDBACK (C)
OUTPUT CURRENT (AMP)

SENSE RESISTOR
(3.311.)

is easily provided by adding a current limiting circuit,

of which there are numerous designs available, the
simplest being the one transistor "constant current"
arrangement.
A skeleton circuit of the regulator with this kind of
limiting is shown in Fig. 12b, along with its limiting
"BUCKING" characteristic. The operation is quite straightforward;
RESISTORS
a current sense resistor in series with the 5V supply is
used to develop a voltage proportional to the current
drawn.
When this voltage approaches the Vbe of the current
limit transistor, it turns it on, diverting some of the base
drive to the series pass transistor, and causing the out-
put voltage to fall to maintain the preset current. If
the load on the supply is reduced to zero ohms (i.e. a
short circuit) the output voltage falls almost to zero
Fig. 126. Skeleton circuit of a 5V regulator with constant allowing only a current preset by the sense resistor
current and foldback current limiting value to flow.

Practical Electronics January 1971 69

 The short-circuit current must be set to greater than
the permissible load current. For this particular
regulator this would be up to 1A, giving a very high
dissipation in the power transistor under short circuit
conditions, because most of the unregulated voltage
appears across this device.
HANDLING THE HEAVY LOAD
This problem could be overcome by using a heat
sink large enough to handle the extra dissipation under
fault conditions, but there is a much simpler method
that is used in this regulator and requires only the
addition of two resistors.
In Fig. 12b these extra resistors have been added,
and are used as a potential divider to "buck -out"
the voltage developed across the sense resistor, pre-
venting it from turning on the transistor at the previous
current level.
With the resistor values used in this regulator, the
limit transistor will not be able to turn on until the

COMPONENTS . . .
current drawn approaches IA, instead of the 250mA
ALARM & 5V REGULATOR BOARD
level set with constant current limiting and the same
sense resistor.
(a) Alarm Oscillator (b) 5V Regulator When the transistor does turn on, however, the out-
Resistors put voltage will drop, removing the effect of the
R3 821a2 RIO 5600 RI4 15kf2 R2I 3.3k12 "bucking" voltage and reducing the output current.
R4 I Id/ R I 15600 R I5 I kf2 Rn 3.30 4W When the output load becomes a short on the output,
R5 5600 R12 56011 R I 6 1.8kf2 R23 lid/ the final voltage will have dropped almost to zero, and
R6 8.2k0 R13 2700 R I 7 8202) the output current fallen to less than half the value at
R7 5600 R18 3.3k0 which limiting began.
R8 13.2k12 R I9 3.31(12
R9 11(0 R20 1.8k11
This effect is termed "fold -back" limiting, for obvious
reasons, and cuts the dissipation in the power transistor,
Potentiometer under short circuit conditions, to about a third of that
VR I I kfl linear helical obtained with "constant current" limiting, operating
(Painton Bourns type at the same maximum current-a very worthwhile
224P-1-102) return for a couple of resistors.
In the prototype the limiter began to operate at about
Capacitors 1A, and with a shorted output the current dropped to
C4 22pF tantalum I5V CIO 0.1µF met. foil 250V 400mA, although resistor tolerances will affect these
C5 0. I pf met. foil 250V CI 1 0.1pF met. foil 250V
C6 22pF tantalum I 5V Cl2 2242.F tantalum I 5V figures with later versions. The current limiting
C7 0.1pF transistor TRC, is contained within the CA3046, which
met. foil gives the added advantage that the operating and short-
C8 0.047µF
250V (Mullard C28I) circuit current will decrease as the chip warms up, due
C9 0.047µF
to the negative temperature coefficient of the device's
Diode Vbe, giving a degree of thermal feedback.
D3 152120,
I2V 400mW Zener OUTPUT VOLTAGE CONTROL
Transistors The output voltage of the regulator is not affected
TR 12N706 by the limiting circuitry under normal conditions, be-
TRS MJE52I (with mica cause the feedback to the error sensing amplifier is
washer) taken from after the current sense resistor R22, the
voltage drop across this resistor being automatically
Integrated Circuits allowed for by the amplifier.
1C15 SN7483N (BP83) The capacitor C12, which should either be a 22/tF
1C16 SN7483N (BP83) tantalum type or an aluminium electrolytic in parallel
IC17 SN7430N (BP30)
IC18 SN7400N (BP00)
with a 0.1/1F paper capacitor, reduces transient spikes
IC19 CA3046 (R.C.A.) IC20 CA3046 (R.C.A.) on the output and also ensures that the regulator
Further notes on purchasing i.c.s given in the article remains stable at all times.
"Making the Most of Logic ICs" last month Using a miniature helical preset potentiometer for
VR1 allows accurate setting of the output voltage. This
Miscellaneous type of component also features excellent temperature
52 2 -bank printed thumbwheel switch 10 -way (see and long term stability. There is, however, no over-
text) (Birch-Stolec or Radiospares) riding reason why a single turn rotary control should
53 Miniature toggle switch, single -pole, changeover not be substituted as an economy if a sacrifice of these
LSI 40f2 or higher miniature
"Dualine" type DLI09/22 printed circuit card qualities can be tolerated.
(Shirehall Electronics Ltd., Station Yard, Borough The construction of the regulator should precede
Green, Sevenoaks, Kent) that of the alarm circuitry; details of these will be given
next month before describing the main power supply.
70 Practical Electronics January 1971
 am.
By R. W. Coles
T °T Part 3

month we give details of the alarm board current limiter. As the final test, short out the output
construction, discuss the power supplies, and give while monitoring the current. The output voltage will
THIS
I
drop to zero, and with any luck the current will drop
the high voltage regulator board details. to about 400mA. If it does not, there is probably
something wrong with the wiring, and you may need
CONSTRUCTION OF BOARD "B" a new output transistor.
The wiring of the ,alarm board follows the same
general principle as that employed with the clock board ALARM CIRCUIT WIRING
described last month. In this case there are a large When the regulator is tested and performs satis-
number of discrete components and it must be admitted factorily, the wiring of the alarm circuit can be carried
that wiring up is quite tricky because of this. out, first the package interconnections, then the discrete
It is best to construct the regulator first and test its components and finally the wiring to the edge con-
operation before attempting the alarm circuit; the nector. The wiring on the plain side is shown in
connection diagram for this circuit is given in Fig. 13. Fig. 13 with the edge connector wiring. Testing this
Note that there are three breaks to be made in the circuit is difficult to achieve in isolation, and in this
printed copper power supply strips, so that these tracks case it is better to wait until the clock is nearing com-
can be used for other connections, and also that the pletion. There is no reason why the alarm oscillator
wire to the 200V supply does not pass through the should not be checked with an oscilloscope or even an
edge contacts. earphone.
In all there are two wires which leave the board in
this way, due to the shortage of edge contacts on the
22 -way version used in the prototype. If desired the
DL109/44 type of "Dualine" card could be used to
prevent this.
REGULATOR TESTS
To test the regulator it is desirable to have the power
supplies already built, but any power supply providing
the correct voltages can be used. It is also possible to
drive the 12V bias line from a 20V supply if a 680 ohm
resistor is used instead of the 15 kilohm RI4 required
when a 200V supply is employed.
The MJE521 power transistor is mounted on the
chassis near the regulator, and is insulated with a mica
washer which should be supplied with the device. A
smear of silicon grease on either side of this washer
helps heat transfer and should be used if available.
This transistor is much easier to mount compared
with the traditional TO -3 packaged devices, only a
single hole being required, facilitating its attachment
to a temporary heat sink if desired for testing purposes
-remember to bolt the transistor down with the brass
collector tab next to the heat sink, and do not forget
the washer.
When the test arrangement is wired up, connect the
power supplies and monitor the output voltage, which
should be somewhere between 3 and 8V. Adjust VR I
to obtain the required 5V, preferably with a load of
about 20 ohms connected. Underside view of the Alarm Board B showing pos-
If all is well, decrease the load to about 4 ohms; the itions of cuts in copper strips at four places marked
output voltage should drop under the control of the X
Practical Electronics February 1971 l53
 BX g A3CDEFGH ABCDEFGH

2
3
0
O 000000
c

C
0
C
EFG

0
C
H

it It
o
04
7
o
06
ee
0
2
0
04'13171 cif,
4r01
oe o
If
0
io cof 0
J 4
r9

NM=
4
0
1C15
0 01
5 00
6 0 o -0-16 o 00
000 ri4 .7\ 00
0 o 0
4
0
--111 5
; R110 0 0 0
0 00
00000 o o I 00
15

R9/ 0 0 0 0 00
2 O C 010 ot 002 O
3 .-41/ 1 ql-,./ o 00` o 03 00

=oh
04 Oo

5 0
WWI .05
-6-11
00
12

6 ) R1 0, 00
74 op 0 00 0t4 o
1C20
2D
00
53 ---...23 I
C12,
00
SET o 1 ^
TO R22 00 Ittil X °
00 /0 '---' IC 00
;
X 20 00
2 O O RIO 00
4". 20° 0°(
3
00
3 T R19 A Ri50 0 0 0 00
C
x000 22
TOR22
IC
.01111111
5 0 00 R21
6 0 o. -4k D rt A3o n
7 O 00 -* 1/121

8 O0 C 000 R20 0 O 0 3114 20

O 0
D TO IC20
HOLE 333
TR2 MOUNTED DN CHASSIS
WITH MICA WASHER
R14 ON 200Y POWER
SLPPLY BOARD 'C'

Fig. LS. Layout and wiring of the complete Board "B" incorporating the alarm circuit and 5V regulator

SN7483N (BM) SN7430N (BP30)

B4

IM 12
14 C4 Cin GNID B1

El
Al

10
1,
LI
vcc

1111 0 II LL LI
11:1-1E411143
IIIEl LI Ell CI Ell MI
GND

VCC

II1M11K4111111
El II
IIIEl El I:1 CI
GND

SN74 00N (i3POO) 1RANSISTOR ARRAY CA5046

N.B. PIN.13 IS CONNECTED TO THE SUBSTRATE AND MUST BE GROUNDED

Fig. .14. Integrated circuit diagrams and pin connections for Board "B"
154 Lle,:henieN February 1971
POWER SUPPLIES AND CONSTRUCTION
The power supplies that provide the various d.c.
voltages required by the Digi-Clock circuitry are quite
conventional in design, as can be seen from Fig. 15.
Outputs required from the supplies are:
(a) 10 volts (nominal) at IA (max), from which the
regulated 5 volt supply is derived.
(b) 180 volts at 10mA (nominal), which is used to
drive the anodes of the " Nixie " tubes and
decimal -point indicator.
(c) 200 volts (nominal) at 25mA (max), which is
used to supply the 180 volt regulator, and to
drive the 12 volt bias line of the 5 volt regulator.
In addition a 6.3V r.m.s. (50Hz) low current supply is
required to provide the clock timing waveform.
No on/off switch was fitted to the prototype, as
permanent use when plugged into the 230/250V a.c.
mains supply makes it unnecessary. A mains switched
socket with fused plug or a fused spur outlet is recom-
mended for installation. A clock will normally be
left on permanently, only being switched off at holiday
times or other occasions when the house is vacated
for long periods.
If the constructor's house wiring uses the non -fused
type of plug then it is vital that a separate fuseholder
be incorporated in the clock design to provide pro-
tection of the transformer primaries. While on the
subject of fuses, remember that all fuses used in this
design are necessary for safety, the clock is intended
to run continuously, often unattended, and the only
way safety can be assured is by proper fusing.
TI 113V
230V
F S1 1A
10V
FS3 2A
Fas4dl Mains
T2 125V.P
O
Practical Elcctronic February 1971
LOW VOLTAGE SUPPLY
Two power transformers were used in the prototype
to provide the necessary a.c. supplies (Fig. 15). This
proved to be necessary because of the difficulty of
finding a single transformer with suitable ratings and of
the correct physical size.
The transformer selected for the low voltage supply
not only provides the required 10V at 2A, but also
has the highly desirable feature of an interwinding
screen, which reduces the coupling of mains -borne
r.f. interference into the logic supply lines.
Constructors who may prefer to use a different
case design from that used in the prototype, may like
to know that West Hyde Developments make a single
transformer that will supply all the voltages required
by the clock. This is type TRA which is too large to
fit into the specified Case "C".
An encapsulated bridge rectifier (D4 to D7 in Fig. 15)
with a current rating of IA (continuous) is used as the
low voltage full wave rectifier, and this is followed by a
5,00017F smoothing capacitor CIO in the usual way.
Two "protection" components are included in this
circuit.
When switching on, a very large surge current flows
for a short period as the capacitor is charged. This
current would be limited only by the internal impedance
of the transformer, and might exceed the 8A surge
rating of the bridge, were it not for the inclusion of
R24 between it and CIO. The resistor, of course,
imposes a large voltage drop under surge conditions,
and ensures that the current cannot exceed 8A, whereas
during normal operation the voltage drop across it will
only be an insignificant half -volt or so.
Fig. IS. Circuit diagram of the power supplies
24 1-10V nominal to
5V regulator
F214
1DV nominal to 5V
200V lector circuit
15k11
R27 22
22k° to'NIXIC
R8 anodes
010
2 ka
R 29
1S3180A
22k11
180V to 6:6=1
100 ka point indicator
6.3I 50Hz to main
clock board
157
 ALARM TIME NIXIE TUBES
SWITCH

Top view of the chassis show-

ing power supply components

POWER
SUPPLY
BOARD C

VIII RESET TIME

CONTROL
-117
The increase in the impedance of the supply caused HIGH VOLTAGE SUPPLY
by its inclusion does not pose a problem because the Transformer T2 is used to provide the high voltage
final 5V output is provided by a feedback regulator, supply for the display and 6.3V a.c. for the timing
which as we have already seen, reduces the supply circuits. The two diodes (D8 and D9) and the smooth-
impedance to a fraction of an ohm. ing capacitor CI 1 complete the full -wave rectification
The use of an anti -surge fuse in this supply allows circuit as shown in Fig. 15.
very close protection of the bridge and transformer, The nominal 200V supply developed across CI is
without having to increase the fuse rating to accommo- fed to the 5V regulator via RI4. This resistor should
date surge currents, as would be the case with quick - be mounted as close to the board as possible to reduce
blow devices. Fuse FSI ignores short duration the risk of direct short circuits, but it cannot be mounted
current transients, but will blow within a few tens of on the board because of the amount of heat it dissipates.
milliseconds should its rating be continuously exceeded. Although not used in the prototype, a small tag -strip
The smoothing capacitor CIO should be a good could be employed to support it, and allow air circu-
quality type with a high ripple -current rating. Com- lation.
ponents inadequate in this respect will have a reduced The 180V regulator an emitter follower
life in this type of circuit. circuit with the base voltage of transistor TR3 set by
the breakdown voltage of a 180V Zener diode DIO.
COMPONENTS . . .
POWER SUPPLIES Display Tubes
Resistors V I to V4 GN-SA (S.T.C.) "Nixie" numerical indica-
R24 I SI 3W wirewound tors or similar (Electroniques (S.T.C).
R25 6.8kS2 R28 22kit Ltd., Edinburgh Way, Harlow, Essex)
R26 22ki2 R29 22k0 LPI Neon indicator lamp miniature (e.g. type I MH)
R27 22ki2 R30 100162
All 5%, IW high stab. except R24 Switches
SI 3 -pole, 3 -way rotary wafer switch.
Capacitors S2 Decade thumbwheel switch, 2 banks with 2
CIO 5,000p.F elect. 15V
16µF elect. 350V
side plates. (Type SBIONI248, Birch Stolec
C11
Ltd.). Alternatively 2 wafer thumbwheel
Diodes switches, 4 -pole, 10 way
D4 to D7 Bridge rectifier I B10.1 10 100 p.i.v. IA S3 Single -pole changeover miniature toggle
(Texas)
D8, D9 PL4004 (General Instruments) or any 400 Fuses
p.i.v., x50mA FSI IA Slo-Blo cartridge with fuseholder
DI0 IS3180A (Texas) or ZX180. Zener 180V, FS2 150mA cartridge with fuseholder
2mA "Behind -panel" depth not more than lin
Transistor Miscellaneous
TR3 2N1893
Case Contil Mod -2 Type C (West Hyde Develop-
Transformers ments)
TI Mains primary; 10V IA secondary with inter - Display -panel, s.r.b.p. 8in / 2fin x fin
winding screen (e.g. Type TRC by West Hyde Printed circuit Board "C" copper clad Sin x 2in
Developments Ltd., Ryefield Crescent. North- Aluminium brackets for display panel 2fin x lin x fin
wood Hills, Northwood, Middlesex). wide
T2 Mains primary; 250V c.c. 25mA and 6.3V IA Capacitor clip for CIO
secondary (e.g. "Midget Mains 250V" type by Perspex sheet orange translucent fliin x 21in
Radiospares). Heatsinks, clip -on for TR I and TR3 (see photos)
Thin flexible connecting wire different colours
Loudspeaker Nuts and bolts 4 B.A. and 6 B.A. lin
LS I 805I 2fin diameter Grommets and soldering tags. Lettering transfers

15ti 1.1e,:tronies February 1971

 TO 51 TO T2
1254^,
PRINTED CIRCUIT
The printed circuit used for the 180V regulator is of a
simple design which lends itself to home production
using the "paint and etch" system of printed circuit
TR3
ij D9
board construction which many readers will have used
before.
010
The layout is shown in Fig. 16, which also gives
C11 component mounting details. clt is recommended
that the holes be drilled before the printed pattern is
painted on, as this gives a good guide, and enables
more accurate painting to be achieved.
If the constructor does not have facilities for pro-
R30 R29 R28 R27 R26 R25
ducing printed circuits there is no reason why a tag -
board of similar dimensions should not be used to
support the regulator components, though the appear-
ance would not be as neat in this case.
R14 NIXIE DISPLAY
1-19 V4 V3 V2 V1
111111111111111111111111111111
TO T2 The drivers and power supplies used in the Digi-
PIN 12 PIN 12 PIN 12 PIN 12 125V- Clock are capable of handling any type, or make, of
LP1(DECIMAL POINT
NEON)
TO R17
ON BOARD '13.
gas filled numerical indicator tubes currently available,
and alternatives may be directly substituted for the
STC GN5A used in the prototype, with appropriate
wiring changes according to the pin connections.
Manufacturer's data on "Nixie" tubes usually states
that the highest anode voltage available should be
used to drive these devices, and readers may be a little
puzzled by the choice of 180V for this design, as this
is very close to the minimum voltage allowable.
The reason for the choice of such a low voltage is that
the SN7441AN decoder driver is only guaranteed
to "hold off" 55V; a Zener diode connected to each
output breaks down if this voltage is exceeded. This
means that the maximum voltage differential which
can be achieved across the tube is 55V.
In our case, the voltage across the tube when it is
supposed to be off is 180-55V which means that 125V
can still be applied in these circumstances. Obviously,
if the anode supply is raised too far, the 55V differential
Fig. 16. Layout of components on Board "C", the high
will be insufficient to ensure that the cathodes, which are
voltage regulator-shown full size supposed to be off, do not conduct.
COLOUR FILTER
The transistor used in this position must have a high If these cathodes do conduct, an unpleasant back-
Vet) rating to allow for the difference between the un-
regulated input and the regulated output voltage, even ground haze is produced which impairs the readability
under transient conditions. The regulator may be of the display, and in extreme cases more than one
called on to provide up to 10mA at 180V. numeral could become lit within the same tube. For
If the nominal 200V supply rises to more than 220V, a clear "Nixie" display with the view of the unlit
the transistor would get quite hot; hence the clip -on numerals completely suppressed, it is important that a
heat sink used in the prototype. The anode resistors red or orange coloured filter be employed between the
R26 to R30 for the four "Nixie" tubes and the decimal- tubes and the observer.
point indicator are mounted alongside the regulator Although tubes are available with this filter applied as
on the same printed circuit board to give a neat appear- a lacquered coating on the outside of the glass envelope,
ance and to reduce the risk of a damaging short circuit. by far the best system is to use clear tubes with a
Shorting the individual anode outputs to earth will common external filter sheet. In this design the filter
not harm the regulator, because these resistors limit the is produced from a sheet of ordinary orange tinted
current to a safe value. However, if the 180V output Perspex, which performs admirably in this role, mounted
is shorted, the transistor will be instantly destroyed. on the front of the clock to form the viewing window.
In fact, in this design, the series pass transistor is used The decimal point separating the two "minutes"
as a "fuse", it being impossible to use a conventional indicators from the "hours" section has to be provided
fuse link to afford any protection to a device operated separately when using the GN5A "Nixies", as these
under these conditions. devices do not have integral points as do some other
types. In the prototype a Hivac type IMH "Mini-
The 150mA fuse FS2 in the "earthy" line of the cator", miniature neon, performed well in this role,
transformer will only be able to act fast enough to and was driven from the 180V supply via a 100K
protect the diodes and the transformer itself, and the resistor. Any small neon lamp, such as used for mains
only way the transistor can be protected is by using a indicators, could be used with the correct value of
current limiter similar to that used in the 5V regulator, a series resistor R30.
course considered unnecessarily expensive in the
prototype. Next month: Final wiring and testing
Practical Electronics February 1971 161
 .1111
By R.W. Coles
T Imm116
AS MENTIONED in the first part of this article, "Contil"
Mod -2 case type "C" is used to house the Digi-
Clock, and this makes construction much simpler than
if a "one-off" case design were to be employed.
The front and back panels of these cases are formed
from p.v.c. covered aluminium, which makes the
necessary hole cutting quite easy. The only tools
absolutely necessary are a hand drill and a good file,
but a clean and neat finish can be more easily achieved
with a nibbling tool such as the "Monodex" sheet
metal cutter.
CONSTRUCTION ON CHASSIS
The chassis supplied with the case is also made of
aluminium and is used as a base -plate for all the main
components, including the three circuit boards which
are spaced from it only by three 6BA nuts. The
chassis is earthed and acts as a low impedance "ground
plane" for the logic circuitry, thus increasing the
noise immunity of the system.
The series pass transistor TR2 employed by the 5V
regulator uses the chassis as a heat sink; it is vital
that this transistor is isolated from the aluminium
by an insulating mica washer of the type normally
supplied with this type of device.
216
T1 Part 4
Drilling dimensions for the chassis and front and
back panels are given in the diagrams, and it is impor-
tant to remember that some of the chassis holes are
required to match other holes drilled by the constructor
in the circuit boards and the display panel bracket. It
is preferable to match these chassis holes to the latter,
rather than drill all the holes straight from the diagrams.
The mounting bracket for the "Nixie" tubes is made
from -kin s.r.b.p. sheet, and as can be seen from the
diagram, the tubes are inserted directly into holes
drilled in this bracket, no bases being employed.
With the dimensions given, the tubes are a tight fit
in their mountings, and no extra fixative was used in
the prototype. A dab of contact adhesive could be
used if necessary, and still allow the tubes to be re-
moved should this ever be desirable. Valve bases
type B12A are available for the GN5A although the
numeral spacing would have to be altered if these are
used, since the tubes would not be so close together.
The decimal point indicator is mounted in a iin coil
former or some other suitable tube, cut to the dimen-
sions shown, and fastened to the display panel with
contact adhesive. When being installed, the neon is
simply pushed through from the rear of the bracket, its
insulated leads providing all the tension necessary to
retain it in the tube.
Practical Electronics March 1971
 4 15 *A. Holes 6BA clear
6 Holes 4 BA clear
1 C. Hole 2BA clear
1 Hole made to suit
grommet
2 E Holes C/sunic 6BA
3 /i

614

534

tA

21/4
-+L

13a tv;
5,4
61/1;

Fig. 17.Chassis drilling details assuming components used are as specified in the components list. Modifications may be
necessary for variations of component type. Clearance above chassis fin

1/4 71/2

63/;
45/8

O 0c OoC oo CO O OC
0
0 o O
O 0 0 O
21/2
,34
O O
O 0 o 1/"
00 00 O.0 00
-A+
Brocket(2off)made
from 3X ix
aluminium angle

1 1

4 'A' Holes 6BA clear 2 /4

1,g Hole made to suit 4 holes
decimal point indicator 3/8" Aladdin coil former
6BA clear
4C Groups as shawl modified as shown
and used as decimal
point indicator /2 3hb
support tube
1/4

Fig. 18. Display panel drilling for "Nixie" tubes

217
Practical Electronics March 1971
 Fig. 19. Back panel drilling details for components specified

I sho'

3/4"
11/2---).

0 0
L
DRILL TO SUIT
OVERLAY OF PERSPEX 7" X 2,Y: ALARM SMITCHNb

Fig. 20. Front panel drilling details for components specified

Table I: CONNECTIONS TO MAIN CLOCK BOARD "A"

(a) Plain side terminations (b) Copper side terminations

IC Hole Board Wire IC Hole Board Wire

Number Number "A" Colour Destination Number Number "A" Colour Destination
Outlet Outlet
-Resistor RI- green T2, 6.3V
! 6E 2 black S la wiper 23
6 2E 3 red Slc wiper 24
6 6A 4 orange S I b wiper 4 6H 25 pink V4 pin 10
13 4F 5 red Board B5 4 6G 26 green V4 pin I

13 3C 6 orange Board B4 4 2A 27 red V4 pin 2

13 38 7 pink Board B3 4 6A 28 brown V4 pin 3
9 2H 8 violet Board BI 4 6E 29 black V4 pin 4
12 3E 9 green Board B9 4 6F 30 white V4 pin 5
9 2F 10 blue Board 813 4 6C 31 yellow V4 pin 6
ALL Ground II black chassis 4 6B 32 orange V4 pin 7
Rail 4 2H 33 grey V4 pin 8
ALL -,- Vee rail 12 red Board 812 4 2G 34 violet V4 pin 9
12 3B 13 brown Board BI 0 2 6H 34 orange V2 pin I
3G 14 yellow Board 82 2 7G 36 green V2 pin 2
I 7H 115 (optional hours 10
. 2 2A 37 grey V2 pin 3
zero line to VI pin 10) 2 7A 38 brown V2 pin 4
I 7G 16 yellow VI pin I 2 7E 39 pink V2 pin 5
3 6H 17 grey V3 pin 10 2 7F 40 yellow V2 pin 6
3 6G 18 pink V3 pin I 2 7C 41 red V2 pin 7
3 3A 19 white V3 pin 2 2 7B 42 black V2 pin a
3 6A 20 violet V3 pin 3 2 2H 43 white V2 pin 9
3 7E 21 yellow V3 pin 4 2 2G 44 violet V2 pin 13
3 6F 22 green V3 pin 5

218 Practical Electronics tvLirch 1971

 51a WIPER

Sic
WIPER
FS1
IA

I
MAINS
SUPPLY
VIOLET TO BOARD '13'
Sib WIPER
OUTLET
BRIDGE
TO BOARD )1'
RECTIFIER
OUTLETS 2,3 & 4
D4-7 MAINS
(SEE TABLE 1)
PRI

0 MAINS
CHASSIS
0 PRI
O BOA 'C

52a

TO BOARD 'B' TO BOARD 'B'

R17 GREEN OUTLETS 6,7,B,
TO BOARD '13' 15,16,17 AND
TO BOARD 'A'
OUTLET 12 OUTLET I (SEE TABLE 2) ALARM
TIME
BLACK SWITCH
VIOLET

HOURS MINUTES
V3 V4
V2
o
VI
0 0 0 L 00 0 0
0 0
0 0 0 0

Fig. 21. Wiring of components on top

of chassis and on display panel (bottom
and back panel (top)

PRINTED BOARDS "A" AND "B"

The circuit boards carrying the i.c.s are mounted on
Table 2: CONNECTIONS TO the chassis by means of 6BA bolts passing through each
ALARM BOARD "B"
Copper side terminations only corner. Remember that the printed sides of these
boards are adjacent to the chassis in the final assembly,
iC Hole Board Wire and it will be necessary to make breaks in some cases
Number Number "B" .Colour Destination in the printed tracks near the corner holes to prevent
Outlet shorts to the chassis via the spacer nuts. Any breaks
19 7D 1 violet LS I made for this purpose must be reconnected with wire
3H 2 yellow Board A14 links on the wiring side of the board.
15 3F 3 pink Board A7 Note that in Fig. 13 last month C8 should be connected
15 3A 4 orange Board A6 to the link wire to C7 and pin 4 of 1C19.
15 7B red Board A5 Uking lin long bolts at the board corners allows
S2a/4
15 3E 6
7
black
violet S2a/2
their use as "legs" to support the chassis during
IS 313
wiring up, damage to the delicate boards being avoided.
6C 8 brown S2a/I
15
16 2H 9 green Board A9 The transformers perform a similar task on the other
16 3F 10 brown Board A 13 side of the chassis.
ALL Ground II black chassis
Rail
Vee rail red Board Al2 (5V) WIRING UP
ALL 12
16 2A 13 blue Board A 10 Once all the major components have been mounted
16 6B 14 violet Board A8 on the chassis and the circuit boards have been tested
16 6H IS orange S2b/8 for accuracy of fit, wiring up of the power supplies
16 3E 16 grey S2b/4 can be carried out. There is no need to attach the back
16 313 17 red S2b/2 panel wiring permanently at this stage, although it
16 6C 18 blue S2b/1
should be hooked in temporarily while the power
18 6D 19 orange S3 (OFF)
(collector of TR I) 20 red I TR2 collector, (10V). supplies are tested, before proceeding further.
Resistor
When the power supplies are operating satisfactorily,
R21, 22 46 21 yellow TR2 emitter the interboard wiring can be started, remembering
(TR I that the 5V regulator board has two wires leaving it
emitter) 3F 22 green TR2 base which do not pass through the edge connector. All
connections are given in Tables I and 2 for the boards

219
Practical Electronics March 1971
 carrying the i.c.s. It is most important that only
very fine p.v.c. covered flexible wire be used for this
stage of the wiring, no other type of wire is suitable,
as will become obvious as you proceed to wire up the
Main Clock Board "A" edge connector with its 42
connections.
On completion of the interboard wiring the front
and rear panels and their associated components can
be attached to the chassis and the wiring finished off.
The alarm speaker should be glued carefully to the
rear panel with contact adhesive, making sure that it
does not foul the smoothing capacitor or bridge
rectifier wiring. The orange tinted Perspex filter is also
fixed to the outside of the "Nixie" window front -panel
cut-out with contact adhesive, and of course it is
important that this operation be carried out with care
to ensure a neat appearance.
The front and rear panels are finished off with "Letra-
set" dry print transfer lettering. The lettering should
be sprayed with clear lacquer fixative to avoid damage
during handling.
If all is still well, the alarm circuit can now be checked.
With the alarm "reset" switch in the "off" position, any
valid time may be entered on the thumbwheel switches,
after which the "alarm reset" switch is returned to the
"set" state. When the "hours" and "tens of minutes"
display counts to the same time as the alarm setting,
the alarm should sound, and may be silenced by
returning the "reset" switch to the "off" position.
This check can be carried out with the clock running
at a fast speed, making it a quick job to test all the
alarm settings.
FAULT LOCATION
If problems are encountered during any of these
tests, a constructor who has become familiar with the
logic of the Digi-Clock should find it a fairly simple
matter to trouble -shoot with the aid of a logic probe
such as that shown in Fig. 22 or even a multimeter
set to the low voltage range.

TESTING
There are no controls on the Digi-Clock which have
to be set-up before operation, except the voltage
control on the 5V regulator which should be set-up
when the regulator wiring is completed, before its
connection to the Vec lines to the i.c. boards. This
control setting should be rechecked with the clock
operating normally, to ensure that the 5V line is as
accurate as possible.
If on switching on for the first time, all appears
healthy, the set -time switch may be used to set the Silicon NPN
display to the correct time. eg 29706
With the switch set to the "fast" position, the
minutes counter will be counting 600 times faster than
normal, making it a simple job to set the display to
within about 15 minutes of the correct time. The
slow position is then used to facilitate the final setting,
a minute being clocked up every second. As soon as
the display is correct the switch is returned to the to Chassis

"normal" position, and the clock continues normally. Fig. 22. Simple test circuit or logic probe
220
Practical Electronics March 1971
 The important thing to remember if a fault is present
in the logic circuitry, is that ten minutes working out
what could be the problem with a pencil and paper,
is worth hours of aimless probing and measuring.
Logic faults, providing they have symptoms observable
through the display, are not hard to find because they
always follow some form of sequence, which, when
analysed, usually yields the answer, without any
testing in the usual sense.
One of the easiest faults to occur is the incorrect
sequence of time indication, possibly with more than
one digit showing on one tube. In this case, check
that there are no short circuits or solder runs between
adjacent outlets on the Main Clock Board "A". If
erroneous alarm triggering should occur, check for a
similar fault on the Alarm Board "B". Also make
sure that the copper strips are cut correctly as shown
at "X" in the first photograph (last month).
Check for solder runs between adjacent strips of
copper; where these should not occur remove the solder.
The wiring diagrams in Figs. 5 and 13 show the only
places where these may occur intentionally.
The wiring tables and diagrams give colours to the SOUND CONTROLLED
wires as they were in the prototype. There is no LIGHT DISPLAY
reason why these should not be changed, but they are
given to help the constructor to follow the wiring
through if a fault is apparent. Following its recent success
at the Audio & Music Fair,
TENS OF HOURS DISPLAY Practical Electronics now
Readers may have noticed that in the block diagram presents the full do-it-your-
given in part one of this project, the tens of hours self details of this fascinating
"Nixie" has two connections to its cathodes, one being addition to the sound scene.
a dotted line to the "0" numeral. This connection Part one of thisseries appears
was shown in this way because it is a matter of personal in the April issue.
taste whether the "0" needs to be used at all, a more P.E. Aurora is a controlled
conventional readout being given by allowing this tube colour light display system
to be completely blank during the hours of one to which can be fed from any
nine o'clock.
The decoder is, of course, able to accommodate audio amplifier to provide the
either method, and the wiring diagram given in part one appropriate mood setting in
includes an edge connector contact for the "0" at the home or discotheque. It
outlet 15 of Board "A" so that it can be wired up if will respond to serious music
desired. This would be connected to pin 10 of VI. or pop and can be arranged
to give random displays from
MODIFICATIONS a digital sequencer.
Apart from the alarm expansion scheme discussed
in Part 2, many other improvements can be incorporated
in the Digi-Clock if required. The operation of the Also:
clock counters could be altered to conform to the 24
hour system, counting could be extended to include an
a.m./p.m. flip-flop, or even a calendar, provided the
extra components required could be accommodated. * BOAT SPEED
A slave display, or even several slave displays, could
be driven by the basic circuit. In this case the outputs
INDICATOR
of the clock counters should be buffered by TTL gates
or inverters and fed to lines which terminate in further
buffers at the slave end.
* DOOR YODELLER
Fairly long lines could be driven by this method
because of the slow speed operation and the relative
unimportance of noise at this end of the system. PRACTICAL
The slave units would consist of a few buffer gates as
mentioned and four SN7441AN decoders to drive the
"Nixies". A simple power supply would also be
needed.
Finally, for anyone who finds the fairly high outlay on
the Digi-Clock components unjustifiable, the master -
slaves system might tip the balance, because this type APRIL ISSUE ON SALE
of system would become more economic as more slaves
were added. MARCH 19
221
Practical Electronics March 1971