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Ijetae 0214 03
Ijetae 0214 03
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)
12
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)
30 min-isochronal annealing was conducted in the
temperature ranges from 350oC to 650oC. As shown in Fig. 100000 o
400 C
2-(a), for P-doped samples annealed at temperatures greater 80000 o
450 C
than 600oC the sheet resistance gradually decreases as 60000
40000
o
500 C
o
550 C
acceleration voltage increases, while it initially decreases o
600 C
with acceleration voltage and increases again with o
650 C
Rs (/sq)
8000
acceleration voltage beyond a certain value for the samples
annealed at temperatures lower than 500oC. A 6000
550oC for 30 min, and Fig. 3-(c) shows the one annealed at
0
600oC for 30 min. TEM results indicate that implanted 2 3 4 5 6
damage is not recovered sufficiently even for the sample Acceleration Voltage (kV)
annealed at 550oC.
In contrast to the case of P-doping the sheet resistance (b)
decreases as the acceleration voltage increases in B-doped Fig. 2 Sheet resistance vs. acceleration voltage for the samples doped
sample except for the samples annealed at 650oC. Since with (a) phosphorous and (b) boron, respectively.
boron is a light mass ion damage may not be generated to a
significant amount. If we look at Fig. 2-(b) carefully the
values of sheet resistance have an abnormal relationship
with annealing temperatures. In the case of 6 kV-
implanted samples the sheet resistance decreases as the
annealing temperature increases.
(a)
13
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)
Carrier concentration, however, increases as annealing
temperature increases up to 550oC, while it decreases as
annealing temperature increases beyond 550oC, for P-
doped samples as indicated in Fig. 5-(a). It can thus be
said that reverse annealing starts at 550oC in P+ ion
shower doped poly-Si.
Reverse annealing is well known phenomenon for B-
doped single crystalline silicon using a mass separated ion
implanter. Seidel et al. reported that reverse annealing is
observed in single crystalline silicon implanted with boron
in the temperature ranges between 500oC and 600oC [7]. B-
(b) doped samples were observed to exhibit reverse annealing
behavior as indicated in Fig. 5-(b). Reverse annealing,
however, begins at lower temperatures in B-doped poly-Si
samples compared to B-doped single crystalline silicon.
Reverse annealing already starts from 350oC in B+ ion
shower doped poly-Si. Unlike semiconductor processing, in
which a bulk single crystalline silicon is used, LTPS-TFTs
make use of a very thin poly-Si, which serves as an active
layer on the top of a SiO2 dielectric layer. Thus the
structure of LTPS-TFTs is similar to silicon-on-insulator in
that they both include a silicon/buffer oxide interface [8].
As the interface between the poly-Si and SiO2 buffer layer
on top of the glass substrate acts like a diffusion barrier for
(c)
the Si self-interstitials, the self-interstitials generated by ion
Fig. 3 TEM micrographs for (a) the sample implanted with 15-kV P+, implantation tend to be supersaturated in a thin poly-Si
followed by (b) 550℃-30min annealing, and (c) 600℃-30min layer. Such factors are bound to significantly affect the
annealing.
activation behavior of ion-implanted poly-Si. This may
Figure 4 shows sheet resistance as a function of explain the reason why we observed reverse annealing at
annealing temperature for P-doped samples with significantly lower temperatures in B-doped poly-Si
acceleration voltage from 3 kV to 15 kV, and for B-doped samples. Reverse annealing seems to end at 600oC for the
samples with acceleration voltage from 2 kV to 6 kV, samples implanted with lower acceleration voltage.
respectively. The sheet resistance decreases as annealing
temperature increases as indicated in Fig. 4-(a) for P-doped 100000
3kV
samples. Large increase in sheet resistance for 15 kV- 80000
5kV
implanted samples annealed at temperatures blow 500oC 60000
40000
10kV
15kV
can be explained by the effect of uncured damage as
already indicated in Fig. 3.
Rs (/sq)
8000
The sheet resistance, however, has an unusual
relationship with annealing temperature for B-doped 6000
14
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)
21000
2.0kV 3kV
3.0kV 1E15 5kV
18000
4.5kV 10kV
12000
9000
6000
1E14
3000
0
350 400 450 500 550 600 650
o 400 450 500 550 600 650
Temperature ( C)
o
Temperature ( C)
(b)
(a)
Fig. 4 Sheet resistance as a function of annealing temperature (a)
Phosphorous doping with acceleration voltages from 3 kV to 15 kV
(b) Boron doping with acceleration voltages from 2 kV to 6 kV.
2.0kV
As mentioned earlier reverse annealing is related to Si Carrier Concentration (cm ) 3.0kV
-2
4.5kV
self-interstitials released from the ion induced damage- 6.0kV
15
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)
IV. CONCLUSIONS REFERENCES
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