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International Journal of Emerging Technology and Advanced Engineering

Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)

Dopant Activation in Ion-shower-doped Poly-Si


Jae-Sang Ro
Department of Materials Science and Engineering, Hongik University, Seoul, 121-791, Korea
Abstract— Abnormal behavior of dopant activation was II. EXPERIMENTAL PROCEDURE
observed in P +/B+ ion shower doped poly-Si upon post implant
annealing. Phosphorous or boron was implanted by ion
For the sample preparation SiO2 insulation layer with a
shower doping using a source gas mixture of PH 3/H2 or thickness of 3000 Å was formed on a Corning 7059 glass
B2H6/H2. Activation annealing was conducted using a tube substrate of 370 mm x 470 mm x 0.7 mm (length x width x
furnace in the temperature ranges from 350oC to 650oC. Hall thickness) by means of plasma enhanced chemical vapor
measurement revealed that reverse annealing occurred for deposition (PECVD). An a-Si thin film with a thickness of
poly-Si implanted with P and B, respectively. It was observed 500 Å was formed successively upon the insulation layer
that reverse annealing starts at 550oC in P+ ion shower doped using PECVD. The substrates used were poly-Si produced
poly-Si, while at 350oC in the case of B-doping. by excimer laser crystallization on 500 Å-thick PECVD a-
Si. The glass substrate was broken into pieces of 20 mm x
Keywords— Activation, Ion shower doping, LTPS, Reverse
annealing, TFTs 20 mm, thereby preparing a test piece. Phosphorous or
boron was implanted by ion shower doping with a main ion
I. INTRODUCTION source of P2 Hx or B2Hx using a source gas mixture of
PH3/H2 or B2H6/H2 as shown in Fig. 1. Activation
Non-mass analyzed ion shower doping (ISD) technique annealing was performed in the temperature ranges from
with a bucket-type ion source has been widely used for 350oC to 650oC for 30 min using a tube furnace in nitrogen
source/drain doping, for LDD (lightly-doped-drain) ambient. Carrier concentration by dopant activation was
formation, and for channel doping in fabrication of low- determined by Hall measurement using a van der Paw
temperature polycrystalline silicon (poly-Si) thin-film method. A 4-point-probe was used to check the value of
transistors [1,2,3]. Phosphorous or boron can be implanted sheet resistance determined by Hall measurements. The as-
using ion shower doping with a mixture gas of PH3 or implanted damage induced by ion shower doping and
B2H6, diluted with H2 [4]. Due to non-mass-separation damage recovery following an activation annealing was
nature of ISD, hydrogen atoms incorporated into poly-Si assessed with transmission electron microscopy (TEM).
films after ion shower doping may play an important role in
enhanced dopant activation and passivation of defects.
Activation efficiency of dopant atoms in single crystalline
or polycrystalline silicon is therefore higher for ISD than
for mass-separated ion implantation [3]. Greater electrical
activation has been reported in the hydrogeneated samples
at lower temperatures below 600oC [5].
In the case of boron implantation, activation at lower
temperatures is limited by the formation of boron-
interstitial clusters easily formed at concentrations lower
than solid solubility limit. The presence of mobile
hydrogen atoms may assist in the breakup of boron-
interstitial clusters and hydrogen effusion during annealing
Fig. 1 Schematic diagram of ion-shower-doping system used in this
may create vacancies. Low energy H+ ion implantation work.
following As implantation with low temperature annealing
was reported to be effective for damage passivation and III. RESULTS AND DISCUSSION
dopant activation [6]. Meanwhile, reverse annealing is well
known phenomenon for B implantation into single Acceleration voltage was changed from 3 kV to 15 kV
crystalline silicon in the temperature ranges between 500oC for P doping and from 2 kV to 6 kV for B doping. Doping
and 600oC. We observed reverse annealing in P+/B+ ion time was kept constant as 1 min for all samples used in this
shower doped poly-Si and report here on its behavior. study. Figure 2 shows sheet resistance as a function of
acceleration voltage after activation annealing.

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International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)
30 min-isochronal annealing was conducted in the
temperature ranges from 350oC to 650oC. As shown in Fig. 100000 o
400 C
2-(a), for P-doped samples annealed at temperatures greater 80000 o
450 C
than 600oC the sheet resistance gradually decreases as 60000
40000
o
500 C
o
550 C
acceleration voltage increases, while it initially decreases o
600 C
with acceleration voltage and increases again with o
650 C

Rs (/sq)
8000
acceleration voltage beyond a certain value for the samples
annealed at temperatures lower than 500oC. A 6000

concentration profile of implanted atoms becomes broader 4000


and the peak concentration at the projected range gets
2000
lower as the acceleration voltage increases. An excess
concentration of dopant atoms beyond solid solubility at a 0
2 4 6 8 10 12 14 16
given annealing temperature thus becomes large as the Acceleration Voltage (kV)
acceleration voltage decreases. Activation efficiency is
therefore higher as the acceleration voltage increases. This
(a)
may explain the decrease of sheet resistance with
acceleration voltage.
Meanwhile, for the samples implanted with higher 12000
o
400 C
o
acceleration voltage followed by low temperature 450 C
o
500 C
annealing as-implanted damage by high mass ion such as P 10000 o
550 C
o
may not be sufficiently cured. This may explain the 8000
600 C
o
650 C
increase of sheet resistance with acceleration voltage.
Rs (/sq)

Figure 3 shows transmission electron microscopy (TEM) 6000

for the samples implanted with acceleration voltage of 15 4000


kV for 1 min. Figure 3-(a) shows TEM micrographs for as-
implanted sample, Fig. 3-(b) shows the one annealed at 2000

550oC for 30 min, and Fig. 3-(c) shows the one annealed at
0
600oC for 30 min. TEM results indicate that implanted 2 3 4 5 6

damage is not recovered sufficiently even for the sample Acceleration Voltage (kV)

annealed at 550oC.
In contrast to the case of P-doping the sheet resistance (b)
decreases as the acceleration voltage increases in B-doped Fig. 2 Sheet resistance vs. acceleration voltage for the samples doped
sample except for the samples annealed at 650oC. Since with (a) phosphorous and (b) boron, respectively.
boron is a light mass ion damage may not be generated to a
significant amount. If we look at Fig. 2-(b) carefully the
values of sheet resistance have an abnormal relationship
with annealing temperatures. In the case of 6 kV-
implanted samples the sheet resistance decreases as the
annealing temperature increases.

(a)

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International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)
Carrier concentration, however, increases as annealing
temperature increases up to 550oC, while it decreases as
annealing temperature increases beyond 550oC, for P-
doped samples as indicated in Fig. 5-(a). It can thus be
said that reverse annealing starts at 550oC in P+ ion
shower doped poly-Si.
Reverse annealing is well known phenomenon for B-
doped single crystalline silicon using a mass separated ion
implanter. Seidel et al. reported that reverse annealing is
observed in single crystalline silicon implanted with boron
in the temperature ranges between 500oC and 600oC [7]. B-
(b) doped samples were observed to exhibit reverse annealing
behavior as indicated in Fig. 5-(b). Reverse annealing,
however, begins at lower temperatures in B-doped poly-Si
samples compared to B-doped single crystalline silicon.
Reverse annealing already starts from 350oC in B+ ion
shower doped poly-Si. Unlike semiconductor processing, in
which a bulk single crystalline silicon is used, LTPS-TFTs
make use of a very thin poly-Si, which serves as an active
layer on the top of a SiO2 dielectric layer. Thus the
structure of LTPS-TFTs is similar to silicon-on-insulator in
that they both include a silicon/buffer oxide interface [8].
As the interface between the poly-Si and SiO2 buffer layer
on top of the glass substrate acts like a diffusion barrier for
(c)
the Si self-interstitials, the self-interstitials generated by ion
Fig. 3 TEM micrographs for (a) the sample implanted with 15-kV P+, implantation tend to be supersaturated in a thin poly-Si
followed by (b) 550℃-30min annealing, and (c) 600℃-30min layer. Such factors are bound to significantly affect the
annealing.
activation behavior of ion-implanted poly-Si. This may
Figure 4 shows sheet resistance as a function of explain the reason why we observed reverse annealing at
annealing temperature for P-doped samples with significantly lower temperatures in B-doped poly-Si
acceleration voltage from 3 kV to 15 kV, and for B-doped samples. Reverse annealing seems to end at 600oC for the
samples with acceleration voltage from 2 kV to 6 kV, samples implanted with lower acceleration voltage.
respectively. The sheet resistance decreases as annealing
temperature increases as indicated in Fig. 4-(a) for P-doped 100000
3kV
samples. Large increase in sheet resistance for 15 kV- 80000
5kV
implanted samples annealed at temperatures blow 500oC 60000
40000
10kV
15kV
can be explained by the effect of uncured damage as
already indicated in Fig. 3.
Rs (/sq)

8000
The sheet resistance, however, has an unusual
relationship with annealing temperature for B-doped 6000

samples as shown in Fig. 4-(b). Figure 5 shows sheet 4000

carrier concentration determined by Hall measurement


2000
using a van der Paw method as a function of annealing
temperature for the samples implanted with P and B, 0
400 450 500 550 600 650
respectively. Carrier concentration increases as acceleration Temperature ( C)
o

voltage increases at a given annealing temperature as


shown in Fig. 5. (a)

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International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)

21000
2.0kV 3kV
3.0kV 1E15 5kV
18000
4.5kV 10kV

Carrier Concentration (cm )


-2
6.0kV 15kV
15000
Rs (/sq)

12000

9000

6000
1E14

3000

0
350 400 450 500 550 600 650
o 400 450 500 550 600 650
Temperature ( C)
o
Temperature ( C)

(b)
(a)
Fig. 4 Sheet resistance as a function of annealing temperature (a)
Phosphorous doping with acceleration voltages from 3 kV to 15 kV
(b) Boron doping with acceleration voltages from 2 kV to 6 kV.
2.0kV
As mentioned earlier reverse annealing is related to Si Carrier Concentration (cm ) 3.0kV
-2

4.5kV
self-interstitials released from the ion induced damage- 6.0kV

region [9-11]. As primary damage such as silicon self- 1E14


interstitials generated by ion implantation is
thermodynamically unstable, they may agglomerate
themselves to form extended defects, or, they may migrate
and bind with boron atoms to form boron-interstitial
clusters. Once boron-interstitial clusters are produced,
1E13
boron atoms become electrically inactive, thus resulting in
the loss of charge carriers. As the diffusion of both boron 350 400 450 500 550 600 650
atoms and silicon self-interstitials is required, the kinetics Temperature ( C)
o

associated with the formation of boron-interstitial clusters


would be a slow process. Based on this argument, damage
(b)
recovery would be required in order to release self-
interstitials for formation of boron-interstitial clusters Fig. 5 Sheet carrier concentration as a function of annealing
resulting in reverse annealing. This would explain why temperature determined by Hall measurement. (a) Phosphorous
doping with acceleration voltages from 3 kV to 15 kV (b) Boron
activation efficiency becomes lower as the annealing doping with acceleration voltages from 2 kV to 6 kV.
temperature increase as demonstrated in Fig. 5-(b).

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International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 4, Issue 2, February 2014)
IV. CONCLUSIONS REFERENCES
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