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SASTRA » Computer Organization & Architecture
Unit 1 - Introduction to Computer Organization
Course outline
Assignment 1
Introduction The due date for submitting this assignment has passed.
to Due on 2022-12-11, 23:59 IST.
Computer
Organization Assignment submitted on 2022-09-29, 20:13 IST
 ()
1) The way in which the components are interrelated is called as ---------- 1 point
L1.1(a) Basic Computer
concepts and Function
evolution - Interlink
Computer Structure
components
Yes, the answer is correct.
and Score: 1
functions Accepted Answers:
(unit? Structure
unit=1&lesson=2)
2) The operations of the computer is decided by 1 point
L1.1(b) Basic
ALU
concepts and
evolution - Control Unit
Computer Memory
components None of these
and Yes, the answer is correct.

Score: 1
functions
Accepted Answers:
(unit? Control Unit
unit=1&lesson=3)
3) Memory is accessed by --------- 1 point
Quiz:
Assignment Flags
1 IR
(assessment? MAR
name=78) PC
No, the answer is incorrect.
L1.2-Data Score: 0
representation Accepted Answers:
(unit? MAR
unit=1&lesson=4) 4) The next instruction address is available in the register -------- 1 point
L1.3-Number Flags
Systems IR
(unit? MAR
unit=1&lesson=5) PC
Quiz: Yes, the answer is correct.
Assignment Score: 1
Accepted Answers:
2
PC
(assessment?
name=82) 5) Mani memory has ----------- 1 point
L1.4- Both instruction and data

Arithmetic: Data
Addition and Instruction
Subtraction- None of the above
P1 (unit?
unit=1&lesson=6) Score: 1
Accepted Answers:
L1.4-
Both instruction and data
Arithmetic:
Addition and 6) Vaccum tubes are used in ----------- generation computers 1 point
Subtraction-
First
P2 (unit?
Fourth
unit=1&lesson=7)
Second
L1.4- Third
Arithmetic:Addition
and Score: 1
Subtraction- Accepted Answers:
P3 (unit? First
unit=1&lesson=8)
7) Bus is used for ------ 1 point
L1.4-
All three
Arithmetic:Addition
Data manipulation
and
Data movement
Subtraction-
Data storage
P4 (unit?
unit=1&lesson=9) No, the answer is incorrect.
Score: 0
L1.4- Accepted Answers:
Data storage
Arithmetic:Addition
and
8) The instruction fetched from memory is placed in the_______ and contents of 1 point
Subtraction- ___________ incremented so that it contains the address of_______ instruction in the
P5 (unit? program
unit=1&lesson=10)
Data register-Program counter-next
Quiz: Instruction register-Program counter-first
Assignment
3 Instruction register-Program counter-last
(assessment? Instruction register-Program counter-next
name=81) No, the answer is incorrect.
Score: 0
L1.5(a)-
Accepted Answers:
Multiplication- Instruction register-Program counter-next
P1 (unit?
9) When CPU is executing a Program ,operating System, is said to be in 1 point
unit=1&lesson=11)
_____________
L1.5(a)-
Interrupt mode
Multiplication-
Kernel Mode
P2 (unit?
System mode
unit=1&lesson=12)
normal mode
L1.5(a)- Yes, the answer is correct.
Multiplication- Score: 1
P3 (unit? Accepted Answers:
System mode
unit=1&lesson=13)
L1.5(a)- 10) ______is the sequence of operations performed by CPU in processing an 1 point
Multiplication- instruction:
P4 (unit? Decode
unit=1&lesson=14) Execute cycle
L1.5(a)- Fetch cycle
Multiplication- Instruction cycle
P5 (unit? Yes, the answer is correct.

Score: 1
unit=1&lesson=15)
Accepted Answers:
L1.5(b)- Instruction cycle
Division–P1
(unit?
unit=1&lesson=16)
L1.5(b)-
Division-P2
(unit?
unit=1&lesson=17)
Quiz: Quiz:
Assignment
4
(assessment?
name=86)
L 1.6-
Floating
Point
representation-
P1 (unit?
unit=1&lesson=18)
L1.6-Floating
Point
Representation-
P2 (unit?
unit=1&lesson=19)
L 1.6-
Floating
Point
representation-
P3 (unit?
unit=1&lesson=20)
L 1.6-
Floating
Point
representation-
P4 (unit?
unit=1&lesson=21)
L 1.6-
Floating
Point
representation-
P5 (unit?
unit=1&lesson=22)
Quiz: Quiz
Assignment -
5
(assessment?
name=87)
L1.7-Memory
system and
hierarchy-P1
(unit?
unit=1&lesson=23)
L1.7-Memory
system and
hierarchy-P2
(unit?
unit=1&lesson=24)
L1.7-Memory
system and
hierarchy-P3
(unit?
unit=1&lesson=25)
L1.7-Memory
system and
hierarchy-P4
(unit?
unit=1&lesson=26)
L1.8-
Arithmetic
Logic Unit-P1
(unit?
unit=1&lesson=27)
L1.8-
Arithmetic
Logic Unit-P2
(unit?
unit=1&lesson=28)
Quiz: Quiz
assignment 6
(assessment?
name=88)
Principles
of
Computer
 Design ()
Storage &
 Memory ()
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
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Course outline
Assignment 2
to Due on 2022-12-11, 23:59 IST.
Computer
 ()
1) Integers will come under ---------- data representation 1 point
L1.1(a) Basic Binary
concepts and Byte
evolution - Qualitative
Computer Quantitative
components
and Score: 0
(unit? Qualitative
unit=1&lesson=2)
2) How many distinct numbers can be represented by using 8 bits 1 point
L1.1(b) Basic
-127 to 127
concepts and
evolution - -128 to+127
Computer 256.0
components 8.0

Score: 1
functions
Accepted Answers:
(unit? 256.0
unit=1&lesson=3)
3) MSB is used as ---------- 1 point
Quiz:
Assignment Carry bit
1 Overflow bit
(assessment? Parity bit
name=78) Sign bit
L1.2-Data Score: 0
(unit? Sign bit
unit=1&lesson=4) 4) The binary representation of the octal number 123 is -------- 1 point
L1.3-Number 100100011.0
Systems 1010011.0
(unit? 1101111.0
unit=1&lesson=5) 1111011.0
Quiz: No, the answer is incorrect.
Assignment Score: 0
Accepted Answers:
2
1010011.0
(assessment?
name=82) 5) 425 is a valid number in ----- number system 1 point
L1.4- Base 3
Arithmetic: Base 4
Addition and Base 5
Subtraction- Base 6
P1 (unit?
Accepted Answers:
L1.4-
Base 6
Arithmetic:
Addition and 6) The binary equivalent for the decimal number 0.375 is ------- 1 point
Subtraction-
0.011
P2 (unit?
0.101
unit=1&lesson=7)
0.11
L1.4- 1.011
Arithmetic:Addition
and Score: 1
Subtraction- Accepted Answers:
P3 (unit? 0.011
unit=1&lesson=8)
7) The binary equivalent for the hexa decimal number 0.37 is ------- 1 point
L1.4-
0.0001
Arithmetic:Addition
0.00110111
and
0.011
Subtraction-
0.011111
P4 (unit?
unit=1&lesson=9) Yes, the answer is correct.
Score: 1
L1.4- Accepted Answers:
0.00110111
Arithmetic:Addition
and
8) The weight of 1 in the hexa decimal number 23.212 is ---- 1 point
Subtraction-
P5 (unit? 1/16
unit=1&lesson=10) 1/256
16.0
Quiz:
256.0
Assignment
3 No, the answer is incorrect.
Score: 0
(assessment?
Accepted Answers:
name=81) 1/256
L1.5(a)- 9) 2 power 20 is ----------- 1 point

Multiplication-
Giga
P1 (unit?
Mega
unit=1&lesson=11)
Tera
L1.5(a)- kilo
Multiplication- Yes, the answer is correct.
P2 (unit? Score: 1
unit=1&lesson=12) Accepted Answers:
Mega
L1.5(a)-
Multiplication- 10) 2s complement of 8 in the 4 bit representation is -------------- 1 point
P3 (unit?
1000.0
unit=1&lesson=13)
11000.0
L1.5(a)- 111.0
Multiplication- None of the options are correct
P4 (unit? No, the answer is incorrect.
Accepted Answers:
L1.5(a)- None of the options are correct
Multiplication-
P5 (unit?
unit=1&lesson=15)
L1.5(b)-
Division–P1
(unit?
unit=1&lesson=16)
L1.5(b)-
Division-P2
(unit?
unit=1&lesson=17)
Quiz: Quiz:
Assignment
4
(assessment?
name=86)
L 1.6-
Floating
Point
representation-
P1 (unit?
unit=1&lesson=18)
L1.6-Floating
Point
Representation-
P2 (unit?
unit=1&lesson=19)
L 1.6-
Floating
Point
representation-
P3 (unit?
unit=1&lesson=20)
L 1.6-
Floating
Point
representation-
P4 (unit?
unit=1&lesson=21)
L 1.6-
Floating
Point
representation-
P5 (unit?
unit=1&lesson=22)
Quiz: Quiz
Assignment -
5
(assessment?
name=87)
L1.7-Memory
system and
hierarchy-P1
(unit?
unit=1&lesson=23)
L1.7-Memory
system and
hierarchy-P2
(unit?
unit=1&lesson=24)
L1.7-Memory
system and
hierarchy-P3
(unit?
unit=1&lesson=25)
L1.7-Memory
system and
hierarchy-P4
(unit?
unit=1&lesson=26)
L1.8-
Arithmetic
Logic Unit-P1
(unit?
unit=1&lesson=27)
L1.8-
Arithmetic
Logic Unit-P2
(unit?
unit=1&lesson=28)
Quiz: Quiz
assignment 6
(assessment?
name=88)
Principles
of
Computer
 Design ()
Storage &
 Memory ()
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
FOLLOW US

X
Course outline
Assignment 3
to Due on 2022-12-11, 23:59 IST.
Computer
 ()
1) Pick the sign magnitude form of -18 from the given options 1 point
L1.1(a) Basic 1010010.0
concepts and 110001.0
evolution - 1110010.0
Computer 11110010.0
components
and Score: 0
(unit? 1010010.0
unit=1&lesson=2)
2) Pick the 2s complement form of -18 from the given options 1 point
L1.1(b) Basic
1010010.0
concepts and
evolution - 1110010.0
Computer 11101110.0
components 1111010.0

Score: 1
functions
Accepted Answers:
(unit? 11101110.0
unit=1&lesson=3)
3) Pick the 1s complement form of -18 from the given options 1 point
Quiz:
Assignment 10010.0
1 101101.0
(assessment? 111001101.0
name=78) 1111011.0
L1.2-Data Score: 0
(unit? 101101.0
unit=1&lesson=4) 4) Overflow may occur when a -------- number is subtracted from a negative 1 point
L1.3-Number number or when a ----------------- number is added with a negative number
Systems negative,negative
(unit? negative,positive
unit=1&lesson=5) positive,negative
Quiz: positive,positive
Assignment No, the answer is incorrect.

2 Score: 0
Accepted Answers:
(assessment?
positive,negative
name=82)
5) The result is invalid if the signed addition produces a carry . This statement is -- 1 point
L1.4-
-----; Choose T for True and F for False
Arithmetic:
Addition and F
Subtraction- Insufficient data
P1 (unit? Sometimes true and sometimes false
unit=1&lesson=6) T
L1.4- Yes, the answer is correct.

Score: 1
Arithmetic: Accepted Answers:
Addition and F
Subtraction-
P2 (unit? 6) When a carry is produced during 2's complement addition, then the carry is ----- 1 point
unit=1&lesson=7) ---
L1.4- Added with the LSB of the sum

Arithmetic:Addition Added with the MSB of the sum
and Ignored
Subtraction- considers as carry along with sum
Accepted Answers:
L1.4- Ignored
Arithmetic:Addition
and 7) In 4 bit 1's complement addition, the result of (3)-(6) is 1 point
Subtraction- 10011 and the carry is ignored
P4 (unit? 1011.0
unit=1&lesson=9) 1100.0
L1.4- 1101.0
Arithmetic:Addition Yes, the answer is correct.
Score: 1
and
Accepted Answers:
Subtraction- 1100.0
P5 (unit?
unit=1&lesson=10) 8) In 4 bit 2's complement addition, the result of (3)-(6) is 1 point
Quiz: 10011 and the carry is ignored

Assignment
3 1011.0
(assessment? 1100.0
name=81) 1101.0

Score: 1
Multiplication-
Accepted Answers:
P1 (unit? 1101.0
unit=1&lesson=11)
9) In 4 bit sign magnitude addition, the result of (3)-(6) is 1 point
L1.5(a)-
1011.0
Multiplication-
1100.0
P2 (unit?
1101.0
unit=1&lesson=12)
Cannot perform the addition
1011.0
unit=1&lesson=13)
L1.5(a)- 10) What is the range of values in 2's complement representation using 6 bits? 1 point
Multiplication-
-31 to +30
P4 (unit?
-31 to +31
unit=1&lesson=14)
-32 to +31
L1.5(a)- None of the options are correct
Multiplication- No, the answer is incorrect.
P5 (unit? Score: 0
-32 to +31
L1.5(b)-
Division–P1
(unit?
unit=1&lesson=16)
L1.5(b)-
Division-P2
(unit?
unit=1&lesson=17)
Quiz: Quiz:
Assignment
4
(assessment?
name=86)
L 1.6-
Floating
Point
representation-
P1 (unit?
unit=1&lesson=18)
L1.6-Floating
Point
Representation-
P2 (unit?
unit=1&lesson=19)
L 1.6-
Floating
Point
representation-
P3 (unit?
unit=1&lesson=20)
L 1.6-
Floating
Point
representation-
P4 (unit?
unit=1&lesson=21)
L 1.6-
Floating
Point
representation-
P5 (unit?
unit=1&lesson=22)
Quiz: Quiz
Assignment -
5
(assessment?
name=87)
L1.7-Memory
system and
hierarchy-P1
(unit?
unit=1&lesson=23)
L1.7-Memory
system and
hierarchy-P2
(unit?
unit=1&lesson=24)
L1.7-Memory
system and
hierarchy-P3
(unit?
unit=1&lesson=25)
L1.7-Memory
system and
hierarchy-P4
(unit?
unit=1&lesson=26)
L1.8-
Arithmetic
Logic Unit-P1
(unit?
unit=1&lesson=27)
L1.8-
Arithmetic
Logic Unit-P2
(unit?
unit=1&lesson=28)
Quiz: Quiz
assignment 6
(assessment?
name=88)
Principles
of
Computer
 Design ()
Storage &
 Memory ()
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
FOLLOW US

X
Course outline
Quiz: Assignment 4
to Due on 2022-12-11, 23:59 IST.
Computer
 ()
1) Find the result after performing right logical shift on "11111111" 1 point
L1.1(a) Basic 01111111
concepts and 11111110
evolution - 11111111
Computer
components Score: 1
and Accepted Answers:
functions 01111111
(unit?
unit=1&lesson=2) 2) In the division operation, the remainder and quotient are in the -------- and ---- 1 point
registers respectively
L1.1(b) Basic
A,M
concepts and
A,Q
evolution -
Q,A
Computer
Q,M
components
Score: 1
functions
Accepted Answers:
(unit? A,Q
unit=1&lesson=3)
3) In the division operation, if A-M yields a positive result, then Q0 is ---- and A is --1 point
Quiz:
-----
Assignment
1 0,A
(assessment? 0,A+M
name=78) 1,A
1,A+M
L1.2-Data Score: 0
(unit? 1,A
unit=1&lesson=4) 4) Consider A=1100, Q=0111, and M=0111 in a booth multiplication. The updated 1 point
L1.3-Number value of A is ---- (before shifting) when Q-1 = -----
Systems 0100,0
(unit? 0100,1
unit=1&lesson=5) 1100,0
Quiz: 1100,1
Assignment No, the answer is incorrect.

2 Score: 0
Accepted Answers:
(assessment?
1100,1
name=82)
5) In the division operation, if A-M yields a negative result, then Q0 is ---- and A is 1 point
L1.4-
-------
Arithmetic:
Addition and 0,A
Subtraction- 0,A+M
P1 (unit? 1,A
unit=1&lesson=6) 1,A+M
L1.4- No, the answer is incorrect.

Score: 0
Arithmetic: Accepted Answers:
Addition and 0,A+M
Subtraction-
P2 (unit? 6) Find the result after performing right arithmetic shift on "11111111" 1 point
unit=1&lesson=7)
1111111.0
L1.4- 11111110.0
Arithmetic:Addition 11111111.0
and No, the answer is incorrect.
Subtraction- Score: 0
11111111.0
unit=1&lesson=8)
L1.4- 7) Find the result after performing left arithmetic shift on "11111111" 1 point
Arithmetic:Addition 1111111.0
and 11111110.0
Subtraction- 11111111.0
P4 (unit?
Accepted Answers:
L1.4-
11111110.0
Arithmetic:Addition
and 8) The multiplicand and multipliers are loaded in ---- and ----- registers 1 point
Subtraction- respectively
P5 (unit?
A,M
unit=1&lesson=10)
A,Q
Quiz: Q,M
Assignment
3 Q,QN-1
(assessment? Yes, the answer is correct.
name=81) Score: 1
Accepted Answers:
L1.5(a)- Q,M
Multiplication-
9) When 'A' is multiplied by 'B', the partial product may be either ----- or -------- 1 point
P1 (unit?
unit=1&lesson=11) A,0
A,1
L1.5(a)-
A,B
Multiplication-
B,0
P2 (unit?
B,1
unit=1&lesson=12)
L1.5(a)- Score: 0
Multiplication- Accepted Answers:
A,0
P3 (unit?
unit=1&lesson=13)
10) If an 8 bit data is multiplied with 16 bit data, then the result size will be -------- 1 point
L1.5(a)- 128 bits
Multiplication-
16 bits
P4 (unit?
24 bits
unit=1&lesson=14)
8 bits
L1.5(a)- No, the answer is incorrect.
24 bits
unit=1&lesson=15)
L1.5(b)-
Division–P1
(unit?
unit=1&lesson=16)
L1.5(b)-
Division-P2
(unit?
unit=1&lesson=17)
Quiz: Quiz:
Assignment
4
(assessment?
name=86)
L 1.6-
Floating
Point
representation-
P1 (unit?
unit=1&lesson=18)
L1.6-Floating
Point
Representation-
P2 (unit?
unit=1&lesson=19)
L 1.6-
Floating
Point
representation-
P3 (unit?
unit=1&lesson=20)
L 1.6-
Floating
Point
representation-
P4 (unit?
unit=1&lesson=21)
L 1.6-
Floating
Point
representation-
P5 (unit?
unit=1&lesson=22)
Quiz: Quiz
Assignment -
5
(assessment?
name=87)
L1.7-Memory
system and
hierarchy-P1
(unit?
unit=1&lesson=23)
L1.7-Memory
system and
hierarchy-P2
(unit?
unit=1&lesson=24)
L1.7-Memory
system and
hierarchy-P3
(unit?
unit=1&lesson=25)
L1.7-Memory
system and
hierarchy-P4
(unit?
unit=1&lesson=26)
L1.8-
Arithmetic
Logic Unit-P1
(unit?
unit=1&lesson=27)
L1.8-
Arithmetic
Logic Unit-P2
(unit?
unit=1&lesson=28)
Quiz: Quiz
assignment 6
(assessment?
name=88)
Principles
of
Computer
 Design ()
Storage &
 Memory ()
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
FOLLOW US

X
Course outline
Quiz Assignment - 5
to Due on 2022-12-11, 23:59 IST.
Computer
 ()
1) The MSB of 0.025 in floating point number is ----- 1 point
L1.1(a) Basic zero
concepts and one
evolution - Depends on normalization
Computer Insufficient data
components
and Score: 0
(unit? zero
unit=1&lesson=2)
2) The number of bits in a single precision floating point number is ------ 1 point
L1.1(b) Basic
16.0
concepts and
evolution - 23.0
Computer 32.0
components 64.0
and 8.0
functions Yes, the answer is correct.

Score: 1
(unit?
Accepted Answers:
Quiz:
3) How many bits are in the exponent field of a single precision floating point 1 point
Assignment
number?
1
(assessment? 16.0
name=78) 23.0
32.0
L1.2-Data 64.0
representation 8.0
(unit? Yes, the answer is correct.
Accepted Answers:
L1.3-Number 8.0
Systems 4) How many ones will be present to the left of the binary point after normalizing a 1 point
(unit? floating point number?
unit=1&lesson=5)
Depends on the problem
Quiz: one
Assignment zero
2
(assessment? Score: 1
name=82) Accepted Answers:
one
L1.4-
Arithmetic: 5) Pick the normalized floating point number from the given options (Note: '-E-n' is 1 point
Addition and 10 power of -n and -E+n is 10 power +n)
Subtraction-
0.03453-E-0
P1 (unit?
0.3453-E+1
unit=1&lesson=6)
3.45-E-2
L1.4- 34.5-E-3
Arithmetic: 345-E-4
Addition and No, the answer is incorrect.
3.45-E-2
unit=1&lesson=7)
L1.4- 6) What is the biased exponent for -6 in a single floating point number? 1 point
Arithmetic:Addition
-133.0
and
-134.0
Subtraction-
122.0
P3 (unit?
123.0
unit=1&lesson=8)
L1.4- Score: 1
Arithmetic:Addition Accepted Answers:
-133.0
and
Subtraction- 7) What is underflow in single precision? 1 point
P4 (unit?
unit=1&lesson=9) Exponent is less -127
Significant has 25 zeroes and a 1
L1.4- significant is too large to represent
Arithmetic:Addition to the left of the binary point 3 non-zero numbers present
and
unit=1&lesson=10) Exponent is less -127
Quiz:
Assignment
3 8) When the addition of two normalized numbers yields a carry, then that is called 1 point
(assessment? as ---
name=81) Carry never occurs
L1.5(a)- Exponent overflow
Multiplication- Exponent underflow
P1 (unit? significant overflow
unit=1&lesson=11) significant underflow

L1.5(a)- Score: 0
Multiplication- Accepted Answers:
P2 (unit? significant overflow
unit=1&lesson=12)
9) During subtraction operation the exponents are made equal by decrementing 1 point
L1.5(a)- the larger exponent. Is this true (T) or false(F)?
Multiplication-
F
P3 (unit?
Insufficient data
unit=1&lesson=13)
T
L1.5(a)-
unit=1&lesson=14) F
L1.5(a)- 10) The result of addition is normalizated by ----. 1 point

Multiplication-
Decremtning the exponent
P5 (unit?
Incrementing the exponent
unit=1&lesson=15)
None of these
L1.5(b)- No, the answer is incorrect.
Division–P1 Score: 0
(unit? Accepted Answers:
unit=1&lesson=16) Decremtning the exponent
L1.5(b)-
Division-P2
(unit?
unit=1&lesson=17)
Quiz: Quiz:
Assignment
4
(assessment?
name=86)
L 1.6-
Floating
Point
representation-
P1 (unit?
unit=1&lesson=18)
L1.6-Floating
Point
Representation-
P2 (unit?
unit=1&lesson=19)
L 1.6-
Floating
Point
representation-
P3 (unit?
unit=1&lesson=20)
L 1.6-
Floating
Point
representation-
P4 (unit?
unit=1&lesson=21)
L 1.6-
Floating
Point
representation-
P5 (unit?
unit=1&lesson=22)
Quiz: Quiz
Assignment -
5
(assessment?
name=87)
L1.7-Memory
system and
hierarchy-P1
(unit?
unit=1&lesson=23)
L1.7-Memory
system and
hierarchy-P2
(unit?
unit=1&lesson=24)
L1.7-Memory
system and
hierarchy-P3
(unit?
unit=1&lesson=25)
L1.7-Memory
system and
hierarchy-P4
(unit?
unit=1&lesson=26)
L1.8-
Arithmetic
Logic Unit-P1
(unit?
unit=1&lesson=27)
L1.8-
Arithmetic
Logic Unit-P2
(unit?
unit=1&lesson=28)
Quiz: Quiz
assignment 6
(assessment?
name=88)
Principles
of
Computer
 Design ()
Storage &
 Memory ()
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
FOLLOW US

X
Course outline
Quiz assignment 6
to Due on 2022-12-11, 23:59 IST.
Computer
 ()
1) The memories which are close to processors are ------- 1 point
L1.1(a) Basic Cheap
concepts and Fast
evolution - Slow
Computer constructed in large volume
components
and Score: 1
(unit? Fast
unit=1&lesson=2)
2) Which memory is the fastest according to the memory hierarchy ? 1 point
L1.1(b) Basic
DRAM
concepts and
evolution - Magnetic disk
Computer Magnetic tape
components Proccessor Register
and SRAM
functions No, the answer is incorrect.

Score: 0
(unit?
Accepted Answers:
unit=1&lesson=3) Proccessor Register
Quiz:
3) Which one is volatile? 1 point
Assignment
1 EPROM
(assessment? FLASH
name=78) RAM
ROM
L1.2-Data Score: 1
(unit? RAM
unit=1&lesson=4) 4) Which technique allows IO devices to access the memory directly? 1 point
L1.3-Number DMA
Systems Interface
(unit? Programmed IO
unit=1&lesson=5) RAM
Quiz: interrupt
Assignment Yes, the answer is correct.
2 Score: 1
Accepted Answers:
(assessment?
DMA
name=82)
L1.4- 5) The total time taken by memory devices to perform a read or write operation is 1 point
------
Arithmetic:
Addition and Access time
Subtraction- Memory cycle time
P1 (unit? Read time
unit=1&lesson=6) Transfer rate
Write time
L1.4-
Arithmetic: Yes, the answer is correct.
Score: 1
Addition and
Accepted Answers:
Subtraction- Access time
P2 (unit?
unit=1&lesson=7) 6) Pick the memory which cannot be written by the user. 1 point
L1.4- EEPROM
Arithmetic:Addition EPROM
and MROM
Subtraction- PROM
Accepted Answers:
L1.4- MROM
Arithmetic:Addition
and 7) The data should be read and written periodically in ----- memory to retain the 1 point
Subtraction- data
P4 (unit? DRAM
unit=1&lesson=9)
EEPROM
L1.4- FLASH
Arithmetic:Addition SRAM
and No, the answer is incorrect.
Accepted Answers:
P5 (unit?
DRAM
unit=1&lesson=10)
Quiz: 8) The total number of functions with ----- variables are -------. 1 point
Assignment
3 2,16
(assessment? 2,4
name=81) 2,8
3,8|
L1.5(a)-
Multiplication- No, the answer is incorrect.
Score: 0
P1 (unit?
Accepted Answers:
unit=1&lesson=11) 2,16
L1.5(a)- 9) To selectively complement A3 and A1 of A, ------ has to be ----- with A 1 point

Multiplication-
1010, ANDed
P2 (unit?
1010, Ored
unit=1&lesson=12)
1010, XORed
L1.5(a)- 1100, Ored
Multiplication- 1100, XORed
Accepted Answers:
L1.5(a)- 1010, XORed
Multiplication-
P4 (unit? 10) Say true (T) or false (F): When performing arithmetic left shift of the data 1 point
unit=1&lesson=14) 10101010, overflow occurs
L1.5(a)- F
Multiplication- Insufficient data
P5 (unit? T
Score: 0
L1.5(b)- Accepted Answers:
Division–P1 T
(unit?
unit=1&lesson=16)
L1.5(b)-
Division-P2
(unit?
unit=1&lesson=17)
Quiz: Quiz:
Assignment
4
(assessment?
name=86)
L 1.6-
Floating
Point
representation-
P1 (unit?
unit=1&lesson=18)
L1.6-Floating
Point
Representation-
P2 (unit?
unit=1&lesson=19)
L 1.6-
Floating
Point
representation-
P3 (unit?
unit=1&lesson=20)
L 1.6-
Floating
Point
representation-
P4 (unit?
unit=1&lesson=21)
L 1.6-
Floating
Point
representation-
P5 (unit?
unit=1&lesson=22)
Quiz: Quiz
Assignment -
5
(assessment?
name=87)
L1.7-Memory
system and
hierarchy-P1
(unit?
unit=1&lesson=23)
L1.7-Memory
system and
hierarchy-P2
(unit?
unit=1&lesson=24)
L1.7-Memory
system and
hierarchy-P3
(unit?
unit=1&lesson=25)
L1.7-Memory
system and
hierarchy-P4
(unit?
unit=1&lesson=26)
L1.8-
Arithmetic
Logic Unit-P1
(unit?
unit=1&lesson=27)
L1.8-
Arithmetic
Logic Unit-P2
(unit?
unit=1&lesson=28)
Quiz: Quiz
assignment 6
(assessment?
name=88)
Principles
of
Computer
 Design ()
Storage &
 Memory ()
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
FOLLOW US

X
Unit 2 - Principles of Computer Design
Course outline
Quiz assignment 7
to Due on 2022-12-11, 23:59 IST.
Computer
 ()
1) Instruction is coded in ----- language 1 point
Binary
Principles
Decimal
of
Hexa decimal
Computer
assembly
 Design ()
L 2.1 Score: 1
Instruction Accepted Answers:
Binary
Set
Characteristics
2) Instruction cycle begins with ------ and end with -------- 1 point
and
functions Instruction Address Calculation, Operand store
(unit? Instruction Decoding, Interrupt checking
unit=29&lesson=30) Instruction Fetch, Instruction Address Calculation
Instruction Fetch, Operand store
Quiz: Quiz
assignment 7 Score: 0
(assessment? Accepted Answers:
name=89) Instruction Address Calculation, Operand store
L 2.1 -part 2 - 3) The content of PC cannot be ------ 1 point

Instruction
Set - Types of Branch address
operations Interrupt address
(unit? Next instruction address
unit=29&lesson=31) Operand address

L2.2 - Score: 0
Addressing Accepted Answers:
modes (unit? Operand address
unit=29&lesson=32) 4) A simple instruction has 4 bits for opcode, 6 bits for source operand and 6 bits 1 point
L 2.3: for destination operand and no bit(s) is(are) reserved for future enhancement. It implies that
the processor can perform ----- different operations. Pick the suitable one from the options
Instruction
Formats 12.0
(unit? 18.0
7.0
Quiz: Quiz
assignment 8 Yes, the answer is correct.
Score: 1
(assessment?
Accepted Answers:
name=90) 12.0
L 2.4 P1
5) The instruction "jump to the address 0x4000" will come under ------ type of 1 point
Processor
instruction
structure and
functions Control
(unit? Movement
unit=29&lesson=34) Processing
Storate
L2.4 P2 -
Pipelining
Score: 0
unit=29&lesson=35) Control
L2.4 P3 -
6) "Pushing the accumulator content on top of the stack" instruction is an example 1 point
Pipelining for ---- address instruction when ----- is not present in the instruction
Hazards
(unit? 0,accumulator
unit=29&lesson=36) 0,top of the stack
1,accumulator
Quiz: Quiz 1,top of the stack
assignment 9
0,accumulator
L2.5 RISC &
CISC (unit? 7) The packed BCD 11000011 is equal to -------- 1 point
unit=29&lesson=37)
(+195)
L2.6 Parallel (+3)
Processing: (-3)
MultipleProcessor (-61)
organization-
P1 (unit? Score: 0
(+3)
L2.6 Parallel
Processing: 8) The decimal value for the given EBCDIC ------- is ----- and its ASCII value is --- 2 points
MultipleProcessor ------
organization- 10110011,3,1111011
P2 (unit? 11110011,3,0110011
unit=29&lesson=39) 11110101,3,0110011
1111011,5,0110101
L2.7 Increase
in Yes, the answer is correct.
Score: 2
parallelism-
Accepted Answers:
P1 (unit? 11110011,3,0110011
unit=29&lesson=40)
9) Instruction set has collection of all ----------. 1 point
L2.7 Increase
Instructions
in
Instructions and addressing modes
parallelism-
Instructions and operands
P2 (unit?
Instructions, addresses and operands
unit=29&lesson=41)
L2.8 GPU vs. Score: 0
CPU (unit? Accepted Answers:
Instructions
unit=29&lesson=42)
Quiz: Quiz
assignment
10
(assessment?
name=92)
Storage &
 Memory ()
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
FOLLOW US

X
Course outline
Quiz assignment 8
to Due on 2022-12-11, 23:59 IST.
Computer
 ()
1) Which type of instruction will do the given task? A data has to be moved to 1 point
register R1 if carry is 1; Else it has to be moved to register R2.
Principles
Branching
of
Data transfer
Computer
Input-Output
 Design ()
Logical
L 2.1 No, the answer is incorrect.
Instruction Score: 0
Set Accepted Answers:
Data transfer
Characteristics
and 2) Which type of instruction is needed to do the following task? The entered key 1 point
functions from keyboard is moved to register A by the processor
(unit?
unit=29&lesson=30) Branching
Data transfer
Quiz: Quiz Input-Output
assignment 7 Logical
(assessment?
name=89) Score: 0
Accepted Answers:
L 2.1 -part 2 - Input-Output
Instruction
Set - Types of 3) The PC content is altered by the during ----- instruction 1 point
operations
Branching
(unit?
Data transfer
unit=29&lesson=31)
Input-Output
L2.2 - Logical
Addressing Yes, the answer is correct.
modes (unit? Score: 1
Accepted Answers:
unit=29&lesson=32)
Branching
L 2.3: 4) To reset bit-5 of a 16 bit instruction without affecting other bits, ----- operation is 1 point
Instruction used
Formats
AND
(unit?
NOT
unit=29&lesson=33)
OR
Quiz: Quiz XOR
assignment 8
OR
L 2.4 P1
Processor 5) PUSH is an example for ---- address instruction 1 point
structure and
one
functions
three
(unit?
two
unit=29&lesson=34)
zero
L2.4 P2 - Yes, the answer is correct.
Pipelining Score: 1
zero
unit=29&lesson=35)
L2.4 P3 - 6) Consider the stack of a hypothetical 8 bit processor begins from the address 1 point
Pipelining 0x7fffffff; the current top of the stack is 0x7fffffff4. After using 2 PUSH and 3 POP
Hazards operations, the top of the stack will be -----
(unit? 0x7ffffff3
unit=29&lesson=36) 0x7ffffff5
Quiz: Quiz 0x7fffffff
assignment 9 Insufficient data
(assessment? No, the answer is incorrect.
name=80) Score: 0
Accepted Answers:
L2.5 RISC & 0x7ffffff5
CISC (unit?
unit=29&lesson=37) 7) In register addressing mode, the effective address is --- 1 point
L2.6 Parallel Content of register
Processing: PC content + address
MultipleProcessor Register
organization- Register content+ PC

Score: 0
unit=29&lesson=38)
Accepted Answers:
L2.6 Parallel Register
Processing:
8) In relative addressing mode, the effective address is ------ 1 point
MultipleProcessor
organization- Content of register
P2 (unit? PC content + address
unit=29&lesson=39) Register
Register content + PC
L2.7 Increase
in No, the answer is incorrect.
Score: 0
parallelism-
Accepted Answers:
P1 (unit? PC content + address
unit=29&lesson=40)
9) Post indexing is ----- 1 point
L2.7 Increase
((A))+(R)
in
((A)+(R))
parallelism-
(A)+((R))
P2 (unit?
(A)+(R)
unit=29&lesson=41)
L2.8 GPU vs. Score: 0
CPU (unit? Accepted Answers:
(A)+(R)
unit=29&lesson=42)
Quiz: Quiz 10) The address is not part of the instruction in ----- addressing mode 1 point
assignment
Direct
10
Indirect
(assessment?
Register
name=92)
Stack

Storage & Score: 1
 Memory () Accepted Answers:
Stack
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
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X
Course outline
Quiz assignment 9
to Due on 2022-12-11, 23:59 IST.
Computer
 ()
1) Pick the most appropriate register which is not visible to user 1 point
Address registers
Principles
Data registers
of
General purpose registers
Computer
MAR
 Design ()
L 2.1 Score: 1
MAR
Set
Characteristics
2) Which one is NOT part of PSW? 1 point
and
functions Carry register
(unit? Overflow register
unit=29&lesson=30) Sign register
stack pointer register
Quiz: Quiz
name=89) stack pointer register
L 2.1 -part 2 - 3) Choose the fastest addressing mode from the list 1 point
Instruction
Set - Types of Auto-increment
operations Direct
(unit? Displacement
unit=29&lesson=31) Register
L2.2 - Score: 0
Addressing Accepted Answers:
modes (unit? Register
unit=29&lesson=32) 4) Say true (T) or false (F): PC content is incremented twice during indirect 1 point
L 2.3: addressing mode
Instruction F
Formats T
(unit?
Accepted Answers:
Quiz: Quiz F
assignment 8
(assessment? 5) MBR content is moved to ------ during interrupt and to ------ during indirect and 1 point
name=90) to ---- during ------ during fetch respectively in the instruction cycle
L 2.4 P1 IR,MAR,PC
Processor IR,PC,MAR
structure and MAR,PC,IR
functions PC,MAR,IR
(unit? ^|PC,IR,MAR
Score: 0
L2.4 P2 -
Accepted Answers:
Pipelining PC,MAR,IR
(unit?
unit=29&lesson=35) 6) The execution times of the stages of a 3 stage pipeline are 1,2 and 3 time units 1 point
respectively. If each stage is exectued in a single clock cycle, then the clock cycle has the
L2.4 P3 -
time period -----
Pipelining
Hazards 1.0
(unit? 2.0
Quiz: Quiz Score: 1
assignment 9 Accepted Answers:
(assessment? 3.0
name=80)
7) Consider the execution time of a single instruction is 6 time units. The above 1 point
L2.5 RISC & pipelined processor will execute a program with 10 instructions in ---- time units.
CISC (unit?
11|
unit=29&lesson=37)
15.0
L2.6 Parallel 20.0
Processing: 27.0
MultipleProcessor 33.0
organization- 36.0
Accepted Answers:
L2.6 Parallel 36.0
Processing:
MultipleProcessor
organization- 8) The speed up of the above pipelined processor when executing a 2-instruction 1 point
P2 (unit? program is ----- if a single instruction execution time is 6 time units.
L2.7 Increase 2.0
in 2.5
parallelism- 3.0
Accepted Answers:
L2.7 Increase 1.0
in
parallelism- 9) Say true (T) or false (F): The above 3-stage pipelined processor's performance 1 point
P2 (unit? can be enhanced by making the second stage execution time as 0.5 from 2
unit=29&lesson=41) F
T
L2.8 GPU vs.
CPU (unit? No, the answer is incorrect.
Score: 0
unit=29&lesson=42)
Accepted Answers:
Quiz: Quiz F
assignment
10) Say true (T) or false (F): The above 3-stage pipelined processor's performance 1 point
10
can be enhanced by making the third stage execution time as 2 from 3
(assessment?
name=92) F
T
Storage & Yes, the answer is correct.
Memory () Score: 1

Accepted Answers:
T
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
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Course outline
Quiz assignment 10
to Due on 2022-12-11, 23:59 IST.
Computer
 ()
1) RISC processor has ---- 1 point
All the given options

Principles
Few addressing modes
of
Microprogrammed control unit
Computer
Variable length addressing
 Design ()
L 2.1 Score: 0
Few addressing modes
Set
Characteristics
2) RISC reads a memory content for addition using ------ 1 point
and
functions Add
(unit? Load
unit=29&lesson=30) None of the given options
Store
Quiz: Quiz
name=89) Load
L 2.1 -part 2 - 3) RISC program usually occupies more memory space than CISC processor. Is it 1 point
Instruction True (T) or False(F)
Set - Types of
F
operations
T
(unit?
Score: 1
L2.2 -
Accepted Answers:
Addressing T
modes (unit?
4) CISC stands for --- 1 point
unit=29&lesson=32)
Complete Instruction Set Compliment
L 2.3:
Complex Instruction set computer
Instruction
Computer Indexed Set Components
Formats
Computer Instruction Set Compliment
(unit?
Score: 1
Quiz: Quiz Accepted Answers:
assignment 8 Complex Instruction set computer
(assessment?
5) CISC has a large instruction set than RISC. Is it True(T) or False (F) 1 point
name=90)
F
L 2.4 P1
T
Processor
structure and Yes, the answer is correct.
Score: 1
(unit? T
unit=29&lesson=34)
6) Performance enhancement through pipeline is easy in ----- machines 1 point
L2.4 P2 -
Pipelining CISC
(unit? IAS
unit=29&lesson=35) MIPS
RISC
L2.4 P3 -
Pipelining Score: 1
Hazards Accepted Answers:
(unit? RISC
unit=29&lesson=36)
7) The principal goal of parallelism is ----- 1 point
Quiz: Quiz
assignment 9 Decreasing cost
(assessment? Enchancing memory access
name=80) Enhancing throughput
Simple (Less complex) programs
L2.5 RISC &
CISC (unit? Score: 1
Enhancing throughput
L2.6 Parallel
Processing: 8) Multicore means 1 point
MultipleProcessor
Many processors in different ICs
organization-
Many processors in single IC
P1 (unit?
Processors with shared memory
unit=29&lesson=38)
System on Chip
L2.6 Parallel
Processing:
MultipleProcessor
organization- Score: 1
Accepted Answers:
P2 (unit?
Many processors in single IC
unit=29&lesson=39)
9) Antedependency is ----- 1 point
L2.7 Increase
in Read after read
parallelism- Read after write
P1 (unit? Write after read
unit=29&lesson=40) Writer after write
L2.7 Increase Score: 0
in Accepted Answers:
parallelism- Read after write
P2 (unit?
unit=29&lesson=41) 10) Which policy of superscalar is usually faster? 1 point
L2.8 GPU vs. Cannot tell
CPU (unit? In order issue; In order completion
unit=29&lesson=42) In order issue; out of order completion

Out of order issue;out of order completion
Quiz: Quiz
assignment Score: 1
10 Accepted Answers:
(assessment? Out of order issue;out of order completion
name=92)
Storage &
 Memory ()
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
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X
Unit 3 - Storage & Memory
Course outline
Quiz assignment 11
to Due on 2022-12-18, 23:59 IST.
Computer
 ()
1) Memories are classified as internal and external based on ----- 1 point
Access method
Principles
capacity
of
location
Computer
volatality
 Design ()
Score: 0
Storage & Accepted Answers:
 Memory () location
L3.1 Memory 2) Access time is ------- in ------ access 2 points

System
constant,direct
overview
constant,random
(unit?
constant,sequential
unit=43&lesson=44)
variable,random
L 3.2 Cache No, the answer is incorrect.
memory Score: 0
principles Accepted Answers:
(unit? constant,random
unit=43&lesson=45)
3) In ----- access memories, the transfer rate is ----- when cycle time is 'a' time 1 point
Quiz: Quiz units
assignment
non-random,1/a
11
non-random,Ta+n/r
(assessment?
random,1/a
name=93)
random,Ta+n/r
L 3.3 Part 1 - Score: 0
Mapping Accepted Answers:
techniques - random,1/a
Direct 4) Memory access time is ------- memory cycle time 1 point
mapping
(unit? cannot tell
unit=43&lesson=46) equal to
greater than
L3.3 Part 2 - less than
Associative
mapping Score: 1
unit=43&lesson=47) less than
L3.3 Part 3 - 5) CD ROM is ----- memory 1 point

Set
Erasable
Associative
Magnetic
Mapping
optical
(unit?
semi-conduction
unit=43&lesson=48)
Quiz: Quiz Score: 1
assignment Accepted Answers:
12 optical
(assessment?
6) Refresh units are needed for --------- memory 1 point
name=94)
erasable
L3.4 Internal
non-erasable
Memory
non-volatile
(unit?
volatile
unit=43&lesson=49)
L3.5 - Score: 1
External Accepted Answers:
memory volatile
(unit?
7) Register memories are ------- than magnetic tape memories 1 point
unit=43&lesson=50)
cheaper and bigger
L 3.6 Virtual
cheaper and smaller
Memory
costiler and smaller
(unit?
costlier and bigger
unit=43&lesson=51)
L 3.7 Score: 1
Segmented Accepted Answers:
costiler and smaller
memory
(unit?
8) T1 is the access time of L1 memory and T2 is the access time of L2 memory. 2 points
unit=43&lesson=52) T2 = 100 *T1. If T2 is 1 time unit and the hit percentage is 90, what is the average access
L 3.8 Virtual time? Ignore the time of moving the data from L2 to L1 during miss.
Memory 1.233
10.0
system (unit? 10.9
90.1
Quiz: Quiz
assignment Yes, the answer is correct.
Score: 2
13
Accepted Answers:
(assessment? 10.9
name=95)
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
FOLLOW US

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Course outline
Quiz assignment 12
to Due on 2022-12-18, 23:59 IST.
Computer
 ()
1) Consider a 16K Cache and 16M main memory. A block of main memory has 2 points
32 bits of data. The cache uses 2 bits for word field. What is the tag size when direct
Principles mapping is followed?
of
12.0
Computer
14.0
 Design ()
22.0
24.0
Storage & 5.0
 Memory () 8.0
L3.1 Memory No, the answer is incorrect.

Score: 0
System
Accepted Answers:
overview 8.0
(unit?
unit=43&lesson=44) 2) Consider a 16K Cache and 16M main memory. A block of main memory has 2 points
32 bits of data. The cache uses 2 bits for word field. What is the tag size when associative
L 3.2 Cache mapping is followed?
memory
principles 12.0
(unit? 14.0
24.0
Quiz: Quiz 5.0
assignment 8.0
11
22.0
L 3.3 Part 1 - 3) Consider a 16K Cache and 16M main memory. A block of main memory has 2 points
Mapping 32 bits of data. The first block is named as b0 and the first address is byte 0. The cache
techniques - uses 2 bits for word field. On which cache line byte 1067 will be mapped when direct
Direct mapping is followed?
mapping
Line 0
(unit?
Line 1067
unit=43&lesson=46)
Line 266
L3.3 Part 2 - Line 66
Associative Line320
mapping Yes, the answer is correct.
(unit? Score: 2
Line 266
L3.3 Part 3 -
Set 4) When a set associative is considered as fully associative? 2 points
Associative A block has all memory address
Mapping A set has one line
(unit? Cache has single line
unit=43&lesson=48) cache has single set
Quiz: Quiz No, the answer is incorrect.
assignment Score: 0
Accepted Answers:
12
cache has single set
(assessment?
name=94) 5) When a set associative cache memory is considered as direct mapping? 2 points
L3.4 Internal A block has all memory address

Memory A set has one line
(unit? Cache has single line
unit=43&lesson=49) cache has single set
L3.5 - No, the answer is incorrect.

Score: 0
External
Accepted Answers:
memory
A set has one line
(unit?
unit=43&lesson=50)
L 3.6 Virtual
Memory
(unit?
unit=43&lesson=51)
L 3.7
Segmented
memory
(unit?
unit=43&lesson=52)
L 3.8 Virtual
Memory
system (unit?
unit=43&lesson=53)
Quiz: Quiz
assignment
13
(assessment?
name=95)
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
FOLLOW US

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Course outline
Quiz assignment 13
to Due on 2022-12-25, 23:59 IST.
Computer
 ()
1) The ---- memory is only once writeable 1 point
EEPROM
Principles
EPROM
of
FLASH
Computer
PROM
 Design ()
Score: 1
 Memory () PROM
L3.1 Memory 2) Normally, SRAM has ---- transistors and DRAM has ---- transistors 2 points
System
1,6
overview
2,6
(unit?
6,1
unit=43&lesson=44)
6,2
L 3.2 Cache Yes, the answer is correct.
memory Score: 2
principles Accepted Answers:
(unit? 6,1
unit=43&lesson=45)
3) Consider a 16M bit memory is organized as 4M memory locations. Then a 2 points
Quiz: Quiz single memory location has ---- bits and the size of address bus is ---- bits
assignment
1,24
11
16,20
(assessment?
4,22
name=93)
4,24
L 3.3 Part 1 - 8,22
Mapping 8,24
techniques - No, the answer is incorrect.
Direct Score: 0
Accepted Answers:
mapping
4,22
(unit?
unit=43&lesson=46) 4) What is the job of refreshing unit in DRAM? 1 point
L3.3 Part 2 - Read
Associative Read after write
mapping Update
(unit? Write after read

unit=43&lesson=47) write
L3.3 Part 3 - Score: 0
Set Accepted Answers:
Associative Write after read
Mapping
5) CD ROM is ---- memory 1 point
(unit?
unit=43&lesson=48) Cache
Internal
Quiz: Quiz
Magnetic
assignment
Optical
12
Processor
(assessment?
name=94) Yes, the answer is correct.
Score: 1
L3.4 Internal Accepted Answers:
Memory Optical
(unit?
6) When the required instruction or data is not in the memory page, then ---- error 1 point
unit=43&lesson=49)
will be triggered
L3.5 -
Locality of refernce
External
Page fault
memory
Page not found
(unit?
Virtual memory
unit=43&lesson=50)
L 3.6 Virtual Score: 1
Memory Accepted Answers:
Page fault
(unit?
unit=43&lesson=51)
7) Throwing one page when another page is brought is called as ------ 1 point
L 3.7
Page overwritten
Segmented
Page replacement
memory
Page throwing
(unit?
Page updation
unit=43&lesson=52)
L 3.8 Virtual Score: 0
Memory Accepted Answers:
Page replacement
system (unit? 8) Say true(T) or false(F) if possible from the given data. The size of the address 1 point
unit=43&lesson=53) bus decides the size of virtual memory
Quiz: Quiz F
assignment Insufficient data
13 T
(assessment? No, the answer is incorrect.
name=95) Score: 0
Accepted Answers:
F
I/O
Processing
Functions
 ()
Hardware
Interfacing
Issues
 ()
Introduction
to the
 course ()
FOLLOW US

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Unit 4 - I/O Processing Functions
Course outline
Quiz assignment 14
to Due on 2022-12-25, 23:59 IST.
Computer
 ()
1) Find the output device 1 point
Card reader
Principles
MICR
of
OMR
Computer
Plotter
 Design ()
Score: 1
 Memory () Plotter
2) Pick the pointing device 1 point

I/O
Processing Card reader
Functions MICR
 () Mouse
OMR
L4.1 IO
devices - Score: 1
Input devices Accepted Answers:
(unit? Mouse
unit=54&lesson=55)
3) Inkjet printer is 1 point
L 4.2-4.3
Impact printer
Computer
Laser printer
Display using
Line printer
CRT-LCD-LED
Non-impact printer
(unit? Yes, the answer is correct.
Score: 1
unit=54&lesson=56)
Accepted Answers:
L 4.4-4.5 Non-impact printer
Scanning 4) xerographic printing process is used in --- 1 point

procedures-
Dot-matrix printer
Raster and
Impact printer
Random
Laser printer
scanning
Line printer
(unit?
Score: 0
L 4.6 Accepted Answers:
Laser printer
Different
types of
5) small pins are used to print in ----- printers 1 point
printers-P1
(unit? Dot-matrix printer
unit=54&lesson=58) Impact printer
Laser printer
L4.7 Different
Line printer
types of
printers-P2
Score: 1
unit=54&lesson=59) Dot-matrix printer
Quiz: Quiz
6) The smallest unit on the video screen is ------ 1 point
assignment
14 bit
(assessment? display unit
name=96) line
pixel
Hardware Yes, the answer is correct.

Score: 1
Interfacing
Accepted Answers:
Issues pixel
 ()
7) An mxn resolution in a video screen indicates ----- dots and ---- lines 1 point
Introduction m+n,m-n
to the m,n
 course () m-n,m+n
n,m
Score: 0
Accepted Answers:
m,n
8) The ----- technique does not differentiate odd and even lines when refreshing 1 point
Odd and even

Scanning
interlaced
non-interlaced
Score: 0
Accepted Answers:
non-interlaced
9) Raster scan provides the refreshing rate ---- frames per second 1 point
35.0
50.0
72.0
94.0
Score: 1
Accepted Answers:
72.0
10) Microphone is a(n) ---- 1 point
CCD
MICR
output device
transducer
Score: 1
Accepted Answers:
transducer
FOLLOW US

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Unit 5 - Hardware Interfacing Issues
Course outline
Quiz assignment 15
to Due on 2023-01-01, 23:59 IST.
Computer
 ()
1) The technique where the controller is given complete access to main memory 1 point
is
Principles
Cycle stealing
of
Memory stealing
Computer
Memory Con
 Design ()
Burst mode

Storage & Score: 1
 Memory () Accepted Answers:
Burst mode
I/O
2) The controller uses _____ to help with the transfers when handling network 1 point
Processing interfaces.
Functions
() Input Buffer storage

Signal enhancers
Bridge circuits
Hardware
All of the above
Interfacing
Issues No, the answer is incorrect.
Score: 0
 () Accepted Answers:
Input Buffer storage
L5.1: IO
modules 3) To overcome the conflict over the possession of the BUS we use ______ 1 point
(unit?
Optimizers
unit=60&lesson=61)
BUS arbitrators
Multiple BUS structure
L 5.2 None of the above
Programmed Yes, the answer is correct.
IO (unit? Score: 1
Accepted Answers:
unit=60&lesson=62)
BUS arbitrators
L 5.3 P1: 4) The DMA transfer is initiated by _____ 1 point
Interrupt
driven IO Processor
(unit? The process being executed
unit=60&lesson=63) I/O devices

OS
L5.3 - P2:
Interrupt Score: 0
driven IO - Accepted Answers:
Design I/O devices
issues (unit?
5) What are the significant designing issues/factors taken into consideration for 1 point
unit=60&lesson=64)
RISC Processors?
L 5.3 - P3:
Simplicity in Instruction Set
Interrupt
Pipeline Instruction Optimization
driven IO: PIC
Register Usage Optimization
and PPI
All of the above
(unit?
Score: 1
L 5.4 - P1: Accepted Answers:
All of the above
Direct
Memory
6) The DMA transfers are performed by a control circuit called as 1 point
Access (unit?
unit=60&lesson=66) Device interface
DMA controller
L5.4 P2 -
Data controller
DMA (unit?
over looker
unit=60&lesson=67)
L5.4 P3 - Score: 1
DMA (unit? Accepted Answers:
DMA controller
unit=60&lesson=68)
L 5.5 - P1 7) In DMA transfers, the required signals and addresses are given by the 1 point
Direct Cache
Processor
Access (unit?
Device drivers
unit=60&lesson=69) DMA controllers
L5.5 P2 - the program itself
DCA (unit? Yes, the answer is correct.
Accepted Answers:
L5.6 IO DMA controllers
Channels
and 8) Simplest scheme to handle branches is to 1 point
Processors Flush the pipeline
Freezing the pipeline
(unit? Depth of the pipeline
unit=60&lesson=71) Both a and b
L5.7 External Yes, the answer is correct.

Score: 1
interconnection
Accepted Answers:
standards Both a and b
(unit?
9) After the completion of the DMA transfer the processor is notified by 1 point
unit=60&lesson=72)
Acknowledge signal
Quiz: Quiz
Interrupt signal
assignment
WMFC signal
15
None of the above
(assessment?
name=97) Yes, the answer is correct.
Score: 1
Accepted Answers:
Introduction Interrupt signal
to the
course () 10) When the R/W bit of the status register of the DMA controller is set to 1, 1 point

Read operation is performed
Write operation is performed
Score: 1
Accepted Answers:
Read operation is performed
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SASTRA » Computer Organization & Architecture

Unit 1 - Introduction to Computer Organization

components None of these

and Yes, the answer is correct.

L1.4- Both instruction and data

L1.5(a)- Fetch cycle

Multiplication- Instruction cycle

P5 (unit? Yes, the answer is correct.

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SASTRA » Computer Organization & Architecture

Unit 1 - Introduction to Computer Organization

and Yes, the answer is correct.

L1.5(a)- 9) 2 power 20 is ----------- 1 point

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SASTRA » Computer Organization & Architecture

Unit 1 - Introduction to Computer Organization

and Yes, the answer is correct.

Assignment No, the answer is incorrect.

L1.4- Yes, the answer is correct.

L1.4- Added with the LSB of the sum

Quiz: 10011 and the carry is ignored

L1.5(a)- Yes, the answer is correct.

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SASTRA » Computer Organization & Architecture

Unit 1 - Introduction to Computer Organization

Assignment No, the answer is incorrect.

L1.4- No, the answer is incorrect.

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SASTRA » Computer Organization & Architecture

Unit 1 - Introduction to Computer Organization

functions Yes, the answer is correct.

No, the answer is incorrect.

L1.5(a)- 10) The result of addition is normalizated by ----. 1 point

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SASTRA » Computer Organization & Architecture

Unit 1 - Introduction to Computer Organization

Computer Magnetic tape

components Proccessor Register

functions No, the answer is incorrect.

L1.5(a)- 9) To selectively complement A3 and A1 of A, ------ has to be ----- with A 1 point

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SASTRA » Computer Organization & Architecture

Unit 2 - Principles of Computer Design

L 2.1 -part 2 - 3) The content of PC cannot be ------ 1 point

operations Interrupt address

(unit? Next instruction address

unit=29&lesson=31) Operand address

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