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4: F (x, y, z) =xy′z+x′y+x′z+yz.
5: Simplify the Boolean Function F (w, x, y, z) =Σ (0, 1, 3, 8, 9, 10, 11, 12, 13, 14, 15).
8: Simplify the Boolean Function F (w, x, y, z) =Σ (4, 5, 6, 7, 12) with don’t-care function d
(w, x, y, z) =Σ (0, 8, 13).
Decoder:
12: Implement the following Boolean function f (A, B, C) =∑ (1,3,5,6) using 8:1 mux and 4:1
mux?
13: Implement the following Boolean function f (A, B, C, D) =∑ (0,1,3,4,8,9,15) using 8:1 mux.
14: Implement the Boolean function f (A, B, C, D) = ∑ (1,2,5,6,9,12) using 8:1 mux?
15: Implement the outputs using 3:8 decoder or multi input OR gates following Boolean
expressions can be realized simultaneously.
f1(A, B, C)= ∑m(1,2,3,4)
f2(A,B,C)= ∑m(3,5,7)
f1(w1, w2, w3)= ∑m(0,1,3,4,6,7)
18: Implement the full adder and full substractor outputs using 3:8 decoder and NAND gates
only.
20: Verify the truth tables of RS, JK, T and D flip flop using nand and nor gates.