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Unit 4

Issues in Design of Code Generator


1. Input 2. Target Program(O/P)

● Target Machine Inst Set Arch:


○ RISC=> many registers, three-address
● Intermediate representation of src code + instructions, simple addressing modes, and a
Symbol Table relatively simple instruction-set architecture.
● IR =>quadruples, triples, indirect ○ CISC=> few registers, two-address
triples,bytecodes and stack-machine code,syntax instructions, a variety of addressing modes,
trees and DAG several register classes, variable-length
● assume that all syntactic and static semantic instructions
errors have been detected, ● In a stack-based machine, operations are done
● that the necessary type checking & type by pushing operands onto a stack and then
conversions has been completed performing the operations on the operands at
● assume that the front end has scanned, parsed, the top of the stack.
andtranslated the source program into a ● JVM=> Java Interpreter
relatively low-level IR ● Just In Time compilers translate bytecodes
during run time to the native hardware
instruction set of the target machine.
Issues in Design of Code Generator
2. Target Program(O/P) 3. Instruction Selection

● Type of Codes: Converting IR to code depends on


○ Absolute Code -placed in a xed location in memory
and immediately executed 1. Level of IR
○ Relocatable: a. High => Line by line => Poor Code
■ allows subprograms to be compiled b. Low => Efficient code
separately 2. Nature of Instruction set of target machine
■ Overhead of linking and loading a. If the target machine does not support each data
○ Producing an assembly-language program as type in a uniform manner, then each exception to
output makes the process of code generation the general rule requires special handling.
somewhat easier. 3. Instruction speeds & Size
Eg of Instruction Selection x=y+z

Redundant
Eg 2 Use increment instead of adding 1
4. Register Allocation
● deciding what values to hold in what registers.
● Registers are the fastest computational unit on the target machine, but we usually do not have
enough of them to hold all values.
● Values not held in registers need to reside in memory

● Certain machines require register-pairs


○ M x, y => Result in entire register pair
○ D x, y => the even register holds the remainder and the odd register the quotient.
5. Evaluation Order

● The order in which computations are performed can a


ect the eciency of the target code.
● As we shall see, some computation orders require fewer registers to hold intermediate results than
others. However, picking a best order in the general case is a dicult NP-complete problem
Design of Simple Code Generator

Uses of Registers
1. In most machine architectures, some or all of the operands of an operation
must be in registers in order to perform the operation.
2. Registers make good temporaries - places to hold the result of a
subexpression while a larger expression is being evaluated.
3. Registers are used to hold (global) values that are computed in one basic
block and used in other blocks, for example, a loop index.
4. Registers are often used to help with run-time storage management, for
example, to manage the run-time stack
Overview of Algorithm

● It considers each three-address instruction in turn, and keeps track of what values are in what
registers so it can avoid generating unnecessary loads and stores.
● The algorithm in this section assumes that some set of registers is available to hold the values that
are used within the block.

Types of Machine Instruction


Register and Address Descriptors

Register descriptor

1. For each available register,keeps track of the variable names whose current value is in
that register.
2. Since we shall use only those registers that are available for local use within a basic block,
we assume that initially, all register descriptors are empty.
3. As the code generation progresses, each register will hold the value of zero or more names.

Address descriptor

1. For each program variable, keeps track of the location or locations where the current
value of that variable can be found.
2. The location might be a register, a memory address, a stack location, or some set of more
than one of these.
3. The information can be stored in the symbol-table entry for that variable name.
Code Generation Algorithm
Rules for
Address
and
Register
Descriptors
Design of getReg Function : x=y+z
Case 3 continued: Can we overwrite R?
Candidate Register : R Variable present in R : v
Simple
Example

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