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SYSTEMS
Jan 2024
Lecture 2 Overview
• Positional number system:
• Binary, decimal, hexadecimal
• Unsigned, signed, 1’s complement, 2’s complement
• Arithmetic operations (+, -, ×, ÷)
̶ Carry, sign extension, overflow
̶ Fractional representation and floating point
• Digital codes:
̶ ASCII, Gray code, BCD
• Parallel versus serial data
• Error detection and correction codes
̶ Parity, CRC, Hamming
• Data conversion
̶ Analog to digital conversions, DAC, ADC, and conversion limitations
• Important notes
̶ Please go thru the videos on the next page prior to the lecture and raise questions if
you have any queries.
2
Self-learning videos
• Binary, Decimal, Hexadecimal number systems
– https://www.youtube.com/watch?v=LpuPe81bc2w, 5’19”
– https://www.youtube.com/watch?v=ry1hpm1GXVI. 10’33”
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Positional Number Systems
• The decimal number system we use is a radix/base 10 positional system
– each digit position has an associated weight:
– e.g. 3706.5910 = 3000 + 700 + 00 + 6 + 0.5 + 0.09
= 3×103 + 7×102 + 0×101 + 6×100 + 5×10-1 + 9×10-2
Thousands hundreds tens unit
– the weight of each digit is a power of 10 for decimal number, increasing to the left and allows
for negative powers.
• We usually add a subscript at the end to indicate the number representation used, for
example, a decimal number with base 10 as 21310, and a binary number with base 2 as
11012.
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Positional Number Systems
• In general, radix r number system with p digits to the left of the
𝑝𝑝−1
radix point and n digits to the right: D = ∑𝑖𝑖=−𝑛𝑛 𝑑𝑑𝑖𝑖 . 𝑟𝑟 𝑖𝑖
• Digital circuits can only represent two values: on and off, high and low, or 1
and 0.
• Numbers are represented by binary digits (bits) which can have a value of
either 1 or 0.
• The leftmost bit is the most significant bit (MSB) and rightmost bit is the least
significant bit (LSB).
• A binary number: 𝑏𝑏𝑝𝑝−1 𝑏𝑏𝑝𝑝−2 … 𝑏𝑏1 𝑏𝑏0 . 𝑏𝑏−1 𝑏𝑏−2 … 𝑏𝑏−𝑛𝑛
𝑝𝑝−1
has the value: 𝐴𝐴 = ∑𝑖𝑖=−𝑛𝑛 𝑏𝑏𝑖𝑖 . 2𝑖𝑖 MSB LSB
– 1001 11002 = 1×128 + 0×64 + 0×32 + 1×16 + 1×8 + 1×4 + 0×2 + 0×1 = 15610
– Any larger numbers (e.g. 16, 17) cannot be represented they are termed as overflow
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8-bit
Positional Number Systems: Number conversion
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Positional Number Systems: Sign-magnitude representation
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Positional Number Systems: 1’s complement representation
• To derive the 2’s complement number in binary for negative numbers, you have to obtain
the binary representation for the positive number, then perform invert follow by plus 1.
• Likewise, if you notice a 2’s complement number with MSB=1 (meaning this is a
negative number), you can perform invert follow by plus 1.
Recall that the 1’s complement of 0011 0110 is 1100 1001 (1’s complement)
To form the 2’s complement, add 1 +1
0 0 1 1 0 1 1 0
1100 1010 (2’s complement)
1
2’s complement
1 1 0 0 1 0 0 1
Input bits
Carry 0011 01102 = +5410
Adder
Adder
in (add 1)
Output bits (sum)
1100 10102 = -5410
1 1 0 0 1 0 1 0
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Positional Number Systems: 2’s complement representation
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Positional Number Systems: 2’s complement representation
Addition Subtraction
(15) 0000 1111 (21) 0001 0101
(6) + 0000 0110 (-6) + 1111 1010
(21) 0001 0101 (15) 0000 1111
Multiplication Division
Multiplicand (13) 1101 Divisor 00001101
Multiplier (13) 1101 1101 10101001
1st partial product (PP) 1101 -1101
2nd PP 0000 10000
3rd PP 1101 -1101
4 PP
th + 1101 001101
Final product (169) 1 0 1 0 1 0 0 1 -1101
Remainder 0 22
Positional Number Systems: Binary arithmetic
• As binary are base 2 numbers, you have to remember 12+12 = 102. As 1+1=2 in
decimal, when you move the carry to the more significant column on the left, you
have to divide by 2. Likewise when you have a borrow from left to right, you have
to multiply by 2.
• When performing arithmetic operations, you may encounter one or more of the
following conditions:
– Carry: In binary arithmetic, a carry is a bit that is transferred from one column of bit to the left column
of more significant bit.
– Borrow: In binary arithmetic, when a bit becomes less than zero and the deficiency is taken from the
next bit to the left.
– An overflow occurs when the result does not have the sign that one would predict from the signs of the
operands (e.g. a negative result when adding two positive numbers). Therefore, it is useful to check the
overflow flag after adding or subtracting numbers that are represented in two's complement form (i.e.
they are considered signed numbers).
• When performing arithmetic operations, you cannot simply add or remove bits. What this
meant is adding two 8-bit numbers should produce an 8-bit results. When the results is more
than the number of bits, it is consider as overflow.
• Consider a real world use case in programming where you declare two variables as integer or
int in C program, depending on the compiler, they could take on 16 or 32-bit in memory.
However, when the results of the addition is beyond the range, an incorrect result will be
produced, but it will not produce an error! Try to relate to C programming, what is the
difference between variable data type int, long, short, unsigned, etc. 23
Positional Number Systems: Sign Extension
• Sign extension is the operation, in computer arithmetic, of increasing the number of bits of a
binary number while preserving the number's sign (positive/negative) and value. This is
done by appending digits to the most significant side of the number, following a procedure
dependent on the particular signed number representation used.
• But why??? To increase the range of numbers it can represent! An 8-bit 2’s complement
number can range from -128 to +127, if we want to represent +130, we need a number with
more bits that can accommodate a larger range of numbers (e.g. 10-bit for -512 to +511)
• If we want to widen a two’s complement number, we must sign extend, i.e. duplicate the sign
bit.
– –3510 = 101 11012 (7-bit) = 1111 1101 11012 (12-bit) = –3510
https://en.wikipedia.org/wiki/Sign_extension
24
Overflow: Out of range error
• Overflow ≠ carry https://en.wikipedia.org/wiki/Integer_overflow
• The term arithmetic overflow or simply overflow has the following meanings:
the condition that occurs when a calculation produces a result that is greater
in magnitude than that which a given register or storage location can store or
represent (i.e. out of range).
• If you want to widen (i.e. extend the range of the numbers that can be
represented) a two’s complement number, you must sign extend, i.e. duplicate
the sign bit. The impact is more memory will be required to store the extra bits.
• An example with 4-bit addition: 01112 + 01002 = 10112
Unsigned numbers 2’s comp. numbers Sign-extended numbers
1 1 1
0 1 1 1 0 1 1 1 0 0 1 1 1
+ 0 1 0 0 + 0 1 0 0 + 0 0 1 0 0
1 0 1 1 1 0 1 1 0 1 0 1 1
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Discussion
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Fractional Representation
= 9.562510
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Fractional Representation - Precision
• As the value of the fractional part is the sum of negative power of two,
not all numbers can be exactly represented.
• E.g.: how to represent 0.6 with 9-bit fraction?
• 0.610 ≈ 1×2-1 + 1×2-4 + 1×2-5 + 1×2-8 + 1×2-9
= 1×0.5 + 1×0.0625 + 1×0.03125 + 1×0.00390625 + 1×0.001953125
= 0.599609375 (Binary equivalent: 0.1001100112)
• Note that 0.610 cannot be represented exactly using 9-bit, hence an error could be
present when using fractional representation.
• This error is inversely proportional to the number of bits used to represent the
fractional part: 0.10012 = 0.562510 (4-bit) gives an error of 6.25% vs 0.100112 =
0.5937510 (5-bit) that gives only 1.04% error. In general, more bit usually gives a
more accurate approximation of the fractional number.
• Floating point occurs everywhere in our daily life
– Floating point is the preferred format.
– But floating point arithmetic is costly and is used only when necessary.
– Again, there are many different proposed floating point formats, we will focus on IEEE754 that is the
most commonly used format.
31
Fractional Representation - Conversion
• A decimal fraction can be converted to binary by repeatedly
multiplying the fractional results of successive multiplications by 2. The
carries form the binary number.
E.g. Convert 0.5625 to binary E.g. Convert 0.6 to binary
0.5625 x 2 = 1.125 carry = 1 MSB 0.6 x 2 = 1.2 carry = 1 MSB
0.125 x 2 = 0.25 carry = 0 0.2 x 2 = 0.4 carry = 0
0.25 x 2 = 0.5 carry = 0 0.4 x 2 = 0.8 carry = 0
0.5 x 2 = 1.0 carry = 1 0.8 x 2 = 1.6 carry = 1
0.6 x 2 = 1.2 carry = 1
Answer = .1001
Answer = .10011 (5 significant figures)
– For this example, 0.5625 can be – For this example, 0.6 cannot be exactly
exactly represented represented. You probably notice a pattern
repeating if you continue.
35
Floating Point Conversion: Decimal to IEEE754
https://www.h-schmidt.net/FloatConverter/IEEE754.html
36
Digital codes - ASCII Table
38
Binary Coded Decimal (BCD)
• BCD is widely used and it combines features of both decimal and binary systems.
• BCD is a decimal number with each digit encoded to its four bits binary equivalent.
• The BCD value can never be greater than 9.
• BCD is a way to present decimal numbers in binary form. It is not a number system.
• The primary advantage of BCD is the relative ease of converting to and from decimal
• When performing arithmetic using BCD, when the results in invalid, an operation
known as BCD corrections is required (simply add 610 = 01102)
• . Decimal BCD Decimal BCD
0 0000 10
1 0001 11
2 0010 12 Invalid
3 0011 13 BCD
4 0100 14
5 0101 15
6 0110
87410 = 1000 0111 0100BCD 7 0111
8 1000
https://en.wikipedia.org/wiki/Binary-coded_decimal 9 1001 39
Gray code
• Gray code is an un- Rotary encoder for angle-measuring
weighted and is not devices marked in 3-bit binary. The
inner ring corresponds to Contact 1
an arithmetic code. in the table. Black sectors are "on".
Zero degrees is on the right-hand
side, with angle increasing counter-
• The important clockwise.
• Parallel communication
⁻ Faster since multiple bits are transferred
simultaneously.
⁻ However, it is subjected to synchronization problems and
normally used in short distance communication.
⁻ E.g. ATAPI, computer internal address/data buses
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Error detection codes: Parity bit
• For all computer systems (e.g. communication, storage), there is always a
need to be able to identify error.
• Error detection codes are such codes that allows error to be discovered by
adding additional bits to the original data.
• One of the simplest form of such method is call the parity method.
• Any group of bits contain either an even or an odd number of 1s.
• A parity bit is attached to a group of bits to make the total number of 1s in a
group always even (even parity) or always odd (odd parity).
Even Final data for even parity 1011 0111
Data Odd Parity
Parity Final data for odd parity 1011 0110
1011 011 1 0 https://en.wikipedia.org/wiki/Parity_bit
43
Analogue and Digital Data
DAC
8-bit 8-bit
counter DAC
CLOCK
45
Digital to Analog Converters (DAC)
• Challenges to build a resistive ladder with precise ratio in
exponential values (R, 2R, 4R, 8R, …)
48
Analog to Digital Converters (ADC)
• Digital conversions normally convert the output of analogue electrical signals
(voltage, current, etc) into a digital format used for computation, data transfer
and display.
• There are three basic techniques normally used for the conversion process.
ADC type Speed Resolution Cost
Ramp/Integration ADC Slow High Low
Successive approximation Fast Med-High Modest
Flash type ADC Fastest Low High
• Successive approximation is the most common used.
• Both the ramp generation and successive approximation type converters
require DAC as part of the circuit but these are usually built into the ADC chip.
49
Analog to Digital Converters (ADC)
• 1. Ramp/Integration type ADC
⁻ Output of comparator is 1 or 0, depending on whether the input voltage is greater (Ai > Ri) or
less than (Ai ≤ Ri) the instantaneous value of the ramp voltage.
⁻ The output of the comparator is used to control a logic gate IC2 which passes a clock signal to
the input of a pulse counter.
⁻ The pulses are counted until the voltage from the ramp generator exceeds that of the input
signal, at which point the output of the comparator goes low and no further pulses are
passed into the counter.
Ai
Ri
Ramp Circuit
(DAC) Counter
50
Analog to Digital Converters (ADC)
• 2. Flash type ADC
⁻ The analogue input
voltage is compared with
a series of fixed reference
voltages using a number
of operational amplifiers
⁻ When the analogue input
voltage exceeds the
reference voltage present
at the inverting input of a
particular operational
amplifier stage the output
of that stage will go to
logic 1.
⁻ The priority encoder is a
logic device that produces
a binary output code that
indicates the value of the
most significant logic 1
received on one of its
inputs. 51
Analog to Digital Converters (ADC)
• 3. Successive approximation ADC
⁻ Unlike the ramp ADC, the successive approximation ADC iteratively test each
individual bit from MSB to LSB. In this manner, it will be much faster compared to
ramp ADC since it will only take n number of comparison for an n-bit ADC.
⁻ In the first comparison for MSB, the SAR will be set to 100 with the DAC producing
Vd = 4V (VREF = 8V). Given Vi=5.6V, since Vi > Vd, the MSB has to be set to 1.
⁻ The next step is to test B1 (110) followed by LSB.
111
Vi 110
Successive
Approximation
Vd Register (SAR) 101
100
011
010
001
VREF 52
Computer I/O (Inputs and Outputs)
• There are three types of inputs, which the computer may receive:
⁻ Analogue inputs are constantly varying with respect to time, for example, a smooth changing
voltage.
⁻ Digital inputs are varying inputs also, but they vary in steps or increments.
⁻ Discrete inputs are represented by an on/off condition, usually the closure of a switch or
relay.
Central
Input Processing Output
Section Unit Section
Memory Section
53
Computer I/O (Inputs and Outputs)
• The purpose of the output section is to provide interface
between the computer and the outside world.
• It provides output signal conditioning into a format used by other systems
and computers.
Input Central
Output
Processing
Section Section
Unit
Memory Section
54
Conversion limitations
• Data Conditions: there are two types of data conditions that
must be considered when converting to digital representation:
⁻ Static
⁻ Dynamic
• Accuracy for the conversion of static and dynamic conditions is affected by the
conversion method and especially by the number of bits available in the digital
representation.
• Static: the resolution of a digital system is limited by the value of the least
significant bit. The fewer the number of bits available, the greater the value of
the LSB and therefore the less resolution (and less accuracy) of the digital
representation.
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Conversion limitations
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Summary
• Positional number system:
⁻ Binary, octal, decimal, hexadecimal
⁻ Unsigned, signed, 1’s complement, 2’s complement
⁻ Arithmetic operations (+, -, ×, ÷)
⁻ Carry, borrow, sign extension, overflow
• Fractional representation and floating point
• Digital codes:
⁻ ASCII, Gray code, BCD
• Parallel versus serial data
• Error detection and correction codes
⁻ Parity, CRC, Hamming
• Data conversion
⁻ Analog to digital conversion (ADC), DAC, and conversion limitations
Self-test quiz
1. For the binary number 1000, the weight of the column with the 1 is
(a) 4
(b) 6
(c) 8
(d) 10
(b) 1000
(c) 1001
(d) 1010
58
Self-test quiz
(b) ½
(c) ¾
(b) 44
(c) 64
59
Self-test quiz
5. Assume that a floating point number is represented in binary. If the
sign bit is 1, the
(a) number is negative
6. When two positive signed numbers are added, the result may be larger
that the size of the original numbers, creating overflow. This condition is
indicated by
(a) a change in the sign bit
(d) smoke 60
Self-test quiz
(d) invalid
(b) 8
(c) 16
(d) 32
61
Self-test quiz
9. What is the result for binary subtraction: 0110 1010 – 1101 0110
________________________
10. When a 15-bit binary number 101 1000 0111 1001 is appended with
an odd parity bit at the MSB, what is the 16-bit result expressed in HEX
format?
________________________
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