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SMJE 3183

MICROPROCESSOR & MICROCONTROLLER


NORDINAH ISMAIL
TOPIC 2: THE AVR MICROCONTROLLER ELECTRONICS SYSTEM ENG. DEPT.
EMBEDDED SYSTEM I-KOHZA
MJIIT
AVR Microcontroller
Architecture
• Basic architecture - originally conceived by Alf-Egil-Bogen and Vegard Wollen in 1996.
• AVR an acronym for - Advanced Virtual RISC? Alf and Vegard RISC processor? To Atmel,
the manufacturer, it’s just name. Atmel has been bought over by Microchip Technology
in 2016
• AVRs microcontrollers - all 8-bit*. – CPU process data 8-bit at a time
• AVR – 8-bit microcontroller of modified Harvard architecture of RISC processor where
program and data are stored in separate physical memory systems. Traditionally, 2 basic
architectures in computer system are Von-Neumann and Harvard.

*except for AVR32 - a 32-bit μC


ESE DEPT., MJIIT, UTM SMJE318-SEM2/2021-2022 2
Von-Neumann vs Harvard Architecture
• In Von Neumann architecture all memory is capable of storing all program elements,
in a Von Neumann architecture all memory is capable of storing all program
data and instructions.
elements, data and instructions; in a Harvard architecture the memory is divided
• In Harvard architecture
into twothe memoryone
memories, is divided into
for data two
and memories,
one one for data and
for instructions.
one for instructions.
• Memory can only be accessed once per clock cycle, in principal a Von Neumann
architecture requires at least two clock cycles to execute an instruction, whereas a
Harvard architecture can execute instructions in a single cycle. This can be
understood from CPU’s Fetch – Decode – Execute Cycle

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Reading
material
Von-Neumann vs Harvard Architecture

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AVR’s Modified Harvard Architecture

Data
Memory
• Still very much like Harvard architecture with
separate data and program memory systems
Program
Memory • Fixed data can be stored in instruction memory
can accessed like read-only data with special
instructions i.e. to this instructions data and
instruction address can be common

• All modern microcontrollers (e.g. Atmel AVR and


ARM) are designed in modified Harvard
architecture.

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PART 2:

Computer Architecture:

CISC & RISC

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CISC RISC

AVR microcontroller employs Harvard architecture CPU and is a RISC machine


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CISC – Complex Instruction Set Computer

🔿 CISC has a large collection of instructions that range from simple to very complex and specialized in
the assembly language level. The objective of the approach is to reduce number of instructions on
each program.
🔿 It emphasizes on building complex instructions directly in the hardware because the hardware is
always faster than software.
🔿 It helps reduce program code by embedding multiple operations on each program instruction, this in
turn makes the CISC processor more complex BUT slower in instructions processing.

🔿 Instructions in CISC are complex, and they occupy more than a single word in memory. CISC (as in
RISC) has access to memory operands via registers, however CISC also has instructions to directly
access memory operands.

🔿 It is designed to decrease memory costs because large programs or instruction required large
memory space to store the data, thus increasing the memory requirement, and a large collection of
memory increases the memory cost.
ESE DEPT., MJIIT, UTM
Reading material
SMJE318-SEM2/2021-2022
8
RISC – Reduced Instruction Set Computer
🔿 An architecture with a simple collection and highly customized set of instructions.
🔿 Each instruction is simple and requires only one clock cycle, and each cycle contains
three parameters: fetch, decode and execute. But is also used to perform various
complex instructions by combining them into simpler ones.
🔿 Although program size can be relatively high, pipelining in RISC is carried out
relatively simply and efficiently due to the execution of instructions being done in a
uniform interval of time (i.e. one click). Therefore faster processing.
🔿 RISC synthesizes (breaks down) complex data types and supports few simple data
types. Thus, making use of simple addressing modes and fixed length instructions
for efficient pipelining.
🔿 RISC does not allow direct access to memory locations, for fast processing RISC
processors have a large number of registers.
ESE DEPT., MJIIT, UTM
Reading material
SMJE318-SEM2/2021-2022
CISC vs RISC
RISC CISC

Fill this table up from your reading

ESE DEPT., MJIIT, UTM


SMJE318-SEM2/2021-2022
PART 3:

AVR Microcontroller Device


Overview

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AVR 8-bit Microcontroller Features

▪ 8-bit RISC single-chip microcontroller


▪ Harvard / modified Harvard
architecture
▪ Flash memory as on-chip program
memory (code)
▪ Additional features – Timers, ADC,
PWM with different kinds of serial
interface such as USART, SPI, I2C
(TWI), CAN, USB, and so on.

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ATMEL AVR Families

Refer to pg 46 & 47 in textbook for


ATtiny and ATmega architectural block
diagram
Choosing a microcontroller depends on
what the device can offer and the
applications you want to run

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ATMEL AVR Families

AVR Families Package Program Data Data Peripheral Timers ADC -DAC
memory Memory EEPROM Set
-Flash (RAM) (I/O pins)
(bytes)
ATtiny series 6-32 pins 1K – 8K 64 - 512 64 - 512 Limited Max. 2 ADC: 4 / 8
(6 / 12)
ATmega series 28-100 pins 8K – 128K 1K – 8K 0.5K – 4K Extensive Max. 6 ADC: 8 / 16
23/32/54/86
Special purpose 16K – 1K – 4K 0.5K – 4K For specific Max. 4 Replaced by
128K applications special features

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Simplified View of an AVR Microcontroller

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AVR Microcontroller Series Part Naming
Scheme

AT mega 64 4 PA-AU
AT-Atmel Packaging and standard
(manufacturer)
mega – AVR μC series Power parameter description

Flash memory size – 64kB Series of chips

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ATmega Devices

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ATmega32

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8-bit Microcontrollers

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Arduino ↔ Atmel AVR Microcontroller

Arduino : A microcontroller system


development board (or platform) which
comprised of a microcontroller,
miscellaneous open-source hardware
and peripheral ports supported with
IDE, library functions and software
specifications. Providing an
ecosystem and tools for board system
prototyping.

ESE DEPT., MJIIT, UTM AVR ATMega328 mC


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Arduino ↔ Atmel AVR Microcontroller

AVR : A microcontroller
originally manufactured by a
company name, ATMEL,
which is currently already
acquired by Microchip
Electronics.
The microcontroller is
embedded on Arduino board.

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SMJE318-SEM2/2021-2022
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AVR & Arduino™

🔿 Most Arduino boards consist of an Atmel 8-bit AVR microcontroller with varying
amounts of flash memory, pins, and features.

🔿 Programming AVR μCs on Arduino boards are made easy because the μC are pre-
loaded with boot loader that simplifies uploading programs to the on-chip flash
memory. The default bootloader of the Arduino Uno is the Optiboot bootloader where
boards are loaded with program code via a serial connection (e.g. USB, RS 232) to
another computer.

🔿 The Arduino IDE tools and ecosystem supports processors other than just Atmel AVR
chips. For instance the Arduino Dude uses an ARM Cortex-M3 processor.

ESE DEPT., MJIIT, UTM


SMJE318-SEM2/2021-2022
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AVR & Arduino™
🔿 Most Arduino boards consist of an Atmel 8-bit AVR microcontroller with varying amounts of
flash memory, pins, and features.
🔿 The following lists a few examples of Arduino platforms:

Board μC Freq. Flash E2PROM SRAM Digital Analog Special features


Mem. I/O input
Arduino-UNO ATmega328P 16MHz 32kB 1kB 2KB 14 6
Arduino Mega2560 ATmega2560 16MHz 256kB 2kB 4KB 54 16
Arduino Nano (ATmega168) 16MHz 16kB / 0.5kB/ 1kB/ 14 8
ATmega328 32kB 1 kB 2kB
Arduino Pro ATmega168/ 16MHz 16kB / 0.5kB/ 1kB/ 14 6 UART serial, I²C (TWI), SPI
ATmega328 32kB 1 kB 2kB
LilyPad Arduino ATmega168/ 8MHz 16kB 500 bits 1 kB 14 6 Package size 51mm, wearable
ATmega328
Arduino Uno WiFi ATmega4809 16MHz 48kB 250 bits 6 kB 14 6 Contains six-axis accelerometer,
rev 2 gyroscope supports Wi-Fi and
support Bluetooth as Beta feature[4]

ESE DEPT., MJIIT, UTM


SMJE318-SEM2/2021-2022
Reading material
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