Unit3 - AMIT YADAV COA

Content
▪ Evaluation Scheme
▪ Subject Syllabus
▪ Branch Wise Applications
▪ Course Objective
▪ Course Outcome (COs)
▪ Program Outcomes (POs)
▪ CO-PO Mapping
▪ Program Specific Outcomes (PSOs)
▪ CO-PSO Mapping
▪ Program Educational Objectives (PEOs)
▪ Result Analysis (Departmental, Subject and Individual Faculty)
▪ End Semester Question Paper Templates (offline Pattern/ online
Pattern
AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3
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Content
▪ Prerequisite and Recap
▪ Brief Introduction about the subject with videos
▪ Unit Content
▪ Unit Objective
▪ Topic Objective/ Topic Outcome
▪ Lecture related to topic
▪ Daily Quiz
▪ Weekly Assignments
▪ Topic Links
▪ MCQ ( End of Unit)
▪ Glossary Questions
11/22/2023 AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3 2
Content
▪ Old Question Papers (Sessional +University)
▪ Expected Questions
▪ Summary

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Evaluation Scheme
B.Tech (DS) EVALUATION SCHEME SEMESTER III
S. Subject Code Subject Name Period Evaluation Schemes End Semester Total Credit
No.
L T P CT TA Total PS TE PE
WEEKS COMPULSORY INDUCTION PROGRAM
1 AAS0303 Statistics and Probability 3 1 0 30 20 50 100 150 4
2 ACSE 0306 Discrete Structure 3 0 0 30 20 50 100 150 3
3 ACSE 0305 Computer Architecture and 3 0 0 30 20 50 100 150 3
Organization
4 ACSE 0302 Object Oriented Techniques 3 0 0 30 20 50 100 150 3
using JAVA
5 ACSE 0301 Data Structure 3 1 0 30 20 50 100 150 4
6 ACSDS 0301 Foundations of Data Science 3 0 0 30 20 50 100 150 3
7 ACSE 0352 OOTS Lab 0 0 2 25 25 50 1
8 ACSE 0351 Data Structure lab 0 0 2 25 25 50 1

9 ACSDS0351 Data Analysis Lab 0 0 2 25 25 50 1
10 ACSE 0359 Internship Assessment I 0 0 2 50 50 1
11 ANC0301/AN Cyber Security/ EVS (Non 2 0 0 30 20 50 50 100 0
C0302 Credit )
12 MOOCs ( for B.tech Hons.
Degree)
GRAND TOTAL 1100 24

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Syllabus
Course Code & Course AEC0305 (Computer Organization and L T P (3 0 0) Credits
Title Architecture) (3)
Pre-requisites: Basic Knowledge of computer System, Logic gates and their operations
Syllabus
Unit Computer Organization and Architecture, Functional units of digital system and their 8
1 interconnections, buses, bus architecture, types of buses and bus arbitration and its types. hours
Register, bus and memory transfer. Processor organization, general registers organization,
stack organization and addressing modes.
Unit Arithmetic and logic unit: Look ahead carries adders. Multiplication: Signed operand 8
2 multiplication, Booth’s algorithm and array multiplier. Division and logic operations. hours
Floating point arithmetic operation, Arithmetic & logic unit design. IEEE Standard for
Floating Point Numbers.
Unit Control Unit: Instruction types, formats, instruction cycles and sub cycles (fetch and 8
3 execute etc.), micro-operations, execution of a complete instruction. Program Control, hours
Reduced Instruction Set Computer, Complex Instruction Set Computer, Pipelining.
Hardwire and microprogrammed control, Concept of horizontal and vertical
microprogramming, Flynn's classification.

Syllabus
Unit Memory: Basic concept and hierarchy, semiconductor RAM memories, 2D & 2 1/2D 8 hours
4 memory organization. ROM memories. Cache memories: concept and design issues
& performance, address mapping and replacement Auxiliary memories: magnetic
disk, magnetic tape and optical disks Virtual memory: concept implementation,
Memory Latency, Memory Bandwidth, Memory Seek Time.
Unit Peripheral devices, I/O interface, I/O ports, Interrupts: interrupt hardware, types of 8 hours
5 interrupts and exceptions. Modes of Data Transfer: Programmed I/O, interrupt
initiated I/O and Direct Memory Access. ,I/O channels and processors. Serial
Communication: Synchronous & Asynchronous communication.

Branch Wise Applications
Computer Science:
Understanding of computer organization and architecture is required for:

• Performance analysis of practical software
• Parallel software and its execution
• High performance databases
• Modern compilers and code optimization
• High performance game programming
Other Applications:
• Bio-informatics, Data Science using Python, Web Programming
For high performance computing , there is a need of COA background.

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Course Objective
• To understand the types of organizations, structures and

functions of computer, design of arithmetic and logic unit and
float point arithmetic.
• To understand the concepts of memory system, communication
with I/O devices and interfaces.

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Course Outcomes (COs)
Course Outcome:
After completion of this course, students will be able to:
CO1 Understand the basic structure and operation of a K1, K2
digital computer system.
CO2 Analyze the design of arithmetic and logic unit K1, K4
and understand the fixed point and floating point
arithmetic operations.
CO3 Implement the control unit techniques and the K3
concept of pipelining.
CO4 Understand the hierarchical memory system, cache K2
memory.
CO5 Understand the different ways of communicating K2
with I/O devices and standard I/O interfaces

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Program Outcomes (POs)
• Program Outcomes are narrow statements that describe what the students
are expected to know and would be able to do upon the graduation.
• These relate to the skills, knowledge, and behavior that students acquire
through the programmed.
1. Engineering knowledge 9. Individual and team work

2. Problem analysis 10. Communication
3. Design/development of solutions 11. Project management and
4. Conduct investigations of complex finance
problems 12. Life-long learning
5. Modern tool usage
6. The engineer and society
7. Environment and sustainability
8. Ethics

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CO- PO Mapping
COs PROGRAM OUTCOMES
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
CO1
3 2 1 1 1 1 1 - 1 1 1 2
CO2
2 2 2 2 1 1 - 1 1 1 1 2
CO3
3 2 2 1 2 2 1 1 2 2 1 2
CO4
3 2 2 2 2 1 1 - 1 1 1 2
CO5
2 2 2 1 2 - 1 - 1 2 2 2
Avg.
2.6 2 1.8 1.4 1.6 1 0.8 0.4 1.2 1.4 1.2 2

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Program Specific Outcomes (PSOs)
PSO1.
PSO2.
PSO3.

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CO-PSO Mapping
PSOs COURSE OUTCOMES
CO1 CO2 CO3 CO4 CO5
PSO1
PSO2
PSO3

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Program Education Objectives (PEOs)

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Result Analysis (Departmental, Subject
and Individual Faculty)

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ROAD MAP
QUIZZES, PERFORMANCE
INTRODUC NUMERIC ASSIGNM EVALUATION
PRE TION AL ENTS (Mid Term,
REQUISI (CONCEPTS PRACTIC & End Sem
TE
/ THEORY) E UNIT Exam )
TESTS

Noida Institute of Engineering and Technology
Greater Noida
Template of question pattern
(End semester-offline (2020-21))
SECTION TYPE MARKS TEMPLATE QUESTION
PAPER
A (Subjective) 10*2=20
Compulsory
B (Short Answer Type) 3*10=30

(three out of five )
C Long Answer Type 5*10=50

(Five out of ten)

Greater Noida
Template of questions pattern
(Sessional semester-Offline (2021-22))
SECTION TYPE MARKS TEMPLATE QUESTION
PAPER
A (Objective) 4*1=4
Compulsory
(Very Short Answer) 2*2=4
Compulsory
(two out of three )
(Two Out of four)

Greater Noida
Template of questions pattern

(End semester-Offline(2021-22))
SECTION TYPE MARKS TEMPLATE
A (Objective) Compulsory 10*1=10
(Very Short Answer) 5*2=10

Compulsory
(five out of seven )
(five Out of ten)

Prerequisite and Recap
➢ Arithmetic Logic Unit
•An arithmetic logic unit (ALU) is a digital circuit used

perform arithmetic and logic operations.
•It represents the fundamental building block of the central
processing unit (CPU) of a computer. Modern CPUs contain very
powerful and complex ALUs.
• In addition to ALUs, modern CPUs contain a control unit (CU)
•The inputs to an ALU are the data to be operated on, called operands,
and a code indicating the operation to be performed.
•A symbolic representation of an ALU and its input and output signals

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Brief Introduction about the subject with
videos
The Computer Organization and architecture is one of the most
important and comprehensive subject that includes many foundational
concepts and knowledge used in design of a computer system. This
subject provides in-depth knowledge of internal working, structuring,
and implementation of a computer system.
The COA important topics include all the fundamental concepts such
as computer system functional units , processor micro architecture ,
program instructions, instruction formats , addressing modes , instruction
pipelining, memory organization , instruction cycle, interrupts and other
important related topics.
Video link: https://www.youtube.com/watch?v=q6oiRtKTpX4

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Unit Content
Control Unit:
➢Instruction types, formats
➢Instruction cycles and sub cycles (fetch and execute etc)
➢Micro operations
➢Execution of a complete instruction.
➢Program Control
➢Reduced Instruction Set Computer
➢Pipelining
➢Hardwire and micro programmed control
➢Micro programmed sequencing
➢Concept of horizontal and vertical microprogramming.

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Unit Objective
➢ To understand the types of Instruction sets and computer

architectures and their control.

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Topic Objective/Topic Outcome
S.n Topic Topic Objective/Outcome Mapping
o. with COs
1. Instruction types, formats, Students will be able to inculcate CO3
Instruction cycles and sub the concept of Instruction sets for
cycles (fetch and execute etc) the different processor.
2. Micro operations, Execution of Students will be able to apply the CO3

a complete instruction micro-operations and their
execution.
3. Program Control Students will be able to apply the CO3

program control for completing
the different tasks.
4. Reduced Instruction Set Students will be able to apply the CO3

Computer use of RISC architecture.

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Topic Objective/Topic Outcome
S.n Topic Topic Outcomes Mapping with
o. COs
5. Pipelining Students will be able to inculcate CO3
the use of pipelining concept.
6. Hardwire and micro Students will be able to design the CO3

programmed control hardwire and microprogrammed
control.
7. Micro programmed Students will be able to apply the CO3

sequencing use of micro-programmed
sequencing
8. Concept of horizontal and Students will be able to apply the CO3

vertical concept of horizontal and vertical
microprogramming micro-programing.

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Control Unit (CU)
Control unit (CU) of a processor translates from machine instructions
to the control signals for the microoperations that implement them.
Control units are implemented in one of two ways:-

Hardwired Control:
CU is made up of sequential and combinational circuits to
generate the control signals
Microprogrammed Control:
A control memory on the processor contains micro programs that
activate the necessary control signals
Note: We will consider a hardwired implementation of the control unit

for the basic computer.

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Control Unit (CU)
•Control Unit is the part of the computer’s central processing unit
(CPU), which directs the operation of the processor.
•

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Functions of the Control Unit
➢It coordinates the sequence of data movements into, out of, and
between a processor’s many sub-units.
➢It controls data flow inside the processor.
➢It receives external instructions or commands to which it converts to
sequence of control signals.
➢It controls many execution units(i.e. ALU, data buffers and registers)
contained within a CPU.
➢It also handles multiple tasks, such as fetching, decoding, execution
handling and storing results.

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Functions of the Control Unit
A control unit can be implemented by basically two techniques:
1. Hardwired control unit

2. Micro programmable control unit.
AMIT YADAV CS/CSBS ACSE

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0305 COA Unit 3
Control Unit (CU)
•Control unit of Basic Computer

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Control Unit (CU)
•HARDWIRED/MICROPROGRAMMED

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Hardwired control unit
➢It In the hardwired organization, the control logic is implemented
with gates, flip-flops, decoders, and other digital circuits.
➢ Because of the use of combinational circuits to generate signals, Hardwired

Control Unit is fast.
➢ Faster than microprogrammed control unit.

➢ It does not require control memory.

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0305 COA Unit 3
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0305 COA Unit 3
Microprogrammed control unit
➢In the microprogrammed organization, the control information is
stored in a control memory.
➢The control memory is programmed to initiate the required sequence
of micro-operations.

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Hardwired/Microprogrammed

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Daily Quiz
1. _____________is the part of the computer’s central processing unit
(CPU), which directs the operation of the processor.
2. CU is made up of sequential and combinational circuits to generate
the control signals is called as ________.
3. A control memory on the processor contains micro programs that
activate the necessary control signals is called as _______.
4. Which of the following are true:
a) CU interprets instructions.
b) CU does not controls data flow inside the processor.
c) CU does not receive external instructions to which it converts to
sequence of control signals.
d) None of the above.
5. In the microprogrammed organization, the control information is
stored in a ______________.
a) Control Memory b) Status Register c) Instruction Register
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Instruction
• Program
– A sequence of (machine) instructions
• (Machine) Instruction
– A group of bits that tell the computer to perform a specific
operation (a sequence of micro-operation)
• The instructions of a program, along with any needed data are
stored in memory
• The CPU reads the next instruction from memory
• It is placed in an Instruction Register (IR)
• Control circuitry in control unit then translates the instruction into
the sequence of micro operations necessary to implement it
Instruction Format
• In the Basic Computer, bit 15 of the instruction specifies the
addressing mode (0: direct addressing, 1: indirect addressing)
• Since the memory words, and hence the instructions, are 16 bits long,
that leaves 3 bits for the instruction’s opcode
Instruction Format
15 14 12 11 0
I Opcode Address
Addressing
mode

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Instruction Format

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Instruction Format

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Instruction Format

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Instruction Format

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Instruction Types
Functional Instructions
- Arithmetic, logic, and shift instructions
- ADD, CMA, INC, CIR, CIL, AND, CLA
Transfer Instructions
- Data transfers between the main memory
and the processor registers
- LDA, STA
Control Instructions
- Program sequencing and control
- BUN, BSA, ISZ
Input/Output Instructions
- Input and output
- INP, OUT

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Instruction Cycle & Sub Cycle
• In Basic Computer, a machine instruction is executed in the

following cycle:
– Fetch an instruction from memory
– Decode the instruction
– Read the effective address from memory if the instruction has
an indirect address
– Execute the instruction
• After an instruction is executed, the cycle starts again at step 1,

for the next instruction
• Note: Every different processor has its own (different)
instruction cycle

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Fetch and Decode

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Instruction Cycle
•The time period during which one instruction is fetched
from memory and executed when a computer is given an instruction
in machine language.
•There are typically four stages of an instruction cycle that
the CPU carries out:

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Instruction Cycle
There are typically four stages of an instruction cycle that the CPU carries
out:
•Fetch the instruction from memory. This step brings the instruction into
the instruction register, a circuit that holds the instruction so that it can be
decoded and executed.
•Decode the instruction.
•Read the effective address from memory if the instruction has an indirect
address.
•Execute the instruction.

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Execution of Complete Instruction
FETCH

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Daily Quiz
1. Sequence of instructions is known as ___________.
2. How many fields are there in the instruction format?
3. Instruction register is used to store the _______ of the instruction.
4. If the instruction have 2 operand fields, the instructions will be:
a) Zero address instructions b) one address instructions
c) three address instructions d) two address instructions
5. Enlist the instruction types.
6. __________ is the time period during which one instruction is fetched
from memory and executed when a computer is given an instruction
in machine language.
a) Instruction cycle b) fetch cycle c) execution cycle
7. What are the four stages of the instruction cycle?
8. For executing a complete instruction, first the system fetch the
instruction from _______ to _______.
a) memory, CPU b) CPU, memory C) memory to memory
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Micro operations
The operations performed on the data stored in registers known as micro-

operations.
Example: Shift, Count Clear and Load. The micro-operations are classified
as follows:
1. Register transfer micro-operations: These type of micro operations

are used to transfer from one register to another binary information.
2. Arithmetic micro-operations : These micro-operations are used to

perform on numeric data stored in the registers some arithmetic operations.
3. Logic micro-operations: These micro operations are used to perform

bit style operations / manipulations on non numeric data.
4. Shift micro operations: As their name suggests they are used to

perform shift operations in data
AMIT YADAV
store inACSE
CS/CSBS
registers.
0305 COA Unit 3
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Micro operations
1. Register transfer micro-operations: These type of micro operations
are used to transfer from one register to another binary information.
2. Designate information transfer from one register to another by
R2 ← R1
If the transfer is to occur only under a predetermined control
condition, designate it by If (P = 1) then (R2 ← R1) or, P: R2 ←
R1, where P is a control function that can be either 0 or 1

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Micro operations
Arithmetic Micro operations
Example Description
R3 ← R1 + R2 Addition
R3 ← R1 - R2 (R1 + R2' + 1) Subtraction
Complement (really a logic
R2 ← R2'
operation)
R2 ← -R2 (R2' + 1) Negation
R1 ← R1 + 1 Increment
R1 ← R1 - 1 Decrement

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Micro operations
Logic Micro operations
Logic Micro-Operations: individual bits of registers are operated with

other corresponding register bits. Example: the XOR of R2 and R1 is
symbolized by
P: R1 ←R1 ⊕R2
Example: R1 = 1010 and R2 = 1100
1010
Content of R1
1100
Content of R2
0110
Content of R1 after P = 1

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Micro operations
Shift Micro-operations
Shift Micro-Operations: – these operations are used for serial transfer of

data. They are also used in conjunction with arithmetic, logic, and other
data-processing operation.
The content of register can be shifted to the left or to the right. At the
same time the bits are shifted, the flip flop receives the binary information
from the serial input.
There are three types of shift micro operation-
1. Logic shift 2. Circular shift 3. Arithmetic shift
Logical Shift:- The symbol “shl” is used for logical shift left and “shr”
is used for logical shift right.

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Micro operations

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Micro operations

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Micro operations

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Micro operations

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Daily Quiz
1. A left arithmetic shift operation must be checked for the ______.
2. A left arithmetic left shift multiplies a signed number by
a) two b) three c) zero d) one
3. A left arithmetic right shift _______ a signed number by ____ .
a) divides, 0 b) divides, 2 c) multiplies, 2 d) multiplies, 0
4. If R1= 101011010 , ashr will be:
5. If R1= 10101100 , shl will be.
6. If R1= 1010010 , ashl will be
7. If R1= 1010110 , shr will be
8. If R1= 101011010 , cil will be
9. If R1= 101011010 , cir will be
10. _________micro operations are used to transfer from one register to
another binary information.
a) Register transfer b) bus transfer C) memory transfer

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Concept of Horizontal and Vertical
Microprogramming
Micro-programmed control unit
Micro-programmed control unit can be classified into two types based
on the type of Control Word stored in the Control Memory.
• Horizontal micro-programmed control unit
• Vertical micro-programmed control unit.
Horizontal micro-programmed control unit, the control signals

are represented in the decoded binary format, i.e., 1 bit/CS. Here ‘n’
control signals require n bit encoding.
•In horizontal organization, as mentioned above, you can assume that
every bit in the control word corresponds to a control signal.
•Horizontal organization has more control over the potential parallelism
of operations in the data path; however, it uses up lots of control store.

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Microprogramming.
Vertical Micro-programmed Control Unit, the control signals are
represented in the encoded binary format. Here ‘n’ control signals
require log2n bit encoding.
•In the case of a vertical organization, the signals are grouped and
encoded in order to reduce the size of the control word.
•Vertical organization, on the other hand, is easier to program, not very

different from programming a RISC machine in assembly language, but
needs extra level of decoding and may slow the machine down.

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Microprogramming.

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Daily Quiz
1. Enlist the classification of the microprogrammed control unit.
2. For horizontal microprogrammed control unit, n control signal
requires ____ bit encoding.
a) n b) n-1 c) 2^n d)1
3. For vertical microprogrammed control unit, n control signal requires
____ bit encoding.
a) log2n b) n-1 c) 2^n d) log2n-1
4. What are the difference between horizontal and vertical

microprogrammed control?
5. In the case of a vertical organization, the signals are grouped and
encoded in order to __________ the size of the control word.
a) Minimize
b) Maximize
c) Both a) and b)
d) None of the above
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Program Control
•Program control is how a program makes decisions or organizes its

activities. Program control typically involves executing particular code
based on the outcome of a prior operation or a user input.
•Program control is how a program makes decisions or organizes its

activities. Program control typically involves executing particular code
based on the outcome of a prior operation or a user input.
•A program control instruction changes address value in the PC and

hence the normal flow of execution.
•Change in PC causes a break in the execution of instructions. capability to

branch to different program segments. Branch (BR) and Jump (JMP)
instructions are used sometimes interchangeably but, they are different.

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Program Control
Types of Program Control Instructions:
1. Compare Instruction:
Compare instruction is specifically provided, which is similar t a subtract
instruction except the result is not stored anywhere, but flags are set
according to the result.
Example: CMP R1, R2
2. Unconditional Branch Instruction:

It causes an unconditional change of execution sequence to a new
location.
Example: JUMP L2 , MOV R3, R1 , GOTO L2
3. Conditional Branch Instruction:

A conditional branch instruction is used to examine the values stored in
the condition code register to determine whether the specific condition
exists and to branch if it does.
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Program Control
Example: Assembly Code : BE R1, R2, L1
Compiler allocates R1 for x and R2 for y
High Level Code: if (x==y) goto L1;
4. Subroutines:
A subroutine is a program fragment that lives in user space, performs
a well-defined task. It is invoked by another user program and returns
control to the calling program when finished.
Example: CALL and RET
5. Halting Instructions:
NOP Instruction – NOP is no operation. It cause no change in the
processor state other than an advancement of the program counter. It
can be used to synchronize timing.

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Program Control
HALT – It brings the processor to an orderly halt, remaining in an
idle state until restarted by interrupt, trace, reset or external action.
6. Interrupt Instructions:
Interrupt is a mechanism by which an I/O or an instruction can suspend
the normal execution of processor and get itself serviced.
RESET – It reset the processor. This may include any or all setting
registers to an initial value or setting program counter to standard starting
location.
TRAP – It is non-maskable edge and level triggered interrupt. TRAP has

the highest priority and vectored interrupt.
INTR – It is level triggered and maskable interrupt. It has the lowest

priority. It can be disabled by resetting the processor.
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Daily Quiz
1. What is PC?
2. What is difference between CALL and RET?
3. For resetting the processor, _____ instruction is used
a) Reset b) Halt c) JUMP d)INTR
3. _______ is used for is no operation.
a) NOP b) END c) Reset d) None
4. Enlist the types of program control instructions.

5. ___________is level triggered and maskable interrupt
a)INTR
b)TRAP
c)Both a) and b)
d)None of the above

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Reduced Instruction Set Computer
➢RISC is a microprocessor that is designed to perform a smaller number

of types of computer instructions so that it can operate at a higher speed
(MIPS).
➢Since each instruction type that a computer must perform requires

additional transistors and circuitry.
➢A larger list or set of computer instructions tends to make the

microprocessor more complicated and slower in operation.

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Reduced Instruction Set Computer
Characteristic of RISC –
•Simpler instruction, hence simple

instruction decoding.
•Instruction come under size of one word.
•Instruction take single clock cycle to get
executed.
•More number of general purpose register.
•Simple Addressing Modes.
•Less Data types.
•Pipeline can be achieved.

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Complex Instruction Set Computing
➢ It is a CPU design plan based on single commands, which are skilled
in executing multi-step operations.
➢A complex instruction set computer is a computer where single

instructions can perform numerous low-level operations like a load from
memory, an arithmetic operation, and a memory store”.
➢CISC has the capacity to perform multi-step operations or addressing

modes within one instruction set. It is the CPU design where one
instruction works several low-level acts.
➢The CISC approach attempts to minimize the number of instructions

per program but at the cost of increase in number of cycles per
instruction.

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Complex Instruction Set Computer
Characteristic of CISC
•Complex instruction, hence complex

instruction decoding.
•Instruction are larger than one word size.
•Instruction may take more than single clock

cycle to get executed.
•Less number of general purpose register as

operation get performed in memory itself.
•Complex Addressing Modes.
•More Data types.

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CISC Vs. RISC

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Daily Quiz
1. Enlist the classification of the processor architecture.
2. _______________ is a microprocessor that is designed to perform a
smaller number of types of computer instructions so that it can
operate at a higher speed (MIPS).
a) RISC b) CISC c) RISC or CISC d)None
3. Which of the following is not RISC characteristics:
a) simple instruction decoding b) simple addressing mode
c) Less Data types d) access memory directly
4. The CISC approach used to __________the number of instructions per
program.
5. CISC consists of complex instructions, it takes _______ cycles to
execute.
a) Multiple
b) single
c) four
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Pipelining
➢Pipelining is a technique where multiple instructions are overlapped
during execution.
➢Pipelining is the process of accumulating instruction from the processor

through a pipeline.
➢It allows storing and executing instructions in an orderly process. It is

also known as pipeline processing.
➢Pipelining is a process of arrangement of hardware elements of the CPU

such that its overall performance is increased.
➢Simultaneous execution of more than one instruction takes place in a

pipelined processor.

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Pipelining
Pipeline Stages
RISC processor has 5 stage instruction pipeline to execute all the
instructions in the RISC instruction set.
Stage 1 (Instruction Fetch):
In this stage the CPU reads instructions from the address in the memory
whose value is present in the program counter.
Stage 2 (Instruction Decode):

In this stage, instruction is decoded and the register file is accessed to get
the values from the registers used in the instruction.
Stage 3 (Instruction Execute):

In this stage, ALU operations are performed.

11/22/2023 79
Pipelining
Stage 4 (Memory Access:)
In this stage, memory operands are read and written from/to the memory
that is present in the instruction.
Stage 5 (Write Back):

In this stage, computed/fetched value is written back to the register present
in the instructions.

11/22/2023 80
Pipelining

11/22/2023 81
Daily Quiz
1. What is pipelining?
2. In which stage, the CPU reads instructions from the address in the
memory:
a) Instruction fetch b) Instruction execute c) Instruction decode
3. What is memory access and rite back stage?
4. Enlist the 5 stages of the instruction pipelining for RISC processor.
5. Pipelining is a process of arrangement of hardware elements of the
CPU such that its overall performance is _____.
a) decreased
b) increased
c) Increased or decreased

11/22/2023 82
Faculty Video Links, You tube Courses
Details
You tube/other Video Links

• https://www.youtube.com/watch?v=vcvgvqnH7GA
• https://www.youtube.com/watch?v=U62iP8RkZIk
• https://www.youtube.com/watch?v=8b1Cs1Uf6hI
• https://www.youtube.com/watch?v=MSac_s-W0pc
• https://www.youtube.com/watch?v=sJdCD_APVq8
• https://www.youtube.com/watch?v=_EKgwOAAWZA

11/22/2023 83
Daily Quiz
• Sketch Instruction cycle and sub cycle

• Write down the main function of control unit
• Perform ashl and ashr for given CSE code 10.
• Define pipelining with example.
• Perform shift micro operation on 1100101 .
• What is the difference between
1) ashr and ashl
2) Cil and Cir
3) shr and shl
• Define
1) Subroutine
2) RESET
3) INTR
84
11/22/2023 AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3
Weekly Assignment
1. Define micro operation, microinstruction, micro program, microcode.

2. List the characteristics of RISC and CISC.
3. Differentiate between horizontal and vertical micro-programming.
4. Differentiate between hardwired control and micro programmed
control.
5. Explain phases of Instruction cycle.
6. Explain the 5 stages of the instruction pipelining for RISC processor.
7. Explain the term : 1) JMP 2) Call 3) RET
8. Explain the types of program control instructions in detail.
9. Differentiate between RISC and CISC.
10. Define the term: Arithmetic shift , logical shift and circular shift.

11/22/2023 85
MCQ
1. The decoded instruction is stored in ______
a) IR b) PC c) Registers d) MDR
2. Which registers can interact with the secondary storage?
a) MAR b) PC c) IR d) R0
3. During the execution of a program which gets initialized first ?
a) MDR b) IR c) PC d) MAR
4. _______ is used to store data in registers.
a) D flip flop b) JK flip flop c) RS flip flop d) None
5. Write the phases of Instruction--------------------------------
6. Perform Cil and Cir on given data 1001.
7. Write full form of RISC and CISC---------------------------------------
Solution 1 a. 2a. 3 c. 4 a
11/22/2023 86
Old Question Papers

Expected Questions for University Exam
➢ Write a program to evaluate the arithmetic expression by using

Three, Two, One and Zero address instruction.
X = (A+B*C) / (D+E*F/G+H).
➢Differentiate between RISC & CISC based microprocessor.
➢What is micro programmed control unit? Give the basic structure of
micro programmed control unit.
➢How pipeline performance can be measured? Discuss. Give a space
time diagram for visualizing the pipeline behavior for a four stage
pipeline.
➢Perform Shift micro operation for given data 11001010.
88
Summary
In previous slides we discuss in details
Control Unit:
➢Instruction types, formats
➢Instruction cycles and sub cycles (fetch and execute etc)
➢Micro operations
➢Execution of a complete instruction.
➢Program Control
➢Reduced Instruction Set Computer
➢Pipelining
➢Hardwire and micro programmed control
➢Micro programmed sequencing
➢Concept of horizontal and vertical microprogramming.
89

Unit3 - AMIT YADAV COA

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AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

6 ACSDS 0301 Foundations of Data Science 3 0 0 30 20 50 100 150 3

7 ACSE 0352 OOTS Lab 0 0 2 25 25 50 1

8 ACSE 0351 Data Structure lab 0 0 2 25 25 50 1

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

11/22/2023 AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3 5

11/22/2023 AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3 6

Understanding of computer organization and architecture is required for:

For high performance computing , there is a need of COA background.

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

• To understand the types of organizations, structures and

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

1. Engineering knowledge 9. Individual and team work

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

PSOs COURSE OUTCOMES

CO1 CO2 CO3 CO4 CO5

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

11/22/2023 AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3 16

B (Short Answer Type) 3*10=30

C Long Answer Type 5*10=50

11/22/2023 AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3 17

11/22/2023 AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3 18

Template of questions pattern

A (Objective) Compulsory 10*1=10

(Very Short Answer) 5*2=10

11/22/2023 AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3 19

➢ Arithmetic Logic Unit

•An arithmetic logic unit (ALU) is a digital circuit used

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

Video link: https://www.youtube.com/watch?v=q6oiRtKTpX4

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

➢ To understand the types of Instruction sets and computer

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

2. Micro operations, Execution of Students will be able to apply the CO3

3. Program Control Students will be able to apply the CO3

4. Reduced Instruction Set Students will be able to apply the CO3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

6. Hardwire and micro Students will be able to design the CO3

7. Micro programmed Students will be able to apply the CO3

8. Concept of horizontal and Students will be able to apply the CO3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

Control units are implemented in one of two ways:-

Note: We will consider a hardwired implementation of the control unit

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

A control unit can be implemented by basically two techniques:

1. Hardwired control unit

AMIT YADAV CS/CSBS ACSE

•Control unit of Basic Computer

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

➢ Because of the use of combinational circuits to generate signals, Hardwired

➢ Faster than micro- programmed control unit.

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3

AMIT YADAV CS/CSBS ACSE 0305 COA Unit 3