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Reset noise reduction in capacitive sensors

Article in IEEE Transactions on Circuits and Systems I Regular Papers · September 2006
DOI: 10.1109/TCSI.2006.877890 · Source: IEEE Xplore

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 RESUBMITTED TO: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I.
Reset Noise Reduction in Capacitive Sensors
Boyd Fowler, Member, IEEE, Michael D. Godfrey, Member, IEEE, and Steve Mims, Member, IEEE
Abstract— Reset noise sets a fundamental detection limit on
capacitive sensors. Many sensing circuits depend on accumulating
charge on a capacitor as the sensing method. Reset noise is the
noise that occurs when the capacitor is reset prior to the charge
accumulation cycle. Therefore, it is important to understand
the factors which determine reset noise, and how this noise
may be mitigated. The purpose of this paper is to show how
capacitive reset noise can be reduced during the reset cycle.
We present and analyze three circuits that implement the basic
methods for directly reducing capacitive reset noise. In addition,
we present a time-domain technique for analyzing the time–
varying statistics of these circuits. This technique makes use of
Itô calculus to obtain solutions to the time-varying stochastic
differential equations. Theoretical noise calculations and Monte
Carlo simulation results are presented for each technique. We
show that theory and simulation yield similar results.
Finally, we show in the examples that reset noise may be
reduced by a factor of 20 or more. We also refer to implemented
sensor arrays which achieve these results.
Index Terms— Noise, Itô calculus, time-varying stochastic dif-
ferential equations, CMOS sensors, capacitive sensor, imaging.
I. I NTRODUCTION
R ESET noise sets a fundamental detection limit on ca-
pacitive sensors. Many sensing circuits depend on accu-
mulating charge on a capacitor as the sensing method. Reset
noise is the noise that occurs when the capacitor is reset prior
to the charge accumulation cycle. Therefore, it is important
to understand the factors which determine reset noise, and
how this noise may be mitigated. The purpose of this paper
is to show how capacitive reset noise can be reduced during
the reset cycle. We present and analyze three circuits that
implement the basic methods for directly reducing capacitive
reset noise. In addition, we present a time-domain technique
for analyzing the time–varying statistics of these circuits. This
technique makes use of Itô calculus to obtain solutions to
the time-varying stochastic differential equations. Itô calculus
and time domain solutions to stochastic differential equations
are not widely used in circuit analysis. However, researchers
are starting to use these techniques to analyze time-varying
stochastic circuits [1]–[3]. Moreover, [2] provides a relevant
Itô calculus analysis of sampling mixer circuits.
There is a large body of literature which presents specific
circuits and methods for reducing reset noise [1], [4]–[10]. In
this paper, we construct a general framework for understanding
these results. We outline the mathematical methods that are
Manuscript received dd mm, 2005. This work was partially supported by
a research grant to Stanford University from Fairchild Imaging, Inc.
Boyd Fowler and Steve Mims are at Fairchild Imaging. Michael D. Godfrey
is at Information Systems Lab, Stanford University.
This work has been submitted to the IEEE for possible publication.
Copyright may be transferred without notice, after which this version will
be superseded.
DRAFT 1.1: 5 DEC. 2005 1
required and provide references to extensive treatment of these
methods [11]–[14].
Reset noise occurs in all sensing circuits which depend
on measurement of the charge accumulated on a capacitor.
Such circuits operate by resetting the capacitor, allowing
charge accumulation, and then sensing the charge value. Noise
reduction requires trade-offs of space, speed, and cost. No
one solution will fit all needs. Of course, noise reduction at
one point implies at least as much noise increase somewhere
else. We have not found a way to avoid the Second Law of
Thermodynamics. In any case, it is necessary to distinguish
tradeoffs associated with temporal noise, DC offset, stability,
lag, and reset time within each circuit implementation. In this
paper we will concentrate on temporal noise.
This paper is organized as follows: Section II provides a
summary of the theory of thermal noise in capacitive sensors.
Section III describes how thermal noise affects capacitive
sensors, and presents the notation used for the remainder
of the paper. Section IV presents a theoretical basis for our
noise analysis, and three specific noise reduction methods and
circuits. In Section V we present simulation results for the
three circuits presented in Section IV, and in Section VI we
discuss measured results from the literature. The final Section
provides summary conclusions.
II. T HERMAL AND S HOT N OISE IN C APACITIVE S ENSOR
C IRCUITS
Reset noise in capacitive sensors is typically caused by
thermal and shot noise sources. 1/f noise is not typically a
dominant reset noise component. Thermal and shot noise are
intrinsic characteristics of all resistors, transistors, and diodes.
The physical basis for thermal and shot noise in CMOS
circuits derives from classical Boltzmann thermodynamics, i.e.
the uncertainty in a system at thermal equilibrium is 12 kT
per degree of freedom, where k is Boltzmann’s constant and
T is absolute temperature. A complete description of noise
in semiconductor devices can be found in [15]. We will
assume that all of the noise sources analyzed in this paper
can be modeled as zero mean wide–sense stationary random
processes [14]. It can be shown that the thermal noise voltage,
Vn , in series with a resistor r has (two-sided) power spectral
density
SVn (f ) = 2kT r ∀ − ∞ < f < ∞. (1)
The derivation of this result was first given by Nyquist [16].
Note that the channel noise of a MOS transistor, operated
above threshold (gate voltage such that the drift current is
dominant, as opposed to subthreshold where diffusion current
dominates) in the linear region, has the same power spectral
density as Equation 1 with r being the channel resistance of
the MOS transistor. The gate referred noise power spectral
2 RESUBMITTED TO: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. DRAFT 1.1: 5 DEC. 2005

density of a MOS transistor, operated above threshold in the and f (x, y) is the joint distribution of X and Y. If either X(t)
saturated region, is or Y (t) has zero mean then Equation 5 simplifies to

SVg (f ) =
2kT γ
∀ − ∞ < f < ∞, (2)
2
σXY (t) = E[X(t)Y (t)]. (7)
gm
The variance, i.e. power, of a zero mean random process X(t)
where gm is the transconductance of the MOS transistor, and at time t is defined as the cross correlation of the process with
γ is a constant based on the process and transistor size.1 The itself,
channel of a MOS transistor operated in subthreshold can 2
σX (t) = E[X(t)X(t)]. (8)
be modeled by two independent random diffusion processes
which yield a forward and a reverse shot noise current in the If X(t) and Y(t) are vectors of random processes, then the
channel. When an MOS transistor in subthreshold is operated cross correlation matrix is
below saturation, i.e. the drain to source voltage is much ΣXY (t) = E[X(t)Y(t)T ] − E[X(t)]E[Y(t)]T , (9)
less than the thermal voltage kTq , both forward and reverse
diffusion currents are present and the resulting drain current and the autocorrelation matrix is
noise power spectral density is
ΣX (t) = E[X(t)X(t)T ] − E[X(t)]E[X(t)]T . (10)
SId (f ) = 2qid ∀ − ∞ < f < ∞, (3)
We define W(t) as a vector of independent identically dis-
where q is the charge of an electron, and id is the average drain tributed Wiener processes [14]. Note that each Wiener process
current. As the transistor approaches saturation the reverse is normally distributed with W (0) = 0, zero mean, and
current goes to zero and the noise power is reduced by 1/2, variance t ∀ 0 ≤ t < ∞.
i.e.
SId (f ) = qid ∀ − ∞ < f < ∞. (4) SW R Vc

A more detailed discussion of white noise in subthreshold

MOS transistors is given by Sarpeshkar, et. al., in [17]2 . Note
that the reverse bias current shot noise in a diode has the same VDC C
power spectral density as Equation 4.

III. R ESET N OISE IN C APACITIVE S ENSORS

In this section we define the terms and assumptions for the Fig. 1. RC Reset Circuit
remainder of the paper. We also discuss the voltage charge
relationship for capacitive reset noise. Finally we present a
noise analogy to help in understanding the noise reduction B. Capacitor Hard Reset
techniques presented in the next Section.
When a capacitor, c, is reset to a DC voltage through a
As described in Section II, we assume that the thermal and
resistive switch, as shown in Figure 1, and the switch is
shot noise sources that cause capacitive reset noise can be
abruptly opened the noise voltage power on the capacitor
modeled as Gaussian white noise processes.
is σV2 c = kT c [17]. Note that the voltage noise power is
independent of r and the final DC voltage across the capacitor.
A. Notation and Definitions Through the remainder to this paper we will call this type of
We use upper case letters to denote random variables, and capacitive reset “hard reset.” Since voltage times capacitance
a random variable indexed by time denotes a random process, equals charge, the charge noise stored on the capacitor after
i.e. X(t). A specific value of a random variable is denoted reset
√
is σQ
2
c
= kT c. The RMS charge noise in electrons is
by a lower case letter, i.e. x represents a specific value of the q , where q is the charge of an electron. This shows that
kT c

random variable X. larger capacitors reduce the voltage noise. Conversely, smaller
The cross correlation function of two random processes at capacitors reduce the charge noise.
any time t is defined as
2
σXY (t) = E[X(t)Y (t)] − E[X(t)]E[Y (t)], (5) C. Physical Analogy of Capacitive Reset Noise

where Z ∞ Z ∞
E[XY ] = xyf (x, y)dxdy, (6) In order to understand the source of capacitive reset noise
and how to reduce it, we present a physical analogy for the
−∞ −∞

1γ
is typically set to 23 for long channel devices. switched RC circuit in Figure 1. The analogy is depicted in
2 It
may be helpful to point out that equation 1 in [17] contains a Figures 2, 3, and 4. Each Figure consists of two buckets of
typographical error which the authors corrected before publication, but which ping–pong balls connected by a ramp. (Two analogies are
was not included in the published version. Equation (1) should read as follows:
V
− Us
V
− Ud
V
− Us
V −V
− dU s
possible here: the ping-pong balls which we will use, and
If ∝ e , Ir ∝ e , I = I f − Ir , I ∝ e 1−e =
a hydraulic analogy with water as the natural medium. The
T T T T
V
use of water, and water vapor, is closer to the physics of
− Uds
.


Isat 1 − e T
FOWLER, GODFREY, AND MIMS: RESET NOISE REDUCTION IN CAPACITIVE SENSORS
Ground Plane
Fig. 2. Ping-pong Analogy: High Potential to Low
Ground Plane
Fig. 3. Ping-pong Analogy: Low Potential to High
Ground Plane
Fig. 4. Ping-pong Analogy: No Potential Differential
semiconductors since diffusion and drift control the flow of
both water and electrons/holes, but the ping-pong ball analogy
has a very attractive graphic effect since it makes clear the
particle behavior of electrons and holes. If you prefer the water
analogy, see Mead [18].) In Figure 2 the potential difference
between buckets drives ping–pong balls from left to right, in
Figure 3 the potential difference drives ping–pong balls from
right to left, and in Figure 4 the lack of potential difference
causes ping–pong balls to move from bucket to bucket solely
by diffusion. The bucket on the left side has an infinite volume
and represents a perfect voltage source. In each case the
bucket on the right side has a finite volume and represents a
perfect capacitor, where the cross-sectional area of the bucket
is proportional to its capacitance. The ramp that connects the
buckets represents a finite resistance, where the length divided
by the width of the ramp is proportional to the resistance. The
ping–pong balls represent holes, so that their level in each
3
bucket represents the voltage of the bucket. We assume that a
thermal effect imparts random motion to each ping-pong ball.
Thus, at any temperature above absolute zero, the balls are
continually bouncing in random directions. When the ramp
is level, i.e. the level of ping–pong balls in each bucket is
approximately equal, ping-pong balls will travel back and forth
across the ramp due to their random thermal motion. Therefore
at any time t the number of ping–pong balls in the bucket on
the right side is a random variable. If at time t = tsw the width
of the ramp is instantaneously set to zero and ping–pong balls
can no longer travel between buckets, the number of ping–
pong balls in the right bucket is frozen. The uncertainty in the
number of ping–pong balls in the right bucket when t > tsw
is analogous to the charge noise on a capacitor after reset.
IV. C IRCUIT T ECHNIQUES FOR R EDUCING R ESET N OISE
In this Section we present three reset noise reduction
techniques for capacitive sensors. All of these techniques
reduce reset noise by using precise measurement and feed-
back control. The first technique, called “capacitive control,”
uses a capacitive voltage divider inside a feedback loop to
noiselessly control the sensor. The feedback loop reduces the
initial hard reset noise stored on the capacitive sensor. This
method was first described by Fowler et al. in [5]. The second
technique, called “bandwidth control,” also uses a feedback
loop to reduce reset noise, but in this case the feedback loop
directly attenuates the thermal noise of the reset transistor.
Moreover, if the noise bandwidth of the reset transistor is
less than the bandwidth of the feedback loop, then the noise
voltage stored on the capacitive sensor can be reduced below
c . This method was first described by Loose et al. in [6].
kT
The third technique, called “charge control,” reduces reset
noise by precisely determining when to stop charging the
capacitive sensor after an initial hard reset. This method was
first described by Lee et al. in [8].
In order to analyze two of the three noise reduction tech-
niques described in this section we present a method for
finding the covariance matrix of linear time-varying stochastic
differential equations (SDEs) based on Itô calculus [11], [12].
This time domain noise analysis method can also be extended
to non–linear time varying SDEs. A complete description
of this method applied to circuit simulation is given by
Demir [13]. Note that frequency domain noise analysis meth-
ods [14] cannot be used when stochastic systems have either
(1)initial noise dependence and/or (2)time varying parameters.
One or both of these two conditions apply to each of the circuit
models discussed in this Section.
Each of the following three Subsections is organized as
follows. First a simple explanation of the noise reduction
process is described, then a simplified circuit is presented,
with its associated linearized model, and then its reset noise is
analyzed. Finally a ping–pong ball analogy is used to elucidate
the specific noise reduction process.
A. Capacitive Control
Reducing reset noise via capacitive control is a three step
process. First a conventional hard reset is performed on the
4 RESUBMITTED TO: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. DRAFT 1.1: 5 DEC. 2005

capacitive sensor. Then an “error” amplifier, in a feedback via cf between t3 and t4 . t2 − t1 is selected such that Vse
loop, is connected via a capacitor to the sensor. After the reaches steady state during hard reset, and t4 − t3 is selected
feedback loop settles, attenuating noise on the capacitive such that the feedback loop reaches steady state during the
sensor, the loop is opened and the sensor is ready to detect reset noise reduction step. t3 − t2 only needs to be greater
signals again. The noise stored on the capacitive sensor is than zero.
attenuated because the feedback loop acts to minimize the
difference between the voltage on the sensor and a fixed
reference voltage, i.e. the error amplifier tries to minimize rst
vref-bit (see Figure 5). t t
1 2
Vreset
en
pixel
t t
en Vst
M1
3 4
c st Vse
Mf1
c
f c se
time
Vdd word
Fig. 7. Capacitive Control Timing Waveforms
Vo bit
vref
op1 When hard reset is complete and t is within t2 < t < t3 the
c
l 1pF capacitive sensor has a noise voltage power equal to kT /(cse +
2uA
cf cst /(cf + cst )). After the feedback loop is connected,
allowed to settle, and then opened, the voltage noise σV2 se , and
Fig. 5. Capacitive Control Schematic the charge noise σq2se = (cse + (cf cst /(cf + cst ))2 σV2 se on the
capacitive sensor can be determined by finding the covariance
matrix of  
Vo (t)
V(t) =  Vst (t)  . (11)
op1
Vse (t)
Vo r en Vst c Vse
f
+ −
V V(t) satisfies the following set of SDEs
g n1
m g
o c
l c c dV(t) dW(t)
st se A = BV(t) + C (12)
dt dt
+ r rst where
V + −
 
n2 V cl 0 0
n3
A =  0 cf + cst −cf  , (13)
0 −cf cse + cf
Fig. 6. Simplified Capacitive Control Model  1 1

− r − go r −gm
B= 1
r − 1r 0 , (14)
A circuit that implements capacitive control is shown in 0 0 0
Figure 5. This circuit is a single pixel in an image sensor with and
its associated column level reset amplifier. The photodiode √
 q 
2kT
2kT gmγ
capacitance cse is reset by controlling M1 via Vreset and qr
(15)
 
vref, while the switches en and word are closed. The reset C=
 − 2kT
0
.
r

process is initiated by setting Vreset to ground while Vst 0 0
is held at about Vdd/2, this forces the voltage across cse
to ground. Then Vreset is raised to approximately Vdd, Note that W(t) is a column vector of two independent and
and after a short delay vref is lowered just enough, tens identically distributed 1-D Wiener processes. dW (t)/dt is
of millivolts, to turn off M1 and control cse via the parasitic a white noise process. The matrix C is derived from the
gate to source capacitance of M1 . After the feedback loop has noise sources Vn1 , Vn2 , and Vn3 in Figure 6. To simplify the
settled the switches en and word are opened. Before or after notation, let
reset the voltage across cse can be read–out by operating Mf 1 D = A−1 B, (16)
in source follower mode, while word is closed and en is and
open. E = A−1 C. (17)
A simplified linearized model of this circuit, for analyzing
reset noise, is shown in Figure 6, and the timing waveforms Then the expected value of Equation 12 is
for the model are shown in Figure 7. Hard reset is performed dE[V(t)]
between t1 and t2 , and the feedback loop is connected to cse = DE[V(t)]. (18)
dt
FOWLER, GODFREY, AND MIMS: RESET NOISE REDUCTION IN CAPACITIVE SENSORS 5

Due to our simplified circuit model we can set the initial

condition
E[V(0)] = 0, (19)
C C se
f
and therefore
E[V(t)] = 0 ∀ t ≥ 0. (20)
Since E[V(t)] = 0, ΣV (t) is given by
ΣV (t) = E[V(t)V(t)T ]. (21) Ground Plane
It can be shown that V(t) is an Itô process ( [11], [12]), and
Fig. 8. Ping-pong Analogy: Capacitive Control
therefore using the Itô formula [11] for stochastic differentials
we find that
dV(t)V(t)T = (DV(t)V(t)T + V(t)V(t)T DT
+EET )dt + V(t)(EdW(t))T (22) balls in cse is a random value. Assuming we can measure the
+(EdW(t))V(t)T . number of ping–pong balls in cse to a sufficient accuracy, then
ping–pong balls can be either added or subtracted using cf .
Taking the expectation of both sides of Equation 22 and This allows us to reduce the error between the actual and the
dividing by dt we find the following set of deterministic desired number of ping–pong ball in cse . The relative ratio
differential equations of cf to cse determines how well the ping–pong balls in cse
dΣV (t) can be controlled. For example, if cf is only large enough
= DΣV (t) + ΣV (t)DT + EET . (23) to hold two ping–pong balls, it is very easy to either add or
dt
The initial condition for Equation 23 is determined by hard subtract one ping–pong ball (assuming that cf has one ball
reset of the capacitive sensor3 . in it before we start), but we can only adjust the number of
ping–pong balls in cse by one ball. If on the other hand, cf
0 0 0 is twice as large as cse we can either fill or empty cse using
 

ΣV (0) =  0 0 0
. (24)
 
kT
0 0 cf cst
cse + cf +cst
After solving Equation 23, and taking the limit as t → ∞, it
can be shown that the noise voltage on the capacitive sensor
is
 
c (rgo2 +γgm )+cl (go +αgm )
σV2 se = kT ctt(go +αg m )(ct (1+rgo )+cl )
α2 +

(cse +cf )go
2 (25)
kT cse go +c f go +cf gm
,
where ct = cst + αcse and α = cf /(cf + cse ). The use of the
asymptotic limit t → ∞ in this result does not allow solution
by standard frequency methods since the asymptotic behavior
depends on the initial conditions. Note that the first term in
Equation 25 is the noise added by the feedback amplifier and
the en switch, and the second term is the initial hard reset
noise on the capacitive sensor after it is attenuated by the
feedback loop. For example, if we assume that T = 300 K,
cl = 0.3 pF, γ = 28, cf = 0.4 fF, cse = 5.4 fF, cst = 5 fF,
gm = 17.15 µS, go = 84.7 nS, and r = 10 kΩ then
σV2 se = 31 nV2 and σqse /q = 6.4 e- RMS.
Note that (kT cse )1/2 /q = 29.5 e- RMS.
In order to help clarify how this circuit reduces reset noise,
we present an analogy based on Section III. This analogy
is intended to help visualize the noise reduction process
described in this subsection. Imagine that the capacitive sensor,
cse , is a bucket containing a finite number of ping–pong balls,
and that cf is another bucket used to either add or subtract
ping–pong balls (by tipping the cf bucket) to cse (see Figure
8). At some time t, after hard reset, the number of ping–pong
3 The initial noise voltages on Vo and Vst have almost no effect on the final
steady state noise voltage on Vse .
cf , but it is much more difficult to control the final number of
ping–pong balls in cse . Finding the optimal ratio of cse
cf
is an
essential part of designing any circuit that utilizes this reset
noise reduction technique. In addition, accurate measurement
of cse after hard reset, and accurate control of cf are important
for optimal circuit performance.
B. Bandwidth Control
Reducing reset noise using bandwidth control is a two step
process. First, hard reset is performed on the capacitive sensor.
Then an error amplifier in a feedback loop is connected via
a time varying resistor to the capacitive sensor. Finally, the
resistance of the time varying resistor is increased until the
bandwidth of the error amplifier is much larger than the noise
bandwidth of the resistor.4 Note that the noise bandwidth of the
time-varying resistance is approximately 1/(4r(t)(cse + cf )).
In addition, it is necessary that r(t) → ∞ as t → ∞, i.e.
the resistor that connects the error amplifier to the capacitive
sensor must become disconnected by the end of the reset cycle.
A circuit that implements bandwidth control is shown in
Figure 9. This circuit is a single pixel in an image sensor. The
circuit operates in two modes: the first is when the photodiode
is being reset and the second is when the photodiode is
being read–out. During reset the photodiode capacitance c se is
controlled by the reset transistor M1 and the common source
transistor Mf 1 via reset, while the switches breset and
word are closed. vref is typically held at 1V. The reset
process is initiated by raising reset from ground to a voltage
4 If the resistor’s noise is to be attenuated, the bandwidth of the error
amplifier must be larger than the noise bandwidth of the time varying resistor
during a significant period within the reset cycle.
6 RESUBMITTED TO: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. DRAFT 1.1: 5 DEC. 2005

Vdd
1/r(t)

breset
2uA
Vo time

pixel c breset
reset l
M1 c
f
Vse t t t
Mf1 1 2 3
c
se Fig. 11. Bandwidth Control Timing Waveforms
word

bit
and  q √ 
2kT
breset r(t) 2kT γgm
1pF C= . (29)
2uA
q
2kT
− r(t) 0
vref
As in Subsection IV-A, it can be shown that V(t) is an Itô
Fig. 9. Bandwidth Control Schematic process, and assuming the initial condition
E[V(0)] = 0, (30)
c
f

op1
then
breset V
o r(t) Vse E[V(t)] = 0 ∀ t ≥ 0. (31)
+ −
V
n1
g
m g
o
Similarly, since E[V(t)] = 0, ΣV (t) = E[V(t)V(t)T ]. Using
c c
l breset se Equation 23 with the initial condition
0 0
 
+
V ΣV (0) = (32)
n2 0 csekT+cf

we can numerically determine σV2 se (t), σV2 o (t), and σV2 se Vo .

Fig. 10. Simplified Bandwidth Control Model
Numerically solving Equation 23 for 0 ≤ t ≤ 20 µs using
r(t) = r0 exp( τt ), where r0 = 10 KΩ and τ = 1 µs, then
σV2 se (t3 ) = 3.2 nV2 , σV2 o (t3 ) = 8.9 µV2 , and
just below Vdd. Then reset is lowered using a linear ramp
to about Vdd/2. This causes the reset transistor M1 to slowly σV2 se Vo (t3 ) = −0.137 µV2.
turn off. When the reset process is complete reset is returned Figure 12 shows the numerical solutions of Equation 23 for
to ground. Note that Mf 1 acts as a common source amplifier 0 ≤ t ≤ 20 µs with five different values of τ ranging from
during reset and a source follower during read–out. Before or 0.25 µs to 4 µs and r0 = 10 KΩ. After t3 the topology of the
after reset, the voltage across cse can be read–out by operating circuit is modified for readout by closing/opening the switches
Mf 1 in source follower mode while breset is open and word controlled by breset. This causes noise stored on cl to be
is closed. transferred onto cse via cf . By considering conservation of
A simplified linear, but time varying, model of this circuit, charge for cse and cf , it can be shown that after t3 the noise
for analyzing reset noise, is shown in Figure 10. The timing voltage on cse is
waveforms for this model are shown in Figure 11. After hard 
reset is complete, i.e. t1 < t < t2 , the capacitive sensor has σV2 se (t > t3 ) = (cf +c 1
se )
2 2cf cse σV2 se (t3 )−
a noise voltage power equal to approximately (csekT +cf ) . When σV2 se Vo (t3 ) +


r(t) is increased after t2 the voltage noise on the capacitive (33)
c2f σV2 se (t3 ) + σV2 o (t3 )− 
sensor, σV2 se (t), can be determined by solving Equation 12
2σV2 se Vo (t3 ) + c2se σV2 se (t3 ) .


with  
Vo (t)
V(t) = , (26) Using the results from the numerical solution σV2 se (t > t3 ) =
Vse (t)
55 nV2, and qqse (t > t3 ) = 9.4 e- RMS. Note that noise
σ

injected by cf onto cse at t = t3 dominates the read noise.

 
cl + c f −cf
A= , (27)
−cf cse + cf Therefore, minimizing cf is critical for low noise reset and
"
1 1
# readout of cse .
− r(t) − go r(t) − gm As in the last Subsection, we will now present an analogy
B= 1 1 , (28)
r(t) − r(t) that is intended to help visualize the noise reduction process
FOWLER, GODFREY, AND MIMS: RESET NOISE REDUCTION IN CAPACITIVE SENSORS 7

−6
BC Log Vse Noise Power vs Time C. Charge Control
10
tau=0.25us
Reducing reset noise using charge control is a three step
log(Vse noise power)

tau=0.5us
−7
10 tau=1us process. First, the voltage across the capacitive sensor is hard
tau=2us reset to Vreset. Then, a current source is connected to the
tau=4us
−8
10 capacitive sensor causing the voltage Vse to fall. Finally, when
the voltage across the capacitive sensor falls below a reference
−9
10 voltage the current source is disconnected from the capacitive
0 0.5 1 1.5 2 2.5
Time −5 sensor.
x 10
BC Log Vo Noise Power vs Time
−4
10 Vreset
tau=0.25us pixel
log(Vo noise power)

tau=0.5us reset M1 Vdd

tau=1us
Vse
−6 tau=2us Mf1
10
tau=4us c se
vbias M2
word

−8 bit
10 Vo
0 0.5 1 1.5 2 2.5 vref
Time x 10
−5
cmp1 1pF
2uA

Fig. 12. Numerical Solutions of Bandwidth Control SDEs

Fig. 14. Charge Control Schematic

described in this Subsection. Imagine that the capacitive sen-

sor, cse , is a bucket containing a finite number of ping–pong
balls, and that r(t) is a ramp that connects cse to a bucket
that contains an infinite number of ping–pong balls (see Figure V + vref
n1 I
cmp1 r
13). At some time, t, after hard reset, the number of ping–pong
V
o
r(t)

Vreset reset
C
se r
− + V
dx se
V
t 0
n2 c
se

Fig. 15. Simplified Charge Control Model

Ground Plane

Fig. 13. Ping-pong Analogy: Bandwidth Control
balls in cse is a random value. Assuming we can measure the
number of ping–pong balls to a sufficient accuracy while the
width of the ramp is slowly being reduced, the difference in
ping–pong ball levels between cse and the infinite bucket can
be used to control the final number of ping–pong balls in cse .
For example, when the ramp width is exactly wide enough
for one ping–pong ball, the slope of the ramp can be used to
control the average number balls that are either added to or
subtracted from the bucket. If we can adjust the slope of the
ramp faster than ping–pong balls can jump onto or off of the
ramp due to thermal energy, we can, on average, reduce the
uncertainty in the number of ping–pong balls in cse . Finding
the best waveform for r(t), i.e. the width of the ramp as a
function of time, is an essential part of designing any circuit
that utilizes this reset noise reduction technique. In addition,
accurate measurement of cse after hard reset, and accurate
control of r(t) are important for optimal circuit performance.
A circuit that implements charge control is shown in Fig-
ure 14. This circuit is a single pixel in an image sensor with
a column level reset comparator. The circuit operates in two
modes: the first is when the photodiode is being reset and the
second is when the photodiode is being read–out. During reset
the photodiode capacitance cse is first set to Vreset via M1
while word is closed. vref is typically held at 1 V. Then
vbias is raised to approximately 0.5 V and current flows
from cse to Vo, slowly discharging cse . When bit is less
than vref the output of the comparator switches high and M2
is turned off. After reset is complete vbias is set to ground.
Before or after reset, the voltage across cse can be read–out by
operating Mf 1 in source follower mode, while word is closed.
A simplified model of the circuit, used for analyzing reset
noise, is shown in Figure 15. We assume that the input-referred
noise of the comparator, Vn1 (t), is a Rwhite random process
with zero mean and variance σV2 n1 , and 0 Ir q(τ ) dτ , is a Poisson
t
process with parameter iqr . The voltage across the capacitive
sensor just after the current source is disconnected, i.e. t >
8 RESUBMITTED TO: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. DRAFT 1.1: 5 DEC. 2005

Tsw + ∆T , is ping–pong balls Ir (t). If the number of ping–pong balls in

Tsw +∆T cse can be measured fast enough and to a sufficient accuracy,
1
Z
Vse = Vse (0) − Ir (τ )dτ, (34) we can switch Ir (t) out of the circuit, such that the number
cse 0 of ping–pong balls in cse is exactly n. This assumes that the
where Tsw is the time between hard reset and when the switching time of Ir (t) is much faster than the average rate
comparator starts to switch, and ∆T is the switching time of at which ping–pong balls fall into cse . The three key design
the comparator. Vse (0) is the initial voltage on the capacitive factors in this circuit are accurate measurement of the number
sensor after hard reset. Note that Tsw , ∆T , and Vse (0) are of ping–pong balls in cse , the speed at which we can switch
random variables. This integral can be separated into: the Ir (t) out of the circuit, and the magnitude of Ir .
voltage at which the comparator switches, Vse (Tsw ), and
the integral of the current source while the comparator is V. S IMULATIONS
switching,
In this section we present three different circuit simulations
that demonstrate the three reset noise reduction techniques
Z Tsw +∆T
1
Vse = Vse (Tsw ) − Ir (τ )dτ. (35)
cse Tsw described in Section IV. The measure of noise reduction that
we will use is the reset noise reduction factor (RNRF) defined
The expected voltage across the capacitive sensor after reset
as the hard reset noise power divided by the reset noise power
is
ir ∆t of the circuit (termed the active reset power). The theoretical
E[Vse ] = vref − , (36) value is
cse
σ 2 (hard reset)
and the noise voltage power on cse is RNRF = 2Vse (39)
σVse (active reset)
qir ∆t + i2r σ∆T
2
σV2 se = σV2 n1 + 2
. (37) The simulation results were generated using HPSPICE’s tran-
cse
sient noise analysis tool. HPSPICE uses Monte Carlo simula-
Finally the input-referred charge noise on cse after charge tion for transient noise analysis. BSIM3 level 3 SPICE models,
control reset is from a 0.18 µm CMOS process, were used for each simulation.
All simulations were performed using 512 runs, T = 25◦ C,
σq2se = c2se σV2 n1 + qir ∆t + i2r σ∆T
2
. (38)
Vdd = 2.8 V, and Vreset = 2.0 V. In each simulation the reset
A derivation of Equations 36, 37, and 38 is given in the period was held constant. Note that we did not optimize the
Appendix. For example, if we assume that reset noise reduction performance of each circuit, and we have
not considered either fixed pattern noise or circuit stability.
∆t = 100 ns, σ∆T
2
= 0, cse = 6.7 fF, ir = 0.23 nA,
Figure 17 shows the SPICE input waveforms used for
and σV2 n1 = 5.79 nV2, simulating the capacitive control circuit, shown in Figure 5,
σq and the SPICE generated output waveforms. Table I shows
then σV2 se = 88 nV2, and se = 12.4 e- RMS.
q
Circuit #1, control and output signals
The analogy that is intended to help visualize this noise 3.5
Vse
reduction process is as follows. Imagine that the capacitive vref
en
word
3 word
sensor, cse , is a bucket containing a finite number of ping–
pong balls, and that Ir (t) is stream of ping–pong balls falling 2.5

into cse (see Figure 16). After hard reset, we fill cse up to
2
Volts

vref
1.5

I (t)
r Vse
1

0.5 en

0
0 5e-06 1e-05 1.5e-05 2e-05 2.5e-05
time
C
se Fig. 17. Capacitive Control Input/Output Waveforms

all of the capacitor, transistor, and amplifier parameters for

Figure 5. Figure 18 shows the transient noise simulation of
Ground Plane
the capacitive control circuit. The hard reset noise voltage
power on the capacitive sensor σV2 se at 10 µs is approximately
Fig. 16. Ping-pong Analogy: Charge Control
0.72 µV2. This result corresponds very well with the predicted
value. The noise power σV2 se after 20 µs is 33 nV2 . Therefore
a fixed number of ping–pong balls, n, using the stream of the RNRF of this circuit is 7.2/.331 = 21.8.
FOWLER, GODFREY, AND MIMS: RESET NOISE REDUCTION IN CAPACITIVE SENSORS 9

Component Parameter Value units Component Parameter Value units

cl capacitance 0.3 pF cl capacitance 0.3 pF
cf capacitance 0.4 fF cf capacitance 0.4 fF
cse capacitance 5.4 fF cse capacitance 6 fF
cst capacitance 5 fF M1 W/L 0.42/0.6 µm
M1 W/L 0.4/0.6 µm M1 threshold voltage 0.45 V
M1 threshold voltage 0.45 V Mf 1 W/L 1.2/0.5 µm
Mf 1 W/L 0.7/1.2 µm Mf 1 threshold voltage 0.45 V
Mf 1 threshold voltage 0.45 V Mf 1 transconductance 36.2 µS
Mf 1 transconductance 21.3 µS Mf 1 body effect conductance 8.3 µS
Mf 1 body effect conductance 6.2 µS Mf 1 output conductance 360 nS
Mf 1 output conductance 49 nS vref voltage 1.0 V
op1 transconductance 24.5 µS
op1 output conductance 84.7 nS TABLE II
op1 excess noise factor γ 20 B ANDWIDTH C ONTROL S IMULATION C OMPONENT PARAMETERS
TABLE I
C APACITIVE C ONTROL S IMULATION C OMPONENT PARAMETERS Circuit #2, Vse Noise Power

Vse_noise

1e-07
Circuit #1, Vse Noise Power
1e-06
Vse_noise

Volts^2
1e-08
1e-07
Volts^2

1e-08
1e-09
0 5e-06 1e-05 1.5e-05 2e-05 2.5e-05
time

Fig. 20. Bandwidth Control Transient Noise Waveforms

1e-09
0 5e-06 1e-05 1.5e-05 2e-05 2.5e-05
Time

Fig. 18. Capacitive Control Transient Noise Waveforms

the SPICE generated output waveforms. Table III shows all

Figure 19 shows the SPICE input waveforms used for Circuit #3, control and output signals

simulating the bandwidth control circuit shown in Figure 9 reset

reset
Vse
Vo
and the SPICE generated output waveforms. Table II shows 3
Vo

2.5
Vse
Circuit #2, control and output signals

breset 2
Vse
3 breset reset
Volts

1.5

2.5
reset
1

0.5
Volts

Vse
1.5

1 0 5e-06 1e-05 1.5e-05 2e-05 2.5e-05

time

0.5
Fig. 21. Charge Control Input/Output Waveforms

0
0 5e-06 1e-05 1.5e-05 2e-05 2.5e-05
of the capacitor, transistor and amplifier characteristics for
time Figure 14. Figure 22 shows the transient noise simulation of
Fig. 19. Bandwidth Control Input/Output Waveforms the charge control circuit. The noise power σV2 se after 20 µs is
0.1 µV2 . Therefore the RNRF of this circuit is 0.62/0.1 = 6.2.
all of the capacitor, transistor and amplifier characteristics for
Figure 9. Figure 20 shows the transient noise simulation of A summary of the simulation results compared with the-
the bandwidth control circuit. The hard reset noise voltage oretical calculations from the previous Section are shown in
power on the capacitive sensor σV2 se at 5 µs is approximately Table IV. Note that CC is capacitive control, BC is bandwidth
0.4 µV2 . This result corresponds to about 60% of the predicted control, and CHC is charge control.
hard reset value csekT+cf . The noise power σVse after 25 µs is
2

68 nV . Therefore the RNRF of this circuit is 6.5/.68 = 9.5.

2 VI. D ISCUSSION
Figure 21 shows the SPICE input waveforms used for Although the reset noise reduction factor (RNRF) is a key
simulating the charge control circuit shown in Figure 14 and design parameter, it often must be traded off against other
10 RESUBMITTED TO: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. DRAFT 1.1: 5 DEC. 2005

Component Parameter Value units units Fowler [5] Pain [7] Lee [8] Kozlowski [10]
cse capacitance 6.7 fF RNRT CC BC & CHC CHC BC
M1 W/L 0.42/0.6 µm RNRF 18 40 3.9 14
M1 threshold voltage 0.45 V Reset time µs 25 5 40 10
Mf 1 W/L 0.7/1.2 µm Pixel size µm2 21×21 10×10 5.9×5.9 5×5
Mf 1 threshold voltage 0.45 V Tech µm 0.35 0.5 0.18 0.25
Mf 1 transconductance 21.3 µS Lag %FS 0.02 0 – 0.012
Mf 1 body effect conductance 6.2 µS Swing V 1 0.975 0.4 0.8
mf 1 output conductance 49 nS Vdd V 3.3 5.0 1.8 3.3
cmp1 gain bandwidth 167 MHz
cmp1 DC gain 2311 TABLE V
cmp1 input referred noise 5.79 nV2 M EASURED R ESULTS FROM THE L ITERATURE
vref voltage 0.85 V
Ir current 0.23 nA
TABLE III
C HARGE C ONTROL S IMULATION C OMPONENT PARAMETERS VII. C ONCLUSION
We have presented a theoretical framework and computa-
Circuit #3, Vse Noise Power
tional methods for understanding and modeling reset noise
0.0001
Vse_noise in capacitive sensors. The methods have been demonstrated
1e-05
on several circuits which are currently in use. It is clear that
there are many issues in deciding on a “best choice” for a
1e-06 specific sensor circuit. These include: reset noise reduction
factor (RNRF), reset speed, size/complexity, signal swing, and
Volts^2

1e-07
others. We have summarized the key characteristics of the
1e-08
three example circuits in Table IV.
It appears that circuits which provide noise reduction
1e-09
0 5e-06 1e-05 1.5e-05 2e-05 2.5e-05
through feedback are necessarily time varying and often non-
time
linear. The circuit’s noise behavior cannot be well-modeled
Fig. 22. Charge Control Transient Noise Waveforms
using linear time invariant approximations. This leads to the
conclusion that either Itô calculus or Monte Carlo simulation
methods are required for analysis. The Itô calculus is not
competing circuit parameters. These other parameters include widely used in circuit analysis, but it is particularly well-suited
fixed pattern noise (or voltage offset), lag, signal swing, circuit for the circuits presented here. Moreover, the Itô calculus
stability, and reset speed. Balancing these tradeoffs is the key method is computationally much more efficient than methods
to producing low noise capacitive sensor circuits which best based on Monte Carlo sampling for performing transient noise
meet specific needs . Since we have focused on understanding analysis. In addition, the Itô calculus method can be used to
the RNRF in this paper, measured results from the literature obtain both closed form and numerical noise power solutions
are presented in Table V to help the reader understand some of for time varying and/or non–linear circuits.
the design tradeoffs. In a future paper we plan to analyze these We hope that these results will contribute to the understand-
other design parameters. Table V presents circuit parameters ing, evaluation, and implementation of reset noise reduction
and measured results from four circuits that use different reset techniques.
noise reduction techniques (RNRT). Note that Lag is defined
in [5], and Swing is defined as the maximum voltage swing A PPENDIX
across a capacitive sensor. The results presented in Table V D ERIVATION OF C HARGE C ONTROL N OISE
clearly show that lag is not a problem for any of the reset noise
reduction techniques. Reset noise reduction techniques typ- In this Appendix we derive Equations 36, 37, and 38. This
ically increase reset time from nano/pico–seconds to micro– requires us to determine the mean and variance of Vse (t) when
seconds. These circuits can be implemented using a wide range t > Tsw + ∆T . The voltage across cse , when t > Tsw + ∆T ,
of CMOS geometries. Although it is not shown in Table V, is Z Tsw +∆T
1
our experience indicates that BC techniques often suffer from Vse = Vse (0) − Ir (τ )dτ, (40)
stability problems associated with the time varying nature of cse 0
the time constants in the feedback loop. where Tsw + ∆T is the duration of time the current source is
connected to the sensor, and Vse (0) is the initial voltage on
the capacitive sensor after hard reset. Note that Tsw and ∆T
CC BC CHC
Simulated RNRF 21.8 9.5 6.2 are assumed to be a random variables. This integral can be
Theoretical RNRF 23.2 11.7 7.0 separated into; the voltage at which the comparator switches,
%RNRF difference between 6.5% 23.1% 12.9% Vse (Tsw ), and the integral of the current source while the
simulation and theory values
comparator is switching,
TABLE IV
Z Tsw +∆T
S UMMARY OF S IMULATION R ESULTS 1
Vse = Vse (Tsw ) − Ir (τ )dτ. (41)
cse Tsw
FOWLER, GODFREY, AND MIMS: RESET NOISE REDUCTION IN CAPACITIVE SENSORS 11

We assume that the input-referred noise of the comparator, 2i2r ∆t2 i2r ∆t2
+ (59)
Vn1 (t), is aR white random process with zero mean and variance c2se c2se
σV2 n1 , and 0 Ir q(τ ) dτ , is a Poisson process with parameter iqr .
t
qir ∆t + i2r σ∆T
2
= σV2 n1 + , (60)
Note that Z t  2
cse
Ir (τ ) ir t
E dτ = (42) where equations 50 and 51 lead to equations 52 and 53 because
q q
Vse (Tsw ) and 0 Ir q(τ ) dτ are uncorrelated. Note that qse =
0
R ∆T
and "Z 2 # cse vse , and therefore the input referred charge noise is
t
Ir (τ ) ir t ir t
E dτ − = . (43) σq2se = c2se σV2 se (61)
0 q q q
 qir ∆t + i2r σ∆T
2 
= c2se σV2 n1 + (62)
Since Ir q(τ ) dτ is a Poisson process we can further simplify
R
c2se
Equation 41 using the independent increment property, i.e. 2 2
= cse σVn1 + qir ∆t + i2r σ∆T
2
. (63)
Z ∆T
q Ir (τ )
Vse = Vse (Tsw ) − dτ. (44) ACKNOWLEDGMENT
cse 0 q
We thank Tobi Delbrück, Abbas El Gamal, Dana How, John
Defining ∆t = E[∆T ] and σ∆T 2
= E[(∆T − ∆t)2 ], using the
Lazarro, Chiao Liu, Dick Lyon, and Sam Kavusi for their
assumption that all the random variables and processes are
helpful comments.
uncorrelated, and using conditional expectations, we find
h q Z ∆T I (τ ) i R EFERENCES
dτ (45)
r
E[Vse ] = E[Vse (Tsw )] − E
cse 0 q [1] H. Tian, B. Fowler, and A. El Gamal, “Analysis of Temporal Noise
= E[vref + Vn1 ] − (46) in CMOS APS,” in Proceedings of SPIE, vol. 3649, San Jose, January
1999.
[2] W. Yu and B. H. Leung, “Noise Analysis for Sampling Mixers Using
" #
h q Z ∆T I (τ ) i
(47)
r
E E dτ ∆T Stochastic Differential Equations,” IEEE Trans. Circuits and Systems II,
cse 0 q vol. 46, no. 6, pp. 699–704, June 1999.
" # [3] D. Ham and A. Hajimiri, “Complete Noise Analysis for CMOS
ir ∆T Switching Mixers via Stochastic Differential Equations,” in CICC2000,
= vref − E (48) Orlando, Florida, May 2000.
cse
[4] B. Pain et al., “Analysis and Enhancement of Low-light-level Per-
ir ∆t formance of Photodiode-type CMOS Active Pixel Imagers Operated
= vref − . (49) with Sub-threshold Reset,” in 1999 IEEE Workshop on CCDs and AIS,
cse Nagano, June 1999.
Note that equation 45 leads to equations 46 and 47 because [5] B. A. Fowler, M. D. Godfrey, J. Balicki, and J. Canfield, “Low-noise
Readout Using Active Reset for CMOS APS,” in Proceedings of SPIE,
E[Vse (Tsw )] is the voltage at which the comparator switches vol. 3965, San Jose, January 2000, pp. 126–135.
and E[g(X, Y )] = E[E[g(X, Y )|Y ]] (this can be shown [6] W. Loose et al., “2/3in CMOS Image Sensor for High Definition
using equation 6 and f (x, y) = f (x|y)f (y)). Using these Television,” in 2001 IEEE Workshop on CCDs and AIS, Lake Tahoe,
Nevada, June 2001.
assumptions we find: [7] B. Pain et al., “Reset Noise Suppression in Two-Dimensional CMOS
" Photodiode Pixels through Column-based Feedback-Reset,” in 2002
IEDM, 2002, pp. 809–811.
2
σVse = E Vse (Tsw ) − (50) [8] K. Lee and E. Yoon, “A CMOS Image Sensor with Reset Level Control
Using Current Source for Noise Suppression,” in 2004 ISSCC Digest of
Z ∆T 2 # Technical Papers, San Francisco, CA, February 2004, pp. 114–115.
q Ir (τ ) ir ∆t [9] Y. Chen and S. Kleinfelder, “CMOS Active Pixel Sensor Achieving 90
dτ − vref + (51)
cse 0 q cse dB Dynamic Range with Column-level Active Reset,” in Proceedings
of SPIE, vol. 5301, San Jose, January 2004, pp. 438–449.
[10] L. Kozlowski et al., “A Progressive 1920×1080 Imaging System–on–
h i
= E (Vse (Tsw ) − vref )2 + (52)
Chip for HDTV Cameras,” in ISSCC Digest of Technical Papers, San
h q
Z ∆T
Ir (τ ) ir ∆t 2 i Francisco, February 2005.
E − dτ + (53) [11] Z. Brzezniak and T. Zastawniak, Basic Stochastic Processes. London:
cse 0 q cse Springer, 1958.
[12] R. Durrett, Stochastic Calculus. Boca Raton, Florida: CRC Press, 1996.
" Z ∆T
h q Ir (τ ) [13] A. Demir, E. W. Y. Liu, and A. L. Sangiovanni-Vincentelli, “Time-
= σV2 n1 + E E − dτ + (54)
cse 0 q Domain Non-Monte Carlo Noise Simulations for Nonlinear Dynamic
Circuits with Arbitrary Excitations,” IEEE Transactions on Computer-
aided Design of Integrated Circuits and Systems, vol. 15, no. 5, pp.
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ir ∆t 2 i
∆T (55) 493–505, May 1996.
cse [14] K. S. Shanmugan and A. M. Breipohl, Random Signals: Detection,
" Estimation and Data Analysis. New York: John Wiley & Sons, 1988.
1 [15] A. van der Ziel, Noise in Solid State Devices. New York: John Wiley
2
= σVn1 + E 2 (i2r ∆T 2 + qir ∆T ) − (56) & Sons, 1986.
cse [16] H. Nyquist, “Thermal Agitation of Electric Charge in Conductors,” Phys.
Rev., vol. 32, pp. 110–113, July 1928.
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2i2r ∆t∆T i2r ∆t2 [17] R. Sarpeshkar, T. Delbrück, and C. A. Mead, “White Noise in MOS
+ 2 (57)
c2se cse Transistors and Resistors,” IEEE Circuits and Devices Mag., pp. 23–29,
November 1993.
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c2se
12 RESUBMITTED TO: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. DRAFT 1.1: 5 DEC. 2005

Boyd Fowler Boyd Fowler was born in California

in 1965. He received his M.S.E.E. and Ph.D. degrees
from Stanford University in 1990 and 1995 respec-
tively.
After finishing his Ph.D. he stayed at Stanford
University as a research associate in the Electrical
Engineering Information Systems Laboratory until
1998. In 1998 he founded Pixel Devices Interna-
tional in Sunnyvale California. Presently he is CTO
and VP of Technology at Fairchild Imaging. He has
authored numerous technical papers and patents. His
current research interests include CMOS image sensors, low noise image
sensors, noise analysis, and data compression.

Michael D. Godfrey Michael Godfrey obtained his

BS degree from the California Institute of Technol-
ogy in 1959 and a PhD. degree from the University
of London in 1962. He was a founding Faculty
member of the Statistics Department at Princeton
University, a Member of the Technical Staff at Bell
Labs, Murray Hill, NJ, and held the Schlumberger
Chair at Imperial College of Science, Technology
and Medicine in London. He is now Consulting
Professor in Electrical Engineering at Stanford Uni-
versity. He spent a period working in industry at
AT&T and as Director of Research at Sperry Univac. His current interests are
in CMOS imaging and in noise in physical systems.

Steve Mims Stephen Mims received the B.S. and

M.S. degrees in electrical engineering from Stanford
University in 1992 and 1993 respectively. From 1994
through 1999 he worked at Cardinal Sound Labs
where he helped develop the Radiant Beam Array,
a multi-microphone hearing aid device. In 2000,
he joined Pixel Devices Intl, working on analog
circuitry for CMOS image sensors, and moved with
the design team to Agilent Technologies in 2003.
He currently works on both CMOS and CCD image
sensors at Fairchild Imaging.
FOWLER, GODFREY, AND MIMS: RESET NOISE REDUCTION IN CAPACITIVE SENSORS
R ESPONSE TO R EVIEWERS OF D RAFT 1.0
A. Reviewer 1
Reviewer Said:
From the standpoint of someone not familiar with Itô
calculus, the presentation of this material is too brief to offer
useful insight to the average reader. Particularly, the inclusion
of the Wiener vector W(t) lacks sufficient explanation, and
the entire workup hinges on the “Itô formula” of equation
20, which is pulled from a reference on the subject. As a
reader attempting to understand what this technique offers,
even intuitively, the presentation of this material in its current
form is not very useful.
The description of circuit operation is too vague. Without
past familiarity with these techniques I would have had a diffi-
cult time understanding the circuits’ behavior without referring
to the references. For example, in Fig. 5 the DC operating
point of Vst could lie anywhere between the rails depending
on the exact circuit parameters and the result of the previous
noise-cancellation cycle. Would this then allow M1 to turn on
the next cycle? Also, how can we be sure that M1 operates
in the triode region without some limitations on Vreset and
Vst? Without this, you won’t necessarily get circuit settling
between t1 & t2. There are many other small issues like this
that I ran across in the paper. In general, I think that the reason
for this is that your circuits are specific topologies pulled from
photodetector applications, with corresponding assumptions on
voltages, timing, etc. (that are not discussed here), and are
overly complicated for the concepts you are trying to convey.
I would recommend reducing their complexity, which would
allow you to keep your explanation of their operation as brief
as possible without confusing the reader.
I do like the idea behind the ping-pong analogy, and think
that it could be useful in understanding circuit noise behavior.
A few comments on this stuff for you. For Fig. 8, the analogy
seems a little shaky because it does not allow for a sort of
capacitive current effect. What I mean, is that Cf can start with
0 net charge and either add or subtract charge from Cse, but in
your model Cf can only add if balls are present in it to begin
with. Also, even if Cf is smaller than Cse, you can completely
fill or drain Cse of charge given large enough rails, but you
cannot do this in your analogy. Also, I think there may be
something a little fishy in drawing a parallel between a finite
volume and an ideal capacitor since an ideal capacitor has
infinite charge capacity (without rail limitations) while your
model affords it only finite ball capacity. You’d really need a
finite cross-section, infinite height box, right? Then, capping
the box off at two levels corresponds to your upper and lower
rails, which don’t move (you can’t raise and lower boxes as
you did in some illustrations, you’d have to reduce the volume
if you do). The ramp would also need to slide along the box
to stay pinned at the height of the top ping-pong balls for the
voltage analogy to hold, rather than moving the height of the
bottom of the boxes (moving the bottom would be like moving
ground).
Response
1) General: We have made numerous changes in response
to these comments. About the major points: (1) we have not
13
attempted a full description of the Itô Calculus, but we have
tried to clarify specifically why it is required, and we have
included the useful reference [2], (2) we have clarified the
ping-pong analogy, but we stopped short of any implication
that ping-pong balls are really like big electrons – we think
this analogy is helpful, but it is not exactly right, (3) we have
moved some of the mathematics to an Appendix.
2) ¶1: Within the space limits, we have tried to clarify the
introduction of the Wiener process and the use of Itô Calculus.
3) ¶2: We made the circuit descriptions more specific and
precise – we think this will be found quite helpful. We did
not extend the analysis to such issues as timing, but we have
tried to be more specific about what we do present.
4) ¶3: We have made the ping-pong ball analogy more
specific to the extent that we think is possible. It is not good,
we think, to push this too far.
B. Reviewer 2
Reviewer Said:
Excellent work!
Response
Thanks.
C. Reviewer 3
Reviewer Said:
This paper is an interesting application of the time-domain
stochastic differential equations (SDE) to the analysis of three
reset noise reduction techniques. The paper is concise and
well-written.
The main contribution of this paper is an SDE analysis
for capacitive reset noise. The time-domain SDE approach
and the solution technique are essentially the same as that
in reference [16] and the following paper (which should also
be referenced):
W. Yu and B. H. Leung, “Noise analysis for sampling mixers
using stochastic differential equations,” IEEE Trans. Circuits
and Systems II, vol.46, no.6, June 1999, pp.699-704.
Although the SDE techniques themselves are not new, the
application of SDE to reset noise reduction technique is a very
interesting one. The paper represents a novel contribution.
The paper analyzes three different reset noise reduction
techniques. My main technical comments are as below:
1. On the “Bandwidth Control” part of the paper in which
a time-varying SDE is used to characterize the reset noise: As
the authors point out in equations (25)-(27), the coefficients
of the SDE depend on a time-varying parameter r(t). This by
itself does not represent a technical difficulty, as the covariance
process of a stochastic process governed by a time-varying
SDE can be converted into a deterministic ordinary differential
equation in the same way as in equations (20)-(21), except in
this case the coefficients (i.e. the equivalent D and E) are time
varying. Such a time-varying ODE can be easily simulated
if not solved exactly. The simulation of the covariance ODE
is much faster than a Monte Carlo simulation of the SDE.
Instead of taking this approach, the paper assumed that r(t) is
a constant and chose to instead present a closed-form solution,
which is not entirely accurate. Why? A revision of the paper
14 RESUBMITTED TO: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. DRAFT 1.1: 5 DEC. 2005

should either deal with the time-varying aspect of the solution

explicitly or justify the assumption of r(t)=constant rigorously.
2. On the “Charge Control” part of the paper: Why is ∆t
a constant? ∆t is the amount of time that the current source
is connected to the capacitor. This amount of time depends
on Vse , which is itself random. Thus, it appears to me that
an additional source of noise would be incurred due to the
randomness in ∆t. Why can this be ignored?
Response
1) General: We included the Yu reference.
Technical Points:
2) Bandwidth Control: We made major changes to this
Section in order to respond to these comments. We think that
the result is a substantial improvement.
3) Charge Control: The lack of clarity about ∆t was a
major oversight, which we think we have corrected.

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