PD - 95103

IRF1010NSPbF
l Advanced Process Technology IRF1010NLPbF
l Ultra Low On-Resistance HEXFET® Power MOSFET
l Dynamic dv/dt Rating
D
l 175°C Operating Temperature VDSS = 55V
l Fast Switching
l Fully Avalanche Rated
RDS(on) = 11mΩ
l Lead-Free G
Description ID = 85A‡
Advanced HEXFET ® Power MOSFETs from
S
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast switching
speed and ruggedized device design that HEXFET
power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device
for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The D 2 Pak TO-262
D2Pak is suitable for high current applications because of its IRF1010NSPbF IRF1010NLPbF
low internal connection resistance and can dissipate up to
2.0W in a typical surface mount application.
The through-hole version (IRF1010NL) is available for low-
profile applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V ˆ 85‡
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V ˆ 60 A
IDM Pulsed Drain Current ˆ 290
PD @TC = 25°C Power Dissipation 180 W
Linear Derating Factor 1.2 W/°C
VGS Gate-to-Source Voltage ± 20 V
IAR Avalanche Current 43 A
EAR Repetitive Avalanche Energy 18 mJ
dv/dt Peak Diode Recovery dv/dt ƒˆ 3.6 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.85
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** ––– 40 °C/W

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IRF1010NS/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.058 ––– V/°C Reference to 25°C, ID = 1mA ˆ
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 11 mΩ VGS = 10V, ID = 43A „
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 32 ––– ––– S VDS = 25V, ID = 43A„ˆ
––– ––– 25 VDS = 55V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Qg Total Gate Charge ––– ––– 120 ID = 43A
Qgs Gate-to-Source Charge ––– ––– 19 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 41 VGS = 10V, See Fig. 6 and 13 „ˆ
td(on) Turn-On Delay Time ––– 13 ––– VDD = 28V
tr Rise Time ––– 76 ––– ID = 43A
ns
td(off) Turn-Off Delay Time ––– 39 ––– RG = 3.6Ω
tf Fall Time ––– 48 ––– VGS = 10V, See Fig. 10 „ ˆ
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH
from package G

LS Internal Source Inductance ––– 7.5 –––

and center of die contact S

Ciss Input Capacitance ––– 3210 ––– VGS = 0V

Coss Output Capacitance ––– 690 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 140 ––– pF ƒ = 1.0MHz, See Fig. 5 ˆ
EAS Single Pulse Avalanche Energy‚ˆ ––– 1030 250† mJ IAS = 4.3A, L = 270µH

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

––– ––– 85‡

(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 290

(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 43A, VGS = 0V „
trr Reverse Recovery Time ––– 69 100 ns TJ = 25°C, IF = 43A
Qrr Reverse Recovery Charge ––– 220 230 nC di/dt = 100A/µs „ˆ
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by † This is a calculated value limited to TJ = 175°C .
max. junction temperature. ( See fig. 11 ) ‡ Calculated continuous current based on maximum allowable
‚ Starting TJ = 25°C, L = 270µH
junction temperature. Package limitation current is 75A.
RG = 25Ω, IAS = 43A, VGS=10V (See Figure 12)
ƒ ISD ≤ 43A, di/dt ≤ 210A/µs, VDD ≤ V(BR)DSS, ˆ Uses IRF1010N data and test conditions.
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
TJ ≤ 175°C
For recommended footprint and soldering techniques refer to
„ Pulse width ≤ 400µs; duty cycle ≤ 2%.
application note #AN-994.
This is a typical value at device destruction and
represents operation outside rated limits.
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 IRF1010NS/LPbF

1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V

I D , Drain-to-Source Current (A)

I D , Drain-to-Source Current (A)

7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V
100 100

4.5V
4.5V
10 10

20µs PULSE WIDTH 20µs PULSE WIDTH

TJ = 25 °C TJ = 175 ° C
1 1
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 2.5
ID = 85A
RDS(on) , Drain-to-Source On Resistance

TJ = 25 ° C
I D , Drain-to-Source Current (A)

2.0
TJ = 175 ° C
(Normalized)

1.5

10

1.0

0.5

V DS = 25V
20µs PULSE WIDTH VGS = 10V
1 0.0
4 6 8 10 12 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
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IRF1010NS/LPbF

20
6000 ID = 43A
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED VDS = 44V

VGS , Gate-to-Source Voltage (V)

5000 Crss = Cgd
16 VDS = 27V
Coss = Cds + Cgd VDS = 11V
C, Capacitance(pF)

4000 Ciss
12

3000
Coss
8
2000

1000 Crss 4

FOR TEST CIRCUIT

0 SEE FIGURE 13
0
1 10 100 0 20 40 60 80 100 120
VDS, Drain-to-Source Voltage (V) QG , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)

ID, Drain-to-Source Current (A)

100
TJ = 175 ° C
100

10
100µsec

10 1msec
1 TJ = 25 ° C

Tc = 25°C
Tj = 175°C 10msec
V GS = 0 V
0.1 Single Pulse
0.0 0.6 1.2 1.8 2.4 1
VSD ,Source-to-Drain Voltage (V) 1 10 100 1000
VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRF1010NS/LPbF

100
RD
LIMITED BY PACKAGE VDS

VGS
80 D.U.T.
RG
ID , Drain Current (A)

+
-VDD
60
V GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
40

Fig 10a. Switching Time Test Circuit

20
VDS
90%

0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

D = 0.50
Thermal Response (Z thJC )

0.20

0.10
0.1

0.05 PDM
SINGLE PULSE
0.02 (THERMAL RESPONSE) t1
0.01
t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF1010NS/LPbF

500
ID

EAS , Single Pulse Avalanche Energy (mJ)

15V
TOP 18A
30A
DRIVER
400 BOTTOM 43A
VDS L

RG D.U.T + 300
V
- DD
IAS A
VGS
20V
tp 0.01Ω
200

Fig 12a. Unclamped Inductive Test Circuit

100
V(BR)DSS
tp
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( °C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current
I AS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

VGS +
V
D.U.T. - DS
QGS QGD
VGS
VG 3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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 IRF1010NS/LPbF
Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T* • Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• ISD controlled by Duty Factor "D" VDD
-
• D.U.T. - Device Under Test
VGS

* Reverse Polarity of D.U.T for P-Channel

Driver Gate Drive

P.W.
Period D=
P.W. Period

[VGS=10V ] ***

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[VDD]
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% [ISD ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

Fig 14. For N-channel HEXFET® power MOSFETs

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IRF1010NS/LPbF

D2Pak Package Outline

Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information (Lead-Free)

T H IS IS AN IR F 5 3 0 S W IT H P AR T N U M B E R
L OT CODE 80 2 4 IN T E R N AT IO N AL
AS S E M B L E D ON W W 0 2, 20 00 R E C T IF IE R F 5 30 S
IN T H E AS S E M B L Y L IN E "L " L OGO
D AT E C O D E
N ote: "P " in as s em bly lin e Y E AR 0 = 2 0 0 0
po s itio n in dicates "L ead-F r ee" AS S E M B L Y
L O T CO D E W E E K 02
L IN E L

OR
P AR T N U M B E R
IN T E R N AT IO N AL
R E C T IF IE R F 530S
L OGO
D AT E CO D E
P = D E S IG N AT E S L E AD -F R E E
AS S E M B L Y P R O D U C T (O P T IO N AL )
L OT COD E Y E AR 0 = 2 0 0 0
W E E K 02
A = AS S E M B L Y S IT E CO D E

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 IRF1010NS/LPbF
TO-262 Package Outline

IGBT
1- GATE
2- COLLECTOR
3- EMITTER

TO-262 Part Marking Information

EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789 PART NUMBER
INT ERNAT IONAL
AS SEMBLED ON WW 19, 1997
RECT IFIER
IN T HE ASS EMBLY LINE "C" LOGO
Note: "P" in as s embly line DAT E CODE
pos ition indicates "Lead-Free" YEAR 7 = 1997
ASS EMBLY
LOT CODE WEEK 19
LINE C

OR
PART NUMBER
INT ERNAT IONAL
RECT IFIER
LOGO
DAT E CODE
P = DES IGNAT ES LEAD-FREE
AS S EMBLY PRODUCT (OPTIONAL)
LOT CODE YEAR 7 = 1997
WEEK 19
A = AS S EMBLY S ITE CODE

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IRF1010NS/LPbF

D2Pak Tape & Reel Infomation

Dimensions are shown in millimeters (inches)

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161)
1.50 (.059) 0.368 (.0145)
3.90 (.153)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)

1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)

12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)

(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/04
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/