MIPS machine language problems

Question 1 (MT #1 Spring 2016)

a) Assemble the following MIPS code sequence into the equivalent machine code (in hex
format). Write your answer to the right side of each instruction.

li $t1,-5 addi$t1,$0,-5 -> 0x2009FFFB

loop: sub $t1,$t1,3 loop: addi$t1,$t1,-3 -> 0x2129FFFD
bgt $t1,$a1,loop
slt$at,$a1,$t1 -> 0x00A9082A
bne$at,$0,loop -> 0x1420FFFC

b) Disassemble the following three machine code instructions (in hexadecimal) to their
equivalent MIPS assembly language instructions. Write your answer to the right side of each
instruction. For partial credit, show your work.

0x15050001 bne $t0, $a1, label

0x20420001 addi $v0, $v0, 1
0x8C840000 label: lw $a0, 0 ($a0)

000101 01000 00101 0000000000000001

bne $8 $5 PC + 4 + (1 x 4)

001000 00010 00010 0000000000000001

addi $2 $2 1

100011 00100 00100 0000000000000000

lw $4 $4 0

Question 1 (Quiz #1 Sec1 Spring 2016)

Give the machine code for the MIPS assembler code assembled at the starting address 0x0040 0000. (You
may use a combination of decimal, hexadecimal and/or binary encodings.)

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Questions 1 & 2 (Quiz #1 Sec3 Spring 2016)

1. How is the jump target address calculated for j and jal instructions?

The 26 bit address field in the J-format instruction is extended to 28 bits by multiplying
by 4 (or shifting left 2 places, or concatenating two 0s). Then the most significant 4 bits
from PC+4 (bits 31-28) are concatenated at the left to form the 32-bit pseudo-direct
address, of the jump target.

2. Assemble this line of MIPS code into its equivalent machine code. Don't write 32 ones
and zeros; instead, show the instruction format and in each field, give the correct value
(in base 10 numbers): sw $sp, 8($s5)

opcode rs rt immediate
43 21 29 8

Question 1 (MT #1 Fall 2015)

a) MIPS assembly to machine code

Assemble the following MIPS code into the equivalent machine language code. Next to each
instruction, give the machine code in hexadecimal form. [To be able to gain partial credit, you
should show your work, giving the machine code in binary form also.]

Top: lh $t0, 62 ($s5)

sub $t8, $gp, $k1

2
 bne $ra, $a2, Top

lh rs=$21 rt=$8 immed=62

100001 10101 01000 0000000000111110
HEX: 0x86A8003E

R-type $28 $27 $24 shamt sub

000000 11100 11011 11000 00000 100010
HEX: 0x039BC022

bne $31 $6 -3
000101 11111 00110 1111111111111101
HEX: 0x17E6FFFD (immediate is -3, since Branch Target Address is: PC + 4 + [SignExt
(immed) x 4 ]

b) MIPS machine code to assembly

What assembly language statement do each of the following hexadecimal patterns represent, if
interpreted as a MIPS machine instruction?

i) 0x0000000C :

The binary bit pattern is: 0000 0000 0000 0000 0000 0000 0000 1100
opcode = 000000 = 0 this code is for all R-type instructions
funct = 001100 = 12, the code for syscall
rs field = rt field = rd field = 0
shamt field = 00000 = 0
the MIPS instruction is : syscall

ii) 0x9681FFE8 :

The binary bit pattern is: 1001 0110 1000 0001 1111 1111 1110 1000
Opcode = 100101 = 37 this code is for lhu (load halfword unsigned), an I-type
instruction
rs field = 10100 = 20, the code for $s4
rt field = 00001 = 1, the code for $at
immed field = 1111111111101000, which is -24
the MIPS instruction is: lhu $at, -24 ($s4)

iii) 0xE7A40008 :

The binary bit pattern is: 1110 0111 1010 0100 0000 0000 0000 1000
Opcode = 111001 = 57 this code is for swc1 (store word coprocssor 1), an I-type
instruction
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 rs field = 11101 = 29, the code for $sp
rt field = 00100 = 4, the code for $ft0 or $4 (floating point register ft0, in coprocessor 1)
immed field = 0000000000001000, which is 8
the MIPS instruction is: swc1 $ft0, 8 ($sp)

Question 1 (MT #1 Spring 2015)

a) MIPS assembly to machine code

Assemble the following MIPS code into the machine language. For each instruction, give the
machine code in binary form, along with the hexadecimal equivalent.

beq $a3, $fp, Continue

sub $s0, $sp, $t9
Continue: lw $k0, 28 ($v0)

beq $7 $30 immed

000100 00111 11110 0000000000000001
HEX: 0x10FE0001 (immediate is 1, since Branch Target Address is: PC + 4 + [SignExt
(immed) x 4 ]

R-type $29 $25 $16 shamt sub

000000 11101 11001 10000 00000 100010
HEX: 0x03B98022

lw $2 $26 28
100011 00010 11010 0000000000011100
HEX: 0x8C5A001C

b) (12 points) MIPS machine code to assembly

What assembly language statement do the following hexadecimal patterns represent, if

interpreted as a MIPS machine instruction?

iv) 0xC3E1000C :
The binary bit pattern is: 1100 0011 1110 0001 0000 0000 0000 1100
Opcode = 110000 = 45 this code is for ll (load linked), an I-type instruction
rs field = 11111 = 31, the code for $ra
rt field = 00001 = 1, the code for $at
immed field =0000000000001100, which is 12
the MIPS instruction is : ll $at, 12 ($ra)

v) 0xAAAAAAAA :
The binary bit pattern is: 1010 1010 1010 1010 1010 1010 1010 1010
Opcode = 101010 = 42 this code is for swl (store word left), an I-type instruction
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 rs field = 10101 = 21, the code for $s5
rt field = 01010 = 10, the code for $t2
immed field = 1010101010101010, which is -21846
the MIPS instruction is: swl $t2, -21846 ($s5)

vi) 0x00000000 :
The binary bit pattern is: 0000 0000 0000 0000 0000 0000 0000 0000
Opcode = 000000 = 0 this code is for an R-type instruction
rs field = 00000 = 0, the code for $0 (or $zero)
rt field = 00000 = 0, the code for $0
rd field = 00000 = 0, the code for $0
shamt field = 00000 = 0
funct field = 000000 = 0 this code is for sll (shift left logical)
the MIPS instruction is: sll $0, $0, 0

Question 1 (Quiz 2 Sec2 Spring 2015)

a) Assemble the MIPS jump instruction into machine code (give the machine instruction
in hex)
Top: instruction1
instruction2
instruction3
0x0040F124: j Top

Address of Top is 0x0040F118 = 0000 0000 0100 0000 1111 0001 0001 1000

26-bit address field (from above) must be 0000 0100 0000 1111 0001 0001 10

opcode for j is 000010

J-type | 000010 | 0000 0100 0000 1111 0001 0001 10 |

Machine code is 0x 0810 3C46

b) Disassemble this MIPS machine instruction into assembly code

0x343CF0F0

0011 0100 0011 1100 1111 0000 1111 0000

Opcode is 001101 = 13 = ori, which is I-type

I-type | 001101 | 00001 | 11100 | 1111 0000 1111 0000 |

op=17 rs=1 rt=28 immed = oxF0F0
ori $at $gp

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 So the assembly language instruction is ori $gp, $at, 0xF0F0

Question 2 (Quiz 2 Sec1 Spring 2015)

a) Assemble this MIPS instruction into machine code (give the machine instruction in
hex)
BEQ_LOAD: beq $s1, $t9, BEQ_LOAD

beq is I-type format . opcode = 4 rs = $s1 = $17 rt = $t9 = $25

BTA = PC + 4 + SignExt (immed||00), so immed must = -1

opcode rs rt immed
000100 10001 11001 1111 1111 1111 1111

= 0x 1239FFFF

b) Disassemble this MIPS machine instruction into assembly code

0x23A4FFFE

= 0010 0011 1010 0100 1111 1111 1111 1110

opcode = 001000 = 8, which is addi, so format is I-type

opcode rs rt immed
001000 11101 00100 1111 1111 1111 1110

rs = 29 = $sp rt = 4 = $a0 immed = -2

The assembly instruction is: addi $a0, $sp, -2

Question 2 (Quiz 1 Spring 2015)

Assemble this line of MIPS code into its equivalent machine code. Don't write 32 ones and
zeros; instead, show the instruction format and in each field, give the correct value (in base
10 numbers): sw $sp, 8($s5)

opcode rs rt immediate

43 21 29 8

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Question 5 (Retake Spring 2014)

a. Interpret the 32-bits in 0x8024FFF9 as a MIPS machine language instruction. Give the
equivalent MIPS assembly language instruction. Show your work and write your answer in the
box provided below.
lb $a0, -7($at)

1000 0000 0010 0100 1111 1111 1111 1001

100000 00001 00100 1111111111111001
op=16=lb rs=at rt=a0 immed=-7

d. Assemble the MIPS pseudo-instruction Spin: bgt $t0, $s0, Spin into the equivalent real MIPS
machine language instructions, giving them in 8-digit hex format. Show your work and write the
answer in the box provided below.
0x0208082A

0x1420FFFE

bgt is a pseudoinstruction, which assembles into slt followed by bne

Spin: slt $at, $s0, $t0 000000 10000 01000 00001 00000 101010 (=0x0208082A)
bne $at, $0, Spin 000101 00001 00000 1111 1111 1111 1110 (=0x1420FFFE)
(Note: the immed must be -2, since it must branch back 2 instructions from PC+4)

Question 5 (MT #2 Spring 2014)

a. Translate the assembly language statement bgt $t9, $fp, Top into MIPS machine language,
giving the resultant machine language statement(s) in the standard 8-digit hex format. [The
statement at Top: is located just before the bgt statement.] Show your work and write your
answer in the box provided below.
0x03D9082A

0x1420FFFD
bgt $t9, $fp, Top is a pseudoinstruction, requiring 2 real MIPS instructions:
slt $at, $fp, $t9 op=0, rs=30, rt=25, rd=1, shamt=0, func=42
bne $at, $zero, Top op=5,rs=1 rt=0, immed= -3 (go back 3 from next instr to Top)

machine code for slt: 000000 11110 11001 00001 00000 101010 = 0x03D9082A
machine code for bne:000101 00001 00000 1111111111111101 = 0x1420FFFD

Question 1 (MT #1 Spring 2014)

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c. Interpret the 32-bits in 0xA3A1FFF8 as MIPS machine language instruction. Give the
equivalent MIPS assembly language instruction. Show your work and write your answer in the
box provided below. sb $at, -8($sp)

A3A1FFF8 = 1010 00 11 101 0 0001 1111 1111 1111 1000

opcode = 101000, so I-type, = sb
rs field = 11101 = $29 = $sp
rt field = 00001 = $1 = $at
1111111111111000 is a 2s complement value, = -8

Question #3 (Retake Fall 2013)

a) Assemble the following MIPS code into the machine language. Give the machine code in
hexadecimal next to each instruction.

bne $t0, $a1, L1 15 05 00 01

sltu $v0, $v1, $a3 00 67 10 2B
L1: lw $a0, 0 ($4) 8C 84 00 00

Give details for your answer below one by one for each instruction.

000101 01000 00101 00... 01 ==> 15 05 00 01

000000 00011 00111 00010 00000 10 1011 ==>00 67 10 2B

100011 00100 00100 00... 00 ==> 8C 84 00

Question #2 (Final Fall 2013)

a) Assemble the beq instruction into the equivalent machine code. Write your answer in the box.
Give your answer in Hexadecimal.

Skip:
lb $t9, -9 ($sp)
lw $t1, sum
beq $s3, $t5, Skip

12 6D FF FC

Note that lw instruction generated two instructions so we have to branch back 4 words. FF FC is
2s complement notation for -4.

If your lw instruction is taken as 1 word then in that case the answer is

12 6D FF FD
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b) Assemble j instruction into the equivalent machine code. Write your answer in the box. Give
your answer in Hexadecimal. Assume that the memory address of the label main is 00 40 00 0016.
.text
.globl main
main:
j Next
Comeback:
add $t1, $zero, $zero
add $t2, $zero, $zero
Next: <== address: 00 40 00 0C
addi $t3, $t1, 1

08 10 00 03

jump instruction: opcode (6 bits) address (26 bits).

In the address part get the leftmost 4 bits from PC (don't store), drop last 2 bits. In the following
the rightmost two 11 comes from the address of Next which is at 00 40 00 0C (C: 1100, we drop
the last two bits of C).
0000 10 00 0001 0000 0000 0000 0000 0011

Question #1 (MT #2 Fall 2013)

a. Consider the following code segment.

main: lw $8, 100($7) # at memory location 00 40 00 00 (hex.)

lw $5, main
beq $8, $5, main

i. Generate the machine language equivalent (object code) for the following MIPS instruction
of the above code segment. Give your answer in hexadecimal.

lw $8, 100($7)

8C E8 00 64

ii. What will be the contents of $5 (in hex) after executing the above code segment?

Note that the instruction at memory location "main" is loaded into $5.

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 8C E8 00 64

iii.. Generate the machine language equivalent (object code) for the following MIPS instruction
of the above code segment. Give your answer in hexadecimal.

beq $8, $5, main

Since lw $5, main is a pseudo that must be expanded into two real MIPS machine instructions,
the distance from main to the next instruction after the branch is 4. So this is a branch back of 4
words. The instruction beq is of I-type and instruction components are: 4, 8, 5, -4. In binary form
000100 01000 00101 1111 1111 1111 1100.
-4 in 2s complement using 16 bits is FF FC.

11 05 FF FC

b. Consider the following MIPS instruction in hexadecimal. Give its assembler instruction
equivalent as you would see in a source program.
AC B0 00 18

sw $16, 24($5)
or
sw $s0, 24($a1)

Question #5 (MT #1 Fall 2013)

a) Disassemble the following machine language instruction into the equivalent MIPS
assembly language instruction: 0x03B70822 Put your answer in the space provided.

0000 0011 1011 0111 0000 1000 0010 0010

000000 11101 10111 00001 00000 100010 so opcode=0 means R-type, func=34 means sub
rs=29=$sp, rt=23=$s7, rd=1=$at

sub $at, $sp, $s7

b) Assemble the following 2 MIPS instructions into the equivalent machine language
instructions, in hex format. Put your answers in the spaces provided.

lui opcode=15, rs=0 (unused), rt=$t9=25 immed=FF28

001111 00000 11001 FF28
0011 1100 0001 1001 FF28 = 3C19FF28

lui $t9, 0xFF28 0x3C19FF28

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sra opcode=0, rs=0 (unused), rt=$fp=30, rd=$a2=6, shamt=28, func=3,
000000 00000 11110 00110 11100 000011
0000 0000 0001 1110 0011 0111 0000 0011

sra $a2, $fp, 28 0x001E3703

Question #4 (MT #1 Fall 2013)

Give the MIPS machine code (in 8-digit hex format) for the lines of code marked below as a:, b:
and c: Let the first line of the program be located at the start of code space in MIPS memory, at
0x00400000. Write your answers in the space provided.

start:li $t0, 0x0FFFFFFC

a: jr $t0
Top: addi $s0, $zero, 28
b: j Next
la $t0, Top
slt $t1, $t0, $s0
c: bne $t1, $zero, Top
Next: . . .

Answers: jr $t0 has opcode=0, func=8. rs=8, but rt=rd=shamt=0. So the R-type
instruction is: 000000 01000 00000 00000 00000 001000

j Next is jump to 0x00400024, since li and la are each pseudoinstructions

which generate 2 real MIPS instructions each. The 26-bit addr field will
be appended to the MSB 4 bits of PC (which are 0000); also 00 will be
appended as LSBs. j has opcode=2, and the 26-bit addr field must be
0000 0100 0000 0000 0000 0010 01 in order to form 0x00400024. So the
J-type instruction is: 000010 00000100000000000000001001

bne $t1, $zero, Top has opcode=5, rs=9, rt=0. The address of Top is
0x0040000C, which is -6 instructions back from Next (which is PC+4, at
address 0x00400024). Therefore the relative branch offset in bytes from
PC+4 is -24, so the immediate value must be -6 (since it will be shifted
left by 2 by the hardware, before adding with PC+4 to form BTA). So the
I-type instruction is: 000101 01001 00000 1111111111111010

Machine Instruction
a) 0x01000008

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 b) 0x08100009
c) 0x1520FFFA

Question #2 (Retake Spring 2013)

For the following code segment consisting of 2 pseudo-instructions, give the MIPS machine code
instructions (in hexadecimal format) that will be generated by the assembler:

Target: nop # do nothing

Test: bge $t9, 11, Target # if $t9 > = 11, branch to Target

Write your answer in the box below. Use 8-digit hexadecimal format to represent the machine
language statements.

Solution:
The pseudo-instructions are translated into 3 real MIPS instructions as follows:
Target: sll $0, $0, 0
Test: slti $at, $t9, 11
beq $at, $zero, Target # the Target address is at PC + 4 – 12

So the equivalent machine code is:

R-format 000000 00000 00000 00000 00000 000000
I-format 001010 11001 00001 0000000000001011
I-format 000100 00001 00000 1111111111111101 (-12 bytes is -3 instructions)

In hexadecimal format, it is: 0x00000000

0x2B21000B

Question #3 (Makeup Spring 2013)

a) Disassemble the following MIPS machine code into its closest assembly language equivalent.
Assume that the code is normally located, in the Text (.txt) segment.

0x23E4FFFC
0x0F0F0F0F
Give the MIPS assembly instructions in the box. Show your work in the space after the box.
addi $a0, $ra, -4

jal 0x0C3C3C3C3C
12
0010 00|11 111|0 0100| 1111 1111 1111 1100
op=8 rs=31 rt= 4 immed16 = -4
addi $ra $a0 -4

0000 11|11 0000 1111 0000 1111 0000 1111 this is J-type, opcode is 3 for jal
PC[31-28] = 0000, since the Text segment is located below memory address 0x10000000
PC[27-0] = 11 0000 1111 0000 1111 0000 1111 || 00 where || means concatenated
= C 3 C 3 C 3 C

b) Assemble the following MIPS assembly code into its equivalent machine code instructions
and put them in hexadecimal format.
Top: sllv $a3, $s5, $t7
bne $a3, $k1, Top
Write your answer in the following box. Show your work in the space after the box.
0x01F53804

0x14FBFFFE

R-type: op=0 rs=15/t7 rt=21/s5 rd=7/a3 sham=0 funct=4 for sllv

000000 01111 10101 00111 00000 000100
I-type: op=5 rs=7/a3 rt=27/k1 Top is -2 instructions from the PC+4 next address
000101 00111 11011 1111 1111 1111 1110

c) What real MIPS assembly instructions would the MARS assembler generate, if the following
pseudoinstructions are its input:
ble $a0, $a1, Top
li $a2, -12345

Write your answer in the following box.

slt $at, $a1, $a0

beq $at, $zero, Top

The equivalent of ble is the slt-beq pair (but it can also be implemented with sub-blez)
Since -12345 fits into 16-bit immediate field, addi can be used to implement li. If it didn’t fit,
then lui-ori pair would be needed.

Question 1 (Problem Set 3 Spring 2013)

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Convert the following statements into their machine language equivalent. Give the hexadecimal
form of the instruction, as it would be found in memory (.text segment). Write your answers in
the boxes provided.

a) beq $t8, $s5, Loop_top (the instruction is located at 0xCCCF0064, and Loop_top is at
0xCCCFF044)

Branches use PC-relative addressing, so the branch target address is calculated as:
PC + 4 + SignExtended (immed16) * 4
The distance between the branch target and PC+4 is: F044 - 0068 = EFDC bytes (in base 2, …
00 1110 1111 1101 1100 bytes), which is …0011 1011 1111 0111 instructions. So the 16-bit
immediate value must be 0011 1011 1111 0111

op rs rt immed16
000100 11000 1 0101 0011 1011 1111 0111
bne $t8 $s5 difference in words ( branch target - PC+4)
The equivalent hexadecimal is 0x13153BF7

[Note that multiplying a value by 4, shifting the value left by two places, and concatenating 00 to
the right-hand end of the binary bits all do the same thing. ]

b) jal Call_point (the instruction is located at 0xC0F02444, and Call_point is at

0xCFF04F2C)

The jump target address has the same upper 4 bits as PC[31:28], so the jump is not out of the
range for J-type. The 26-bit immediate in the J-type instruction is concatenated with PC[31:28]
in the most significant end, and with 00 in the least significant end, to form the 32 bit jump target
address.
jal Call_point
0000 11 11 1111 1100 0001 0011 1100 1011

The equivalent hexadecimal is 0x0FFC13CB

Question 3 (Problem Set 2 Spring 2013)

Write the equivalent MIPS assembly code. The values in the table are in base 10.

1000 10 4 8 1
1004 0 0 8 13 2 0
1008 35 29 4 4
1012 8 18 29 4
1016 0 31 0 8

14
slti $t0, $a0, 1
sll $t5, $t0, 2
lw $a0, 4($sp)
addi $sp, $s2, 4
jr $ra

Question #2 (Classwork 4 Spring 2013)

Practice translating branches and jumps into machine language

Write the machine language for the 7 MIPS statements

L1: add $t1, $s0, $a1
lbu $t2, 0($t1)
add $t3, $s0, $a3
sb $t2, 0($t3)
beq $t2, $0, L2
addi $s0, $s0, 1
j L1
L2: ...

Use the format given below, and assume that L1=1000

1000 0 16 5 9 0 32
1004 36 9 10 [… 0 …]
1008 0 16 4 11 0 32
1012 40 11 10 [… 0 …]
1016 4 10 0 [… 2 …]
1020 8 16 16 [… 1 …]
1024 2 [… … 250 … …]

Question #2 (Classwork 3 Spring 2013)

a. Practice doing conversion from assembly into machine language (with fields)

Convert the following lines of MIPS assembly code into machine language, filling in the
decimal values of each field. (Hint: if the Green Card doesn’t give enough info, see
Appendix B in the back of the book)

addi $v0, $sp, -28 I 8 29 2 [ ------- -28 --------]

sw $gp, 36 ($fp) I 43 30 28 [-------- 36 --------]
subu $a1, $t8, $s4 R 0 24 20 5 0 35
jalr $k0, $t3 R 0 26 0 11 0 9
15
 jalr $s6 R 0 22 0 31 0 9
lui $v1, -2 I 15 0 3 [ ------- -2 ------]

b. Practice doing conversion from machine language (in hex) into assembly language

What is the MIPS assembly language instruction that corresponds to:

0x0017C902 => 000000 00000 10111 11001 00100 000010
R-type 0 23=$s7 25=$t9 4 srl
srl $t9, $s7, 4

c. Practice doing conversion from assembly language into 32-bit binary machine language, then
abbreviating it in hex.

What is the 8-digit hexadecimal value of the machine instruction for each of the
following?
addi $v0, $sp, -28 => 001000 11101 00010 1111111111100100
=> 0x23A2FFE4
sw $gp, 36 ($fp) => 101011 11110 11100 0000000000100100
=> 0xAFDC0024

Question #2 (Classwork 2 Spring 2013)

c. Convert the following lines of MIPS assembly code into machine code, using the format
shown on the lecture slide (the I-format of page 97), filling in the values of each field in binary:

lw $t9, 8($a3)
100011 00111 11001 00000 ....... ....1000

sw $v1, -4($s5)
101011 10101 00011 11111….. ….1100

Question 1 (Older)

a) Assemble the following MIPS code sequence into the equivalent machine code. Write your
answer in the box, next to each instruction. Give your answer in Hexadecimal.

beq $s3, $t5, Skip 0x 126D 0001

srlv $fp, $a3, $v0 0x 0047 F006
Skip: lb $t9, -9 ($sp) 0x 83B9 FFF7

b) Disassemble the following two machine code instructions (in hexadecimal) to their equivalent
MIPS assembly language instructions. Write your answer in the box, next to each instruction.
16
 0xAA82F134 swl $v0, -3788($s4)
0x03A0C809 jalr $sp, $t9

Question 2 (Older)

1. How is the jump target address calculated for j and jal instructions?

The 26 bit address field in the J-format instruction is extended to 28 bits by multiplying by 4.
Then the most significant 4 bits from PC (bits 31-28) are concatenated at the left to form the 32-bit
pseudo-direct address, of the jump target.

2. Assemble this line of MIPS code into its equivalent machine code. Don't write 32 ones and zeros;
instead, show the instruction format and in each field, give the correct value (in base 10
numbers): sw $sp, 8($s5)

opcode rs rt immediate
43 21 29 8

Question 3 (Older)

Assemble the following MIPS instructions into the equivalent machine code (in hex format).
Write your answer to the right side of each instruction.

Top: sll $0, $0, 0 0x 0 0 0 0 0 0 0 0 # sll $0, $0, 0

bgt $t4, $s4, Top 0x 0 2 8 C 0 8 2 A # slt $at,$s4, $t4
0x 1 4 2 0 F F F D # bne $at, $0, -3
(or possibly)
0x 0 0 0 0 0 0 0 0 # sll $0, $0, 0
0x 0 1 9 4 0 8 2 2 # sub $at,$s4, $t4
0x 1 C 2 0 F F F D # bgtz $at, -3

Since bgt is a pseudoinstruction, it must be assembled into real MIPS instructions which do the
same thing. In this case, it takes 2 real MIPS instructions.

Question 4 (Older)

Convert the following MIPS machine language instruction to the equivalent MIPS assembly
language instruction: 00100011000111011111111111111110 (or 0x231DFFFE)

opcode = 001000 =8 rs = 11000 = 24 rt = 11101 = 29

17
 immediate = 1111111111111110 = -2

So the instruction is addi $sp, $t8, -2

Question 5 (Older)

a) Give the binary codes for the following MIPS items (be sure give the correct number of
bits, not more or less):

--opcode sc 111000
--register $a2 00110
--function code div 011010
--ASCII code for “@” 1000000

b) Give the binary codes for the following MIPS items (be sure give the correct number of
bits, not more or less)
--opcode sb 101000
--register $s4 10100
--function code jalr 001001
--ASCII code for “z” 1111010

c) Give the binary codes for the following MIPS items (be sure give the correct number of
bits, not more or less)
--opcode bne 000101
--register $t8 11000
--function code sub 100010
--ASCII code for “T” 1010100

All codes are found on the Green Card

Question 6 (Older)

Assemble the following MIPS code sequence into the equivalent machine code (in hex format).
Write your answer to the right side of each instruction.

beq $t3, $s5, Skip 0x11750001

srlv $gp, $a2, $v1 0x0066E006
Skip: lb $t9, -9 ($ra) 0x83F9FFF7

b) Disassemble the following two machine code instructions (in hexadecimal) to their equivalent
MIPS assembly language instructions. Write your answer to the right side of each instruction.

0xAA82F134 swl $v0, -3788($s4)

jalr $sp, $t1 (ignore rt field)
0x03AF4809

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Question 7 (Older)

Assemble the following MIPS code into the machine language. Give the machine code in binary
form, along with the hexadecimal equivalent.

bne $t0, $a1, skip_inc

addi $v0, $v0, 1
skip_inc: lw $a0, 0 ($a0)

bne $8 $5 PC + 4 + (1 x 4)
000101 01000 00101 0000000000000001
HEX: 0x15050001 (immediate is 1, since PC  PC + 4 + [Signext (imm16)] x 4 )

addi $2 $2 1
001000 00010 00010 0000000000000001
HEX: 0x20420001

lw $4 $4 0
100011 00100 00100 0000000000000000
HEX: 0x8C840000

Question 8 (Older)

What do the following bit patterns represent, if interpreted as a MIPS machine instruction?

a) 1010 1010 1010 1010 1010 1010 1010 1010 :

Opcode = 101010 = 42 this code is for swl (store word left) an I-type instruction
rs field = 10101 = 21, the code for $s5
rt field = 01010 = 10, the code for $t2
immed field = 1010101010101010, which is -21846
the MIPS instruction is: swl $t2, -21846 ($s5)

b) 0011 1100 0000 0001 0000 0000 0000 0001 : lui $at, 1

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