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SN54/74LS109A

DUAL JK POSITIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS109A consists of two high speed completely independent
transition clocked JK flip-flops. The clocking operation is independent of rise
and fall times of the clock waveform. The JK design allows operation as a D DUAL JK POSITIVE
flip-flop by simply connecting the J and K pins together. EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
LOGIC DIAGRAM

SET (SD)
5(11)
Q
CLEAR (CD) 6(10) J SUFFIX
1(15) CERAMIC
CLOCK CASE 620-09
4(12) 16
1
Q
7(9)
J
2(14)

K N SUFFIX
3(13) PLASTIC
16 CASE 648-08
1

D SUFFIX
SOIC
16
1 CASE 751B-03
MODE SELECT — TRUTH TABLE
INPUTS OUTPUTS
OPERATING MODE ORDERING INFORMATION
SD CD J K Q Q
SN54LSXXXJ Ceramic
Set L H X X H L
SN74LSXXXN Plastic
Reset (Clear) H L X X L H
SN74LSXXXD SOIC
*Undetermined L L X X H H
Load “1” (Set) H H h h H L
Hold H H l h q q
Toggle H H h l q q
Load “0” (Reset) H H l l L H LOGIC SYMBOL
* Both outputs will be HIGH while both SD and CD are LOW, but the output states
are unpredictable if SD and CD go HIGH simultaneously. 5 11
H, h = HIGH Voltage Level
L, I = LOW Voltage Level J SD Q 6 14 J SD
2 Q 10
X = Don’t Care
l, h (q) = Lower case letters indicate the state of the referenced input (or output) CP 12 CP
4
l, h (q) = one set-up time prior to the LOW to HIGH clock transition.
7 13
3 K C Q K C Q 9
D D

1 15

VCC = PIN 16
GND = PIN 8

FAST AND LS TTL DATA


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SN54/74LS109A

GUARANTEED OPERATING RANGES


Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 54 4.5 5.0 5.5 V
74 4.75 5.0 5.25
TA Operating Ambient Temperature Range 54 – 55 25 125 °C
74 0 25 70
IOH Output Current — High 54, 74 – 0.4 mA
IOL Output Current — Low 54 4.0 mA
74 8.0

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)


Limits
S b l
Symbol P
Parameter Min Typ Max U i
Unit T
Test C di i
Conditions
Guaranteed Input HIGH Voltage for
VIH Input HIGH Voltage 2.0 V
All Inputs
54 0.7 Guaranteed Input
p LOW Voltage
g for
VIL Input LOW Voltage V
74 0.8 All Inputs

VIK Input Clamp Diode Voltage – 0.65 – 1.5 V VCC = MIN, IIN = – 18 mA
54 25
2.5 35
3.5 V VCC = MIN
MIN,, IOH = MAX,
MAX, VIN = VIH
VOH O
Output HIGH Voltage
V l
74 2.7 3.5 V or VIL per Truth Table

54, 74 0.25 0.4 V IOL = 4.0 mA VCC = VCC MIN,


VOL Output LOW Voltage VIN = VIL or VIH
74 0.35 0.5 V IOL = 8.0 mA per Truth Table

Input HIGH Current


J, K, Clock 20 µA VCC = MAX, VIN = 2.7 V
IIH Set, Clear 40
J, K, Clock 0.1
mA VCC = MAX, VIN = 7.0 V
Set, Clear 0.2
Input LOW Current
IIL J, K, Clock – 0.4 mA VCC = MAX, VIN = 0.4 V
Set, Clear – 0.8
IOS Output Short Circuit Current (Note 1) – 20 – 100 mA VCC = MAX
ICC Power Supply Current 8.0 mA VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)


Limits
S b l
Symbol P
Parameter Min Typ Max U i
Unit T
Test C
Conditions
di i
fMAX Maximum Clock Frequency 25 33 MHz
VCC = 5.0
50V
tPLH 13 25 ns
Clock Clear
Clock, Clear, Set to Output CL = 15 pF
tPHL 25 40 ns

AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)


Limits
S b l
Symbol P
Parameter Min Typ Max U i
Unit T
Test C
Conditions
di i
tW Clock High Clear, Set Pulse Width 25 ns
Data Setup
p Time — HIGH 20 ns
ts VCC = 5
5.0
0V
Data Setup Time — LOW 20 ns
th Hold time 5.0 ns

FAST AND LS TTL DATA


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