an SOUP H CMB Ete eA CLE anT eee een eet et2 = 9 Sweta Kumari @ ‘7 ebestorn GATE (3nd) Vatiied Educate | Software Engineer Selected in 217 WNO{Jove) Research Paper (NODES) urs Water 2 Teaching Ex. 21.9k 218 147 Plus courses Expected Questions GATE 2019 pony oye 12 4300 Lists (4) ' FOLLOW NEY htt © unacademy Unacademy Plus Learn online fig from india's best educators. #1 TOP EDUCATOR — GATE CS/IT 148 COURSES = 1480 Lessons 20 OS EN /unacademy.com/user/hellosonu01'Y unacademy Acertain computer system has the segmented paging architecture for virtual memory. The memory is byte addressable. Both virtual and physical address spaces contain 2'® bytes each. The virtual address space is divided into 8 non- overlapping equal size segments. The memory management unit (MMU) has a hardware segment table, each entry of which contains the physical address of the page table for the segment. Page tables are stored in the main memory and consists of 2 byte page table entries.. Assume that each page table entry contains (besides other information) 1 valid bit, 3 bits for page protection and 1 dirty bit. How many bits are available in page table entry for storing the aging information for the page? Assume that page size is 512 bytes.Given- Virtual Address Space = Process size = 2'§ bytes Physical Address Space = Main Memory size = 2° bytes Process is divided into 8 equal size segments Page table entry size = 2 bytes = 16 bits Page table entry besides other information contains 1 valid bit, 3 protection bits, 1 dirty bit Page size = 512 bytes 'Y unacademy Number of frames in main memory = Size of main memory / Page size = 2!6 bytes / 512 bytes 26 bytes / 2° bytes 27 frames Thus, Number of bits required for frame identification in page table entry = 7 bits Number of bits available for storing aging informatio Number of bits in page table entry — ( Number of bits required for frame identification + 1 valid bit + 3 protection bits + 1 dirty bit) = 16 bits—(7+1+3-+ 1) bits 16 bits - 12 bits 4 bitsWhich of the following logical address will produce trap addressing error? A. 0,430 4,11 2, 100 . 3, 425. 4,95 oe Also, calculate the physical address if no trap is produced. 'Y unacademy aaa Base Length 0 1219 700 1 2300 14 2 90 100 3 1327 580 4 1952 96In segmentation scheme, the generated logical address consists of two parts- Segment Number Segment Offset We know- Segment Offset must always lie in the range [0, limit-1]. If segment offset becomes greater than or equal to limit of the segment, then trap addressing error is produced. 'Y unacademy Option-A: 0, 430- Here, Segment Number = 0 Segment Offset = 430 We have, In the segment table, limit of segment-0 is 700. Thus, segment offset must always lie in the range = [0, 700-1] = [0, 699] Now, Since generated segment offset lies in the above range, so request generated is valid. Therefore, no trap will be produced. Physical Address = 1219 + 430 = 1649Option-B: 1, 11- Here, Segment Number = 1 Segment Offset = 11 We have, In the segment table, limit of segment-1 is 14, Thus, segment offset must always lie in the range = [0, 14-1] = (0, 13] Now, Since generated segment offset lies in the above range, so request generated is valid. Therefore, no trap will be produced. Physical Address = 2300 + 11 = 2311 'Y unacademy Op’ 2, 100- Here, Segment Number = 2 Segment Offset = 100 We have, In the segment table, limit of segment-2 is 100. Thus, segment offset must always lie in the range = [0, 100-1] = [0, 99] Now, Since generated segment offset does not lie in the above range, so request generated is invalid. Therefore, trap will be produced.Option-D: 3, 42! Here, Segment Number = 3 Segment Offset = 425 We have, In the segment table, limit of segment-3 is 580. Thus, segment offset must always lie in the range = (0, 580-1] = [0, 579] Now, Since generated segment offset lies in the above range, so request generated is valid. Therefore, no trap will be produced. Physical Address = 1327 + 425 = 1752 'Y unacademy Option-E: 4, 95- Here, Segment Number = 4 Segment Offset = 95 We have, In the segment table, limit of segment-4 is 96. Thus, segment offset must always lie in the range = [0, 96-1} = (0, 95} Now, Since generated segment offset lies in the above range, so request generated is valid. Therefore, no trap will be produced. Physical Address = 1952 + 95 = 2047 Thus, Option-(C) is correct.'Y unacademy Acertain computer system has the segmented paging architecture for virtual memory. The memory is byte addressable. Both virtual and physical address spaces contain 2'® bytes each. The virtual address space is divided into 8 non- overlapping equal size segments. The memory management unit (MMU) has a hardware segment table, each entry of which contains the physical address of the page table for the segment. Page tables are stored in the main memory and consists of 2 byte page table entries.. Assume that each page table entry contains (besides other information) 1 valid bit, 3 bits for page protection and 1 dirty bit. How many bits are available in page table entry for storing the aging information for the page? Assume that page size is 512 bytes.Given- Virtual Address Space = Process size = 2'§ bytes Physical Address Space = Main Memory size = 2° bytes Process is divided into 8 equal size segments Page table entry size = 2 bytes = 16 bits Page table entry besides other information contains 1 valid bit, 3 protection bits, 1 dirty bit Page size = 512 bytes 'Y unacademy Number of frames in main memory = Size of main memory / Page size = 2!6 bytes / 512 bytes 26 bytes / 2° bytes 27 frames Thus, Number of bits required for frame identification in page table entry = 7 bits Number of bits available for storing aging informatio Number of bits in page table entry — ( Number of bits required for frame identification + 1 valid bit + 3 protection bits + 1 dirty bit) = 16 bits—(7+1+3-+ 1) bits 16 bits - 12 bits 4 bits