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1 1 Ù MIPS Ú RISC NX( 1

1.1 6Y . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1.1 o¦6YÇ$e º . . . . . . . . . . . . . . . . 3
1.1.2 6YÚp . . . . . . . . . . . . . . . . . . . . . . 4
1.2 MIPS Ê?6Y . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 RISC Ú CISC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.4 LÚy3 MIPS ¡ . . . . . . . . . . . . . . . . 7
1.4.1 R2000 R3000 ?nì . . . . . . . . . . . . . . . . . . . 7
1.4.2 R6000 ?nìµÝ= . . . . . . . . . . . . . . . . . . . 8
1.4.3 1 CPU Ø . . . . . . . . . . . . . . . . . . . . . . . . 9
1.4.4 QED: i\ªXÚp¯ MIPS ?nì . . . . . . . . . . 11
1.4.5 R10000 ?nì9Ù Uö . . . . . . . . . . . . . . . . . . 12
1.4.6 ¤a>f¬+ MIPS ?nì . . . . . . . . . . . . 13
1.4.7 ä´dìÚ-1<Å+ MIPS . . . . . . . . . . . 13
1.4.8 8 MIPS ?nì . . . . . . . . . . . . . . . . . . 15
1.4.9 8U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.5 MIPS Ú CISC NX(' . . . . . . . . . . . . . . . . . . . . 20
1.5.1 MIPS -8 . . . . . . . . . . . . . . . . . . . . . 20
1.5.2 ÏÚ . . . . . . . . . . . . . . . . . . . . . . . . . . 21
1.5.3 MIPS vkA5 . . . . . . . . . . . . . . . . . . . . . . . 22
1.5.4 §S 6YJ . . . . . . . . . . . . . . . . . . 23
1 2 Ù MIPS NX( 25
2.1 MIPS ®?óºÐ& . . . . . . . . . . . . . . . . . . . . . 28
iii
8¹ 8¹
2.2Mì . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.2.1 Ï^MìS.·¶Ú^{ . . . . . . . . . . . . . . . . 30
2.3 ê¦{Ü9Mì . . . . . . . . . . . . . . . . . . . . . . . . 32
2.4 \1;µÏª . . . . . . . . . . . . . . . . . . . . . . . . 33
2.5 ;ìMìêâa. . . . . . . . . . . . . . . . . . . . . . 34
2.5.1 êêâa. . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.5.2 éà\1Ú; . . . . . . . . . . . . . . . . . . . . . 35
2.5.3 S¥2:êâ . . . . . . . . . . . . . . . . . . . . . . 35
2.6 ®?óÜ¤- . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.7 MIPS I MIPS64 ISA: 64 (ÚÙ§)*Ð . . . . . . . . . . . 37
2.7.1 uÐ 64 . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.7.2 XI 64 º . . . . . . . . . . . . . . . . . . . . . . . . 39
2.7.3 'u 64 CPU ªµMì¥êâ . . . . . . . 39
2.8 Ä/m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2.8.1 {üXÚÏ . . . . . . . . . . . . . . . . . . . . . . . 42
2.8.2 Ø%^rA? . . . . . . . . . . . . . . . . . . . . . . 43
2.8.3 ãµ64 /N . . . . . . . . . . . . . . . . 43
2.9 6Y5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
1 3 Ù ?nì 0µMIPS ?nì 46

3.1 CPU - . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.2 oÿ^= Mìº . . . . . . . . . . . . . . . . . . . . 51
3.3 CPU Mì9Ù?è . . . . . . . . . . . . . . . . . . . . . . 52
3.3.1 GMì£SR¤ . . . . . . . . . . . . . . . . . . . . . . 52
3.3.2 ÏMì(Cause) . . . . . . . . . . . . . . . . . . . . . . 56
3.3.3 É~£/(EPC)Mì . . . . . . . . . . . . . . . . . 57
3.3.4 ÃJ[/(BadVaddr)Mì . . . . . . . . . . . . . . 57
3.3.5 Count/Compare MìµCPU ¡þ½ì . . . . . . . . . 57
3.3.6 ?nì ID(PRId) Mì . . . . . . . . . . . . . . . . . . . 59
3.3.7 Config MìµCPU ] &EÚ . . . . . . . . . . . . 60
3.3.8 EBase Ú IntCtlµ¥äÚÉ~ . . . . . . . . . . . . . . 63
3.3.9 SRSCtl Ú SRSMapµKfMì . . . . . . . . . . 64
3.3.10 ë£\1/£LLAddr¤Mì . . . . . . . . . . . . . . 65
3.4 CP0 x——Já\² . . . . . . . . . . . . . . . . . . . . . 66
3.4.1 xo- . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.4.2 -xÚ^rx . . . . . . . . . . . . . . . . . . . . . 67
3.4.3 3 CP0 -mo . . . . . . . . . . . . . . . . . . . 67
iv
8¹ 8¹
14Ù MIPS p óÅ 69
4.1 p 9Ù+n . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.2 p Ńó . . . . . . . . . . . . . . . . . . . . . . . . 70
4.3 @Ï MIPS CPU ßp . . . . . . . . . . . . . . . . . . 72
4.4 MIPS CPU £p . . . . . . . . . . . . . . . . . . . . . 73
4.5 p O Ù§Ä . . . . . . . . . . . . . . . . . . . . 73
4.6 +np . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
4.7 ?£L2¤Ún?£L3¤p . . . . . . . . . . . . . . . . . . 77
4.8 MIPS CPU p . . . . . . . . . . . . . . . . . . . . . 77
4.9 é MIPS32/64 p ?§ . . . . . . . . . . . . . . . . . . . 78
4.9.1 cache - . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.9.2 p Ð©zÚ Tag/Data Mì . . . . . . . . . . . . 80
4.9.3 CacheERR!ERR Ú ErrorEPC Mìµ;ì/p
Ñ?n . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.9.4 (½p Ú . . . . . . . . . . . . . . . . . 83
4.9.5 Ð©z§S . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.9.6 ¢½ö£p ¥;« . . . . . . . . . . . . . 85
4.10 p Ç . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.11 #|^±Kp Ç . . . . . . . . . . . . . . . . 88
4.12 p K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
1 5 Ù É~!¥ä9Ð©z 92
5.1 °(É~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
5.1.1 °(É~——{¤þ MIPS CPU ¥¦{ì . . . . . 94
5.2 É~u)Å . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
5.3 É~þµÉ~?nm©/ . . . . . . . . . . . . . . . . . . . 95
5.4 É~?nµÄL§ . . . . . . . . . . . . . . . . . . . . . . . . . 99
5.5 lÉ~£ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
5.6 i@É~ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
5.7 É~?n~§ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
5.8 ¥ä . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
5.8.1 MIPS CPU ¥ä] . . . . . . . . . . . . . . . . . . . 101
5.8.2 3^¥¢y¥ä`k? . . . . . . . . . . . . . . . . . . 103
5.8.3 f5±9é SR f?U . . . . . . . . . . . . . . . . 104
5.8.4 #N¥ä.«µMIPS ª&Òþ . . . . . . . . . . . 106
5.8.5 MIPS32/64 CPU ¥þzÚ EIC ¥ä . . . . . . . . . 107
5.8.6 KfMì . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.9 éÄ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.9.1 uÿÚ£O\ CPU . . . . . . . . . . . . . . . . . . . . 110
v
8¹ 8¹
5.9.2ÚÚ½ . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
5.9.3 éÄA^§S . . . . . . . . . . . . . . . . . . . . . . . . . 111
5.10 -ý . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
1 6 Ù . S+n TLB 114

6.1 TLB/MMU M9Ù^ . . . . . . . . . . . . . . . . . . . . . . 114
6.2 TLB/MMU Mì . . . . . . . . . . . . . . . . . . . . . . . . . . 115
6.2.1 TLB ' i——EntryHi Ú PageMask . . . . . . . . . . 115
6.2.2 TLB ÑÑ——EntryLo0–1 . . . . . . . . . . . . . . . . 118
6.2.3 ÀJ TLB L——Index!Random Ú Wired Mì 120
6.2.4 L9ÏMì—— Context Ú XContext . . . . . . 120
6.3 TLB/MMU - . . . . . . . . . . . . . . . . . . . . . . . 122
6.4 TLB ?§ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
6.4.1 WŃu)º . . . . . . . . . . . . . . . . . . . . . 123
6.4.2 ¦^ ASID . . . . . . . . . . . . . . . . . . . . . . . . . . 124
6.4.3 Random MìÚ Wired Mì . . . . . . . . . . . . . . 124
6.5 éMlÐLÚWÅ . . . . . . . . . . . . . . . . . . . . 125
6.5.1 TLB ·¥?n . . . . . . . . . . . . . . . . . . . . . . . 126
6.5.2 XTLB ·¥?n§S . . . . . . . . . . . . . . . . . . . . 127
6.6 MIPS TLB F~¦^ . . . . . . . . . . . . . . . . . . . . . . . . 128
6.7 {üöXÚ¥S+n . . . . . . . . . . . . . . . . . . . 129
1 7 Ù 2:|± 131
7.1 k'2:êÄVg . . . . . . . . . . . . . . . . . . . . . . . . 131
7.2 IEEE 754 IO9Ù{¤µ . . . . . . . . . . . . . . . . . . . . . 132
7.3 IEEE 2:ê;ª . . . . . . . . . . . . . . . . . . . . . . . 133
7.3.1 IEEE êÚ5z . . . . . . . . . . . . . . . . . . . . . 134
7.3.2 AÏ¦^ 3ê . . . . . . . . . . . . . . . . 135
7.3.3 MIPS FP êâª . . . . . . . . . . . . . . . . . . . . . . 135
7.4 MIPS é IEEE 754 ¢y . . . . . . . . . . . . . . . . . . . . . . 136
7.4.1 ¤k MIPS CPU ÑI2:g?n§SÚý§S . . 138
7.5 2:Mì . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
7.5.1 2:MìDÚS.·¶Ú^{ . . . . . . . . . . . . . 139
7.6 2:É~/¥ä . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
7.7 2:µ/GMì . . . . . . . . . . . . . . . . . . . . . 140
7.8 2:¢yMì . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
7.9 2:-H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
7.9.1 Load/Store . . . . . . . . . . . . . . . . . . . . . . . . . . 145
7.9.2 MìmDx . . . . . . . . . . . . . . . . . . . . . . . . . 146
vi
8¹ 8¹
7.9.3 nöêâ$ . . . . . . . . . . . . . . . . . . . . . . 147
7.9.4 ¦\ö . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
7.9.5 ü8£CÒ¤ö . . . . . . . . . . . . . . . . . . . . . . . 148
7.9.6 êâ=ö . . . . . . . . . . . . . . . . . . . . . . . . . 148
7.9.7 ^©|ÚÿÁ- . . . . . . . . . . . . . . . . . . . . . 149
7.10 ü°Ýé2:-±9 MIPS-3D ASE . . . . . . . . . . . . . . . 150
7.10.1 É~Úü°Ýé2:- . . . . . . . . . . . . . . . . . . 151
7.10.2 ü°Ýénöêâ$!¦\!CÒÚÃ^êâD
xö . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
7.10.3 ü°Ýéa.=ö . . . . . . . . . . . . . . . . . . 152
7.10.4 ü°ÝéÿÁÚ^Dx- . . . . . . . . . . . . . . 152
7.10.5 MIPS-3D - . . . . . . . . . . . . . . . . . . . . . . . . 153
7.11 -S¦ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
7.12 -SÚÝ . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
7.13 =IÐ©zÚ¦U . . . . . . . . . . . . . . . . . . . . . . . . . . 156
7.14 2:ý . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
1 8 Ù MIPS -8ë 159

8.1 {ü~f . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
8.2 ®?-9Ù¿Â . . . . . . . . . . . . . . . . . . . . . . . . . . 160
8.2.1 U ÚØ U (Non-U) ÏPÎ . . . . . . . . . . . . . . 162
8.2.2 Ø{ÏPÎ . . . . . . . . . . . . . . . . . . . . . . . . . . 162
8.2.3 -üL . . . . . . . . . . . . . . . . . . . . . . . . . 163
8.3 2:- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
8.4 MIPS32/64 1 O . . . . . . . . . . . . . . . . . . . . . 191
8.4.1 1O\ÊÏ- . . . . . . . . . . . . . . . . . . . . 191
8.4.2 1O\A- . . . . . . . . . . . . . . . . . . . . 193
8.5 AÏ-9Ù^å . . . . . . . . . . . . . . . . . . . . . . . . . . 194
8.5.1 \1/m\1µéà\1Ú; . . . . . . . . . 194
8.5.2 ë£\1/^; . . . . . . . . . . . . . . . . . . . . . . 197
8.5.3 ^Dx- . . . . . . . . . . . . . . . . . . . . . . . . . 199
8.5.4 U©| . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
8.5.5 ê¦\Ú\\- . . . . . . . . . . . . . . . . . . . . . 200
8.5.6 2:¦\- . . . . . . . . . . . . . . . . . . . . . . . . . 201
8.5.7 õ2:^ . . . . . . . . . . . . . . . . . . . . . . . 201
8.5.8 ý . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
8.5.9 Syncµû load/store ;ìo . . . . . . . . . . . . 202
8.5.10 xo- . . . . . . . . . . . . . . . . . . . . . . . . . 204
8.5.11 synci: U-§Sp +n . . . . . . . . . 205
vii
8¹ 8¹
8.5.12ÖMMì . . . . . . . . . . . . . . . . . . . . . . . 205
8.6 -?è . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
8.6.1 -?èL¥ . . . . . . . . . . . . . . . . . . . . 206
8.6.2 -?èLA:5º . . . . . . . . . . . . . . . . . . . . 221
8.6.3 ?èÚ{ü¢y . . . . . . . . . . . . . . . . . . . . . . . 221
8.7 -UõU©a . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
8.7.1 ö . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
8.7.2 Mì/MìDx . . . . . . . . . . . . . . . . . . . . . . 222
8.7.3 ~ê\1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
8.7.4 â/Ü6$ . . . . . . . . . . . . . . . . . . . . . . . . 223
8.7.5 ê¦{!Ø{Ú¦{ê . . . . . . . . . . . . . . . . . . . 224
8.7.6 ê¦£\¤\ . . . . . . . . . . . . . . . . . . . . . . . . 225
8.7.7 \1Ú; . . . . . . . . . . . . . . . . . . . . . . . . . . 226
8.7.8 a=!f§SN^Ú©| . . . . . . . . . . . . . . . . . . . 227
8.7.9 ä:Úg . . . . . . . . . . . . . . . . . . . . . . . . . . 228
8.7.10 CP0 õUµCPU - . . . . . . . . . . . . . . . . . . 229
8.7.11 2:- . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
8.7.12 ^reé“/e”A5k¯ . . . . . . . . . . . . . 229
1 9 Ù Ö MIPS ®?óè 231

9.1 {ü~f . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
9.2 {V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
9.2.1 ÙÛ!½.ÎÚI£Î . . . . . . . . . . . . . . . . . . . . 236
9.3 -5K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
9.3.1 O-µn!!Mì . . . . . . . . . . . . . . . 237
9.3.2 á=ê$- . . . . . . . . . . . . . . . . . . . . . 237
9.3.3 'u 32/64 - . . . . . . . . . . . . . . . . . . . . . . 238
9.4 Ïª . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
9.4.1 éu GP Ï . . . . . . . . . . . . . . . . . . . . . . 240
9.5 8I©9Ù3;ìN¥ÙÛ . . . . . . . . . . . . . . . . 241
9.5.1 )æÚÒ3S¢S§SÙÛ . . . . . . . . . . . . . 243
1 10 Ù MIPS NX(£^ 245

10.1 MIPS A^§S. ^µ~¯KAL . . . . . . . . . . . 245
10.2 àµi!i!Ú S . . . . . . . . . . . . . . . . . . . . . . . . 246
10.2.1 'A!i!!iÚê . . . . . . . . . . . . . . . . . . . . 247
10.2.2 ^Úà¯K . . . . . . . . . . . . . . . . . . . . . . . 249
10.2.3 MÚà . . . . . . . . . . . . . . . . . . . . . . . . . . 251
10.2.4 MIPS CPU Và^ . . . . . . . . . . . . . . . . . . 256
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10.2.5£5ÚàÃ'è . . . . . . . . . . . . . . . . . 258
10.2.6 àÚ 5êâ . . . . . . . . . . . . . . . . . . . . . . . 259
10.3 p 55¯K . . . . . . . . . . . . . . . . . . . . . 259
10.3.1 p +nÚ DMA êâ . . . . . . . . . . . . . . . . . 261
10.3.2 p +nÚS\-µg?Uè . . . . . . . 262
10.3.3 p +nÚp ½ßêâ . . . . . . . . . 263
10.3.4 p KÚ¡XÚ . . . . . . . . . . . . . . . . . . 263
10.4 ¯SgSSü9N . . . . . . . . . . . . . . . . . . . . . 264
10.4.1 gSÚ Àì . . . . . . . . . . . . . . . . . . . . . 265
10.4.2 ¢y wbflush . . . . . . . . . . . . . . . . . . . . . . . . . 266
10.5 ^ C ómu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
10.5.1 ^ GNU C ?ÈìK®?è . . . . . . . . . . . . . . . 267
10.5.2 ;ìN I/O MìÚ“volatile” . . . . . . . . . . . . 268
10.5.3 ^ C ómu MIPS A^Ù§,Ô,l¯K . . . . 270
1 11 Ù MIPS ÎO (ABI) 272

11.1 êâL«Úéà . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
11.1.1 Äêâa.°Ý . . . . . . . . . . . . . . . . . . . . . 273
11.1.2 “long”Úa.°Ý . . . . . . . . . . . . . . . . . . . 274
11.1.3 éà¦ . . . . . . . . . . . . . . . . . . . . . . . . . . . 274
11.1.4 Äa.3S¥ÙÛÚ9ÙàCz . . . . . . . 274
11.1.5 (NÚê|a.SÙÛÚéà . . . . . . . . . . . . 274
11.1.6 (N¥ . . . . . . . . . . . . . . . . . . . . . . . 276
11.1.7 C ¥éàêâ . . . . . . . . . . . . . . . . . . . . . . 278
11.2 MIPS ABI ëêD4ÚæÒ½ . . . . . . . . . . . . . . . . . 279
11.2.1 æÒ!f§SóÚëêD4 . . . . . . . . . . . . . . . . 279
11.2.2 o32 ¥æÒëê( . . . . . . . . . . . . . . . . . . . . 280
11.2.3 ^MìD4ëê . . . . . . . . . . . . . . . . . . . . . . 280
11.2.4 C ó¥¼ê¥~f . . . . . . . . . . . . . . . . . . . . 281
11.2.5 ~~fµD4(N . . . . . . . . . . . . . . . . 282
11.2.6 D4Ø½êþëê . . . . . . . . . . . . . . . . . . . . . 283
11.2.7 l¼ê£ . . . . . . . . . . . . . . . . . . . . . . 284
11.2.8 Mì^{IOüzµSGI n32 Ú n64 . . . . . . . . 285
11.2.9 ÒÙÛ!Òv±9éNÁì|± . . . . . . . . . . . . 287
11.2.10 êØ½ëêÚ stdargs . . . . . . . . . . . . . . . . 294
1 12 Ù MIPS NÁ——NÁÚ¿Û 296

12.1 “EJTAG”¡þNÁü . . . . . . . . . . . . . . . . . . . . . . . 298
12.1.1 EJTAG {¤ . . . . . . . . . . . . . . . . . . . . . . . . 299
ix
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N CPU . . . . . . . . . . . . . . . . . . . . . . . . 300
12.1.2
12.1.3 ÏL EJTAG NÁÏ& . . . . . . . . . . . . . . . . . . . 300
12.1.4 NÁª . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
12.1.5 üÚ$1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 302
12.1.6 dmseg ;ìÈè« . . . . . . . . . . . . . . . . . . . . 302
12.1.7 EJTAG CP0 Mì§cÙ´ Debug . . . . . . . . . . . 304
12.1.8 DCR £NÁ¤;ìNMì . . . . . . . . . . . . 306
12.1.9 EJTAG ä:M . . . . . . . . . . . . . . . . . . . . . 307
12.1.10 n)ä:^ . . . . . . . . . . . . . . . . . . . . . . . . 309
12.1.11 °(NÁä: . . . . . . . . . . . . . . . . . . . . . . 310
12.1.12 EJTAG PC . . . . . . . . . . . . . . . . . . . . . 310
12.1.13 Ã&ì¦^ EJTAG . . . . . . . . . . . . . . . . . . . 311
12.2 “EJTAG”cNÁ|±——ä:-Ú CP0 * : . . . . . . 312
12.3 PDtrace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313
12.45UOêì . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
1 13 Ù UþKe~~——GNU/Linux 316
13.1 ÄVg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
13.2 SØ© ( . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
13.2.1 É~ª¥ MIPS CPU . . . . . . . . . . . . . . . . . . 320
13.2.2 '4Ü©½Ü¥ä MIPS CPU . . . . . . . . . . . . . 321
13.2.3 ¥ä¸ . . . . . . . . . . . . . . . . . . . . . . . . . . . 322
13.2.4 3§¸¥1SØ . . . . . . . . . . . . . . . . . . . . 322
1 14 Ù ^MNÓó 323
14.1 ¥ä?nL§Úm . . . . . . . . . . . . . . . . . . . . . . . . 323
14.1.1 p5U¥ä?nÚ Linux . . . . . . . . . . . . . . . . . . . 325
14.2 §!.«Úf5 . . . . . . . . . . . . . . . . . . . . . . . . 326
14.2.1 MIPS NX(Úfö . . . . . . . . . . . . . . . . . 327
14.2.2 Linux £^£ . . . . . . . . . . . . . . . . . . . . . . . . . 328
14.3 XÚNû)o . . . . . . . . . . . . . . . . . . . . . . . . . 329
14.4 MIPS/Linux XÚ/= . . . . . . . . . . . . . . . . . . . . 330
14.4.1 o;ì/= . . . . . . . . . . . . . . . . . 332
14.4.2 Ä?§ÙÛÚo . . . . . . . . . . . . . . . . . . . . 334
14.4.3 ?§/ý¢;ìN . . . . . . . . . . . . . . . . 335
14.4.4 ©N . . . . . . . . . . . . . . . . . . . . . . . . . . . 336
14.4.5 ·ýo . . . . . . . . . . . . . . . . . . . . . . 336
14.4.6 MIPS Oå . . . . . . . . . . . . . . . . . . . . . . . 338
14.4.7 l?U£[“Dirty” ¤ . . . . . . . . . . . . . 341
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14.4.8SØé TLB WÉ~ÑÖL§ . . . . . . . . . . . . . . 342
14.4.9 TLB o±95¿¯ . . . . . . . . . . . . . . . . . . 345
14.4.10 ;ì/=Ú 64 . . . . . . . . . . . . . . . . 346
1 15 Ù Linux SØ¥'u MIPS ;¯K 347

15.1 +np . . . . . . . . . . . . . . . . . . . . . . . . . . 347
15.1.1 DMA . . . . . . . . . . . . . . . . . . . . . . . . 347
15.1.2 Ä)¤ 1- . . . . . . . . . . . . . . . . . 349
15.1.3 p /;ìN¯K . . . . . . . . . . . . . . . . . . 349
15.1.4 p K . . . . . . . . . . . . . . . . . . . . . . . . . 350
15.2 CP0 6Yx . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
15.3 õ?nìXÚÚp 5 . . . . . . . . . . . . . . . . . . . 351
15.4 ' ~§ÃóN` . . . . . . . . . . . . . . . . . . . . . . . . . 354
1 16 Ù Linux A^§Sè!PIC!¥ 356

16.1 óüN¤§S . . . . . . . . . . . . . . . . . . . . . 358
16.2 Û £þL£GOT¤| . . . . . . . . . . . . . . . . . . . . 359
N¹ A MIPS õ§ 361

A.1 o´õ§º . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361
A.1.1 Ó$1ü§I= ] º . . . . . . . . . . . . . 362
A.2 o^ MTº . . . . . . . . . . . . . . . . . . . . . . . . . . . 362
A.3 MIPS N¢yõ§º . . . . . . . . . . . . . . . . . . . . . . . 363
A.3.1 MT #O CP0 Mì . . . . . . . . . . . . . . . . . . . 364
A.3.2 É~Ú¥ä . . . . . . . . . . . . . . . . . . . . . . . . . . 365
A.3.3 MIPS MT Ú¥ä . . . . . . . . . . . . . . . . . . . . . . . 365
A.3.4 §`k?J« . . . . . . . . . . . . . . . . . . . . . . . 366
A.3.5 ^rÄ§Mï——fork - . . . . . . . . . . . 366
A.4 MT 3¢S¥A^ . . . . . . . . . . . . . . . . . . . . . . . . . 366
A.4.1 SMP Linux . . . . . . . . . . . . . . . . . . . . . . . . . . 367
^ MT ¢ypA§SO . . . . . . . . . . . . . . 367
A.4.2
N¹ B MIPS -8Ù§À*Ð 369

B.1 MIPS16 Ú MIPS16e ASE . . . . . . . . . . . . . . . . . . . . . . 369
B.1.1 MIPS16 ASE ¥AÏ?èªÚ- . . . . . . . . . . . 370
B.1.2 é MIPS16 ASE µd . . . . . . . . . . . . . . . . . . . 370
B.2 MIPS DSP ASE . . . . . . . . . . . . . . . . . . . . . . . . . . . 371
B.3 MDMX ASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 372
MIPS âL 374
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3 R6000 130 MIPS 20KC
4 R4000, R4400 131 MIPS 4KMP
5 Early LSI LOgic 32-bit CPUs 132 MIPS 4KEc
6 R6000A 133 MIPS 4KEmp
7 IDT R3041 134 MIPS 4KSc
9 R10000 135 M4K
10 NEC Vr4200 136 MIPS 25Kf
11 NEC Vr4300 137 MIPS 5KE
12 NEC Vr41xx family 144 MIPS 4KEc(MIPS32R2oN)
16 R8000 145 MIPS 4KEmp(MIPS32R2 oN)
32 R4600 146 MIPS 4KSd
33 IDT R4700 147 MIPS 24K
34 Toshiba R3900 family 149 MIPS 34K
35 R5000 150 MIPS 24KE
40 QED RM5230, RM5260
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#if BYTE_ORDER == BIG_ENDIAN
struct ieee754dp_konst {
unsigned sign:1
unsigned bexp:11;
unsigned manthi:20; /* cannot get 52 bits into ... */
unsigned mantlo:32; /* ... a regular C bitfield */
};
struct ieee754sp_konst {
unsigned sign:1
unsigned bexp:8;
unsigned mant:23;
};
#else /* little-endian */
unsigned mantlo:32;
unsigned manthi:20;
unsigned bexp:11;
unsigned sign:1
};
unsigned mant:23;
unsigned bexp:8;
unsigned sign:1
};
#endif
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fs1 < fs2 || unordered(fs1, fs2) ult nge
fs1 < fs2 || fs1 == fs2 ole le
fs1 < fs2 || fs1 == fs2 || unordered(fs1,fs2) ule ngt
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fd.upper = fs;
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fd.lower = ft.upper;
pul.ps fd, fs fd.upper = fs.upper;
fd.lower = ft.lower;
puu.ps fd, fs fd.upper = fs.upper;
fd.lower = ft.upper;
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/* s & 7 == 4 */
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}
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152
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bc1any4t 4, target if (fcc4 || fcc5 || fcc6 || fcc7) goto target
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i¤IÒål§
addr ^®?ó load/store -±Â«Ü{êâ/
Lª£ë1 9.4 !£ã®?ìN¢yØÓÀ"¤
at ®?Mì§Ù¢Ò´ $1"
zero Mì $0§[""
ra £/Mì $31"
hi,lo ÏLr hi Ú lo å5/¤V°Ýê¦{(J"hi Ú lo z
NBÚêMìÓõ §¤± hilo 3 32 Åìþ±N
B 64 ê§3 64 Åìþ±NB 128 (J"
MAXNEG32BIT ©O^ 2 Öè±L« 32 Ú 64 Kê"^ 2 Ö
èL«A5´ê -MAXNEG32BIT Ã{^ 32 L«"
MAXNEG64BIT ûÉö(J CPU Mì
cd -\?nìMì
cs -Ö?nìMì
exception(CAUSE,code) ûÚu CPU g¶CAUSE û½Mì Cause(ExcCode)
"“code”Ø´dM)º§ ´?è3-
SÃ¤¢§XÚ^±ÏLÖ-éT"¿z
ù-Ñ“code”§¤±kÒÑ "
163
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.1 Y
i ^å
exception(CAUSE) ûÉö(J CPU Mì
const31..16 L?ê“const” 31 16 ¤ê"MIPS Ö
âq½"
L 8.2: Ui1gSü®?-
®?/Åìè õU£ã
abs d,s ⇒ d = s < 0 ? -s : s
sra $at,s,31
xor d,s,$at
subu d,d,$at
add d,s,j ⇒ ÄÑg§é^
addi d,s,j d = s + (signed)j
add d,s,t ⇒ ÄÑg§é^
d = s + t
addu d,s,j ⇒ Ö j ±Ñ −32768 ≤ j < 32768 §
addiu d,s,j ´)¤è¬E,"
d = s + (signed)j
addu d,s,t d = s + t
and d,s,j ⇒ =û 0 ≤ j < 65535 — éuê§)¤
andi d,s,j -
d = s & (unsigned)j
and d,s,t d = s & t
b label ⇒ goto label
beq
$zero,$zero,offs
bal label ⇒ ¼êN^£kéu PC ÏN^¤"5
bgezal $zero,offs ¿ ra £/ée^-/µe^
- u©|ò´ø§3N^m©c1L "
bc0f label â?nì 0 ^©|"3P CPU þÿÁ CPU
bc0f1 label Ñ\Ú &Ò"®²Ø2´ MIPS32 ½ MIPS64
bc0t label Ü© "
bc0t1 label
164
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
bc1f $fccN, label â2:^ /ý(t)½ö"/b(f) ?1
bc1fl $fccN, label ©|¶1 7.9.7 !"y FPU Pkõ2:^
bc1t $fccN, label §ÏL N=0..7 5ÀJ"Pè^^ 0§
bc1tl $fccN, label ù“$fccN”±Ñ"
bc1fl M¥“l”L«ù´Û©|-¶
1 8.5.4 !"5¿ MIPS32/64 ¢ U©|
-§ïÆ§S Ú?ÈìØ3U3õ«
MIPS NX(¢yþ£è¥)¤
-"
bc1any2f $fccN,label MIPS-3D -§âü½o^“OR”©|"
bc1any2t $fccN,label 1 7.10.4 !"
bc1any4f $fccN,label
bc1any4t $fccN,label
bc2f label â?nì 2 ^©|"= CPU ¦^?n
bc2fl label ì 2 -8½Jø ÜÚ â^"þ¡
bc2t label bc1f "
bc2tl label
beq s,t,label if (s == t) goto lable
beql s,t,label þ¡^©|-U©|CN§®="=
©|u)â1ò´ø-¶ 8.5.4 !"
beqz s,label ⇒ if (s == 0) goto label
beq s,$zero,offs
beqzl beqz U©|CN¶ 8.5.4 !"
bge s,t,label ⇒ if ((signed) s ≥ (signed) t) goto label
slt at,s,t
beq at,$zero,offs
bgel s,t,label ⇒ “U”/ª§,T-´÷"®²
bge
slt at,s,t =§,k®?ì|±"1 8.5.4 !"
beql at,$zero,offs
bgeu s,t,label ⇒ if ((unsigned) s ≥ (unsigned) t) goto
sltu at,s,t label;
beq at,$zero,offs
bgez s,label if (s ≥ 0) goto label;
bgezal s,label XJ(s ≥ 0) N^“label()"” ´5¿“£/
”Ã^/3Mì ra ($31) ¥"
165
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
bgezall s,label ®²=U©|CN¶ 8.5.4 !"éJwÑù
^-koÐ?"
bgezl s,label ®=U©|CN¶ 8.5.4 !"
bgt s,t,label ⇒ if ((signed) s ≥ (signed) t) goto label;
slt at,t,s
bne at,$zero,offs
bgtu s,t,label ⇒ if ((unsigned) s ≥ (unsigned) t) goto
slt at,t,s label;
bne at,$zero,offs
bgt s,t,label ⇒ if ((signed) s ≥ (signed) t) goto label;
slt at,t,s
bne at,$zero,offs
bgtz s,label if (s > 0) goto label;
bgtzl s,label bgtz -U©|§®=" 8.5.4 !"
ble s,t,label ⇒ if ((signed) s ≤ (signed) t) goto label;
sltu at,t,s
beq at,$zero,offs
bleu s,t,label ⇒ if ((signed) s ≥ (signed) t) goto label;
sltu at,t,s
beq at,$zero,offs
blez s,label if (s ≤ 0) goto label;
blezl s,label blez -U©|§®=" 8.5.4 !"
blt s,t,label ⇒ if ((unsigned) s < (unsigned) t) goto
slt at,t,s label;
bne at,$zero,offs
bltl s,label ®=U©|" 8.5.4 !"
bltu s,t,label ⇒ if ((unsigned) s < (unsigned) t) goto
sltu at,s,t label;
bne at,$zero,offs
bltz s,label if (s < 0) goto label;
bltzal s,label XJ(s <0) N^ label()"´ØØN^´Äu
)§“£/”ÆÃ^3Mì ra ($31)
¥"
if (s < 0) label();
166
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
bltzall s,label )U©|CN¶ 8.5.4 !"
bltzl s,label ®=U©|CN¶ 8.5.4 !"
bne s,t,label if (s != t) goto label;
bnel s,t,label ®=U©|CN¶ 8.5.4 !"
bnez s,label if (s != 0) goto label;
bnezl s,label ®=U©|CN¶ 8.5.4 !"
break code NÁì^ä:-"code éMvkJ§
´ä:É~~§±ÏLÖÉ~Ï-u¢
§"
cache k,addr ép 1?1ö§X 4.9 !¤ã"éP
MIPS CPU vk¢yT-§+np 6u
éäN CPU E|"
cfc1 t,cs òêâl?nìMì cs DxÏ^Mì
cfc2 t,cs t"ûæ^9ÏMì8?nì§~X
2:ü£?nì 1¤"cfc0 -Øáu MIPS32
5"
ctc1 t,cs òêâlÏ^Mì t Dx?nìMì
ctc2 t,cs cs"
clo d,s é s ¥ê 32 Oc£p ¤
ê"
clz d,s é s ¥ê 32 Oc£p ¤"
ê"
dabs d,s ⇒ 64
dsra $at,s,31 d = s < 0 ? -s, s
xor d,s,$at
dsubu d,d,$at
dadd d,s,t 64 ¶ÄÑg§é^
d = s + (signed)j
addi d,s,j 64 §ÄÑg§é^
d = s + j
daddiu d,s,j 64 á=ê\{§õÿ¤ daddu"
d = s + j
daddu d,s,t 64
d = s + t
167
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
dclo d,s é s lMì1 63 m©Oc£p ¤
ê"
dclz d,s é s lMì1 63 m©Oc£p ¤
" ê"
ddiv $zero,s,t ⇒ Ï·½ $zero 8öê§T- 64
ddiv s,t MØ{-"
lo = (long long) s / (long long)t;
hi = (long long) s % (long long)t;
1"ØÚÄÑuÿ 64 kÎÒêØ{-"
ddiv d,s,t ⇒
teq t,$zero,0x7
ddiv $zero,s,t
if (t == 0) exception (BREAK, 7);
daddiu $at,$zero,-1
if (t == -1 && s == MAXNEG64BIT)
bne t,$at,1f
/* result overflows */
daddiu $at,$zero,1
exception (BREAK, 6);
dsll32 $at,$at,31
d = lo;
teq $t1,$at,0x6
1:
mflo d
ddivu $zero,s,t ⇒ ÃÎÒ 64 êMØ{-"
ddivu s,t lo = (long long) s / (long long)t;
ddivu d,s,t ⇒ "ØuÃÎÒ 64 êØ{"
teq t,$zero, 0x7
ddivu s,t
mflo d
if (t == 0) exception(BREAK, 7);
d = lo;
deret l EJTAG NÁÉ~£"D4 CP0 Mì

DEPC ¤¹/?-§NÁª ""
EX deret -¿Ø$1£vkò´ø
-¤"k' EJTAG õSN1 12.1 !"
dext d,s,shf,sz l 64 MìJ "shf ´ 3 s ¥£
1 0 ¤I £þ§sz ´ Ý"
s = d(sz+shlf)..shf;
168
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
dext d,s,shf,sz ⇒ shf ½ s L 32 ®?ìâIÑ dextm
dextm d,s,shf,sz ½ dextu Åìè"3~¹e§ dext ,
dext d,s,shf,sz ⇒ 4®?ì?n"
dextu d,s,shf,sz
dextm d,s,shf,sz sz 32 ½õ dext Åìè"
dextu d,s,shf,sz shf 32 ½õ dext Åìè"
di d B ¥ ä" é G M ì Û ¥ ä ¦ U
£AE(IE)§1 3.3.1 !¤"§r5 SR
d ¥"Tö´f5¶æ^Ö/U/
ªOYkU´¥ä·Ï"
dins d,s,shf,sz 64 Mì\ "\êâ¤ s $
"shf ´êâI£ £þ§sz ´
Ý"
d = d63..(shf+sz) | s(sz)..0 |
(shf > 0 ? d(shf-1)..0 : 0);
dins d,s,shf,sz ⇒ shf ½ s L 32 ®?ìâIÑ dinsm
dinsm d,s,shf,sz ½ dinsu Åìè"3~¹e§ dins ,
dins d,s,shf,sz ⇒ 4®?ì?n"
dinsu d,s,shf,sz
dinsm d,s,shf,sz sz 32 ½õ dins Åìè"
dinsu d,s,shf,sz shf 32 ½õ dins Åìè"
div $zero,s,t ⇒ 32 kÎÒêMØ{-¶8Mì
div s,t $zero ®?ì¿Ø\"Ø½ÄÑuÿè"
lo = s / t;
hi = s % t;
div d,s,t ⇒ kÎÒ 32 êØ{-§3"ØÚÄÑêu
teq t,$zero,0x7 )É~"
div $zero,s,t
if (t == 0)
li $at,-1
exception (BREAK, 7); /* divide by zero */
bne t,$at,1f
lo = s / t; hi = s;
lui $at,0x8000
if (t == -1 && s == MAXNEG32BIT)
teq s,$at,0x6
exception (BREAK, 6); /* result overflows */
1:
d = lo;
mflo d
169
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
divu $zero,s,t ⇒ /* $zero as destination means no checks */
divu s,t lo = s / t;
hi = s % t;
divu d,s,t ⇒ ÃÎÒØ{§´"ØÉ~µ
teq t,$zero, 0x7
divu s,t
lo = (unsigned) s / (unsigned)t;
mflo d
hi = (unsigned) s % (unsigned)t;
d = lo;
dla t,addr ⇒ \1 64 /¶1 9.4 !"

# various ...
dla t,const ⇒ \1 64 ~ê"=~ê0u 0x8000 0000 Ú
# biggest case 0xFFFF FFFF mâ^ØÓu li ÏPÎ§d
lui t,const63..48 32 ⇒64 =5K¦ li òp 32 ÜW
ori t,const47..32 "
dsll t,16
ori t,const31..16
dsll t,16
ori t,const15..0
dmadd16 s,t =3 NEC Vr41xx x CPU þk-"
(long long) lo = (long long)lo + ((short)s
* (short)t);
dmfc1 t,fs ò 64 êâl?nìMì cs DxÏ^M
dmfc2 t,fs ì t",=3k 64 Mì?nìþI
Ú¢y"dmfc1 û2:üMì¶dmfc2 4
¾"
dmtc1 t,cs ò 64 êâlÏ^Mì t Dx?nìMì
dmtc2 t,cs cs"Ù§Óþ¡ dmfc1"
dmul d,s,t ⇒ 64 kÎÒê¦{-¶s Ú t ¦ÈO(J
dmultu s,t 128 §ØUÄÑ"
mflo d vkü^Åì-¢ynMìöê 64 ¦
{§,kéu 32 öêkù-£mul¤"
hilo = s * t; /* with 128-bit precision */
d = lo;
170
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
dmulo d,s,t ⇒ kÎÒê¦{-§ÄÑu)É~"
dmult s,t
hilo = s * t; /* with 128-bit precision */
mflo d
if ((lo >= 0 && hi !=0) || (lo < 0 && hi != -1))
dsra d,d,63
mfhi $at
d = lo;
tne d,$at,0x6
mflo d
dmulou d,s,t ⇒ ÃÎÒê¦{-§ÄÑu)É~"
dmultu s,t
hilo = (long long) s * (long long) t;
mfhi $at
if (hi !=0)
mflo d
tne $at,$zero,0x6
d = lo;
dmult s,t 64 kÎÒê¦{Åì-§(Ju hilo"

hilo = (long long) s * (long long) t
dmultu s,t 64 Åì¦{-ÃÎÒê"
hilo = (unsigned long long) s * (unsigned
long long) t
dneg d,s ⇒ ü8$Îê§ÄÑg—\Ue
dsub d,$zero,s ¡ dnegu"
(long long) d = -(long long) s; /* trap on
overflow */
dnegu d,s ⇒ (long long) d = -(long long) s;
dsubu d,$zero,s
kÎÒ 64 ê{-§1ÄÑû"
drem d,s,t ⇒
teq t,$zero,0x7
if (s == MAXNEG32BIT && t == -1)
ddiv $zero,s,t
exception (BREAK, 6); /* overflow */
daddiu $at,$zero,-1
d = (long long) s % (long long) t;
bne t,$at,1f
daddiu $at,$zero,1
dsll $at,$at,63
teq s,$at,0x6
1:
mfhi d
171
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
dremu d,s,t ⇒ 64 ÃÎÒê{§1ÄÑuµ
teq t,$zero,0x7
ddivu $zero,s,t
d = (unsigned long long) s % (unsigned long long)t;
mfhi d
dret LÉ~£-§ûy3®L R6000

CPU Ú, “MIPS II” U¬"
drol d,s,t ⇒ 64 Ì£§Ù¥£þĆþ"
dnegu $at, t d = (s << t) | ((unsigned long long)s >>
drotrv d,s,$at (64 - t));
drol d,s,j ⇒ 64 Ì£§Ù¥£þ´~ê"
drotr d,s,64-j d = (s << j) | ((unsigned long long)s >>
(64 - j));
dror d,s,t ⇒ 64 Ìm£§Ù¥£þĆþ"
drotrv d,s,t d = ((unsigned long long)s >> t) | (s <<
(64-t));
dror d,s,j ⇒ 64 Ìm£§Ù¥£þú 32 ~þ"
drotrv d,s,j d = ((unsigned long long)s >> j) | (s <<
(64-j));
dror d,s,j ⇒ 64Ìm£§Ù¥£þ´L½u 32
drotr32 d,s,j ~þ"
d = ((unsigned long long)s >> j) | (s <<
(64-j));
dsbh d,t Mì£64 Mìkoé¤zéi!"
dshd d,t Mì£64 Mìküé¤zéi£16
¤"
dsll d,s,t ⇒ 64 £§£ þĆþ"
dsllv d,s,t d = (long long) s << (t % 64);
dsllv d,s,t \±ù5Mì£-Åìè§´
¤ dsll Ð"
dsll d,s,shf 64 £§£ þú 32 ~þ"
d = (long long) s << shf;
dsll d,s,shf ⇒ 64 £§£ þúu 32 ~þ"
dsll32 d,s,shf-32 d = (long long) s << shf; /* 32 <= shf <
63 */
172
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
dsra d,s,t ⇒ 64 m£µU C ÂkÎÒm£§½¡â£
dsrav d,s,t —3z e£Ä§Mìp ^1 63
W¿§(¢y ± 2 ØêkÎÒØ
{"
d = (signed long long) s >> (t % 64);
dsra d,s,shf 64âm£§£ þ~ê£â£ ¿
Âþ¡ dsra d,s,t¤"~êu 32 §Ò´Ó
¶Åì-"
d = (signed long long) s >> (t % 64);
dsra d,s,shf ⇒ Óþ§32 ≤ shf <63"\UØ¬ dsra32"
dsra32 d,s,shf-32
dsrl d,s,t ⇒ Ü6m£—3z e£Ä§Mìp ^
dsrlv d,s,t 1 0 W¿§Ú C óÃÎÒêÂ"ù´£
þCþ"
d = (unsigned long long) s >> (t % 64);
dsrl d,s,shf Ü6m£§£ þu 32 ~ê"
d = (unsigned long long) s >> (shf % 32);
dsrl d,s,shf ⇒ Óþ§shf u½u 32"
dsrl32 d,s,shf-32
dsub d,s,t 64 ~{§ÄÑu)É~§4"
d = s - t;
dsubu d,s,t d = s - t; /* 64-bit */
ehb 1xo—\Iyþ¡-?Û?
nì 0 B^3 -1c®²¤
ÿ¤^-"1 8.5.10 !"
ei d ¥ä¦U—Ã^/GMì¥ä#
N £SR(IE)§ 3.3.1 !¤"SR 5 d
¥"Tö´fö"þ¡ di -aq£
k^¤"
eret l¥ä£µáuAª-"Ø SR(EXL)
¿ ©| EPC "1 5.5 !"
173
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
ext d,s,shf,sz l 32 MìJ "shf ´ 3 s ¥£
1 0 ¤I £þ§sz ´ ¹
ê"
mask = (2**sz - 1) << shf;
d = (s & mask) >> shf;
ins d,s,shf,sz 64 Mì\ "\êâ¤ s $
"shf ´êâI£ £þ§sz ´
°Ý"
mask = (2**sz - 1) << shf;
d = (d & mask) | ((s << shf) & mask);
j label Ä“go-to”-"5¿U 2 i 28
!“”S-"
goto label;
j r ⇒ a=dMì r -"ùÚ ò
jr r =£?¿/{§Ï¤k-S/
ªªÝÑu 32 "
jal label f§SN^§£/ u $ra($31)"5¿£/
ée^-—Ï~ MIPS ©|§
;©| - ©|ò´ø§@p-
o´3f§Sc1"
jal d,addr ⇒ ¼êN^§´£/uMì d Ø
la $at,addr ´Ï~ $31"^ jalr -Ü¤"3ÅìèÐmª
jalr d,$at ¥^ la ´¢Û§Ï la g´÷-—ù
·±;3ùp)ºÏª£ 9.4 !¤"
jalr d,s þ¡ jal d,addr 3/ u,Mì s C
N"\±¤ jal ½ jalr"
jal s ⇒ XJ½Mì§ÒŃ^/§£
jalr $ra,s /uÏ~ $ra"
la d,addr ⇒ \1/—[´Ü¤-§â addr {ØÓ
# many options ±)¤ØÓèS"õSN1 9.4 !"
lb d,addr 8 \1§ÎÒ*ÐMì"
éu-ÚÙ§ load/store -§±^õ«
ª addr /— 9.4 !—´ load/store -
UOMì\þ 16 kÎÒê/"
d = *((signed char *) addr);
174
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
lbu d,addr 8 \1§"*ÐMì"
d = *((signed char *) addr);
ld d,addr 64 \1§e/éàli!Ku)É~"
d = *((long long *) addr);
ldc1 d,addr 64 \1?nì 1 £2:¤Mì"~¤ l.d§
1 8.3 !"
ldc2 d,addr 64 \1?nì 2 Mì§XJæ^ ?nì
2 ¿ °Ý 64 {"
ldl d,addr V°Ý“/m”\1—¤é¦^§ù -¢y
ldr d,addr 64 éà\1 uld¶e©±91 2.5.2
!"
ldxc1 fd,s(t) 64 \1?nì 1 £2:¤Mì§æ^VM
ì“¢Ú”Ï"~ l.d /ª§1 8.3 !"
fd = *((double *)(t+b));
lh d,addr 16 \1§ÎÒ*ÐMì"
d = *((signed short *)addr);
lhu d,addr 16 \1§"*ÐMì"
d = *((unsigned short *)addr);
li d,j ⇒ ^~ê£“á=ê”¤\1Mì"TÐmª·û
ori d,$zero,j 0 ≤ j ≤65535"
li d,j ⇒ ·û -32768 ≤ j <0 /"
addiu d,$zero,j
li d,j ⇒ ·û±L« 32 êÙ§ j /"
lui d,hi16(j)
ori d,d,lo16(j)
ll t,addr ë£\1"©O\1 32 /64 §kë£B^¶
lld t,addr ^5Ú sc ½ scd å¢yÃ£&Òþ£1 8.5.2
!¤"
lui t,u þ \1á=ê£~ê u ÎÒ*Ð 64 Mì¤"
t = u << 16;
lw t,addr 32 \1§64 CPU þ?1ÎÒ*Ð"
t = *((int *)addr);
lwc1 fd,addr \1ü°Ý2:ê2:Mì—~ l.s"1
8.3 !"
175
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
lwc2 cd,addr 32 \1?nì 2 Mì§XJ¢y {"
é"
lwl t,addr /m\1i"ëe¡ ulw Ú1 2.5.2
lwr t,addr ! )ù -NÓ¤éà 32
\1ö"
lwu t,addr 32 "*Ð\1§=u 64 CPU"
t = (unsigned long long) *((unsigned int
*)addr);
lwxc1 fd,t(b) æ^¢Ú£Mì + Mì¤/\1 32 2:"
~ l.s"1 8.3 !"
fd = *((float *)(t+b));
mad s,t 32ê¦{\\§MIPS32 IO-"üM
ì±°Ý¦¿\\µ
hilo = hilo + ((long long) s * (long long)
t);
madu s,t Óþ§´ÃÎÒ$"
hilo = hilo + ((unsigned long long) s *
(unsigned long long) t);
madd d,s,t 32ê¦{\\§MIPS32 IO-"üM
maddu d,s,t ì±°Ý¦¿\\µ
t);
madd16 s,t 32ê¦{\\§MIPS32 IO-"üM
ì±°Ý¦¿\\µ
t);
mfc0 t,cs r32 êâl?nìMì cs DxÏ^M
mfc1 t,fs ì t—XJ cs ´ 64 °Ý§KDx´$ 32 "
mfc2 t,cs ¯ CPU MìlØm mfc0§r2:üêâ
£êMìlØm mfc1"mfc2 =¢y
?nì 2 ÿâk^§ù«¹é"
mfhc1 t,cs ò 64 ?nìMì cs ½ fs DxÏ^Mì
mfhc2 t,fs t"
= MIPS32 êü 64 !Ù§
¡oN MIPS64 ?nìâJø"~X§MIPS
úi 24Kf ØPk 64 2:ü"
176
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
mfhi d òê¦{ü$(JDxÏ^Mì d"lo
mflo d ¹Ø{û§±9¦È$ 32 §½ö dmul ¦
È$ 64 "hi ¹Ø{{ê½ö¦Èp "
ù -[´p£¶=¦@Ï MIPS CPU
þ§M¤¦Ø-(å"
move d,s ⇒ d = s;
or d,s,$zero
movf d,s,$fccN «^Dx-—õSNë1 8.5.3
!"
if (!fcc(N)) d = s;
movf d,s,t if (t) d = s;
movt d,s,$fccN if (fcc(N)) d = s;
movt.d fd,fs,N V°ÝÚü°Ý"
movt.s fd,fs,N if ((fcc(N)) fd = fs;
movz d,s,t if (!t) d = s;
msub s,t ê¦{/\\K§©OkÎÒÚÃÎÒê
msubu s,t /ª"
hilo = hilo - ((long long) s * (long long)
t);
mtc0 t,cd r32 êâlÏ^Mì t Dx?nìMì
mtc1 t,fd cd"5¿ù^-¿ØÌk8IMìÏ~
mtc2 t,cd S."
mtc0 û¯ CPU Mì§mfc1 ûr
êüêâ2:Mì£õÿêâ
l;ì\1¤"= CPU æ^?nì 2 -
ÿ£ù«¹é¤â¢y mtc2"
XJ?nìMì´ 64 °Ý§êâ\1?$
$ §´p 32 Gvk½Â"
mthc1 t,cs ò 32 Ï^Mì t Dx 64 ?nìMì
mthc2 t,fs cd ½ fd p §3$ ØC"
= MIPS32 êü 64 !Ù§
¡oN MIPS64 ?nìâJø"~X§MIPS
úi 24Kf ØPk 64 2:ü"
177
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
mthi s òÏ^Mì d SN©ODxê¦{ü
mtlo s (JMì hi Ú lo"ù:wþÐvko^§
´lÉ~£¡E CPU G7Ø"
mul d,s,t ýnMì 32 ê¦{§3 MIPS32 ¥½Â§
3, @Ï CPU þk"°Ý(J,
GSÜ hilo Mì"vkÃÎÒ"
hilo = (long long) s * (long long) t;
d = lo;
mul d,s,t ⇒ ®?ì)¤ MIPS32 c-8±Ü¤n
mult s,t Mì¦{"
mflo d
mul d,s,t ⇒ kÄÑu 32 kÎÒ¦{"éÄÑiÿ´
mult s,t ÏL w hi ´Ä{ü lo ÎÒ*Ð5"
mflo d
hilo = (signed) s * (signed) t;
sra d,d,31
if ((lo >= 0 && hi != 0) || (s<0) && hi != 1)
mfhi $at
exception(BREAK, 6);
tne d,$at,0x6
mflo d
mulou d,s,t ⇒ kÄÑu 32 kÎÒ¦{"
multu s,t
hilo = (signed) s * (signed) t;
mfhi $at
if ((lo >= 0 && hi != 0) || (s<0) && hi != 1)
mflo d
exception(BREAK, 6);
tne $at,$zero,0x6
mult s,t hilo = (signed)s * (signed)t;

multu s,t hilo = (unsigned)s * (unsigned)t;
neg d,s ⇒ ù3ÄÑg§4^"
sub d,$zero,s d = - s;
negu d,s ⇒ vkÄÑ§C óo´)¤ù«"
subu d,$zero,s d = - s;
ö§-è""
nop ⇒
sll $zero,$zero,$zero
nor d,s,t OÅ ö§v7 64 CPU 5ü
Õ"
d = ~(s | t);
178
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
not d,s ⇒ d = ~s
nor d,s,$zero
nudge addr ý- pref nudge Ú prefx nudge {/ª"
nudgex s(t) e©Ú1 8.5.8 !"
or d,s,t d = s | t;
ori d,s,j ~ê1“½”ö OR"Åì-§~¤
or d,s,jµ
d = s | (unsigned) j;
pref hint,addr é?1`zý-"¯kUI
pref hint,t(b) êâ§S±?1Sü§4¤IêâJc?
\p Ø)B^"äN¢yo´±r
pref ¤ö"
hint ½Âù´=«a.ý¶1 8.5.8 !"
prefx û2:§2:\1/;-¤^
Mì + MìÏª"
r2u s LSI ATMizer-II Ak-¶=¤Û%2:
ª"(Ju lo"
radd s,t LSI ATMizer-II Ak-¶Û%2:\{"(
Ju lo"
rdhwr d,$cs ÖMMìµ#NA^r^Ö
| CPU Mì"1 8.5.12 !"
rdpgpr d,s lþKfMì|ÖMì—1 5.8.6
!"
rem d,s,t ⇒ kÎÒê{-§1"ØÚÄÑû"
teq t,$zero,0x7
div $zero,s,t
if (s == MAXNEG32BIT && t == -1)
li $at,-1
exception (BREAK, 6); /* overflow */
bne t,$at,1f
d = s % t;
lui $at,0x8000
teq s,$at,0x6
1:
mfhi d
179
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
remu d,s,t ⇒ ÃÎÒê{§1"Øuµ
teq t,$zero,0x7
divu $zero,s,t
d = (unsigned) s % (unsigned) t;
mfhi d
rfe MIPS32 c£Ù¢k MIPS I¤lÉ~£

^5¡E CPU G-"y3®²L§d?Ø
2[0 "
rmul s,t LSI ATMizer-II Ak-¶Û%2:¦{"(
Ju lo"
rol d,s,shf ⇒ Ì£§Ù¥£þ´~ê"rotr ´ MIPS32R2
rotr d,s,32-shf #O¶éuP ISA§-dÅì-S
Ü¤"
d = s << shf) | ((unsigned)s >> (32 - shf);
rol d,s,t ⇒ Ì£"3 MIPS32R2 c-8"yÌm
negu $at,t £Åì-¶éuP-8§IõÅì
rotrv d,s,$at -5Ü¤"
d = (s << t) | ((unsigned)s >> (32-t));
ror d,s,shf ⇒ Ìm£~ê "3 MIPS32R2 c-8þ
rotrv d,s,shf Ü¤-"
d = ((unsigned)s >> shf) | (s << (32-shf));
ror d,s,t ⇒ Ìm£§£þĆþ"3 MIPS32R2 c
rotrv d,s,t -8þÜ¤-"
d = ((unsigned)s >> t) | (s << (32-t));
rotr d,s,shf Ìm£§£þ´á=þµ=3 MIPS32R2 ¥
âkÅì-"
rotrv d,s,t Ìm£§£þĆþµ=3 MIPS32R2 ¥â
kÅì-"
rsub s,t LSI ATMizer-II Ak-¶Û%2:~{"(
Ju lo"
sb t,addr *((char *)addr) = t;
sc t,addr ^;i/Vi¶1 8.5.2 !)º"
scd t,addr
sd t,addr XJ addr vkéàli!Ò¬É~"
*((long long *)addr) = t;
180
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
sdbbp c NÁä:-—ØÓu break -§Ï§á
\NÁª É~ª"À c ?è-¥
§øNÁìÖ"
5¿éù^-kü«ØÓ?è—®²L@
«y3=k Toshiba 3900 Ø9Ù U¬¦^"
1 12.1 !k' EJTAG NÁü£ã"
sdc1 ft,addr ;2:V°ÝMì;ì"~¤ s.d"
sdc2 cs,addr ; 64 ?nì 2 Mì;ì"
sdl d,addr V°Ý“/m”;¶1 2.5.2 !)º"
sdr d,addr
sdxc1 fs,s(t) ;V°Ý2:Mì§æ^VMì“¢Ú”Ï"
~ s.d /ª"
*((double *)(t+b)) = fs;
seb d,s MìSri!ÎÒ*ÐMì"
d = (long long)(signed char)(s && 0xff);
seh d,s MìSriÎÒ*ÐMì"
d = (long long)(signed short)(s && 0xffff);
seq d,s,t ⇒ “^”®?ÏPÎ|¥1§[ý¢Å
xor d,s,t ì- slt E"
sltiu d,d,1 d = (s == t) ? 1 : 0;
sge d,s,t ⇒ d = ((signed)s >= (signed)t) ? 1 : 0;
slt d,s,t
xori d,d,1
sgeu d,s,t ⇒ d = ((unsigned)s >= (unsigned)t) ? 1 : 0;
sltu d,s,t
xori d,d,1
sgt d,s,t ⇒ d = ((signed)s > (signed)t) ? 1 : 0;
slt d,s,t
sgtu d,s,t ⇒ d = ((unsigned)s > (unsigned)t) ? 1 : 0;
sltu d,s,t
sh t,addr ;iµ
*((short *)addr) = t
sle d,s,t ⇒ d = ((signed)s <= (signed)t) ? 1 : 0;
slt d,s,t
xori d,d,1
181
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
sleu d,s,t ⇒ d = ((unsigned)s <= (unsigned)t) ? 1 : 0;
sltu d,s,t
ori d,d,1
sll d,s,shf d = s << shf; /* 0 <= shf <32 */
sll d,t,s ⇒ d = t << (s % 32);
sllv d,t,s
sllv d,t,s
slt d,s,t d = ((signed) s < (signed) t) ? 1: 0;
slt d,s,j ⇒ /* j constant */
slti d,s,j d = ((signed)s < (signed)j) ? 1 : 0;
slti d,s,j
sltiu d,s,j /* j constant */
d = ((unsigned)s < (unsigned)j) ? 1 : 0;
sltu d,s,t d = ((unsigned)s < (unsigned)t) ? 1 : 0;
sne d,s,t ⇒ d = (s != t) ? 1 : 0;
xor d,s,t
sltu d,$zero,d
sra d,s,shf 32m£§£ þ~ê"U C ÂkÎ

Òm£§½¡â£ —3z e£Ä§M
ìp ^1 63 W¿§(¢y ± 2
ØêkÎÒØ{"
d = (signed) s >> shf;
sra d,s,t ⇒ 32 âm£§£ þCþµ
srav d,s,t d = (signed) s >> (t % 32);
srl d,s,shf 32Ü6m£µÒÐ C ÃÎÒþ£ §M
ìp ^1 0 W¿"
d = (unsigned) s >> shf;
srl d,s,t ⇒ 32 Ü6m£§£ þ3Mì¥"
srlv d,s,t d = (unsigned) s >> (t % 32);
ssnop ⇒ “Iþ”ö¶´ö§´3Ó¨±
sll $zero,$zero,1 Ï CPU ØuxÙ§-"û S8"
standby ?\ä>ª§=·û NEC Vr4100 x
CPU¶wait—e—-^2"
182
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
sub d,s,t ÄÑg§é^"
d = s - t;
subu d,s,j ⇒ d = s - j;
addiu d,s,-j
subu d,s,t d = s - t;
suspend ?\ Vr4100 CPU ä>ª"
sw t,addr ;i"
*((int *)addr) = t;
swc1 ft,addr ;ü°Ý2:êS—~ s.s"
swc2 cd,addr ;?nì 2 Mì 32 êâ§é"
swl t,addr /m;i"ë1 2.5.2 !"
swr t,addr
swxc1 fs,t(b) æ^£VMì¤¢Ú/; 32 ü°Ý2:¶
~ s.s"
*((float *)(t+b)) = fs;
sync êâo-§Ìûõ?nì¶1 8.5.9
!"
synci 4 I-cache D-cache ÓÚ"3- §3
1-ézp 1S¬$1
-"
syscall B )“XÚN^”É~"
exception(SYSCALL, B);
teq s,t ^g-µXJA^÷v§)¤
TRAP É~¶^Ò´µ
if (s == t) exception(TRAP);
teq s,j ⇒ if (s == j) exception(TRAP);
teqi s,j
tge s,t if ((signed)s >= (signed)t) exception(TRAP);
tge s,j ⇒ if ((signed)s >= (signed)j) exception(TRAP);
tgei s,j
tgeu s,t if ((unsigned)s >= (unsigned)t) exception(TRAP);
tgeu s,j ⇒ if ((unsigned) s >= (unsigned) j) exception(TRAP);
tgeiu s,j
183
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
tlbp TLB o-¶1 6 Ù"
XJc EntryLo ¥J[Ò TLB
êâ§ Index Têâ"ÄK
Index { 0x8000 0000 £p ¤"
tlbr TLB o-¶1 6 Ù"
ò Index À¥ TLB &EEMì En-
tryLo!EntryHi1!EntryHi0 Ú PageMask ¥"
tlbwi TLB o-¶1 6 Ù"
tlbwr ^ EntryLo!EntryHi1!EntryHi0 Ú PageMask
¥êâ§©O\d Index £tlbwi -¤½
Random £tlbwr -¤¤À¥ TLB êâ"
tlt s,t õ^g"
if ((signed)s < (signed)t) exception(TRAP);
tlt s,j ⇒ if ((signed)s < (signed)j) exception(TRAP);
tlti s,j
tltu s,t if ((unsigned)s < (unsigned)t) exception(TRAP);
tltu s,j ⇒ if ((unsigned) s < (unsigned) j) exception(TRAP);
tltiu s,j
tne s,t if (t != s) exception(TRAP);
tne s,j ⇒ if (s != j) exception(TRAP);
tnei s,j
u2r s Ak-¶òÃÎÒê=¤
LSI ATMizer-II
Û%2:"(Ju lo"
udi0 d,r,s,uc 3^rg½Â-3-?èmSï
-"ù«-±æ^nÏ^Mì-§
udi15 d,r,s,uc ±kû^rÜ6 5 9Ïöè uc"
uld d,addr ⇒ éàV°Ý\1§d1 2.5.2 ![0
ldl d,addr \1Úm\1-Ü¤£=Ñà~f¤"
ldr d,addr+7
ulh d,addr ⇒ éài\1ÚÎÒ*Ð"ùpÚìà
lb d,addr Ðm£à/3ÖööS¤"
lbu $at,addr+1 âØÓÏª§Ðm U'ùpE,"
sll d,d,8
or d,d,$at
184
8.2. ®?-9Ù¿Â 1 8 Ù MIPS -8ë
L 8.2 Y
®?/Åìè õU£ã
ulhu d,addr ⇒ éài\1Ú"*Ð"
lbu d,addr
lbu $at,addr+1
sll d,d,8
or d,d,$at
ulw d,addr ⇒ éài\1¶XJ´ 64 K?1ÎÒ*Ð£
ldl d,addr Ñà/¤"1 2.5.2 !"
ldr d,addr+3
usd d,addr ⇒ éàV°Ý;"
sdl d,addr
sdr d,addr+7
ush d,addr ⇒ éài;"
sb d,addr+1
srl d,d,8
sb d,addr
usw d,addr ⇒ éài;¶1 2.5.2 !"
swl d,addr
swr d,addr+3
wait MIPS32 -§^5?\,«ä>G"Ï~ÏL
¥1uÿ¥ä¢y"^ØAb½¥
o¬u)½l wait 2½L²´¶-¥
ä—wait -Al=Ì¥N^"
wrpgpr cd,t \cKfMì|Mì¶[¹
5.8.6 !"
wsbh é 32 SüiSÜ?1i!"ù´^
32 -¶3 64 CPU þMìpÜ^1 31
ÎÒ*ÐW¿"
wsbh Ì£ å^ê-¢yNõØÓ/
ªi!|"
xor d,s,t d = s ^ t;
xor d,s,j ⇒ d = s ^ j;
xori d,s,j
185
8.3. 2:- 1 8 Ù MIPS -8ë
8.3 2:-
k|ØõØ2:-£L 8.3 Ú 8.4¤"´XuÐé¯Ò¥yÑ
gCE,5"3¿±eA:µ
• z^2:-Ñkü°ÝÚV°Ý§3ÏPÎ¥^
.s Ú .d 5«©"
XJ\M|±1 7.10 !¤ãü°Ý2:é*Ð§¬k .ps
-§1Úü°Ý§´üg"ØáuL¥,
- .ps ü°Ý2:é-3L¥ Ñ5§´·=´4\
ë1 7.10 !`²"
!m¿ ;4\ú«6b§Ó`²·ûü
§L 8.4 ÒÑü°Ý"
• Ä2:?èÚ-(JÎÜ IEEE 754 IO"3MØU)¤ IEEE
754 IO5½/§"1´ÚuÉ~§4^ý§SÖ)
¤ÎÜIO(Jm å"
• 2:OÚa.=-±É~"ùé{3 IEEE ¿Âe¤á§
uÿ§S Ua,^¶3. NX(¿Âe¤áµMIPS
FP 2:M§3¡éÃ{(?nöêÚ$|Ü§Ò¬)¤
2:“¢y” É~§dd4^ý§S§12:$"
êâDx-£;ì!MìmDx¤l5Ø¬u)É~"neg.s!neg.d!abs.s
½ abs.d -==UCÎÒ ØuSNµ¬g^´
éù -“&- NaN”öê¬) IEEE “Ã (invalid)”É
~"
L 8.4: UìÏPÎüS2:-£ã
®?è õU
abs.s fd,fs fd = (fs < 0) ? -fs : fs;
add.s fd,fs,ft fd = fs + ft;
addr.ps fd,fs,ft /* MIPS 3D "reduction add", see Section 7.10 */
fd.upper = fs.upper + fs.lower;
fd.lower = ft.upper + ft.lower;
alnv.ps fd,fs,ft,rs òü°Ý¤ü°Ýé§â rs
½ü«Uª?1"
186
8.3. 2:- 1 8 Ù MIPS -8ë
L 8.4 Y
®?è õU
bc1f $fccN,label A2:^©|-§L 8.2 Ñk"
bc1fl $fccN,label
bc1t $fccN,label
bc1tl $fccN,label
bc1any2f $fccN,label -§âü½o^“½”ö
MIPS-3D
bc1any2t $fccN,label OR (J©|" 7.10.4 !"
bc1any4f $fccN,label
bc1any4t $fccN,label
c.eq.s $fccN,fs,ft 2:'-§' fs Ú ft ¿r(J\2:^
c.f.s $fccN,fs,ft $fccN"1 7.9.7 !édk[0 "
c.le.s $fccN,fs,ft
c.lt.s $fccN,fs,ft
c.nge.s $fccN,fs,ft
c.ngl.s $fccN,fs,ft
c.ngt.s $fccN,fs,ft
c.ole.s $fccN,fs,ft
c.olt.s $fccN,fs,ft
c.seq.s $fccN,fs,ft
c.sf.s $fccN,fs,ft
c.ueq.s $fccN,fs,ft
c.ule.s $fccN,fs,ft
c.ult.s $fccN,fs,ft
c.un.s $fccN,fs,ft
MIPS-3D *Ð-§'ü2:ýé¿
cabs.xx.s $fccN,fs,ft '(J"“xx”LÿÁþ¡ c.xx.s
-Ó"
ceil.l.d fd,fs ò2:=½ekÎÒ 64
ceil.l.s fd,fs ê"
ceil.w.d fd,fs ò2:=½ekÎÒ 32
ceil.w.s fd,fs ê"
cfc1 rt,fs 32:MìÚÏ^Mìm£“f”L«5
g(from) FP§“t”L«x(to) FP¤êâ"^
ctc1 rs,fd u1 7.7 !0 FCSR Mì"
cvt.d.l fd,fs
2:a.=§Ù¥a. d,l,s,w £©OL double,
cvt.d.s fd,fs long, float, int) L«8Ú5 Mìa."
cvt.d.w fd,fs =¬°Ý§æ^ FCSR(RM) c\
ª5(½1NCq"éuê=§IC
q{k'§\Ðr-¤
187
floor.w.s /ª"
8.3. 2:- 1 8 Ù MIPS -8ë
L 8.4 Y
®?è õU
cvt.l.d fd,fs
cvt.l.w fd,fs
cvt.s.d fd,fs
cvt.s.l fd,fs
cvt.s.w fd,fs
cvt.w.d fd,fs
cvt.w.s fd,fs
cvt.ps.s fd,fs,ft òüü°Ý=¤ü°Ýé§1 7.10
!"
cvt.ps.pw fd,fs,ft MIPS-3D -§òü©OL 32 ê
=ü°Ýé§1 7.10.4 !"
cvt.pw.ps fd,fs,ft MIPS-3D -§òü°ÝéüÓ=
ê§1 7.10 !"
cvt.s.pl fd,fs,ft òü°Ýé=Ï~ü°Ý§
cvt.s.pu fd,fs,ft 1 7.10 !"
div.s fd,fs,ft fd = fs / ft;
dmfc1 rd,fs ò 64 l2:£?nì 1¤Ø=Dx
êMì"
dmtc1 rd,fs ò 64 Ø=ÚulêDx2:£
?nì 1¤Mì"
floor.l.d fd,fs ò2:=½öe$ 64 ê"
floor.l.s fd,fs
floor.w.d fd,fs ò2:=½öe$ 32 ê"
floor.w.s fd,fs
l.d fd,addr ⇒ \12:V°Ý§7Léàli!"
ldc1 fd,addr fd = *((double *)(o + b));
l.s fd,addr ⇒ \12:ü°Ý§7Léàoi!"
lwc1 fd,addr fd = *((double *)(o + b));
ldc1 fd, disp(b) ®²= l.d d-"
l.d fd,t(b) ⇒ æ^¢ÚÏ\12:Mì"Ð¤ asl.d /
ldxc1 fd,t(b) ª"5¿üMì/ ¿Øé¡—b ^5
NB/ t £þ§XJ (b+t)
á\ MIPS /N¥ØÓu b «£d
64 /p 2 û½¤§@oÒ ¦"
fd = *((double *)(b + t));
188
8.3. 2:- 1 8 Ù MIPS -8ë
L 8.4 Y
®?è õU
li.s fd,const \12:~ê§Ï~Ü¤-§r~êu,
li.d fd,const ;ì , \1"
luxc1 fd,i(b) VMì¢Ú\1V°Ý2:ê§A ldxc1
§ØÓ?3uXJ /´éà
§Ø¬u)É~§\1òlÏLrk/$
3 "/??1"Ú alnv å^5?
néàü°Ý2:é—1 7.10 !é alnv
£ã"
lwc1 fd, disp(b) ®²= l.s d-"
lwxc1 fd, i(b) ²(VMì¢Ú\1-¶Ï~'æÂÏ
ª l.s Ð"þ¡'u ldxc1 5º"
madd.s fd,fr,fs,ft fd = fr + fs * ft;
madd.s fd,fr,fs,ft fd = fr + fs * ft;
mfc1 rd,fs ò 32 l2:£?nì 1¤Ø=Dx
êMì"
mfhc1 rd,fs òl2:£?nì 1¤Mìp 32 Dx
êMì"ûk 64 FPU 32 ê
CPU"
mov.s fd,fs fd = fs;
movf.s fd,fs,N if (!fcc(N)) fd = fs;
movn.s fd,fs,N if (t != 0) fd = fs; /* t is a GPR */
movt.s fd,fs,N if (fcc(N)) fd = fs;
movn.s fd,fs,N if (t == 0) fd = fs; /* t is a GPR */
msub.s fd,fr,fs,ft fd = fs * ft - fr;
mtc1 rd,fs ò 32 Ø=ÚulêDx2:£
?nì 1¤Mì"
mthc1 rd,fs ò 32 lêMìDx2:£?nì 1¤
Mìp 32 "Ìûk 64 FPU 32
ê CPU£MIPS CPU õêÑ´ 64 ¤"
189
8.3. 2:- 1 8 Ù MIPS -8ë
L 8.4 Y
®?è õU
mul.s fd,fs,ft fd = fs * ft;
mulr.ps fd,fs /* MIPS-3D "Reduction Add", see Section 7.10.4 */
fd.upper = fs.upper * fs.lower;
fd.lower = ft.upper * ft.lower;
neg.s fd,fs fd = -fs;
nmadd.s fd,fr,fs,ft fd = -(fr + fs * ft);
nmsub.s fd,fr,fs,ft fd = -(fr - fs * ft);
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203
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204
8.5. AÏ-9Ù^å 1 8 Ù MIPS -8ë
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8.5.11 synci: U-§Sp +n
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205
8.6. -?è 1 8 Ù MIPS -8ë
XJ SYNCI Step £"§¿gÒ´`\ØI^ synci"
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vk^?§Ø...
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IK“¤á ISA”IÑvk¤k MIPS32 oN CPU ¢y-µ
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«k 64 CPU â7L-§“EJTAG”L«NÁüéX
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s, t, w I£ Mì§óØ(½´Ï^Mìÿ^ rs, rt"
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206
8.6. -?è 1 8 Ù MIPS -8ë
d 8IMì§T-?U"ó·¤ rd ±J2\´Ï^M
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shf £ þõ§^3~ê£ -¥"
broffset kÎÒ 16 éu PC i £þ§L±iü ,I

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target a 26 i/£éAu 28 i!/¤"§a=- j é
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constant ûâÜ6ö 16 .~êþ"âØÓ-±)º
kÎÒ½öÃÎÒê"
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õ 32 êâMìÚ 32 Mì"
fr/fs/ft 2:ü Mì"
fd 2:8IMì£d-\êâ¤"
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hint 8.5.8 !0 ý-J«"
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1?è"ë1 4.9 !L 4.2"
L 8.6: Uì?èüSÅì-
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
0 0 0 0 0 0 nop
0 0 0 0 1 0 ssnop
0 0 w d shf 0 sll d,w,shf
0 s N 0 d 0 1 movf d,s,N
207
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
0 s N 1 d 0 1 movt d,s,N
0 0 w d shf 2 srl d,w,shf

0 0 w d shf 2 rotr d,w,shf R2
0 0 w d shf 3 sra d,w,shf
0 s t d 0 4 sllv d,t,s
0 s t d 0 6 srl d,t,s
0 s t d 1 6 rotrv d,t,s R2
0 s t d 0 7 srav d,t,s
0 s 0 0 0 8 jr s
0 s 0 0 16 8 jr.hb s
0 s 0 31 0 9 jalr s
0 s 0 d 0 9 jalr d,s
0 s 0 d 16 9 jalr.hb d,s
0 s t d 0 10 movz d,s,t
0 s t d 0 11 movn d,s,t
0 code 12 syscall code
0 code x 13 break code

0 code x 14 sdbbp code R3900
0 0 0 0 0 15 sync
0 0 0 d 0 16 mfhi d
0 s 0 0 0 17 mthi s
0 0 0 d 0 18 mflo d
0 s 0 0 0 19 mtlo s
0 s t d 0 20 dsllv d,t,s MIP64
0 s t d 0 22 dsrlv d,t,s MIP64
0 s t d 1 22 drotrv d,t,s MIP64R2
0 s t d 0 23 dsrav d,t,s MIP64
0 s t 0 0 24 mult s,t
208
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
0 s t 0 0 25 multu s,t
0 s t 0 0 26 div s,t
0 s t 0 0 27 divu s,t
0 s t 0 0 28 dmult s,t MIPS64
0 s t 0 0 29 dmultu s,t MIPS64
0 s t 0 0 30 ddiv s,t MIPS64
0 s t 0 0 31 ddivu s,t MIPS64
0 s t d 0 32 add d,s,t
0 s t d 0 33 addu d,s,t
0 s t d 0 34 sub d,s,t
0 s t d 0 35 subu d,s,t
0 s t d 0 36 and d,s,t
0 s t d 0 37 or d,s,t
0 s t d 0 38 xor d,s,t
0 s t d 0 39 nor d,s,t
0 s t 0 0 40 madd16 d,s,t Vr4100
0 s t 0 0 41 dmadd16 d,s,t Vr4100
0 s t d 0 42 slt d,s,t
0 s t d 0 43 sltu d,s,t
0 s t d 0 44 dadd d,s,t MIPS64
0 s t d 0 45 daddu d,s,t MIPS64
0 s t d 0 46 dsub d,s,t MIPS64
0 s t d 0 47 dsubu d,s,t MIPS64
0 s t x 48 tge s,t
0 s t x 49 tgeu s,t
0 s t x 50 tlt s,t
0 s t x 51 tltu s,t
0 s t x 52 teq s,t
0 s t x 54 tne s,t
0 0 w d shf 56 dsll d,w,shf MIP64

0 0 w d shf 58 dsrl d,w,shf MIP64
1 0 w d shf 58 drotr d,w,shf MIP64R2
0 0 w d shf 59 dsra d,w,shf MIP64
209
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
0 0 w d shf 60 dsll32 d,w,shf MIP64
0 0 w d shf 62 dsrl32 d,w,shf MIP64
0 0 w d shf 63 dsra32 d,w,shf MIP64
1 s 0 broffset bltz s,p

1 s 1 broffset bgez s,p
1 s 2 broffset bltzl s,p
1 s 3 broffset bgezl s,p
1 s 8 constant tgei s,j
1 s 9 constant tgeiu s,j
1 s 10 constant tlti s,j
1 s 11 constant tltiu s,j
1 s 12 constant teqi s,j
1 s 14 constant tnei s,j
1 s 16 broffset bltzal s,p
1 s 17 broffset bgezal s,p
1 s 18 broffset bltzall s,p
1 s 19 broffset bgezall s,p
1 b 31 o synci o(b) R2
2 target j target
3 target jal target
4 s t broffset beq s,t,p

5 s t broffset bne s,t,p
6 s 0 broffset blez s,p
7 s 0 broffset bgtz s,p
8 s d (signed) const addi d,s,const
9 s d (signed) const addiu d,s,const
10 s d (signed) const slti d,s,const
11 s d (signed) const sltiu d,s,const
12 s d (unsigned) const andi d,s,const
13 s d (unsigned) const ori d,s,const
14 s d (unsigned) const xori d,s,const
210
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
15 0 d (unsigned) const lui d,s,const
16 0 t cs 0 0 mfc0 t,cs
16 1 t cs 0 0 dmfc0 t,cs MIP64
16 2 t cs 0 0 cfc0 t,cs MIP64
16 4 t cd 0 0 mtc0 t,cd
16 5 t cd 0 0 dmtc0 t,cs MIP64
16 10 xt d 0 0 rdpgpr d,xt R2
16 11 t 12 0 0 di t R2
16 11 t 12 0 32 ei t R2
16 14 t xd 0 0 wrpgpr xd,t R2
16 16 0 0 0 1 tlbr
16 16 0 0 0 2 tlbwi
16 16 0 0 0 6 tlbwr
16 16 0 0 0 8 tlbp
16 16 0 0 0 16 rfe MIPS I
16 16 0 0 0 24 eret
16 16 0 0 0 31 dret MIPS II
16 16 0 0 0 32 deret EJTAG
16 16 0 0 0 33 standby Vr4100
16 16 0 0 0 34 suspend Vr4100
16 8 0 broffset bc0f p MIPS32/64

16 8 1 broffset bc0t p MIPS32/64
16 8 2 broffset bc0fl p MIPS32/64
16 8 3 broffset bc0tl p MIPS32/64
17 0 t fs 0 0 mfc1 t,fs
17 1 t fs 0 0 dmfc1 t,fs MIPS64
17 2 t cs 0 0 cfc1 t,cs
17 3 t fs 0 0 mfhc1 t,fs R2
211
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
17 4 t cs 0 0 mtc1 t,fs
17 5 t cs 0 0 dmtc1 t,fs MIPS64
17 6 t cs 0 0 ctc1 t,fs
17 7 t fs 0 0 mthc1 t,fs R2
17 8 N 0 broffset bc1f N,p

17 8 N 1 broffset bc1t N,p
17 8 N 2 broffset bc1fl N,p
17 8 N 3 broffset bc1tl N,p
17 9 N 0 broffset bc1any2f N,p 3D
17 9 N 1 broffset bc1any2t N,p 3D
17 9 N 2 broffset bc1any4f N,p 3D
17 9 N 3 broffset bc1any4t N,p 3D
17 16 ft fs fd 0 add.s fd,fs,ft
17 17 ft fs fd 0 add.d fd,fs,ft
17 22 ft fs fd 0 add.ps fd,fs,ft PS
17 16 ft fs fd 1 sub.s fd,fs,ft
17 17 ft fs fd 1 sub.d fd,fs,ft
17 22 ft fs fd 1 sub.ps fd,fs,ft PS
17 16 ft fs fd 2 mul.s fd,fs,ft
17 17 ft fs fd 2 mul.d fd,fs,ft
17 22 ft fs fd 2 mul.ps fd,fs,ft PS
17 16 ft fs fd 3 div.s fd,fs,ft
17 17 ft fs fd 3 div.d fd,fs,ft
17 16 0 fs fd 4 sqrt.s fd,fs
17 17 0 fs fd 4 sqrt.d fd,fs
17 16 0 fs fd 5 abs.s fd,fs
17 17 0 fs fd 5 abs.d fd,fs
17 22 0 fs fd 5 abs.ps fd,fs PS
17 16 0 fs fd 6 mov.s fd,fs
17 17 0 fs fd 6 mov.d fd,fs
17 22 0 fs fd 6 mov.ps fd,fs PS
17 16 0 fs fd 7 neg.s fd,fs
212
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
17 17 0 fs fd 7 neg.d fd,fs
17 22 0 fs fd 7 neg.ps fd,fs PS
17 16 0 fs fd 8 round.l.s fd,fs MIPS64
17 17 0 fs fd 8 round.l.d fd,fs MIPS64
17 16 0 fs fd 9 trunc.l.s fd,fs MIPS64
17 17 0 fs fd 9 trunc.l.d fd,fs MIPS64
17 16 0 fs fd 10 ceil.l.s fd,fs MIPS64
17 17 0 fs fd 10 ceil.l.d fd,fs MIPS64
17 16 0 fs fd 11 floor.l.s fd,fs MIPS64

17 17 0 fs fd 11 floor.l.d fd,fs MIPS64
17 16 0 fs fd 12 round.w.s fd,fs
17 17 0 fs fd 12 round.w.d fd,fs
17 16 0 fs fd 13 trunc.w.s fd,fs
17 17 0 fs fd 13 trunc.w.d fd,fs
17 16 0 fs fd 14 ceil.w.s fd,fs
17 17 0 fs fd 14 ceil.w.d fd,fs
17 16 0 fs fd 15 floor.w.s fd,fs
17 17 0 fs fd 15 floor.w.d fd,fs
17 16 N 0 fs fd 17 movf.s fd,fs,N
17 17 N 0 fs fd 17 movf.d fd,fs,N
17 22 N 0 fs fd 17 movf.ps fd,fs,N PS
17 16 N 1 fs fd 17 movt.s fd,fs,N
17 17 N 1 fs fd 17 movt.d fd,fs,N
17 16 t fs fd 18 movz.s fd,fs,t
17 17 t fs fd 18 movz.d fd,fs,t
17 22 t fs fd 18 movz.ps fd,fs,t PS
17 16 t fs fd 19 movn.s fd,fs,t
17 17 t fs fd 19 movn.d fd,fs,t
17 22 t fs fd 19 movn.ps fd,fs,t PS
17 16 0 fs fd 21 recip.s fd,fs
17 17 0 fs fd 21 recip.d fd,fs
213
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
17 16 0 fs fd 22 rsqrt.s fd,fs
17 17 0 fs fd 22 rsqrt.d fd,fs
17 22 0 fs fd 24 addr.ps fd,fs 3D
17 22 0 fs fd 26 mulr.ps fd,fs 3D
17 17 0 fs fd 28 recip2.d fd,fs 3D
17 22 0 fs fd 28 recip2.ps fd,fs 3D
17 17 0 fs fd 29 recip1.d fd,fs 3D
17 22 0 fs fd 29 recip1.ps fd,fs 3D
17 17 0 fs fd 30 rsqrt1.d fd,fs 3D
17 22 0 fs fd 30 rsqrt1.ps fd,fs 3D
17 17 0 fs fd 31 rsqrt2.d fd,fs 3D
17 22 0 fs fd 31 rsqrt2.ps fd,fs 3D
17 17 0 fs fd 32 cvt.s.d fd,fs
17 20 0 fs fd 32 cvt.s.w fd,fs
17 21 0 fs fd 32 cvt.s.l fd,fs MIPS64
17 22 0 fs fd 32 cvt.s.pu fd,fs PS
17 16 0 fs fd 33 cvt.d.s fd,fs
17 20 0 fs fd 33 cvt.d.w fd,fs
17 21 0 fs fd 33 cvt.d.l fd,fs MIPS64
17 16 0 fs fd 36 cvt.w.s fd,fs
17 17 0 fs fd 36 cvt.w.d fd,fs
17 22 0 fs fd 36 cvt.pw.ps fd,fs 3D
17 16 0 fs fd 37 cvt.l.s fd,fs MIPS64
17 17 0 fs fd 37 cvt.l.d fd,fs MIPS64
17 16 0 fs fd 38 cvt.ps.s fd,fs PS
17 20 0 fs fd 38 cvt.ps.pw fd,fs 3D
17 21 0 fs fd 38 cvt.ps.pw.l fd,fs PS
17 22 0 fs fd 40 cvt.s.pl fd,fs PS
17 22 0 fs fd 44 pll.ps.ps fd,fs PS
17 22 0 fs fd 45 plu.ps.ps fd,fs PS
17 22 0 fs fd 46 pul.ps.ps fd,fs PS
17 22 0 fs fd 47 puu.ps.ps fd,fs PS
214
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
17 16 ft fs M 0 48 c.f.s M,fs,ft
17 17 ft fs M 0 48 c.f.d M,fs,ft
17 22 ft fs M 0 48 c.f.ps M,fs,ft PS
17 16 ft fs M 0 49 c.un.s M,fs,ft
17 17 ft fs M 0 49 c.un.d M,fs,ft
17 22 ft fs M 0 49 c.un.ps M,fs,ft PS
17 16 ft fs M 0 50 c.eq.s M,fs,ft
17 17 ft fs M 0 50 c.eq.d M,fs,ft
17 22 ft fs M 0 50 c.eq.ps M,fs,ft PS
17 16 ft fs M 0 51 c.ueq.s M,fs,ft
17 17 ft fs M 0 51 c.ueq.d M,fs,ft
17 22 ft fs M 0 51 c.ueq.ps M,fs,ft PS
17 16 ft fs M 0 52 c.olt.s M,fs,ft
17 17 ft fs M 0 52 c.olt.d M,fs,ft
17 22 ft fs M 0 52 c.olt.ps M,fs,ft PS
17 16 ft fs M 0 53 c.ult.s M,fs,ft
17 17 ft fs M 0 53 c.ult.d M,fs,ft
17 22 ft fs M 0 53 c.ult.ps M,fs,ft PS
17 16 ft fs M 0 54 c.ole.s M,fs,ft
17 17 ft fs M 0 54 c.ole.d M,fs,ft
17 22 ft fs M 0 54 c.ole.ps M,fs,ft PS
17 16 ft fs M 0 55 c.ule.s M,fs,ft
17 17 ft fs M 0 55 c.ule.d M,fs,ft
17 22 ft fs M 0 55 c.ule.ps M,fs,ft PS
17 16 ft fs M 0 56 c.sf.s M,fs,ft
17 17 ft fs M 0 56 c.sf.d M,fs,ft
17 22 ft fs M 0 56 c.sf.ps M,fs,ft PS
17 16 ft fs M 0 57 c.ngle.s M,fs,ft PS
17 17 ft fs M 0 57 c.ngle.d M,fs,ft PS
17 22 ft fs M 0 57 c.ngle.ps M,fs,ft PS
17 16 ft fs M 0 58 c.seq.s M,fs,ft
17 17 ft fs M 0 58 c.seq.d M,fs,ft
17 22 ft fs M 0 58 c.seq.ps M,fs,ft PS
215
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
17 16 ft fs M 0 59 c.ngl.s M,fs,ft
17 17 ft fs M 0 59 c.ngl.d M,fs,ft
17 22 ft fs M 0 59 c.ngl.ps M,fs,ft PS
17 16 ft fs M 0 60 c.lt.s M,fs,ft
17 17 ft fs M 0 60 c.lt.d M,fs,ft
17 22 ft fs M 0 60 c.lt.ps M,fs,ft PS
17 16 ft fs M 0 61 c.nge.s M,fs,ft
17 17 ft fs M 0 61 c.nge.d M,fs,ft
17 22 ft fs M 0 61 c.nge.ps M,fs,ft PS
17 16 ft fs M 0 62 c.le.s M,fs,ft
17 17 ft fs M 0 62 c.le.d M,fs,ft
17 22 ft fs M 0 62 c.le.ps M,fs,ft PS
17 16 ft fs M 0 63 c.ngt.s M,fs,ft
17 17 ft fs M 0 63 c.ngt.d M,fs,ft
17 22 ft fs M 0 63 c.ngt.ps M,fs,ft PS
17 16 ft fs M 1 48 cabs.f.s M,fs,ft 3D
17 17 ft fs M 1 48 cabs.f.d M,fs,ft 3D
17 22 ft fs M 1 48 cabs.f.ps M,fs,ft 3D
17 16 ft fs M 1 49 cabs.un.s M,fs,ft 3D
17 17 ft fs M 1 49 cabs.un.d M,fs,ft 3D
17 22 ft fs M 1 49 cabs.un.ps M,fs,ft 3D
17 16 ft fs M 1 50 cabs.eq.s M,fs,ft 3D
17 17 ft fs M 1 50 cabs.eq.d M,fs,ft 3D
17 22 ft fs M 1 50 cabs.eq.ps M,fs,ft 3D
17 16 ft fs M 1 51 cabs.ueq.s M,fs,ft 3D
17 17 ft fs M 1 51 cabs.ueq.d M,fs,ft 3D
17 22 ft fs M 1 51 cabs.ueq.ps M,fs,ft 3D
17 16 ft fs M 1 52 cabs.olt.s M,fs,ft 3D
17 17 ft fs M 1 52 cabs.olt.d M,fs,ft 3D
17 22 ft fs M 1 52 cabs.olt.ps M,fs,ft 3D
17 16 ft fs M 1 53 cabs.ult.s M,fs,ft 3D
17 17 ft fs M 1 53 cabs.ult.d M,fs,ft 3D
17 22 ft fs M 1 53 cabs.ult.ps M,fs,ft 3D
17 16 ft fs M 1 54 cabs.ole.s M,fs,ft 3D
216
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
17 17 ft fs M 1 54 cabs.ole.d M,fs,ft 3D
17 22 ft fs M 1 54 cabs.ole.ps M,fs,ft 3D
17 16 ft fs M 1 55 cabs.ule.s M,fs,ft 3D
17 17 ft fs M 1 55 cabs.ule.d M,fs,ft 3D
17 22 ft fs M 1 55 cabs.ule.ps M,fs,ft 3D
17 16 ft fs M 1 56 cabs.sf.s M,fs,ft 3D
17 17 ft fs M 1 56 cabs.sf.d M,fs,ft 3D
17 22 ft fs M 1 56 cabs.sf.ps M,fs,ft 3D
17 22 ft fs M 1 57 cabs.ngle.ps M,fs,ft 3D
17 16 ft fs M 1 58 cabs.seq.s M,fs,ft 3D
17 17 ft fs M 1 58 cabs.seq.d M,fs,ft 3D
17 22 ft fs M 1 58 cabs.seq.ps M,fs,ft 3D
17 16 ft fs M 1 59 cabs.ngl.s M,fs,ft 3D
17 17 ft fs M 1 59 cabs.ngl.d M,fs,ft 3D
17 22 ft fs M 1 59 cabs.ngl.ps M,fs,ft 3D
17 16 ft fs M 1 60 cabs.lt.s M,fs,ft 3D
17 17 ft fs M 1 60 cabs.lt.d M,fs,ft 3D
17 22 ft fs M 1 60 cabs.lt.ps M,fs,ft 3D
17 16 ft fs M 1 61 cabs.nge.s M,fs,ft 3D
17 17 ft fs M 1 61 cabs.nge.d M,fs,ft 3D
17 22 ft fs M 1 61 cabs.nge.ps M,fs,ft 3D
17 16 ft fs M 1 62 cabs.le.s M,fs,ft 3D
17 17 ft fs M 1 62 cabs.le.d M,fs,ft 3D
17 22 ft fs M 1 62 cabs.le.ps M,fs,ft 3D
17 16 ft fs M 1 63 cabs.ngt.s M,fs,ft 3D
17 17 ft fs M 1 63 cabs.ngt.d M,fs,ft 3D
17 22 ft fs M 1 63 cabs.ngt.ps M,fs,ft 3D
18 0 t cs 0 0 mfc2 t,cs
18 1 t cs 0 0 dmfc2 t,cs MIPS64
18 2 t cs 0 0 cfc2 t,cs
18 3 t cs 0 0 mfhc2 t,cs R2
18 4 t cs 0 0 mtc2 t,cs
18 5 t cs 0 0 dmtc2 t,cs MIPS64
217
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
18 6 t cs 0 0 ctc2 t,cs
18 7 t cs 0 0 mthc2 t,cs R2
18 8 0 broffset bc2f p
18 8 1 broffset bc2t p
18 8 2 broffset bc2fl p
18 8 3 broffset bc2tl p
19 b t 0 fd 0 lwxc1 fd,t(b)
19 b t 0 fd 1 ldxc1 fd,t(b)
19 b t fs 0 8 swxc1 fd,t(b)
19 b t fs 0 9 sdxc1 fd,t(b)
19 b t hint 0 15 prefx hint,t(b) MIPS64 or R2
19 s ft fs fd 30 alnv.ps fd,fs,ft,s MIPS64 or R2
19 fr ft fs fd 32 madd.s fd,fr,fs,ft
19 fr ft fs fd 33 madd.d fd,fr,fs,ft
19 fr ft fs fd 38 madd.ps fd,fr,fs,ft PS
19 fr ft fs fd 40 msub.s fd,fr,fs,ft
19 fr ft fs fd 41 msub.d fd,fr,fs,ft
19 fr ft fs fd 46 msub.ps fd,fr,fs,ft PS
19 fr ft fs fd 48 nmadd.s fd,fr,fs,ft
19 fr ft fs fd 49 nmadd.d fd,fr,fs,ft
19 fr ft fs fd 54 nmadd.ps fd,fr,fs,ft PS
19 fr ft fs fd 56 nmsub.s fd,fr,fs,ft
19 fr ft fs fd 57 nmsub.d fd,fr,fs,ft
19 fr ft fs fd 62 nmsub.ps fd,fr,fs,ft PS
20 s t broffset beql s,t,p

21 s t broffset bnel s,t,p
22 s 0 broffset blezl s,p
23 s 0 broffset bgtzl s,p
24 s d (signed) const daddi d,s,const MIPS64

25 s d (signed) const daddiu d,s,const MIPS64
26 b t offset ldl t,o(b) MIPS64
218
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
27 b t offset ldr t,o(b) MIPS64
28 s t 0 0 0 madd s,t
28 s t d 0 0 madd d,s,t R3900
28 s t 0 0 1 maddu s,t
28 s t d 0 2 mul d,s,t
28 s t 0 0 4 msub s,t
28 s t 0 0 5 msubu s,t
28 s s d 0 32 clz d,s
28 s s d 0 33 clo d,s
28 s s d 0 36 dclz d,s
28 s s d 0 37 dclo d,s
28 code 32 sdbbp code EJTAG
29 target jalx target MIPS16e

31 s t sz pos 0 ext t,s,pos,sz R2
31 s t sz pos 1 dextm t,s,pos,sz MIP64R2
31 s t sz pos 2 dextu t,s,pos,sz MIP64R2
31 s t sz pos 3 dext t,s,pos,sz MIP64R2
31 s t sz pos 4 ins t,s,pos,sz R2
31 s t sz pos 5 dinsm t,s,pos,sz MIP64R2
31 s t sz pos 6 dinsu t,s,pos,sz MIP64R2
31 s t sz pos 7 dins t,s,pos,sz MIP64R2
31 0 t d 2 32 wsbh d,t R2
31 0 t d 16 32 seb d,t R2
31 0 t d 24 32 seh d,t R2
31 0 t d 2 36 dsbh d,t MIPS64R2
31 0 t d 5 36 dshd d,t MIPS64R2
31 0 t hwr 0 59 rdhwr t,hwr R2
32 b t offset lb t,o(b)
219
8.6. -?è 1 8 Ù MIPS -8ë
L 8.6: Y
31-26 25-21 20-18 17-16 15-11 10-8 7-6 5-0 ®?¶ ¤á ISA
33 b t offset lh t,o(b)
34 b t offset lwl t,o(b)
35 b t offset lw t,o(b)
36 b t offset lbu t,o(b)
37 b t offset lhu t,o(b)
38 b t offset lwr t,o(b)
39 b t offset lwu t,o(b) MIPS64
40 b t offset sb t,o(b)
41 b t offset sh t,o(b)
42 b t offset swl t,o(b)
43 b t offset sw t,o(b)
44 b t offset sdl t,o(b) MIPS64
45 b t offset sdr t,o(b) MIPS64
46 b t offset swr t,o(b)
47 b op offset cache op,o(b)

48 b t offset ll t,o(b)
49 b ft offset l.s t,o(b)
50 b cd offset lwc2 cd,o(b)
51 b hint offset pref hint,o(b)
52 b t offset lld t,o(b) MIPS64
53 b ft offset l.d ft,o(b)
54 b cd offset ldc2 cd,o(b)
55 b t offset ld t,o(b) MIPS64
56 b t offset sc t,o(b)
57 b ft offset s.s ft,o(b)
57 b ft offset swc1 ft,o(b)
58 b cs offset swc2 cs,o(b)
60 b t offset scd t,o(b) MIPS64
61 b ft offset s.d ft,o(b)
61 b ft offset sdc1 ft,o(b)
62 b cs offset sdc2 cs,o(b)
63 b t offset sd t,o(b) MIPS64
220
8.7. -UõU©a 1 8 Ù MIPS -8ë
8.6.2 -?èLA:5º
• -O¶µõê¹e§·éÓ-3ÏPÎ§´ó
¬k~ " nop Ú l.s ù-´XdÊH§±u)?5'
Ñ {ü"
• ?nì-µQ²½ÂLý3Ø^-Ø "?n
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8.6.3 ?èÚ{ü¢y
XJ\we-?è§k±wÑ CPU ŃO"¦+k«
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• Mìo´ uÓ §¤± CPU ±lêMì³Ñü
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Mì³O5Ò´ 3z¨±ÏþJøü öê§vk
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• ö No-op
• Mì/MìDÑµ^é2§XJØþ :{¶)^Dx3S
• ~ê\1µêÚ/.á=ê
• â/Ü6-
• ê¦{!Ø{Ú¦{ê
• ê¦\
• \1Ú;
• a=!f§SN^Ú©|
• ä:Úg
221
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• CP0 õUµCPU -
• 2:
• ^reé“/e”A5É¯µrdhwr Ú synci
8.7.1 ö
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nop: MIPS
?Û¯"~^´ sll zero, zero, 0§Ù??èTÐ"
i"
ssnop: , ö§Ù?èÒ´ sll zero, zero, 1"
ù-ØÙ§-Óux§ùÒy Ù$1s¤
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8.7.2 Mì/MìDx
Ï~^ $zero Mì or 5¢y" O CPU ——du,«
move:
Ïé\{|±'éÜ6$Ð——^ addu"
^Dx
éu~©|kÔ-£ë1 8.5.3¤"
movf, movt: ÏLÿÁ2:^è3êMì?1^Dx"
movn, movz: â,MìGéêMì?1^Dx"
8.7.3 ~ê\1
! ^5\1§S¥, IÒ ½Cþ/÷-"^
dla la:
64 £k3. Unix aXÚ¥â¬^¤\ dla Ò "
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dli!li: C\á=ê~ê"dli ´ 64 §¿Ø´¤kóäóÑ|±§
3\1±u 32 CØeÃÎÒêÿâI"ù´÷-§
âäN~êÐm¤A^-"
lui: rá=ê\1Mìp "16 ~ê\1Mì1 16–31 §
32–63 £XJk{¤1 31 Ó§$ 0–15 ""T-´\1
?¿ 32 ~êéÅì-¥"®?§S U[Ø¬ù
-¶ d li (load immediate) Ú la (load address) a÷-¦^§Ì
´û¢y«k^Ïª"
222
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8.7.4 â/Ü6$
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add!addi!dadd!daddi: addu -é)/ª§(JÄÑ¬
g"Uéu COBOL ?Èìk^"
addu!addiu!daddu!daddiu: ©Oû 32 Ú 64 \{"3ùp±
9-8¥§64 -mÞ^“d”£L« doubleword¤L«¶k\
ÃI½“á=”ÏPÎ——®?ì~êÒ1 "XJ\~ê^
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dsub!sub: ÄÑg~{CN"
dsubu!subu: ~5 64- Ú 32- ~{£vk~á=ê-§,´
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drol!dror!rol!ror: Ìm£½£¶Ðm¤o^-S"
dsll!dsll32!dsllv: 64 £Vi¤£§$ Ö""nØÓ-Jøn«
½£ þØÓªµ~ê 0–31 §~ê 32–63 §½ö^,Mì$ 6
SN"®?§S dsll ÏPÎÒ1 "
dsra!dsra32!dsrav: 64 £Vi¤âm£"¡“â”´r 63
——ÎÒ ——Ep "@Ò´`ûkÎÒ 64 ê(¢y
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dsrl!dsrl32!dsrlv: 64 £Vi¤Ü6m£"ù¡“Ü6”´Ïr 0
W¿p ",knØÓ-§®?§S [Aæ^ dsrl ùÏP
Î¶®?ì¬â½£ þÀJ-ª"
223
8.7. -UõU©a 1 8 Ù MIPS -8ë
! £"\ sll ÏPÎÒ1 "
sll sllv: 32
sra!srav: âm££^ÎÒ Öàp ¤" sra Ò1 "
srl, srlv: Ü6m££p ^ 0 Öà¤" srl Ò1 "
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slt!slti!sltiu!sltu: M-§XJ^÷vÒ 1 §ÄK 0"
slt ½ö sltu"
seq!sge!sgeu!sgt!sgtu!sle!sleu!sne: â\E,^8
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8.7.5 ê¦{!Ø{Ú¦{ê
ê¦ØÅì-ØÓuÊÏ-§Ï MIPS ¦{ì´Õá
ü§vk8¤?~6Y¥§1å5'~ê-s¤õ
m"k Åì-5éÄ¦{½öØ{§, ¦Ø$ÒÚ U-¿1
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ì hi Ú lo ¥"\U^üÂÏ- mfhi Ú mflo 5¯ù "=¦3
@Ï MIPS CPU ¥§(JMì´p£µXJ\Áã3(JÑ5c
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MIPS úi®?ì¬r¦±~ê½Ø± 2 ~êgO=¤
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k óä)ºAÏÏPÎ§mult L«¦{§divd L«Ø{Åì-", §½ zero
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224
8.7. -UõU©a 1 8 Ù MIPS -8ë
! ! ! êØ{nöê÷-§k 64-/32- Ú
ddiv ddivu div divu:
kÎÒ/ÃÎÒÀ"3Ø±"ÿÑ¬g¶kÎÒ-ÄÑ¬g"
^ zero 8IMìÒéÄØ{Åì-"
ddivd!ddivdu!divd!divdu: k, óäóJø©Åì-ÏP
Î"Ð^ ddiv zero, ..."
divo!divou: ÄÑuØ{¶i§¢SþÚ¤ div!divu ´
"
dmul!mul: nöê 64-/32- ¦{-"vkÄÑu¶Ï ØIT
÷-ÃÎÒ——ä(JéukÎÒÚÃÎÒ)ºÑ´"®
?ìXJ3 MIPS32 c¢yù - CPU 3®?{§ò¬Ð
m¤d÷"
mulo!mulou!dmulo!dmulou: ¦{÷-§XJ(JÑÏ^M
ìU NBÒ¬g"
dmult!dmultu!mult!multu: m©¦{Åì-§kÎÒÚÃÎÒ
±9 32 Ú 64 CN"(Jl5Ø¬ÄÑ§Ï©Ok 64 Ú 128 (
J"(J$k 3 lo ¥§pk Ü©3 hi ¥"
drem!dremu!rem!remu: {êö§ÏL3Ø{ ^ mfhi ¢y"
{ê3 hi Mì¥"
mfhi!mflo!mthi!mtlo: l hi MìDÑêâ"ù ´¯ê¦
Øü(JMì hi Ú lo -"XJ\j±¦^gCJ(JÜ¤-
mul Ú div§@o~è¥\ØI mflo/mfhi -"
MIPS ê¦{§mult ½ multu§o´)¤Ï^MìV°Ý(J§
Ø ÄÑU5"(J¥uMì°Ýp Ú$ Ü©©O3 hi Ú
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k MIPS CPU k«/ªê¦\\-——-vk^áu MIPS
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dmadd16!madd16: NEC Vr4100 Ak-§ù CNÏLÉ 16
öê¼ Ý§3 C ?Èì¥¦^"dmadd16 3 64 lo M
ì¥\\ 64 (J"
mad!madu: Toshiba R3900!IDT R4640/4650 Ú QED CPU ¥
ù -§§Éü 32 öê§r\\ 64 (J3 lo
225
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Ú hi Mì¥"Toshiba R3900 #Nnöê mad d,s,t§Ù¥\\
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8.7.7 \1Ú;
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{±¶ù:» MIPS -¥8IMì3k5K"
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!>.§Viéàli!>.¤"´®?ì|±@\1Ué
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lb!lbu: \1i!, ©OÎÒ*Ð½ö"*ÐMì"
ld: \1Vi£64 ¤"ù^Åì-3 64 CPU þâk§´é 32
8I®?ì~~^l;ì\1 64 üêMì÷
-5¢y"ùV´v Ì¿§´k<Ò´,«oN5"
ldl!ldr!lwl!lwr!sdl!sdr!swl!swr: /m!\1/;!i/Vi
"¤é¦^± ulw ¢yéà\1/;ö§,\o±
gC5¢yéà\1/;£ë1 8.5.1 !¤"
226
8.7. -UõU©a 1 8 Ù MIPS -8ë
\1i£16 ¤§, ©OÎÒ*Ð½"*ÐMì"
lh, lhu:
ll!lld!sc!scd: ë£\1Ú^;£32 Ú 64 ¤¶û&Òþ
Û%-£ë1 8.5.2 !¤"
lw!lwu: \1i£32 ¤§, ©OÎÒ*Ð½"*ÐMì"lwu
3 64 CPU þâk"
pref!prefx: ýêâp £1 8.5.8 !¤"ù^-3 MIPS III
Ú@ CPU þvk§Uö"¦+ pref ^´Ï~Ïª§´
prefx \þ 3ü-¥¢yMì+MìÏª"
sb: ;i!£8 ¤"
sd: ;Vi£64 ¤"3 32 CPU þU´÷£rüê
Mì; 64 S/¤"
sh: ;i£16 ¤"
sw: ;i£32 ¤"
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ÚiæÂÏm\1÷-¢y¶iöî!!£
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m\1¶6YO4§UlÞ"1 2.5.2 !ééà\19Ù¦
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Ú s.d \1ü 32 S¬ FP Mì½ö;ü
FP Mìü 32 S¬£1 7.5 !¤÷-"ù -
ldc1!lwc1!sdc1!swc1(load/store word/double ?nì 1)§Øù
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ldsc1!lwxc1!sdxc1!swxc1: æ^ÄMì+ £þ Ïª\
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8.7.8 a=!f§SN^Ú©|
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§£/£T-/\þ 8¤Mì ra§= $31 O¶" 6
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bal: é PC ¼êN^"
bc0f!bc0f1!bc0t!bc0t1!bc2f!bc2fl!bc2t!bc2t1: â?nì 0
Ú?nì 2 ^ ?1©|§ùü^ 3õêy CPU þÑØ
3"3Pª CPU þ§ù -ÿÁÑ\Ú &Ò"
bc1f!bc1f1!bc1t!bc1t1: â2:^ £ 5 CPU kõ2:^
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beq!beq1!beqz!beqz1!bge!bge1!bgeu!bgeul!bgez!bgez1!bgt!
bgt1!bgtu!bgtu1!ngtz!bgtz1!ble!ble1!bleu!bleul!blez! blez1!
blt! blt1! bltu!bltu1!bltz!tltzl!bne! bnel! bnez! bnez1: ÜVö
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bgezal!bgezall!bltzal!bltzall: ^¼êN^©Åì-§XJk
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8.7.9 ä:Úg
break: “ä:”a.É~"dNÁì3®?ìÜ¤èÚug
¥^"
sdbbp: Úu1 12.1 !ùã EJTAG É~ä:-"
¢Sþ jalr -#N\½Ø´ $31 Mì£/§éù^"XJ\Ø
6
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228
8.7. -UõU©a 1 8 Ù MIPS -8ë
ÚuDÚþûXÚN^É~a."
syscall:
teq!teqi!tge!tgei!tgeiu!tgeu!tlt!tlti!tltiu!tltu!tne!tnei: ^
É~§â«ü!Vöê^"ù´?ÈìÚ)ºì^§¢
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8.7.10 CP0 õUµCPU -
CP0 õU±©¤±eA«a.µ
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230
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·´÷^31 8 Ù@~fµC ó¥¼ê strcmp(1)
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strcmp(char* a0, char* a1)
{
char t0, t1;
while(1) {
t0 = a0[0];
a0 += 1;
t1 = a1[0];
a1 += 1;
if (t0 == 0)
break;
if (t0 != t1)
break;
}
return (t0 - t1);
}
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int strcmp (char *a0, char *a1) {
char t0, t1, t2;
/* first load moved to loop end,

so load for first iteration here */
t0 = a0[0];
while (1) {
/* first byte */
t1 = a1[0];
if (t0 == 0)
break;
a0 += 2;
if (t0 != t1)
break;
/* second byte */
t2 = a0[-1]; /* we already incremented a0 */
t1 = a1[1]; /* didn’t increment a1 yet */
if (t2 == 0)
/* label t21 in assembler */
return t2 - t1;
¶
a1 += 2
if (t1 != t2)
return t0 = a0[0];
t0 = a0[0];
}
return t0 - t1;
}
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#include <mips/asm.h>
#include <mips/regdef.h>
LEAF(strcmp)
233
9.1. {ü~f 1 9 Ù Ö MIPS ®?óè
.set noreorder
lbu t0, 0(a0)
1: lbu t1, 0(a1)
beq t0, zero, .t01 # load delay slot
addu a0, a0, 2 # branch delay slot
bne t0, t1, .t01
lbu t2, -1(a0) # branch delay slot
lbu t1, 1(a1) # load delay slot
beq t2, zero, .t21
addu a1, a1, 2 # branch delay slot
beq t2, t1, 1b
lbu t0, 0(a0) # branch delay slot
.t21: j ra
subu v0, t2, t1 # branch delay slot
.t01: j ra
subu v0, t0, t1 # branch delay slot
.set reorder
END(strcmp)
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#define LEAF(name) \
.text; \
.globl name; \
.ent name; \
name:
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ä/f0 ——ë1 11.2.9 !¤"f£nonleaf¤¼ê7Lõ
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½^ C óù«¼êk¿Â§½N2d C óN^µCýI
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- .text w®?ì§Ø,k`²§Ard )è?
8I©¥¶/.text0«¥¶l C ó?È)¤8I©^Ó
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- .ent é)¤èvkK§´w®?ìòù:I/name0
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END q½Â ü®?"
#define END(name) \
.size name, .-name; \
.end name
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• .set ®?«µ
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eg-éA .set reorder cÊ#üS"
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235
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• -µ\U5¿ -^S¬Ñý§Ï .set noreorder ù
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t0 ——XJu)©|§©|8I?è^ t0 ¥"
9.2 {V
L Hc¡~f4\w õê®?-3¢S¥Ń¦
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• rïÆ\¦^L 2.1 ¥Ñ MIPS MìS.·¶¶d§\
è7L²L C ý?nì?1ý?n§ è¥^ #include ¹
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d = s + t
¤ addu d, s, t"
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neg Ú not ü8$Îo´^½õnMì-5Ü¤"®
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§ not d ®?¤ nor d,zero,d"
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addu $2, $4, 64 ⇒ addiu $2, $4, 64
237
9.4. Ïª 1 9 Ù Ö MIPS ®?óè
XJá=êÃ{?Åì- 16 öê§@o®?ìò2
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addu $4, $4, at
5¿ li £\1á=ê¤-§3Åì-8péØ¶li ´é~^
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XJ 32 u ±32 KB S§®?ì¬^^ addiu Ú $0 \¶
p 16–32 Ñ"ÿ§±^ ori¶$ 0–15 "ÿ§Ò¬^
lui¶ù ÑØ´ÿ§¬ÀJé lui/oriµ
li $3, -5 ⇒ addiu $3, $0, -5
li $4, 0x8000 ⇒ ori $4, $0, 0x8000
li $5, 0x120000 ⇒ lui $5, $0, 0x12
li $6, 0x12345 ⇒ lui $6, 0x1
ori $6, $6, 0x2345
XJ\3¦^ .set noreorder «5©|ò´ø+n§@o*Ð¤

õ^Åì-®?-¬k¯K"XJ3ò´ø¥^ õ^-
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9.3.3 'u 32/64 -
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daddu 5¤ 64 °Ýâ$"-ÏPÎc¡“d”Ï~´“double”
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9.4 Ïª
c¡JL§M|±«ÏªµMìÄ/+á=ê £þ£
base reg+offset ¤§ £þ offset 7L3 -32768 +32767 m"´®?ìU
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238
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ª
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- Ðm
lw $2, ($3) ⇒ lw $2, 0($3)
lw $2, 8+4($3) ⇒ lw $2, 12($3)
lw $2, addr ⇒ lui at, %hi(addr)
lw $2, %lo(addr)(at)
sw $2, addr($3) ⇒ lui at, %hi(addr)
addu at, at, $3
sw $2, %lo(addr)(at)
þ~¥ addr ÎÒ±´±e?Û«µ

• ½ ÎÒ——IÒ½öCþ¶i£¬SÜ½öO?¤
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¤±XJ addr Ð1 15 1 ,@o %lo(addr) ÒK§·I
O\ %hi(addr) ±Öµ
addr %hi(addr) %lo(addr)
0x1234 5678 0x1234 0x5678
0x1000 8000 0x1001 0x8000
la (load address) ÷-é/ÑÖ§aqu li ê~þJøÑÖµ

la $2, 4($3) ⇒ addiu $2, $3, 4
la $2, addr ⇒ liu at, %hi(addr)

addiu $2, at, %lo(addr)
239
la $2, addr($3) ⇒ liu at, %hi(addr)
addiu $2, at, %lo(addr)
addu $2, $2, $3
Kþ§la ±;¦^ ori -3wþK %lo() þ

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9.4.1 éu GP Ï
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´§¯?È?5;ì/ s¤ü^-§~X:
lw $2, addr ⇒ lui at, %hi(addr)
⇒ lw $2, %lo(addr)(at)
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gp Mì§ùÄ3?Û load/store -1c¤" ¤ù CþÓ^
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.comm smallobj, 4
.comm bigobj, 100
• ÜCþÓI²((²µ
240
9.5. 8I©9Ù3;ìN¥ÙÛ 1 9 Ù Ö MIPS ®?óè
extern smallext, 4
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extern int extarray[NARRAY];
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msg:.asciiz "Hello world!\\n"
.data
table:
241
ã 9.1: ROM z8IèãÚ;.;ìÙÛ

.word 1
.word 2
.word 3
.text
func:sub sp, 64
...
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ù êâò¬v NBêâm"XJ,¬3Ð©zêâ«
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.comm dbgflag, 4 # global common variable, 4 bytes
.lcomm dbgflag, 4 # local common variable, 8 bytes
.lcomm array, 100 # local common variable, 100 bytes
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.text
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nonleaf:
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.mask 0x80000000, -8
.fmask 0x00000000, 0
.set noreorder
.set nomacro
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move $2, $4
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j $31
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.end noleaf
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343
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376
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MIPS âL
p 5(cache coherency): p o´°(Ñ\§S½
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p |(cache set): |ép ¬"
381
MIPS âL
p [ì(cache simulator): ûp ¿Û^óä"
p I\(cache tag): p 1¥;^5£OTêâ3Ì
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p ö(cacheop): MIPS NX(Jø õ^å cache
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N^ö(caller): 3g¼êN^¥§ÑyN^-±9N^(å
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382
MIPS âL
pÖé¡7ázÔN(CMOS): ^5E¤k¢S MIPS CPU
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383
MIPS âL
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MIPS âL
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385
MIPS âL
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EI\(duplicate tags): cache, duplicate tags "
Vi(dword): MIPS ®?ó 64 êêâ¶¡§ double-
word"
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386
MIPS âL
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396
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noat, nomacro, noreorder: ®?ó·-§Jø§S «
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400
MIPS âL
ö(nop, no-op): vkö"3 MIPS þ§nop Ù¢´- sllv zero,
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NVRAM: ´5 RAM§ä> E,±SN
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8Iè(object code): «AÏ©ª§¹k?È §S

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8Iè¥(object code library): ¹eZ£üÕ?È¤8I
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l?(octal): ±lÄêL«ê§DÚþ3c¡\""¢Sþ§
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i\ª CPU knÜ CPU +vk¢y OOO§wå5ò5
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401
MIPS âL
öè(op-code): -?L«¥Ü©§é½-ÏPÎØ
MìÀJÜ©!i\~ê T±ØC
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©(paged): ;ì+nXÚ£'X MIPS ¤§Ù¥æ^½
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PageMask Mì(PageMask register): MIPS ;ì+nXÚ¦^
Mì¶1 6 Ù"
ëê(parameter): !~§§k §S `D4ëêf§S§k
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402
MIPS âL
Ûó(parity): {üØuÿ"i!½öÙ§êâü \þ
P{“ ”¦ 1 oê£) ¤Ûê£Û¤½
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Ü©i!Ü©Vi(partial-word, partial-doubleword): °Ýu
i½öVi´M±ü ?1DÑêâ"3, MIPS
CPU þ§±3Ôi!m"
Patterson, David: l MIPS Ý5w§¦´ Hennessy Çº

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Patterson ¶íUÚ Hennessy ¿§¦+ Berkeley RISC 8§
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-g £þ§@oÒ¡T-´ PC éÏ"¬SÜ PC
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PCI: 1993 cu² PC I/O o§y3ë I/O ìÚ
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PDP-11: 1970 c.ÉH.Å§d DEC E"ÙK4
§ÏûÐOûüÚ`D© -Ù¤§S ¿ á
ÀÜ"cÙ´ Ken Thompson á u² UNIX§K {¤"
PDtrace: EJTAG NÁü*Ð§±Â8l&E§X²
LØ /#N Ü^#E§S1´»"¢
v õl&E´]Ô"1 12.3 !"
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vÒ PFN(page frame number): Ôn/p §´©ª MMU
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Philips: î³>fãÞ§Q²OÚEL MIPS Ø§y3UY¦^
MIPS Ø"
403
MIPS âL
Ôn/(physical address): Ñy3 CPU ÑÑÚ þ/§D
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PIC: Ã'è(position independent code)"
6Y(pipeline): ' NX(A5§ÏL§±¢yA^-¿1

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®?óé6YÛõ(pipeline concealment by assembly): MIPS
®?óÏ~ØI§S Ä6Y§¦+Åìó7LÄ"®?ì
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6Yx(pipeline hazard): x(hazard)"
6YÊî{l(pipeline stall): Êî(stall)"
6Yã(pipestage): äN MIPS 6Y£~Ê¤ã
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pixie, pixprof: @Ï MIPS UNIX XÚ¥kL{¤K¿Û ó
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PlayStation: Sony 1995 ciZÅ§d 32 MIPS ?nì°Ä"
PMC-Sierra: PMC-Sierra ´¬2äúi"§u

2000 cÂ MIPS CPU ;Oúi QED§d ) eZ MIPS
¬"QED òYe5p5U½ CPU ¬UYV 64
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Ã'è(position indenpendent code): ØØu§S/m
o/ÑU (1è—J´§ùé Linux/MIPS A^
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404
MIPS âL
±ÏL{ü/r¤kÚ^ÑU¤ PC éÏ/ªf PIC
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PRId Mì(PRId register): w\ CPU .ÒÚÒ£Ö¤
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A?(privilege level): CPU U $1SöXÚ7LU3ü
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405
MIPS âL
A?(privilege violation): §SÁã1Ø#Nö§ù
¬É~"öXÚ7Lû½ÑN¨v"
&Þ!NÁ(probe, debug): debug probe "
?§(process): UNIX c§éAu·-1þc½öüA
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?¿Ö§S;ì"Ð´@ 3) ±?§;
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PTE: L"3 MIPS þÒ´dô^5EM TLB êâ
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QED: þfìkúi§1990 c±5õ MIPS CPU O

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MØ|±§´3 n64 ABI ¥ ½Â§k ?Èì^^¢y"3 C
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R2000, R3000: 1ûz MIPS CPU§µCå5æ^ Ü·
RAM ?p "
406
MIPS âL
raMì(ra register): CPU Mì $31§DÚþ^f§S£/
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Å;ì RAM(random access memory): QÖqO
Å;ì" ROM"
Random Mì(Random register): k TLB CPU M
ì"TMìgÄëY4O§ TLB ÅO{"
Raza >fkúi(Raza Microelectronics, Inc): é#?\
MIPS úi§Raza E XLR xõ§!õØ MIPS64 CPU AûC
ålä§U´8c¤k MIPS ¥óéþp"ýé5
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Ö É\Kÿ§ù¬E¤5¯K§¤k
é MIPS CPU }Áùo£LSI LR33000 ´~ ¤"
Mì·¶(register renaming): «¢yp5UOÅEâ§#
N-Ï~gS1´1gSé§S ±Ø"û MIPS
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½ 8I¬(relocatable object module): ã¹7&E

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½ (relocation): ¦?8IèU3ØÓ;ì 1
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z"2g5zÒ´#4(J5z"
E (reset): Ö¥^5\-¹ CPU Reset Ñ\u)¯¶
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ÖU RMW(read-modify-write): é?¿a.; ~ö
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407
MIPS âL
Ø§d¥ä§U^L¥ä§"Ò´
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Az' Linux {üöXÚÑ¡ RTOS"ý ÏXÚ÷
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s0–s9 Mì(s0–s9 registers): Uì½^¼êCþ¤^
CPU Ï^Mì8Ü£$16–$23 Ú $30¤" ´?Uù Mì¼
êÑ7Lk§"
âÝ(sandbox): äkAÏo|] £^!©m!;ì9
CPU m¤§3Ù¥±S$1Ø&?§S"ù´ÏAþZEâ
¶c"
SandCraft Inc.: [ MIPS CPU OÅ§¤áu 1996 c§åu
½ CPU O"ÙÜ©< d SGI R4300 8|Ø%¤ |
¤"SandCraft O NEC Vr54xx X CPU"SandCraft u 2003 c
Raza >fúiÂ "
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¬êâ?1ö CPU ¡IþÅ"ùc5´ Úþ?nì
CPU «O§ ö±gö¬êâ"
NÝì(scheduler): 3õ?ÖXÚ¥§NÝìÒ´û½eg1=?
Ö§S"
408
MIPS âL
SDE-MIPS: Algorithmics é MIPS 8IÅmuóä§Äu GNU
C ï"
SDRAM, DDR DRAM(synchronous DRAM): k«Ä
u÷XêâG1êâDÑp°êâS¡"
?p (secondary L2 cache): 3kõgp XÚ¥§
´l CPU 1Cp "
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ã(segment): kseg0, kseg1 "
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&Òþ(semaphore): rkåVg§û|Oèõ?Ö½
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.set ®?ó·-(.set§assembly language controls): noat "
|§p (set, cache): cache set "

|é(set-associative): cache, set-associative "
SGI(Silicon Graphics, Inc): 1990 cÄu MIPS OÅøAû
P§´ MIPS NX(io<"ÖTúi» "
short: C ó.êâa.¶i§ char Ø
L int"3 32 Ú 64 NX(þ§short qo´L 16 ê"
SiByte: [ CPU Oúi§3 1990 c ÏMï 64 MIPS
CPU"Broadcom úiÂ § §E,¦^ SB-12xx CPU"
&Ò(signal): UNIX aXÚ¥uxÊÏ§S©¥ä"3 Berke-

ley UNIX ¥U?§d POSIX ó|n¿5z§^«{'
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Nû(silicon vendor): 3 MIPS .§EÚÈ MIPS CPU
?[úi"
ü-õêâ6 SIMD(single instruction multiple data): SIMD -
éõêâEÓö"y SIMD -;.{´l°M
ì“¡”õöê"
409
MIPS âL
SmartMIPS ASE: -?*Ð§8I½|½ u“Uk”—
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é¡õ?n SMP(symmetric multiprocessing): 5õ CPU XÚ
¤õ«/ª§Ù¥eZ;ì£;.{´æ^5
p ¤ CPU $1ÓöXÚSØ"Linux/MIPS ®²±
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f(snooping, snoopy): cache, snooping "
¡þXÚ SoC(system on a chip): ^õfXÚïE,ì"
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Ê (soft reset): 3êi>f¥§E ´ÊH4Ñ£å
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Sony: ¤a>f¬úi§Ù PlayStation æ^ MIPS ¡"
è?NÁì(source-level debugger): ± §S£-1!Cþ¶!

êâ(¤/ª«c§SGNÁì" è?NÁìI¯
è§ùóui\ªXÚ^§NÁì7L$13ÌÅþ§l
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sp Mì/ÒMì(sp register/stack pointer): CPU Mì $29§D
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RISC 8§ MIPS Ñgd"4Æ"d"4£ uÎ7ì¤´
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/mâUó"ù\±«ÉòÀÜDÕÑÙu?¿ Î
410
MIPS âL
ÃR©m§XDÕ/m¦"y3vk=DÕ/
möXÚ¼ûþ¤õ"
ßÿ1(speculative execution): « CPU ¢yE|§Ù¥ CPU 3
ýT1=^-£~´§3Ñ´Ä¬u)^©|
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£^£(spinlock): SMP XÚ^«. &Òþ/ª"ÙA´
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SR GMì(SR register): CPU GMì§AMì
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11.2.1 !^5)ºUì MIPS ½ëêŃD4¼ê"
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ÑyØ"
Lêâ(stale data): ¶c§^5®²Cö´
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d"4(Stanford): Î7ì/«¤Æ§Hennessy Ç3@p+
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411
MIPS âL
·Cþ(static variable): C ó¶c§3?È© ½;
ì/êâ"
GMì(Status register): SR Mì,¶i§þ"
stdarg: ANSI C 1OIO÷§Jø ékØ½êëê½öa.
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8.A^5U Ø7Ä¤ïEOÅ"Ï~´ÏLæ^
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MIPS R4000 CPU k:6Y§²zÚêâp ¯©¤
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ì(swapper): byte-swapper "
sync§;ìÓÚo(sync, memory synchronization barrier): ^
4§S ²(L«§S¥ÖgSýé-"§S^S¥3
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412
MIPS âL
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bly "
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414
MIPS âL
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416
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â* :?nì 0 Mì§R4000 º CPU þÑk"
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417
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418
ë]
ëÖÚë©Ù
Cohen,D. “On Holy Wars and a Plea for Peace.” USC/ISI IEN 137, April 1,
þl Wikipedia (www.wikipedia.org)¥u¢“à(endianness)”Ò
1980.
éTØ©"
Heinrich, J MIPS R4000 User’s Manual. Englewood Cliffs, NJ: Prentice
Hall, 1993
NX(²;¶SN~[§[kéJé¤
MIPS III
&E"ÓTÖlîÝ§==ùã@ 3 MIPS NX(
¥ýÏ^+§ Ñ äN¢y'Ü©"3Ö§TÖ
± PDF ªJøe1"£ëe¡Ñþ] ¤
Hennessy, J. and D. Patterson. Computer Architecture: A Quantitative
Approach. 3rd edition. San Franciso: Morgan Kaufmann, 2002.
3 MIPS A½+ §ù´Pk'uyOÅN
X(Ö"§ØvÒ´þ §´þkd"éuÄVg
ùãPE,Ø§±'Ünd<ÃÖ¶´XJ\ú
1ndÜn{§\¬uyT¥#SN(¢Ôk¤"
3\ ïc§ue´ÄÑ Y"
Kernighan,B. and D. Richie The C Programming Language. 2nd edition.
XJ\é C ó )õ§
Englewood Cliffs, NJ: Prentice Hall, 1988.
@oØUvkÖ"y3\NATï# ANSI §¢Ã´Ö
k:þ"
Love, R. Linux Kernel Development. Carmel, IN: Sams Publishing, 2003.
k' Linux SØp?HÜÌ·¥!éÐÖ§ØØ´Äk
èÑ±ÖÖ"Öõu)º¯o@ Ø´ù
"
419
ë]
Rosenberg, J. How Debuggers Work: Algorithms, Data Structures, and Ar-
chitecture. New York; John Wesley & Sons, 1996.
Ø\3muNÁóä§ÄK\UØIn)TÖ¥ò@o[
§Ý§Ø+N§TÖU Ï\\k¦^\¤PkNÁóä"
Sweazey,P. and A.J.Smith. “A class of Compatible Cache- Consistency
Protocols and Their Support by the IEEE Future Bus.” Proceedings of
the 13th International Symposium on Computer Architecture, 1986
Tanenbaum, A. and A.S.Woodhull. Operating Systems Design and Im-

plementation. 3rd edition. Englewood Cliffs, NJ: Prentice Hall, 2006.
TÖöXÚ\ÖéØ"Ö¥£ã Minix öXÚäk
{¤¿Â§£Ù@Ï¤ Linux )Jø ÐÄå"
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ÑÜ·"
Broadcom Corporation: www.broadcom.com k'u Sibyte 3 Broad-
com Â cO BCM X MIPS ?nì&E"l Google þ|
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GNU C Compiler 3 gcc.gnu.org"3 gcc.gnu.org/onlinedocs Pk
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Õ:o´Jø# è Linux SØ3 MIPS þ£"d §k
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420
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MIPS Technologies: MIPS NX(io<§ÏLÙ§ûuÙ CPU Ø
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k'3i\ªXÚ¥¦^ Linux #ªÚ&E"
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éÖµd
õêNX(¡Ö§ Ñ Øõ´ 1Ø=é1 ¦.
TNX(®?ó[ q¡ #§ ò¶ RISC NX(——MIPS
——Ú ¶ m è ö X Ú——Linux
¡Û"5 See MIPS Run6´ÑÚ~§A
¤kùaÖö"Dominic ——(Ü å5"Ö1Ü©l MIPS O
Sweetman Jø éuNX(ëÖ5`7 Km©§, 0 MIPS -8Ú?§] "
[!§é[!Lão´É ÑNþ' Ö± MIPS32/64 ÄOéNX(¤kÙ
NX(A5£9Ù59ó¤"(JEÒ ù §?1 '"
4°ç¿ 5k'uNX(äNÒ´ 1'Cz§Ò´è
MIPS Ö§Óß/² 'ß?NX(u 3f¨ þ§ÏÖ± Linux SØè
Ð«Eâ!²L!{¤!$£Ï"1 ý¢. öXÚ~f§¿ Ð« N
¥Ö¿Ò´'uöXÚ!^£Ú 3 MIPS NX(JøÄ:þï Linux ——
ABI SN§ù Ö¿¦TÖ¤^mu< )ü?nìÚé¡õ?nì"ÖlöXÚ
`DëÖ"?Û3 MIPS NX(þó< . ——¥ä!;ì/=——m©§
Ñ¬WuÂõÖ" ù Linux/MIPS A^§Sè\1?S!
¥¼êó¿ $1L§"
——Randy Allen, Catalytic M©<ÚEâ
oi
• éu Linux 3ý¢Mþ$1 Z
Öéu?Û MIPS NX(ëÃþÑ ù)"

´4Ð@Ö"[«1DÚ§1 • éu MIPS -8Jø !¡!
E,r:3ÏLäN~f²^Mþ" #!¿ ú¦^"
d §1áÂ Cl MIPS-I/V NX(
• UY± ¦Ö14äÖ5Ú
MIPS32/64 NX(LÞk'SN§)
NX(¡éõ§|±"{ ó§Ö´ <\º§N öL 20 c
?Ûî MIPS NX(§S Ü7Ö 3Äu MIPS NX(XÚþO²
" "
——Jan-Willem van de Waerlt, Fellow
Núi
Embedded System Programming,
Philips Semiconductor Computer Architecture, Advanced Computing
424

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