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P2N2222A

Amplifier Transistors
NPN Silicon

Features
• These are Pb−Free Devices* http://onsemi.com

COLLECTOR
1
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Characteristic Symbol Value Unit 2
Collector −Emitter Voltage VCEO 40 Vdc BASE

Collector −Base Voltage VCBO 75 Vdc


3
Emitter−Base Voltage VEBO 6.0 Vdc
EMITTER
Collector Current − Continuous IC 600 mAdc
Total Device Dissipation @ TA = 25°C PD 625 mW
Derate above 25°C 5.0 mW/°C

Total Device Dissipation @ TC = 25°C PD 1.5 W TO−92


Derate above 25°C 12 mW/°C CASE 29
STYLE 17
Operating and Storage Junction TJ, Tstg −55 to °C
Temperature Range +150
12 1
2
THERMAL CHARACTERISTICS 3 3
STRAIGHT LEAD BENT LEAD
Characteristic Symbol Max Unit
BULK PACK TAPE & REEL
Thermal Resistance, Junction to Ambient RqJA 200 °C/W AMMO PACK

Thermal Resistance, Junction to Case RqJC 83.3 °C/W


Stresses exceeding Maximum Ratings may damage the device. Maximum MARKING DIAGRAM
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
P2N2
222A
AYWW G
G

A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)

ORDERING INFORMATION
Device Package Shipping†
P2N2222AG TO−92 5000 Units/Bulk
(Pb−Free)

P2N2222ARL1G TO−92 2000/Tape & Ammo


(Pb−Free)
†For information on tape and reel specifications,
*For additional information on our Pb−Free strategy and soldering details, please including part orientation and tape sizes, please
download the ON Semiconductor Soldering and Mounting Techniques refer to our Tape and Reel Packaging Specification
Reference Manual, SOLDERRM/D. Brochure, BRD8011/D.

© Semiconductor Components Industries, LLC, 2013 1 Publication Order Number:


January, 2013 − Rev. 7 P2N2222A/D
P2N2222A

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)


Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector −Emitter Breakdown Voltage V(BR)CEO Vdc
(IC = 10 mAdc, IB = 0) 40 −
Collector −Base Breakdown Voltage V(BR)CBO 75 Vdc
(IC = 10 mAdc, IE = 0) −
Emitter−Base Breakdown Voltage V(BR)EBO Vdc
(IE = 10 mAdc, IC = 0) 6.0 −
Collector Cutoff Current ICEX nAdc
(VCE = 60 Vdc, VEB(off) = 3.0 Vdc) − 10
Collector Cutoff Current ICBO mAdc
(VCB = 60 Vdc, IE = 0) − 0.01
(VCB = 60 Vdc, IE = 0, TA = 150°C) − 10
Emitter Cutoff Current IEBO 10 nAdc
(VEB = 3.0 Vdc, IC = 0) −
Collector Cutoff Current ICEO nAdc
(VCE = 10 V) − 10
Base Cutoff Current IBEX nAdc
(VCE = 60 Vdc, VEB(off) = 3.0 Vdc) − 20
ON CHARACTERISTICS
DC Current Gain hFE −
(IC = 0.1 mAdc, VCE = 10 Vdc) 35 −
(IC = 1.0 mAdc, VCE = 10 Vdc) 50 −
(IC = 10 mAdc, VCE = 10 Vdc) 75 −
(IC = 10 mAdc, VCE = 10 Vdc, TA = −55°C) 35 −
(IC = 150 mAdc, VCE = 10 Vdc) (Note 1) 100 300
(IC = 150 mAdc, VCE = 1.0 Vdc) (Note 1) 50 −
(IC = 500 mAdc, VCE = 10 Vdc) (Note 1) 40 −
Collector −Emitter Saturation Voltage (Note 1) VCE(sat) Vdc
(IC = 150 mAdc, IB = 15 mAdc) − 0.3
(IC = 500 mAdc, IB = 50 mAdc) − 1.0
Base −Emitter Saturation Voltage (Note 1) VBE(sat) Vdc
(IC = 150 mAdc, IB = 15 mAdc) 0.6 1.2
(IC = 500 mAdc, IB = 50 mAdc) − 2.0
SMALL−SIGNAL CHARACTERISTICS
Current −Gain − Bandwidth Product (Note 2) fT MHz
(IC = 20 mAdc, VCE = 20 Vdc, f = 100 MHz)C 300 −
Output Capacitance Cobo pF
(VCB = 10 Vdc, IE = 0, f = 1.0 MHz) − 8.0
Input Capacitance Cibo pF
(VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz) − 25
Input Impedance hie kW
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz) 2.0 8.0
(IC = 10 mAdc, VCE = 10 Vdc, f = 1.0 kHz) 0.25 1.25
Voltage Feedback Ratio hre X 10− 4
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz) − 8.0
(IC = 10 mAdc, VCE = 10 Vdc, f = 1.0 kHz) − 4.0
Small−Signal Current Gain hfe −
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz) 50 300
(IC = 10 mAdc, VCE = 10 Vdc, f = 1.0 kHz) 75 375
Output Admittance hoe mMhos
(IC = 1.0 mAdc, VCE = 10 Vdc, f = 1.0 kHz) 5.0 35
(IC = 10 mAdc, VCE = 10 Vdc, f = 1.0 kHz) 25 200
Collector Base Time Constant rb′Cc ps
(IE = 20 mAdc, VCB = 20 Vdc, f = 31.8 MHz) − 150
Noise Figure NF dB
(IC = 100 mAdc, VCE = 10 Vdc, RS = 1.0 kW, f = 1.0 kHz) − 4.0
1. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.
2. fT is defined as the frequency at which |hfe| extrapolates to unity.

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2
P2N2222A

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)


Characteristic Symbol Min Max Unit
SWITCHING CHARACTERISTICS
Delay Time (VCC = 30 Vdc, VBE(off) = −2.0 Vdc, td − 10 ns
Rise Time IC = 150 mAdc, IB1 = 15 mAdc) (Figure 1) tr − 25 ns
Storage Time (VCC = 30 Vdc, IC = 150 mAdc, ts − 225 ns
Fall Time IB1 = IB2 = 15 mAdc) (Figure 2) tf − 60 ns

SWITCHING TIME EQUIVALENT TEST CIRCUITS

+30 V +30 V
1.0 to 100 ms, 1.0 to 100 ms, 200
200 +16 V
+16 V DUTY CYCLE ≈ 2.0% DUTY CYCLE ≈ 2.0%

0 0
1 kW -14 V 1k CS* < 10 pF
-2 V CS* < 10 pF
< 2 ns < 20 ns
1N914

Scope rise time < 4 ns -4 V


*Total shunt capacitance of test jig,
connectors, and oscilloscope.
Figure 1. Turn−On Time Figure 2. Turn−Off Time

1000
700
500 TJ = 125°C
hFE, DC CURRENT GAIN

300
200
25°C
100
70
-55°C
50
30 VCE = 1.0 V
20 VCE = 10 V

10
0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 200 300 500 700 1.0 k
IC, COLLECTOR CURRENT (mA)
Figure 3. DC Current Gain

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3
P2N2222A

VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)


1.0
TJ = 25°C
0.8

0.6 IC = 1.0 mA 10 mA 150 mA 500 mA

0.4

0.2

0
0.005 0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50
IB, BASE CURRENT (mA)
Figure 4. Collector Saturation Region

200 500
IC/IB = 10 VCC = 30 V
300 IC/IB = 10
100 TJ = 25°C
200 t′s = ts - 1/8 tf IB1 = IB2
70 tr @ VCC = 30 V
50 TJ = 25°C
td @ VEB(off) = 2.0 V
100
td @ VEB(off) = 0
t, TIME (ns)

30
t, TIME (ns)

70
20 tf
50
30
10
7.0 20
5.0
10
3.0 7.0
2.0 5.0
5.0 7.0 10 20 30 50 70 100 200 300 500 5.0 7.0 10 20 30 50 70 100 200 300 500
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)

Figure 5. Turn −On Time Figure 6. Turn −Off Time

10 10
RS = OPTIMUM f = 1.0 kHz
IC = 1.0 mA, RS = 150 W RS = SOURCE
8.0 RS = RESISTANCE 8.0
500 mA, RS = 200 W IC = 50 mA
NF, NOISE FIGURE (dB)

NF, NOISE FIGURE (dB)

100 mA, RS = 2.0 kW 100 mA


6.0 50 mA, RS = 4.0 kW 6.0 500 mA
1.0 mA

4.0 4.0

2.0 2.0

0 0
0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k 20 k 50 k 100 k
f, FREQUENCY (kHz) RS, SOURCE RESISTANCE (OHMS)

Figure 7. Frequency Effects Figure 8. Source Resistance Effects

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4
P2N2222A

f T, CURRENT-GAIN BANDWIDTH PRODUCT (MHz)


30 500
VCE = 20 V
20 TJ = 25°C
300
Ceb
CAPACITANCE (pF)

10 200

7.0

5.0
100
Ccb
3.0 70

2.0 50
0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50 1.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100
REVERSE VOLTAGE (VOLTS) IC, COLLECTOR CURRENT (mA)

Figure 9. Capacitances Figure 10. Current−Gain Bandwidth Product

1.0 +0.5
TJ = 25°C

0.8 0 RqVC for VCE(sat)


COEFFICIENT (mV/ °C)
V, VOLTAGE (VOLTS)

VBE(sat) @ IC/IB = 10
1.0 V -0.5
0.6
VBE(on) @ VCE = 10 V -1.0
0.4
-1.5

0.2
-2.0 RqVB for VBE
VCE(sat) @ IC/IB = 10
0 -2.5
0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 500 1.0 k 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 500
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)

Figure 11. “On” Voltages Figure 12. Temperature Coefficients

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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

TO−92 (TO−226)
CASE 29−11
SCALE 1:1 ISSUE AM
DATE 09 MAR 2007

12 1
2
3 3
STRAIGHT LEAD BENT LEAD
BULK PACK TAPE & REEL
AMMO PACK

NOTES:
A B STRAIGHT LEAD 1. DIMENSIONING AND TOLERANCING PER ANSI
BULK PACK Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
R IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
P BEYOND DIMENSION K MINIMUM.
L
SEATING INCHES MILLIMETERS
PLANE K DIM MIN MAX MIN MAX
A 0.175 0.205 4.45 5.20
B 0.170 0.210 4.32 5.33
C 0.125 0.165 3.18 4.19
D 0.016 0.021 0.407 0.533
X X D G 0.045 0.055 1.15 1.39
H 0.095 0.105 2.42 2.66
G J 0.015 0.020 0.39 0.50
H J K 0.500 --- 12.70 ---
L 0.250 --- 6.35 ---
V C N 0.080 0.105 2.04 2.66
P --- 0.100 --- 2.54
SECTION X−X R 0.115 --- 2.93 ---
1 N V 0.135 --- 3.43 ---

NOTES:
A B BENT LEAD
R 1. DIMENSIONING AND TOLERANCING PER
TAPE & REEL ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
AMMO PACK 3. CONTOUR OF PACKAGE BEYOND
DIMENSION R IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P
P AND BEYOND DIMENSION K MINIMUM.
T
MILLIMETERS
SEATING
PLANE K DIM MIN MAX
A 4.45 5.20
B 4.32 5.33
C 3.18 4.19
D 0.40 0.54
X X D G 2.40 2.80
J 0.39 0.50
G K 12.70 ---
J N 2.04 2.66
V P 1.50 4.00
C R 2.93 ---
V 3.43 ---
SECTION X−X
1 N

STYLES ON PAGE 2

DOCUMENT NUMBER: 98ASB42022B Electronic versions are uncontrolled except when


accessed directly from the Document Repository. Printed
STATUS: ON SEMICONDUCTOR STANDARD versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002 http://onsemi.com Case Outline Number:
October, DESCRIPTION:
2002 − Rev. 0 TO−92 (TO−226) 1 PAGE 1 OFXXX3
TO−92 (TO−226)
CASE 29−11
ISSUE AM
DATE 09 MAR 2007

STYLE 1: STYLE 2: STYLE 3: STYLE 4: STYLE 5:


PIN 1. EMITTER PIN 1. BASE PIN 1. ANODE PIN 1. CATHODE PIN 1. DRAIN
2. BASE 2. EMITTER 2. ANODE 2. CATHODE 2. SOURCE
3. COLLECTOR 3. COLLECTOR 3. CATHODE 3. ANODE 3. GATE

STYLE 6: STYLE 7: STYLE 8: STYLE 9: STYLE 10:


PIN 1. GATE PIN 1. SOURCE PIN 1. DRAIN PIN 1. BASE 1 PIN 1. CATHODE
2. SOURCE & SUBSTRATE 2. DRAIN 2. GATE 2. EMITTER 2. GATE
3. DRAIN 3. GATE 3. SOURCE & SUBSTRATE 3. BASE 2 3. ANODE

STYLE 11: STYLE 12: STYLE 13: STYLE 14: STYLE 15:
PIN 1. ANODE PIN 1. MAIN TERMINAL 1 PIN 1. ANODE 1 PIN 1. EMITTER PIN 1. ANODE 1
2. CATHODE & ANODE 2. GATE 2. GATE 2. COLLECTOR 2. CATHODE
3. CATHODE 3. MAIN TERMINAL 2 3. CATHODE 2 3. BASE 3. ANODE 2

STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20:
PIN 1. ANODE PIN 1. COLLECTOR PIN 1. ANODE PIN 1. GATE PIN 1. NOT CONNECTED
2. GATE 2. BASE 2. CATHODE 2. ANODE 2. CATHODE
3. CATHODE 3. EMITTER 3. NOT CONNECTED 3. CATHODE 3. ANODE

STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25:
PIN 1. COLLECTOR PIN 1. SOURCE PIN 1. GATE PIN 1. EMITTER PIN 1. MT 1
2. EMITTER 2. GATE 2. SOURCE 2. COLLECTOR/ANODE 2. GATE
3. BASE 3. DRAIN 3. DRAIN 3. CATHODE 3. MT 2

STYLE 26: STYLE 27: STYLE 28: STYLE 29: STYLE 30:
PIN 1. VCC PIN 1. MT PIN 1. CATHODE PIN 1. NOT CONNECTED PIN 1. DRAIN
2. GROUND 2 2. SUBSTRATE 2. ANODE 2. ANODE 2. GATE
3. OUTPUT 3. MT 3. GATE 3. CATHODE 3. SOURCE

STYLE 31: STYLE 32: STYLE 33: STYLE 34: STYLE 35:
PIN 1. GATE PIN 1. BASE PIN 1. RETURN PIN 1. INPUT PIN 1. GATE
2. DRAIN 2. COLLECTOR 2. INPUT 2. GROUND 2. COLLECTOR
3. SOURCE 3. EMITTER 3. OUTPUT 3. LOGIC 3. EMITTER

DOCUMENT NUMBER: 98ASB42022B Electronic versions are uncontrolled except when


accessed directly from the Document Repository. Printed
STATUS: ON SEMICONDUCTOR STANDARD versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002 http://onsemi.com Case Outline Number:
October, DESCRIPTION:
2002 − Rev. 0 TO−92 (TO−226) 2 PAGE 2 OFXXX3
DOCUMENT NUMBER:
98ASB42022B

PAGE 3 OF 3

ISSUE REVISION DATE


AM ADDED BENT−LEAD TAPE & REEL VERSION. REQ. BY J. SUPINA. 09 MAR 2007

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

© Semiconductor Components Industries, LLC, 2007 Case Outline Number:


March, 2007 − Rev. 11AM 29
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