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EE 0807312- Electronics Lab

Experiment#6

JFET: Characteristics and Applications

1.1. Objective

1-To study the characteristics of a Junction field effect transistor (JFET) including the
different region of operation.

2- To demonstrate the operation of FET small signal amplifier (Common-Source


configuration).

1.2. Prelab

Answer the following questions: -

1. Plot the drain characteristics for the circuit shown in figure (6-7) for given
parameters.
2. List the various operating region of JFET transistor.

Solve the following problems. Don't just write down the answers. Show all the
calculations clearly.

1. In figure (6-8), Calculate:

1- VD, VS, VG, ID, IS, and VDS.


2- The forward transconductance (gm).
3- Voltage gain (AV).
4- Current gain (Ai).
5- Input resistance (Rin).
6- Output resistance (Rout).

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1.3. Background
JFET (Junction field effect transistor)

JFETis the simplest type of field effect transistor and has a three terminal with one terminal
capable of controlling the current between the other two. It can be used as an
electronically-controlled switch or as a voltage-controlled resistance. Electric charge
flows through a semiconducting channel between "source" and "drain" terminals. By
applying a bias voltage to a "gate" terminal, the channel is "pinched", so that the electric
current is impeded or switched off completely. The basic construction of the JFET is shown
in figure (6-1).

Figure (6-1)

Just as there are NPN and PNP bipolar transistor, there are (n-channel) and (p-channel) field
effect transistors. However, it is important to keep in mind that the BJT transistors are bipolar
device meaning that the conduction level is a function of two charge carriers, electrons and
holes .The JFET is a unipolar device depending solely on either electron (n-channel) or hole (p-
channel).Figure (6-2) shows schematic Symbols for JFETs (n-channel and p-channel).

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Figure (6-2)

Output and transfer characteristics

Output or drain characteristics:

The curve drawn between drain current ID and drain-source voltage VDS with gate-to source
voltage VGS as the parameter is called the drain or output characteristic. This characteristic is
analogous to collector characteristic of a BJT. Figure (6-3a) shows the circuit diagram for
determining the output or drain characteristics and figure (6-3b) shows the output
characteristics.

(a)

(b)

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Figure (6-3): (a) circuit diagram for determining V-I characteristics, (b) Output characteristics
The characteristics curves example shown in figure (6-3b) shows the four different regions of
operation for a JFET and these are given as:

 Ohmic (Linear) region: JFET acts like a voltage controlled resistor.


 Cutoff (Pinch-off) region: JFET to act as an open circuit as the channel resistance is at
maximum
 Saturation or active region: JFET becomes a good conductor and is controlled by
the Gate-Source voltage, (VGS) while the Drain-Source voltage, (VDS) has little or
no effect.
 Breakdown region: the voltage between the Drain and the Source, (V DS) is high
enough to causes the JFET's resistive channel to break down and pass
uncontrolled maximum current.

1. Transfer characteristics:

The relationship between ID and VGS is a transfer characteristic for JFET and defined by
Shockley’s equation:

( )
2
VGS
ID = IDSS 1−
Vp
The squared term of the equation will results in a nonlinear relationship between ID and VGS,
producing a curve that grows exponentially with decreasing magnitudes of VGS. Figure (6-4)
shows the transfer characteristics which can be obtained from the output characteristics.

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Figure (6-4)

JFET Amplifier

Figure (6-5) shows a common- source amplifier.

Figure (6-5)

The circuit has a combination of DC and AC operation:

1. DC analysis

To analyze the amplifier in Figure (6-5), you must first determine the dc bias values. To
do this, develop a dc equivalent circuit by replacing all capacitors with opens, as shown
in Figure (6-6). First, you must determineID before you can do any analysis. If the circuit
is biased at midpoint of the load line, you can calculateI D usingIDSS from the FET data
sheet as follows:
IDSS
ID =
2
Otherwise, you must know ID before you can make any other dc calculations.
Determinations of ID from circuit Parameter values is tedious because of the following
Equation must be solved for ID (This equation is derived by substitution of VGS= - IDRS
into the equation.

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( )
2
-(ID)(Rs)
ID = IDSS 1−
Vp

Once ID determined, the dc analysis can proceed using the following relationships:

Vs= -VGS= - (ID) (RS)


VD=VDD-IDRD
VDS= VD-VS

Figure (6-6)

2. AC analysis

Develop an ac equivalent circuit as follows:


Replace the capacitors by effective short, based on simplifying assumption that Xc0 at
the signal frequency. Replace the dc source by a ground, based on the assumption that the
voltage source has a zero internal resistance. The VDD terminal is zero-voltage ac potential
and acts as an ac ground. The resulting equations Rin, Rout, AV will be:
Rin = RG
Rout = RD
AV = -gm RD
Where gm: the forward transconductance.

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( )
2
2(IDSS) VGS
gm = 1−
|Vp| Vp

1.4. Experimental Procedure

IDSS and VP measurement

1- Connect the circuit shown in Figure (6-7).

Figure (6-7)

2- Set VGS = 0 V, set VDS = 8V and measure VRD (then calculate IDSS = VRD/RD), record
your data in table (1).

3- Maintain V DS= 8V, and reduce VGG until VRD = 1mV. Measure VGS = VP, record
your data in table (1).

VGS VDS VRD (Measured) IDSS (Calculated)


0 8V
8V 1mV X
Table (1)

Output and transfer characteristics

1- For the circuit shown in figure (5-1), Set VGS= VDS = 0 V, measure VRD and
calculate ID. (Record your data in table (2))

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2- Maintain VGS at 0 V then vary VDS from 0 to 14V in step of 2V, and measure V RD
then record the calculated ID.. (Record your data in table (2))

3- Set VGS = -0.3,-0.6,-1.2,-1.7,-2.3,-3.3 and repeat step (2).

VGS 0 0 -0.3 -0.3 -0.6 -0.6 -1.2 -1.2 -1.7 -1.7 -2.3 -2.3 -3.3 -3.3

VDS VRD ID VRD ID VRD ID VRD ID VRD ID VRD ID VRD ID


0
2
4
6
8
10
12
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Table (2)

4- Plot ID versus VDS with VGS as parameter. Show in the plot the distinct operating
region.

5- Plot the transfer characteristics (I D against VGS). From the curve determine the
value of IDSS and VP.

Common Source transistor amplifier

1- Connect the circuit shown in figure (6-8).

2- Measure the DC voltages and current.(VG, VS, VD, ID, and VDS). And calculate
(gm)Record your data in table (3).

In steps from (3-6) record your data in table (4)

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3- Adjust the input voltage (Vin) so that the output (Vout) is not saturated or distorted,
then measure the output voltage and input voltage and use (Vout/Vin) to calculate the
gain (AV) and note the (phase shift).

4- Measure the input resistance (Rin) by inserting a decade box (Rbox) in series with
the input before C1. Then adjust the value of (R box) until (Vout)drops to half its value in
step (3), Keeping Vin constant (Note: Vout should not exhibit any distortion). Is the
value of (Rbox) equal the input resistance (Rin)? Why?

5- Disconnect Rbox from the input and connect it in parallel with the output then adjust
the value of Rbox until Vout drops to half its value in step (3). This value of R box is equal
to the output resistance (Rout).

6- Calculate the corresponding current gain (Ai) of the amplifier.

7- Disconnect the bypass capacitor (CS) and calculate AV. Record your data in table
(5).

Figure (6-8)
DC parameters Computed values Measured values
VG
VS
VD
IS
VDS
gm

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Table (3)

AC parameters Computed value Measured value


Vin X
Vout
AV
Rin
Rout
Ai
Phase shift
Table (4)

AC parameters Computed value Measured value


Vout
AV
Table (5)

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