Assignment: 02

Formal method in Software engineering

Submitted by:

Name: Khalid Alvi

Sap ID: 70126508

Submitted to:

Ms. Zartasha Khan

Department of Software engineering

The University of Lahore

Submitted on: 16 April,2024

1. VDM-SL:
Definition:
Formal method for specifying and reasoning about software
systems.

Functionality:
Mathematical framework for describing structure and
behavior, supporting both functional and object-oriented modeling.

Usage:
Utilized by software engineers to create formal models, aiding in
analysis, validation, and verification.

Example:
Banking system modeling with data types, functions, and
constraints.

2. Transition System:
Definition:
Mathematical model for depicting system behavior with
states and transitions.

Utility:
Essential for formal verification, analyzing properties like
reachability and safety.

Usage:
Widely applied in verifying correctness and reliability of
software and hardware systems.

Example:
Vending machine states and transitions based on user actions.

Difference Between CTL and CTL*:

Purpose:
Temporal logics for specifying properties of transition
systems.

Usage:
Employed in formal verification to express temporal properties.
Example:
CTL for expressing eventual reachability, CTL* for
additional temporal operators.

CTL vs. CTL*:

Logic Type:
Both are branching-time logics.

Expressiveness:
CTL has a limited set of operators, while CTL* offers
more.

Temporal Operators:
CTL includes basic operators, CTL* expands
with additional ones.

Quantifiers:
CTL lacks temporal quantifiers, CTL* supports them.

Fairness:
CTL* can express fairness constraints, whereas CTL cannot
directly.

Complexity:
Model checking in CTL* is more complex due to its
enhanced expressiveness.