Effective Mitigation of Shock Loads of Embedded Electronics

in Smart Ammunitions by Polymeric Encapsulation

by

Zhuo Chen

A thesis submitted in conformity with the requirements

for the Degree of Master of Applied Science,
Department of Mechanical and Industrial Engineering
University of Toronto

© Copyright by Zhuo Chen 2014

 Effective Mitigation of Shock Loads of Embedded Electronics
in Smart Ammunitions by Polymeric Encapsulation

Zhuo Chen

Master of Applied Science

Department of Mechanical and Industrial Engineering

University of Toronto
2014

Abstract

Short duration impulse and long duration shock loads can lead to the failure of embedded

electronics typically used in smart ammunitions. The objective of this work is to develop the

means to protect the printed circuit board (PCB) using polymeric encapsulating materials.

Three aspects of the work were considered using finite element (FE) simulations. The first is

concerned with the development of a micromechanical modelling scheme of a multilayered

PCB to determine its equivalent elastic properties. The second is concerned with the

determination of the mechanical integrity of the embedded electronics subjected to short

duration impulse. The third is concerned with the dynamic behavior of the PCB subjected to

long duration shock loads. The effectiveness of different encapsulation designs to attenuate the

shock loads are examined. Our results reveal the remarkable effectiveness of a novel bilayer

potting approach over the commonly adopted single potting attenuation strategy.

ii
 Acknowledgements

I offer my sincere appreciation and gratitude to Professor S.A. Meguid for his continued
technical guidance and ideas that helped to elevate the thesis to its current level and for proof
reading of the thesis. I also wish to thank him for providing financial support during my
Masters program of studies.

I would also like to thank the sponsors of the current research who wish to remain anonymous
for their input and financial support.

It has also been a great pleasure to work with all of my fellow researchers in the Mechanics and
Aerospace Design Laboratory (MADL), and I would like to specifically extend my heartfelt
appreciation to Dr. Fan Yang for his extended help throughout my Masters studies.

Finally, I would like to offer my gratitude to my parents. It is difficult to express how much I
appreciate their understanding and unlimited support during the different stages of my studies.

iii
 Table of Contents

Abstract .................................................................................................................................. ii
Acknowledgements........................................................................................................................ iii
Table of Contents........................................................................................................................... iv
Notations ................................................................................................................................ vii
Abbreviations................................................................................................................................. ix
Glossaries ...................................................................................................................................x
List of Figures ................................................................................................................................ xi
List of Tables ............................................................................................................................... xvi
Chapter 1 Introduction and Justification ....................................................................................1
1.1 Statement of the Problem .................................................................................................. 1
1.2 Research Objectives .......................................................................................................... 3
1.3 Method of Approach ......................................................................................................... 4
1.4 Layout of Thesis................................................................................................................ 5
Chapter 2 Literature Review ......................................................................................................6
2.1 Printed Circuit Board ........................................................................................................ 6
2.1.1 Definitions .................................................................................................................6
2.1.2 Micromechanics Modelling of PCB ..........................................................................9
2.2 Short Duration Impulse and Long Duration Shock Loads .............................................. 11
2.2.1 Definition of Shock Loads ......................................................................................11
2.2.2 Short Duration Impulse using Board-level Drop Test .............................................11
2.2.3 Long Duration Shock Loads using Gas Gun ...........................................................14
2.3 FE Modelling of Impulse and Shock Loads ................................................................... 15
2.3.1 Encapsulating Electronics........................................................................................15
2.3.2 FE Modelling of Short Duration Impulse ................................................................16
2.3.3 FE Modelling of Long Duration Shock Loads ........................................................22
Chapter 3 Micromechanics Modelling of the Effective Properties of Embedded Electronics
in Smart Ammunitions.............................................................................................25
3.1 Description of the Problem ............................................................................................. 25
3.2 Micromechanics Based Homogenization Approach ....................................................... 25
3.3 Micromechanical Modelling of Fiber Bundles ............................................................... 27
iv
 3.3.1 Unidirectional Fiber Bundle Homogenization.........................................................27
3.3.2 Waviness Effect .......................................................................................................31
3.4 Micromechanical FE Modelling of Woven Composite .................................................. 34
3.4.1 Periodic Cell Model .................................................................................................34
3.4.2 Convergence Test ....................................................................................................34
3.4.3 Boundary Conditions ...............................................................................................36
3.5 Multilayer PCB Laminates Homogenization .................................................................. 39
Chapter 4 FE Modelling of Embedded Electronics Subjected to Short Duration Impulse and
Long Duration Shock Loads ....................................................................................41
4.1 Fundamentals of FE Dynamic Modelling using ABAQUS ............................................ 41
4.1.1 Explicit Integration Method.....................................................................................43
4.1.2 Modal Superposition Method ..................................................................................44
4.2 Geometry of Potted PCB Assembly................................................................................ 46
4.3 Constitutive Modelling of Materials ............................................................................... 47
4.3.1 Selected Potting Materials .......................................................................................47
4.3.2 Solder-Underfill Interconnection .............................................................................48
4.3.3 Prinited Circuit Board ..............................................................................................56
4.4 Element Selection for PCB ............................................................................................. 56
4.5 FE modelling of Electronics Subjected to Impulse ......................................................... 59
4.5.1 FE Model Specificaiton ...........................................................................................59
4.5.2 Boundary and Loading Conditions ..........................................................................60
4.5.3 Mesh Convergence ..................................................................................................61
4.6 FE modelling of Electronics Subjected to Shock Loads ................................................. 62
4.6.1 FE Model Specificaiton ...........................................................................................62
4.6.2 Boundary and Loading Conditions ..........................................................................63
4.6.3 Mesh Convergence ..................................................................................................64
Chapter 5 Results and Discussions...........................................................................................66
5.1 Effective Properties Determination of PCB .................................................................... 66
5.2 Electronics Subjected to Short Duration Impulse ........................................................... 67
5.2.1 Validation of Numerical Models .............................................................................68
5.2.2 Un-potted PCB Case ................................................................................................69
5.2.3 Single Potting Configuration ...................................................................................70
v
 5.2.4 Bilayer Potting Configuration .................................................................................72
5.3 Electronics Subjected to Long Duration Shock Loads ................................................... 75
5.3.1 Un-potted PCB Case ................................................................................................75
5.3.2 Single Potting Configuration ...................................................................................76
5.3.3 Bilayer Potting Configuration .................................................................................77
5.3.4 Validation of FE Results using Modal Analysis .....................................................79
5.3.5 Frequency Spectrum of the Stress Response ...........................................................88
5.4 Comparison between Short and Long Duration Shock Loads ........................................ 93
Chapter 6 Conclusions and Future Work .................................................................................95
6.1 Statement of the Problem ................................................................................................ 95
6.2 General Conclusions ....................................................................................................... 95
6.2.1 Micromechanics Modelling of Embedded Electronics............................................95
6.2.2 Embedded Electronics Subjected to Short Duration Impulse..................................96
6.2.3 Embedded Electronics Subjected to Long Duration Shock Loading ......................96
6.3 Contribution of Thesis .................................................................................................... 97
6.4 Future Work .................................................................................................................... 98
Appendix A .................................................................................................................................99
Appendix B ...............................................................................................................................103
Reference ...............................................................................................................................105

vi
 Notations

a Acceleration /Semi-major axis of the L Length of the package

fiber bundle ellipsoid

Af Strain concentration matrix m Mass

Aarea Base area of the mounted package M Moment per length

b Semi-minor axis of the fiber bundle w Deflection of the circuit board

ellipsoid

c Wave speed Yb Displacement of the base

cf Volume fraction of the fiber u t  Nodal displacement vector

cm Volume fraction of the matrix u t  Nodal velocity vector

ci Volume fraction of ith phase u t  Nodal acceleration vector

C/Cij Stiffness matrix M Mass matrix

Cijk Averaged stiffness matrix of fiber bundle K Stiffness matrix

C Homogenized stiffness matrix C Damping matrix

D1 Flexural rigidity of the package N Shape functions

D2 Flexural rigidity of the PCB Q Loading vector

De Effective flexural rigidity of the PCB A Axial Poisson's ratio

EA Axial Young's modulus m Poisson’s ratio of matrix phase

Ef Young's modulus of the fiber f Poisson’s ratio of fiber phase

Em Young's modulus of the matrix  ij Cauchy stress tensor

Ewarp Young's modulus along the warp i Reduced form of stress tensor
direction

E fill Young's modulus along the fill direction  inertia Interconnection normal stress due to
inertial effect

vii
 Ethick Young's modulus along PCB thickness  zz Interconnection normal stress

Fij Deformation gradient tensor  ij Strain tensor

h Half of the periodic cell height i Reduced form of the strain tensor

I1 First deviatoric strain invariant  Angle of fiber

G Gravitational acceleration i Density of the ith phase

G0 Instantaneous shear modulus T Transverse shear modulus

G(t) Relaxation shear modulus A Axial shear modulus

J Volume ratio  Relaxation time

k Plane strain bulk modulus i Eigen frequency

ka Axial stiffness of the interconnection i Eigen vectors

kf Plane strain bulk modulus of fiber phase t Time increment

km Plane strain bulk modulus of matrix phase tcr Critical increment for algorithm stability

Km Bulk modulus of matrix phase

viii
 Abbreviations

BGA: Ball grid array

CCA: Composite cylinder assemblage

CTE: Coefficient of thermal expansion

DOF: Degrees of freedom

FBGA: Fine pitch ball grid array

FEM: Finite element method

FFT: Fast Fourier transform

IC: Integrated circuit

JEDEC： Joint Electron Device Engineering Council

LED: Light-emitting diode

MEMS: Micro-electro-mechanical system

PCB: Printed circuit board

PGP: Precision guided projectile

RUC: Repeated unit cell

RVE: Representative volume element

SAS: Shock attenuation system

SMT: Surface mounted technology

THT: Through-hole technology

ix
 Glossaries

Smart Ammunitions: A guided munition intended to precisely hit a specific target

Encapsulation: Surrounding the embedded electronics with protective polymeric materials

Potting: Used interchangeably with encapsulation (as commonly adopted in industry)

Plain weave: One of the textile weaves with warp and fill forming a simple criss-cross pattern

Underfill: Injection of an epoxy mixture under the integrated circuits after soldered to the PCB

x
 List of Figures

Fig. 1.1 A schematic of the problem under investigation: (a) short duration impulse, (b) long
duration shock loads, and (c) protection of ICs using polymeric encapsulation ............2
Fig. 1.2 A schematic of embedded electronics in smart ammunitions .........................................2
Fig. 1.3 A schematic of the method of approach ..........................................................................4
Fig. 2.1 A typical printed circuit board and its mounted components .........................................6
Fig. 2.2 A schematic of a six-layer circuit board and the structure of woven composite ply .....7
Fig. 2.3 Two types of package mounting technologies: (a) through-hole technology, and (b)
surface mount technology ...............................................................................................8
Fig. 2.4 (a) EQLAM model, and (b) BLEND model [22] ..........................................................10
Fig. 2.5 A typical drop test apparatus and mounting scheme for the PCB assembly based on
the JEDEC document JESD22-B111 [29] ....................................................................12
Fig. 2.6 Test board size and layout [29] .....................................................................................13
Fig. 2.7 Gas gun facility for low-velocity impact testing [32] ...................................................14
Fig. 2.8 Experimentally recorded axial acceleration profile of a projectile by ARDEC
Picatinny (USA) [33] ....................................................................................................15
Fig. 2.9 A typical example of potting of IC components ..........................................................16
Fig. 2.10 Typical modelling techniques: (a) direct modelling method [37], (b) input G method,
and (c) support excitation scheme [43] .........................................................................17
Fig. 2.11 Finite element model of the board-level drop test [44] .................................................18
Fig. 2.12 Normal stress  zz distribution (Unit: MPa) in solder interconnections: (a) on package

side, and (b) on test board side for a representative IC component [44] ......................19
Fig. 2.13 Contour plots of the normal stress distribution in interconnection at of 0.8 ms (The
value labels show the maximum normal stress (MPa) occurred at each
interconnection corner during the whole simulation time) [46]....................................19
Fig. 2.14 Susceptible failure locations of the solder joints (indicated by the red indicators) from
the drop test experiments following JESD22-B111 standard by Lai et al [47] ............20
Fig. 2.15 Numerical investigations of failure drivers of the PCB [46]: (a) Linear regression of
the averaged interconnection normal stress  zz versus the averaged PCB moment for

xi
 each interconnection during the entire simulation, and (b) effect of the inertial force
on the interconnection stress along z-axis.....................................................................21
Fig. 2.16 Failure drivers of the PCB [49]: (a) correspondence of the PCB strain and electrical
connectivity of the interconnection, and (b) excessive deformation of the
interconnection due to the differential deflection between the IC component and the
PCB ...............................................................................................................................22
Fig. 2.17 FE model of potted electronics [51] ..............................................................................23
Fig. 2.18 Embedded electronics in smart ammunitions: (a) partially potted configuration, and
(b) fully potted configuration [52] ...............................................................................23
Fig. 2.19 Displacements of the processor boards for both the potted and un-potted
configurations [51] ........................................................................................................24
Fig. 3.1 Demonstration of the micromechanical FE modelling approach ..................................27
Fig. 3.2 A schematic of plain-weave geometry [26] ..................................................................28
Fig. 3.3 Homogenized properties of fiber bundles using different micromechanical schemes (a)
transverse bulk modulus, (b) transverse shear modulus, (c) axial shear modulus, (d)
axial Young’s modulus, and (e) axial Poisson’s ratio ...................................................31
Fig. 3.4 A schematic of undulating bundle.................................................................................32
Fig. 3.5 FE model of the periodic cell model .............................................................................34
Fig. 3.6 Element size convergence tests for the FE unit cell model ..........................................35
Fig. 3.7 A comparison between the FE model and the experimental sample ............................35
Fig. 3.8 Description of the lateral boundaries in FE model........................................................36
Fig. 3.9 Stress profiles (Unit: Pa) for the six independent loading conditions (a) 1 = 0.1, (b)

 2 = 0.1, (c)  3 = 0.1, (d)  4 = 0.1, (e)  5 = 0.1, and (f)  6 = 0.1, noting that all other
strains equal to zero.......................................................................................................37
Fig. 3.10 A schematic of the multilayer model [14].....................................................................39
Fig. 4.1 A configuration of JEDEC standard board with 15 components ..................................47
Fig. 4.2 A schematic of the potted PCB assembly configuration ...............................................47
Fig. 4.3 A schematic of the solder-underfill interconnection .....................................................48
Fig. 4.4 A schematic of the solder-underfill interconnection configuration (the right graph
shows the simulation of the RVE with dimensions in mm [46]) ..................................50

xii
Fig. 4.5 The three methods used to model the interconnection and their different mesh styles:
(a) conventional bonded interconnection, (b) tie-bonded interconnection, and (c)
homogenized interconnection .......................................................................................50
Fig. 4.6 A schematic of FE model as per JEDEC standard JESD22-B111: (a) a full FE model
of the PCB assembly, and (b) a quarter FE model of the PCB assembly .....................51
Fig. 4.7 A comparison between the different modelling approaches: (a) time variation of
deflection at PCB center, and (b) history curves of the maximum normal stresses in
the corner cell of the solder-underfill interconnection ..................................................52
Fig. 4.8. Contour plots of the normal stress in the interconnection at 0.90 ms using: (a) the
fully bonded approach, and (b) the homogenization approach (The intervals of the
contour bands are unequal for viewing clarity).............................................................53
Fig. 4.9. A free body diagram of PCB assembly with solder-underfill interconnections
modelled as continuous distributed axial springs..........................................................54
Fig. 4.10. A comparison of normal stress σzz in the interconnection between numerical (FE) and
analytical predictions based on the approach in Ref. [71] ............................................55
Fig. 4.11 Details of the board subjected to the specified boundary and loading conditions ........57
Fig. 4.12 History plots of the center deflection of the PCB subjected to the normal loading
along z-axis using different elements ...........................................................................59
Fig. 4.13 Discretized geometry of the un-potted PCB assembly .................................................60
Fig. 4.14 Discretized sectional view of the FE model with the cutting plane parallel to the x-z
plane: (a) a single layer potting configuration, and (b) a bilayer potting configuration60
Fig. 4.15 The FE impact model of the PCB with IC components encapsulated by a bilayer resin61
Fig. 4.16 Mesh convergence tests for the single potting configuration with a potting modulus
of 0.05 GPa subjected to a short duration impulse........................................................62
Fig. 4.17 Discretized FE models: (a) non-potted embedded electronics, (b) a single layer
potting design, and (c) a bilayer potting design ............................................................63
Fig. 4.18 FE model specifications: (a) demonstration of the loading and boundary conditions,
and (b) loading profile taken from gun-launch test [33] ...............................................64
Fig. 4.19 Mesh convergence study for the non-potted configuration subjected to the long
duration shock loadings (a) PCB central deflection, and (b) stress  zz in the

interconnection ..............................................................................................................65

xiii
Fig. 5.1 A detailed description of the bottom-up multi-level micromechanics homogenization
scheme ...........................................................................................................................66
Fig. 5.2 Normal stress  zz distribution in solder interconnection: (a) current FE results, and (b)
results from Lai et al. [44] .............................................................................................68
Fig. 5.3 Preliminary experimental validation: (a) CAD model of the un-potted circuit design,
and (b) an example of an encapsulated PCB assembly [73] .........................................69
Fig. 5.4 The normal stress  zz in the interconnection for the un-potted case ...........................70

Fig. 5.5 Contour plots of the stress distribution (Unit: Pa) in the interconnections for the
single potting configuration with potting modulus of 1GPa at 1.0 ms: (a) stress  zz ,
and (b) von Mises stress ................................................................................................71
Fig. 5.6 Effect of different potting moduli of the single potting on the interconnection stress
history............................................................................................................................71
Fig. 5.7 Effect of the potting moduli for the single potting configuration: (a) maximum
normal stress  zz in the central component interconnection, and (b) maximum central

deflection of PCB ..........................................................................................................72

Fig. 5.8 Effect of various potting materials and configurations on the maximum normal stress
 zz in the central interconnection ..................................................................................73
Fig. 5.9 History curves of the stresses in the interconnections for four representative
components: (a) U8, (b) U10, (c) U13 and (d) U15 as indicated in Fig. 4.1 with
various potting materials ...............................................................................................74
Fig. 5.10 Effect of the potting modulus of the bilayer encapsulation on the maximum
interconnection stress along the z-axis: (a) effect of the exterior potting modulus, and
(b) effect of the interior potting modulus ......................................................................75
Fig. 5.11 Deflection at the PCB center of the non-potted electronics subjected to long duration
shock loading ................................................................................................................76
Fig. 5.12 Stress  zz history for the corner interconnection of the central component (U8) ........76

Fig. 5.13 Stresses in the central component (U8) interconnection stress: (a)  zz , and (b) von

Mises stress ...................................................................................................................77

Fig. 5.14 Interconnection stress  zz comparison between the single layer and bilayer
encapsulation designs in the central component (U8)...................................................78
xiv
Fig. 5.15 Effect of the potting modulus of the bilayer design on the maximum interconnection
stress along the z-axis (a) effect of the exterior potting modulus, and (b) effect of the
interior potting modulus ................................................................................................79
Fig. 5.16 Interconnection stress results predicted by the modal superposition method and the
direct integration method for: (a) potting modulus 0.05 GPa, and (b) potting modulus
20 GPa ...........................................................................................................................87
Fig. 5.17 Frequency analysis of the interconnection normal stress history along the z-axis using
FFT for both the single and bilayer potting configurations ..........................................90
Fig. 5.18 Stress histories at the corner of the central component corresponding to different
modes, also compared is the total stress response obtained from the summation of the
first 20 modes ................................................................................................................92
Fig. 5.19 Effect of the potting moduli for the single potting configuration: (a) short duration
impulse, and (b) long duration shock loads ..................................................................94

xv
 List of Tables

Table 1.1 Problem Specifications as per sponsor’s requirement ....................................................3

Table 2.1 A comparison between the through-hole and the surface mount technologies ..............8
Table 3.1 Bundle sizes, crimp geometry, and fiber volume fractions ...........................................28
Table 3.2 Elastic properties of glass fibers and epoxy matrix [28] ...............................................30
Table 3.3 Averaged Young's moduli of the warp and fill fiber bundles .......................................33
Table 3.4 Homogenized elastic properties of the single composite ply ........................................39
Table 3.5 A comparison between the experimental findings and micromechanics predictions of
the elastic moduli of a multilayer PCB .........................................................................40
Table 4.1 Material parameters for the solder,underfill and homogenized interconnection ...........51
Table 4.2 Computational cost for the different modelling approaches .........................................53
Table 4.3 Basic parameters for the analytical solutions ................................................................55
Table 4.4 Material constitutive parameters used in the FE simulations........................................56
Table 5.1 Variation of the elastic moduli of the PCB as found experimentally and predicted
theoretically using micromechanics ..............................................................................67
Table 5.2 Variation of the local oscillation of the stress response considering the different
bilayer potting configuration .........................................................................................79
Table 5.3 The predicted first six modes of the single potting case (potting modulus = 0.05 GPa)80
Table 5.4 Deformation of the PCB of the first six modes for the single potting case (potting
modulus = 0.05 GPa) ....................................................................................................82
Table 5.5 The predicted first six modes of the bilayer potting case (potting modulus = 0.05 GPa
(exterior) and 20 GPa (interior)) ...................................................................................83
Table 5.6 The predicted first six modes of the bilayer potting case (potting modulus = 20 GPa
(exterior) and 0.05 GPa (interior)) ................................................................................84
Table 5.7 Eigen frequencies and participation factors of the first six modes for the different
potting configurations investigated ...............................................................................86
Table 5.8 Computational cost comparison between different modelling approaches...................87
Table 5.9 Comparison between the dominant mode frequency and the primary frequency of the
stress history response using FFT .................................................................................91

xvi
 Chapter 1
Introduction and Justification

1.1 Statement of the Problem

Modern integrated circuit technology utilizes integrated circuit packages that include integrated
circuits (IC) with high lead count, relatively fragile interconnectors, high power dissipation, and
fast switching speeds. In order to operate properly and reliably, these circuits must be protected
from extreme operating temperatures, mechanical shock, electromagnetic interference, and
electrostatic discharge. Of particular interest to this thesis is the response of the ICs to relatively
short duration mechanical impulse and long duration shock loads. Short duration impulse refers
to impact loads with intensity of 1500-2000 Gs lasting less than 1ms, as shown in Fig. 1.1 (a).
On the other hand, relatively long range shock loads refer to high intensity loads generated as a
result of excessive G loads of 10,000-20,000 Gs lasting 10 ms, as shown in Fig. 1.1 (b). For
instance, Fig. 1.2 shows an example of the embedded electronics in smart ammunitions subjected
to long duration shock loads generated during a gun launch. These impulse and shock loads
when imposed on in-service integrated circuit chips and printed circuit boards (PCB) could lead
to high stresses on the PCB substrate, component packages, component leads and solder joints.

In the context of electronic packaging, electronic assemblies are often encapsulated with
polymeric resins to improve their reliability; a process known as "potting/encapsulation" (see Fig.
1.1 (c)). The potting resins are used to protect the electronics against shock loads, vibration,
moisture and corrosive agents [1-9].

(a) (b)

1
 (c)

Fig. 1.1 A schematic of the problem under investigation: (a) short duration impulse, (b) long
duration shock loads, and (c) protection of ICs using polymeric encapsulation

Fig. 1.2 A schematic of embedded electronics in smart ammunitions

The work presented in this thesis is a subset of a more comprehensive client sponsored project
concerned with the survivability of embedded electronics subjected to propellant-induced shock
loads in a confined volume. The project is concerned with two topics. The first is concerned with
the multi-physics modelling of the coupled behavior of precision guided projectiles (PGP)

2
subjected to intense shock loads [10]. This work is mainly concerned with the overall system
behavior accounting for the influence of the barrel, the air, and the propellant to assist in
developing a realistic acceleration curve for the PGP. Following this, the second study is
specifically focused on the effective mitigation of shock loads in embedded electronics in smart
ammunitions using polymeric encapsulation. The overall design specifications provided by the
sponsor are given below in Table 1.1.

Table 1.1 Problem Specifications as per sponsor’s requirement

PCB Dimension 132 mm × 77mm × 1mm

IC Package 10mm × 10mm : 3 (row) × 5(column) evenly distributed

Available Potting Space 145mm × 85mm ×80 mm

(i) Short duration impulse due to drop impact
Shock Loading Scenarios
(ii) Long duration shock loads due to gun launch

1.2 Research Objectives

The objective of the proposed research is to design a novel shock attenuation system (SAS) using
polymeric potting materials that will protect embedded electronics in smart ammunitions against
high G-shock loads. Specifically, it is the aim of this research program to:
(i) Construct bottom-up multi-level micromechanics based homogenization models,
accounting for complex constitutive material models of a multilayer circuit board, to
determine the effective elastic properties of the PCB for the FE simulations,
(ii) Conduct three-dimensional high-resolution dynamic FE simulations to evaluate the
structural integrity of the potted PCB assembly in response to both short duration impulse
and long duration shock loading conditions, and
(iii) Evaluate the effectiveness of a number of protective encapsulating (potting) designs to
attenuate the shock loads, and validate the findings using analytical solutions, mode based
analysis and existing results.

3
1.3 Method of Approach
The method of approach is illustrated in Fig. 1.3. Firstly, two independent homogenization
schemes were carried out to obtain the effective elastic properties of the materials used for the
subsequent dynamic FE models. Specifically, (i) different micromechanics schemes are used and
compared to determine the homogenized elastic properties of the multilayer PCB, and (ii) the
equivalent elastic properties of the solder-underfill interconnections are also obtained
considering their periodicity. Secondly, a series of three-dimensional FE simulations were
carried out, using the commercial FE software ABAQUS, to investigate the dynamic response of
different potting designs subjected to short duration impulse with the amplitude of 1500-2000 Gs
lasting less than 1ms. Thirdly, both explicit and mode based FE simulations are conducted to
treat the long duration shock loading condition, in which the acceleration is of the order 10,000-
20,000 Gs and lasts ~10-15 ms. Finally, the results are validated using preliminary experiments
and existing results from the literature.

Fig. 1.3 A schematic of the method of approach

4
1.4 Layout of Thesis

The thesis is divided into six chapters. Chapter One justifies the undertaking of the study and
outlines the adopted methodology. Chapter Two presents a critical literature review of the effect
of various shock loadings upon the mechanical integrity of embedded electronics in general and
smart ammunitions in particular. Chapter Three is devoted to the micromechanical modelling
of embedded electronics in smart ammunitions to determine the equivalent elastic properties for
use in the FE simulations. Chapter Four gives the details of the three-dimensional FE models
developed herein for characterizing the dynamic response of embedded electronics subjected to
both short duration impulse and long duration shock loads. Details of the geometry, element
selection, material constitutive relationship, explicit/mode-based FE dynamic modelling
techniques and convergence tests are also provided in the chapter. Chapter Five summarizes
the results of the finite element simulations and outlines the major findings of this work.
Chapter Six concludes the work and presents areas for possible future exploration.

5
 Chapter 2
Literature Review

Summary: In this chapter, we provide a critical literature survey of the effect of various shock
loadings upon the mechanical integrity of electronic devices. The review is divided into three
sections: (i) modelling of PCB, (ii) dynamic response of embedded electronics to short duration
impulse, and (iii) dynamic response of embedded electronics to long duration shock loads.

2.1 Printed Circuit Board

2.1.1 Definitions

A printed circuit board houses resistors, capacitances, IC components and light-emitting diodes
(LED). A typical example showing the detailed components forming the IC is provided in Fig.
2.1. Printed circuit boards mechanically support and electrically connect electronic components
using conductive tracks, pads and other features etched from copper sheets laminated onto a non-
conductive substrate (see Fig. 2.2). Multilayer printed circuit board has been used extensively in
electronic packaging assemblies, and its mechanical reliability has become the subject of intense
interest [11]. The deflection of PCBs could lead to the failure of the mounted electronics,
especially as a result of drop impacts [12]. As shown in Fig. 2.2, the constituents of a multilayer
laminate in a PCB is a combination of copper foils and composite plies consisting of woven
glass/epoxy substrate [13].

Fig. 2.1 A typical printed circuit board and its mounted components

6
 Fig. 2.2 A schematic of a six-layer circuit board and the structure of woven composite ply [14]

The advent and widespread adoption of portable electronics, such as laptops, tablets, and smart
phones, have increasingly pushed the trend of miniaturization in electronics applications. Faster
processing and energy reduction also continue to be major concerns for manufacturers. Two
types of package mounting methods, that is, through-hole technology (THT) and surface mount
technology (SMT), are used in industry, as shown in Fig. 2.3. Through-hole technology uses line
leads that are connected to the board after inserting through a drilled or punched hole in the
board. However, as a result of high-density industrial packaging methods for delicate or
complex components, such as the ball grid array (BGA), these devices are typically directly
mounted to the board using ball/pad joint connections or lined leads; such devices are called
surface mount technology. The surface mount technology has largely replaced the through-hole
technology for complex components. The key differences between the mounting technologies,
particularly the advantages and disadvantages of each, are summarized in Table 2.1. In view of
the increasingly wide use of the surface mount technology and as per the sponsor’s requirement,
attention will be devoted to the surface mounted IC package case.

7
 (a) (b)
Fig. 2.3 Two types of package mounting technologies: (a) through-hole technology, and (b)
surface mount technology

Table 2.1 A comparison between the through-hole and the surface mount technologies [15]

Description THT Components SMT Components

Leaded joints are compliant, Solder joints are non-

Solder Joint
except for very large compliant, joint reliability is an
Compliance
components issue

Lead Pitch (mm) Typical 2.5 mm, min. 1 mm Typical 1.25 mm, min. 0.3 mm

Lead to Board
Through holes or socket Surface pads (typical)
Attachment

Coefficient of Thermal
No concern, except for very Reliability issue
Expansion (CTE)
large components
Mismatch

Small size, weight are

Component Size / Larger, taller, heavier than
advantages for portable
Weight SMT
products

8
2.1.2 Micromechanics Modelling of PCB

The material property of PCB plays a vital role in determining the overall dynamic response of
the embedded electronics. Several analytical models have been developed in the literature to
investigate the mechanical properties of woven composite. Ishikawa and Chou [16-19] have
proposed two one-dimensional models: the mosaic model and the fiber undulation model. In the
mosaic model, the woven fabric has been idealized as an assemblage of asymmetrical cross-ply
laminates neglecting the continuity and undulation of the fiber bundles. On the other hand, the
fiber undulation model accounts for the continuity and undulation of fibers in a fabric, while it
was suitable only for weaves with a lower number of repeats. Naik and Shembekar [20,21]
improved the fiber undulation model by considering the two-dimensional extent of the fabric.
The various parameters of fabric geometry, including gaps between the fiber bundles, laminate
configuration were taken into account and their effects were examined. They further extended
the method to predict the thermal expansion coefficients.

Sottos et al. [22] introduced two micromechanical models for predicting the thermo-elastic
properties of woven glass laminates, as shown in Fig. 2.4. The “equivalent” laminate model
(EQLAM) utilizes the simplified representation of the woven fabric laminate with a symmetric
three-ply crossply laminate. The overall properties of the laminate are then obtained by using the
classical lamination theory. The basic strategy of the blending model (BLEND) is to first
calculate the intermediate matrix using the properties of the fill bundles. The warp bundles are
assumed to reinforce this intermediate fill ply. Then instead of using lamination theory, Halpin–
Tsai equations were used to combine the warp fiber properties with the calculated properties for
the intermediate fill ply. The Euler-Bernoulli beam theory was employed in the theoretical model
proposed by Lee and Harris [23] to predict the effective moduli of composite laminates with
wavy patterns. The principle of minimum potential energy was applied to determine the
displacement field of the curved beam and the effective moduli of the composite. Ito and Chou
[24] employed the curved beam model for determining the effective moduli and the stress field
of the plain-weave composites under tension loading.

9
 (a) (b)

Fig. 2.4 (a) EQLAM model, and (b) BLEND model [22]

Computational methods have also been utilized to determine the mechanical properties of woven
composites. For example, Shindo et al. [25] investigated the thermo-mechanical response of the
non-metallic woven composites by using the FE method. Sankar et al. [26] determined the
flexural stiffness coefficients of the composite beam by using a two-dimensional unit cell.
Dasgupta et al. [27] determined the effective thermo-mechanical properties of the plain-weave
fabric-reinforced composite laminates by employing the micromechanical techniques. The
effective orthotropic tensors of the thermo-elastic stiffness and the thermal conductivity have
also been obtained in their study using appropriate averaging schemes. Low and Wang [18]
presented a hybrid modelling technique to describe the behavior of the multilayer multi-material
composite containing both metallic and woven composite plies.

10
2.2 Short Duration Impulse and Long Duration Shock Loads

2.2.1 Definition of Shock Loads

Shock is defined as a vibratory excitation with a duration between once and twice the natural
period of the excited mechanical system [28]. It is characterised by high intensity and vibration
at varied frequencies. Shock occurs when a field variable is abruptly changed to a transient state
in the system being considered. Several types of shock signals are widely used by researchers
due to their simple mathematical descriptions, such as half-sine, triangular and rectangular shock.
However, the real shock loads in practice are fairly complex consisting of varied frequency
signals and superimposed noise.

In this thesis, two types of dynamic loadings are considered. The first is concerned with the drop
impact test that induces short duration impulse of the order of 1500-2000 Gs; the duration of
which is usually less than 1ms depending on the striking surface properties. The second is
concerned with the relatively longer duration shock loads typically experienced in gun launch,
which generally lasts around 10-15 ms with accelerations of the order of 10,000-20,000 Gs. In
the following sections, we will provide a literature review of the embedded electronics subjected
to both the short duration impulse and long duration shock loads.

2.2.2 Short Duration Impulse using Board-level Drop Test

Three levels of tests are carried out to characterize the reliability of electronics subjected to short
duration impulse. They are the product level, board level and component level test. For the
product level drop-impact tests, no standard guideline is currently available and most of these
tests are carried out by equipment manufacturers [29,30]. Therefore, their experimental data are
confidential to some extent [29]. The component level test is mainly performed to evaluate the
fracture resistance of the electronics solder interconnections. Two typical methods; namely, the
ball impact shear test and pendulum ball impact test are used. The board-level drop test has been
conducted particularly to investigate the solder joint reliability of surface mounted electronic
components. Two typical categories of board-level drop tests; namely, the free drop test [31]
and the pulse-controlled drop test [29, 30] are widely performed. The free drop test is easy to
perform, while the results are difficult to analyze considering the data consistency and

11
reproducibility. Therefore, the pulse-controlled drop test, which is regulated by Joint Electron
Device Engineering Council (JEDEC) is widely adopted in both scientific research and industry.
Fig. 2.5 shows the typical drop test apparatus and the mounting scheme for PCB assembly based
on JEDEC document JESD22-B111. The standard provides detailed specifications for the shock
pulse as well as the materials, construction, and layout of the PCB. The board footprint and
layout is shown in Fig. 2.6. The overall board size shall be 132 mm × 77 mm that can
accommodate up to 15 components of same type in a 3 rows by 5 columns format. The
maximum component size shall be 15 mm in length or width and there shall be at least 5 and 8
mm gap between the components in x- and y-direction, respectively. All 15 sites on each side of
the board (top and bottom) shall have the same component footprint. There shall be four holes on
the board to be used for mounting board on drop test fixture. The locations of these holes are
shown in Fig. 2.6.

Experience with the different board orientations suggests that the horizontal board orientation
with components facing downward results in maximum PCB flexure; it is considered the worst
orientation that promotes failures. Therefore, this standard requires that the board shall be
horizontal in orientation with components facing downward during the test. This JESD22-B111
standard requires service condition B (1500 G, 0.5 millisecond duration, half-sine pulse), as the
input shock pulse to the printed circuit assembly. An accelerometer mounted at the center of base
plate or close to the support posts to measure the acceleration.

Fig. 2.5 A typical drop test apparatus and mounting scheme for the PCB assembly based on the
JEDEC document JESD22-B111 [29]
12
 Fig. 2.6 Test board size and layout [29]

The relation between the magnitude of the resultant impulse and drop height can be deduced as
follows. Assuming the of half-sinusoidal shape shock profile as follows:

 t 
A  t   A0 sin   (2.1)
 tw 

where A0 is the magnitude of acceleration and tw is the duration time. The area below the

acceleration profile is equal to the change in velocity, which is dependent on the initial impact
velocity v0 as:


A0tw  Cv0 (2.2)
2

where C is the rebound co-efficient (1.0 for no rebound and 2.0 for full rebound). Theoretically,
the drop height H needed to achieve the impact velocity can be determined as follows,

v02
H (2.3)
2g

Therefore, A0 and tw are related to the drop height such that,


A0tw  C 2 gH (2.4)
2

13
Given the drop height or the impact velocity, the pulse magnitude will be inversely proportional
to the pulse duration time.

2.2.3 Long Duration Shock Loads using Gas Gun

The gas gun is a high speed generator of the projectile that utilizes the explosive force
of combustible gases, such as hydrogen mixed with oxygen, as propellant, see Fig. 2.7. The
projectiles are subjected to severe shock loads resulting from the ignition of the propellant during
the launch. Upon ignition, the combustion of the propellant produces high-pressure gases that
lead to the acceleration of the projectile within the confined volume of the barrel. Such a launch
process can be divided into two phases: the confined volume acceleration and free flight that are
known as set back and set forward phases, respectively [10]. The transition from confined
volume to free flight is known as the muzzle exit.

The gas gun apparatus is widely used in projectile launch experiments to study the high-
speed impact phenomena. Fig. 2.8 shows the experimentally recorded axial acceleration profile
of the Army’s 155-mm projectile Excalibur; the peak value of which reaches 15000 Gs.

Fig. 2.7 Gas gun facility for low-velocity impact testing [32]

14
 Fig. 2.8 Experimentally recorded axial acceleration profile of a projectile by ARDEC Picatinny
(USA) [33]

2.3 FE Modelling of Impulse and Shock Loads

2.3.1 Encapsulating Electronics

Due to the highly dynamic nature of the impact and gun launch process, further protection means
are needed for these embedded electronic systems. In industry, electronic assemblies are often
filled with a solid polymeric compound; a process known as "potting/encapsulation". The most
common types of potting compounds are polyurethane, acrylic, epoxy resin, and silicone. These
materials vary in modulus from very flexible to stiff, and are designed to withstand many
different types of environments. Fig. 2.9 shows a snapshot of a typical potting process of
different electric components. The major purpose of the potting is to provide protection against
moisture, chemical attack, and cushioning from shock. Currently, it has become one of the most
viable and cost effective methods to protect electronics that are subjected to high G shock loads.

15
 Fig. 2.9 A typical example of potting of IC components [34]

2.3.2 FE Modelling of Short Duration Impulse

It is known that the dynamic strains and stresses of solder joints directly affect the solder joint
reliability during drop impact. However, there exists no suitable direct means to measure these
quantities. As an alternative, one can use the dynamic response of the PCB as a good measurable
indicator, since it is closely related to the strain and stress states induced in the solder joint.
Computer simulations are widely used to study the drop reliability of the PCB assembly. Some
researchers [35-38] modeled the entire test apparatus and simulated the complete impact process,
as depicted in Fig. 2.10 (a). On the other hand, some researchers [39-41] followed the so-called
input-G method (Fig. 2.10 (b)), where only the PCB assembly was modeled and a predefined
shock pulse is directly imposed to the PCB at the supporting positions to significantly save the
computational cost. The drop table, fixture, contact surface, and friction of guiding rods are not
simulated, but their complex effects are considered indirectly by using the same impact pulse as
experiment. Subsequently, the same impact pulse can be applied for design analysis of
PCB/package geometry and material. This standard “numerical” drop test will produce consistent
and realistic testing results. Due to the simplicity of input-G method, its solution time is three
times faster than the conventional free-fall drop model, using the same element mesh size of
PCB and package.

16
Yeh and Lai [ 42 ] developed the support excitation scheme (Fig. 2.10(c)) converting the
acceleration loads to the inertial body forces with the aid of an implicit solver. The equation of
motion is expressed as

Mw  Kw  MYb (2.5)

where Yb is the displacement of the base, and w is the deflection of the PCB. By this the
acceleration shock pulse at the support is converted into the inertial body force that is to be
prescribed over the PCB assembly. Luan and Tee [39] concluded that the implicit and the
explicit input-G methods were comparable in terms of the solution time and accuracy.

(a)

(b) (c)

Fig. 2.10 Typical modelling techniques: (a) direct modelling method [37], (b) input G method,
and (c) support excitation scheme [43]

17
Lai et al. [44] conducted a series of parametric studies on the board-level reliability of wafer-
level chip-scale packages subjected to a specific pulse-controlled drop test condition. Fig. 2.11
shows the quarter symmetry finite element model of the board-level test, constructed using linear
hexahedral solid elements. The transient analysis follows the support excitation scheme and
incorporates an implicit time integration solver.

Fig. 2.12 shows the normal stress  zz in the solder interconnections on both the package side
and the test board side, respectively. It was found that the outermost solder joint is the most
critical among all during the drop impact. The maximum normal stress occurs at around the inner
rim of the critical solder joint on the package side while at around the outer rim on the test board
side. This pattern also agrees well with the experimental observation on crack initiation and
propagation on the critical solder joint under a board-level drop test [45].

Fig. 2.11 Finite element model of the board-level drop test [44]

18
 (a) (b)

Fig. 2.12 Normal stress  zz distribution (Unit: MPa) in solder interconnections: (a) on

package side, and (b) on test board side for a representative IC component [44]

Yang et al. [ 46 ] developed a novel and computationally efficient multi-level approach to

investigate board level drop reliability of PCB assembly. The approach is composed of two
levels of FE simulations: solder joint level and board level. Initially, static simulations of the
solder joint level were used to obtain the homogenized properties of the solder-underfill
interconnection. This was followed by explicit FE simulations of the board assembly. Through
drop test simulations that involved fifteen IC packages, as per the standard JESD22-B111, the
critical spots subjected to the largest normal stresses during the simulation of board drop across
the entire board can be easily identified as shown in Fig. 2.13. Fig. 2.14 shows the predicated
susceptible locations for the failure of the solder joints, which gather along the diagonals of the
central region of board based. A similar conclusion was also reached experimentally by Lai et al.
[47].

Fig. 2.13 Contour plots of the normal stress distribution in interconnection at of 0.8 ms (The
value labels show the maximum normal stress (MPa) occurred at each interconnection corner
during the whole simulation time) [46]

19
 Fig. 2.14 Susceptible failure locations of the solder joints (indicated by the red indicators) from
the drop test experiments following JESD22-B111 standard by Lai et al. [47]

Two main drivers may be responsible for the failure of the electronics under shock loading: (a)
excessive flexing or bending of the circuit board, and (b) the inertia forces. These factors were
investigated analytically by Wong et al. [48], numerically by Yang et al. [46] and experimentally
by Seah et al. [ 49 ]. For instance, Yang et al. [46] presented a direct correlation of the
interconnection stress and PCB bending moment based on the multi-level FE simulations. Fig.
2.15 (a) shows the strong correlations between the interconnection normal stress and the PCB
moment. The interconnection stress caused by the inertial force of IC package was also
investigated. The normal stress in interconnection due to the inertial force of IC package can be
calculated from the acceleration of the package, i.e.:

ma
 inertia  (2.6)
Aarea

where m , a , Aarea are the mass, acceleration and base area of the mounted package, respectively.
As shown in Fig. 2.15 (b), the results indicate that the stress caused by inertial force is negligible
compared to that caused by PCB bending.

20
 (a) (b)
Fig. 2.15 Numerical investigations of failure drivers of the PCB [46]: (a) Linear regression of the
averaged interconnection normal stress  zz versus the averaged PCB moment for each
interconnection during the entire simulation, and (b) effect of the inertial force on the
interconnection stress along z-axis

Experimental work was also carried out to investigate the dominant failure driver of PCBs
subjected to drop impact. For example, Seah et al. [49] conducted a series of board-level
experiments designed to separately study each of the failure drivers. It was also found that board
flexing due to direct impacts is the most severe response due to the generated large strain
amplitudes. In fact, a significant reduction in the failure occurrences was observed when the PCB
was subjected to the high inertial loads, while constrained from bending. In addition, one-to-one
correlation between the measured electric resistance of the interconnection and the PCB surface
strain (Fig. 2.16(a)) indicates that the PCB bending is the dominant failure driver over the inertia
of the IC components. The mechanism affecting the failure of interconnections under the PCB
bending is shown in Fig. 2.16(b) [49]. The bending of the PCB leads to large differential flexing
between the PCB and the IC components that cannot be accommodated by the deformation of
the interconnections.

21
 (a) (b)
Fig. 2.16 Failure drivers of the PCB [49]: (a) correspondence of the PCB strain and electrical
connectivity of the interconnection, and (b) excessive deformation of the interconnection due to
the differential deflection between the IC component and the PCB

2.3.3 FE Modelling of Long Duration Shock Loads

The embedded electronics in smart ammunitions contains onboard computers, GPS, micro-
electro-mechanical systems and integrated circuits at different locations, which are responsible
for guidance, navigation, and control [10]. The electronics employed are expected to retain
functionality. In this section, we review the FE modelling of the case of the embedded
electronics subjected to shock loads resulting from gun launch.

Some studies have been carried out to investigate the structural reliability of electronics
assembly under long duration shock loads. However, only a few efforts investigated the
effectiveness of the potting materials in terms of the shock attenuation. Jiang et al. [ 50 ]
investigated the effect of Young’s modulus of the encapsulation resin on the modal frequency of
an encapsulated MEMS accelerometer, and found that the modal frequency was reduced after the
electronics was encapsulated in a soft resin. Chao et al. [51] carried out dynamic simulations of
an electronic assembly embedded in a metal can subjected to shock loads from a gun-launch, as
depicted in Fig. 2.17. To illustrate the benefits of potted electronics during the gun launch, two
examples were examined. Both of these examples include a processor board, one MEMS-device
mounted on a PCB, which is supported by a frame structure, and a can with cover. The first
example is an un-potted design. The processor board is supported underneath on its
circumference by a small steel support ring, which is attached to the inside can surface. The
second example is a potted design. The processor board is supported underneath by the potting

22
material. The potting material also completely encapsulates the MEMS-device packaging as well
as the frame structure. Similarly, Haynes et al. [52,53] compared the effectiveness of two potting
designs, as shown in Fig. 2.18. First, a fully potted assembly was evaluated which includes an
aluminum supporting can, an aluminum lid, a circuit board, 8 chips with solder, and 3 tied-
together sections of potting. Second, the same potting material was modeled as rings that gripped
the outside of the circuit board. Central grommets were employed to reduce the relative
deflections across the chips. Both of their results showed that the fully potted case resulted in
much lower stress magnitudes in the tested electronic package and interconnections. Furthermore,
it can be observed from Fig. 2.19 that the filling of the potting resin would yield a much smaller
deflection of the printed circuit board and the high frequency vibrations were also largely
attenuated.

Fig. 2.17 FE model of potted electronics [51]

(a) (b)

Fig. 2.18 Embedded electronics in smart ammunitions: (a) partially potted configuration,
and (b) fully potted configuration [52]

23
Fig. 2.19 Displacements of the processor boards for both the potted and un-potted configurations
[51]

24
 Chapter 3
Micromechanics Modelling of the Effective Properties of
Embedded Electronics in Smart Ammunitions

Summary: This chapter is devoted to developing a multi-level homogenization scheme to

predict the elastic properties of the common woven glass/epoxy composite substrate for the
multilayer circuit board applications. The homogenization process used to obtain the effective
properties can be divided into three main levels: (i) fiber bundles, (ii) woven composite substrate,
and (iii) multilayer laminate homogenization. The obtained effective properties are further used
for the shock loading analysis in the following chapters.

3.1 Description of the Problem

The microstructure of a multilayer PCB is actually a multi-level composite material. It is

composed of multi-layers with each layer composed of the matrix and the woven fiber bundles.
The fiber bundle is also a composite material if viewed at the smaller scale dimension. It is
composed of the fiber phase (fibers) and the epoxy phase. In most literature, multilayer PCB has
been modelled as a simplified single layer board using isotropic [54, 55] or orthotropic material
models [56] without considering its complex composite microstructure.

In this chapter, we developed a bottom-up multi-level micromechanics based homogenization

model to determine the equivalent material properties of the multilayer circuit board. Firstly, the
effective properties of the fiber bundle were determined using the different micromechanical
schemes. Secondly, the homogenized elastic properties of the woven composite substrate were
obtained by solving a FE-based boundary value problem of a unit cell. Finally, the classical
laminate theory was accounted for calculating the multilayer PCB moduli.

3.2 Micromechanics Based Homogenization Approach

Fig. 3.1 demonstrates the micromechanical homogenization process employed in this section.
Firstly, statistically homogeneous micromechanical schemes were used for the homogenization
of the fiber bundle scale considering the fiber waviness effect. Secondly, a periodic FE cell was

25
developed. Due to the complexity of the microstructure, each element is regarded as one phase,
and strain concentration matrices based on each finite element is computed. In order to determine
the composite constitutive parameters, we make use of the following expression,

n
C    ciC i Ai (3.1)
i 1

where, C  is the equivalent composite stiffness matrix, C i is the stiffness matrix of the ith phase,
ci is the volume fraction of the ith phase, n is the total number of the phases. Ai is the strain
concentration matrix of the ith phase, which is defined as follows:

 i  Ai (3.2)

1i   A11 A12 A13 A14 A15 A16   

 i   1
 2   A21 A22 A23 A24 A25 A26   
 2
 i   A 
A32 A33 A34 A35 A36  3 
 3    31  
i.e.,  i   A41 A42 A43 A44 A45 A46   4 
 4i   
 5   A51 A52 A53 A54 A55 A56   5 
 
 i    
 6   A61 A62 A63 A64 A65 A66   6 

where,  i is the strain of the ith phase and  is the averaged strain applied on the boundaries.

26
 Fig. 3.1 Demonstration of the micromechanical FE modelling approach

3.3 Micromechanical Modelling of Fiber Bundles

3.3.1 Unidirectional Fiber Bundle Homogenization

The composite substrates used in circuit board applications are composed of epoxy matrix
reinforced with plain-weave glass fabrics. The fill and warp fiber bundles interlace with each
other in an orthogonal way. The microstructure of the substrate containing both fiber phase and
matrix phase is illustrated in Fig. 3.2. It is computational prohibitive to explicitly consider the
large number of fibers in the fiber phase in the model. Therefore, our model is first developed
based on the homogenization of the fiber bundles. In this study, the properties of one common

27
fabric style 7628, were investigated. Table 3.1 shows the geometric dimensions and volume
fractions of the fiber phase used in the model [57].

Fig. 3.2 A schematic of plain-weave geometry [26]

Table 3.1 Bundle sizes, crimp geometry, and fiber volume fractions

Aspect ratio Crimp Fiber volume fraction Fiber volume fraction

a/b h/d in composite in bundle

Warp 5.26 0.053 0.754 0.268

Fill 7.26 0.083 0.759 0.194

In order to obtain the equivalent properties of the fiber bundles, different micromechanical
schemes were used and compared, that is, the self-consistent scheme, the Mori-Tanaka scheme,
the three-phase scheme, and the composite cylinder assemblage (CCA) scheme. The Hashin–
Shtrikman bounds were also calculated to examine each micromechanical scheme. A brief
description of the micromechanics models used in this chapter is given below. The detailed
formulations of each micromechanics model can be found in Appendix A.

(i) Self-consistent scheme [58]:

The self-consistent scheme was originally developed to predict the elastic moduli of isotropic
polycrystalline materials. It was adopted to predict the homogenized moduli of the two-phase

28
isotropic (spherical inclusion reinforcement) or transversely isotropic (cylindrical fiber
reinforcement) composites.

(ii) Mori-Tanaka scheme [59]:

The Mori-Tanaka method is a simple modification of the self-consistent scheme which leverages
the Eshelby solution in a way that explicitly accounts for the matrix presence, albeit in an
average sense.

(iii) Three-phase scheme [60]:

The three-phase scheme is based on the geometric representation of the microstructure of an
inclusion embedded in the matrix phase, which in turn are embedded in an equivalent material
with homogenized moduli. Unlike the generalized self-consistent scheme, however, the entire
problem with the three discrete regions is solved in its entirety using the elasticity approach
instead of replacing the composite inclusion with an equivalent homogenized one.

(iv) CCA scheme [61]:

Composite cylinder assemblage scheme has been proposed by Hashin and Rosen [62] in the
1960's for calculating the effective elastic moduli of the statistically homogeneous dispersions of
cylinders that simulate unidirectionally-reinforced composites characterized by transversely
isotropic stiffness matrices. The CCA model reduces a complicated problem of determining four
of the five independent moduli of the statistically homogeneous unidirectionally-reinforced
composite to the analysis of a single composite cylinder under axisymmetric and longitudinal
shear loadings. Under such loadings, exact expressions for the pertinent moduli may be obtained
and the homogenized properties of the single composite cylinder and the entire assemblage of
such cylinders of varying sizes are equivalent.

29
Since the abovementioned schemes are valid only for the unidirectional fiber reinforced
composite without considering the waviness of the geometry, it is worth mentioning that the
fiber bundles in this section were considered as transversely isotropic material. The waviness
effect is considered in section 3.3.2. Table 3.2 provides the effective isotropic constitutive
parameters for both the fiber phase and the epoxy matrix phase.

Table 3.2 Elastic properties of glass fibers and epoxy matrix [28]

Constituent E (GPa) ν

Fiber 72.3 0.22

Matrix 3.05 0.33

As shown in Fig. 3.3, it could be observed that all the schemes yield results within the range of
Hashin-Shtrikmman bounds. Under transverse loading, only upper and lower bounds may be
obtained by using the CCA scheme because the single composite cylinder ceases to respond like
an RVE under homogeneous displacement or homogeneous traction boundary conditions.
Therefore, the three-phase model in this case is used to predict the transverse shear moduli, and
combined with the CCA scheme to provide all the homogenized constitutive parameters. It is
found that the Mori-Tanaka and CCA/Three-phase scheme yield similar results for the
homogenized properties, while there is a larger discrepancy for the self-consistent scheme result,
especially at high inclusion concentrations. In our model, the fiber volume fraction was 75%.

(a) (b)

30
 (c) (d)

(e)
Fig. 3.3 Homogenized properties of fiber bundles using different micromechanical schemes (a)
transverse bulk modulus, (b) transverse shear modulus, (c) axial shear modulus, (d) axial
Young’s modulus, and (e) axial Poisson’s ratio

3.3.2 Waviness Effect

The waviness of warp and fill would play an important role in determining the overall properties
of the resulting composite. Therefore, it is the objective of this section to account for the effect of
fiber waviness on the effective properties of the composite. Fig. 3.4 shows a schematic of an
undulating fiber bundle (coplanar with the x-z plane). The curve of undulation can be described
by,

31
 h 
z( x)  cos( x) (3.3)
2 d

where h and d are the thickness and the length of a unit cell, respectively. Assuming the fibers
are straight and oriented at angle  over a small section dx of the bundle, the angle can be
described by the slope of the curve; viz.,

dz
 ( x)   tan 1 ( ) (3.4)
dx

Fig. 3.4 A schematic of undulating bundle

Next, an orientation averaging scheme was employed. Firstly, the coordinate transformations
were used to determine the properties of the small segment after rotation at position x along the
length of the ply. According to tensor theory, the fourth-order stiffness tensor obeys the
following transformation scheme:

  cmnspliml jnlksllp
cijkl (3.5)

Reducing the indices of the stiffness tensor, the above transformation equation can be rewritten
as [63]:

cij  cmntimc t cjn (3.6)

where lij  cos( xi, x j ) ,

32
  l112 l122 l132 2l12l13 2 l13 l11 2l12 l11 
 
 l212 l222 l232 2l23l22 2l23 l21 2l22 l21 
 
l312 l322 l332
tij   
c 2l33l32 2l33 l31 2l32 l31

 l31l21 l32 l22 l33 l23 l33 l22  l32l23 l33 l21  l31l23 l31l22  l32l21 
 l31l11 l32 l12 l33 l13 l33 l12  l32l13 l33 l11  l31l13 l31 l12  l32l11 
 
 l21l11 l12 l22 l13 l23 l13 l22  l12l23 l13 l21  l11l23 l11l22  l12l21 

Secondly, the effective stiffness matrix of the warp and fill bundles are computed by averaging
the rotated properties along the axial direction as follows:

1

2d
Cijk  Cijk ( x)dx (3.7)
2d 0

where Cijk ( x) is the stiffness matrix of the fiber bundle along the axial direction of the fiber. Cijk

is the averaged stiffness matrix of the wavy fiber bundle. Table 3.3 shows the averaged Young's
moduli of the warp and fill, which were the input material properties in the present FE model.

Table 3.3 Averaged Young's moduli of the warp and fill fiber bundles

Ex Ey Ez
Micromechanical Fiber
schemes bundle (GPa) (GPa) (GPa)

Warp 54.30 30.96 30.67

Self-consistent scheme
Fill 30.67 31.15 53.70

Warp 52.91 15.27 15.38

Mori-Tanaka scheme
Fill 15.43 15.24 51.55

Warp 52.91 16.75 16.92

CCA/Three-phase
scheme Fill 16.95 16.69 51.54

33
3.4 Micromechanical FE Modelling of Woven Composite

3.4.1 Periodic Cell Model

Micromechanical analyses of the periodic heterogeneous materials were mainly conducted based
on the concept of the repeated unit cell (RUC). In our case, the woven composite substrate was
modeled using a unit cell with the periodic boundary conditions. Furthermore, due to the
symmetry of the microstructure, one quarter of the RUC (see Fig. 3.5) is sufficient for the
present analysis using the symmetric boundary conditions.

Fig. 3.5 FE model of the periodic cell model

3.4.2 Convergence Test

The model is discretized using the eight-noded solid elements (C3D8R) with reduced integration
scheme. The reduced integration scheme dramatically reduced the computational cost without
showing the discernable difference from the results obtained using the fully integration scheme.
The length of the quarter periodic cell is 1.69 mm along the warp direction and 1.08 mm along
the fill direction. The thickness of the cell model is 0.18 mm. In order to obtain the accurate
displacement and the stress fields in each unit cell, a sufficiently refined FE mesh was employed
to discretize the multi-phased cell. In Fig. 3.6, we conducted the convergence study and
examined the stress values (von Mises stress or stress  xx ) by stretching the unit cell with a
displacement of 0.018 mm along x-direction. Mesh was refined until the percentage variation in

34
the stress values is less than 1%. The final mesh density of the present model is selected using 20
elements along the thickness with minimum element size about 0.01 mm. The displacement and
traction continuity are guaranteed on the fiber/matrix interface by mesh consistency. A
comparison between the microstructure of the present FE model and that of the experimental
sample [22] is shown in Fig. 3.7.

Fig. 3.6 Element size convergence tests for the FE unit cell model

(a) Warp parallel face (b) Fill parallel face

Fig. 3.7 A comparison between the FE model and the experimental sample

35
3.4.3 Boundary Conditions

The analysis was performed on a parallel-piped FE unit cell of the fixed dimensions (X, Y, Z)
with the lateral boundary S as illustrated in Fig. 3.8 are:

S1: 0≤y1≤Y, 0≤z1≤Z, x1=X, n=(0,0,1)

S2: 0≤x2≤X, 0≤z2≤Z, y2=Y, n=(0,1,0)

S3: 0≤x3≤X, 0≤y3≤Y, z3=Z, n=(0,0,1)

S4: 0≤y1≤Y, 0≤z1≤Z, x1=0, n=(0,0,-1)

S5: 0≤x2≤X, 0≤z2≤Z, y2=0, n=(0,-1,0)

S6: 0≤x3≤X, 0≤y3≤Y, z3=0, n=(0,0,-1)

Fig. 3.8 Description of the lateral boundaries in FE model

The symmetric, anti-symmetric and periodic boundary conditions are given explicitly in
Appendix B for the six independent loading types. The stress contours for each loading condition
are shown in Fig. 3.9.

36
 (a) (b)

(c) (d)

(e) (f)
Fig. 3.9 Stress profiles (Unit: Pa) for the six independent loading conditions (a) 1 = 0.1, (b)  2 =

0.1, (c)  3 = 0.1, (d)  4 = 0.1, (e)  5 = 0.1, and (f)  6 = 0.1, noting that all other strains equal to
zero

Due to the large number of element, a MATLAB code was written to obtain the homogenized
stiffness and the compliance matrices of the woven composite. In our case, each element in the
FE unit cell is considered as an individual phase. Given the specified six types of loading and
boundary conditions, the resulting strain tensor of each element  i is obtained and the strain

37
concentration matrices Ai for each element are determined using Eq. (3.2).The homogenized
stiffness matrix for the PCB composite substrate will be calculated by considering all the element
contributions using Eq. (3.1). As an example, the stiffness and the compliance matrices based on
the CCA scheme are shown below.

 26.2379 4.9442 6.1132 0.0023 0.0021 0.0000   0.0436 -0.0210 -0.0067 -0.0000 -0.0000 -0.0000 
 4.9442 8.5383 5.4256 0.0010 0.0005 0.0001  -0.0210 0.1482 -0.0297 -0.0000 -0.0000 0.0000 
 
 6.1132 5.4256 22.7417 0.0011 0.0008 0.0003 -0.0067 -0.0297 0.0529 -0.0000 -0.0000 0.0000  1
C 
eff
 GPa S  
eff
 (GPa)
 0.0023 0.0010 0.0011 2.2444 0.0110 0.0020 -0.0000 -0.0000 -0.0000 0.4456 -0.0014 0.0004 
 0.0021 0.0005 0.0008 0.0110 3.4615 0.0060  -0.0000 -0.0000 -0.0000 -0.0014 0.2889 0.0008 
   
 0.0000 0.0001 0.0003 0.0020 0.0060 2.2377  -0.0000 0.0000 0.0000 0.0004 0.0008 0.4469

It can be observed from the matrices that the off-diagonal components corresponding to the
normal-shear coupling effect are negligible (small values due to the FE numerical errors). The
orthotropic constitutive law is given in Eq. (3.8). With the parametric values of the effective
compliance matrix, nine independent constitutive constants are obtained. Table 3.4 shows the
homogenized parameters obtained from the different micromechanics schemes. It can be
observed that the self-consistent scheme overestimates the predictions over the Mori-Tanaka and
the CCA schemes. This is attributed to that the self-consistent scheme essentially assumes that
the single inclusion is embedded in the infinite equivalent homogenized medium. Therefore, it
doesn’t account for the inclusion interaction neglecting the interactions between the neighboring
inclusions.

 1 v21 v31 
 E   
E2 E3
 1 
 v12 1 v32 
 
 1   E1   
0
E2 E3  1
     2  (3.8)
 2    v13 v
 23
1
 
 3   E1 E2 E3   3 
    4 
 4   1
 
 5   G12   5 
     6 
 6 
 
1
 0
 G13 
 1 
 
 G23 

38
 Table 3.4 Homogenized elastic properties of the single composite ply

Ewarp (GPa) Efill (GPa) Ethick (GPa)

Self-consistent scheme 22.2 21.0 8.55

Mori-Tanaka scheme 18.6 16.9 7.05

CCA / Three-phase scheme 19.2 17.5 7.29

3.5 Multilayer PCB Laminates Homogenization

A 1mm thick multilayer circuit board shown in Fig. 3.10 containing the six copper and the five
composite layers is considered in this section. The copper foil is of the electrodeposited style and
the associated pre-preg composite was of 7628 fabric style.

Fig. 3.10 A schematic of the multilayer model [14]

Based on the effective properties of the composite ply obtained from the micromechanical
homogenization, the multilayer PCB properties can be predicted through the classical laminate
theory. The homogenized equivalent elastic constants can be written in terms of constants of
each individual layer. The equivalent elastic constants can be determined using the following
constitutive relations:

 n  lCl 
 k k Ci 3  l 3 j
k

n C C
Cij   k  Cijk  i 3 k 3 j  l 1 C33  (3.9)
 n
l 
33 
k 1 C33 k
 C l 
 l 1 C33 

39
 Cij  C ji  0 , i=1,2,3,6; j=4,5 (3.10)

n
k
  C
k 1
ij
Cij  k
, i,j=4,5

   C 
n n k l (3.11)
k
44 C C C
l
55
k
45
l
54
k 1 l 1 k l

where,

k k
C44 C45
k  (3.12)
C54k C55k

volume of material k
k  (3.13)
volume of composite element

Table 3.5 shows one sample results of the equivalent elastic properties of the multilayer PCB
obtained from the CCA/Three-phase scheme. The complete results based on all of the
micromechanical models are provided and compared with the literature results in Chapter 5. The
determined equivalent elastic properties of the PCB, which shows the best fit to the existing
experimental data, will be used for the subsequent FE simulations to investigate the dynamic
response of embedded electronics subjected to impulse and shock loads.

Table 3.5 A comparison between the experimental findings and micromechanics predictions of
the elastic moduli of a multilayer PCB

Modulus (GPa) Poisson's ratio

Ex =31.1 Ey = 29.6; Ez = 7.40;

CCA/Three- vxz =0.39, vyz =
phase Scheme 0.36; vxy = 0.11
Gxz =7.65, Gyz =7.59; Gxy = 3.31

40
 Chapter 4
FE Modelling of Embedded Electronics Subjected to Short
Duration Impulse and Long Duration Shock Loads

Summary: The FE modelling is divided into two main efforts: (i) modelling of the embedded
electronics subjected to the short duration impulse as represented by drop impact, and (ii)
modelling of the embedded electronics subjected to the long duration shock loads experienced
during gun launch. We further discuss the developed 3D FE model in details; including the
geometry, the appropriate constitutive laws, the modelling approach adopted, the boundary and
loading conditions as well as the necessary mesh convergence tests.

4.1 Fundamentals of FE Dynamic Modelling using ABAQUS

In the following, we provide a summary of the basic equations upon which the commercial finite
element code ABAQUS is based. It is not the intention of this work to duplicate ABAQUS
software. The focus is to (i) study the dynamics of embedded electronics subjected to impulse
and shock loads, (ii) examine the effect of encapsulation upon the stress state of the ICs, and (iii)
devise methods to attenuate the effect of intense impulse and shock loads upon the integrity of
these embedded electronics.

The governing equation of the dynamic problem can be written as Eq. (4.1):

Mu  t   Cu  t   Ku  t   Q (4.1)

where, u is the nodal displacement vector, which contains the degrees of freedom (DOFs) to be
solved. M, C, K and Q are the mass matrix, damping matrix, stiffness matrix and the loading
vector, respectively. They are assembled from each FE element utilizing the shape function N
as expressed in the following Eqs.(4.2)-(4.5).

M     NNdV (4.2)
Ve
e

41
 C     NNdV (4.3)
Ve
e

K    B DBdV (4.4)
Ve
e

Q
e
  N fdV  
Ve

Se
NTdS  (4.5)

where, B is the strain matrix obtained from the shape function matrix N , D is the elasticity
transformation matrix. f and T are the body force and the surface tractions applied to the
structures, respectively. For many problems, the damping matrix cannot be easily determined. It
is usually assumed to be proportional to the mass and the stiffness matrices, as expressed in Eq.
(4.6). Such damping is called Rayleigh damping, with  and  being two constant coefficients.

C  M   K (4.6)

For problems involving the structural base motion, the control equations are usually set up for
the displacement response relative to the base motions. The control equations are as follow:

u  u  ub (4.7)

Mu  t   Cu  t   Ku  t   Mub  t  (4.8)

In the above equations, the base acceleration is converted into the applied inertia loads. It is
assumed that there is no damping acting on the rigid body movements, i.e.   0 for Rayleigh
damping. The base motion vector can be expressed in terms of the rigid body mode vectors Tj

multiplied by the time dependent amplitude z j . Where, subscript j is one of the 6 DOF directions;

viz.,

6
ub   Tj z j (4.9)
j 1

42
4.1.1 Explicit Integration Method

To solve the above dynamic problem, ABAQUS adopts the direct integration. It is based upon
obtaining the displacement and velocity at time t  t from the knowledge of those at times t
and t  t . The basic equations of the central difference scheme are listed as follows.

1
u  ut t  ut t  (4.10)
2t

1
u  ut t  2ut  ut t  (4.11)
t 2

 1 1   2   1 1 
 t 2 M  2t C  ut t  Qt   K  t 2 M  ut   t 2 M  2t C  ut t (4.12)
     

At start up, the solution of the first increment t can be obtained by assuming the displacement
at t as being:

t 2
ut  u0  tu0  u0 (4.13)
2

Where u0 can be determined from Eq.(4.1) such that,

u0  M1  Q0  Cu0  Ku0  (4.14)

The explicit integration method is conditionally stable. Its stability requires that the time
increment t must not exceed a critical value, i.e.,

2
t  tcr  (4.15)
n

where n is the highest natural frequency of the system. tcr can be approximated as the time it

takes for the stress wave to propagate across the smallest element, i.e., L/C, where L is the
smallest element size and C is the stress wave speed.

43
4.1.2 Modal Superposition Method

An important aspect of the current problem is the modal analysis. This is due to the fact that
modal analysis allows us to evaluate how the individual vibration modes of the structure affect
the overall dynamic response so that we can better understand the underlying mechanisms of this
problem. In addition, the modal superposition method will dramatically reduce the computational
cost compared to the direct full explicit FE simulations provided that the system is linear. In this
work, we adopted the modal superposition method to validate the FE results using direct explicit
scheme.

The modal superposition method is based on decomposing the full structural response into the
response of each mode by obtaining a solution of the generalized DOFs. The eigen frequencies
and eigen modes are firstly calculated. The discretized equations are then projected onto each
mode. Consequently, the response of the generalized DOF for that mode is solved. The
calculated responses of the investigated modes are finally combined together to get the overall
response of the structure.

The solving procedure is demonstrated as follows. Firstly we consider the free vibration
equations without damping.

Mu  t   Ku  t   0 (4.16)

Assuming the solution has the form of u  t    sin   t  t0  , the following relation is satisfied.

K   2M (4.17)

Eq. (4.17) belongs to the generalized eigen value problems. Solving this equation we can obtain
a series of eigen frequencies i ( i=1,2,3…) and eigen vectors i ( i=1,2,3…). The nodal DOFs

for solving can be transformed to a linear combination of the eigen vectors as in Eq.(4.18). The
solving variables are then reduced to xi ( i=1,2,3…).

n
u  t   i xi  t  (4.18)
i 1

44
Noting the orthogonal relations between the eigen vectors:

1, i  j
 j Mi   (4.19)
0, i  j

 2 , i  j
 j Ki   i (4.20)
 0, i  j

2  , i  j
 j Ci   i i (4.21)
 0, i  j

The original dynamic equations can be transformed into a series of de-coupled ordinary
differential equations as follows:

xi  t   2ii xi  t   i2 xi  t   pi  t  , i=1,2…n (4.22)

where, pi  t  is the projected load for the ith mode.

pi  t   i Q , i=1,2…n (4.23)

The initial conditions can also be projected onto each eigen mode to get the initial conditions of
each mode, i.e.

xi  0  i Mu0 , i=1,2…n (4.24)

xi  0  i Mu0 , i=1,2…n (4.25)

The solution of Eq. (4.22) can be determined using Duhamel integration method as:

1
xi  t    p   e    t  
sin i  t    d  eiit  ai sin it  bi cos it 
t  i i
(4.26)
i
0 i

where ai and bi are the two constants depend on the initial conditions, i  i 1  i2 . When

the damping effect is negligible, the solution can be simplified to:

45
 1
xi  t   p   sin   t    d  a sin  t  b cos  t
 
t

0 i i i i i i (4.27)
i

The total response can be obtained by substituting Eq(4.27) into Eq.(4.18). The strain and stress
fields can be deduced from the displacement solutions. For the dynamic response induced by the
motions of the structural base, Eq. (4.22) can be rewritten as:

6
xi  t   2ii xi  t    x  t     i  j z j , i=1,2…n
2
i i (4.28)
j 1

where,

 i  j  i MTj , i=1,2…n (4.29)

is defined as the participation factor for the ith mode and degree of freedom j. The participation
factor is a measure of the rigid motion of the base representing in the eigenvector of one mode.

4.2 Geometry of Potted PCB Assembly

The situation envisaged is that of a PCB with 15 integrated circuits mounted via interconnections,
as depicted in Fig. 4.1. According to JEDEC standard [64], the components form a 3-row by 5-
column regular array. Each component has a size of 10 × 10 mm. The thickness is 1 mm for the
components and 0.23 mm for the interconnections. The PCB has a dimension of 132 mm × 77
mm × 1mm. This layout of PCB assembly makes it convenient to identify the hot spots on the
board regarding to the structural reliability. Fig. 4.2 shows the geometry of the potted
configuration. The configuration has an overall dimension of 145 mm × 85 mm × 80 mm, with
the electronic board fully encapsulated by the potting resin.

46
 Fig. 4.1 A configuration of JEDEC standard board with 15 components

Fig. 4.2 A schematic of the potted PCB assembly configuration

4.3 Constitutive Modelling of Materials

4.3.1 Selected Potting Materials

The potting material was modeled using Neo-Hookean hyperelastic law with viscous damping
[65]. The hyperelastic law is given by the strain energy expression provided as below,

W  C1  I1  3  D1  J  1
2
(4.30)

47
where C1 and D1 are the generalized moduli, which are related to Young’s modulus E and
E E
Poisson’s ratio v by the relations, C1  and D1  , respectively. I1 is the first
4 1  v  6(1  2v)
deviatoric strain invariant and J is the volume ratio. The stress is determined from the strain
1 W
energy as  ij  Fjk , i,j,k=1,2,3. Here Fij are the components of the deformation gradient
J Fik
tensor. The viscous damping is implemented only for the deviatoric stress through the relaxation
shear modulus G(t), as described the following equations,

t
  ij' ( ) 
 ij  2 G  t     d (4.31)
0   

In this study, G(t) is defined in one-termed Prony series formation [66]:


G  t  G0  1  g P 1  et   (4.32)

where, G0 is the instantaneous shear modulus.

4.3.2 Solder-Underfill Interconnection

In industry, the technology of underfill infiltration, as shown in Fig. 4.3, is gaining its popularity
to mitigate the solder stress from the thermo-mechanical shock loads [67,68]. It is implemented
by injecting an epoxy mixture under the IC component after it is soldered to the PCB, effectively
bonding the ICs to the PCB. In the following, we examine different FE approaches to model the
solder-underfill interconnections.

Fig. 4.3 A schematic of the solder-underfill interconnection

48
One of the major challenges in modelling the fine pitch ball grid array (FBGA) package lies in
its large number of solder balls as well as the required dense meshing for the accurate
characterization of its dynamic response. To overcome this difficulty, three main methods were
considered to model the solder-underfill interconnection:

(i) Fully bonded approach (Fig. 4.5 (a)): The detailed configurations of the solders and
underfill were explicitly modelled. The elements of different media were bonded through shared
nodes on the interface. It allows direct load transfer between the two surfaces. This modelling
approach requires that the meshing density along the interface must be identical, resulting in
excessive degrees of freedom.

(ii) Tie constraint approach (Fig. 4.5 (b)): The detailed configurations of the solders and
underfill were explicitly modelled. The surface-based tie constraint formulation of ABAQUS
was used to bond the interconnection layer to the PCB as well as to the SMT package. Surface-
based constraint using a master-slave formulation. The constraint prevents slave nodes from
separating or sliding relative to the master surface. Its advantage lies in easy mesh transitioning,
which allows us to mesh the solder, component and PCB separately. Therefore, it significantly
reduces the total element number in the entire model.

(iii) Solder-underfill homogenization approach (Fig. 4.5 (c)): The underfill binds the discrete
solders together into a unit layer, which makes the material homogenization an attractive
approach for modelling the interconnection. As shown in Fig. 4.4, the periodically repetitive
property of the interconnection configuration makes it possible to be represented by a
representative volume element (RVE). Utilizing the periodic and symmetric configurations, four
types of deformation were carried out to determine the six independent constitutive parameters
of the homogenized model: (i) uniaxial tension along the z-axis to determine Ez , vzy and vzx , (ii)

uniaxial tension along the x-axis to determine Ex , vxy and vxz , (iii) pure shear in the x–y plane to

determine Gxy , and (iv) pure shear in the x–z plane to determine Gxz . The constitutive

parameters of the homogenized model were obtained from the stress and strain relations during
the simulations of the above deformations. The details of the homogenization approach are
discussed in Ref. [46]. Table 4.1 shows the homogenized properties of the solder-underfill
interconnections.

49
 Fig. 4.4 A schematic of the solder-underfill interconnection configuration (the right graph
shows the simulation of the RVE with dimensions in mm [46])

(a) (b)

(c)

Fig. 4.5 The three methods used to model the interconnection and their different mesh styles: (a)
conventional bonded interconnection, (b) tie-bonded interconnection, and (c) homogenized
interconnection

50
 Table 4.1 Material parameters for the solder,underfill and homogenized interconnection

Density
Modulus (GPa) Poisson ratio
(103kg/m3)

Solder 7.440 24.83 0.4

Underfill 1.782 9.93 0.33

Ex , Ey = 13.5; Ez = 15.1; vxz , vyz = 0.32;

Homogenized
3.84
Interconnection
Gxz , Gyz =5.04; Gxy = 4.84 vxy = 0.34

To examine the different approaches in modelling the solder-underfill interconnection, an

explicit FE simulation was carried out as shown in Fig. 4.6. The JEDEC standard circuit board
with only one central package was modeled. A half-sine acceleration pulse (peak Acceleration:
1500 G and duration: 0.5 ms) was applied to the four screw holes along the board normal
direction, which was the critical loading scenario according to JEDEC standard. Utilizing
symmetry, only a quarter of the model was used for the simulation.

(a) (b)

Fig. 4.6 A schematic of FE model as per JEDEC standard JESD22-B111: (a) a full FE model of
the PCB assembly, and (b) a quarter FE model of the PCB assembly

Fig. 4.7(a) compares the history of deflection of the PCB center and Fig. 4.7(b) compares the
history of the normal stress in the corner cell of the solder interconnection using different
modeling techniques. Results reveal that the displacement and stress from the homogenization

51
approach agrees well with the commonly adopted approach. Fig. 4.8 plots the contours of the
normal stresses in the interconnection at 0.90 ms which corresponds to the first peak on the PCB
deflection history curve. Similar trends are also observed for the two figures, where the largest
tensile stress occurs near the corner of the interconnection and the compressive stress in between
the corner and center region. Table 4.2 compares the computational cost required for the three
investigated approaches. It can be observed that to simulate the same problem of 10 ms duration
time, it took less than one percent of CPU time (0.8 hour) for the multi-level homogenization
approach as compared with the commonly adopted approach (48 hours).

(a) (b)

Fig. 4.7 A comparison between the different modelling approaches: (a) time variation of
deflection at PCB center, and (b) history curves of the maximum normal stresses in the corner
cell of the solder-underfill interconnection

52
 (a) (b)

Fig. 4.8. Contour plots of the normal stress in the interconnection at 0.90 ms using: (a) the fully
bonded approach, and (b) the homogenization approach (The intervals of the contour bands are
unequal for viewing clarity)

Table 4.2 Computational cost for the different modelling approaches

Modelling Approach CPU Time cost (h)

Conventional bonded 48

Tie bonded 10

Homogenization Scheme 0.8

Furthermore, the homogenization FE approach used in modelling the solder-underfill

interconnection is verified using the simplified analytical method. To simplify this problem, the
PCB and the IC package are modelled as Euler beam, while the interconnections are modelled as
a slab of continuously distributed axial springs, as demonstrated in Fig. 4.9.

53
Fig. 4.9. A free body diagram of PCB assembly with solder-underfill interconnections modelled
as continuous distributed axial springs

A closed form solution for the axial stresses in the board level interconnections, modelled as
axial springs, subjected to a symmetrically applied static bending moment on the PCB has been
derived in Ref. [69] and applied to the board level drop impact analysis in Ref. [70]. Following
the detailed derivation from Ref. [71], the normal stress distribution along the x-axis is given by
the following equations:

ka M
 ( x)  [  (u)1 (v)  2 (u)2 (v)] (4.33)
 2 D2 1

ka 1 1 1
4 4  ,   (4.34)
De De D1 D2
where

u   L, v   x (4.35)

1 (v)  cos(v)cosh(v), 2 (v)  sin(v)sinh(v),

(4.36)
3 (v)  cos(v)sinh(v), 4 (v)  sin(v)cosh(v)

3 (u)  4 (u) 3 (u)  4 (u)

1 (u)  , 2 (u) 
sin(2u)  sinh(2u) sin(2u)  sinh(2u)
(4.37)
u (u)  u2 (u)  3 (u) u (u)  u2 (u)  4 (u)
3 (u)  1 , 1 (u)  1
u[sin(2u)  sinh(2u)] u[sin(2u)  sinh(2u)]

54
And where M is the moment per length at the package boundary extracted from the FE model,
L is the length of the package, ka is the axial stiffness of interconnection modelled as elastic

foundation. D1 , D2 is the flexural rigidity of the package and PCB, respectively. De is the

effective flexural rigidity of PCB. Table 4.3 shows the basic parameters extracted from the FE
model used for the analytical solution. Fig. 4.10 shows the normal stresses in the interconnection
along its length (from the center along the x-axis at 0.90 ms). These results reveal that the FE
predications agree well with the analytical solutions.

Table 4.3 Basic parameters for the analytical solutions

Moment
Axial
Young’s Poisson’s Thickness Length per
stiffness
modulus(GPa) ratio (mm) (mm) length
(N/mm3)
(N)

PCB 16.9 0.11 1 12.5

Component 35.1 0.28 1 12.5 1.5

Interconnection 15.1 0.34 0.23 65625

Fig. 4.10. A comparison of normal stress σzz in the interconnection between numerical (FE) and
analytical predictions based on the approach in Ref. [71]

55
4.3.3 Prinited Circuit Board

Both the IC components and the PCB were modeled using an orthotropic linear elastic law [46].
The elastic properties of PCB are determined based the micromechanical homogenization
process in Chapter 3. The detailed results are presented in Chapter 5.

All of the constitutive parameters used in the simulations are listed in Table 4.4. The subscript x,
y, z denotes which material direction the parameter is assigned, as shown in Fig. 4.1. The listed
potting material is 3M Scotch DP270 epoxy [65] which is taken as a benchmark for the potting
materials.

Table 4.4 Material constitutive parameters used in the FE simulations

Density (103kg/m3) Modulus (GPa) Poisson's ratio

Ex =31.1 Ey = 29.6; Ez = 7.40;

vxz =0.39, vyz =
PCB 1.91
0.36, vxy = 0.11
Gxz =7.65, Gyz =7.59; Gxy = 3.31

IC components [46]
Ex , Ey = 31.6; Ez = 16.4;
vxz , vyz = 0.35;
1.93
vxy = 0.28
Gxz , Gyz =10.1; Gxy = 10.3

Ex , Ey = 13.5; Ez = 15.1;
vxz , vyz = 0.32;
Interconnections 3.84
vxy = 0.34
Gxz , Gyz =5.04; Gxy = 4.84

Potting [65] 1.0 C1 = 0.202; D1 = 0.942 v = 0.4

4.4 Element Selection for PCB

To investigate the effect of different elements on the modelling of the PCB, simulations were
carried out for a bare PCB subjected to a half-sine acceleration (peak acceleration: 200 G and
duration: 0.5 ms) input pulse along its four edges (Fig. 4.11). The material properties stated in

56
Table 4.4 were used to model the PCB. The assumption of the board being simply supported
along its edges instead of four corners is for analytical simplicity.

Fig. 4.11 Details of the board subjected to the specified boundary and loading conditions

This problem can be analytically solved using the modal superposition principle. The half-
sinusoidal loading profile with a peak amplitude A0 and duration t0 was utilized,

 A sin( t / t0 ), t  t0
A(t )   0 (4.38)
 0, t  t0
The governing equation of the board out of plane motion is given by

z ( x, y, t )  p24 w( x, y, t )  0 (4.39)
where,

Dp
p  (4.40)
h

Dp  Eh3 /12(1  2 ) (4.41)

where E is Young’s modulus, v is Poisson’s ratio,  is its density and a, b is the length and
width of the PCB, respectively. We focus on the displacement along the loading directions at the
board center relative to the loading boundaries. Using the modal superposition method [72], the
relative displacements are obtained as in Eq.(4.42).

57
 2
 
 1  s2  16 n x m y
w( x, y, t )    A0  2 2 2 
T (nm , )sin sin (4.42)
 s n  m   nm1
2
n 1,3 m 1,3 a b

where,

 
 ( sin t   sin t ), t  t0
 2   2
T (, )   (4.43)
 2 sin(t   ) cos(  ), t  t

 2   2 2 2
0

Dp  n 2 m 2 
wnm  ( a )  ( b )  (4.44)
h

Fig. 4.12 compares histories of the relative center displacements of the PCB determined using
the different elements. Three types of elements are compared in this study: the solid element
C3D8, the conventional shell element S4 and the continuum shell element SC8R. The same mesh
density was applied for each element type. The accurate analytical solutions are also compared
with these FE results. Only the first three terms, i.e. n = 1, 3, 5, were taken into account to obtain
the analytical solutions in Eq.(4.42). The truncation error can be estimated by comparing the
magnitude of the next term in the series with that of the obtained solution. The relative error is
found to be negligible (~ 0.05%).

It can be observed from Fig. 4.12 that the simulations using shell elements agree well with the
analytical solutions. On the contrary, the simulations using solid elements show discrepancy. The
inaptness of the solid element for the problem, where bending effect dominates, comes from the
fact that its shape function does not account for the quadratic term which is necessary for
describing the bending behavior of the board. Thus, the solid elements typically behave more
rigidly than the physical structure; a phenomenon known as locking. Effectively, the shell
elements are more suitable for modeling the PCB. Furthermore, the continuum shell element is
selected, since it can be conveniently combined with the solid element used for modelling the
potting and interconnections.

58
Fig. 4.12 History plots of the center deflection of the PCB subjected to the normal loading along
z-axis using different elements

4.5 FE modelling of Electronics Subjected to Impulse

4.5.1 FE Model Specificaiton

In this section, we investigate the embedded electronics reliability subjected to drop inducted
impulse based on our proposed multi-level homogenization approach for the interconnections.
Most of the existing FE studies utilized only one IC package at board center due to the large
number of elements required for the simulations. The computational expense can be reduced
significantly using our newly proposed multi-level approach. In this approach, all the 15
packages were modeled. To examine the effectiveness of the potting for attenuating the shock
loads, the following cases were considered in the FE simulations:
(i) un-potted electronic board (see Fig. 4.13),
(ii) potted using single potting material of varied stiffness (see Fig. 4.14 (a)), and
(iii) potted using bilayer materials with varied stiffness (see Fig. 4.14 (b)).

Continuum shell element SC8R was used for modeling the PCB. The solder interconnection, the
IC package and the potting materials were discretized using the 8-noded linear solid elements
C3D8. The base for the drop impact test was modelled using the rigid elements. A typical model
of the potting configuration contained 119,864 elements and involved 413,250 degrees of
freedom. All the simulations were carried out using the commercial FE code ABAQUS 6.11 [66].

59
The computations were carried out using the SHARCNET supercomputer, which is the largest
high performance computing consortium in Canada. A typical run took about 4 CPU hours on a
Sharcnet supercomputer node of 2.6 GHz.

Fig. 4.13 Discretized geometry of the un-potted PCB assembly

(a) (b)

Fig. 4.14 Discretized sectional view of the FE model with the cutting plane parallel to the x-
z plane: (a) a single layer potting configuration, and (b) a bilayer potting configuration

4.5.2 Boundary and Loading Conditions

A typical FE impact model with the bilayer potting material is shown in Fig. 4.15. The potted
system was simulated to be dropped onto a rigid surface at an initial velocity of 10 m/s. The
loading conditions used here are different from JEDEC standard for two reasons. Firstly, the
automatic generated drop impact is believed to be fairer for comparing the performances of
different potting designs as well as the un-potted case. This is because the impact loading profile
is dependent on the properties of the considered materials. Therefore, it is not desirable to unify
the loading conditions of the different potting materials as a specified acceleration profile.

60
Secondly, the loads are applied to the four corners of the PCB through the support (bolts) in
JEDEC standard, which is not practically feasible in the potted cases. The support platform of
the drop weight apparatus was assumed to be rigid with its bottom fixed.

Fig. 4.15 The FE impact model of the PCB with IC components encapsulated by a bilayer resin

4.5.3 Mesh Convergence

In any FE analysis, the mesh size plays a vital role in the convergence and possibly of the
accuracy of the results. Keeping the geometry, boundary conditions, element type and loading
conditions of the FE model constant, the variations in the mesh size is examined. In order to
eliminate the mesh size dependency, convergence testing was performed to find the desirable
mesh size. The geometry used in the sensitivity analysis consisted of a single potting
configuration with Young’s modulus of 0.05 GPa for the potting material.

According to existing studies, most of the failures are mainly observed in the IC components and
interconnections. Therefore, sufficient elements are required to discretize these regions. In our
case, three types of element sizes (that is, 1.5 mm, 1.0 mm and 0.8 mm) were selected to mesh
the component. For these elements, the resultant normal stresses in the corner interconnection of
the central component have been obtained as shown in Fig. 4.16. The convergence check
revealed that the normal stress in the interconnection is converged at element size of 1.0 mm.
Therefore, this mesh size has been used to discretize the component and interconnection. The
similar process has been repeated to determine the optimum mesh size for the bilayer case. In
this case also the solution is converged for the element size of 1.0 mm.

61
Fig. 4.16 Mesh convergence tests for the single potting configuration with a potting modulus of
0.05 GPa subjected to a short duration impulse

4.6 FE modelling of Electronics Subjected to Shock Loads

4.6.1 FE Model Specificaiton

Utilizing the symmetry of the configuration, the generated FE model included only one quarter
of the full configuration. Fig. 4.17(a) depicts the discretized model of the PCB assembly. Fig.
4.17 (b) and 4.17 (c) show the discretized geometries of the potted configuration with the single
potting and the bilayer potting designs, respectively. The coordinate system is established in such
a way that the PCB is parallel to the x-y plane, and x-z and x-y plane coincide with the
symmetric planes of the provided configuration. The element type used in this case is the same
as that used for the short duration impulse FE model.

62
 (a)

(b) (c)

Fig. 4.17 Discretized FE models: (a) non-potted embedded electronics, (b) a single layer potting
design, and (c) a bilayer potting design

4.6.2 Boundary and Loading Conditions

As shown in Fig. 4.18, the fully potted system is subjected to a high shock load with the
acceleration profile based on the results from the first study of this project and Ref. [33]. The
load profile has duration of 11 ms and the magnitude of 14,000 G which were obtained from the
gun-launch test. The shock load is applied to the bottom of the potted system. In the FE model,
all the nodes at the bottom boundary are subjected to the acceleration profile along z-direction.
On the side boundary at the end of the x-coordinate, the DOF along the x-direction is

63
constrained. While on the side boundary at the end of y-coordinate, the DOF along y-direction is
constrained. Symmetric boundary conditions are applied to the two symmetric planes.

(a) (b)

Fig. 4.18 FE model specifications: (a) demonstration of the loading and boundary conditions,
and (b) loading profile taken from gun-launch test [33]

4.6.3 Mesh Convergence

Mesh convergence study is also conducted for the long duration shock loading condition. In this
section, the non-potted PCB assembly is discretized using the different element size varying
from 1.5 mm to 0.8 mm. Fig. 4.19(a) shows that there is no significant difference in the global
deflection of the PCB using different element sizes. This is due to that the local mesh size would
not significantly affect the global structural response. In terms of the normal stress  zz in the

interconnection, Fig. 4.19(b) indicates that the convergence can be achieved with element size of
1.0 mm for the interconnection.

64
 (a) (b)

Fig. 4.19 Mesh convergence study for the non-potted configuration subjected to the long
duration shock loadings (a) PCB central deflection, and (b) stress  zz in the interconnection

65
 Chapter 5
Results and Discussions

Summary: In this chapter, we summarize the FE results and discuss the outcome of the pertinent
issues concerning the attenuation of impulse and shock loads. The chapter is divided into three
main sections: (i) the determination of the effective properties of embedded electronics based on
micromechanics and homogenization schemes, (ii) the effect of short duration impulse on the
embedded electronics, and (iii) the effect of long duration shock loads on the embedded
electronics in smart ammunitions.

5.1 Effective Properties Determination of PCB

The entire bottom-up multi-level micromechanics homogenization scheme, as discussed in

Chapter 3, is illustrated in Fig. 5.1. Firstly, the effective properties of the fiber bundle were
determined using the different micromechanical schemes. Secondly, the homogenized elastic
properties of the woven composite substrate were obtained by solving a FE-based boundary
value problem of a unit cell. Finally, the classical laminate theory was utilized for determining
the moduli of the multilayer PCB.

Fig. 5.1 A detailed description of the bottom-up multi-level micromechanics homogenization

scheme
66
Table 5.1 compares our homogenized results with the experimental results of Ref. [14]. Among
the three schemes examined, the self-consistent scheme results provide a greater estimate of
Young’s moduli, especially along the fill direction. Both Mori-Tanaka and CCA/Three-phase
schemes yielded better predictions when compared with the experimental findings. The
difference could be attributed to the geometrical approximations associated with the FE
modelling and the possible rounding off numerical errors. The results reveal that the Mori-
Tanaka and CCA/Three-phase schemes are capable of predicting the elastic properties of the
multilayer PCB.

Table 5.1 Variation of the elastic moduli of the PCB as found experimentally and predicted
theoretically using micromechanics

Error(%) Error(%)

Ewarp (GPa) Ewarp  Eexperiment Efill (GPa) Efill  Eexperiment

Ewarp Efill

Self-consistent scheme 33.6 3.3% 32.6 15.6%

Mori-Tanaka scheme 30.6. -6.2% 29.1 3.2%

CCA/Three-phase
31.1 -4.6% 29.6 4.9%
scheme

Experiment [14] 32.6 - 28.2 -

5.2 Electronics Subjected to Short Duration Impulse

In this section, the dynamic response of the embedded electronics subjected to the short duration
impulse due to drop impact is summarised. Specifically, the following cases were considered in
the FE simulations to examine the effectiveness of encapsulation in attenuating the shock loads:
(i) un-potted PCB assembly,
(ii) potted using the single potting material of varying stiffness, and
(iii) potted using the bilayer materials of different stiffness.

67
5.2.1 Validation of Numerical Models

Of importance to the current FE studies are: (i) element convergence tests, and (ii) validation of
the numerical results. The convergence tests accounting for the element performance and mesh
size effects have been conducted and outlined in details in Chapter 4.

As for the validation for the numerical results, a comparison has been made between the simple
FE efforts of Lai et al. [44] using ANSYS/LS-DYNA and the current FE results using ABAQUS.
As shown in Fig. 5.2, a similar tendency in the solder interconnections stress distribution along
the z-direction can be observed between the two cases. For both models, the maximum normal
stress  zz occurs around the outer rim of the critical solder joint.

(a) (b)
Fig. 5.2 Normal stress  zz distribution in solder interconnection: (a) current FE results, and (b)
results from Lai et al. [44]

In addition to the above numerical validations, a number of experiments have been conducted in
the mechanics and aerospace design lab [73]. Fig. 5.3 (a) shows one of the generic encapsulated
test circuits used in the potting trials. It contains an operational amplifier, a capacitor, a LED and
six resistors. The test circuit generates a square wave that lights the LED, which will indicate the
electronics status. The circuit operates with a duty cycle of 50% and the frequency can be tuned
by adjusting the value of the capacitor.

68
Fig. 5.3 (b) shows one example of the single layer encapsulation of the PCB assemblies. The
PCB is fully encapsulated by a transparent epoxy so that the LED can be observed during the test.
Based on the tests, it is found that the potted PCB assembly remained operational after drop
impact tests from approximately 6m. Whilst this example is not directly related the FE work, it
shows clearly the capability of polymeric encapsulation to attenuate impulse loads in PCB
assembly

(a) (b)
Fig. 5.3 Preliminary experimental validation: (a) CAD model of the un-potted circuit design,
and (b) an example of an encapsulated PCB assembly [73]

5.2.2 Un-potted PCB Case

In order to determine the potting effectiveness in terms of the reliability of the PCB assembly,
interconnection stresses are considered as the key factor in this research. In the first case, we
examined the stress state in an un-potted electronic board dropped from a specific height onto a
rigid base. This represents the reference case. Fig. 5.4 plots the history curves of the stresses in
the interconnections for the two components U1 and U8 whose locations can be seen in Fig. 4.1.
Here and in later plots, we investigate the stress along z-direction, which is the main stress
component. The data are taken at component corner where the maximum interconnection stress
occurs. It shows that the PCB without the potting protection suffers intense stress pulses
produced by the shock. In this case, the transient stress waves are the key issue over the PCB
deflection due to its contact with the flat rigid base.

69
 Fig. 5.4 The normal stress  zz in the interconnection for the un-potted case

5.2.3 Single Potting Configuration

Let us now focus our attention to the case of a single layer potting. For the sake of comparison,
the density of the potting is assumed to be 1 g/cm3. Fig. 5.5 shows the contour plot of the stress
distribution in the interconnections considering the single potting configuration with a potting
modulus of 1 GPa at 0.1 ms, which corresponds to the maximum stress-time history. It is found
that the variation of the stress values among the different components is limited, while a stress
concentration can be observed around the corner regions for the individual components.

Fig. 5.6 shows the effect of the different potting moduli along the impact direction of the single
potting configuration on the interconnection stress. These results reveal that the stress response
of the flexible potting configuration would result in lower frequency oscillations, and it also
takes longer time to reach the maximum compressive stress value. Fig. 5.7 compares the effect of
the modulus of the different potting materials on the maximum interconnection normal stress
 zz and the PCB deformation. The results indicate that the stress in the interconnection increases
as Young's modulus of the potting material increases. The stiff potting material provides poorer
protection for PCB assembly in terms of interconnection stress state. This could be attributed to
the larger magnitude of shock pulse generated and the lack of attenuation of the shock by the
stiff potting material. Contrary to the stress state, the central deflection of the PCB decreases

70
with the increase in the Young's modulus of the potting material. This is mainly due to that the
larger stiffness and the resulting greater constraint imposed by the stiff potting encapsulated PCB.

(a) (b)

Fig. 5.5 Contour plots of the stress distribution (Unit: Pa) in the interconnections for the single
potting configuration with potting modulus of 1GPa at 1.0 ms: (a) stress  zz , and (b) von Mises

stress

Fig. 5.6 Effect of different potting moduli of the single potting on the interconnection stress
history

71
 (a) (b)
Fig. 5.7 Effect of the potting moduli for the single potting configuration: (a) maximum normal
stress  zz in the central component interconnection, and (b) maximum central deflection of PCB

5.2.4 Bilayer Potting Configuration

We now focus our attention to the effectiveness of a novel bilayer potting design. Two different
designs were considered. In the first design, we used a more flexible (lower modulus) layer in the
exterior and a stiffer (higher modulus) layer in the interior (flexible-stiff-bilayer) to encapsulate
the electronic board. In the second design, the order of the layers was reversed (stiff-flexible-
bilayer). For simplicity, the thickness proportions of the exterior and the interior potting layers
were selected to be equal. The values selected were typical for the potting materials used in
industry to attenuate the shock loads. Fig. 5.8 compares the effect of the moduli of the different
potting materials and the configurations on the interconnection stress along the impact direction
(z-direction). The figure indicates that the maximum interconnection stress is reduced as a result
of encapsulation. Interestingly, however, there exists a remarkable difference in the attenuation
effectiveness of the two different bilayer designs. Fig. 5.8 shows that the flexible-stiff-bilayer
design corresponds to the least stress output, while the stiff-flexible-bilayer design has the largest.
It may also be observed that the significant reduction in the value of the maximum stress occurs
in case of the flexible-stiff-bilayer potting compared with the single potting configurations.

72
 Fig. 5.8 Effect of various potting materials and configurations on the maximum normal stress
 zz in the central interconnection

Fig. 5.9(a)-5.9 (d) shows the stress histories in the interconnections for four representative
components within 0.5 ms after the drop impact. These results reveal that the vibration amplitude
can be largely attenuated by the flexible-stiff-bilayer potting protection. By examining all the
above interconnection stress history, it can be concluded that the bilayer potting design preserve
its efficiency in protecting all the electronic components at different key locations of the board
compared to the single layer potting cases.

(a) Component U8 (b) Component U10

73
 (c) Component U13 (d) Component U15

Fig. 5.9 History curves of the stresses in the interconnections for four representative components:
(a) U8, (b) U10, (c) U13 and (d) U15 as indicated in Fig. 4.1 with various potting materials

Furthermore, the effect of the potting moduli combinations on the bilayer potting design was also
investigated. The flexible-stiff-bilayer (0.05 GPa/20 GPa and thickness ratio: 50%) was used as
the benchmark.

In the first case, the effect of varied exterior potting was investigated. For this purpose, the
dynamic performance of the electronic board was examined with varied exterior potting moduli
and the same interior potting as the benchmark case. As shown in Fig. 5.10(a), the
interconnection stress increases with the modulus of the exterior potting. This leads us to suggest
the use of a material of relatively lower modulus for the exterior potting to effectively protect the
PCB.

Secondly, the effect of varied interior potting was also investigated. For this purpose, the
dynamic performance of the electronic board was examined with varied interior potting moduli
and the same exterior potting as the benchmark case. It may be observed from Fig. 5.10(b) that
the interconnection stress decreases as the modulus of the interior potting increases. Therefore, a
potting material with a larger modulus should be considered for the interior potting when using
bilayered resin.

74
 (a) (b)

Fig. 5.10 Effect of the potting modulus of the bilayer encapsulation on the maximum
interconnection stress along the z-axis: (a) effect of the exterior potting modulus, and (b) effect
of the interior potting modulus

5.3 Electronics Subjected to Long Duration Shock Loads

In this section, the effect of long duration shock loading on the survivability of the embedded
electronics is summarised. Following the short duration impulse layout, the un-potted, the single
layer potting and the bilayer potting design are sequentially considered.

5.3.1 Un-potted PCB Case

The un-potted PCB assembly case was firstly investigated as the benchmark case. In this case,
the shock loading is directly applied to the four corners of the PCB assembly assuming that the
embedded electronics is fixed in the projectile at the board corners. Fig. 5.11 shows the
deformation behavior of the un-potted electronics. It is found that not only a global PCB
bending deformation is experienced under the specified acceleration profile, but also the local
high frequency oscillations of the PCB deformation can also be observed. Fig. 5.12 shows the
normal stress  zz history in the corner interconnection of the central component (U8). It is found
that during the first 10 ms, the normal stress in the interconnection is mainly compressive. The
maximum compressive stress can be observed at around 4.0 ms, which corresponds to the time

75
when the acceleration loading reaches its peak. In the subsequent phase, the PCB will bend up
and down, inducing both tensile and compressive stresses in the interconnections.

Fig. 5.11 Deflection at the PCB center of the non-potted electronics subjected to long duration
shock loading

Fig. 5.12 Stress  zz history for the corner interconnection of the central component (U8)

5.3.2 Single Potting Configuration

We further examined the effect of the different moduli of the potting on the interconnection
stress for the single layer potting configuration. The normal stress along the z-direction and the
von Mises stress at the corner of the interconnection of the central component are shown in Fig.
5.13. The difference lies in the local oscillations, which vary for the different potting materials

76
investigated. As the potting modulus increases from 0.05 GPa to 20 GPa, the stress  zz at the
interconnection corner decreases from ~ 30 MPa to 5 MPa. It should also be noted that the local
frequency of oscillation significantly increases with an increase in the potting modulus. This
cyclic loading can lead to fatigue failure.

(a) (b)

Fig. 5.13 Stresses in the central component (U8) interconnection stress: (a)  zz , and (b) von

Mises stress

5.3.3 Bilayer Potting Configuration

Next, we compare the bilayer potting case of both flexible-stiff and stiff-flexible configurations
with the single potting case (0.05GPa, and 20GPa). From Fig. 5.14, we can see that compared to
the single stiff potting case, the main advantage of the exterior flexible and interior stiff bilayer
potting lies in the fact that it attenuates the local extremely high frequency oscillations, but still
maintains the lower stress level compared to the single stiff potting case. However, for the
reversed bilayer design, which has stiff potting as the exterior layer and flexible potting as the
interior layer, the dynamic response is quite similar to the single flexible potting case. It results
in larger stress state.

77
 Fig. 5.14 Interconnection stress  zz comparison between the single layer and bilayer
encapsulation designs in the central component (U8)

For the bilayer potting configuration, we carried out a series of simulations to investigate the
effect of different exterior/interior potting moduli. In the first case, we used the stiff potting with
Young’s modulus of 20 GPa as the interior layer and varied the moduli of exterior layer from
0.05 GPa to 10 GPa. Fig. 5.15(a) shows the effect of varied exterior potting moduli of the bilayer
potting material on the maximum normal interconnection stress. It shows that for the long
duration shock loading condition, the stresses in the interconnections are almost at the same level
for varied exterior potting moduli. This indicates that the stress state of the interconnections for
the bilayer design is governed by its immediate potting material. In the second case, we used the
same exterior potting layer (modulus: 20 GPa), while varied the modulus of the interior layer.
Fig. 5.15(b) shows that the interconnection stress increases as the interior potting modulus
decreases. Table 5.2 compares the local frequency of the stress response for the different bilayer
configurations. Here, the tag E = 0.05/20 GPa indicates the bilayer configuration with exterior
being flexible and interior being stiff potting, and E = 20/0.05 GPa indicates the reversed order.
It is found that using a flexible potting at the exterior or the interior layer, the high frequency
stress oscillations would dramatically be damped. Hence, an additional flexible exterior layer
would further prevent the embedded electronics from fatigue failure during the acceleration
profile. It can be concluded here that the flexible and stiff bilayer design also shows superior
protection performance under the long duration shock loading condition.

78
 (a) (b)

Fig. 5.15 Effect of the potting modulus of the bilayer design on the maximum interconnection
stress along the z-axis (a) effect of the exterior potting modulus, and (b) effect of the interior
potting modulus

Table 5.2 Variation of the local oscillation of the stress response considering the different bilayer
potting configuration

Bilayer Local frequency of Bilayer Local frequency of

Configuration (GPa) stress response (Hz) Configuration (GPa) stress response (Hz)

0.05/20 1208.2 20/0.05 1137.2

1/20 5203.8 20/1 5275.1

5/20 10621.6 20/5 9908.7

10/20 13758.1 20/10 13686.9

5.3.4 Validation of FE Results using Modal Analysis

To better understand the underlying mechanisms of this problem, we have carried out a series of
modal analyses for different potting designs. For each potting case, we have extracted the first 6
modes of the potted system. The boundary conditions for the mode extractions are the same as in

79
the previous sections, except that at the bottom boundary where the loads are applied, the
displacements along the z-direction are constrained.

In this section, we have considered the three potting designs to demonstrate the relations between
the natural modes and the dynamic response of the potting system: (a) single potting design with
the potting modulus of 0.05 GPa, (b) bilayer potting design of the flexible-stiff potting order
(0.05 GPa / 20 GPa), and (c) bilayer potting design of the stiff-flexible potting order (20 GPa /
0.05 GPa).

Table 5.3 shows the first six modes of the single layer potting case with a potting modulus of
0.05 GPa. For the other single potting cases, with the different moduli, the eigen frequency is
different, while the deformation pattern of the mode shape is quite similar. Table 5.4 shows the
PCB deformation profile for each mode.

Table 5.3 The predicted first six modes of the single potting case (potting modulus = 0.05 GPa)

(a) Mode 1 (b) Mode 2

80
(c) Mode 3 (d) Mode 4

(e) Mode 5 (f) Mode 6

81
 Table 5.4 Deformation of the PCB of the first six modes for the single potting case (potting
modulus = 0.05 GPa)

(a) Mode 1 (b) Mode 2

(c) Mode 3 (d) Mode 4

(e) Mode 5 (f) Mode 6

Table 5.5 and Table 5.6 show the first six modes of the bilayer potting case. For the bilayer cases,
it is found that the deformation is mainly localized to the flexible potting part. In particular, for
the exterior flexible and interior stiff potting case, the mode deformation is mainly localized to
the exterior potting. While for the exterior stiff and interior flexible potting case, the deformation
is mainly localized in the interior potting.

82
Table 5.5 The predicted first six modes of the bilayer potting case (potting modulus = 0.05 GPa
(exterior) and 20 GPa (interior))

(a) Mode 1 (b) Mode 2

(c) Mode 3 (d) Mode 4

83
 (e) Mode 5 (f) Mode 6

Table 5.6 The predicted first six modes of the bilayer potting case (potting modulus = 20 GPa
(exterior) and 0.05 GPa (interior))

(a) Mode 1 (b) Mode 2

84
 (c) Mode 3 (d) Mode 4

(e) Mode 5 (f) Mode 6

Table 5.7 lists the eigen frequency and the corresponding participation factor of each mode for
different potting moduli under the specified loading and boundary conditions. It can be seen that
for the single potting case, the eigen frequency of the flexible potting case is reduced compared
to the stiff potting case. For the bilayer design, the eigen frequencies are somewhere between the
single potting design with stiff potting and with flexible potting. The eigen frequencies of the
bilayer potting design are closer to the single flexible potting design, indicating that the flexible
potting component plays a major role on the overall eigen frequencies of the examined cases.
Investigating the mode participation factor, it can be seen that the second mode of the single
potting design has the largest participation factor in our specified boundary conditions. However,
for the bilayer potting design, the largest participation factor takes place in the first mode. From

85
Table 5.3 to Table 5.6, we can observe that the specific mode with the largest participation factor
corresponds to a similar deformation profile for both the single layer potting design and the
bilayer potting design, in which the deformation is mainly represented by the overall extension
or contraction of the entire structure along the loading direction. The above results indicate that
the second mode of the single layer potting case or the first mode of the bilayer potting case is
the most activated mode in the studied cases since the participation factor is a measure of the
base motion representing the eigenvector of a given mode. We will further confirm this finding
in Section 5.3.5.

Table 5.7 Eigen frequencies and participation factors of the first six modes for the different
potting configurations investigated

E=0.05 GPa E=20 GPa E=0.05/20 GPa E=20/0.05 GPa

Mode Frequency Participation Frequency Participation Frequency Participation Frequency Participation

No. (cycles/s) factor (cycles/s) factor (cycles/s) factor (cycles/s) factor

1 844.5 1.942E-2 15814 4.449E-2 1164 1.171 1163 1.1875

2 849.3 1.292 16682 1.311 2059 2.470E-5 2579 1.012E-3

3 13727 2.163E-4 25469 4.599E-3 2135 -2.596E-8 2600 -2.466E-2

4 1424 -9.474E-4 26047 -3.328E-3 2161 8.486E-9 2661 1.995E-4

5 1520 -1.749E-4 29396 -6.860E-4 2232 -5.098E-6 2663 -1.559E-3

6 1533 6.351E-4 29598 3.317e-3 2533 1.120E-8 2912 -4.829E-4

ABAQUS offers several methods for performing the dynamic analysis of problems in which the
inertia effects are considered. Direct integration of the system must be used when nonlinear
dynamic response is being studied. However the size of the time increment in an explicit direct
integration analysis is limited, because the central-difference operator is only conditionally stable.
The stability limit for the central-difference method (the largest time increment that can be taken
without generating large and rapidly growing errors) is closely related to the time required for
the stress wave to cross the smallest element dimension in the model. In our case, the element
size is quite small due to the modelling of the interconnections. Thus, the time increment in an

86
explicit dynamic analysis is very short. Therefore, modal-based methods have advantages in
terms of computational cost as long as the analysis is linear.

In our case, we have compared the solutions obtained from the modal-based analysis with those
of the direct integration method. For the modal superposition method, the loading application is
realized via specifying the base motion of the bottom boundary. Fig. 5.16 shows that the
interconnection stress calculated from both the methods are quite close. A closer examination
reveals that the stress from the modal superposition method marginally overestimates the value
of stress compared to the direct integration method. This may be attributed to the nonlinearity
involved in our system. Furthermore, the modal superposition method requires the less
computational time. Table 5.8 shows that the simulation using the modal superposition method
used only ~2% of the CPU time of the direct integration method.

(a) (b)

Fig. 5.16 Interconnection stress results predicted by the modal superposition method and the
direct integration method for: (a) potting modulus 0.05 GPa, and (b) potting modulus 20 GPa

Table 5.8 Computational cost comparison between different modelling approaches

Modelling Approach CPU time cost (h)

Direct Integration Method 12

Modal Superposition Method 0.18

87
5.3.5 Frequency Spectrum of the Stress Response

In the above section, we noticed that the interconnection stress history can be decomposed into
the global response curve which has the same trend as the applied load, plus the relative high
frequency local oscillations. The frequency of the local oscillations is closely related to the
modulus and the configuration of the potting design, with more rigid potting corresponding to
higher frequency. This finding motivated us to explore the underlying mechanisms of the
performances of different potting designs via mode-based analyses.

In this section, we examined the frequency results of the stress history curves using fast Fourier
transform (FFT). Fig. 5.17 shows the frequency spectrum of the interconnection stress results for
both single and bilayer potting configurations, as depicted in Fig. 5.13. It can be observed that
for the single potting case, the frequency of the peak spectrum increases from ~1000 Hz to
16000 Hz as the potting modulus increases from 0.05 GPa to 20 GPa. Furthermore, for the two
extreme cases concerning the bilayer design (bilayer modulus of 0.05/20 GPa and 20/0.05 GPa),
the critical frequency of the peak amplitude remains around 1500 Hz. These figures (Fig. 5.17
(a)–(g)) provide us a quantitative description of the interconnection stresses in the frequency
domain, which allows us to find and extract the dominant mode for the studied systems.

(a) Single potting configuration (potting modulus = 0.05 GPa)

88
(b) Single potting configuration (potting modulus = 1 GPa)

(c) Single potting configuration (potting modulus = 5 GPa)

(d) Single potting configuration (potting modulus = 10 GPa)

89
 (e) Single potting configuration (potting modulus = 20 GPa)

(f) Bilayer potting configuration (potting modulus = 0.05 GPa (exterior) and 20 GPa (interior))

(g) Bilayer potting configuration (potting modulus = 20 GPa (exterior) and 0.05 GPa (interior))

Fig. 5.17 Frequency analysis of the interconnection normal stress history along the z-axis using
FFT for both the single and bilayer potting configurations

As indicated in Table 5.9, the participation factor of the second mode for the single potting case
is much larger than that of other modes, while for the bilayer case, the dominant participation

90
factor takes place at the first mode. This motivated us to examine if the first mode plays a
dominant role in determining the total response. In Table 5.9, we compared the frequency of the
dominant mode with the frequency of the peak amplitude in the stress history curve from explicit
integration solution. It is shown that the primary frequency of the stress response using FFT
corresponds quite well to the dominant mode frequency.

Table 5.9 Comparison between the dominant mode frequency and the primary frequency of the
stress history response using FFT

Potting Young’s Eigen frequency Frequency of peak

Modulus (GPa) (Mode 2 in single amplitude in stress
layer and Mode 1 in history FFT
bilayer)

0.05 849.33 852.88

1 3794.5 3695.8

5 8452.5 8293.5

10 11899 11833

20 16682 16609

0.05/20 1402.2 (Mode 1) 1208.2

20/0.05 1163 (Mode 1) 1137.2

We further examined the contribution of each mode in the total response. According to Eq.(4.18),
the contribution of mode i to the total displacement response is i xi  t  . Here, the mode vector

i determines the spatial profile of the modal response and the solution of the generalized
displacement xi  t  determines the historical profile of the modal response. The strain and stress

distribution of one mode can be straightforwardly obtained from the displacement field
represented by mode vector i .

91
As an example, let us take the single potting case with a flexible potting material with E=0.05
GPa. Fig. 5.18 depicts the modal stress response at the corner of the central component for the
first four modes. The full stress response obtained from summation of the first 20 modes is also
plotted in Fig. 5.18 for comparison. It can be seen that the second mode makes a major
contribution to the full response. The stress solution from the second mode is much larger than
that from any other mode. Therefore, the results confirm that only the dominant mode of the
model will play a significant role in determining the overall dynamic response of the structure.

Fig. 5.18 Stress histories at the corner of the central component corresponding to different modes,
also compared is the total stress response obtained from the summation of the first 20 modes

92
5.4 Comparison between Short and Long Duration Shock Loads

A comparison has also been made of the resulting dynamic stress profiles between the short
duration impulse and long duration shock loads. Specifically:

(i) For the un-potted PCB assembly, some differences exist between the two cases. In the
case of the short duration impulse, the transient stress wave is the key issue causing
the interconnection stress over the PCB deflection due to its contact with the flat rigid
base. On the other hand, for the long duration shock loading, the PCB bending plays a
dominant role in determining the interconnection stress with the central IC
component experiencing the largest stress among all the IC components.

(ii) For the single potting design, the differences between the short duration impulse and
long duration shock loading conditions are compared in Fig. 5.19. In the case of short
duration impulse, the flexible potting material yields a lower interconnection stress.
This is attributed to the fact that flexible potting would reduce the magnitude of the
shock pulse generated during drop impact. Whilst for the long duration shock loading,
the stiff potting configuration yields a lower interconnection. This is due to the
presence of the stiff potting material and the stronger imposed constraint it provides
to the PCB, leading to a reduction in the induced stress.

93
 (a) (b)

Fig. 5.19 Effect of the potting moduli for the single potting configuration: (a) short duration
impulse, and (b) long duration shock loads

(iii) For the bilayer potting design, the flexible-stiff bilayer design would result in the
lowest interconnection stress state for both the short duration impulse and long
duration shock loading. However, in the case of the short duration impulse, a more
flexible exterior potting layer would further reduce the interconnection stress. Whilst
for the long duration shock, the stress state of the interconnections is mainly governed
by its immediate potting material. Thus, the exterior potting modulus would not
significantly affect the stress level. However, a more flexible exterior potting under
this scenario would significantly lead to a reduction in the local oscillations in the
stress response.

94
 Chapter 6
Conclusions and Future Work

Summary: A brief review of the work and major outcomes of the study are presented in this chapter.
We further outline the major contributions of the thesis and the possible extension of the work.

6.1 Statement of the Problem

In modern electronics industry, it has always been a major concern to protect the delicate
integrated circuit packages from shock loads. Shock loads can lead to the failure and malfunction
of the embedded electronics due to its induced stresses on the PCB IC packages and solder
interconnections.

In this thesis, attention is devoted to the design of the effective electronics encapsulation system
to ensure the mechanical integrity of embedded electronics. The study has been divided into
three main parts. The first part is concerned with the development of a multi-level
micromechanics model for characterizing the effective properties of the multilayer printed circuit
boards. The second part considers the mechanical integrity of the embedded electronics
subjected to the drop impact induced short duration impulse. The third part examines the
reliability of the electronic packaging system subjected to the long duration shock loading
typically observed in gun launch. The effectiveness of different encapsulating materials are also
studied under both scenarios, and the effectiveness of different potting configurations is
thoroughly investigated.

6.2 General Conclusions

Given below is a summary of the findings from the present study.

6.2.1 Micromechanics Modelling of Embedded Electronics

(i) A novel hybrid micromechanics and FE modelling approach is used to determine the
homogenized material properties of a multilayer circuit board with wavy fiber bundles.
Present results reveal that the newly proposed homogenization model can be used as an

95
 effective tool to predict the effective elastic properties of woven composite materials for
multilayer PCB applications.

(ii) The self-consistent scheme overestimates the results of the effective Young’s modulus of the
PCB along the warp and fill directions due to its inability to account for the high
concentration of fiber inclusions.

(iii) The CCA/Three-phase and Mori-Tanaka schemes yield better predictions for the effective
properties of the woven composite material and these results are also found to be in in good
agreement with the existing experimental results.

6.2.2 Embedded Electronics Subjected to Short Duration Impulse

(i) This study indicates that encapsulation would benefit the protection of embedded electronics
subjected to the drop impact induced impulse, reducing its maximum interconnection stress.

(ii) For the single layer potting case, the flexible potting material yields a lower interconnection
stress, but a larger PCB central deflection.

(iii) A dramatic drop in the interconnection stress can be achieved by using bilayer potting
design with the flexible exterior and stiff interior potting materials. The generated
interconnection stress is nearly one order of magnitude lower than that of the single layer
potting case.

(iv) The reversed design with the stiff exterior and flexible interior pottings yields unsatisfactory
interconnection stresses.

(v) A further reduction in the interconnection stress can be achieved, if we use a more flexible
exterior potting or a stiffer interior potting.

6.2.3 Embedded Electronics Subjected to Long Duration Shock Loading

(i) For the single potting design, the stiff potting configuration yields a lower interconnection
stress. The stress history response is composed of the overall similar averaged profile as the

96
 applied loads, and the high frequency local oscillations. The frequency of the local
oscillations increases as the potting modulus increases.

(ii) The stress response of the interconnections is mainly dependent on the properties of the
potting layer that directly encapsulates the PCB assembly. The bilayer design with the
exterior flexible potting would induce lower stress levels and also lowers the local frequency
oscillations.

(iii) The local frequency of the oscillations in the dynamic stress response corresponds to the
dominant frequency of each configuration. The dynamic response of the entire model is
governed by its primary mode.

6.3 Contribution of Thesis

In summary, the contributions of the current thesis are as follows:

(i) Developed a bottom-up multi-level micromechanics based homogenization model to

determine the equivalent material properties of the multilayer circuit board.

(ii) Performed three-dimensional non-linear dynamic finite element analysis to determine the
stress field in the embedded electronics subjected to both short duration impulse and long
duration shock loadings.

(iii) Examined the effectiveness of the different potting designs and potting material properties
upon the shock attenuation performance.

(iv) Proposed a novel bilayer polymer potting configuration for the effective shock attenuation
of electronics.

The results of the work have been published in ASME Journal of Electronic Packaging and
International Journal of Solids and Structures; see Refs. [74] and [75].

97
6.4 Future Work
The following areas are worthy of future research efforts:

(i) Carry out further experimental investigations to confirm the numerical and analytical
findings of this work.

(ii) Investigate the thermo-mechanical response of the system accounting for both the heat
sources and the shock loading.

(iii) Examine the stress state in the bonding interfaces and incorporate the failure criteria into the
numerical analysis.

98
 Appendices

Appendix A

Formulae of Different Micromechanical Schemes

1. Self-consistent scheme:

Plane strain bulk modulus:

k  T
k  k m  c f k f  k m  (A. 1)
k f  T

Transverse shear modulus:

1 b
1 1  1 1  1 b
  cf    (A. 2)
T  m   f  m  T  1  b 
 1  
f  b 

k  2 T
b (A. 3)
2k  T 

Axial shear modulus:

1 1  1 1  2 f
  c f  
  f m   A   f 
 (A. 4)
 A m

2. CCA model:

Plane strain bulk modulus：

m cf
k  Km   (A. 5)
3 3 / (3K f   f  3Km  m )  3c f / (3Km  4m )

Axial shear modulus:

99
 (c f  f  cm m   f )m
A  (A. 6)
cm  f  c f m  m

Axial Young's modulus：

4c f cm ( f  m )2 m
EA  c f E f  cm Em  (A. 7)
1  3c f m / (3Km  m )  3cm m / (3K f   f )

Axial Poisson's ratio：

3c f cm ( f  m )m [c f m / (3Km  m )  cm m / (3K f   f )]

 A  c f f  cm m  (A. 8)
1  3c f m / (3Km  m )  3cm m / (3K f   f )

3. Three-phase model:

Transverse shear modulus：

T 2 
A( )  2 B( T )  C  0 (A. 9)
m m

2    
A  3c1  c   f  1 f   f 
  m   m 
   3
  f  m   f  m   f  m  f c  (A. 10)
 m  m  
    
 c m  f  1   f  m  1
  m   m 

100
 2    
B  3c1  c   f  1 f   f 
  m   m 
1    
  f  m  1   f  1c
2  m  m  
(A. 11)
     3
  m  1 f   f   2 f  m  f c 
  m   m  
     

c
m 1 f 1 f m  f   f 1c 3 
2   m   m  m  

2    
C  3c1  c   f  1 f   f 
  m   m 
   
  f   f   f  m   f c 3  (A. 12)
 m  m  
   
  f  m  1   f  1c
 m  m  

3
a
c    , m  3  4m ,  f  3  4 f (A. 13)
b

4. Mori-Tanaka model:

Plane strain bulk modulus：

( k m  m ) 1
k  km  c f ( k f  k m ) (A. 14)
( k f  m ) c ( k   m)
m
 (1  c f )
f
( k f  m )

Transverse shear modulus：

101
 1 1 1 1 B
  cf (  )
T m f m (c f B  (1  c f ))
b
B ; (A. 15)

1  m (b  1)
f
2(km  m )
b ;
km  2  m

Axial shear modulus：

1 1 1 1 2 f 1
  cf (  ) (A. 16)
A m f m m   f 2 f
(c f  (1  c f ))
m   f

5. Hill's relations:

4 m   f   c f cm  1 
2

E A  cm E m  c f E f     
2 
(A. 17)
 1 1   k f k f  k 
  
 km k f 
 

   f   1  c f cm  
 A  cmm  c f  f      
m
(A. 18)
 1 1   k  k f k f 
  
 km k f 
 

102
 Appendix B

Implementation of Periodic Boundary Condition

Periodic boundary conditions:

Normal strain loading:

For the three sets of boundary conditions, the displacements imposed on the symmetric
boundaries of a FE unit cell are:
S4 : u1 ( X , y1 , z1 )  0,
(B. 1)
S6 : u3 ( x1 , y1 , Z )  0,

1. 11  0 , and all others are zero:

S1 : u1 ( X , y1 , z1 )  11 X ,
S3 : u3 ( x1 , y1 , Z )  0, (B. 2)
S2 & S5 : u2 ( x1 , Y , z1 )  u2 ( x1 ,0, z1 )  0

2.  22  0 , and all others are zero:

S1 : u1 ( X , y1 , z1 )  0,
S3 : u3 ( x1 , y1 , Z )  0, (B. 3)
S2 & S5 : u2 ( x1 , Y , z1 )  u2 ( x1 ,0, z1 )   22Y ,

3.  33  0 , and all others are zero:

S1 : u1 ( X , y1 , z1 )  0,
S3 : u3 ( x1 , y1 , Z )   33 Z , (B. 4)
S2 & S5 : u2 ( x1 , Y , z1 )  u2 ( x1 ,0, z1 )  0

103
Shear strain loading:

For the three sets of boundary conditions, the displacements imposed on the anti-symmetric
boundaries of a FE unit cell are:

S4 : u2 ( X , y1 , z1 )  0, u3 ( X , y1, z1 )  0,
(B. 5)
S6 : u1 ( x1 , y1 , Z )  0, u2 ( x1 , y1 , Z )  0,

4.  23  0 , and all others are zero:

S1 : u1 ( X , y1 , z1 )  0,
S3 : u2 ( x1 , y1 , Z )   32 Z ,
(B. 6)
S2 & S5 : u2 ( x1 , Y , z1 ) u2 ( x1 , 0, z1 )  0,
u3 ( x1 , Y , z1 )  u3 ( x1 , 0, z1 )   23Y ,

5. 13  0 , and all others are zero:

S1 : u3 ( X , y1 , z1 )  13 X ,
S3 : u1 ( x1 , y1 , Z )   31Z , (B. 7)
S2 & S5 : u2 ( x1 , Y , z1 ) u2 ( x1 , 0, z1 )  0,

6. 12  0 , and all others are zero:

S1 : u2 ( X , y1 , z1 )  12 X ,
S3 : u3 ( x1 , y1 , Z )  0,
(B. 8)
S2 & S5 : u2 ( x1 , Y , z1 ) u2 ( x1 , 0, z1 )  0,
u1 ( x1 , Y , z1 )  u1 ( x1 , 0, z1 )   21Y ,

104
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