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Numerical Simulation for MOS Capacitor - DC and Transient

Author:
Kong, Edward Chung-Chiang
Publication Date:
1994
DOI:
https://doi.org/10.26190/unsworks/5112
License:
https://creativecommons.org/licenses/by-nc-nd/3.0/au/
Link to license to see what you are allowed to do with this resource.

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The University of New South Wales

SCHOOL OF ELECTRICAL ENGINEERING

Numerical Simulation
for MOS Capacitor
- DC and Transient

Edward Chung-Chiang KONG


February 1994

Supervisor : Dr. C Y Kwok

A project report (18 credit units) submitted in partial fulfillment of the


requirement for the degree of Master of Engineering Science.
DECLARATION

I hereby declare that this submission is my own work and that, to the best

of my knowledge and belief, it containsno material previously published


or written by another person nor material which to a substantial extent
has been accepted for the award of any other degree or diploma of a

university or other institute of higher learning, except where due


acknowledgment is made in the text.

Edward Chung-Chiang KONG

February 1994
Abstract

This thesis presents a computer programs for simulating of the MOS


(Metal-Oxide-Semiconductor) structures. The analysis and simulation of

the MOS structuresbased on the basic semiconductor equations and

the appropriate boundaries conditions which describe the different


regions of operation of the device in one unified manner. The goal of
this thesis is to develop a program that would simulate the electrical
behaviour of a MOS capacitor. These programs can be used to study the
MOS device under both d.c and transient operating conditions. The

programs will then be used to investigate oxide tunneling and impact

ionization effects under various bias conditions by means of a one­


dimensional numerical solutions of Poisson's equation, electron and hole
continuity equations.
ACKNOWLEDGEMENT

The success of the project surely is a contribution from all the wonderful people

that had supported me during my project. I would like to thank the following

persons, for their contribution in time, effort and valuable assistance during

undertaking of the project.

• Firstly, thanks to my parents for their support and encouragement during such a

difficult and stressful period of my life.

• Thanks to Dr. C Y Kwok for his supervision and guidance throughout the

project period.

• Thanks to Dr. C Y Kwok who has also spared his valuable time for read

proofing my thesis.

• Thanks to Vony Sugiarto for her endless help and support during the project.

• Thanks to Gershwin Luhur for his countless help.

• Thanks to Jusuf Luhur for his help during this project.

• Thanks to Minh Tran for his wonderful computer.


Table of Content

0 ABSTRACT

0 INTRODUCTION

0 NOTATIONS

0 CHAPTER ONE

MOS CAPACITOR PHENOMENA........................................................................... 1

1.1 Fundamental Properties of MOS capacitor........................................... 1

1.2 The oxide charge.....................................................................................9

1.3 Interface charge....................................................................................... 10

0 CHAPTER TWO

NORMALISATION AND DISCRETIZATION OF THE BASIC

SEMICONDUCTOR EQUATIONS..........................................................................12

2.1 Normalisation of the basic semiconductor equations........................12

2.1.1 Poisson equation.................................................................. 12

2.1.2 Electron Continuity Equation............................................. 13

2.1.3 Hole Continuity Equation.................................................... 15

2.2 Discretization.......................................................................................... 17

2.3 Normalisation and Discretization of


Poisson's Equation at the SiOp/Si Boundary
..24

2.4 The Bernoulli Function.........................................................................27

2.5 Notation Simplification......................................................................... 29

Numerical Simulation for MOS Capacitor (0 Table of Content


g CHAPTER THREE

PHYSICAL PARAMETERS MODELLING............................................................ 31

3.1 Physical Description............................................................................... 32

3.1.1 Carrier mobility modelling...................................................32

3.2 Carrier Generation - Recombination Modelling.................................. 35

3.2.1 Fowler Nordheim Tunneling Current and Impact

Ionization........................................................................................38

3.2.2 Band to Band Tunneling......................................................40

3.3 Boundary Conditions..............................................................................41

0 CHAPTER FOUR

NUMERICAL METHODS.........................................................................................45

4.1 Iterative Method..................................................................................... 45

4.2 LU Decomposition................................................................................. 49

4.2.1 Band Diagonal System.......................................................50

4.3 Relaxation Factor................................................................................... 55

4.4 Grid Specification................................................................................... 56

0 CHAPTER FIVE

THE JACOBIAN MATRIX........................................................................................58

5.1 Jacobian for the interfaces...................................................................... 59

5.2 The Jacobian Matrix..............................................................................63

0 CHAPTER SIX

PROGRAM DESCRIPTION AND SPECIFICATION.............................................70

6.1. Execution on Borland C++ Windows.................................................. 70

6.2 Input Statement Description..................................................................71

6.3 Program Execution................................................................................ 76

Numerical Simulation for MOS Capacitor Table of Content


g) CHAPTER SEVEN
RESULTS AND DISCUSSION...............................................................................77

7.1 Effects of non-zero flatband voltage......................................................77

7.2 Effect of substrate doping...................................................................... 78

7.3 DC Analysis............... 81

7.4 Transient Analysis.................................................................................. 82

® CHAPTER EIGHT

CONCLUSIONS.........................................................................................................88

8.1 Identified problems................................................................................. 88

8.1.1 Memory allocation problem................................................. 88

8.1.2 Convergence problems......................................................... 91

8.1.3 Uncertainties in the physical models................................92

8.1.4 Uncertainty in transient analysis....................................... 93

8.2 Capability of the programs................................................................... 94

8.3 General conclusions .........................................................................95

8.4 Further recommendation and work......................................................95

fj BIBLIOGRAPHY

d APPENDICES
Simulation Program Listing for DC Analysis...........................................A

Simulation Program Listing for Transient Analysis.................................B

Plot Out od DC Analysis Results............................................................... C


- Effects of doping concentration variability

Plot Out od DC Analysis Results............................................................... D


- Simulation Results for various biasing conditions

Plot Out of Transient Analysis Results..................................................... E


- Simulation Results for voltage ramping

Numerical Simulation for MOS Capacitor (iji) Table of Content


Plot Out of Transient Analysis Results...................................................... F
- Simulation Results for voltage holding

Plot Out of Transient Analysis Results..................................... .................G


- Simulation Results for voltage holding
including the effect of Impact Ionization
and Band to band Tunneling

Numerical Simulation for MOS Capacitor (iv) Table of Content


Introduction

The application of numerical device models can substantially help in


understanding the device physics of the semiconductor structures of
interest. It provides useful information in the design of semiconductor

devices, coupled with the availability of process simulation software, it is


almost feasible to achieve a successful design in the first run.
Furthermore, the high cost for developmental and experimental

investigations compared to the drastically decreasing costs for computer


resources definitely make device modeling become more and more
important.

Device modeling allow the physical phenomena of a particular device to


be analysed provided the effects to be studied are built in the model. The
program in this thesis accurately simulates the electrical characteristics of
a MOS capacitor for any bias condition. Effects of carrier generation /
recombination lifetime, doping concentration, interfaces charge, fixed
oxide charge, band to band tunneling and impact ionization are accounted
for in the simulation and their influence on MOS capacitor behaviour can
be analyzed. Data files which contain the simulation results are then
displayed graphically using MATLAB™
The effect of impact ionization was treated in a rather heuristic manner in
this thesis as the physical mechanism behind this process is still not
clearly understood, especially the contribution of the FOwler Nordheim

tunneling current to impact ionization. For the purpose of simulation, a


very simple model was applied, just to reflect the underlying physics in a

qualitative way. An excellent method to analyse the aspect of impact

ionization can be found in the application of Monte Carlo technique,


which is beyond the scope of this thesis.

Numerical simulation of semiconductor devices is playing an increasingly


important role as a routine design tool for the semiconductor industry.
The simulation programs in this thesis provide a efficient and simple way

of insight into the functioning of MOS capacitor by means of


distributions of the various physical quantities in the interior of the
device.

This thesis is divided into the following eight chapters and five
appendices :

Chapter 1 introduces the basic phenomena of the MOS capacitor under


bias. The fundamental properties and concepts which define the electrical
parameters and physical parameters (valance band, conduction band,

energy gap, work function, etc.) are defined

Chapter 2 contains detailed description of the normalisation procedures

and discretization the basic semiconductor equations. This chapter also


include the discrete approximation for the boundary conditions.
Chapter 3 provides a description of the physical equations to describe the
MOS capacitor behaviour. This includes the modeling for carrier
mobility, lifetime and generation / recombination, impact ionization and

band to band tunneling effects.

Chapter 4 discusses the numerical techniques used applied to solve the

set of discrete equations, the grid specifications and the choice of


relaxation factors.

Chapter 5 details the procedures used in construction of the Jacobian


matrix.

Chapter 6 discusses the execution of the program, the required input


parameters and files required to execute the program. The various types
of output files including the output data file, graphical display files will
be described. This chapter also include the detailed descriptions of the
input statements for the programs and finally a flow chart is included
illustrate the simulation algorithm.

Chapter 7 discuss the simulated results . This include d.c analysis and
transient analysis of a MOS capacitor. Fowler Nordheim tunneling
current will also be investigate under various operating conditions.

Chapter 8 discusses the identified problems encountered in the

simulation programs and summarises the capabilities of the programs. It


also makes recommendations for possible improvements for the

programs.
Notations

a[][] the Jacobian matrix (compact form) alternatively, it represent the


upper triangular matrix (after LU_decompusition)

al[ ][ ] the lower triangular matrix (after LU_decomposed )

b[] the solution vector / correction vector

band number of band element in the Jacobian matrix

BB flag to turn on or turn off the band to band tunneling effect

BER( ), B Bernoulli function

c donor - acceptor doping concentration (N^ - Na)

^ox oxide capacitance per unit cm-

Cl total ionized impurity concentration (N^ + Na)

cnvg flag:cnvg=l indicate convergent solution.

ctl, ct2 constant in Fowler-Nordheim tunneling equation

constl recombination related constant rn(n + l) + t (p + l)

D[] the current solution vector (xjj, n, p)

DB( ) derivative of Bernoulli function

element number of off-diagonal elements in the Jacobian matrix

E_field[ ] the electric field vector

Ef local electric field in between grid

^OX oxide field

error criterion for calculation (% error allowed)

e0>E0 free space permitivity

EoEox(rel) absolute dielectric permitivity in oxide

EoEsi absolute dielectric permitivity in silicon

Es electric field just inside the silicon at the oxide-silicon interface

factor relaxation factor


fB, flDB Bernoulli function and its derivative evaluated at previous time
step

gl,g2,g3 grid sizes

h, hi, h2 variable grid size

hb barrier height at silicon-oxide interface

hd barrier height difference

holdt final voltage holding time

ht_step time step (after voltage being hold) for calculation

II flag to turn on or turn off the impact ionisation effect

Jo current density normalisation factor

JFN Fowler-Nordheim tunneling current density

Jnn[ ] the electron current density vector

jppt ] the hole current density vector

Kbb.Kbbl constants in the band to band tunneling expression

Kfnl, Kfn2 Fowler-Nordheim tunneling related constant

Ln, Lp values for n ,p at the previous time step

n electron concentration

n counter in the programs (dimension of Jacobian matrix)

Nd n-type doping concentration (/cm^)

Nf areal charge center density for fixed oxide charge (/cm^)

ni , intrinsic carrier concentration


Nn normalised intrinsic carrier concentration
Nt step normalised incremental time step
N Normalisation factor for distance
Oxide un-normalised oxide thickness (in X )

P hole concentration

Ro generation / recombination normalisation factor

Rvs surface recombination velocity

Rtn,Rtp recombination time constant for electron and hole


Rtime total ramping time

ratio 1, ratio of the number of grid spaces in each section.


ratio2, Note: ratiol * ratio2 * ratio3 = 1
ratio3

S = 1/ Rvs

T operating temperature in °K

time time

tn, tp normalised electron and hole recombination time constant

Tsub substrate thickness (in pm)

t_step incremental time step (unnormalised)

*ox Normalised oxide thickness

uLN,uLP temperature sensitive mobility model

uLIN,uLIP impurity sensitive mobility model

uPs,uNs low field mobility model

uSP,uSN effective-field based surface mobility model

unl,un2, mobility model including the effect of lattice and ionised


impurities upl,up2 scattering

Ve saturation velocity for electron and hole

Vbi built in voltage

VFB flat band voltage

Vin. Vfln initial and final applied gate voltage

VQB.Vg external bias voltage

Vs surface potential

Vt thermal voltage

^GB total electrostatic potential difference

^'SB surface band bending

4>b Fermi level in silicon (reference point)

‘t’SB gate fermi level


Qint interface charge

Qf areal charge density for fixed oxide charge

Qs charge in silicon per unit area

xd depletion width

zn, zp electron and hole ionization coefficient in the impact Ionization


expression
CHAPTER ONE

MOS CAPACITOR PHENOMENA

The MOS capacitor is used widely in both analysing the properties of the MOS

system and monitoring integrated circuit fabrication because of it simplicity of

fabrication and analysis. Therefore the MOS capacitor provides a simple and

efficient way to monitor the MOS system as it is actually fabricated and used in

the integrated circuit, particularly in the area of very large scale integrated

circuit.

1.1 Fundamental Properties of MOS capacitor

Figure 1.1-1 shows the top and cross-sectional view of a silicon MOS capacitor.

(a)

GATE

METAL M

•sio2 O
■Si S

-METAL

BODY
SUBSTRATE

Figure 1.1-1 The Physical picture of a MOS capacitor on silicon, (a) the top

view of the silicon chip, and (b) the cross-sectional view.

Numerical Simulation for MOS Capacitor 1 MOS Capacitor Phenomena


When an electron is withdrawn from the surface of the conductive solid (metal

or Polysilicon), an "image" charge appears in the solid and the resulting pair of

opposite sign charges are mutually attractive. Consequently, to extract the

electron we must do work on it. The electron resides at energy higher than the

Fermi level in the solid. This higher energy level is termed the vacuum level. At

vacuum level, the image force is zero.

The energy interval from the vacuum level to the Fermi level- is termed the work

function, O. Thus there exists a barrier at a silicon surface that prevent electron

from escaping, and the work function is a measure of the height of the barrier.

For Silicon the work function is about 4.8 eV and appears not to be a function of

doping.

Figure 1.1-2 shows band diagram for flat band condition of a MOS capacitor

with Polysilicon Gate and N-type Silicon substrate.

^ = -0.56V
Fermi level <|)
~ 8V Intrinsic level

Figure 1.1-2 Band diagram for flatband condition of a MOS capacitor.

Numerical Simulation for MOS Capacitor 2 MOS Capacitor Phenomena


The oxide is an insulator with a band gap of around 8 eV which poses as a

barrier to electron passage into the oxide at both interfaces, the Oxide-Silicon

interface and the Oxide-Polysilicon (or other gate material) interface. However,

under appropriate bias conditions, electrons in the silicon gain sufficient energy

to enter the conduction band of the oxide (from the Conduction band edge in the

Silicon bulk to the Conduction band edge in the oxide) and be accelerated to the

gate electrode. This energetic electron is usually termed a "hot" electron.

When oxide is grown on silicon, its Conduction band edge is separated from the

Valence band edge of the silicon by a potential interval of 4.35 V which

constitutes the barrier height to holes. The Conduction band of the insulator and

the silicon are separated by 3.23 V which is the electron barrier height. These

values are apparently independent of doping and crystalline orientation. Thus

the band structures of the oxide and the silicon have a fixed relationship. All four

band edges band up and down together along with the surface potential at the

silicon oxide- silicon interface in the MOS capacitor.

At equilibrium, the Fermi level in the silicon remain constant irrespective of band

bending in the silicon. The potential difference between the Fermi level in the

silicon and the oxide conduction band edge ( Ygo) change .

correspondingly to bias adjustments on the MOS capacitor.

Refering to figure 1.1-2, the barrier height at the silicon-oxide interface, Hg, can

be calculated by the values of three quantities :

(i) The built in voltage = —In—- (1.1-1)


q Nt

Numerical Simulation for MOS Capacitor 3 MOS Capacitor Phenomena


(ii) The band gap Eg = 1.12 V (for silicon)

(iii) Barrier height between Si02 - Si is -3.23 V

--k+ (11-2)

= 3392-0.56-3.23

=-3.4508V

where Wqq ang lPcs are the conduction band edge in the oxide

and silicon respectively.

Normally, only the barrier-height difference, Hq is of our interest.

HD= hb- Hp
Hq obviously can be positive or negative and because Hq depends on HB , it

follows that Hg) is doping-dependent.

Figure 1.1-3 shows how Hq varies with doping for the case of Silicon, with the

Polysilicon field plates.

N-type Si '
P+ polysil

/Mype Si

Impurity density (cm ")

Figure 1.1-3 shows the dependence of Hj) upon doping for P+ Polysilicon

Boron-doped to lE20/cm-^ and for N+ Polysilicon Phosphorus-doped to

3E20/cm^ based on experimental determination [Werner, 1974],

Numerical Simulation for MOS Capacitor 4 MOS Capacitor Phenomena


Polysilicon is widely used as a gate material in modern intergrated circuits. The
. .' . and
Polysilicon is often heavily dopedAthis gives work function difference between

the gate and silicon substrate.. The MOS capacitor canl be brought into a flat

band condition by applying an external bias of Hq (V) to the gate with respect

to the silicon, if the barrier height difference, is the only non ideal factor. If we

,apply a negative bias to the gate of a n- type

Isubstrate MOS capacitor , the negative voltage on

the field plate will drive majority electron away from the -silicon surface. This

bias condition will drive the surface into depletion. Similarly, if the gate

vo tage Vg is positive with respect to the substrate,

electrons will accumulate at the silicon surface,


and a condition usually termed accumulation occurs.
With a negative bias voltage
on the gate, the majority carriers (electron) will be repeled from the Si

surface and simultaneously attracts the minority caarriers (holes) to the gated

silicon surface. This is known as the surface inversion as there are more

minority carriers at the Si surface than the majority carriers, causing the surface

conductivity to invert to the type opposite to that of the bulk.

When the minority carrier response time is too long or their response is too slow

for them to follow the gate bias sweep, no inversion layer will be formed.

Ih order that the charge neutrality be satisfied by ionized donor alone, the
must
depletion layer widthAbecome wider than in thermal equilibrium. This non­

equilibrium condition is called deep depletion because the silicon surface is

depleted to a greater depth than it would be in thermal equilibrium. Because

minority carrier density at the surface is smaller than in thermal equilibrium,

generation exceeds recombination as the system tries to restore thermal

equilibrium. As gate bias is made increasingly negative, depletion layer width

continues to widen until avalanche breakdown occurs in the silicon, or until

Numerical Simulation for MOS Capacitor 5 MOS Capacitor Phenomena


generation in the widened depletion layer has increased sufficiently to result in a

steady state balance. That is, steady state will result if generation in the widened

depletion region has increased sufficiently to balance the charge added to the

gate by the gate bias sweep. If gate bias sweep is stopped before avalanche

breakdown occurs in the silicon, net generation eventually will restore the

inversion layer to thermal equilibrium.

From the HD variation with doping in Figure 1:1-3, it

is possible to obtain a linear equation to fit the data

for HD dependence on n-substrate doping given by the

equation below.

The barrier height difference,

H — -0.5 + 0.25( log(doping cone) - 14) / 4 ; (1-1-3)

Suppose we arbitrarily change the bias of the N-type MOS capacitor to

Hq < Hp3<0. The result of applying such a bias is shown in the partial band

diagram of figure 1.1-4

Numerical Simulation for MOS Capacitor 6 MOS Capacitor Phenomena


^G1
H

Figure 1.1-4 Band diagram for the n type MOS capacitor with Hqb< Hpg< 0

arbitrarily applied.

The external bias voltage Vqb can be rewritten as the algebraic sum of Hp> and

the total electrostatic potential difference vFqb-

where Vqb is the gate to bulk voltage and is define by

VGB = HD + ^GB (1*1-4a)

Hence flat band condition, by definition ^Fqb = 0, that is Hqb = Hp) and the

bias value is called flat band voltage Hpg.

Since Wqb = ^GS + ^SB

hGB = hD + ^GS + ^SB (1.1-4b)

where Wqs is the electrostatic potential difference between gate and

SiC>2-Si interface and lFgB is electrostatic potential difference between

Si02-Si interface and the silicon back contact often known as


the silicon band bending.

Numerical Simulation for MOS Capacitor 7 MOS Capacitor Phenomena


The band bending 1Tsb directly related to Vg, which is the normalized

potential at the surface of the silicon such as

kT
=------ Vs (1.1-5)
<7

Where Vs = I +* (1.1-6)

L = JtqNikTTq) C/cm 2
The electrostatic potential drop across the oxide is
given by *Pgs = ~ 5 -« ("1*"1“7)
where Qs is the charge per unit area in the silicon
and Cox is the capacitance per unit area in the oxide.
Hence,by substituting 1.1-6,1.1-7 into 1.4(a),we obtain

F, ifa)2+1 (u.8)
D C a 2\ L

kT_
01 Os+-3-2L2 +HD-vOB (1.1-9)
kT C_ kT q

Apply the quadratic formula yields

2 \
a J-JL, JLk --2-2 L2
kT
+ -Vn (1.1-10)
kTC0X~^ kT C. ox J kT

The positive sign on the radical is used for Vqb < Vpg and vice versa.

Numerical Simulation for MOS Capacitor 8 MOS Capacitor Phenomena


1.2 The oxide charge

Another non-ideal property of the MOS capacitor is the presence of a rather

constant and inescapable positive charge at the neighbourhood of the silicon-

oxide interface. A positive oxide charge or when the charges distributed in the

oxide layer gives a net positive space charge seen from the silicon will result in

negative gate voltage shift to the flat band voltage. This fixed oxide charge Qf

have the following properties :

• independent of surface potential

• stable under moderate bias temperature that is, not mobile or

fixed.

• independent of oxide thickness

• approximately independent of impurity type and density

• located within, at most 200A of the Oxide-Silicon interface.

The typical areal charge center density Nf of Qf is approximately 10^/cm^ and

the flat band voltage taking into account of the Qf can be written as

Q/_
Vfb=Hd +
c

hd + (1.2-1)

Numerical Simulation for MOS Capacitor S> MOS Capacitor Phenomena


Hence the electric field in the oxide can be expressed as follows

*«*
OX = s-1

^OX

Where ipas={VGB- VFB) -(t|>, -Vj (1.2-2)

\ps is the surface electrostatis potential, is the built in voltage for the silicon

substrate.
The electric field in the silicon surface can he
obtained from the relationship,
Eox £qx = Esj 8si as displacement at the interface has to be equal,

(1.2-3)
si

1.3 Interface charge


4

Non-perfect crystalline silicon will introduces electronic states with energies that

lie within the Band gap.. This can be caused by the presence of so called "

dangling bonds" at the silicon surface. These interface energy states are able to

trap carriers from the conduction band and the valance as well as emit carriers

into the conduction and valance band. In modern MOS technology, the density

of these states Njnt are typically of the order of 10^ _ lO^Vcrn^ for <100>

orientation silicon.

Numerical Simulation for MOS Capacitor HO MOS Capacitor Phenomena


The presence of charged interface will cause band bending at the semiconductor

surface as shown in figure 1.2-1.

Figure 1.3-1 An N-Type MOS capacitor with filled states are neutral, while

empty states account for positive charge at the surface and a resulting positive

(rightward) field as well as the band bending shown.

The present of positive interface charge will generally cause a shift towards more

negative voltages for the flatband voltage in a MOS capacitor. The charged

interface traps will also cause distortion of the MOS-C high frequency

capacitance-voltage characteristic curve due to the voltage dependencies of the

density of the trapped charge when the applied d.c gate voltage is applied.

In general, the presence of both oxide fixed charge and charged interface traps

will change or distort the characteristic curves for the MOS capacitance. From

these distorted curves, the information of fixed oxide charge and interface traps

can be extract.

Numerical Simulation for MOS Capacitor 11 MOS Capacitor Phenomena


CHAPTER TWO

NORMALISATION AND DISCRETIZATION OF THE


BASIC SEMICONDUCTOR EQUATIONS

The first steps towards a numerical analysis of the basic semiconductor

equations is to scale or normalise the dependent variables-(i|;,n,p) because

they differ by many orders of magnitude and show a strongly different

behaviour in regions with small and large space charge.

As we will see in the following sections, the normalized form of the basic

semiconductor equations is very attractive from a computational point of

view, as the equations have a very simple form. [Selberherr, 1 984]

2.1 Normalisation of the basic semiconductor equations


2.1.1 Poisson equation
The unnormalised Poisson's Equation is given as follows

(2.1-1)

By multiplying both sides by IVb / IsLVj. we obtain,


1 d2q) q Ni f n p c'
K dx2 " e, Vt U N, N,,

By defining x0 = ——f the equation becomes,


q N,-

(2.1-2)

The superscript * indicate normalised values

Numerical Simulation for MOS Capacitor 12 Normalisation and Discretization


Hence, the normalised Poisson 's equation is

(2.1-2a)

It should be noted that the normalized Poisson equation (2.1-2a) involves

only the variable parameters and for the sake of simplicity, the normalization

indicator would be dropped in the following application of the equation.

2.1.2 Electron Continuity Equation

Starting with the electron flow equation, where the variables can be

expressed as a product of the normalized variable and its normalization

constant

(2.1-3)

Then, J„ = J„J':

(2.1-4)

Numerical Simulation for MOS Capacitor Normalisation and Discretization


Proceeding to the continuity equation, by expressing the variable as product

of the normalized variable and normalization constant,

^-qf = -q(G-R) (2.1-5)


dx dt

where (G-R) is the general expression for carrier generation due to

impact ionization and band to band tunneling effects and the Shockley-Read-

Hall (SRH) recombination, this notation will be used throughout this thesis.

Ai4 -<7 ni dn - -q—(G - R)‘


X0 dx* ‘o 10

dj;
dx* J0 10 dt JQ t0

Jo~ g V
where to
is the normalisation factor for the current density.

If we normalise t by /c , the normalized form of electron continuity

equation is given as follows, where the superscript *


has been dropped for convenience.
+ —- (G-R) (2.1-6)
dn dt

Numerical Simulation for MOS Capacitor v* Normalisation and Discretization


2.1.3 Hole Continuity Equation

We carry out an identical proceedure with the unnormalised hole


flow current density.
Dp th|> n Op
J. (2.1-7)
V, dx dx

1 dp* 1
= -qD„D\ntp' - (lD0D'pni
3(x/x„) x0 d{x/xo) x0

(2.1-8)

The normalized form of hole current relation is then read

^ dy* * dp*
Jn = \x rf + Dn (2. l-8a)
p dx* p dx*

Similarly, the hole continuity equation can be normalized in a similar fashion,


by starting with the unnormalised hole continuity equation 2.1-9
dJ
-f-+q^-~q(G-R) (2.1-9)
dx dt

A dJl . ~ni dP* „ni,n d\*

xo °\x/xo) 10 dt

dJ Y2 v2
(2.1-10)
dx~ t0D0 dt ‘A

Since all the parameters use in equation are normalized values, for simplicity,

we will express the normalized hole continuity equation in the following

form (without the superscript) :

dJ fin
-A + ^—iG-R) (2.1-10a)
dx dt

Numerical Simulation for MOS Capacitor 15


t
Normalisation and Discretization
Summary of the normalised basic semiconductor equations will then read

(1) ~^r~(n-p-c) (2.1-11)


dx~

dJ„ dn n
(2.1-12)
<2>s, dt

8P
(2) H" (2.1-13)
dx dt

Note that equation (2.1-11) has been multiplied with a normalization factor

XQ^/Vt while both (2.1-12) and (2.1-13) have been scaled with x02/(DqCo).

The normalising factors are summarised in table 2.1

Quantity Symbol Value

X *0 ijek T/(c/zn,)

K kT/q

n,p,c C„ ni
D..D, A, 1

Vn’Vp £>oho

R DoCo/Xo =ni!t 0

t *o/A

Jn, Jp Jn xn/ (-q Do Cr,)

Numerical Simulation for MOS Capacitor Normalisation and Discretization


2,2 Discretization

To solve the basic semiconductor equations, they must be discretized on a

spatial grid. That is, the continuous function of the partial differential

equations are represented by vectors of function values at the nodes, and the

differential operators are replaced by suitable difference operators. Instead of

solving three basic equations, the simulation program of this thesis will solve

for N unknown for i|),n and p respectively, where N is the number of grid

points.

The key to discretizing the differential operators is to partition the device

into N grid points. The differential equation is then replaced by a set of

difference equations where only the nearest neighbouring points for each

grid points are involved. In this thesis only a one dimensional approach is

adopted which means that the partial derivative of all parameters with

respect to second independent space variable are zero.

There exists several strategies to derive the difference equation from the

differential equations. The simplest one is to replace the differential

operators directly by the difference operators. Assuming that f is

continuously differentiable, we replace the partial derivatives by:

Sf_ /|^ ft-\


(2.2-1)
Sx, \ +/»M
2
where h\ and hj_j are the grid spacing to the right and left of grid point i.

In general the solution of the semiconductor equations exhibit a smooth

behaviour, but in some regions, the solutions might varies rapidly. Therefore

Numerical Simulation for MOS Capacitor 17 Normalisation and Discretization


a non-uniform grid size is generally required. Usually very fine grid size are

necessary for region close to the oxide-silicon interfaces, while larger grid

size are applied to regions close to the back contact. Fine grid size will
give lower truncation error
and longer simulation time‘ while larger grid will decrease the

simulation time. Throughout the following we shall assume a non-uniform

grid size and unless mentioned, all equation will be in normalised form.

2.2.1 Discretization of the Semiconductor Equations

By discretizing, we obtain for Poisson equation at grid point i, we obtain.

di|> dU
dx
'U '-i (2.2-2)
h~~h^" ■ A-0

Similarly electron continuity equation can be expressed as following,

( *^n^L+l ^ *Aj); 1 r)}J


-------- t~~t.--------— HG(V,n,P)-fi(V>n,P)] =o (2.2-3)
”/ at

where Jn=\inn—~ -D — (2.2-4)


dx dx

and similarly hole continuity equation

(2.2-5)
K -A_,

and the current relation recalled from (2.1-8a) is

doj> dp
J„ = up—- + Dn — (2.2-6)
p p dx p dx

Numerical Simulation for MOS Capacitor Normalisation and Discretization


The Discretization of the continuity equation is much more complicated.

The first order approximation for the electron continuity equation is :

Jn I (2.2-7)
2 dx ”l,+2

the second order differential terms has been ignored in the above expression for

simplicity. As we had assume that the electrostatic potential varies linearly

d2 J \
between the grid, that is -----” '-tl/2-- = 0; and hence dropping the second order
dx

terms is justified.

Substituting (2.2-7) into Jn = - Dn —, we obtain,


dx dx

dip n dn | h{ d
.(2.2-8)
dx dx 1,4
l,+? °2 dx' nl‘^
where n(xi) = ni ; n(xM)-nM

With the assumption we made earlier that the Partial derivative of the

electrostatic potential is constant along the path, we can rearrange equation

(2.2-8) as followa

d” n _ -f(x)
(2.2-9)
dx Dn dx Dn

dn 1 dap -fix)
=>------------ —n = -- • ■■ (2.2-10)
dx Vt dx Dn

Where /(*) = + -|))

Numerical Simulation for MOS Capacitor 19 Normalisation and Discretization


|
Let y = eJ v' Ox

The General solution for the first order differential equation is

dx + C (2.2-11)
V Ai J

^ |H<0) f
n = Ce ' +e 1 J< bate (2.2-12)
J

( \
-/(x) e re -4k*) -/•(*)
n-Ce^+e^ (2.2-13)
J j fry
°n _±H V D„n )
V Vt dx
t

The integral term can be approximate in the following way,

-£vO) ( \
fe -fix) /w
t|

{ Dn )
-1
i

K dx n dx

and the first order solution for (2.2-13) is

n.-Ce-' Ul-e^VW,

where
dx /?,.

nj is the electron concentration at node i.

1-^' \hJ
and hence /?, = Ce y' + (2.2-14)
nh+i -H>, 2

dJ
we have assume that —- li +1/2= O’

Numerical Simulation for MOS Capacitor 20 Normalisation and Discretization


and similarly

*L±1 \
\-e y‘ \ h J \
«)+1 = Ce Y V
' + ---------- J-----------
' "I/♦* (2.2-15)
n>,+> -4>,

If we multiply both sides of (2.2-14) by e y' , and both sides of (2.2-15) by


1L
ey' , follow by subtracting the two equations, we get

•»/+! }P/. \ »/■»! ( *1*1 \. It


1-<?K' e - 1-e " V' (2.2-16)
w/V'-)'7”4

Let A
V,

*L
Aey‘
J& 'HI *i*i "i ~ \ ^^1 ( ^/->1 \ nM
h, l-ey' , v< l-e y'
*L

\-ey' \ey' - \-ey' ]"y'


it

qDn
ni nM
k 1 -e eA-l

^[S(-A)», -5(A)«,tl] (2.2-17)

where B(x) is the notation for the Bernoulli Function. The definition and

numerical approximation for the Bernoulli function will be discuss in section

2.4. Finally we arrive at the discretized form of electron continuity equation

.J'»Im4 4K B n>, ni - B *Ei»i (2.2-18)


Ki
* h:‘i L V 'v.t y V K

The derivation for electron continuity equation from (2.2-7) to (2.2-18) are

done in normalised form .

Numerical Simulation for MOS Capacitor 2p Normalisation and Discretization


Similarly for the hole continuity equation

J. i+i
(jD,
B 'v, -'<fi.it Jr i ^
f,„ -iff
Pm (2.2-19)
h, \ V.t V,t J

Hence by replacing Jnli+i/2 and Jnli-1/2 equation (2.2-3),we obtain the

normalised and discretised continuity equation for

the electrons.

D | _D | B(\pt -\jq._,)//,. --q>,>/, -i


«li+r
i ^
• *.*j-i
A +h>~,

+ q{G-R){^,n,p)[ =0 (2.2-20)
dt

Similarly, the normalised and discretised continuity equation for holes would

be:

D I g(<f, -tf,^)^.! --g(<f,.| -<fi)P, D I ^(<f,.| ~<f,)Pi ~g(<f, -<f,-|)fl.


k h, +h,-< h K+K\
*i-l

~^-+(l(G-R)(\f,n,p)[ =0 (2.2-21)
ot

Notice that in D.C. analysis, the terms —would be zero.


dt dt

Numerical Simulation for MOS Capacitor 22 Normalisation and Discretization


f^Tl)
The next steps is to replace the quantities ---- ,---- ,Jn,Jp with an
dx dy

appropriate difference approximation. We assume that these quantities are

constant within each interval, and the partial derivatives of the electrostatic

potential reads:

to h,

*f if t -M’m
to ,-x K\

Substituting these approximation into (2.2-2). The discrete approximation

for the Poisson equation can then be expressed after some algebraic

manipulation as below :

Vm -*Pf *P/ -^,-1


K________ K\ = 0 (2.2-22)
-”i+Pi + Ci
h, + h,A
2

The discrete Poisson's Equation has a local truncation error linearly

proportional to the grid spacing. We also assume that the electric field

between two grid points are constant and hence assume that the electrostatic

potential varies linearly on the path to the first neighbouring grid points.

Numerical Simulation for MOS Capacitor 23 Normalisation and Discretization


2.3 Normalisation and Discretization of Poisson s
Equation at the Si02/si Boundary

By tef&nruigtothe boundary conditions at the interfaces in section

3*3 , we may write:

(0 0 ^ Si eo ~ Q\nt
(2.3-1)

(2.3-2)

%j_ _ _ _ _ _ _ _ _ _ _ _ _ Vii_ _ _ _ _ _ _ _ _ _ _ _ _ ^j
tox 1 h} 2

At the silicon dioxide and silicon interface, Poisson's equation need to be

discretized differently. By expanding the electrostatic potential at grid 1 by

Taylor series,

h; d2ip
^2 = ^1 +. (higher order terms)
2 dx‘

^2 \ d2,ijt
+....(higher order terms) (2.3-2)
2 dx2

Numerical Simulation for MOS Capacitor 24 Normalisation and Discretization


Substituting (2.1-2a) into equation (2.3-2) , where all terms are expressed in

normalized form,

dap
-±{n-p-c) (2.3-3)
dx ,♦

Normalising (2.3-1):

dap ' 5/0, dap *0 1


0 int
dx K <=<,«:

a.
Q» (2.3-4)

where Nn is the intrinsic concentration and

dap
is the normalise oxide field given by
dx

dap
dx

Let vg, - vs - vJb - vb:


Now substituting (2.3-3) into (2.3-4) we obtain the normalised and

discretised boundary condition for the electrostatic potential at the interface.

(2.3-5)
A ‘m 2

Lion (2.3-2) can be normalise by dividing the normalisation factor

JQ = - qD0nJx^^w%^Q\xtain the electron continuity equation at the

boundary

K
ti
B{y'i -Tj>!K]-y--9-y(G-^)* -°

Numerical Simulation for MOS Capacitor 25 Normalisation and Discretization


While equation (2.3-3) can also be normalised by dividing it by the factor J(

we obram hole continuity equation at the boundary.

Where R„ = DaNjxa

Hence the normalised form for (2.3-3) is

Numerical Simulation for MOS Capacitor 26 Normalisation and Discretization


2.4 The Bernoulli Function

The Bernouli function is defined as :

B(x)
ex -1

The Bernoulli Function has to be implemented very carefully for numerical

computation. A rational approximation for Bernoulli function is as follows

[3]:

X ^ X, -X
X
X, =£ X x, -----------
- e * -1
, X
B(x) = { X-, £ X x, 1 —
2
xe~x
x, <. x <. x, --------
3 4 \-e~x
x4 ^ x 0

Based on double precision calculation (ie. accurate up to 15 decimal places).

The constants x\ to X4 is found to be :

X|=-20

X2=-5E-6

X3=5E-6

X4=20

and the derivative of Bernoulli equations are derived as follows:

d _ (—l)(g'l'i""t^' -Q~('4i,>i — )g’p|-~'t''(—1)


(2.4-1)
ch\)t -1J ^eVM-Vi _

Numerical Simulation for MOS Capacitor 27 Normalisation and Discretization


let x = i|)J+1 -y.

~{ex - l) + xe
\
-1 +
(«*->) ex -\ )

d _ (l)(g’1’1--'1'1 -l)-Vjl|)g,|l|*|-’l''(l)

-if

let x-i))w -iji,

(e*-l)-xe‘
(2.4-2)
i^r

__d f M>lt, -Tl>,-")


dtp, -1 J

(2.4-3)
ch\)i -1 J I _jj2

let y - xp# -ip,+1

(ey -1) - yey


w

U^-' -lj {e*-*--if

-(ey -1) + yey


~v^r (2.4-4)

Numerical Simulation for MOS Capacitor 28 Normalisation and Discretization


For simplicity and clarity the following notation will be used for the

Bernoulli functions and its derivative.

B\ -no B2 = B(^, -^,+l)


b3 = £(nn -^,-1) B4 = £(nn-i -no
DB, ~(A) -DB, -tt-W
*|>i *)>w
db1-^-{b1) -DB,------—(£,)
' '*!>,♦, ’

ds3— (fi,) -DB, = -y (B,)


dnn

■(*„) -DB, W
dlj), dx|> i-i

2.5 Notation Simplification

Using the above notations, we obtained the simplified version of electron and

hole Continuity equation as follows > where the subscripts 1,

2 and 3 for n and. P refer to their values at nodes


i-1,i and i+1 respectively.

Brn,-B2n, . B2 mn2 ~ Ba 'n\


Z)
fa h 4. h
" ^ "-1 11 —-2 h fh
rii- i «
' 2

--^ + r/(G-/?)(\|i,/?,/;)[ =0 (2.5-1)


at

and

D. I Bi'P)-Bs'Pi n | ^PizAjh
4 ~ A- 5 u h<+h->
rli-1 ~

dp
+ q(G-R)(p\>,nyp)[ =0 (2.5-2)

Numerical Simulation for MOS Capacitor 29 Normalisation and Discretization


Let

The simplified electron continuity equation then read :

dXB\ ■Pi ~B1 ■«,) -d2{B3 n2 -Bt •«,)-"


at
(2.5-3)
and the simplified hole continuity equation read :

•p,)-rf4(S4-p, - Va)-^+(G(N'.'|.P)-K(V.«.P)] =0
at /o c:
(2.5-4)
In this chapter, we have derived a normalized and discretized form for the

basic semiconductor equations and also for the boundary conditions. Two

assumptions or approximations have been done here,

1. The vector (t|>, n, p) is continuously differentiable and hence their

differential operators can be approximate by difference operators.

2. The quantities J ,7 are assume to be constant within each


dx dy

interval, and the hence the second order partial derivatives of the

electrostatic potential equal to zero.

Numerical Simulation for MOS Capacitor 30 Normalisation and Discretization


CHAPTER THREE

PHYSICAL PARAMETERS MODELING

previous chapter began with a description of the physical equations used by the

programs to describe the MOS capacitor behaviour. In this chapter,

we model the represent the following terms:

mobility, lifetime, Shockley-Hall-Reed recombination, Band to band tunnelling,

impact ionisation and Fowler Nordheim tunneling. The program also allows

material parameters, MOS capacitor geometry, operating conditions and biasing,

to be accessible to the user to modify. This flexible features will be described in

chapter Six.

As much as possible, the equations derived for the purpose of modeling in the

following chapters will include all the details, and step by step derivations,

approximations, of the basic semiconductor equations.

Numerical Simulation for MOS Capacitor 3^1 Physical Parameters Modeling


3.1 Physical Description

In order to solve the basic semiconductor equations govemings the internal

behaviour of MOS capacitor, we need to have a qualitative knowledge of the

associated parameters, like, mobility of electron and holes, carrier generation/

recombination phenomena, Band to band tunneling, Impact ionisation and

Fowler Nordheim Tunneling. Therefore, in the following sections, we shall

discuss the models for these physical parameters.

3.1.1 Carrier mobility modelling.

The carrier mobility in the bulk is determined by various mechanisms. Electrons

and holes can be scattered by thermal lattice vibrations, ionized impurities,

neutral impurities, surfaces and electrons and holes themselves. The interaction

of these mechanisms are extremely complicated and difficult to model exactly.

Therefore, various mobility models published by various people will be

integrated here and used to model the carrier mobility.

Sah, et al has described a model [2] which claims to predict mobility values in

silicon in the temperature range of 4.2°K to 600°K.

1
(3.1-1)
1 f
T
-1.5

+
1
4195^ l 300 2153^

(3.1-2)
( j1 >
1
fr 1J ",‘ 591^
2502^ C 300
1
^300 J

Numerical Simulation for MOS Capacitor 32 Physical Parameters Modeling


This model combines the theoretical lattice scattering mobility caused by

acoustical phonons with a mobility component caused by optical and intervalley

phonons.

A model proposed by Scharfetter and Gummel [3] with just two parameters for

modeling ionized impurity scattering in silicon at 300°K has been widely used

and again, excellent agreement between experimental and calculated results has

been claimed. They are given as follows

(3.1-3)

(3.1-4)

where Cl is the sum of all ionized impurity species times the magnitude of their

charge state,

n
(3.1-5)

and C’r = 3£16cm'3; Sn=350 ;

Cf -4£16c»r3 ; Sp=81 ;

Numerical Simulation for MOS Capacitor 33 Physical Parameters Modeling


In addition, when field dependence is included, Scharfetter and Gummer

proposed the following equations.

(3.1-6)

(3-1-7)

where An = 3.5E3 V/cm; Fn = 8.8; Bn = 7.4E3 V/cm;

Ap = 6.1E3 V/cm; Fp = 1.6; Bp = 2.5E4 V/cm;

Equation 3.1-1 to 3.1 -7 are used in the program.

Numerical Simulation for MOS Capacitor 34 Physical Parameters Modeling


3.2 Carrier Generation Recombination Modeling.
-

In this section, the various physical mechanisms responsible for generation/

recombination will be phenomenologically described. Their expected

contribution to generation/ recombination will be indicated and models for

generation/ recombination will be derived.

Generation/ recombination can be interpreted as a process describing the balance

of generation and recombination of electrons and holes. Due to the generative

and recombinative process, the concentration of electrons and holes will

continuously fluctuated.

There are four fundamental atomic or microscopic mechanisms for generation

and recombination, namely

(i) Thermal (phonons),

(ii) Optical (photons),

(iii) Auger-Impact (third electron or hole), and

(iv) Collective (plasmon).

The collective mechanism involves all the 10^3 valence electrons collectively.

All these mechanism involve either (a) dissipating the recombination energy or

(b) supplying the generation energy. In addition, momentum exchange is also

important in determine the transition rate or the probability of the electron-hole

recombination-generation process. In principle several more mechanism like

transitions caused by plasma oscillations, excitation and spin waves do exist, but

these are usually not so important as the one cited above.

Numerical Simulation for MOS Capacitor 35 Physical Parameters Modeling


The process of capture and emission of electron and holes via traps were first

modeled by William Shockley and W.T. Read, Jr. in their classic 1952 Physical

Review article [4] and by R.N. Hall, now commonly known as the SRH

recombination process. The SRH generation/ recombination consisting of a

sequence of two consecutive capture and/ or emission transitions. The four

possible events are described as follows:

(a) An electron from the conduction band is captured by an unoccupied trap.

(b) An electron from an occupied trap is emitted to the valence band and

neutralizes a hole.

(c) An electron from the valence band is captured by aunoccupied trap, thus

leaving a hole in the valence band and an occupied trap.

(d) An electron from an occupied trap is emitted to the conduction band.

An electron-hole recombination event occurs when (a) and (b) take place

sequentially. Analogously, by assuming (c) and (d) taking place sequentially, an

electron-hole pair will be generated.

With the above given phenomenological description of the SRH generation/

recombination mechanisms, we may express the generation/recombination rate

per unit volume for electrons and holes as follows:

R = (3.2-1)

The expressions for the lifetimes tn, tp can be found in many publications.

Lifetimes are known for their particular expressions which is doping dependent

[5] and typically represented by the expression below:

Tn (3.2-2)
nd+na
1+
Kf

Numerical Simulation for MOS Capacitor 36 Physical Parameters Modeling


X po
xp (3.2-3)
nd+na
1+
N;f
where the coefficients for the expressions are typical
=Tpo = 3.94.£-4

Nrf = Nf = 7.1£15

For the purpose of simulation, it is rather straightforward to assume single level

traps at mid-gap where the fraction of traps. ft, which if occupied is equal to 1/2.

that is.

«1 - no (3.2-4)

Pi = Po • = Pi (3.2-5)

where nj, pj are the intrinsic concentration for electron and hole.

In addition to generation/recombination in the bulk of a semiconductor electron

and hole may also be generated/recombined at surface under similar conditions,

the rate of surface generation/recombination can be much greater than the bulk

generation/recombination rate. The expression for surface generation/

recombination takes the same form as that of SRH generation/recombination:

tip - n~
''surf (3.2-6)
4(»+"i)+4g>+a)

where S denote the surface recombination velocities for carriers. The default

value used in the program is 100 cm/s. Notice that surface generation/

recombination only exist exactly at the surface and the units are in rate per unit

area.

Numerical Simulation for MOS Capacitor 37 Physical Parameters Modeling


3.2.1Fowler Nordheim Tunneling Current and Impact Ionization

The effect of Fowler-Nordheim tunneling current have been an important subject

of investigation, not only for challenges they present to the understanding of

semiconductor physics under equilibrium conditions, but also for the problems

they impose on device applications.

With a sufficiently high negative bias is applied to the gate of a N-type MOS

substrate capacitor, electrons can be injected into silicon from the polysilicon

gate by Fowler-Nordheim tunneling. This high energy electron is sometimes

called 'hot electron', will lose energy by emitting phonons, impact ionization and

possibly creating plasmons. Due to the presence of depletion (field) region, the

generated electron-holes pairs are separated and the holes drift to the Si surface

and the generated electron are rapidly swept into the substrate.

-HXh-

aphonon
^scattering
N POLY

<£ impact
ionization

N- type Si

Figure 3.2.1-1 Energy-band diagram of electrons tunneling in Fowler-Nordheim.

Numerical Simulation for MOS Capacitor 38 Physical Parameters Modeling


The tunneling current can be represented by the standard Fowler-Nordheim

expression in terms of the gate oxide field£

JfN = AEox-exp(-B/Eox) (3.2-7)

where

A= 1.54E-6*(qm/m0x)/<J)0

= 6.55E-6 (A/V2)

B = 6.83E7(mox / m)1/2(f0)3/2

= 2.85E8 (V/cm)

(3,2-8)

Two partial processes are involved in the generation/ recombination due to

impact ionization have to be considered.

(a) an electron from the Valence Band consume the energy of highly

energetic electron from the Conduction Band and moves to the

Conduction Band.

(b) An electron from the Valence Band consume the energy of high energetic

hole in the Valence Band and moves to the Conduction Band.

The generation rate for electron and hole pairs due to impact ionization can be

expressed by as follows

Gn = zn-|Jn|/q + zp- |Jp| / q (3.2-9)

where zn and Zp are the electron and hole ionization coefficients, and Jn and Jp

are the electron and hole current densities.

Numerical Simulation for MOS Capacitor 39 Physical Parameters Modeling


The ionization coefficient can be expressed in terms of the local electric field

zn = 7.03E5exp(-1.231E6 / Ef)

zp= 1.582E6exp(-2.036E6/Ef)

The constant used above have been adopted from MEDICI and Ef is the electric

field in the direction of current flow.

3.2.2 Band to Band Tunneling

The phenomenon of a valence band electron tunneling through the forbidden

energy gap to the conduction band is known as band to band tunneling (BBT).

BBT results is the generation of electron hole pairs and occurs in regions of high

electric field where the local band bending causes the tunneling probability to

become significant.

As a result of down scaling in MOS devices with the use of self-alignment

techniques. There is a significant increase in the electric field strength around the

interfaces and the depletion region. The maximum electric field can reach values

as high as 10E6 V/cm. In this strong electric field, BBT can significantly

contribute to electron-hole generation in the device. Tunneling adversely affect

the leakage current and it is crucially important to take these effects in account in

the numerical device simulation, since these effects can be basically be

considered as the generation or recombination of electron hole pairs, they must

be incorporated as a generation terms in the electron and hole continuity

equations.

Numerical Simulation for MOS Capacitor 40 Physical Parameters Modeling


The model used by this program is adopted from Kane's expression for the

tunneling current and the following expression for can be obtained.

Gbb = 3.5E21- (Ef)2 / (Eg1/2) • exp(-22.5E6 • Eg3/2 / Ef) (3,2-10)

where Eg is the band gap.

The constant used above is adopted from MEDICI and Ef is the electric field in

the direction of current flow.

3.3 Boundary Conditions

By considering the contacts between the silicon substrate and the back contact to

be ohmic contact. The boundary condition for the electrostatic potential at the

contact can be written as:

'l’(t) - ^bi - = 0; (3-3-


i)

xf>0(t) denotes the externally applied bias and q>bi represents the

built-in potential. Ideally, there will be no voltage drop in the boundary ie.

^(t)=%i i (3.3-2)

Assume that the carrier concentration at the back contact are at thermal

equilibrium, (which corresponds to infinite surface recombination velocities!)

np-nj2 = 0; (3.3-3)

n - p - c = 0; (3.3-4)

Numerical Simulation for MOS Capacitor 41 Physical Parameters Modeling


Rearrange these two equations into Dirrichles boundary conditions for the

carriers, we arrive at

y/c2 + 4 nf + c
(3.3-5)

yjc2+4n2-c n2
(3.3-6)
2 . n

The back contact of the mos-c are implemented as simple Dirichlet boundary

conditions, where the electrostatic potential and electron and hole concentration

are fixed.

At the Silicon-Oxide interfaces, the law of GauB in differential form must be

obeyed.

e si (3.3-7)

£sj and £ox denote the permittivity in the silicon and the oxide respectively. Qint

represents the interface charges. Assume that the electric field is constant within

the oxide, the boundary condition for the electrostatic potential at the interfaces

can be express as

dip
— 8,
ra-vt a. (3.3-8)

Vg denotes the applied gate voltage; tox is the oxide thickness and Vi is the

surface potential at the silicon side.

Numerical Simulation for MOS Capacitor 42 Physical Parameters Modeling


The electron continuity equation at the interface:

(3.3-9)
+ 2 to'1'

where

J B ■nx - B ■tu (3.3-10)


4 A L v y, j V K ,

J„ I, = Jm = lA.El*xp(~-)-R^]U. (3.3-11)

dJ np - ni
2- = (G-7?) = - + Gbb +Gij (3.3-12)
‘cp(n + n\)+‘*n{p + Pi)

Where Jfn is the Fowler-Nordheim tunneling current, (G-R) is the generation

/recombination and Eox is the oxide field, which give

3\
-22.5£6 -El
+ CBB=
+ z„ Eil + 3.5E21 • E}- Eg exp (3.3-13)
q q E,

And the hole continuity equation at the interface:

A dJ,
-yj,+
"" ’ 2 to ,r
(3.3-14)

where

^1 ~^2
B (3.3-15)
\ A v K j
•Pi -B
v K J
’ P\

Jp |, =^,^by Neumann's " mirror imaging ". (3.3-16)

dJD
—L =<G-R) (3.3-17)

The expression for the continuity equations for electron and holes will be discuss

and derived in the next chapter.

Numerical Simulation for MOS Capacitor Physical Parameters Modeling


Summing up for the boundary conditions for electron and hole current density at

the interface is as following:

qDn -->iO • a?, - B N': -Ij’ ' f -B\ h


B ■ft
-a-El-exp — -q\(G-R)+ Rsurf=
A \ 'y,t / v y, j v B0x y 2

(3.3-18)

r , \
<P, B ^1 4I2
ft + A(G-/?>.E f =0(3.3-19)
-' ^
ft -s
A r, y v K y

Numerical Simulation for MOS Capacitor 44 Physical Parameters Modeling


CHAPTER FOUR

NUMERICAL METHODS

This chapter will describe the numerical techniques used to solve the normalized

and discretized basic semiconductor equations base on Newton's iterative

method.

We will consider the following tasks as falling in the general purview of this

chapter.

• Solution of the matrix equations Ax = b for an unknown vector x, where A

is a square matrix of (3Nx3N) where N is the number of total grid, and b is a

known right-hand vector.

• Solving the matrix without excessive use of memory. That is to minimise the

memory space usage.

• All calculation done in double precision ( accurate up to 15 decimal places).

4.1 Iterative Method

To simplified the notation, we define the system of non linear difference

equation as follows:

F-ipCU'i-1 .'H’i^i+l >ni-1 ,ni,ni+1 .Pi-1 .Pi,Pi+l) = 0 (4.1-la)

Fn(1t,i-l>'4’i,'4'i+l>ni-l>ni,ni+i,Pi-i,Pi,Pi+i) = 0 (4.1-lb)

Fp('4’i-14l,i,'llli+l>ni-] >ni>ni+l iPi-l >Pi>Pi+l) = 0 (4.1-lc)

Numerical Simulation for MOS Capacitor 45 Numerical Methods


At the k+lth iteration, assuming that (^i-l^^^i^^i+l^^ni-
^k+ljnj^+ljni4.i^+^,pi_i^+l,pik+l,pj+|k+l) js a solution, a first order Taylor

expansion about the k^ iteration gives the following expression.

k+\ dF, dF
F FI , ^ 6i^+1 + *
ai|7 i-l fop, aij) i+i

dF,. dF SF..
X M*+i
6<V+ * 6 nf" + ° Wi+1
dnt_ dni dp,

aF„ dF
+- 6F,-> + 6/7,^+-^- 6 f+V -0 (4.1-ld)
5/7, * ^>1

/7^+l _ /7* +. i+1 dF.


&l|7 7i-lV + Sljl f'1 +-^L- &4> f;;
dl|7 i-l fop, ,

8F X n^ + 1 ^^1 Jt + 1
° F-i +v~ 8 ny +-^l 8<;
*1,-! * d”> t *»<..

8F lc+1 dF.
+- 8 /tr + 8 /if*' + — 8 p*r - o (4.1-le)
^1- dp, * SP.,

. _ pk. +
pk+\ a/* p . . . aFp aF
it+i
8n> r: + 8v|) fFl + 8^ f;,1
doji i-l *t\ axp i+l

dF. , , dF dF
+- 8 n" + F x ,,^+1
* F+i
aw,.. *
6 "‘i +~F
dn. * dP.,

aF dF dF
6p,*.V + 8 P, + 8 rf,V - 0 (4.1-1Q
dFi- * dp, * dP.,

denote Poisson equation, Fn and Fp denote the continuity equations for

electrons and holes respectively.

Equations (4.1-ld), (4.1-le) and (4.1-If) sonstitutes a system of linear equations

in 6 x|7, 6 n, and 6 p where the derivatives are evaluated from values of the

Numerical Simulation for MOS Capacitor 46 Numerical Methods


previous iteration. This linearization scheme is commonly known as thw

Newton-Raphson method.

The Newton's method allow all the variables in the problem to change during

each iteration, and all of the coupling between variables is taken into account.

Due to this, the Newton's algorithm is very stable. The new corrected vector for

k-th iterate is given by

(4.1-2a)

(4.1-2b)

(4.1-2c)

The results obtain is just an incremental correction to the intermediate

approximation of the solution. The Jacobian matrix has 3 times as many

columns and rows as the matrix for a single variable. Although the number of

iterations required to solve the non linear system is increased, the overall

solution of the non linear system can be much cheaper because of the

simplification for the linear system.

The basic semiconductor equations are now a system of coupled


equations which have to be solved iteratively in a
simutaneous manner.

difi.i " 9n,.i " dp,, i

Numerical Simulation for MOS Capacitor 47 Numerical Methods


If (ill4,/)1, pk) are the converged solution, F(tyk*',nk*', pk*') =0 (4.1-4)

which leave us the following matrix to be solve for each


grid,

-
*
L>>
Qj
< < < < < < apf-V

r
■*IVi 5«,-i dfl-i 3ij), dni a^lti a«,*l
M? a? a/? ar; a/? a/?
*C,-i 9»/-i 3P/-’i 6/7, $P, a^, a»M aplt,
< < < < < < < < - <
Apf*1
*f,-i 5«,-i 3Pi-, *!>/ 6/7, 6/7,. *P,>1 ap,*i 2 fc+l
°WI+1

c_£ + l
. A+i j

.«... «f-,. A*)


. H>f, <i,„ tfX... A-,. Pf)

(4.1-5)
The general structure of the Jacobian matrix to be solve is
*11 *12 *13 *14 *15 *16

*21 *22 *23 *24 *25 *26

*3. *32 *33 *34 *35 *36

*41 *42 *43 *44 *45 *46 *47 *48 *49

*51 *52 *53 *54 *55 *56 *57 *58 *59

*61 *62 *63 *64 *65 *66 *67 *68 *69

*74 *75 *76 *77 *78 *79 *7,10 *7,11 *7,12

*84 *85 *86 *87 *88 *89 *8,10 *8,11 *8,12

*94 *95 *96 *97 *98 *99 *9,10 *9,11 *9,12


• • • • • •

• • • • • •

• • • • • •

*/i-2,n-5 */)-2,n-4 an-2,n-2 an-2,n-2 *n-2,»-l *n-2,n

an-\,n-i *//-l,n-4 *rt-l,n-3 */i-l,/»-2 *n-l,»-l */»-l,n

an,n- 5 *n,n-4 *«,«-3 an,n-2 *n,/i-l *n,/7

(4.1-6)

Numerical Simulation for MOS Capacitor 4,8 Numerical Methods


4.2 LUDecomposition

Suppose that the Jacobian matrix (4.1-6) could be written as a product of two

matrices, A = L U where matrix L is has elements only on the diagonal and

below and whilst matrix U has elements only on the diagonal and above such that

an an a\.n-\ a\n 'A,0 0 0' 'Un £A- l/13 uu '


a72 a2n A. A, 0 0 0 Vn

Ai • 0 0
• • •
an-\.n-\ an-\.n 0 0

---
0 0

b
o
anX an,n-1 ann .4, A2 A,. _

c
1
(4.2-1)

We can use this LU decomposition technique such as above to solve the matrix

equation.

A x = (L U)- x = L-(U-x) = b (4.2-2)

by first solving for the vector v such that L • y = b , and then solving U • x =y.

The advantage is that the solution of the triangular set of equation L • y = b

can be solved by forward substitution as follows,

(4.2-3)

y, - i=2,3, .... , N. (4.2-4)

Numerical Simulation for MOS Capacitor P Numerical Methods


which U • x = y can then be solved by back substitution.

(4.2-5)

i = N-l, N-2, ... , 1. (4.2-6)

4.2.1 Band Diagonal System

Naturally, we do not want to reserve memory space for the full N by N matrix,

but only for the non-zero components. For a large matrix, memory space

become the limitation for computation and hence limit the accuracy of

calculation. For example, to solve the three basic semiconductor with 1000 grid

will require approximately 9 Mega byte RAM, only to store the values of the

matrices, which is not usually available in a personal computer.

Notice that the matrix have only non zero elements immediately to the left

(below) of the diagonal and 5 non-zero elements immediately to its right (above).

If the matrix is manipulated and store in the compact form so that the non zero

elements lie in a long, narrow matrix with m columns and N rows where m « N

is the number of band elements of the matrix. This can be illustrated by the

following compact form of band diagonal matrix.

Numerical Simulation for MOS Capacitor 50 Numerical Methods


X X X X X
*>i *12 *13 *14 *.5 *16

X X X X X
*21 *22 *23 *24 *25 *26

X X X X X
*31 *32 *33 *34 *35 *36

X X
*41 *42 *43 *44 *45 *46 *41 *4, *4.

X X
*51 *52 *53 *54 *55 *56 *51 *51 *5.

X X
*61 *62 *63 *64 *65 *66 *61 *61 *6.

X *74 *75 *76 *77 *78 *79 *7,10 *7,11 *7,12

X X
*84 *85 *86 *87 *88 *89 *8,10 *8,11 *8,12

X X
*94 *95 *96 *97 *98 *99 *9,10 *9,11 *9,12

X X *10,14 *10,15
*10,7 *10,8 *10,9 *10,10 *10,11 *10,12 _ . *10,13

X X
*11,7 *11,8

• • X X

• •

X X X X X
*/i-2,«-5 *n-2,«-4 an-2,n-3

X ^_l>n_4 X X X X
an-\,n-5 */i-1,/j-3

ann X X X X X
n,n-5 an,n-4 an,n-3 *!,.»-2 */i,/i-l nn

(4.2-7)

x denotes element that are wasted space in the compact storage format. In that

case, the solution of the linear system by LU decomposition can be accomplished

much faster and more efficiently by this method of memory allocation (33 Kbyte

compare to 9 Mbyte RAM).

• The following section will briefly describe the operation of the sub-routine

LU_dec.

• This routine constructs an LU decomposition of a row wise permutation of

the matrix a[N][band],

• The upper triangular matrix replaces a, while the lower triangular matrix is

returned in matrix al[N][band],

• indx[l..N] is an output vector created to record the row permutation effected

by the partial pivoting.

• This routine combined with Back_sub( ) to solve the matrix.

Numerical Simulation for MOS Capacitor 54 Numerical Methods


Remarks : N is the dimension of the matrix

band is the number of components in each row.

element is the number of components at each side of the diagonal.

ie band = 2*element + 1.

Numerical Simulation for MOS Capacitor V Numerical Methods


The routine of LU_dec is as follows.

1. START

2. From row k to row N (start with k = 1)

If element < N, increase element by 1. (start with element = 5)

2.1 From row i to row (element + i)

Find the pivot element;

swap row i with the row where pivot element found;

The permutation is recorded in indx[k];

increment i by 1 and goto 2.1

2.2 From row k+1 to row element

Factor = a[i][l] / a[k][l] ;

al[k][i-k] = factor;

2.2.1 From column (c=2) to column (c=band)

a[k+l][c-l] = a[k+l][c] - factor*a[k][c];

Note : First element of row (k+1) will be eliminated and replaced

by new 2nd element of row (k+1)

increment column c by 1 and goto 2.2.1.

increament row (k+1) by 1 and goto 2.2.

increase k by 1 and goto 2.1

3. END

Numerical Simulation for MOS Capacitor 53 Numerical Methods


The routine for Back_sub( ) is as following :

1. START

2. For row (k = 1) to row (k = N)

Due to the permutation, the solution vector b[N] will be swap according to

indx[N];

Each element of b[i] will be adjusted by the corresponging factor stored in

al[k] [i-k];

increase element (counter) by 1 until element = N.

2.1 For row (i = k+1) to row (i < element)

new b[i] = old b[i] - al[k][i-k]*b[k];

increase row i by 1 and goto 2.1

3. Back-Substitution.

3.1 For row (i = N) to row (1)

3.1.1 For row (k=2) to row (k=element)

new b[i] = old b[i] - a[i][k]*b[k+i-l];

correction vector b[i] = new b[i] / a[i][l];

increase element (counter) by 1 and goto 3.1

4. END

Notice that to minimize memory allocation, the original matrix a[N][Band] has

been destroyed and replaced by the upper triangle matrix. While the solution

vector b[N] also vanished as it was replaced by the new correcting vector.

Numerical Simulation for MOS Capacitor 54 Numerical Methods


4.3 Relaxation Factor

As a result of rapid changes of (i|),n,p) at certain region, especially at the edge of

the depletion region, it is necessary to damp the "numerical ringing" in the

iteration. The simplest mechanism is to limit the maximum change of the vector

(\|>,n,p) per iteration. This is done by introducing a relaxation factor. Too tight

a bound slows convergence while too large can lead to overflow. The default

values for the relaxation factor is 0.67 for the first 3 iteration and 0.5 for

iteration up to 15. When the solution do not converge within 15 iterations, we

assume that the solution is ringing , hence introduce a lower relaxation factor,

which will slow down the convergence but will stabalize the system. For faster

but quite risky simulations, larger values are possible. The speed advantage is

significant but the solutions might not converge at some region due to

"numerical ringing

To change the relaxation factor, the user have to modified the program's

parameters (at approximately line 220) by changing the values for the 1 factor1.

When the norm of the error fall by more than a certain criterion ( default is 1%),

the solution is considered sufficiently accurate and no recalculation will be done.

The criterion is set at higher values 2% and 5% at regions where the carriers

concentrations falls below IE-12 and IE-16 in magnitude compare to intrinsic

concentration. The default criterion can be adjusted downward to increase

stability or upwards to increase convergence speed. It should not increase above

5% to preserve the stability of the Newton's iteration. For the case of electron

concentration drop below 0.1 / cm^ , we do not test the norm if it satisfied the

criterion.

Numerical Simulation for MOS Capacitor 55 Numerical Methods


However, whenever a large number of iterations is required, then it is likely that

the solution is not converge or in some way ill-conditioned. The most frequent

cause is numerical accuracy limit. The electron concentration in the depleted

region might have a magnitude difference of IE-20 compare to the hole

concentration at the inverted layer. A general assumption was made here that

node (i) is converge if both node (i-1) and node (i+1) hss converged and solution

at node (i) can be obtained by interpolation.

4.4 Grid Specification.

A crucial issue in device simulation is to decide on the correct allocation of grid

size and number of grid points required. This is because different parts of a

device have different electrical behaviour. For example, it is desirable to

allocate fine grid spacing near the silicon-oxide interfaces and in the depletion

region and coarse grid at bulk near the back contact. As far as possible, it is

desirable not to allow the fine grid to spill over into the regions where it is

unnecessary in order to maintain the simulation time within reasonable bounds.

It is impossible for most application of the semiconductor equations to specified

a best grid allocation . The behaviour of the device must be known first in order

to design a numerically suitable allocated grid with as few as possible grids

points. However, we will not investigate the design of grid specification.

In the programs, the user is requested to define 3 geometrical regions for the

MOS capacitor. The program will then ask for the fraction of the total number

of grid points to be allocated to each of the region. For the reason stated before,

Numerical Simulation for MOS Capacitor 56


f
Numerical Methods
a correct allocation of grid will not only reduce the simulation time, it will also

improve the rate of convergence when solving the Jacobian matrix.

Numerical Simulation for MOS Capacitor 57 Numerical Methods


CHAPTER FIVE

THE JACOBIAN MATRIX

In the preceding chapter, we have obtained the normalized and discretized form

of the basic semiconductor equations. This yields a large system of non-linear

algebraic equations where the values of the dependent variables at discrete points

are unknown. Firstly we need to obtain algebraic expression for all the terms in

the Jacobian matrix. Equation 5-1 is a global expression of the coupled linearised

equation, that attempts to solve the pair electron and hole continuity equations

simultaneously (not by Gummel's algorithm).

Fy(Vn-\’nn-X>Pn-l)

Fn n-1 > nn-\ > Pn-\ )

FP(ykn-X>nkn-l’PL)

(5-1)

For the consideration in this chapter, we will derive the algebraic expressions of

the Jacobian matrix.

Numerical Simulation for MOS Capacitor 5? the Jacobian Matrix


5.1 Jacobian for the interfaces.

Recalling the mixed boundary conditions for the electrostatic potential at the

oxide-silicon interfaces :

-A(jg-n-C) + - = 0
K tox 2

(5.1-1)

The Jacobian is constructed by partial differentiation of FB(\p,n,p)

£Si02
(V, ”, P) -
SSi ' Kx

9F‘, , , A.
0/7, 2 ’

dF. , . . ^
2

^7(w)=v

“0;
dn2

dFB
■7JL(n>,«,P) = 0;
dp2

Numerical Simulation for MOS Capacitor 59 the Jacobian Matrix


For the electron continuity equation at the interface in equation,

D.
KB ■ nf- B{\^~ \|$ * /£]

T M •'U
J FN **1 . .
, *, ary* -1
«Tn ™
^-(«r**+p+~(pr*'+i) 2 t.(*,+o+t,(A+i)

I 3.5£21-£* ' -22.5E6-E*2'' J_


4 +----- ---------- exP
bs

(5.1-2)

where Jjrpj is the un-normalized form of Fowler Nordheim tunneling current

Jm = 6.55£ - 6 (Vcr-K)’K •exp


-2.85.E8 -tm
; (5.1-3)
{Vv-Vfttj

(K-v,)-v, (5.1-4)
h-N_
where N is the normalisation factor for distance

vGr = VG - Vfb + vbi (5.1-5)

Notice that Jpqq and Ef are in un-normalized form.

Remarks :

(1) The value of generation contributed by impact ionization (G^) and band

to band tunneling (G^B) are evaluated at the previous time step.

(2) All other terms are evaluated at time tm+i except when indicated.

(3) The term (rv^n*) / dm only exist in transient analysis.

(4) dm is the time step, = tm+i - tm

Numerical Simulation for MOS Capacitor the Jacobian Matrix


(5) The notation for Bernoulli function can be found in chapter 2 section

1A.

To simplify the notations, let,

kfnl =6.55E-6*(Vt/t0X)2:

kfn2 = -2.85E8*tox / Vt •

3.5£21 V. 1
kbbl
E\
Jg V h-N„*/ ^g

kbbl = -22.5E6-E*1 -h-Ny'


r.
constl = (n1+1)/s + (p1+l)/s.

Equation (5.1-2) can now be written as :

kfnl
-kfn 1 • (VGr -V^2 • exp
VV
' Cr
-V
y\ Jn

kfnl _1_
zn ’kfn\• (VGr -Vj)2 • exp
V
V Gr -V
Y\ *0

f kbbl ' fhPi 1


kbb\-(Vx - K, )2 • exp — 4-
v -V
VKi VU K 2 t.O,+ 1)+1,0>, +-1)

„»»+iL m+i i
>h P\ “l (C1 (5.1-6)
2 j-(«r*+q+2-<*ri+»

The Jacobian's is therefore obtained by differentiating Ff with respect

to (qv7,/7) as follows:

dFf D,
■\-DB2-nx + DB\-n2]
d-ijq \

Numerical Simulation for MOS Capacitor 61 the Jacobian Matrix


( kfnl
-kfn 1 • exp ■(-2-(V0r-Vl) + 107 2)
V -V
/ Gr V\ J
I Jn

Note. The values of and G^B are evaluated at previous time step or at

previous iteration. As a results, the derivative of G^ and G^B with respect to

(i|>,n,p) is zero.

CPn = Dn ,B2) { h(Pr C0”St]- ~ (”l • Pi ~ VIS) .

3\ /z, 2 const l2

= Dn \h ^ ' C°nStl ~ ^ ' P] ~ 1 •


4?i \ 2 const l2 dm

« ^l(DB2-h, -DBl-n,)
$V2 h

3u h

4>i

The expression for hole continuity equation can be expressed as following :

l7f(V',n,P) = - ip2)-p2 - B(y/2 - y/t )•/>,] +^”' A ^


!r\ 2 const \

Pi - />: z„-kfn\-(VGr -V] f -exp ' 107 2


dm K - K1
VKOr
F y

r kbbl ^ _ 1_
kbb\-{Vx - V2)2 - exp (5.1-7)
K2 j

The Jacobian matrix can then be obtained by differentiating F? (y/, n, p) with

respect to (y/,n,p) as shown in the following :

Numerical Simulation for MOS Capacitor 62 the Jacobian Matrix


r
dFp _ h (/?, • constX - (m, • /?, - \)/S)
dnx 2 const l2

= DP , h (nx • cot?5/1 - (p • ^ - \)/S) 1 .

cpx /z, 2 co/75/12 dm

D
-r- = -L(DB2-p2-DB\>px)
dy/2 h

5.2 The Jacobian Matrix for the sulk

The discrete approximation for the normalised Poisson equation as derived

earlier (3.3-6) is rewritten here :

Vm '4h-'4h-i
h i-l
- ", + p, - C, = 0 (5.2-1)
A + K\

rearrange the terms, we obtain,

2 (
n>;.i - +
K\ • (A + A-i) ’ A • (A + A-.) A-i • (A + A-i).

T—77—7—:^,.I - ", + Pi - c,. = o (5.2-2)


A • (A + A-i)

Numerical Simulation for MOS Capacitor 63 the Jacobian Matrix


The Jacobian is then obtained by partial differentiate F ( y/, n, p) with respect

to ( n, p), we obtain,

__ 2
dy,-\ K\-(.k+hu)'

4>,-,

-2
dy/i hj + hj7-1 vA A-i

-1
<3?,

4?,

_________ 2
^y,>i \ - (A + A-i) ’

For the sake of simplicity, the following notation will be use in the construction

of the Jacobian matrix. The expression for generation and recombination (un­

normalised) has been derived in chapter 2, where they are rewritten as,

R(y,n,p) = R-G11 -GBB

n•p-1 Kb 1
(VIAI+Vl-7,!)/A,exp
const 1 )

(5.2-3)

Numerical Simulation for MOS Capacitor 64 the Jacobian Matrix


where
constl = Tp ( n +1) + xn ( p + 1);
zn = 7.03E5 x exp (-1.23E6 / Ef);
zp = 1.582E6 x exp (-2.038E6 / Ef);

Kbb =3.5E21/Eg1/2 ;
Kbl =-22.5E6 x Eg3/2 ;

E,
v. -Vm Vw-^>_hi-i K.
i-1 hi hi-1 jh 1-1+“i

T I T I
J I -J I
J n\i-M2
h
rli-1/2
,'a-1/2+ /7,+/7i_1 2

h hi-i
y/»li-1/2 + Jn I /+1/2 (5.2-4)
h + h>•-1 J vA + A-iy

To simplify the notation, let

M’nli+l/2 hi-i
Kf 1
vA + K\j

M" n I /'—1 / 2 K
K/2 1-
*/-l A + A-i y

Substitute the above simplified notation into equation (2.2-2), the electron

current density at node i can be expressed as :

Jn|j = Kf2- (B4 nl - B3 n2) + Kfl (B2 n2 - Bl n3);

(5.2-5)
where n1,n2,n3 and p1,p2,p3 refer to the electron and
hole concentrations at the (i-1 )^ (i)^ (i+1 )^ node
respectively.

Numerical Simulation for MOS Capacitor 65 the Jacobian Matrix


similarly, the expression of hole current density at node i is,

jx
pu .
- “jp I* —1/2
'~p li +1/2 Jp 1-1/2
hj +/|._1
fy-m

J ^ li-1/2 1 - + J p li-t-l/2 A-. N (5.2-6)


V A + A-1 y V A + A-i y

Now let,

_ M-,1,,.1/2 A-i
A Ia+A-w
H-L
'p li-1/2 -K
' / / h ^
A/" 4 i - -1
i-1 A + A-i j

Using the simplification notation mentioned earlier and substitute into equation

(2.2-22), we then obtain the expression for the hole current density as following,

Jpli = Kf4 (B4 P2 - B3 pl ) + Kfi (B2 p3 - Bl p2 ) (5.2-7)

Recalling the discrete approximation for the electron continuity equation and

substituting the expression of the generation and recombination terms into

(3.5-3) ( Notice that for sake of simplicity, the simplified version for generation

/ recombination as stated in previous section will be used.)

F„ (i|>, n, p) = d\-(B, ■ n, - B, ■ n2) - dl ■ (B3 ■ n2 - ■«,)

n2 - n2 n2 ■ p2 -1
d_. const 1

f Kbl^
Kbb E2f ■ exp
(viyj+vi-Aui)
+------------------------------ ---—-— + (5.2-8)

Numerical Simulation for MOS Capacitor 66 the Jacobian Matrix


As mention earlier, the generation contributed by the impact ionization and band

to band tunneling effects are evaluated at previous time step (tm) and therefore

their derivative at time (tm+i) are zero. The corresponding terms for the

Jacobian matrix are :

dF
---- — = d2 • DB3 • n2 - d2 • DB4 • nx ;

d2'BA
^,-i

dFn
- 0
ty,-1

dF
—— = d\ ■ DBt • «3 - (d\ ■ DB2 + d2 • DB,) •«, + d2 ■ DBA ■ n, ;

Pi • cons^ 1 ~(»2 7, -1)-T,


= -d 1 -B2-d2-B2-
dnt const X1

dF„ n, ■ const1 - (n, • p, - 1) • t„


dp, com/12

J5l. rfl ■ (-DB, ■ n2 + DB2 ■ n2) ;

J&. d\ ■ B, ;

iA 0;

Numerical Simulation for MOS Capacitor 67


r
the Jacobian Matrix
Similarly, combining equation (3.5-4) and the simplification notation for

generation and recombination terms previously mentioned, the discrete

approximation for hole continuity equation read :


FpiS/^,p) = dh{B2p2-Bl ■ p2)-d4-(B4 p2-B,-p,)

Eizll 'hSEizl
dmm const 1

Kb\
Kbb ■ El • exp
(v
+------------------- ----------- +
En (5.2-9)

Differentiate F (ip, w, p) with respect to ('ll), n, p) we get,

-pE = d4- {DB4 ■ p2 - DB, ■ pt) ;


*Pi-i

- 0 ;

3»/.i

El. d4 • B3 ’
tyi-t

BF,
—— = d3 ■ DB-, • p3 - (d3 • Z)5, • p2 + d4 • Z)Z?4) • + <i4 • D2?3 • /?,

^ = Pi 'const 1 -(m2 -/?2 -l)-x,


5/?. co/z^l2

n2 • c<msf 1 - («2 • p2 - 1) • x
—= -</3*£, - d4 ■ B4
dpi c<ms/l2

■7^- = d3 ■ (DBX ■ p2 -DB2-p2) ;


*P/+i

“0; d3 ■ B2 ;

Numerical Simulation for MOS Capacitor 68


r the Jacobian Matrix
The general form of the coefficients of the Jacobian matrix has just been

determined. These terms will be generated by the program with an initial guess

values for the vector (i|>, n, p). The Jacobian matrix will be solve iteratively with

the numerical method described in the previous chapter. All the coefficients will

be calculated and stored in double precision. Precaution has also been taken to

reduce round off error during the calculation, especially for the Bernoulli

functions. The Jacobian is generated by the subroutines compl, comp2, comp3

and comp4 of the programs and are stored in a compact form described in

Chapter Four. The user will not be able to study the Jacobian matrix as it is not

stored in any form and the matrix will be destroyed by the LU decomposition

process.

Numerical Simulation for MOS Capacitor 69


r
the Jacobian Matrix
CHAPTER SIX

PROGRAM DESCRIPTION AND SPECIFICATION

6.1. Execution on Borland C++ Windows

The Transient.cpp and DC.cpp can only be executed in the Borland C++

Windows (BCW) environment, but not the Borland C++ DOS environment. This

arises because the memory storage for the matrix (compact form) and the other

vectors use up to 1 MByte RAM or more. In DOS, only around half MByte

RAM out of 640 KByte can be utilised by the program.

However, in the Windows environment, the (DOS Protected Mode Interface)

DPMI runs the compiler in Protected Mode. This gives the program access to all

the computer's memory. The Protected Mode interface is completely transparent

to the user.

The steps for executing the Transient.cpp and DC.cpp are as follows :

(1) Run the BCW and then select the menu FILE to open the DC.cpp or

Transient.cpp file.

(2) Select the menu OPTION;

(i) then select the GENERATION CODE and choose the LARGE

Model

(ii) select ADVANCE CODE GENERATION and choose

80287/80387 Floating point and choose 80386 instruction set.

(3) select the menu COMPILER, then compile and link the program

(4) RUN the program

Numerical Simulation for MOS Capacitor 7,0 Program Description and Specification
6.2 Input Statement Description

The program will respond by printing a header identifying the program on the

user's terminal. The program will ask the user the following questions :

" Do you want to define a neyv MOS capacitor structure ?"

Warning. Make sure that the initialization data file exists at the BorlandcABin

directory if you choose No, otherwise it will cause numerical overflow and

unrecognised data form problems to the program as it will try to read the data

from nowhere. This can only be terminated by pressing Ctrl-Alt-Del.

Defining a new MOS capacitor structure.

If this is the first time you use that the user is using the program or want to

define a new MOS capacitor structure, the program will request the user to do

the followings :

(1) Give comments or title to the data file. This data file can be used as

the initialization data file. The comment must end with

(2) Define the geometrical structure of the MOS capacitor

(3) Define the characteristic or features of the MOS capacitor.

(4) Carrier recombination velocities and life time constant.

(5) Grid space allocation.

(6) Biasing, operating conditions, eg. ramp rate, (for transient analysis)

(7) Whether Impact ionization and/or Band-to-band tunneling effect to

be included.

Numerical Simulation for MOS Capacitor 71 Program Description and Specification


t
The Substrate of the MOS capacitor is subdivided into three geometrical

regions, which could be define by the user and the allocation of grid

spacing to these regions is also flexible for the user to change. However,

the user remember that ratio 1 and ratio 2 are requested and by default,

ratio 3 = 1- ratio 1 - ratio 2.

For each question the suggested value and the unit to be used is printed.

All the above information will be stored in the out-put data file. When

this output file is used for further simulation, the above conditions will be

adopted.

The program will then calculate the built-in voltage, the barrier height difference

to estimate the flatband voltage and initialise the MOS capacitor with the self

generated flatband conditions. This means the initial runs will start from the flat

band (or close to it) conditions.

Using existing MOS capacitor structure and data file.

If the user choose to use the existing MOS capacitor structure and data file, the

program will request for the initialization data file name and the output data file

name.

From the initialization data file, the program will read in the comments, MOS

capacitor structure information, operating conditions that provide the datafile

and other features. These information will be printed on the user's screen.

The information on the geometrical structure, features of the MOS capacitor,

and the operating conditions will be used to initialize the subsequent simulation

Numerical Simulation for MOS Capacitor 72 Program Description and Specification


run. The information on the operating conditions obtained from the data file will

provide the starting voltage for subsequent simulation runs.

" Enter output data file name :"

This data file will contain all the information, namely the geometrical structures,

features of the MOS capacitor, and the operating condition. The structural

information (xp,n,p) of the MOS capacitor for that particular operating condition

will also be stored. This output data file can be used as the initialization data file

if the user want to continue the simulation at the later date.

" Enter transient Matlab display file " (transient analysis)

At the end of each time step, the values of electrostatic potential, electron & hole

concentration at the oxide-silicon interfaces and bulk will be stored with respect

to time. The data is stored as normal text and in columns form (t, x, ip, n, p)

which is ready to be displayed.

" Ramp from xy Voltage to (Vfjnai V) " (transient analysis)

" Final applied gate voltage (Vfjnai V) " (DC analysis)

" Enter calculation voltage step (VSfep V) "

For the case of transient analysis, the applied gate voltage will be ramp from

^initial t0 Vfmal the specified ramping rate. To avoid too large a voltage

step ( which will cause the vector (ip,n,p) too rapidly) for the solutions to

converge or cause numerical ringing at very high ramping rate, the program

request for voltage step size instead of time step. From the voltage step size and

Numerical Simulation for MOS Capacitor 73 Program Description and Specification


ramp rate, the time step is then computed. From the input, the program will

calculate,

Ramp, time,

^time = (Vfin " ^in) / ^amP i

and the corresponding calculation time step,

t_step - Vstep / Ramp ;

For the case of D.C analysis, the applied gate voltage start from Vin, increase by

Vstep f°r each calculation interval, until the specified final voltage, Vfin.

" How many structural information of the MOS-C do you wish to store

during voltage ramping (max 9) ? " (transient analysis )

" How many structural information of the MOS-C do you wish to store

(max 9) ?" (D C)

" Structural information at voltage (V0bs V) "

The program will store the structural information at the requested voltage

interval in columns form (x, \p, n, p,Ef, Jn, Jp) . This data (un-normalised) is

stored in normal text form and ready to be read in and display by many graphical

programs, eg. Matlab, Lotus, Grapher, and etc. This information will be stored

in the files created by the program, namely ml to m9 correspondingly.

" How long is the final voltage holding time (holdt ms) ?" ( transient

analysis)

Numerical Simulation for MOS Capacitor 74 Program Description and Specification


"What will he the calculation time step for holding time (htstep ms)?"

(transient analysis)

When the ramping voltage reaches the final voltage (Vfin), the applied gate

voltage will be held at Vfin for a period of holdt and the calculation time step

will be changed, from t_step to ht_step.

" How many structural information of the MOS-C do you wish to store

during voltage holding (max 9) ? ” (transient analysis )

" Structural information at time (Obtime ms) "

The program will store the structural information of the MOS capacitor at time

(start from the voltage holding period) requested by the user. This data is also

stored in normal text in column form (t, x, xp, n, p,Ef, Jn, Jp) and will be stored

in the files created by the program, namely hi to h9 correspondingly.


#

Remarks:

(1) As the structural information for both in the voltage ramping period and

the voltage holding period is stored in the files created by the program,

and the same file names will be used in future simulation. Hence to avoid

the lost of these information, the user should rename the files and store

these data elsewhere after each simulation run.

(2) The program expects that the user gives appropriate input parameters.

(3) The data files is too large to be modified by normal text editor .

Numerical Simulation for MOS Capacitor 75 Program Description and Specification


6.3 Program Execution.
The following flow chart is supplied to help the understanding of the program

logic.

Numerical Simulation for MOS Capacitor 76 Program Description and Specification


CHAPTER SEVEN
RESULTS AND DISCUSSION

7.1 Effects of non-zero flatband voltage

In any MOS capacitor, the metal (or polysilicon) - semiconductor work

function difference Oms, is fixed. Interface charge, or charged interface


traps will cause a non-zero flatband voltage. As a consequence, there
will be a initial surface band bending and oxide voltage-even for zero bias

applied to the gate.

For a n-type silicon substrate with polysilicon gate, we usually have a

negative flatband voltage due to a negative polysilicon silicon work


function difference. Therefore, the semiconductor surface is accumulated
at zero bias.

Using the program DC.cpp, the flatband voltage is calculated for the case
of a 100A thick gate oxide and n-type substrate with = IE 15 /cmA

Figure 7.1-1 is the result of several simulations with interface charge


input as an variable while keeping other parameters constant.

log(interface charge)

Figure 7.1-1 Flatband voltage Vs interface charge plot for a N type MOS-C.

Numerical Simulation for MOS Capacitor 77 Results and Discussion


The results suggest that an increasing in positive interface charges results
in a higher (negatively) flatband voltage. The amount of shift is related
to the oxide charge as follows :

Qint / Cox-

7.2 Effect of substrate doping

For a given applied reverse bias, an increase in substrate doping will


result in a smaller depletion width. For a case of the 100A thick gate
oxide with interface charge Qjnt = 1E10 /cm ", The plots of electron
charge density vs distance for various doping concentration is attached at
appendix C.

Refer to appendix C - Cl to C4, under the same biasing conditions of


applied gate voltage equal to -2 V, the MOS capacitor with doping
concentration = 1E14 / cm^ have a much higher depletion width
compare to the MOS capacitor with doping concentration of 1E17 / cmA
To satisfied the charge neutrality requirement under the same biasing
condition, the silicon surface of the MOS capacitor with a lower doping
concentration would have to deplete to a greater depth.

Since most of the applied voltage is dropped across the semiconductor

depletion region, an increase substrate doping will result in increase of

surface electric field as shown in appendix C - Cl to C4.

The response of the device at higher reserve biasing voltage also included
in appendix C. C5 to C8 illustrate the response of the MOS capacitor

Numerical Simulation for MOS Capacitor 78 Results and Discussion


with various doping concentrations for biasing voltage of -5 V while C8
to CT2 are for biasing voltage of-10 V.
The results obtained from numerical simulations of the MOS capacitors
illustrated in appendix C is summarised here for comparison.

As a result of higher surface field and oxide field for higher doping

concentration, we would expect the tunneling current to be increase as


from the expression of the Fowler-Nordheim tunneling current (3.2-7).
That is, for a similar biasing conditions, the MOS capacitor with higher

doping concentration will experience a higher tunneling current as is


demonstrated in the following simulated results.

plot of log of tunneling current vs gate voltage


| 7 f | a— | H—

?S) -fee A IE /o*\^


^**^*^2^ for M4 - (e/5Ycn3

Apllied gate voltage

Figure 7.2-2. Fowler-Nordheim tunneling current vs gate voltage plot for

two different substrate doping concentrations at Tox= 100A, xn= IE-7 s,


Qjnt = 3E10 /cmA

From figure 7.2-2, we can observe that the Fowler-Nordheim tunneling

current increase exponentially with the magnitude of the reverse biasing

voltage. Also notice that, the tunneling current is higher at the MOS

Numerical Simulation for MOS Capacitor 79 Results and Discussion


capacitor with higher substrate doping concentration under the same
biasing condition.

The effect of parameters such as temperature, interface charge, doping


concentration, oxide fixed charge on the characteristic of the MOS

capacitor can easily be studied by extracting the required data. This data
can be store into the output display files which can then be graphically

display by MATLAB. For example, the effect of temperature and doping

concentration on the carriers mobility, uni and upl can be plotted by


adding another sentence in the program that store the data in an output
display file, ie.,
DataOfile«unl«" "«upl;

Numerical Simulation for MOS Capacitor 80 Results and Discussion


7.3 DC Analysis

In this section, a MOS capacitor defined below will be used as a case


study to observe the equilibrium behaviour of the MOS capacitor under
different biasing level. Information such as surface potential, electron
and hole concentration, and electric field will be plotted against distance
from the silicon-silicon oxide interface.

Profile of the MOS capacitor.


Doping concentration Nd = 1E15 /cm3

Oxide thickness w = 100A

Interface charge Qint = 3E10 /cm3

Substrate thickness ^sub = 4 pm


Surface recomb, velocity Rvs = 1E5 cm/s
Bulk recomb, time const.
electron Rtn = IE-7s
hole Rtp = IE-7 s

Operating conditions
Operating temperature = 300 °K
Calculation voltage step = 50 mV

Grid allocation

Number of grid points = 1001

Zone one = 0 to 1 pm (with 400 grid)

Zone two = 1 pm to 3 pm (with 400 grid)


zone three = 3 pm to 4 pm (with 200 grid)

Numerical Simulation for MOS Capacitor 81 Results and Discussion


The equilibrium characteristics of the MOS capacitors under various
biasing voltages are illustrated in appendix D using MATLAB.
From the graphs shown in appendix D, we can observe that the depletion
width does not change significantly with the increase of the magnitude of

the reverse bias voltage. The surface potential of the MOS capacitor
changes rather slow with the biasing voltages, which means that most of
the voltage will be dropped across the oxide. As a result, the oxide field
will increase almost linearly with respect to the applied gate voltage and
much
hence the surface potential at the Si-Si02 interface will not increaseAwith
the gate voltage as we can see from the graphs.

7.4 Transient Analysis

In this section, numerical simulated non-equilibrium characteristics


displayed by a MOS capacitor when subjected to a linear voltage ramp is
presented. Using the same MOS capacitor defined in last section, the
program Tran.cpp is used to do the transient analysis for the device,
electrostatic
Information such as ^ potential, electron and hole concentration

and electric field will be plotted against distance from the silicon-silicon
oxide interface. The grid allocation for the DC analysis will also apply

here.

Operating conditions
Operating temperature = 300 K

Calculation voltage step = 50 mV


Gate voltage ramp rate = 2000 V/s

Incremental ramping time step = 50 mV / 2000 V/s =2 5^s

Numerical Simulation for MOS Capacitor 82 Results and Discussion


A brief non-equilibrium behaviour of the MOS capacitor
is described as follows. If a negative bias is applied
to the gate of a n-type MOS capacitor, voltage drops
across the insulator and the semiconductor. If the
corresponding hand bending is large enough, an inversion
layer will be formed under equilibrium conditions.
However a rapid further increase of the bias will
drive the MOS capacitor into a non-equilibrium state
where the holu concentration within the inversion layer
has to be enlarged to reach the new equilibrium situation.
But minority carriers are not generated fast enough (be
it from the back contact or the depletion layer) and the
depletion layer extends further into the silicon to
maintain charge balance. As electron-hole pairs are
thermally generated, the minority hole flow into the
inversion layer. By this effect, the depletion layer
width decreases with time to the initial equilibrium
depletion layer width if the voltage is hold there
due to electron-hole pair generation. In this thesis,
the SRH generation-recombination model was applied.

The non-equilibrium characteristics can be studied from the simulated


graphical results shown in appendix E. Graphs in El to E4 shows the
characteristic of an MOS capacitor for a ramping rate of 2000 V/sec and

for various values of the peak voltage amplitude. The dependence of


depletion width on voltage constructed based on simulation results was
shown in Figure 7.4-1.

Numerical Simulation for MOS Capacitor 83 Results and Discussion


Dependence of depletion width on voltage

Apllied gate voltage

Figure 7.4-1. Dependence of depletion width on applied gate voltage of a


n-type MOS capacitor.

The simulated result shown on figure 7.4-2 is a typical non-equilibrium


surface potential versus applied gate voltage for a n-type MOS capacitor
under linear voltage ramp bias of 2000V/sec. Under this biasing
condition, the generation rate within the depletion region cannot meet
equilibrium charge requirements, and consequently, as shown in Figure
7.4-1, the depletion region increases in size beyond its equilibrium value.
The surface potential which is related to the depletion width by

q Nd

Xl
2 • e„

where Us ls surface potential and is the depletion width.

Numerical Simulation for MOS Capacitor 84 Results and Discussion


Surface potential vs applied gate voltage

Applied gate voltage

Figure 7.4-2. Non-equilibrium surface potential versus gate voltage


obtained by numerical simulated results in response to a 2000 V/sec
linear ramp bias.

When there is no further increase of voltage or the voltage being hold, by

thermal generation, electron-hole pairs are generated until the required


hole concentration is reached. This can be demonstrated by the graphs
shown in appendix F. Appendix F-Fl is the non-equilibrium response of
the MOS capacitor under a 2000 V/sec ramp bias peak at -1 V.
Appendix F-F2 is the response after the voltage being hold for 1 second.

The hole concentration in the inversion layer has built up significantly and
after 5 second, as shown in appendix F -F3, the MOS capacitor has return
to its thermally equilibrium condition (refer to Appendix D-Dl for the
thermal equilibrium condition for the MOS capacitor under -1 V reverse
bias voltage). Appendix F-F4 illustrate the non-equilibrium response of

the MOS capacitor obtained with a 2000 V/sec ramp bias at peak of -5 V.

Appendix F- F5 to F8 show the response of the MOS capacitor after the

bias voltage was hold at -5 V. As we can see from the progress of the
graphs, the hole concentration in the inversion layer is building up and

the depletion width is start to decrease although the changes is not

Numerical Simulation for MOS Capacitor 85 Results and Discussion


significant. This process will continue until the thermal equilibrium
condition is reached. Due to extremely long simulation time required in
collecting the data as a results of low generation rate by SRH generation
, the graph for the equilibrium condition is not available.

So far, we do not include the generation contributed by the impact


ionization and band to band tunneling effects. We will investigate the
effects when we include the impact ionization and band to band tunneling
effects in the following simulations. Appendix G is a set of non­
equilibrium response of the MOS capacitor obtained by a linear ramp bias

of 2000 V/sec, peak at -5 V. Appendix G- G1 is the condition at 0 s

holding time. The simulation results in Appendix G - G2 to G5 suggest


that the hole concentration in the inversion layer is building up with
respect to the length of the holding time. Compare to the previous results
when we simulate the response of the MOS capacitor under the same
biasing condition except without considering the impact ionization and
band to band tunneling effects, the hole concentration in the inversion
layer built up with a much higher rate after it reaches the level of about
8E17 lew?. After the voltage being hold for 835.57 second, the MOS
capacitor has return to a state which is very close to the thermally
equilibrium condition.

From the above simulated results, we can conclude that impact ionization
and band to band tunneling effects play a major role in electron hole pairs
generation process in bring the MOS capacitor out from the non­

equilibrium condition into a thermally equilibrium state. We van also see

that the effect of impact ionization and band to band tunneling only

Numerical Simulation for MOS Capacitor 8,6 Results and Discussion


significant when the electron and hole concentration in the depletion
region built up to a certain level.

Numerical Simulation for MOS Capacitor 87 Results and Discussion


CHAPTER EIGHT

CONCLUSIONS

8.1 Identified problems

8.1.1 Memory allocation problem.

Background Information : DOS Operating System

The DOS operating system architecture was built around the 8086 hardware

architecture. Therefore, it is very much an outdated operating system. The main

drawback of the DOS operating system is its memory limitation of 640K. More

memory can be made available through extended and expanded memory.

Another drawback for DOS is that it is a single tasking OS.

Microsoft's Windows 3.1

Microsoft's Windows 3.1 is a software package which tries to overcome all these

limitations. It tries to provide more memory and the ability to simulate multitask

by time slicing. To do this it uses virtual memory mapping between Windows

applications and actual memory. Software will seemingly be able to get to more

memory, but it is actually the underlying Windows Memory Management system

which is taking care of the DOS memory limitation. Windows uses paging to

page-in and page-out memory information. Because there is only so much that

one can do with DOS ( which is the OS, Windows just lies on top of DOS ),

Windows has been known to have problems with its paging system. The overall

Numerical Simulation for MOS Capacitor 88 Conclusions


robustness of its paging system is not good. Therefore, sometimes when there is

an overflow of information on a page, Windows will not be able to detect this

and will allow the overwriting of information.

Taking into account the above description, the following will outline the memory

management behaviour.

1. DOS and'the REAL memory map.

DOS & Real Memory Map

640K 384K memory > IMeg


U Usable memory under DOS
8 Non usable memory
3 Memory used by DOS

2. DOS and Windows 3.1 memory management system

DOS & Windows Memory Management

lemory > IMeg

Virtual memory mapping


under Windows

virtual available memory

640K + 384K + memory > 1 Meg

Memory used by DOS


i/sa Memory used by Windows
i i Usable memory (for current program)
sssss&sa Non usable memory
(memory reserved for other program)

The above diagram illustrate how Windows provide virtual memory

for an application. Note that the method involves taking memory

chunks from many parts of the "real memory" and remapped it into

Numerical Simulation for MOS Capacitor 89 Conclusions


one continuous virtual memory. When there are two or more

program running simultaneously, such as the ClipBoard program and

say Borland C++, Windows will juggle the memory allocation of the

real memory to these program. However, to support concurrency

and intercommunication between program ( such as copying part of

text from Borland C++ and place it into ClipBoard ), Windows

adopt techniques which allows one program to be able to wonder to

the other program memory space. This method is very volatile due

to the fact that one program can read from other program data space

and well as write into other program data space. This present a

chance for program to corrupt other program data space, or even

the windows data space!

When the program size is fairly "small", the possibility of program

stepping out of the boundary is fairly small, the possibility of error

would escalate with the size of the program.

hello Bobll
program A Virtual Memory program B

Error due to bugs in Windows memory management system.

3. Big program and the Avalanche effect of Windows 3.1 virtual

memory mapping.

In the event that the hard disk data pointer is corrupted this problem

can be escalate very quickly. This is due to the fact that if the pointer

Numerical Simulation for MOS Capacitor 90 Conclusions


is corrupted, the new data can be written virtually anywhere in the

hard disk itself. If the block that is being written to is an empty

block, then there is minimal problem; however, if the block that is

being written belong to some other file group, say that the block

belong to Borland C++, it will cause major errors.

The combination of a large program and the Windows virtual memory map

system sometimes can be serious. However the probability of the system to crash

is very much dependent on the computer system configuration. Please note that

the crashing effect is NOT a certain event, however it is a probabilistic event.

There are various suggestion to overcome the above condition. We can increase

the memory of the computer to lower the probability of memory overlapping,

thus reducing the chance of the computer to crash. Secondly, we can dedicate a

computer purely for the purpose of running this program and thus eliminating the

chance of the program corrupting other programs. However, this can still affect

the windows program itself. Thirdly, we can eliminate this type of problem by

using a message parsing operating system. Such an example of message parsing

operating system is the IBM OS/2 system, otherwise Microsoft has planned its

future to be in message parsing systems (currently Windows NT is a message

parsing OS).

8.1.2 Convergence problems

As a results of rapid changes in the vector (i|), n, p) at some critical region of the

MOS capacitor it is particularly difficult to converge to the solution. For

example, in the depletion region, at node i-1 and node i+1 the electron

concentration converge to 1.01E2 and 1.03E2. We would expect the solution

for node i converge to around 1.02E2, but supposedly it was corrected to

Numerical Simulation for MOS Capacitor 9,1 Conclusions


1.00E1. Unless we allow the vector to change by 1,000% in the next iteration

step, this will result in non-convergence. However, for stability reason, we limit

the changes of the vector by the relaxation factor.

To overcome this problem, interpolation technique can be applied at these

critical region. A 'proper ' solution can be assigned to those trouble points using

interpolation technique which calculate the possible solution for these points

based on the neighbouring well converged values.

However, the mentioned interpolation technique has not been successfully

implemented due to time constraint and the author of this programs hope the

future user can improve the program by implementing this interpolation module.

8.1.3 Uncertainties in the physical models

There are doubts about the surface recombination term implemented in these

programs. Also the assumption that the back contact is purely ohmic contact

might not necessarily to be true because recombination at the back contact could

be quite significant and hence should not be ignore.

The evaluation of carrier generation due to impact ionization and band to band

tunneling based on the vector solution from the previous iterative step in the D.C

analysis might not be appropriate. This is because the vector from the previous

iteration step do not necessary be stable or well converged and hence will cause

instability problem if this vector is used.

Numerical Simulation for MOS Capacitor 92 Conclusions


8.1.4 Uncertainty in transient analysis

During the voltage holding period (transient analysis), the number of iteration

required to obtain a converge solution is 1 for every alternative time step, the

other and the following time step usually required more than 2 iterative steps.

This pattern is suspicious and has been investigated. The reason has not been

found. Corrections is required if this is due to programming error.

Numerical Simulation for MOS Capacitor 93 Conclusions


8.2 Capability of the programs

The physical parameters such as carrier mobility, generation and recombination,

have been modelled in such a way that the effects of substrate doping

concentration, operating temperature, carrier life time on the characteristic of the

device can be studied. For instant, the effects of temperature and doping

concentration on carrier mobility can be extract. The effect of these parameters

on the MOS capacitor behaviour can then be analysed.

The programs is written in such a way that the models for the physical

parameters can be modified easily without any major changes to the program.

To increase flexibility, the programs request the user to key in the parameters

such as operating temperature, surface recombination velocity, carrier life time,

doping concentration, oxide thickness, interface charges, and also the grid

spacing allocation in ratios zones of the substrate.

The programs is broken into several subroutines, each subroutine can be

modified independently to the other subroutine, provided the output data

required by other subroutine is still available in the original form.

Numerical Simulation for MOS Capacitor 94 Conclusions


8.3 General conclusions

This thesis provide a alternative way to understanding the device and physics of

the semiconductor structure. Through careful modelling of the device, the

programs has allowed user to study and analyse the physical phenomena of a

particular device.

8.4 Further recommendation and work

The numerical modelling of the MOS capacitor or other semiconductor device is

an open-ended project, as different model and extra device features can be

included to study the characteristic of that particular device.

Extra modules could also be included to improve the program's efficiency and

accuracy were not implemented because of the time constraints. These include

the adaptive grid size and grid points allocation, adaptive voltage step

adjustment, adaptive time step adjustment. These will definitely improve the

accuracy while reduce the simulation time quite significantly. To be able to do

this, the programmer must be able to understand the behaviour of that particular

device under a certain operating condition.

Numerical Simulation for MOS Capacitor 95 Conclusions


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3. Scharfetter, D.L., Gummel, H.K. Large signal analysis of a silicon


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4. Shockley, W., and Read, W.T. Statistic of recombination of holes and


electrons. Physics Review. 87(9), 835-842. Sept. 1952.

5. Avanzo, D.C., Vanzi, M., Dutton,R.W. One dimentional


semiconductor device analysis (SEDAN). Report G-201-5, Stanford
University. 1979.

6. Shur, M. Physics of semiconductor devices. Prentice-Hall International

Ed. New Jersey. 1990.

7. Green, M. Operating principle, technology and system applications.


University of New South Wales. 1992.

Numerical Simulation for MOS Capacitor Bibliography


8. Browne, B.T., Miller, J.J.H. Numerical analysis of semiconductor
devices. Boole Press. Bublin. 1979.

9. Borland C++ manual.

10. Donald, A. Illustrating C. Cambridge University Press. Cambridge.

1992.

11. Kane, E.O. Theory of tunneling. J. Appl. Physics., vol 32, No:l,

pp.83-89. 1961.

12. Hurkx, G.A.M, Klaassen, D.B.M., and Knuvers, M.P.G. A new


recombination model for device simulation including tunneling.
IEEE Tran, on Electron Devices, vol. 39, No:2, Feb. 1992.

13. Oh, S-J., and Yeow, Y.T. A modification to the Fowler Nordheim
tunneling current calculation for thin MOS structure. Solid State
Electronics, vol. 31, No:6, pp. 1113-1118. 1988.

14. Hsueh, F.L., and Faraone, L. Two carrier conduction in MOS tunnel-
oxides II- theory. Solid State Electronic, vol. 27, No: 12, pp 1131-
1139. 1984.

15. Chang, C., Hu, C., and Broderson, R.W. Quantum yield of electron
impact ionization in silicon. J. Appl. Physics., 57(2), 15 Jan 1985.

16. Kane, E.O. Theory of tunneling. J.Appl. Physics, vol. 32, No:l,. Jan

1961.

17. Sano, N., Aoki, T., and Yoshii, A. Electron transport and impact

ionization in Si. Physical Review B, vol.41, No: 17. Jun 1990.

Numerical Simulation for MOS Capacitor Bibliography


18. Sano, N., Tomizawa, M., and Yoshii, A. Monte Carlo analysis of
ionization threshold in Si. Appl. Physics Letter, 56(7), 12 Feb.
1990.

19. Shatalov, V.M., and Panchenko, O.F. Effect of electron band


structure of energy distribution of secondaries in silicon. Solid State
Communication, vol. 69, No:9, pp 937-940. 1989.

20. Kato, K. Hot carrier simulation foe MOSFET's using a high speed
Monte Carlo method. IEEE. Tran, on electron devices, vol.35,

No:8. Aug. 1988.

21. Allman, P.G.C. Theory of non-equilibrium phenomena in an MIS


device under linear voltage ramp bias. Solid State Electronics, vol.
25, No:3, pp 241-247. 1982.

22. Okeke, M., and Balland, B. The quasi-equilibrium response of MOS


structures: Quasi-static factor. Solid State Electronics, vol.27, No:7,
pp. 601-606. 1984.

23. Frraone, L., Simmons, J.G., and Agarwal. Interpretation of non­


equilibrium measurements of MOS device using the linear voltage
ramp technique. Solid State Electronics, vol.24, No: 8, pp 709-716.
1981.

24. Simmons, J.G., and Wei, L.S. Non-steady state bulk-generation

processes in pulsed MIS capacitors. Solid State Electronics, vol. 18,


pp 153-158. 1976.

Numerical Simulation for MOS Capacitor Bibliography


25. Kelberlau, U., and Kassing, R. Theory of non-equilibrium properties
of MIS capacitor including charge exchange of interface states with
both bands. Solid State Electronics, vol.22, pp 37-45. 1979.

26. Simmons, K.B., and Allman, P.G.C. Experimental response of MOS

devices to a fast linear voltage ramp. Solid State Electronics.


vol.21, pp 1 157-1 162. 1978.

27. Kelberlau, U., and Kassing, R. Nonequilibrium properties of MIS-

capacitors. Solid State Electronics, vol.24, pp 321-327. 1981.

28. Siegfried Selberherr. ‘Analysis and Simulation of


semiconductor Devices1. Spriger-Verlag,Wien.New York.

29» arga R*S#$ atrix iterative methods*. Prentice-


Hall, 1962.

Numerical Simulation for MOS Capacitor Bibliography


ENDICES

Simulation Program Listing for DC Analysis


r Simulation Program Listing for Transient Analysis jj3
i Plot Out of DC Analysis Results @
- Effects of doping concentration variability
] Plot Out of DC Analysis Results jjj)
- Simulation Results for various biasing conditions
; ' Plot Out of Transient Analysis Results jgj
- Simulation results for voltage ramping
i Plot Out of Transient Analysis Results jj?
- Simulation results for voltage holding
Plot Out of Transient Analysis Results (g?
• Simulation results for voltage holding
including effect of Impact Ionisation
and Band to band Tunnelling
Simulation Program Listing
for DC Analysis

Appendix A
# include <math.h>
# include <iostream.h>
# include.<fstream.h>

# define eO 8.85418E-14 // permitivity (free space)


# define q 1.602E-19 // charge
# define Qf 1E10 // fixed charge.
# define alpha 4.088362E-3 // multipling factor
# define Nu 38.687713 // Normalize mobility factor
# define Nx 4.088362E-3 // Normalize distance factor
# define Nn 1E10 // Normalize ni
# define tO 1.67147E-5 // Normalize time (alphaA2)
# define n 3003 // dimension of matrix (must be multiple of 3)
# define band 11 // band dimension of matrix
# define element 5 // number of element off-diagonal

typedef double BAM) ARRAY [band];

double huge a[n+2][l 1];


double huge al[n+2][ll];
double huge D[n+2];
double huge b[n+2];
double huge L[n+2];
double huge e[n+2];
double huge E_field[n+2];
double huge Jnn[n+2j;
double huge Jpp[n+2];

int huge indx[n+2];

char DIfile[80],DOfile[80],Jfile[80];
double Hd,Vfb,T,Vt,Nd,Oxide,tox,Vbi,Qint,c,II,BB,JFN,Jo,Ro;
double uPs,uNs,uSN,uSP,uLN,uLIN,uLP,uLlP,Ve,Es,Tsub,Rtn,tn,Rtp,tp,Rvs,S,
xd, gl, g2,g3, uni, upl,un2,up2,Vg,Vs, B,DB, error;

void initial(double Vg);


void BER(double x);

void comp 1 (double vl,double v2,double nl,double n2,double pi,double p2,


double uSN,double uSP,double h,double Vg,
BAM)ARRAY huge *a, double huge *b,double huge *e);

void comp2(BANDARRAY huge *a,double huge *b,double vl,double v2,double v3,


double nl,double n2,double n3,double pi,double p2,double p3,
double uni,double un2,double up 1,double up2,double h,double huge *e);

void comp3(BAM)ARRAY huge *a,double huge *b,double vl,double v2,double v3,


double nl,double n2,double n3,double pi,double p2,double p3,
double uni,double un2,double upl,double up2,double hi,double h2,int i,
double huge *e);

void comp4(double vl,double v2,double nl,double n2,double pi,double p2,


double uni,double un2,double upl,double up2,double g3,
BAM)ARRAY huge *a, double huge *b,double huge *e);

void mobility(double vl,double v2,double v3,double hi,double h2,


double uLN,double uLIN,double uLP,double uLIP);

Numerical Simulation of MOS Capacitor A1 Appendix A


void LU_dec(BANDARRAY huge *a);
void Back_sub(BAND ARRAY huge *a, BAND ARRAY huge *al, double huge *b,
int huge *indx);

main()
{
char Matfile[80],filein[80],fileout[80],NY,comment[500],com;
int cm,com_end,i,k,l,u,cnvg,count,condjump;

double Es,Vin,Vapp,Vfbl,temp,vsl,vs2,nsl,ns2,psl,ps2,vl,v2,v3,nl,n2,n3,
pl,p2,p3,vfl,vf2,vf3,nfl,nf2,pfl,pf2,hl,h2,Vstep,dir,x,v,loop,s,
fpoint,factor,err,total,zl,z2,ratio I,ratio2,posl,pos2,diff;

cout«" *** DC Analysis for MOS capacitor ***"«endl;


cout«" -------------------------------------- "«endl;
cout«" Do you want to define a new MOS-C structure ?";
cout«" (Enter 'Y' or 'N')
cin»NY;

if ((NY = 'Y') || (NY == y ))


{
cout«" Description or Comments [end by '#>']:
cm = 1;

while ( comment[cm-l] != '>') { cin » comment[cm] ; cm++;}


cout«endl;

cout«" Enter Operating Temperature : cin»T;


cout«" Enter Substrate Doping Concentration (/cmA3): cin»Nd;
cout«" Enter Substrate thickness (micro-m) : cin»Tsub;
cout«" Enter oxide thickness (in A) : cin»Oxide;
cout«" Enter Interface charge (/cmA2): cin»Qint;
cout«" Enter Surface recomb, velocity (100 cm/s) : cin»Rvs;
cout«" Enter electron-bulk recomb time const(3.94E-4 s): cin»Rtn;
cout«" Enter hole-bulk recomb time const(3.94E-4 s) : cin»Rtp;
cout«"-------------------------------------------------------- "«endl;
cout«" The MOS-C is devided into 3 zones for grid allocation. "«endl;
cout«" Zone One cover region from interfaces to (1 um): cin»zl;
cout«" Fraction of grid to be allocated for zone one (0.4): cin»ratiol;
cout«" Zone Two cover region from "«zl«"um to (3 um)cin»z2;

if (Tsub < z2) { cout«" Substrate thickness must be larger than region 2"«endl;
cout«" Please Enter region 2 dimension again cin»z2;
}

cout«" Fraction of grid to be allocated for zone two (0.4): cin»ratio2;


cout«" Zone Three will cover region from "«z2«"um to "«Tsub«"um''«endl;
cout«" "«1 -ratiol-ratio2«" of the grid will be allocated for zone three."«endl;
cout«"-------------------------------------------------------- "«endl;
cout«" Is the Impact Ionization effect to be included ? "«endl;
cout«" (Enter 0 for No or 1 for Yes) cin»II;
cout«" Is the Band to Band Tunneling effect to be included ? "«endl;
cout«" (Enter 0 for No or 1 for Yes)cin»BB;

cout«" Enter output data file name : cin»DOfile;


cout«" (This data file can be use to initialize further simulation) "«endl;

Numerical Simulation of MOS Capacitor A2


f
Appendix A
ofstream DatafileO(DOfile,ios::trunc);
£lleout[0]-f;
efstream outfile(fileout);

Vbi = log(Nd/lE10);
for (u=T;u<=n;u+=3) { outfile«" ,,«Vbi«,, "«Nd/Nn«M "«Nn/Nd;
e[u]=Vbi; e[u+l]=Nd/Nn; e[u+2]=Nn/Nd; }

Hd = -0.5 + 0.25*(logl0(Nd)-14)/4; //The potential height different.


Vfbl = Hd + (Qf-Qint)*q*Oxide*lE-8/(3.9*eO);
Vin = double(int(Vfbl*20-0.5))/20 ; // The nearest 50mV Flatband voltage,

cm = 1;

while ( comment[cm] != ’>') { DatafileO«comment[cm] ; cm++;}

DatafileO«" ”«T«" "«Nd«" "«Tsub«" "«Oxide«" "«Qint«" "«Rvs«" "


«Rtn«" "«Rtp«""«" "«zl«" "«ratiol«" "«z2«" "«ratio2«" "
«II«" "«endl;

} // end of defining new MOS capacitor

else // if the MOS-C being defined and initial data file is available.
{
cout«" Enter initialisation file name : cin»DIfile;
ifstream Datalfile(Dffile);
cout«" Enter output data file name : cin»DOfile;
ofstream DataOfile(DOfile,ios::trunc);
cout«" (This data file can be use to initialize further simulation) "«endl;

cout«"-----------------Profile of the MOS-C-------------------"«endl;

com_end = 0 ; cm = 1;
while (com end == 0)
{ Datalfile »com ; cout«com; DataOfile«com;
if (com = '#') { com end = 1; }
}

cout«endl; cout«" "«endl;


DataIfile»T; cout«"Operating Temperature : "«T«" K"«endl;
DataIfile»Nd; cout«"Substrate Doping Concentration : "«Nd«"/cmA3"«endl;
DataIfile»Tsub; cout«"Substrate thickness : "«Tsub«" um"«endl;
DataIfile»Oxide; cout«"Oxide thickness : "«Oxide«" A"«endl;
DataIfile»Qint; cout«"Interface charge : "«Qint«"/cmA3"«endl;
DataIfile»Rvs; cout«"Surface Recomb, velocity : "«Rvs«"cm/s"«endl;
DataIfile»Rtn; cout«"Electron-bulk recomb, time const: "«Rtn«"s"«endl;
DataIfile»Rtp; cout«"Hole-bulk recomb, time const : "<<Rtp«"s"«endl;

Datalfile»zl; DataIfile»ratiol; Datalfile»z2; DataIfile»ratio2;


DataIfile»II; DataIfile»BB;
cout«"This data file was generated with conditions : "«endl;
DataOfile«" "«T«" "«Nd«" "«Tsub«" "«Oxide«" "«Qint«" ”«Rvs«" "
«Rtn«" "«Rtp«" "«zl«" "«ratiol«" "«z2«" "«ratio2«" "
«II«" "«BB«" "«endl;

Numerical Simulation of MOS Capacitor A3 Appendix A


fileout[0]='f;
ofstream outfile2(fileout);
for (u=l;u<=n;u-H-) { Datalfile»temp; e[u] = temp;
outfile2«temp«"}
DataIfile»Vin;

cout«" (i) applied gate voltage : "«Vin«" V"«endl;


if (II >0) {cout«" (ii) include impact ionization effect. "«endl;}
if (BB >0) {cout«" (iii) include band to band tunneling effect. "«endl;|

cout«" The grid allocation is as following :"«endl;


cout«" Zone 1: interfaces to "«zl«"um with "«ratiol*(n-3)/3«" grid"«endl;
cout«" Zone 2; "«zl«"um to "«z2«"um with "«ratio2*(n-3)/3«” grid''«endl;
cout«" Zone 3; "«z2«"um to "«Tsub«"um with "
«(1 -ratio 1 -ratio2)*(n-3)/3«" grid"«endl;
cout«"------------------------------------------------------------ "«endl;

} // end of reading initialization file.

cout«" Enter Matlab file ; cin»Matfile;


ofstream Moutfile(Matfile);

cout«" Enter applied gate voltage : cin»Vapp;


cout«" Enter calculation voltage step : cin»Vstep;
cout«"------------------------------------------------------------ "«endl;

loop=Vapp;

c = Nd/Nn; // c = Nd-Na
Hd = -0.5+0.25*(logl0(Nd)-14)/4; // The potential height different.
Vt = 8.616E-5*T; //Thermal voltage.
Vbi = log(Nd/lE10); //Normalized built-in voltage,
tox = Oxide* lE-8/Nx; // Normalized oxide thickness.
S = Rvs*t0/Nx; // Normalized surface recomb, velocity.
tn = Rtn/t0/(l+Nd/7. IE 15); // Normalized e- bulk recomb, time const.
tp = Rtp/t0/(l+Nd/7. IE 15); // Normalized h+ bulk recomb, time const.

//*** Initialization of the calculation ****


initial(Vin/Vt);

// *** The grid allocation as specified. ***


gl = zl*lE-4/Nx*3/(ratiol*(n-3));
g2 = (z2-zl)*lE-4/Nx*3/(ratio2*(n-3));
g3 = (Tsub-z2)*lE-4/Nx*3/((l-ratiol-ratio2)*(n-3));
posl = ratio l*(n-3)/3 + 1;
pos2 = ratio l*(n-3)/3 + 1 + ratio2*(n-3)/3 ;

if (Vin < Vapp) {dir=l;}


else {dir=-l;}

s—-1; total = 0; count = 0;

Numerical Simulation of MOS Capacitor A4 Appendix A


//********* of voltage steps ****************

for (v=Vin; (dir*v)<(dir*loop+Vstep/4);v+=dir*Vstep)


{
Vg = v/Vt;
if ((dir*v < dir*Vapp) && (dir*(v+dir*Vstep*0.95) > dir*Vapp))
{ Vg = Vapp/Vt; loop-=dir*Vstep/2;}

if (s<0)
{ filein[0]-f ; fileout[0]='g'; }
else
{ filein[0]-g'; fileout[0]='f; }

ofstream outfile2(fileout,ios: :trunc);


ifstream infile(filein);
fpoint=s; s=-fpoint;

for(u=l;u<=n;u++) { infile»temp; D[u]=temp; L[u] = temp;}

cout«" * "«D[1]«" "«D[2]«" "«D[3]«endl;


cout«" Current appling voltage is "<<Vg* Vt«" V

total+=count; cnvg=0; count=0; jump ~ 0;

// Set the accuracy for the iteration,


error = IE-2;

//*** The following iteration will end when all solutions converged,
while (envg != 1) // loop (iteration) start
{
count++;
if (count <= 3) (factor = 0.67;}
else
if (count <= 15) { factor = 0.5;}
else
if (count <= 30)
( factor = 0.33; error = 2E-2; }
else { factor = 0.33; error = 10E-2; }

vsl=D[l]; vs2=D[4];
nsl= D[2]; ns2=D[5]; psl=D[3]; ps2=D[6];

v 1 = D[ 1 ]; v2 = D[4]; v3 = D[7];
nl = D[2]; n2 = D[5]; n3 = D[8];
pi = D[3]; p2 = D[6];p3 = D[9];

comp 1 (vs 1 ,vs2,ns 1 ,ns2,ps 1 ,ps2,uSN,uSP,glVg,a,b,e);

mobility(v 1 ,v2,v3 ,g 1 ,g 1 ,uLN,uLIN,uLP,uLIP);


C0mp2(a,b,vl,v2,v3,nl,n2,n3,pl,p2,p3,unl,un2,upl,up2,gl,e);

Numerical Simulation of MOS Capacitor Appendix A


for (i=7;i<=(n-5);i+=3) // determine grid size.
{
if (i< pos 1 ) {hl=gl;h2=gl;}
else
if (i — posl) {hl=gl;h2=g2;>
else
if (i< pos2 ) {hl=g2;h2=g2;}
else
if (i == pos2 ) {hl=g2;h2=g3;}
else
{hl=g3;h2=g3;}

vl=D[i-3]; nl=D[i-2]; pl=D[i-l];


v2=D[i]; n2=D[i+l]; p2=D[i+2];
v3=D[i+3]; n3=D[i+4]; p3=D[i+5];

mobility(vl,v2,v3,hl,h2,uLN,uLIN,uLP,uLIP);
C0mp3(a,b,vl,v2,v3,nl,n2,n3,pl,p2,p3,unl,un2,upl,up2,hl,h2,i,e);
}
vfl = D[n-5]; nfl = D[n-4]; pfl = D[n-3];
vf2 = D[n-2]; nf2 = D[n-l]; pf2 = D[n]; vf3 = Vbi;

mobility(vfl,vf2,vf3,g3,g3,uLN,uLIN,uLP,uLIP);
comp4(vfl,vf2,nfl,nf2,pfl,pf2,unl,un2,upl,up2,g3,a,b,e);

//**** Solving the matrix by LU_decomposition and then Back-Substitution. ***

LU_dec(a);
Back_sub(a,al,b,indx);

cnvg=l; cond = 0;

for (k=l;k<=n;k+=3)
{
if ((fabs(D[k]) > 0.33*fabs(b[k])) || (fabs(D[k]) < 2))
{ D[k] += b[k]*factor; } // new V, e- & h+ cone, vector.

if ( D[k] == 0) { D[k]=lE-8; }

if(fabs(D[k])> 1)
{ err = l*error; }
else
{ if (fabs(D[k]) > 0.1)
{ err = 5*error; }
}

if ((fabs(b[k]) > fabs(D[k])*err) && (fabs(D[k]) > IE-2))


{ if (cond >0) •
(envg = 0; }
cond++;
}
else (cond = 0;}
}

Numerical Simulation of MOS Capacitor A6


f
Appendix A
cond = 0;
for (k=2;k<=n;k+=3)
{
if (((D[k]+b[k]*factor) > 0) && (D[k] > 0.01*b[k]))
{ D[k] += b{k]*factor; }

else
{
if ((D[k] + O.33*b[k]*factor) > 0)
{ D[k] += O.33*b[k]*factor; }
}

if(D[k] > IE-6) {err= l*error;}


else
{ if (D[k] > IE-7) { err = 2*error; }
else
if (D[k] > IE-9) { err = 5*error; }
else {err = 10*error;}
}

if ((b[k] > D[k]*err) && (D[k]> IE-11))


{ if (cond > 0)
{cnvg = 0;}
cond++;
}
else {cond = 0;}
}

cond = 0;

for (k=3;k<=n;k+=3)
{
if (((D[k]+b[k]*factor) > 0 ) && (D[k] > 0.01*b[k]))
{D[k]+=b[k]*factor;} // new vector.
else
{ if ((D[k] + 0.5*b[k]*factor) > 0)
{ D[k] += 0.5*factor*b[k]; }
}

if (D[k] > IE-5) {err=l*error;}


else
{ if (D[k] > 2E-6) {err = 2*error; }
else {err = 10*error; }
}

if ((b[k] > D[k]*err) && (D[k] > 2E-6))


{ if (cond > 0)
{cnvg = 0;}
cond++;
}
else {cond = 0; }
}
// ***** End of vector correction process *****

Numerical Simulation of MOS Capacitor A7 Appendix A


// ** Update the Surface field and carrier mobility.
Es = fabs((D[l]-Vg+Vfb/Vt-Vbi)*Vt/3.8E-6*3.9/11.7);
uSN = uNs/(l+uNs*Es/Ve)/Nu;
uSP = uPs/(l+uPs*Es/Ve)/Nu;

//* If the solution is not converge in 50 iteration, will jump to next step,
if (count >50) { cnvg = 1; jump =1; }

// * Update the vector from previous step **


for ( u=l; u<n; u++) { e[u] = L[u] ; }

} // loop end

cout«” Number of iterations = "«count«endl;

if (jump — 0)
{ for (u=l;u<=n;u++)
{outfile2«D[u]«"
}
else
{ fpoint = s; s = -fpoint;
if ((dir*v < (dir*loop+Vstep/10)) && (dir*v > (dir*loop-Vstep/10)))
{ loop+=dir*0.05 ;}
}

Jfile[0]-j';
ofstream JfnFile(Jfile,ios::app);
JfnFile«v«" "«JFN«endl;

} // end of voltage steps.

// *** All calculation done, data will be store at appropriate files.

ofstream DataOfile(DOfile,ios::app);
for (u=l;u<=n;u-H-)
{ DataOfile«D[u]«" ";}
DataOfile«Vapp;

x=-gl*Nx',
for (i=l;i<=(ratiol*(n-3)+l);i+=3)
{ x+=gl*Nx; Moutfile«x«" "«D[i]*Vt«" "«D[i+l]*Nn«" "«D[i+2]*Nn
«" "«E_field[i]«" "«Jnn[i]«" "«Jpp[i]«endl;}

for (i=(ratiol*(n-3)+4);i<=((ratiol+ratio2)*(n-3)+l);i+=3)
{ x+=g2*Nx; Moutfile«x«" "«D[i]*Vt«" ,,«D[i+l]*Nn«" "«D[i+2]*Nn
«•' "«E_field[i]«" "«Jnn[i]«" ”«Jpp[i]«endl;}

for (i=((ratiol+ratio2)*(n-3)+4);i<=n;i+=3)
{ x+=g3*Nx; Moutfile«x«" "«D[i]*Vt«" M«D[i+l]*Nn«,, "«D[i+2]*Nn
«" "«E_field[i]«" "«Jnn[i]«" ”<<jpp[i]«endl;}

cout«" i= "«total;
return 0;

} //***** End of Main Program *********

Numerical Simulation of MOS Capacitor A8 Appendix A


r
//***************************************************************************
// The following section contain the subroutines call by the Main Program

void initial(double Vg)


{
double K,Qs,Cox;

Ro = Nn/tO; // Normalization factor for Recombination / Generation.


Jo = -(q*Nn)/Nx; // Normalization factor for current density.

//*** Depletion Width ***//

Vfb = Hd +Qf*q*Oxide* lE-8/(3.9*eO);


K = sqrt(l 1.7*eO*Nd*q*Vt);
Cox = 3.9*eO/(Oxide*lE-8);

if(Vg<= Vfb/Vt)
{
Qs K/Vt/Cox*K+sqrt(fabs((K7Vt/Cox*K)*(K/Vt/Cox*K)-2*K*(Vg*Vt-Hd-Vt)*K/Vt));
Vs Vg*Vt - Vfb + Qs/Cox ;
xd sqrt(2* 11,7*eO*fabs(Vs)/(q*Nd))/Nx; // Normalized depletion width
Es fabs((Vs-Vg*Vt+Vfb-Vbi*Vt)/(Oxide*lE-8)*3.9/11.7); // Not normalized
}
else
{
Qs : K/Vt/Cox*K-sqrt(fabs((K/Vt/Cox*K)*(K/Vt/Cox*K)-2*K*(Hd-Vg*Vt+Vt)*K/Vt));
Vs Vg+Vt - Vfb + Qs/Cox ;
Es : fabs((Vs-Vg*Vt+Vfb-Vbi*Vt)/(Oxide*lE-8)*3.9/l 1.7); // Not normalized
}

uLN =l/( (1/(4195*pow(T/300,-1.5))) + (l/(2153*pow(T/300,-3.13))));


uLIN=uLN/( sqrt(l+(Nd/(3.1E16+Nd/350))));
uLP =l/( (l/(2502*pow(T/300,-1.5))) + (l/(591*pow(T/300,-3.25))));
uLIP=uLP/( sqrt(l+(Nd/(4. IE 16 +Nd/81))));

//*** The carriers mobility at interface ***//

Ve = 2.4E7/(l+0.8*exp(T/600));
uNs = 55.24 + (1429.23*pow(T/300,-2.3)-55.24)/
(l+pow(T/300,-3.8)*pow(Nd/1.072E17,0.73));
uPs = 49.70 + (479.37*pow(T/300,-2.2)-49.70)/
(l+pow(T/300,-3.7)*pow(Nd/1.606E17,0.7));
uSN = uNs/(l+uNs*Es/Ve)/Nu;
uSP = uPs/(l+uPs*Es/Ve)/Nu;
}

Numerical Simulation of MOS Capacitor Appendix A


void mobility(double vl,double v2,double v3,double hi,double h2,
double uLN,double uLIN,double uLP,double uLIP)
{
int i;
double E1,E2;
E I=fabs(v3-v2)* Vt/(h2*Nx);
E2=fabs(v2-v 1 )* Vt/(h 1 *Nx);

unl=uLIN/( sqrt( l+uLIN*uLIN* ( El*El/(uLN*3.5E3*uLN*3.5E3) /(uLN*El/


(uLN*3.5E3)+8.8) + El*El/(uLN*7.4E3*uLN*7.4E3)))) /Nu;
un2=uLIN/( sqrt( 1+uLIN*uLIN* ( E2*E2/(uLN*3.5E3*uLN*3.5E3) /(uLN*E2/
(uLN*3.5E3)+8.8) + E2*E2/(uLN*7.4E3*uLN*7.4E3)))) /Nu;

upl=uLIP/( sqrt( 1+uLIP*uLIP* ( El*El/(uLP*6.1E3*uLP*6.1E3) /(uLP*El/


(uLP*6.1E3)+1.6) + El*El/(uLP*2.5E4*uLP*2.5E4))) ) /Nu;
up2=uLIP/( sqrt( 1+uLIP*uLIP* ( E2*E2/(uLP*6.1E3*uLP*6.1E3) /(uLP*E2/
(uLP*6.1E3)+1.6) + E2*E2/(uLP*2.5E4*uLP*2.5E4)))) /Nu;
}

void BER(double x)
{
if (x < -20)
{ B = -x; DB = 1; }
else
if (x < -5E-6)
{ B = x/(exp(x)-l);
DB = (-l+x*exp(x)/(exp(x)-l))/(exp(x)-l);}
else
if (x <= 5E-6)
{ B = l-x/2; DB = 0.5;}
else
if (x <= 20)
{ B = x*exp(-x)/(l-exp(-x));
DB = (-l+x*exp(x)/(exp(x)-l))/(exp(x)-l);}
else
{ B = 0; DB = 0;}

Numerical Simulation of MOS Capacitor A10 Appendix A


void compl(double vl,double v2,double nl,double n2,double pi,double p2,
double uSN,double uSP,double h,double Vg,
BAND ARRAY huge *a, double huge *b, double huge *e)
{
double Eox,Eox 1,Jn,vd,Ef, Vgr,zn,Kfn 1 ,Kfn2,Kbb 1,
Kbb2,Bl,B2,DBl,DB2,ctl,ct2,const 1;
int j,k;

ctl = 6.55E-6 ; // (q*Do*Co/xo)*(VtA2) (A/VA2)


ct2 = 2.85E8 ; // (Vt/xO) (V/cm)
Vgr = Vg-Vfb/Vt+Vbi; // Normalized gate voltage seen from surface

Eox = fabs(Vgr-e[l])*Vt/(tox*Nx); // Un-Norm oxide field.


Eoxl= fabs(Vgr-vl)*Vt/(tox*Nx); // Un-Norm oxide field.

Ef = fabs(vl-v2)*Vt/(h*Nx); // Un-Norm E-field between grid 1 & 2 .


if (Ef = 0) { Ef= IE-3;}
if (Eox = 0) { Eox = IE-3;}
if (Eoxl == 0) { Eoxl = IE-3;}
if(vl=v2) { vl =v2-lE-8;}

if( e[ 1] = e[4] ) { vd=lE-8;}


else {vd = e[l]-e[4];}
JFN = ctl*Eox*Eox*exp(-ct2/Eox);
Jn = ctl*Eoxl*Eoxl*exp(-ct2/Eoxl);

Kfnl = ctl*Vt*Vt/(tox*Nx*tox*Nx);
Kfn2 = -ct2*tox*Nx/Vt;
Kbbl = 3.5E21/1.03923*Vt*Vt/(h*Nx*h*Nx);
Kbb2 = -22.5E6*1.12237*h*Nx/Vt;
zn = 7.03E5*exp(-1.231E6/Ef);

BER(v2-vl); B1 = B; DB1 = -DB;


BER(vl-v2); B2 = B; DB2 = +DB;

constl = (nl+l)/S+(pl+l)/S;

a[l][l] =-(l/h+3.9/11.7/tox);
a[l][2] = -h/2;
a[ 1 ] [3] = h/2;
a[ 1][4] = 1/h;
a[l][5] =0;
a[l][6] =0;

a[2][l] = (uSN/h)*(-DB2*nl+DBl*n2)
-Kfnl*exp(Kfn2/fabs(Vgr-vl))*(-2*fabs(Vgr-vl)+Kfn2)/Jo;
a[2][2] = uSN/h*B2 +h/2*(pl*constl-(nl*pl-l)/S)/(constl*constl);
a[2] [3] = h/2*(nl*constl-(nl*pl-l)/S)/(constl*constl);
a[2][4] = uSN/h * ( DB2*nl - DBl*n2 );
a[2][5] = -uSN/h * B1 ;
a[2][6] =0;

a[3][l] = uSP/h * (-DB2*p2 + DBl*pl );


a[3][2] = h/2*(pl*constl-(nl*pl-l)/S)/(constl*constl);
a[3][3] = -uSP/h * B1 + h/2*(nl*constl-(nl*pl-l)/S)/(constl*constl);
a[3][4] = uSP/h * (DB2*p2-DBl*pl);

Numerical Simulation of MOS Capacitor All


r
Appendix A
a[3][5] =0;
a[3][6] = uSP/h * B2;

for (j=lj<=3j++)
{ for (k=7;k<=l l;k++) { a[)][k] = 0; } }

E_field[l] = Ef; Jnn[l]=uSN/h*(B2*nl-Bl*n2)*Jo;


Jpp[ 1 ]=uSP/h*(B2*p2-B 1 *p 1 )* Jo;

b[l] = -((v2-vl)/h-3.9/l 1.7*(vl-Vgr)/tox ) -Qint/(Nn*Nx) +h*(nl-pl-c)/2;


b[2] = -uSN/h*(B2*nl-Bl*n2) + BB*h/2*Kbbl Vd*vd*exp(Kbb2/fabs(vd))/Ro
+ II*h/2*zn*fabs(JFN)/Ro + Jn/Jo -h/2*(nl*pl-l)/constl ;
b[3] = -uSP/h*(B2*p2-Bl*pl) + BB*IV2*Kbbl*vd*vd*exp(Kbb2/fabs(vd))/Ro
+ II*h/2*zn*fabs(JFN)/Ro - h/2*(nl*pl-l)/constl ;

Numerical Simulation of MOS Capacitor A12 Appendix A


void comp2(B AND ARRAY huge *a,double huge *b, double vl,double v2,
double v3,double nl,double ri2,double n3,double pi,double p2,double p3,
double uni,double un2,double up 1,double up2,double h,double huge *e)
{
double Ef,Kbb,Kbl,Kfl,Kf2,Kf3,Kf4,Jn,Jp,zn,zp,fBl,fB2,fB3,fB4,
d 1,d2,d3,d4,Bl,B2,B3,B4,DBl,DB2,DB3,DB4,const 1,hi,h2;

dl = unl/(h*h); d2 = un2/(h*h);
d3 = upl/(h*h); d4 = up2/(h*h);
hi = h; h2 = h;

BER(v3-v2); B1 = B; DB1 = DB;


BER(v2-v3); B2 = B; DB2 = -DB;
BER(v2-vl); B3 = B; DB3 = -DB;
BER(vl-v2); B4 = B; DB4 = DB;

BER((e[7]-e[4])*Vt); ffll=B
BER((e[4]-e[7])*Vt); fB2 = B
BER((e[4]-e[l])*Vt); fB3=B
BER((e[l]-e[4])*Vt); fB4 = B

Ef = fabs((v2-vl)/hl+((v3-v2)/h2-(v2-vl)/hl)*hl/(hl+h2))*Vt/Nx ;
if (Ef == 0) { Ef = 1E-3;}

if (Ef — 0) { Ef = IE-3;}

Kbb = 3.5E21/1.03923;
Kbl =-22.5E6*l.12237;
zn = 7.03E5*exp(-1.231E6/Ef);
zp = 1.582E6*exp(-2.036E6/Ef);

Kfl = unl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf2 = un2*Nu*Vt/hl*(l-hl/(hl+h2))/Nx;
KD = upl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf4 = up25ttNu*Vt/hl*(l-hl/(hl+h2))/Nx;

Jn = Kf2*(fB4*e[2]*Nn-fB3*e[5]*Nn) + Kn*(fB2*e[5]*Nn-fBl*e[8]*Nn);
Jp = Kf4*(fB4*e[6]*Nn-fB3*e[3]*Nn) + Kf3*(fB2+e[9]I,tNn-IBl*e[6]*Nn);

constl = tp*(n2+l)+tn*(p2+l);

a[4][l] =l/(h*h);
a[4][2] =0;
a[4][3] =0;
a[4][4] =-2/(h*h);
a[4][5] = -1;
a[4][6] =1;
a[4][7] =l/(h*h);
a[4][8] =0;
a[4][9] =0;
a[4] [10] =0;
a[4][ll] =0;

Numerical Simulation of MOS Capacitor A13 Appendix A


f
a[5][l] =d2*DB3*n2-d2*DB4*nl;
a[5][2] = d2*B4;
a[5][3] s= 0;
a[5][4] = dl*DBl*n3 + d2*DB4*nl - (dl*DB2+d2*DB3)*n2;
a[5][5] = -dl*B2-d2*B3-(p2*constl-(n2*p2-l)*tp)/(constl*constl);
a[5][6] = -(n2*constl-(n2*p2-l)*tn)/(constl*constl);
a[5][7] = dl*(-DBl*n3 + DB2*n2);
a[5][8] = dl*Bl;
a[5][9] =0;
a[5][10] = 0;
a[5][l 1] =0;
a[6][l] = d4*(DB4*p2 - DB3*pl);
a[6][2] = 0;
a[6][3] = d4*B3;
a[6][4] = d3*DB2*p3 - (d3*DBl+d4*DB4)*p2 + d4*DB3*pl;
a[6][5] = -(p2*constl-(n2*p2-l)*tp)/(constl*constl);
a[6][6] = -d3*Bl-d4*B4 -(n2*constl-(n2*p2-l)*tn)/(constl*constl)';
a[6][7] = d3*(DBl*p2 -DB2*p3);
al6][8] =0;
a[6][9] = d3*B2;
a[6] [10] =0;
a[6] [11] =0;

E_field[4] = Ef; Jnn[4] = Jo*unl/h*(B2*n2-Bl*n3) ;


Jpp[4] = Jo*upl/h*(B2*p3-Bl*p2);

b[4] = -l/(h*h)*(v3-2*v2+vl)+(n2-p2)-c;
b[5] = -dl*(Bl*n3-B2*n2)+d2*(B3*n2-B4*nl) - BB*Kbb*EftEf,£exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl ;
b[6] = -d3*(B2*p3-Bl *p2)+d4*(B4*p2-B3*pl) - BB*Kbb*Ef*Ef*exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl ;

Numerical Simulation of MOS Capacitor A14 Appendix A


void comp3(BANDARRAY huge *a,double huge *b,double vl,double v2,
double v3,double nl,double n2,double n3,double pi,double p2,double p3,
double uni,double un2,double up 1,double up2,double hi,double h2,int i,
double huge *e)

{
double Ef,Kbb,Kbl,Kfl,Kf2,Kf3,Kf4,Jn,Jp,zn,zp,fBl,fB2,fB3,fB4,
dl,d2,d3,d4,Bl,B2,B3,B4,DBl,DB2,DB3,DB4,constl;

dl = unl/(h2*(h2+hl)/2); d2 = un2/(hl*(h2+hl)/2);
d3 = upl/(h2*(h2+hl)/2); d4 = up2/(hl*(h2+hl)/2);

BER(v3-v2); B1 = B; DB1 = DB;


BER(v2-v3); B2 = B; DB2 = -DB;
BER(v2-vl); B3 = B; DB3 = -DB;
BER(vl-v2); B4 = B; DB4 = DB;

BER((e[7]-e[4])*Vt); ffll=B;
BER((e[4]-e[7])*Vt); ©2 = B;
BER((e[4]-e[l])*Vt); fB3 = B;
BER((e[l]-e[4])*Vt); fB4 = B;

Ef = fabs( (v2-vl)/hl +((v3-v2)/h2-(v2-vl)/hl)*hl/(hl+h2))*Vt/Nx ;


if (Ef = 0) { Ef = IE-3;}
Kbb = 3.5E21/1.03923;
Kbl = -22.5E6*l. 12237;
zn = 7.03E5*exp(-1.231E6/Ef);
zp = 1.582E6*exp(-2.036E6/Ef);

Kfl = unl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf2 = un2*Nu*Vt/hl*(l-hl/(hl+h2))/Nx;
Kf3 = upl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf4 = up2*Nu*Vt/hl*(l-hl/(hl+h2))/Nx;

Jn = Kf2*(fB4*e[2]*Nn-fB3*e[5]*Nn) + Kfl*(fB2*e[5]*Nn-fBl*e[8]*Nn);
Jp = Kf4*(fB4*e[6]*Nn-fB3*e[3]*Nn) + Kf3*(fB2*e[9]*Nn-fBl*e[6]*Nn);
constl = tp*(n2+l)+tn*(p2+l);

a[i][l] =0;
a[i][2] =0;
a[i][3] =2/(hl*(h2+hl));
a[i][4] =0;
a[i][5] =0;
a[i][6] =-2/(h2+hl)*(l/h2+l/hl);
a[i][7] = -1;
a[i][8] =1;
a[i][9] = 2/(h2*(h2+hl));
a[i][10] =0;
a[i] [11] =0;

a[i+l][l] = 0;
a[i+l][2] = d2*DB3*n2 - d2*DB4*nl;
a[i+l][3] = d2*B4;
a[i+l][4]=0;
a[i+l][5] = dl*DBl*n3 + d2*DB4*nl - (dl*DB2+d2*DB3)*n2;
a[i+l][6] = -dl*B2-d2*B3-(p2*constl-(n2*p2-l)*tp)/(constl*constl);
a[i-+-l][7] = -(n2*constl-(n2*p2-l)*tn)/(constl*constl);

Numerical Simulation of MOS Capacitor A15


/
Appendix A
a[i+l][8] = dl*(-DBl*n3 + DB2*n2);
a[i+l][9] = dl*Bl;
a[i+l][1.0]= 0;
a[i+l][ll]= 0;

a[i+2][l] = d4*(DB4*p2 - DB3*pl);


a[i+2][2] = 0;
a[i+2][3] = d4*B3;
a[i+2][4] = d3*DB2*p3 - (d3*DBl+d4*DB4)*p2 + d4*DB3*pl;
a[i+2][5] = -(p2*constl-(n2*p2-l)*tp)/(constl*constl);
a[i+2][6] = -d3*Bl-d4*B4 -(n2*constl-(n2*p2-l)*tn)/(constl*constl);
a[i+2][7] = d3*(DBl*p2 -DB2*p3);
a[i+2][8] = 0;
a[i+2][9] = d3*B2;
a[i+2][10]=0;
a[i+2][ll]= 0;

E_field[i] = Ef; Jnn[i] = Jo*unl/h2*(B2*n2-Bl*n3);


Jpp[i] = Jo*upl/h2*(B2*p3-Bl*p2);

b[i] = -2/(h2+h 1 )*(v3/h2-v2*( l/h2+ 1/h 1 )+v 1/h 1 )+(n2-p2)-c;


b[i+l] = -dl*(Bl*n3-B2*n2)+d2*(B3*n2-B4*nl) - BB*Kbb*Ef*Ef,'exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl ;
b[i+2] = -d3 *(B2*p3-B 1 *p2)+d4*(B4*p2-B3*p 1) - BB*Kbb*EF'EF'exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl ;

Numerical Simulation of MOS Capacitor A16


t
Appendix A
yy***************************************************** ***************

void comp4(double vl,double v2,double nl,double n2,double pi,double p2,


double uni,double un2,double upl,double up2,double g3,
BAND ARRAY huge *a, double huge *b, double huge *e)
{

double Ef,Kbb,Kbl,Kfl,Kf2,Kf3,Kf4,Jn,Jp,zn,zp,fBl,fB2,fB3,fB4,
dl,d2,d3,d4,Bl,B2,B3,B4,DBl,DB2,DB3,DB4,constl,v3,h,hl,h2;

v3 = Vbi;
h = g3; hi = g3; h2 = g3;
dl = unl/(h*h); d2 = un2/(h*h);
d3 =upl/(h*h); d4, = up2/(h*h);

BER(v3-v2); B1=B; DB1 = DB;


BER(v2-v3); B2 = B; DB2 = -DB;
BER(v2-vl); B3 = B; DB3 = -DB;
BER(vl-v2); B4 = B; DB4 = DB;

BER((e[7]-e[4])*Vt); fBl = B;
BER((e[4]-e[7])*Vt); fB2 = B;
BER((e[4]-e[l])*Vt); fB3 = B;
BER((e[l]-e[4])*Vt); fB4 = B;

Ef = fabs( (v2-vl)/hl +((v3-v2)/h2-(v2-vl)/hl)*hl/(hl+h2))*Vt/Nx ;


if (Ef = 0) { Ef = IE-3;}

if (Ef = 0) { Ef = IE-3;}
Kbb = 3.5E21/1.03923;
Kbl = -22.5E6*1.12237;
zn = 7.03E5*exp(-1.231E6/Ef);
zp = 1.582E6*exp(-2.036E6/Ef);

Kfl = unl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf2 = un2*Nu*Vt/hl*(l-hl/(hl+h2))/Nx;
Kf3 = upl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf4 = up2*Nu*Vt/hl*(l-hl/(hl+h2))/Nx;

Jn = Ki2*(lB4*e[2]*Nn-fB3*e[5]*Nn) + Kfl*(fB2*e[5]+Nn-fBl*5E15);
Jp = Kf4*(fB4*e[6]*Nn-fB3*e[3]*Nn) + Kf3*(ffl2*2E4-Bl*e[6]*Nn);

constl = tp*(n2+l)+tn*(p2+l);

a[n-2][l] =0;
a[n-2][2] =0;
a[n-2][3] = l/(h*h);
a[n-2][4] =0;
a[n-2][5] =0;
a[n-2][6] = -2/(h*h);
a[n-2][7] =-l;
a[n-2][8] = 1;
a[n-2][9] =0;
a[n-2] [10] = 0;
a[n-2][11] = 0;

a[n-l][l] =0;
a[n-l][2] =d2*DB3*n2-d2*DB4*nl;
a[n-1] [3 ] = d2*B4;

Numerical Simulation of MOS Capacitor Alr7 Appendix A


a[n-1 ] [4] =0;
a[n-1 ][5] = dl*DBl*Nd/Nn + d2*DB4*nl - (dl*DB2+d2*DB3)*n2;
a[n-1 ][6] = -dl*B2 - d2*B3-(p2*constl-(n2*p2-l)*tp)/(constl*constl);
a[n-l][7] = -(n2*constl-(n2*p2-l)*tn)/(constl*constl);
a[n-l][8] = 0;
a[n-l][9] =0;
a[n-1][10] = 0;
a[n-l][11] = 0;

a[n][l] = d4*(DB4*p2 - DB3*pl);


a[n][2] =0;
a[n][3] = d4*B3;
a[n][4] = d3*DB2*Nn/Nd - (d3*DBl+d4*DB4)*p2 + d4*DB3*pl;
a[n] [5] = -(p2*constlr(n2*p2-l)*tp)/(constl*constl);
a[n][6] = -d3*Bl-d4*B4-(n2*constl-(n2*p2-l)*tn)/(constl*constl);
a[n][7] =0;
a[n][8] =0;
a[n][9] = 0;
a[n] [10] =0;
a[n] [11] =0;

E_field[n-2] = Ef; Jnn[n-2] = Jo*unl/h*(B2*n2-Bl*Nd/Nn);


Jpp[n-2] = Jo*upl/h*(B2*Nn/Nd-Bl*p2);

b[n-2] = -l/(h*h)*(v3-v2*2+vl)+(n2-p2)-c;
b[n-l] = -dl *(B 1 *Nd/Nn-B2*n2)+d2*(B3*n2-B4*nl) - BB*Kbb*Ef)‘Ef',exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl ;
b[n] = -d3*(B2*Nn/Nd-Bl*p2)+d4*(B4*p2-B3*pl) - BB*Kbb*EF‘EF'exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl ;

Numerical Simulation of MOS Capacitor A18


r
Appendix A
void LU_dec(BANDARRAY huge *a)
{
int ij,k,el;
double temp,comp,factor;
el = element;

for (k= 1; k <= n; k++)


{
comp = a[k] [ 1];
i=k;
if (el < n) el++;
for (j=k+l ; j<=el; j++) // find pivot
{
if ( fabs(a[j][l]) > fabs(comp))
{
comp = a[j] [1];
H;
}
}
indx[k]=i;
if (comp == 0.0 ) {a[k][ 1] = 1.0E-30;}

if (i != k)
{
for 0=1; j<= band; j++)
{
temp = a[k] [j];
a[k][j]=a[i][j];
a[i] [j] = temp;
}

for (i=k+l; i<=el; i++) // Elimination.


{
factor = a[i][l]/a[k][l];
al[k] [i-k] = factor;

for (j=2;j<=bandj++) a[i][j-l]=a[i][j]-factor*a[k][j];


a[i] [band] =0.0;
}
}

Numerical Simulation of MOS Capacitor A]9 Appendix A


void Back_sub(B AND ARRAY huge *a, BAND ARRAY huge *al,
double huge *b,int huge *indx)
{
int i,k,el;
double temp,swap;
el = element;

for (k=l;k<=n;k++) // Forward Substitution.


{ // unscrambling the permuted row.
i=indx[k];
if (i !=k)
{
swap = b[ij;
b[i] = b[k];
b[k] = swap;
}
if (el < n) el++;

for (i=k+l;i<=el;i++)
{
b[i] -=al[k][i-k]*b[k];
}
}

for (i=n;i>=l;i—) // Back substitution.


{
temp = b[i];
for (k=2;k<=el;k++)
{
temp -= a[i][k]*b[k+i-l];
}

b[i]=temp/a[i][l];
if (el < band) el++;
}

Numerical Simulation of MOS Capacitor A20


t
Appendix A
Simulation Program Listing
for Transient Analysis

Appendix
# include <math.h>
# include <iostream.h>
# include. <fstream.h>

# define eO 8.85418E-14 // permitivity (free space)


# define q 1.602E-19 // charge
# define Qf 1E10 // fixed charge.
# define alpha 4.088362E-3 // Poisson normalization factor
# define Nu 38.687713 // Normalize mobility factor
# define Nx 4.088362E-3 // Normalize distance factor
# define Nn 1E10 // Normalize ni
# define tO 1.67147E-5 // Normalize time (alphaA2)
# define n 3003 // dimension of matrix (must be multiple of 3)
# define band 11 // band dimension of matrix
# define element 5 // number of element off-diagonal

typedef double BAND ARRAY [band];

double huge a[n+2][l 1];


double huge al[n+2][ll];
double huge D[n+2];
double huge b[n+2];
double huge e[n+2];
double huge L[n+2];
double huge E_field[n+2];
double huge Jnn[n+2];
double huge Jpp[n+2];

int huge indx[n+l);


double voltage[20];
double Obtime[20];

char DOfile[80],DIfile[80],Mfile[80],Mfileh[80];;
double Hd,Vfb,T,Vt,Nd,Oxide,tox,Vbi,Qint,c,II,BB,JFN,Jo,Ro;
double uPs,uNs,uSN,uSP,uLN,uLIN,uLP,uLIP,Ve,Es,Tsub,jumping,error,
Rtn,Rtp,tn,tp,Rvs,S, Vfb 1 ,xd,gl ,g2,g3 ,un 1 ,up 1 ,un2,up2,
Vg,Vs,B,DB,Ln,Lp,t_step,Nt_step,ht_step,Stime;

void initial(double Vg);


void BER(double x);

void comp 1 (double vl,double v2,double nl,double n2,double pi,double p2,


double uSN,double uSP,double h,double Vg,BAND ARRAY huge *a,
double huge *b,double Lnsl,double Lpsl,double huge *e);

void comp2(BANDARRAY huge *a,double huge *b,double vl,double v2,double v3,double nl,
double n2,double n3,double pi,double p2,double p3,double uni,double un2,
double up 1,double up2,double h,double Ln,double Lp,double huge *e);

void comp3(BANDARRAY huge *a,double huge *b,double vl,double v2,double v3,double nl,
double n2,double n3,double pi,double p2,double p3,double uni,double un2,
double up 1,double up2,double hi,double h2,int i,double Ln,double Lp,
double huge *e);

void comp4(double vl,double v2,double nl,double n2,double pi,double p2,


double uni,double un2,double up 1,double up2,double g3,
BAND ARRAY huge *a, double huge *b, double Ln,double Lp,double huge *e);

Numerical Simulation of MOS Capacitor B1


r Appendix B
void mobility(double vl,double v2,double v3,double hi,double h2,
double uLN,double uLIN,double uLP,double uLIP);

void LU_dec(BANDARRAY huge *a);


void Back_sub(BANDARRAY huge *a,BAND ARRAY huge *al,double huge *b,int huge
*indx);

main()
{
char MatfileT[80],MatfileS[80],filein[80],fileout[80],NY,comment[500],com;
int cm,com_end,i,k,l,m,u,w,cnvg,count,cond,jump,Fcount,holding,ht,tl;

double Es, Vin, Vfin,temp,vsl,vs2,ns 1 ,ns2,ps 1 ,ps2,Lns 1 ,Lps 1,v 1 ,v2,v3,


nl,n2,n3,pl,p2,p3,vfl,vf2,vf3,nfl,nf2,pfl,pf2,hl,h2,x,v,s,
fpoint,dir,factor,err,total,Ramp,Rtime,time,
zl,z2,ratio l,ratio2,posl,pos2,diff,Vstep,holdt,tt;

cout«" *** Transient Analysis for MOS capacitor ***"«endl;


cout«" ----------------------------------------------"«endl;

cout«"Do you want to define a new MOS-C structure ?";


cout«" (Enter 'Y' or 'N')
cin»NY;

if ((NY = 'Y') || (NY — y ))


{
cout«" Description or Comments [end by '#>']:
cm = 1;
while ( comment[cm-l] != ’>') { cin » comment[cm] ; cm++;}

cout«endl;
cout«" Enter Operating Temperature (K): cin»T;
cout«" Enter Substrate Doping Conc(/cmA3): cin»Nd;
cout«" Enter Substrate thickness (um) : cin»Tsub;
cout«" Enter Oxide thickness (in A) : cin»Oxide;
cout«" Enter Interface charge (/cmA2) : cin»Qint;
cout«" Enter Surface recomb, velocity (100 cm/s): cin»Rvs;
cout«" Enter electron-bulk recomb time const(3.94E-4 s): cin»Rtn;
cout«" Enter hole-bulk recomb time const(3.94E-4 s) : cin»Rtp;
cout«" Enter ramp rate V/s (absolute): cin»Ramp;
cout«" Ramp from flatband voltage to :cin»Vfin;
cout«"-------------------------------------------------------- "«endl;
cout«" The MOS-C is devided into 3 zones for grid allocation."«endl;
cout«" Zone One cover region from interfaces to (1 um) : cin»zl;
cout«" Fraction of grid to be allocated for zone one (0.4): cin»ratiol;
cout«" Zone Two cover region from "«zl«"um to (3 um) : cin»z2;
if (Tsub < z2) { cout«" Substrate thickness must be larger than region 2"«endl;
cout«" Please Enter region 2 dimension again cin»z2;
}
cout«" Fraction of grid to be allocated for zone two (0.4): cin»ratio2;
cout«" Zone Three will cover region from "«z2«"um to "<<Tsub«"um"«endl;
cout«" "«1-ratiol-ratio2«" of the grid will be allocated for zone three."«endl;

cout«" Is the Impact Ionization effect to be included ? "«endl;


cout«" (Enter 0 for No or 1 for Yes) cin»II;
cout«" Is the Band to Band Tunneling effect to be included ? "«endl;
cout«" (Enter 0 for No or 1 for Yes)cin»BB;

Numerical Simulation of MOS Capacitor B2


1
Appendix B
cout«" Enter output data file name : ";cin»DOfile;
cout«" (This data file can be use to initialize further simulation) "«endl;
cout«" Store data at time after voltage holding"; cin»Stime;

ofstream DataOfile(DOfile,ios::trunc);
fileout[0]='f;
ofstream outfile(fileout);

Vbi = log(Nd/lE10);
for (u=l;u<=n;u+=3) { outfile«" "«Vbi«" "«Nd/Nn«" "«Nn/Nd;
e[u]=Vbi; e[u+l]=Nd/Nn; e[u+2]=Nn/Nd;
}
Hd = -0.5 + 0.25*(logl0(Nd)-14)/4; // The potential height different.
Vfbl = Hd + (Qf-Qint)*q*Oxide*lE-8/(3.9*eO);
Vin = double(int(Vfbl*20-0.5))/20 ; // The nearest 50mV Flatband voltage,

cm = 1;
while ( comment[cm] != '>') { DataOfile«comment[cm] ; cm++;}
DataOfile«" "«T«" "«Nd«" "«Tsub«" "«Oxide«" "«Qint«" "«Rvs«""
«Rtn«" "«Rtp«" "«Ramp«" "«zl«" "«ratiol«" "«z2«"
"«ratio2«" "
«II«" "«BB«" "«endl;

else // if the MOS-C being defined and initial data file is available.
{
cout«" Enter initialisation data file name : cin»DIfile;
ifstream DataIfile(DIfile);
cout«" Enter output data file name : cin»DOfile;
ofstream DataOfile(DOfile,ios::trunc);
cout«" Store data at time after voltage holding cin»Stime;
cout«" (This data file can be use to initialize further simulation) "«endl;

cout«"---------------- Profile of the MOS-C------------------ "«endl;

com_end = 0 ; cm = 1;
while (com end == 0)
{ DataLfile »com ; cout«com; DataOfile«com;
if (com — '#') { com_end = 1; }
}
cout«endl; cout«" "«endl;
DataIfile»T; cout«"Operating Temperature : "«T«" K"«endl;
DataIfile»Nd; cout«"Substrate Doping Concentration : "<<Nd«"/cmA3"«endl;
DataIfile»Tsub; cout«"Substrate thickness : "«Tsub«" um"«endl;
DataIfile»Oxide; cout«"Oxide thickness : "«Oxide«" A"«endl;
DataIfile»Qint;cout«"Interface charge : "«Qint«"/cmA2"«endl;
DataIfile»Rvs; cout«"Surface Recomb, velocity : "<<Rvs«"cm/s"«endl;
DataIfile»Rtn; cout«"Electron-bulk recomb, time const: "<<Rtn«"s"«endl;
DataIfile»Rtp; cout«"Hole-bulk recomb, time const : "<<Rtp«"s"«endl;

cout«"This data file was generated with conditions : "«endl;

DataIfile»Ramp;
Datalfile»zl; DataIfile»ratiol; Datalfile»z2; DataIfile»ratio2;
DataIfile»II; DataIfile»BB;
DataOfile«" "«T«" "«Nd«" "«Tsub«" "«Oxide«" "«Qint«"
"«Rvs«" "«Rtn«" "«Rtp«" "«Ramp«" "«zl«" "«ratiol«
" "«z2«" "«ratio2«" "«II«" "«BB«" "«endl;

Numerical Simulation of MOS Capacitor B,3 Appendix B


fileout[0]-f;
ofstream outfile(fileout);
for (u=l;u<=n;u++) { Datalfile»temp; outfile«temp«" e[u]=temp;}

DataIfile»Vin;
cout«" (i) Ramping rate : "«Ramp«" V/s"«endl;
cout«" (ii) applied gate voltage : "«Vin«" V"«endl;
if (II >0) {cout«" (iii) include impact ionization effect. "«endl;}
if (BB >0) {cout«" (iv) include band to band tunneling effect."«endl;}
cout«endl;
cout«" The grid allocation is as following :"«endl;
cout«" Zone 1: interfaces to "«zl«"um with "«ratiol*(n-3)/3«" grid"«endl;
cout«" Zone 2: "«zl«"um to ”«z2«"um with "«ratio2*(n-3)/3«" grid”
«endl;'
cout«" Zone 3: "«z2«"um to "«Tsub«"um with "«
(l-ratiol-ratio2)*(n-3)/3«" grid"«endl;
cout«"--------------------------------------------------------- "«endl;
cout«" Ramp from "«Vin«" V to cin»Vfin;

}
cout«" Enter transient Matlab file :cin»MatfileT;
ofstream MTfile(MatfileT),

cout«" Enter calculation voltage step :cin»Vstep;


cout«" How many structural information of the MOS-C "«endl;
cout«" do you wish to store during voltage ramping (max 9)? cin»m;

for (Fcount = 0; Fcount < m; Fcount++)


{ cout«" Structural observation at voltage =
cin»voltage[Fcount];
}
cout«" The above information will be stored at file ml to m"«m«"
respectively"«endl;
cout«"-------------------------------------------------------------------"«endl;
cout«" How long is the final voltage holding time (ms) ? cin»holdt;
cout«" What will be the time step for holding time (ms) ? cin»ht_step;
cout«" How many structural information of the MOS-C "«endl;
cout«" do you wish to store during voltage holding (max 9)? cin»tl;
for (ht=0; ht < tl ; ht++)
{
cout«" At what time interval after the holding time start (ms)?
cin»tt; Obtime[ht]= tt*lE-3;
}
cout«" The above information will be stored at file hi to h"«tl«"
respectively"«endl;
cout«"-------------------------------------------------------------------"«endl;

c = Nd/Nn; // c = Nd-Na
Hd = -0.5 + 0.25*(logl0(Nd)-14)/4; // The potential height different.
Vt =8.616E-5*T; //Thermal voltage.
Vbi = log(Nd/lE10); //Normalized built-in voltage,
tox = Oxide*lE-8/Nx; // Normalized oxide thickness.
S = Rvs*t0/Nx; // Normalized surface recomb, velocity.
tn = Rtn/t0/(l+Nd/7. IE 15); //Normalized e-bulk recomb, time const.
tp = Rtp/t0/(l+Nd/7.1E15); // Normalized h+ bulk recomb, time const.

initial(Vin/Vt);

Numerical Simulation of MOS Capacitor B>4 Appendix B


gl = zl*lE-4/Nx*3/(ratiol*(n-3));
g2 = (z2-zl)*lE-4/Nx*3/(ratio2*(n-3));
g3 = (Tsub-z2)*1 E-4/Nx*3/(( 1 -ratio 1 -ratio2)*(n-3));
posl = ratio l*(n-3)/3 + 1;
pos2 = ratiol*(n-3)/3 + 1 + ratio2*(n-3)/3 ;

Rtime = fabs(Vfin-Vin)/(Ramp);
t_step = fabs(Vstep/Ramp);
if (Rtime ==0) { t_step = ht_step* 1E-3;}
if (Vin < Vfin) { dir = 1; } else {dir = -1; }

s=-l;
total = 0; count = 0; jumping = 0;
Fcount = 0; holding = 0; ht = 0;

// start of time/ ramping voltage steps and voltage holding loop.

for (time=0; time < (Rtime+holdt*1.01E-3); time+=t_step)


{
if (time < Rtime* 1.01) { Vg = (Vin + dir*Ramp*time)/Vt;}
else { Vg = Vfin/Vt; holding = 1; }
Nt_step = t_step/t0;

// Set the accuracy criterion for the iteration,


error = IE-2;

if (s<0)
{ filein[0]-f; fileout[0]='g'; }
else
{ filein[0]='g'; fileout[0]-f; }

ofstream outfile(fileout);
ifstream infile(filein);

fpoint=s; s=-fpoint;

for(u= 1 ;u<=n;u++)
{ infile»temp; D[u] = temp; L[u] = temp;}

cout«" * "«D[1]«" "«D[2]«" "«D[3]«endl;

total+=count; cnvg=0; count=0; jump = 0;


if (time < Rtime)
{ cout«" current applying voltage is "«Vg*Vt; }
else { cout«" current time is (voltage holding) "«time; }

//* The following iteration will end when all solutions converged.

while (cnvg != 1) // loop (iteration) start


{
count+-+-;
if (count <= 3) {factor = 0.66;}
else
if (count <= 15) { factor = 0.5;}
else
if (count <= 30)
{ factor = 0.33; error = 2E-2;}
else { factor = 0.33; error = 5E-2; }

Numerical Simulation of MOS Capacitor Appendix B


vsl= D[ 1 ]; vs2=D[4];
Osl= D[2]; ns2=D[5]; psl=D[3J; ps2=D[6];
Lnsl= e[2]; Lpsl=e[3];

vl = D[1]; v2 = D[4]; v3 = D[7];


nl = D[2]; n2 = D[5]; n3 = D[8];
pi = D[3]; p2 = D[6];p3=D[9];
Ln = e[5]; Lp = e[6];

comp 1 (vs 1 ,vs2,ns 1 ,ns2,ps 1 ,ps2,uSN,uSP,g 1, Vg,a,b,Lns 1 ,Lps 1 ,e);

mobility(v I,v2,v3,g 1 ,g 1 ,uLN,uLIN,uLP,uLIP);


comp2(a,b,vl,v2,v3,nl,n2,n3,pl,p2,p3,unl,un2,upl,up2,gl,Ln,Lp,e);

for (i=7;i<=(n-5);i+=3) // determine grid size.


{
if (i< posl ) {hl=gl;h2=gl;}
else
if (i == posl ) {hl=gl;h2=g2;}
else
if (i< pos2 ) {hl=g2;h2=g2;}
else
if (i— pos2 ) {hl=g2;h2=g3;}
else
{hl=g3;h2=g3;}

vl=D[i-3]; nl=D(i-2]; pl=D[i-l];


v2=D[i]; n2=D[i+l]; p2=D[i+2];
v3=D[i+3]; n3=D[i+4]; p3=D[i+5];
Ln=e(i+1]; Lp=e[i+2];

mobility(vl,v2,v3,hl,h2,uLN,uLIN,uLP,uLIP);
C0inp3(a,b,vl,v2,v3,nl,n2,n3,pl,p2,p3,unl,un2,upl,up2,hl,b2,i,Ln,Lp,e);
}
vfl = D[n-5]; nf\ = D[n-4]; pf\ = D[n-3];
vf2 = D[n-2]; nf2=D[n-l]; pf2 = D[n]; vf3 = Vbi;
Ln = e[n-l]; Lp = e[n];

mobility(vfl,vf2,vf3,g3,g3,uLN,uLIN,uLP,uLIP);
comp4(vfl,vf2,nfl,nf2,pfl,pf2,unl,un2,upl,up2,g3,a,b,Ln,Lp,e);

//**** Solving the matrix by LU decomposition and then Back-Substitution. ***


LU_dec(a);
Back_sub(a,al,b,indx);

cnvg=l;
cond = 0;

for (k=l;k<=n;k+=3)
{
//if (( fabs(D[k]) > 0.33*fabs(b[k])) || (D[k] < 2))
{ D[k] += b[k]*factor; } // new V, e- & h+ cone, vector.

Numerical Simulation of MOS Capacitor B6


f
Appendix B
if ( D[k] = 0) { D[k]=lE-15;}

if ( fabs(D[k]) > 1)
{ err = l*error; }
else
{ if(fabs(D[k])> IE-2)
{ err = 5*error; }
}

if ((fabs(b[k]) > fabs(D[k])*err) && (fabs(D[k]) > IE-5))


{ if (cond > 0)
{cnvg = 0;}
cond++;
}
else {cond = 0;}
}

cond = 0;
for (k=2;k<=n;k+=3)
{
if (((D[k] + b[k]*factor) > 0) && (D[k] > 0.01*b[k]))
{ D[k] += b[k]*factor;}
else {
if ((D[k] + 0.5*b[k]*factor) > 0)
{ D[k] += 0.5*b[k]*factor;}
}

if (D[k] > IE-6) {err = l*error;}


else {
if (D[k] > IE-7) {err = 2*error;}
else
if (D[k] > IE-9) {err = 5*error;}
else {err = 10*error;}
}

if ((b[k] > D[k]*err) && (D[k]> IE-11))


{ if (cond > 0)
{cnvg = 0; }
cond++;
}
else {cond = 0;}
}
cond = 0;

for (k=3;k<=n;k+=3)
{
if (((D[k] + b[k]*factor) > 0) && (D[k] > 0.01*b[k]))
{ D[k] += b[k]*factor;}
else {
if ((D[kj + 0.5*b[k]*factor) > 0)
{ D[k] += 0.5*b[k]*factor;}
}

if (D[k] > IE-5) {err=l*error;}


else {
if (D[k] > 2E-6) {err = 2*error;}
else {err = 10*error;}
}

Numerical Simulation of MOS Capacitor Appendix B


if ((b[k] > D[k]*err) && (D[k] > 2E-6)) {
if (cond > 0)
{cnvg = 0; }
cond++;
}
else {cond = 0;}
}

// ***** End of vector correction process *****

// * Update the Surface field and carrier mobility.


Es = fabs((D[l]-Vg+Vfb/Vt-Vbi)*Vt/(Oxide*lE-8)*3.9/11.7);
uSN = uNs/(l+uNs*Es/Ve)/Nu;
uSP = uPs/(l+uPs*Es/Ve)/Nu;

//* If the solution is not converge in 50 iteration, will jump to next step.
if(count>50) { cnvg = 1;jump =1;jumping-H-;}

} // loop end

cout«" Number of iteration = "«count«endl;

if (jump == 0)
{
for (u=l;u<=n;u++)
{ outfile«D[u]«"infile»temp; e[u] = L[u]; }

MTfile«time«" "«Vg*Vt«" "«D[l]*Vt«" "«D[2]*Nn«" "«


D[3]*Nn«" "«JFN«endl;

//*** The following will store the structural information of the MOS-C at
// at the requested voltage interval or time interval after voltage being held.

if ((Vg*Vt<(voltage[Fcount]+0.01)) && (Vg*Vt>(voltage[Fcount]-0.01)))


{
Mfile[0] = ’m';
Mfile[l] = (char)(T + (Fcount % 10));
ofstream MSfile(Mfile);
Fcount++;

x=-gi *Nx;
for (i= 1 ;i<=(ratio 1 *(n-3)+1 );i+=3)
{ x+=gl*Nx;
MSfile«x«" "«D[i]*Vt«" "«D[i+l]*Nn«" "«D[i+2]*Nn«"
MSfile«E_field[i]«" "«Jnn[i]«" H«Jpp[i]«endl;}

for (i=(ratiol*(n-3)+4);i<=((ratiol+ratio2)*(n-3)+l);i+=3)
{ x+=g2*Nx;
MSfile«x«" "«D[i]*Vt«" "«D[i+l]*Nn«" "«D[i+2]=,[Nn«M
MSfile«E_field[i]«" "«Jnn[i]«" "«Jpp[i]«endl;}

for (i=((ratiol+ratio2)*(n-3)+4 );i<=n;i+=3)


{ x+=g3*Nx;
MSfile«x«" "«D[i]*Vt«" "«D[i+l]*Nn«" "«D[i+2]*Nn«"
MSfile«E_field[i]«" "«jnn[i]«" M«Jpp[i]«endl;}

} // end for structural inform storage at requested voltage interval.

Numerical Simulation of MOS Capacitor B8 Appendix B


if ((holding—1) && (time>(Rtime+Obtime[ht] *0.999)))
{
Mfileh[0] = 'h';
Mfileh[l] = (char)(T + (ht % 10));
ofstream MSfileh(Mfileh);
ht++;

x=-g 1 *Nx;
for (i=l;i<=(ratiol*(n-3)+l);i+=3)
{ x+=gl*Nx;
MSfileh«x«" "«D[i]*Vt«" "«D[i+l]*Nn«" "«D[i+2]*Nn«"
MSfileh«E_field[i]«" "«Jnn[i]«" ”«Jpp[i]«endl;}

for (i=(ratiol*(n-3)+4);i<=((ratiol+ratio2)*(n-3)+l);i+=3)
{ x+=g2*Nx;
MSfileh«x«" "«D[i]*Vt«" "<<D[i+l]*Nn«" "«D[i+2]*Nn«"
MSfileh«E_field[i]«" M«Jnn[i]«" M«Jpp[i]«endl;}

for (i=((ratiol+ratio2)*(n-3)+4 );i<=n;i+=3)


{ x+=g3*Nx;
MSfileh«x«" "«D[i]*Vt«" "«D[i+l]*Nn«" "«D[i+2]*Nn«"
MSfileh«E_field[i]«" "«Jnn[i]«" "«Jpp[i]«endl;}

} // end for structural inform storage during holding voltage

} // end of jump = 0.

if (jump==l) { fpoint = s; s=-fpoint; }

//*** Structural data will be stored at end of voltage ramp.

if( (time > 0.99*(Stime*lE-3+Rtime)) && (time < 1.01*(Stime*lE-3+Rtime)))


{
ofstream DataOfile(DOfile,ios::app);
for (u=l;u<=n;u++)
{ DataOfile«D[u]«"
DataOfile«Vg*Vt;
}

// *** holding time, change time step,


if (time > (0.99*Rtime)) {
t_step = ht_step*lE-3;
if ((ht_step==0) || (holdt==0)) {ht_step=l;}
// if ( D[2]*D[3] > 2.5E6) { t_step = 0.01; }
}

} // end of time/voltage steps.

cout«" total iteration = "«total«endl;


cout«" jumping ="«jumping;
return 0;

} // ******* End of Main Program. **********

Numerical Simulation of MOS Capacitor B9 f


Appendix B
void initial(double Vg)
{
double K,Qs,Cox;

Ro = Nn/tO; // Normalization factor for Recombination / Generation.


Jo = -(q*Nn)/Nx; // Normalization factor for current density.

//*** Depletion Width ***//

Vfb = Hd + Qf*q*Oxide*lE-8/(3.9*eO);
K = sqrt(l 1.7*eO*Nd*q*Vt);
Cox = 3.9*eO/(Oxide*lE-8); //un-norm oxide capacitance.

//*** To estimate the initial condition for interfaces ***

if(Vg <= (Vfbl/Vt))


{
Qs = -K/Vt/Cox*K+sqrt(fabs((K/Vt/Cox*K)*(K/Vt/Cox*K)-2*K*(Vg*Vt-Hd-Vt)*K/Vt));
Vs = Vg*Vt - Vfb + Qs/Cox ;
xd = sqrt(2* 11.7*eO*fabs(Vs)/(q*Nd))/Nx; // Normalized depletion width
Es = fabs((Vs-Vg*Vt+Vfb-Vbi*Vt)/(Oxide*lE-8)*3.9/l 1.7); // un-normalized
}

else
{
Qs = -K/Vt/Cox*K-sqrt(fabs((K7Vt/Cox*K)*(K/Vt/Cox*K)-2*K*(Hd-Vg*Vt+Vt)*K/Vt));
Vs = Vg*Vt - Vfb + Qs/Cox ;
Es = fabs((Vs-Vg*Vt+Vfb-Vbi*Vt)/(Oxide*lE-8)*3.9/l 1.7); //un-normalized
}

//***** mobility coefficient *******

uLN =l/( (l/(4195*povv(T/300,-1.5))) + (l/(2153*pow(T/300,-3.13))));


uLIN=uLN/( sqrt(l+(Nd/(3. lE16+Nd/350))));
uLP =l/( (l/(2502*pow(T/300,-1.5))) + (l/(591*pow(T/300,-3.25))));
uLIP=uLP/( sqrt(l+(Nd/(4.1E16 +Nd/81))));

//*** The carriers mobility at interface ***//

Ve = 2.4E7/(l+0.8*exp(T/600));
uNs = 55.24 + (1429.23 *pow(T/300,-2.3)-55.24)/
(l+pow(T/300,-3.8)*pow(Nd/l.072E 17,0.73));
uPs = 49.70 + (479.37*pow(T/300,-2.2)-49.70)/
(l+pow(T/300,-3.7)*pow(Nd/1.606E17,0.7));

uSN = uNs/(l+uNs*Es/Ve)/Nu; // electron surface mobility.


uSP = uPs/(l+uPs*Es/Ve)/Nu; // hole surface mobility.

Numerical Simulation of MOS Capacitor B)0 Appendix B


void mobility(double vl,double v2.double v3,double hi,double h2,
double uLN,double uLIN,double uLP,double uLIP)
{
int i;
double E1,E2;
El=fabs(v3-v2)*Vt/(h2*Nx);
E2=fabs(v2-v 1 )*Vt/(h 1 *Nx);

unl=uLIN/( sqrt( 1+uLIN*uLIN* ( El*El/(uLN*3.5E3*uLN*3.5E3) /(uLN*El/


(uLN*3.5E3)+8.8) + El*El/(uLN*7.4E3*uLN*7.4E3)))) /Nu;
un2=uLIN/( sqrt( l+uLIN*uLIN* ( E2*E2/(uLN*3.5E3*uLN*3.5E3) /(uLN*E2/
(uLN*3.5E3)+8.8) + E2*E2/(uLN*7.4E3*uLN*7.4E3)))) /Nu;

upl=uLIP/( sqrt( l+uLIP*uLIP* ( El*El/(uLP*6.1E3*uLP*6.1E3) /(uLP*El/


(uLP*6.1E3)+1.6) + El*El/(uLP*2.5E4*uLP*2.5E4)))) /Nu;
up2=uLIP/( sqrt( 1+uLIP*uLIP* ( E2*E2/(uLP*6.1E3*uLP*6.1E3) /(uLP*E2/
(uLP*6.1E3)+1.6) + E2*E2/(uLP*2.5E4*uLP*2.5E4)))) /Nu;
}

void BER(double x)
{
if (x < -25)
{ B = -x; DB= 1; }
else
if (x < - IE-9)
{ B = x/(exp(x)-l);
DB = (-l+x*exp(x)/(exp(x)-l))/(exp(x)-l);}
else
if (x <= IE-9)
{ B = l-x/2; DB = 0.5;}
else
if (x <= 25)
{ B = x*exp(-x)/(l-exp(-x));
DB = (-l+x*exp(x)/(exp(x)-l))/(exp(x)-l);}
else
{ B = 0; DB = 0;}
}

//**********************!*************************************************

void compl(double vl,double v2,double nl,double n2,double pi,double p2,


double uSN,double uSP,double h,double Vg,BAND ARRAY huge *a,
double huge *b,double Lnsl,double Lpsl,double huge *e)
{
double Eox,Eoxl,Jn,vd,Ef,Vgr,zn,Kfnl,Kfn2,Kbbl,Kbb2,Bl,B2,DBl,DB2,ctl,ct2,const 1;
int j,k;

ctl = 6.55E-6; //(A/VA2)


ct2 = 2.85E8; //(V/cm)
Vgr = Vg - Vfb/Vt + Vbi; // Normalized gate voltage see by surface potential.
Eox = fabs(Vgr-e[l])*Vt/(tox*Nx); // Un-Norm oxide field.
Eoxl= fabs(Vgr-vl)*Vt/(tox*Nx); // Un-Norm oxide field.

Ef = fabs(vl-v2)*Vt/(h*Nx); // Un-Norm E-field between grid 1 & 2 .

Numerical Simulation of MOS Capacitor B11 Appendix B


if (Ef == 0) { Ef = 1;}
if (Eox == 0) { Eox = 1;}
if (Eoxl == 0) { Eoxl = 1;}
if (vl==v2) { vl = V2-1E-6;}

if( e[l] = e[4J ) { e[l] = e[4]-lE-6;}


vd = e[l]-e[4];

JFN = ctl*Eox*Eox*exp(-ct2/Eox);
Jn = ctl*Eoxl*Eoxl*exp(-ct2/Eoxl);

Kfnl = ctl*Vt*Vt/(tox*Nx*tox*Nx);
Kfn2 = -ct2*tox*Nx/Vt;
Kbbl = 3.5E21/1.03923*Vt*Vt/(h*Nx*h*Nx);
Kbb2 = -22.5E6*1.12237*h*Nx/Vt;
zn = 7.03E5*exp(-1.231E6/Ef);

BER(v2-vl); B1 = B; DB1 = -DB;


BER(vl-v2); B2 = B; DB2 = +DB;

const 1 = (nl+l)/S + (pl+l)/S;

a[l][l] = -(l/h+3.9/11.7/tox);
a[l][2] = -h/2;
a[ 1][3] = h/2;
a[l][4] = 1/h;
a[l][5] =0;
a[ 1 ] [6] =0;

a[2][l] = (uSN/h)*(-DB2*nl+DBl*n2)
Kfn 1 *exp(Kfn2/fabs( Vgr-v 1 ))*(-2 *fabs( Vgr-v 1 )+Kfn2)/Jo;
a[2][2] = uSN/h*B2 + h/2*(pl*constl-(nl*pl-l)/S)/(constl*constl) -1/Nt_step;
a[2] [3] = h/2*(nl*constl-(nl*pl-l)/S)/(constl*constl);
a[2][4] = uSN/h *(DB2*nl-DBl*n2);
a[2][5] = -uSN/h * B1 ;
a[2] [<3] =0;

a[3][l] = uSP/h * (-DB2*p2 + DBl*pl );


a[3 ] [2] = h/2*(pl*constl-(nl*pl-l)/S)/(constl*constl);
a[3][3] = -uSP/h*Bl +h/2*(nl*constl-(nl*pl-l)/S)/(constl*constl) -1/Nt_step;
a[3][4] = uSP/h * ( DB2*p2 - DBl*pl);
a[3][5] =0;
a[3][6] = uSP/h *B2;

for (j=lj<=3;j++)
{ for (k=7;k<=ll;k++) { a[j][k] = 0; } }

E_field[l]=fabs(vl-v2)*Vt/h/Nx;
Jnn[l]=uSN/h*(B2*nl-Bl*n2)*Jo; Jpp[l]=uSP/h*(B2*p2-Bl*pl)*Jo;

b[l] = -((v2-v 1 )/h-3.9/11.7*(v 1 -Vgr)/tox ) - Qint/(Nn*Nx) + h*(nl-pl-c)/2;


b[2] = -uSN/h* (B2 * n 1 -B1 *n2) + BB*h/2*Kbbl*vd*vd*exp(Kbb2/fabs(vd))/Ro
+ II*h/2*zn*fabs(JFN)/Ro +Jn/Jo -h/2*(nl*pl-l)/constl +(nl-Lnsl)/Nt_step;
b[3] = -uSP/h*(B2*p2-Bl*pl) + BB*h/2*Kbbl*vd*vd*exp(Kbb2/fabs(vd))/Ro
+ II*h/2*zn*fabs(JFN)/Ro - h/2*(nl*pl-l)/constl + (pl-Lpsl)/Nt_step;
}

Numerical Simulation of MOS Capacitor B12 Appendix B


void comp2(B AND ARRAY huge *a,double huge *b, double vl, double v2, double v3,
double ill,double n2,double n3,double pi,double p2,double p3,double uni,
double un2,double up 1,double up2,double h,double Ln,double Lp,double huge *e)
{
double Ef,Kbb,Kb 1 ,Kfl,Kf2,Kf3,Kf4,Jn,Jp,zn,zp,fB 1 ,fB2,fB3,fB4,
dl.d2,d3,d4,Bl,B2,B3,B4,DBl,DB2,DB3,DB4,const l,hl,h2;

dl = unl/(h*h); d2 = un2/(h*h);
d3 =upl/(h*h); d4 = up2/(h*h);
hi = h; h2 = h;

BER(v3-v2); B1 = B; DB1 = DB;


BER(v2-v3); B2 = B; DB2 = -DB;
BER(v2-vl); B3 = B; DB3 = -DB;
BER(vl-v2); B4 = B; DB4 = DB;

BER((e[7]-e[4])*Vt); fBl = B;
BER((e[4]-e[7])*Vt); fB2 = B;
BER((e[4]-e[l])*Vt); 1B3 = B;
BER((e[l]-e[4])*Vt); fB4 = B;

Ef = fabs( (v2-vl)/hl + ((v3-v2)/h2-(v2-vl)/hl)*hl/(hl+h2))*Vt/Nx ;


if (Ef == 0) { Ef = 1;}
Kbb = 3.5E21/1.03923;
Kbl = -22.5E6* 1.12237;
zn = 7.03E5*exp(-1.231E6/Ef);
zp = 1.582E6*exp(-2.036E6/Ef);

Kfl = unl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf2 = un2*Nu* Vt/h 1 *( 1 -h l/(h l+h2))/Nx;
Ki3 = upl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf4 = up2*Nu* Vt/h 1 *( 1 -h l/(hl+h2))/Nx;

Jn = Kf2*(fB4*e[2]*Nn-fB3*e[5]*Nn) + Kn*(fB2*e[5]*Nn-fBl*e[8]*Nn);
Jp = Kf4*(fB4*e[6]*Nn-fB3*e[3]*Nn) + Kf3*(fB2*e[9]*Nn-fBl*e[6]*Nn);

constl = tp*(n2+l)+tn*(p2+l);

a[4][l] = l/(h*h);
a[4][2] = 0;
a[4][3J =0;
a[4][4] =-2/(h*h);
a[4][5] = -1;
a[4][6] =1;
a[4][7] = l/(h*h);
a[4][8] =0;
a[4][9] =0;
a[4] [10] =0;
a[4][11] = 0;

a[5][l] = d2*DB3*n2 - d2*DB4*nl;


a[5] [2] = d2*B4;
a[5][3] =0;
a[5][4] = dl*DBl*n3 + d2*DB4*nl - (dl*DB2+d2*DB3)*n2;
a[5][5] = -dl*B2-d2*B3 - (p2*constl-(n2*p2-l)*tp)/(constl*constl) - 1/Nt_step;
a[5] [6] = -(n2*constl-(n2*p2-l)*tn)/(constl*constl);

Numerical Simulation of MOS Capacitor B13 Appendix B


a[5][7] = dl*(-DBl*n3 + DB2*n2);
a[5][8] =dl*Bl;
a[5][9] ,= 0;
a[5][ 10] =0;
a[5][ll] =0;

a[6][l] = d4*(DB4*p2 - DB3*pl);


a[6][2] =0;
a[6][3] = d4*B3 ;
a[6][4] = d3*DB2*p3 - (d3*DBl+d4*DB4)*p2 + d4*DB3*pl ;
a[6][5] = - (p2*constl-(n2*p2-l)*tp)/(constl*constl);
a[6][6] = -d3*Bl-d4*B4 -(n2*constl-(n2*p2-l)*tn)/(constl*constl) - 1/Nt_step;
a[6][7] = d3*(DBl*p2 -DB2*p3);
a[6][8] =0;
a[6][9] = d3*B2 ;
a[6][10] =0;
a[6] [11] =0;

E_field[4] = Ef;
Jnn[4] = Jo*unl/h*(B2*n2-Bl*n3); Jpp[4] = Jo*upl/h*(B2*p3-Bl*p2);

b[4] = -l/(h*h)*(v3-2*v2+vl)+(n2-p2)-c;
b[5] = -dl*(Bl*n3-B2*n2)+d2*(B3*n2-B4*nl) - BB*Kbb*Ef*Ef*exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl+ (n2-Ln)/Nt_step;
b[6] = -d3*(B2*p3-Bl*p2)+d4*(B4*p2-B3*pl) - BB*Kbb*Ef>Ef*exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl+ (p2-Lp)/Nt_step;

void comp3(BANDARRAY huge *a,double huge *b,double vl,double v2,double v3,


double nl,double n2,double n3,double pi,double p2,double p3,
double uni,double un2,double upl,double up2,double hi,double h2,int i,
double Ln,double Lp,double huge *e)
{
double Ef,Kbb,Kbl,Kfl,Kf2,Kf3,Kf4,Jn,Jp,zn,zp,fBl,lB2,fB3,fB4,
dl,d2,d3,d4,Bl,B2,B3,B4,DBl,DB2,DB3,DB4,const 1;

dl =unl/(h2*(h2+hl)/2); d2 = un2/(hl*(h2+hl)/2);
d3 = upl/(h2*(h2+hl)/2); d4 = up2/(hl*(h2+hl)/2);

BER(v3-v2); B1 = B; DB1 = DB;


BER(v2-v3); B2 = B; DB2 = -DB;
BER(v2-vl); B3 = B; DB3 = -DB;
BER(vl-v2); B4 = B; DB4 = DB;

BER((e[7]-e[4])*Vt); ffil=B;
BER((e[4]-e[7])*Vt); 1B2 = B;
BER((e[4]-e[l])*Vt); fB3 = B;
BER((e[l]-e[4])*Vt); fB4 = B;

Ef = fabs( (v2-vl)/hl + ((v3-v2)/h2-(v2-vl)/hl)*hl/(hl+h2))*Vt/Nx ;


if (Ef — 0) { Ef = 1;}
Kbb = 3.5E21/1.03923;
Kbl =-22.5E6*l. 12237;
zn = 7.03E5*exp(-1.231E6/Ef);

Numerical Simulation of MOS Capacitor B14


t
Appendix B
zp = 1,582E6*exp(-2.036E6/Ef);

Kfl = unl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf2 = un2*Nu* Vt/h 1 *( 1 -h l/(h l+h2))/Nx;
KJ3 = upl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf4 = up2*Nu* Vt/h 1 *( 1 -h l/(h l+h2))/Nx;

Jn = Kf2*(fB4*e[2]*Nn-fB3*e[5]*Nn) + Kfl*(fB2*e[5]*Nn-fBl*e[8]*Nn);
Jp = Kf4*(fB4*e[6]*Nn-fB3*e[3]*Nn) + Kf3*(fB2*e[9]*Nn-fBl*e[6]*Nn);

constl = tp*(n2+l)+tn*(p2+l);

a[i][l] =0;
a[i][2] =0;
a[i][3] = 2/(hl*(h2+hl));
a[i][4] =0;
a[i][5] =0;
a[i][6] = -2/(h2+h 1 )*( l/h2+ 1/h 1);
a[i][7] = -1;
a[i][8] =1;
a[i][9] = 2/(h2*(h2+hl));
a[i] [10] =0;
a[i][ 11] =0;

a[i+l][l] = 0;
a[i+l][2] = d2*DB3*n2 - d2*DB4*nl ;
a[i+l][3] = d2*B4 ;
a[i+l](4]=0;
a[i+lj[5] = dl*DBl*n3 + d2*DB4*nl - (dl*DB2+d2*DB3)*n2;
a[i+l][6] = -dl*B2-d2*B3 - (p2*constl-(n2*p2-l)*tp)/(constl*constl) -1/Nt_step;
a[i+l][7J = -(n2*constl-(n2*p2-l)*tn)/(constl*constl);
a[i+l][8] = dl*(-DBl*n3 + DB2*n2);
a[i+l][9] = dl*Bl;
a[i+l][10]= 0;
a[i+l][l 1]= 0;

a[i+2][l] = d4*(DB4*p2 - DB3*pl);


a[i+2][2]=0;
a[i+2][3] = d4*B3 ;
a[i+2][4] = d3*DB2*p3 - (d3*DBl+d4*DB4)*p2 + d4*DB3*pl ;
a[i+2][5] = -(p2*constl-(n2*p2-l)*tp)/(constl*constl);
a[i+2][6] = -d3*Bl-d4*B4 -(n2*constl-(n2*p2-l)*tn)/(constl*constl) -1/Nt_step;
a[i+2][7] = d3*(DBl*p2 -DB2*p3);
a[i+2][8]=0;
a[i+2][9] = d3*B2 ;
a[i+2][10]= 0;
a[i+2][ll]= 0;

E_field[i] = Ef;
Jnn[i] = Jo*unl/h2*(B2*n2-Bl*n3); Jpp[i] = Jo*upl/h2*(B2*p3-Bl*p2);

b[i] = -2/(h2+hl)*(v3/h2-v2*(l/h2+l/hl)+vl/hl)+(n2-p2)-c;
b[i+l] = -dl*(Bl*n3-B2*n2)+d2*(B3*n2-B4*nl) - BB*Kbb*EPEPexp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl+ (n2-Ln)/Nt_step;
b[i+2] = -d3*(B2*p3-Bl*p2)+d4*(B4*p2-B3*pl) - BB*Kbb*Ef*Ef)texp(Kb l/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl + (p2-Lp)/Nt_step;
}

Numerical Simulation of MOS Capacitor B15


?
Appendix B
II**********************************************************************

void comp4(double vl,double v2,double nl,double n2,double pi,double p2,


double uni.double un2,double upl.double up2,double g3,
BAND ARRAY huge *a, double huge *b,double Ln.double Lp,double huge *e)
{
double Ef,Kbb,Kb 1 .Kfl,Kf2,Kf3,Kf4,Jn,Jp,zn,zp,fB 1 ,fB2,fB3,fB4,
dl,d2,d3,d4,Bl,B2,B3,B4,DBl,DB2,DB3,DB4,const I,v3,h,hl,h2;

v3 = Vbi;
h = g3; hi = g3; h2 = g3;
dl = unl/(h*h); d2 = un2/(h*h);
d3 = upl/(h*h); d4 = up2/(h*h);

BER(v3-v2); B1 = B; DB1 = DB;


BER(v2-v3); B2 = B; DB2 =-DB;
BER(v2-vl); B3 = B; DB3 = -DB;
BER(vl-v2); B4 = B; DB4 = DB;

BER((e[7]-e[4])*Vt); fBl=B;
BER((e[4]-e[7])*Vt); fB2 = B;
BER((e[4]-e[l])*Vt); fB3 = B;
BER((e[l]-e[4])*Vt); fB4 = B;

Ef =fabs( (v2-vl)/hl + ((v3-v2)/h2-(v2-vl)/hl)*hl/(hl+h2))*Vt/Nx ;


if (Ef = 0) { Ef = 1;}
Kbb = 3.5E21/1.03923;
Kbl = -22.5E6*1.12237;
zn = 7.03E5*exp(-1.231E6/Ef);
zp = 1.582E6*exp(-2.036E6/Ef);

Kfl = unl*Nu*Vt*hl/h2/(hl+h2)/Nx;
Kf2 = un2*Nu*Vt/hl*(l-hl/(hl+h2))/Nx;
Ki3 = up 1 *Nu* Vt*h l/h2/(hl+h2)/Nx;
Kf4 = up2*Nu* Vt/h 1 *( 1 -h l/(h l+h2))/Nx;

Jn = Kf2*(fB4*e[2]*Nn-fB3*e[5J*Nn) + Kdl*(fB2*e[5]*Nn-ffil*Nd/Nn);
Jp = Kf4*(fB4*e[6]*Nn-fB3*e[3]*Nn) + Kf3*(fB2*Nn/Nd-Bl*e[6]*Nn);

constl = tp*(n2+i)+tn*(p2+l);

a[n-2][l] =0;
a[n-2] [2] =0;
a[n-2][3] = l/(h*h);
a[n-2][4] =0;
a[n-2][5] =0;
a[n-2][6] = -2/(h*h);
a[n-2][7] =-l;
a[n-2][8] = 1;
a[n-2][9] =0;
a[n-2][10] = 0;
a[n-2][11] = 0;

a[n-1 ] [ 1] =0;
a[n-l][2] = d2*DB3*n2 - d2*DB4*nl ;
a[n-l][3] = d2*B4 ;
a[n-1 ] [4] =0;
a[n-1 ][5] = dl*DBl*Nd/Nn + d2*DB4*nl - (dl*DB2+d2*DB3)*n2 ;
a[n-l][6] = -dl*B2 - d2*B3 -(p2*constl-(n2*p2-l)+tp)/(constl*constl)-l/Nt_step;

Numerical Simulation of MOS Capacitor B16 Appendix B


a[n-l][7] = -(n2*constl-(n2*p2-l)*tn)/(constl*constl);
a[n-l][8] =0;
a[n-1 ] [9] =0;
a[n-l][10] = 0;
a[n-l][11] = 0;

a[n][l] = d4*(DB4*p2 - DB3*pl);


a[n][2] = 0;
a[nj[3] = d4*B3 ;
a[nj[4] = d3*DB2*Nn/Nd -(d3*DBl+d4*DB4)*p2 + d4*DB3*pl;
a[n] [5 ] =-(p2*const 1 -(n2*p2-1 )*tp)/(const 1 *const 1);
a[n][6] = -d3*Bl-d4*B4 -(n2*constl-(n2*p2-l)*tn)/(constl*constl)-l/Nt_step;
a[n][7] =0;
a[n][8] =0;
a[n][9] =0;
a[n] [10] =0;
a[n] [11] =0;
E_field[n-2] = Ef;
Jnn[n-2] = Jo*unl/h*(B2*n2-Bl*Nd/Nn); Jpp[n-2] = Jo*upl/h*(B2*Nn/Nd-Bl*p2);

b[n-2] = -l/(h*h)*(v3-v2*2+vl)+(n2-p2)-c;
b[n-l] = -dl*(Bl*Nd/Nn-B2*n2)+d2*(B3*n2-B4*nl) - BB*Kbb*Ef‘EF‘exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl +(n2-Ln)/Nt_step;
b[n] = -d3*(B2*Nn/Nd-Bl*p2)+d4*(B4*p2-B3*pl) - BB*Kbb*ER‘Ef,'exp(Kbl/Ef)/Ro
- II*(zn*fabs(Jn) + zp*fabs(Jp))/Ro + (n2*p2-l)/constl +(p2-Lp)/Nt_step;

//**********************************************************************

void LU_dec(BANDARRAY huge *a)


{
int i,j,k,el;
double temp.comp,factor;
el = element;

for (k=l; k <= n; k++)


{
comp = a[k] [ 1];
i=k;
if (el < n) el++;
for (j=k+l ; j<=el; j++) // find pivot
{
if ( fabs(a[j][l]) > fabs(comp))
{
comp = a[j] [ 1 ];
i=j;
}
}
indx[k]=i;
if (comp == 0.0 ) {a[k][l] = IE-30;}
if (i !=k)
{
for (j=l; j<= band; j++)
{
temp = a[k][j];
a[k][j] = a[i][j];
a[i] [j] = temp;
}
}

Numerical Simulation of MOS Capacitor BJ7 Appendix B


for (i=k+l; i<=el; i++) // Elimination.
{
factor = a[i][ l]/a[k][l];
al[k] [i-k] = factor;

for (j=2-j<=band;j++) a[i][j-l]=a[i][j]-factor*a[k][jJ;


a[i] [band] =0.0;
}
}

//**********************************************************************

void Back_sub(BAND ARRAY huge *a, BAND ARRAY huge *al,


double huge *b,int huge *indx)
{
int i,k,el;
double temp,swap;
el = element;

for (k=l;k<=n;k++) // Forward Substitution.


{ // unscrambling the permuted row.
i=indx[k];
if (i != k)
{
swap = b[i];
b[i] = b[k];
b[k] = swap;
}
if (el < n) el++;

for (i=k+l;i<=el;i++)
{
b[i] -= al[k][i-k]*b[k];
}
}

for (i=n;i>=l;i--) // Back substitution.


{
temp = b[i];
for (k=2;k<=el;k++)
{
temp -= a[i][k]*b[k+i-l];
}
b[i]=temp/a[i][l];
if (el < band) el++;
}

Numerical Simulation of MOS Capacitor B18 Appendix B


Plot Out of
DC Analysis Results
Effects of doping
concentration variability

Appendix
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