VERILOG CODE FOR

VENDING MACHINE
BY
D MEGHANA
DEFINATION
 Verilog,standardised as IEEE 1364,is a hardware
description language(HDL) used to model
electronic systems.
 it is most commonly used in design and
verification of digital circuits at the register
transfer level of abstraction.
FEATURES OF VENDING MACHINE
 Vend 4 products.
 Accept three kinds of coins.

 Displaying the amount of money inputed.

 Displaying which product the user has choosen.

 Self starting with initial coin.

 It can vend only one product at a time.

NUMBER OF TRANSISTORS USED
 Four ens and Three Ors: 4*8*(4+2)+3*8*(4+2)=256T
 8-bit+8-bit input Adder: 640 Transistors
 Four 8-bit output shift registers: 4*8*16=512 Transistors
 One 8 D flip-flop arrays:8*16=144 Transistors
 One 4 D flip-flop arrays 144/ 2=77 T
 16-bit input subtracter: apporximately448+236=684 T
 First encoder(3-bit input to 8-bit output): Two 2-input OR
Gates=2*4=8 T
 Second encoder(4-bit input to 7-bit output): Two 2-input OR
Gates=2*4=8T
 Three 4-input AND Gates:3*(4*2+2)=30 T
 Six 2-input OR Gates:6*(2*2+2)=36 T
 One 3-input OR Gate and One-4-input OR Gate:(6+2)+(8+2)=18T
 One 2-input And Gate: 4 T
 One D flip-flop: 16T; One inverter:2T
 (8+4) And Gates: 4*12=28T
 Third encoder(8-bit to 14-bit output):appoximately250T
METHOD OF PAYMENT
 Method of payment can be done for vending
machine in 3 methods.
 The method using was coin,using note,using
prepaid as a payment.
 Coin operated vending machine.

 Note operated vending machine.

 Prepaid operated vending machie.

ADVANTAGES OF VENDING
MACHINES
 Vending machines give the clients a free choice to
purchase products at anytime of the day.one can
shop for his or her intended product on a product
on a 24 hour,throughout the year.
 Diversity in terms of products that a vending
machine can handle is another advantage that
this technology in business has brought.
 Reduction of overhead costs by hiring of staff only
increases the profit margin for the owner making
it a success bound venture.
 The machine can always be moved to other areas
if need arises.
DISADVANTAGES
 The main disadvantage of vending machine is
that it can cost you a lot of money.
 Fraud cases are also common in this kind of
business by customers who formulate by means
of hacking into the system of machine to dispence
products.
VERILOG CODE FOR THE VENDING
MACHINE
 The objective hear is to design vending machine
controller which accepts money inputs in any
sequence and delivers the products when the
required amount has been deposited and gives
back the change.
 Here an additional facility is provided to the
user. It is possible to withdraw the deposited
money in,between if the customer wishes so by
pressing a push button.
SPECIFICATIONS
 Price of the product=3 rs
 Possible money inputs=2rs and 1rs

 Product to be delivered when 3rs or 4rs is

reached.
 A push button is there which indicates the
cancellation of transaction and the return of
amount deposited.
VERILOG CODE
 /*
 Here

 i=0 indicates no coin has been detected.

 i=1 and j=0 indicates the detection of 1rs coin.

 i=1 and j=1 indicates the detection of 2rs coin.

 Pu indicates the push button to cancel the

transaction.
 Output p and c indicates output delivery and coin
return respectively.
 */
VERILOG CODE:
 module vend(pu,i,j,rst,clk,p,c);
 Input pu,i,j,rst,clk;

 Output p,c;

 reg[2:0] state,NS;

 Parameter

 S0=3'b000,S1=3'b001,S2=3'b010,S3=3'b011,S4=3'
b100,S5=3'b101,S6=3'b110,S7=3'b111;
 always@(posedge clk or negedge rst)

 if (~rst) state=S0;

 else state=NS;

 always@(state or i or j or pu)
 case(state)
 S0:NS=pu?S0:(i?(j?S2:S1):S0);
 S1:NS=pu?S5:(i?(j?S3:S2):S1);
 S2:NS=pu?S6:(i?(j?S4:S3):S2);
 S3:NS=S0;
 S4:NS=S0;
 S5:NS=S0;
 S6:NS=S5;
 S7:NS=S0;
 endcase
 Assign
 {p,c}={(state[0]&state[1]&~state[2])|(~state[0]&~state[1
]&state[2]),(state[2]&~state[1])|
 (state[2]&~state[0])};
 endmodule
CODE SIMULATION
 The above code is simulated by writing a test
bench.
 A specific case of test bench is shown below

 module testbench();

 reg pu,i,j,rst,clk;

 wire p,c;

 vend test(pu,i,j,rst,clk,p,c);

 always

 #5 clk=~clk;

 initial

 begin
 i=1'b0;
 j=1'b0;

 clk=1'b0;

 rst=1'b0;

 pu=1'b0;

 #5 rst=1'b1;

 #5 i=1'b1;

 #5 pu=1'b1;

 #100 $finish;

 end

 endmodule
SIMULATION AND RESULTS
 The verilog code is simulated and compiled in
Xilinx ISE 12.2i tool. And the following desired
results are obtained.
 NOTE: Price of the Product is Rs. 3

 Return of Rs. 2 after the Cancel (pu) button is

pressed.
 Product Delivery and Return of Change after Rs. 4
insertion.
 Product Delivery after Rs. 3 insertion
 RTL SCHEMATIC
 BLOCKS OF RTL SCHEMATIC
 TECHNOLOGY SCHEMATIC
 CONCLUSION
 The designed machine can be used for many
applications and we can easily enhance the
number of selections. The next stage of this study
is to convert this model into hardware and to
calculate the total power consumption of the
machine. Thus we would conclude saying that we
tried our bit to modify the present day complex
vending machine into a user friendly and user
specific vending machine.