Mastersthesis Sandeepkolluri

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Analysis, Design and Implementation of an Auxiliary Current Pump Module

for Improved Load Transient Response of Battery Discharge Regulator
Thesis · June 2014

DOI: 10.13140/RG.2.2.32079.12967
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Analysis, Design and Implementation of an Auxiliary
Current Pump Module for Improved Load Transient
Response of Battery Discharge Regulator
A THESIS
submitted by
SANDEEP KOLLURI N V M L
for the award of the degree
of
MASTER OF SCIENCE
(by Research)
DEPARTMENT OF ELECTRICAL ENGINEERING

INDIAN INSTITUTE OF TECHNOLOGY MADRAS.
MAY 2014
THESIS CERTIFICATE
This is to certify that the thesis titled Analysis, Design and Implementation of an
Auxiliary Current Pump Module for Improved Load Transient Response of Battery
Discharge Regulator, submitted by Sandeep Kolluri N V M L, to the Indian Institute
of Technology, Madras, for the award of the degree of Master of Science, is a bona fide
record of the research work done by him under our supervision. The contents of this
thesis, in full or in parts, have not been submitted to any other Institute or University
for the award of any degree or diploma.
Dr.N Lakshmi Narasamma

Research Guide
Assistant Professor
Place: Chennai
Dept. of Electrical Engineering
IIT-Madras, 600 036
Date: 15th March 2014

ACKNOWLEDGEMENTS
I take this opportunity to acknowledge all those people who directly or indirectly helped
me to carry out this research work successfully.
I am greatly thankful to my research guide Dr.N Lakshmi Narasamma, for her help
in my research here at Indian Institute of Technology Madras.
i
ABSTRACT
Batteries support the space craft during inrush of power demand, eclipses and through
all contingencies, by getting discharged. In these moments the Battery Discharge Regulator
(BDR) regulates the power bus. A DC-DC converter in closed loop is used in BDR for
regulatory action. High efficiency, high power density, fast dynamic response are some
of the key requirements for the DC-DC converters used in spacecraft power systems.
Minimal deviation in the output voltage is desirable under steady state and transient
state, irrespective of source and load variations.
In a DC-DC converter, during the load transients, the power balance between the
input and output is disturbed, which in turn results in momentary discharging or overcharging
of output capacitor. This effect is seen as undershoot or overshoot in the output voltage.
The power balance will be resorted when the voltage controller takes action to alter the
input current reference, thereby changing the input power drawn. The settling time and
the deviation in output voltage depends on voltage loop design. A DC-DC converter
should possess high control bandwidth and low output impedance to achieve minimum
deviation in the output voltage under large load transients, for which high switching
frequency operation of the converter is necessary. Increasing the switching frequency
results in poor efficiency due to increased switching loss in the semiconductor devices.
A large load bus capacitance can mitigate the output voltage deviation for large load
transients, but this reduces the power density of the converter.
Many complex control techniques to improve the dynamic performance of DC-DC

converters have been reported in literature. The transient response of a DC-DC converter
not only depends on the control scheme but also on the filter components like inductor
and capacitor used in the converter. Due to the delays introduced by these energy storing
elements in the circuit, the output voltage deviation is inevitable under load disturbance
in high power converters. In addition to delay caused by the filter components there
ii
can be further restrictions on the converter bandwidth due to its non-minimal phase
behaviour. Especially in a boost converter, the voltage loop bandwidth is limited due
to right half plane zero constraint. So the change in the input current reference is slow,
during a load transient, which results in more settling time and the deviation in the
output voltage.
These reasons can motivate one to use an Auxiliary Current Pump Module (ACPM),
which helps to minimize the deviation of output voltage under large load transients,
without asking for large load bus capacitance. Therefore this increases the power
density of whole converter, which is a demanding requirement for space craft power
supplies. ACPM acts as a controlled current source and can be realized by a bidirectional
low power auxiliary converter. Appropriate current reference for the ACPM is derived
by monitoring the load current of the main converter. The auxiliary converter comes
into operation only during load transients to aid in minimization of deviation in the
output voltage. This effectively increases the bandwidth of the converter with out
increasing the operating switching frequency and with out compromising on the filter
requirements.
In this work, a 2 kW interleaved boost converter with average current mode control
is built, which acts as main DC-DC converter in the BDR. An Auxiliary Current Pump
Module (ACPM) has been developed for enhancing the dynamic response of the main
converter during load transients. A suitable control scheme is designed and implemented
for interleaved boost converter operating in conjunction with proposed isolated ACPM.
Load current injection circuit (LCIC) employed in the proposed control scheme, eliminates
the requirement of complex non-linear control algorithms. The proposed control scheme
in particular suits for current-mode controlled converters operating along with ACPM.
Also, a new isolated ACPM topology is proposed, which can be used in conjunction
with both isolated and non-isolated step-up/step-down DC-DC converters. Analysis,
design and implementation of the main DC-DC converter and ACPM will be presented
in this thesis.
iii
TABLE OF CONTENTS
ACKNOWLEDGEMENTS i
ABSTRACT ii
LIST OF TABLES vii
LIST OF FIGURES xi
ABBREVIATIONS xii
NOTATION xiii
1 Introduction 1
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Motivation, Objective and Scope . . . . . . . . . . . . . . . . . . . 2
1.3 Prior art on existing power converter topologies and control schemes
for a BDR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.1 Power converter topologies . . . . . . . . . . . . . . . . . . 6
1.3.2 Control schemes . . . . . . . . . . . . . . . . . . . . . . . 8
1.4 Thesis contributions . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.5 Organization of thesis . . . . . . . . . . . . . . . . . . . . . . . . . 10
2 Analysis, Modeling, Design and Implementation of Average Current Mode

Control for Interleaved Boost Converter 12
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2 Operation of Interleaved Boost Converter . . . . . . . . . . . . . . 13
2.3 Average Current Mode Control of Interleaved Boost Converter . . . 14
2.4 Mathematical Modeling . . . . . . . . . . . . . . . . . . . . . . . . 17
2.4.1 Open loop power stage transfer functions . . . . . . . . . . 17
2.4.2 Closed current loop transfer functions . . . . . . . . . . . . 23
iv
2.4.3 Closed voltage loop transfer functions . . . . . . . . . . . . 25
2.5 Controller Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.6 Small signal model validation of average current-mode controlled interleaved
boost converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.7 Hardware Implementation . . . . . . . . . . . . . . . . . . . . . . 31
2.8 Steady state results . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.9 Steady state performance evaluation of converter in closed loop . . . 33
2.10 Transient response of the converter in closed loop . . . . . . . . . . 36
2.11 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3 An Auxiliary Current Pump Module for Improved Load Transient Response

of Battery Discharge Regulator 40
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.2 Operation of Auxiliary Current Pump Module . . . . . . . . . . . . 40
3.2.1 ACPM for source mode of operation . . . . . . . . . . . . . 41
3.2.2 ACPM for sink mode of operation . . . . . . . . . . . . . . 42
3.3 Operation of ACPM in conjunction with interleaved boost converter 44
3.4 Average current mode controlled interleaved boost converter with load
current injection circuit . . . . . . . . . . . . . . . . . . . . . . . . 44
3.5 Design and Implementation . . . . . . . . . . . . . . . . . . . . . . 45
3.5.1 Design of Interleaved Boost Converter and Average current mode
controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.5.2 Design of Load Current Injection Circuit . . . . . . . . . . 47
3.5.3 Design of Auxiliary Current Pump Module and Hysteresis current
mode controller . . . . . . . . . . . . . . . . . . . . . . . . 49
3.6 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
4 A New Auxiliary Current Injection Circuit for Improved Transient Response

of Step-up/Step-down DC-DC Converters 56
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
4.2 Operation of Auxiliary Current Pump Module . . . . . . . . . . . . 59
4.2.1 Isolated ACPM for source mode of operation . . . . . . . . 59
4.2.2 Isolated ACPM for sink mode of operation . . . . . . . . . 61
v
4.3 Operation of Proposed isolated ACPM in conjunction with interleaved
boost converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.4 Design and Implementation . . . . . . . . . . . . . . . . . . . . . . 64
4.4.1 Design of Interleaved Boost Converter and Average current-mode
controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.4.2 Design of Load Current Injection Circuit . . . . . . . . . . 65
4.4.3 Design of Auxiliary Current Pump Module and Hysteresis current-mode
controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.5 Simulation Results and Experimental Verification . . . . . . . . . . 67
4.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
5 Conclusions 74
5.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
LIST OF TABLES
1.1 Design requirements of DC-DC power converter w.r.t space standards . . . . . 2

1.2 Specifications for 2 kW BDR module . . . . . . . . . . . . . . . . . . . . 5
2.1 Design parameters of 2 kW interleaved boost converter . . . . . . . 27

2.2 Line regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.3 Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.4 Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.5 Performance of developed 2 kW BDR module . . . . . . . . . . . . . . . . 38
3.1 Operating parameters of the 2 kW interleaved boost converter prototype . . . . 50

3.2 Operating parameters of the auxiliary current pump module . . . . . . . . . . 51
4.1 Design parameters of prototypes . . . . . . . . . . . . . . . . . . . . . . 64

4.2 Measurements obtained from the experimental prototypes . . . . . . 70
vii
LIST OF FIGURES
1.1 Spacecraft power subsystem . . . . . . . . . . . . . . . . . . . . . . . . 1

1.2 Battery Discharge Regulator . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Basic structure of auxiliary current pump technique . . . . . . . . . 4
1.4 Existing auxiliary current pump module for isolated step-up/step-down
converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.5 Average current-mode control of boost converter . . . . . . . . . . 10
2.1 Interleaved boost converter . . . . . . . . . . . . . . . . . . . . . . 13

2.2 (From top) Input current iL , gating pulse vg1 for switch Sw1 , current iL1 through
inductor L1 , gating pulse vg2 for switch Sw2 , current iL2 through inductor L2 of
interleaved boost converter. . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3 (From top) Gating pulse vg1 for switch Sw1 , current iD1 through diode D1 , gating
pulse vg2 for switch Sw2 , current iD2 through diode D2 , current iCo through capacitor
bank Co , voltage vCo across capacitor bank Co of interleaved boost converter. . 15
2.4 Average current-mode control of interleaved boost converter with two
inner current loops and one outer voltage loop . . . . . . . . . . . . 16
2.5 Block diagram representation of ACMC for interleaved boost converter 17
2.6 Gating pulse for Sw1 ,Sw2 . . . . . . . . . . . . . . . . . . . . . . 18
2.7 Circuit conditions of interleaved boost converter . . . . . . . . . . . 19
2.8 Small signal ac equivalent circuit model of ideal interleaved boost converter 21
2.9 Block diagram representation of interleaved boost converter . . . . 22
2.12 Implementation of current and voltage loop controllers . . . . . . . 27
2.16 Analytical and experimental frequency response characteristics of 2 kW interleaved
boost converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.17 Block diagram of PWM circuit and Gating pulses . . . . . . . . . . 32
2.18 trace 1: Input current (Y-axis scale: 2 A/div), trace 2: Capacitor current (Y-axis scale:
5 A/div), trace 3,4: Gating pulses for Sw1 , Sw2 respectively (Y-axis scale: 10 V/div).
X-axis scale: 4µs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
viii
2.19 2 kW interleaved boost converter . . . . . . . . . . . . . . . . . . . . . . 34
2.20 Experimental setup for testing 2 kW interleaved boost converter . . . . . . . . 34
2.21 Experimentally observed steady state results of 2 kW interleaved boost converter 35
2.22 Efficiency of 2 kW interleaved boost converter at different input voltages . . . . 37
2.23 Transient response of Vo due to step change in Iload in a 500 W interleaved
boost converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.24 Experimentally observed transient response of 2 kW interleaved boost converter . 38
3.1 Basic structure of auxiliary current injection technique . . . . . . . 40

3.2 Auxiliary current pump module . . . . . . . . . . . . . . . . . . . . 41
3.3 Circuit conditions and key waveforms of auxiliary current pump module
operating in parallel with main converter for source mode of operation,
during a step increase in load. (From top) Load current, output voltage,
current reference for ACPM, auxiliary inductor current, gating pulse for
switch S1a , voltage across the inductor . . . . . . . . . . . . . . . 42
operating in parallel with main converter for sink mode of operation,
during a step decrease in load. (From top) Load current, output voltage,
switch S2a , voltage across the inductor . . . . . . . . . . . . . . . . 43
3.5 Auxiliary current pump module operating in parallel with interleaved
boost converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.6 Average current-mode control of interleaved boost converter with LCIC
& ACPM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.7 Key waveforms of interleaved boost converter operating in conjunction
with ACPM, during step change in load. (From top) Load current,
output voltage, input current, auxiliary inductor current. . . . . . . . 46
3.8 Block diagram representation of ACMC for interleaved boost converter
with LCIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.9 Average current-mode control of interleaved boost converter with LCIC
& ACPM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.10 Reference generator and control circuitry for auxiliary current pump module . . 49
3.11 Voltage loop gain of 2 kW interleaved boost converter . . . . . . . . . . . . 50
3.12 Auxiliary current injection circuit waveforms for source mode of operation
during a step increase in load . . . . . . . . . . . . . . . . . . . . . 51
3.13 Experimentally observed transient response of 2 kW interleaved boost converter with
different slew rates of load current for 50% step change in load, with 540µF load bus
capacitance, at input voltage of 48 V. . . . . . . . . . . . . . . . . . . . . 52
ix
3.14 Experimentally observed transient response of 2 kW interleaved boost converter with
capacitance, at input voltage of 48 V. . . . . . . . . . . . . . . . . . . . . 52
3.15 Simulated transient response of 2 kW interleaved boost converter for 50% step change
in load with 1200µF load bus capacitance, at input voltage of 48 V. . . . . . . . 53
3.16 Experimentally observed transient response of 2 kW interleaved boost converter for
50% step change in load, with 540µF load bus capacitance, at input voltage of 48 V
enabling LCIC. The top trace is output voltage in ac mode (1 V/div) and the bottom
trace is load current (10 A/div) with slew rate of 512 kA/s. The time scale is 400
us/div. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
enabling LCIC & ACPM. From the top, the first trace is output voltage in ac mode
(1 V/div), the second trace is input current of auxiliary converter (10 A/div) and the
bottom trace is load current (10 A/div). The time scale is 400 us/div. . . . . . . 54
enabling LCIC & ACPM. . . . . . . . . . . . . . . . . . . . . . . . . . 55
4.1 Existing auxiliary current pump modules for step-up/step-down converters 57

4.2 Proposed auxiliary current pump module . . . . . . . . . . . . . . . 60
current reference for isolated ACPM, auxiliary inductor current, gating
pulse for switch S1a , voltage across the inductor . . . . . . . . . . 61
operating in parallel with main converter for sink mode of operation,
during a step decrease in load. (From top) Load current, output voltage,
pulse for switch S3a , gating pulse for switch S2a , voltage across the
inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.5 Auxiliary current pump module operating in parallel with interleaved
boost converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.6 Reference generator and control circuitry for auxiliary current injection
converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.7 Simulated transient response showing output voltage of interleaved boost
converter with and without isolated ACPM for step variations in load 67
4.8 Laboratory prototype showing 250 W interleaved boost converter and
auxiliary current pump module . . . . . . . . . . . . . . . . . . . . 68
x
4.9 Experimentally observed transient response of 250 W interleaved boost
converter with 90µF load bus capacitance, at input voltage of 45 V. . 68
converter with 220µF load bus capacitance, at input voltage of 45 V. 69
converter with 90µF load bus capacitance, at input voltage of 45 V,
enabling load current injection loop. . . . . . . . . . . . . . . . . . 69
enabling auxiliary current pump module. . . . . . . . . . . . . . . . 70
4.13 Comparison of the experimentally observed transient response of 250
W interleaved boost converter with 90µF load bus capacitance, at input
voltage of 45 V, with only isolated ACPM enabled and with both isolated
ACPM & LCIC enabled . . . . . . . . . . . . . . . . . . . . . . . . 71
enabling both isolated ACPM & LCIC. . . . . . . . . . . . . . . . . 71
4.15 Comparison of experimentally observed phase-plane behavior of 250
W interleaved boost converter, at input voltage of 45 V. . . . . . . . 72
xi
ABBREVIATIONS
BDR Battery Discharge Regulator

RHPZ Right Half Plane Zero
ACPM Auxiliary Current Pump Module
PWM Pulse Width Modulation
LCIC Load Current Injection Circuit
IBC Interleaved Boost Converter
ACMC Average Current-Mode Control
PCMC Peak Current-Mode Control
VMC Voltage Mode Control
xii
NOTATION
L Inductance
La Auxiliary inductance
Co Load bus capacitance
RL Load resistance
vin Input voltage
io Load current
vo Output voltage
xiii
CHAPTER 1
Introduction
1.1 Introduction
In a spacecraft, power system plays an important role. The power system generates,
stores, conditions, distributes and monitors the electrical power used by the spacecraft
throughout all the mission phases. The spacecraft power subsystem is shown in Fig.
1.1 comprising solar array which feeds the whole system, solar array regulator, batteries
(energy storage devices), battery charge regulator (BCR) and battery discharge regulator
(BDR). Solar array regulator regulates the bus voltage when load is fed directly from
solar array and the excess energy, if available is stored into batteries via battery charge
regulator. BDR supplies the load from the batteries and regulates the power bus during
inrush of power demand, eclipses and through all contingencies.
Solar Array
Solar PowerBus
Array
Regulator
BCR BDR Load

Capacitor
Bank
Battery
Figure 1.1: Spacecraft power subsystem
Essentially BDR is a DC-DC converter as shown in Fig. 1.2. The DC-DC converter
converts the unregulated DC voltage across the battery to a regulated DC voltage required
by the load. A DC-DC converter with closed loop control is used for regulatory action
in BDR. As the bus voltage is to be tightly regulated irrespective of source and load
variations, a converter with very good dynamic response is to be designed. So the
designer should target at achieving as high control bandwidth as possible and also as
low output impedance as possible. The requirement of having low output impedance
translates that the bus voltage variations should remain small for a wide variation in
load. Some of the principal design requirements to be met by a power converter for
space applications [1] are shown in Table. 1.1.
I/P: Unregulated DC O/P: Regulated DC

Voltage Voltage
BATTERY DISCHARGE
BATTERY REGULATOR LOAD
(DC SOURCE)
(DC−DC CONVERTER)
Figure 1.2: Battery Discharge Regulator
Table 1.1: Design requirements of DC-DC power converter w.r.t space standards
Sl.No Parameter Specification

1 Efficiency > 95%
2 Bus voltage regulation(under steady ±0.5%
state)
3 Bus voltage transients(for load transients ±1%
up to 50%)
4 Nominal output voltage ripple(peak to 0.5%
peak)
5 Phase margin 60°
6 Gain margin 10 dB
1.2 Motivation, Objective and Scope
High efficiency, high power density, fast dynamic response are some of the key
requirements for the DC-DC converters used in spacecraft power systems. DC-DC
converters which are used as space craft power supplies must meet very stringent specifications
with respect to deviation in output voltage for large load transients [2] - [4]. Minimal
deviation in the output voltage is desirable under steady state and transient state. During
the load transient, power balance between the input and output is disturbed, which in
turn results in momentary discharging or overcharging of output capacitor. This effect
is seen as undershoot or overshoot in the output voltage. The power balance will be
resorted when the voltage controller takes action to alter the input current reference
2
thereby changing the input power drawn. The settling time and the deviation in output
voltage depends on voltage loop design.
A DC-DC converter should possess high control bandwidth and low output impedance
to achieve minimum deviation in the output voltage under large load transients, for
which high switching frequency operation of the converter is necessary. Increasing the
switching frequency results in poor efficiency due to increased switching loss in the
semiconductor devices. A large load bus capacitance can mitigate the output voltage
deviation for large load transients, but this reduces the power density of the converter.
Several complex control techniques to improve the dynamic performance of DC-DC

converters have been reported in literature [5]-[12]. The transient response of a DC-DC
converter not only depends on the control scheme but also on the filter components
like inductor and capacitor used in the converter. Using small value of inductor may
increase the slew rate of current, but increases the amount of current ripple which
is undesirable. Due to the delays introduced by these energy storing elements in the
circuit, the output voltage deviation is inevitable under large load disturbance in high
power converters. In addition to the delay caused by filter components, there can be
further restrictions on the converter bandwidth due to its non-minimum phase behavior.
These reasons can motivate one to use a auxiliary current pump module (ACPM),
which helps to minimize the deviation of output voltage under large load transients,
without asking for large load bus capacitance. Therefore this increases the power
density of whole converter, which is a demanding requirement for space craft power
supplies. The basic structure of auxiliary current pump technique is shown in Fig.
1.3. ACPM acts as a controlled current source and can be realized by a bidirectional
low power auxiliary converter. Appropriate current reference for the ACPM is derived
by monitoring the load current of the main converter. The auxiliary converter comes
into operation only during load transients to aid in minimization of deviation in the
output voltage. This effectively increases the bandwidth of the converter with out
increasing the operating switching frequency and with out compromising on the filter
requirements. The concept of using multi-functional load conditioner in conjunction to
main converter is presented in [13]-[14], where the load conditioner can act like as an
active filter to inject harmonics and as an active resistor to provide damping. Different
3
auxiliary converter topologies and control strategies are reported in [15]-[20] for the
enhancement of dynamic response of DC-DC converter.
LOAD BU S ia
CAP ACIT AN CE
ST EP − UP/
iload Auxiliary
ST EP − DOW N L current
O
DC − DC pump
A
CONV ERT ER module
D
current
ref erence
generator
Figure 1.3: Basic structure of auxiliary current pump technique

The aim of this work is to build and test a 2 kW DC-DC converter meeting the
principal design requirements, shown in Table. 1.2. Interleaved boost converter topology
with average current-mode control is selected for the 2 kW DC-DC converter implementation.
Besides meeting the stringent steady state specifications as shown in Table. 1.2, the
main challenge is to improve the dynamic performance of the interleaved boost converter
to meet bus voltage transient requirement, in spite of limitation on its bandwidth due to
the inherent right half plane zero effect. An Auxiliary Current Pump Module (ACPM)
is used for enhancing the dynamic response of interleaved boost converter during load
transients. The ACPM operates only at the time of load transients, during which sinking/sourcing
of additional current from/to the load point of main converter is done. The load current
of the main converter is monitored to take an appropriate action during a load transient.
The inclusion of ACPM will not affect the steady state efficiency of the main converter,
as it comes into operation only during load transients. A suitable control scheme is
designed and implemented for interleaved boost converter operating in conjunction with
ACPM. Load current injection circuit (LCIC) employed in the proposed control scheme,
eliminates the requirement of complex non-linear control algorithms. The proposed
control scheme in particular suits for current-mode controlled converters operating along
with isolated ACPM.
On the other hand, there is an increasing demand for the use of isolated DC-DC
converters for space craft power supplies. A multi port isolated DC-DC converter
used for regulating the load bus in a satellite is reported in [21]. Isolated auxiliary
current pump module topologies especially for isolated DC-DC power converters are
still evolving. Auxiliary converter topologies for isolated converters are shown in [22],
4
Table 1.2: Specifications for 2 kW BDR module

1 Input Voltage Min:45 V Max:68 V
2 Output Voltage 70 V
3 Efficiency > 95%
4 Output Power 2000 W
5 output Ripple 300 mV
6 Line Regulation ±1%
7 Load Regulation ±1%
8 Transient Response(time/peak) Upto 5 ms/1%
where an auxiliary capacitor is required. In addition, these topologies require two stage
conversion increasing the complexity of the circuit.
MAIN
CONV ERT ER L
vin (ST EP UP/
o
a
d
vo
ST EP DOW N)
ia
Auxiliary
current
pump
Ca module
Figure 1.4: Existing auxiliary current pump module for isolated step-up/step-down
converters
The auxiliary converter reported in [19], is shown in Fig. 1.4, is free from right half
plane zero effect and can be used in conjunction with isolated/non-isolated DC-DC
converter irrespective of the topology. This converter requires an auxiliary voltage
source and can be realized by a auxiliary capacitor. The auxiliary capacitor transfers
the energy to the main converter through bi-directional auxiliary converter in the event
of step up load transient and absorbs the energy during a step down load transient.
An additional control circuit is required to regulate the voltage across the auxiliary
capacitor. The size of the auxiliary capacitor will be more, which increases the size
and cost of the system. The efficiency of the whole system may decrease due to loss of
energy in equivalent series resistance (ESR) of the capacitor. This topology asks for a
capacitor with high rms current capability and with low ESR.
In this work, a new isolated Auxiliary Current Pump Module (ACPM) has been
developed for enhancing the dynamic response of DC-DC converters during load transients
5
[23]. The isolated ACPM operates only at the time of load transients, during which
sinking/sourcing of additional current from/to the load point of main converter is done.
The load current of the main converter is monitored to take an appropriate action during
a load transient. The developed isolated ACPM can be used in conjunction with both
isolated and non-isolated step-up/step-down DC-DC converters. The developed isolated
ACPM is free from right half plane zero effects, thus can achieve high slew rate current
injection and fast response control. It does not require any auxiliary voltage source.
1.3 Prior art on existing power converter topologies and

control schemes for a BDR
1.3.1 Power converter topologies
Generally a step up converter is used in BDR to boost the battery voltage level to the
required bus voltage level. The simplest step-up topology is the boost converter in terms
of little component count, particularly active components. This topology is established
in terms of steady state and dynamic model. It suffers from stability problem because
of having right half plane zero (RPHZ) in its control-to-output transfer function for the
continuous conduction mode (CCM) of operation. A system having an odd number of
open-loop RHP zeros shows initial inverse response (undershoot) to a step input. This
effect becomes more significant as the zero moves closer to the origin. This limits the
bandwidth of the converter in closed loop as the cross over frequency needs to be well
below the frequency due to RHP zero and results in poor dynamic response. The other
topologies for BDR like double inductor boost converter and the Weinberg converter
don’t have RHPZ [2]. However, both topologies are more complex than the boost and
their size and weight is higher which makes them less preferable. In these topologies
stress on the semiconductors is higher than in the boost converter, therefore efficiency
is lower.
The problem of having lower bandwidth due to RHPZ is addressed in literature

and numerous attempts are made to eliminate its effect in boost converter. RHPZ
6
elimination technique is proposed in [24] for a current controlled tristate boost converter
which incorporates an additional controlled switch across the inductor.
The dynamic performance is improved by incorporating a differential current controller,

unaltering the boost converter topology [2]. This has an improved performance but
yields a low phase margin than the conventional current controlled boost converter.
At high power levels, parallel operation of boost converters offer modularity and
reliability. These paralleled converters can be operated in interleaved mode [3], where
interleaving is process of operating boost converters in parallel, with a phase shift
between their gate drive signals. The Phase shift between the gate drive signals is
360°/n, where n is the number of converters connected in parallel. This process facilitate
to increase the ripple frequencies in both input current and output voltage. In addition
the ripple magnitude reduces significantly, which implies that a smaller output capacitor
is sufficient to maintain same amount of ripple in the output voltage compared to its
counterpart. Moreover, interleaving has an additional advantage of having the right-half-plane
zero toward higher frequencies, reducing its influence in the stability and allowing
relatively higher bandwidths. In interleaved boost converter, the effect of RHPZ is
reduced when compared to conventional boost converter. To connect more than two
converters in parallel, they could be synchronized in a staircase manner (for four converters,
each could have a 90°phase-shift drive signal).
Interleaved operation of two boost converter modules for battery discharge regulator,
delivering 5 kW output power has been reported in [3]. Passive soft switching is
incorporated aiming at higher efficiencies and is considered to be more effective only
at high power ratings of BDR.
Requirement of high power and high efficient BDRs with isolation makes full bridge
converter with soft switching circuits suitable for this application. A phase shifted full
bridge (PSFB) ZVS converter is used in [4] for BDR. A current doubler circuit is used
in secondary rather than a traditional center tapped transformer configuration to further
enhance the efficiency. As the PSFB ZVS converter behaves as a conventional buck
topology, the effect of RHPZ is absent in this converter. The phase shift introduces
inherent ZVS turn on for switches in one leg of the bridge. For the other leg, ZVS turn
7
on can be achieved by increasing leakage inductance of transformer, but has a negative
effect of losing the duty.
1.3.2 Control schemes
Voltage mode control is the well known and the simplest control scheme used to regulate
the output voltage of a DC-DC power converter. In this control scheme the duty of the
converter is controlled based on the error between the reference voltage and the fed
back output voltage of the converter. But the voltage mode control suffers from lower
bandwidths especially when applied for a boost converter because of the right half plane
zero effect.
Dynamic response of a DC-DC power converter can be improved by introducing

another control loop in addition to the aforementioned voltage loop. This loop is
inner current loop and this type of control scheme is called current-mode control. The
bandwidth of the inner current loop is designed to be much higher than the outer voltage
loop. The key idea is that, when the current loop is closed, the converter behaves as
an almost ideal current source. As the dynamics of the inductor are hidden within
the current loop, the overall behavior of the converter corresponds to a kind of first
order system. Hence, the it is much easier to close the outer voltage loop and the
bandwidth that can be achieved is much higher than with a voltage mode control system.
When converters are to be connected in parallel, current sharing is to be monitored; the
preferred approach to comply with this requirement is to provide the converter with
current regulation. Another advantage is over current protection inherent to the control
loop.
In current-mode control there are two types of control schemes, one is peak current-mode
control and the other is average current-mode control.
In peak current-mode control (PCMC), the peak current of the inductor is controlled
and follows the reference peak current set by the outer voltage loop. Peak current
information of the inductor can be obtained by sensing the switch current. But PCMC
has its own drawbacks of poor noise immunity, need for slope compensation to make it
stable for duties greater than 0.5 and peak-to-average current errors, which the inherently
8
low current loop gain cannot correct [25].
In average current-mode control(ACMC), the average input current of boost converter

is directly controlled. Average current mode control (ACMC) in PWM DC-DC and
AC-DC converters has found widespread applications in power factor correction circuits,
spacecraft electronics, and is beginning to receive much more attention in the literature.
ACMC introduces a high gain integrating current error amplifier into current loop.
So the gain-bandwidth characteristic of the current loop can be tailored for optimum
performance by the compensation network around the current amplifier. Even though
the PCMC is relatively faster, in ACMC the current loop bandwidth can be made
approximately the same as obtained by PCMC and also the gain will be much greater at
lower frequencies. Therefore compared with PCMC, ACMC has following advantages
1. Average current tracking is done with a high degree of accuracy. This is because of
increased low frequency current loop gain due to an additional integrator.
2. Slope compensation is not required
3. Noise immunity is excellent.
However, these advantages are received at the expense of an increased complexity in the
design and analysis. In ACMC, an inner current loop compensator is used as shown in
Fig. 1.5. The inner current loop turns the inductor into a voltage- controlled current
source, effectively removing the inductor from the outer voltage control loop at dc
and low frequency. The current loop gain splits the complex conjugate pole of the
output filter into two real poles, so that the characteristic of the output filter is set by the
capacitor and load resistor.
1.4 Thesis contributions
The major contributions of the thesis are:
• Design and implementation of average current-mode control for 2 kW interleaved

boost converter, is explained in Chapter 2.
• Improvement in load transient response of average current-mode controlled interleaved

boost converter is achieved, using the proposed combination of both auxiliary current
9
L D vo
vin Sw Co RL
Ki
R3 C3
Kv
C4
R4 R1 C1
Vd -
d +
- + C2
R2
iref -
+
comparator Vref
Current loop compensator
Voltage loop compensator
Figure 1.5: Average current-mode control of boost converter
pump module (ACPM) and load current injection circuit (LCIC). Detailed explanation
is presented in Chapters 3.
• A new isolated auxiliary current pump module has been proposed, which can
be used as a generic auxiliary module in conjunction with isolated or non-isolated
step-up/step-down DC-DC converters and is presented in Chapter 4.
1.5 Organization of thesis
This thesis is organized as follows.

Chapter 1 : This chapter begins with an introduction to space craft power subsystem.
The role of Battery Discharge Regulator(BDR) in the space craft power subsystem
is explained. The stringent steady state and dynamic requirements to be met by the
BDR with respect to space applications are shown. Literature survey on various power
converter topologies and control schemes for the BDR is discussed. Thesis objective
and scope is outlined in this chapter.
Chapter 2 : Analysis, modeling, design and implementation of average current-mode
controlled interleaved boost converter is presented. Small signal modeling approach
is used to develop an analytical model of the interleaved boost converter with average
10
current-mode control. Steady state and dynamic performance of the designed system is
evaluated.
Chapter 3 : Implementation of an auxiliary current pump module for improved load
transient response of 2 kW interleaved boost converter is explained. Simulation and
experimental results are presented in this chapter. The advantage of using auxiliary
current pump module is outlined.
Chapter 4 : A new auxiliary current injection pump module which can be used in
conjunction with isolated or non-isolated step-up/step-down DC-DC converter is presented.
Operation of the proposed module is explained.
Chapter 5 : presents the conclusions.
11
CHAPTER 2
Analysis, Modeling, Design and Implementation of

Average Current Mode Control for Interleaved Boost
Converter
2.1 Introduction
In high power applications, parallel operation of boost converters is recommended.

These paralleled boost converters can be operated in interleaved mode. Interleaved
mode of operation improves the steady state and dynamic performance of the system.
In this chapter, small signal modeling approach is used to develop an analytical model
for average current-mode controlled interleaved boost converter.
A boost converter is a conventional step up DC-DC power converter topology.

Although, it is well known for its simple construction, and higher conversion efficiencies,
the dynamic performance is poor due to the effect of right half plane zero (RHPZ) [24].
In addition to this, the converter requires a large output filter capacitor to maintain
low output voltage ripple at higher duty ratios as well as at higher load currents. At
high power levels parallel operation of boost converters offer modularity and reliability.
These paralleled converters can be operated in interleaved mode [3], where interleaving
is process of operating boost converters in parallel, with a phase shift between their gate
drive signals. The Phase shift between the gate drive signals is 360°/n, where n is the
number of converters connected in parallel. This process facilitate to increase the ripple
frequencies in both input current and output voltage. And also the ripple magnitudes
reduces significantly, which implies that a smaller output capacitor is sufficient to maintain
same amount of ripple in output voltage compared to its counterpart. Moreover, interleaving
has an additional advantage of having the right-half-plane zero toward higher frequencies,
reducing its influence in the stability and allowing relatively higher bandwidths. In
interleaved boost converter, the effect of RHPZ is reduced when compared to conventional
boost converter. To connect more than two converters in parallel, they could be synchronized
in a staircase manner (for four converters, each could have a 90°phase-shift drive signal).
2.2 Operation of Interleaved Boost Converter
iL1 L1 iD1 vo
D1
iL iD2
iL2 iCo io
L2 D2
vin Co RL
Sw2 Sw1
Figure 2.1: Interleaved boost converter
An interleaved boost converter is shown in Fig. 2.1, with two inductors L1 , L2 ,

with two switches Sw1 , Sw2 , with two diodes D1 , D2 , with load bus capacitance Co
and with load resistance RL . In Fig. 2.2 gate pulses vg1 , vg2 for switches Sw1 , Sw2
are shown, from where we can observe that the switching frequency and duty of the
gating pulse are same, but there is a 180° phase shift between both the signals. This
creates a 180° phase shift in the respective inductor currents iL1 , iL2 which can seen
from Fig. 2.2. The ripple frequency in the inductor currents iL1 , iL2 is same as the
frequency of the gate pulses given to switches Sw1 , Sw2 . The total input current of
the converter iL is sum of the two input inductor currents iL1 , iL2 . Assuming the two
inductors carries same amount of current, the iL magnitude is double the each inductor
current magnitude, the ripple frequency of the iL is also doubled due to the addition of
inductor currents iL1 , iL2 with a 180° phase shift. The ripple magnitude is also reduced
in the total input current iL . So, with the switching frequency fs , we can achieve ripple
frequency of 2fs , which minimizes the input filtering requirement.
In Fig.2.3 the effect of interleaving on capacitor current and voltage are shown.
The gate pulses for switches Sw1 , Sw2 , respective diode currents iD1 , iD2 are shown
in Fig. 2.3. The current through the capacitor iCo under the steady state is given by
iCo = iD1 + iD2 − io . The capacitor current is an ac current with double the switching
13
Figure 2.2: (From top) Input current iL , gating pulse vg1 for switch Sw1 , current iL1 through inductor
L1 , gating pulse vg2 for switch Sw2 , current iL2 through inductor L2 of interleaved boost
converter.
frequency fs . This results in voltage ripple across the capacitor with frequency of 2fs .
So the output voltage filtering capacitor requirement also comes down with interleaving
process.
2.3 Average Current Mode Control of Interleaved Boost

Converter
Current sharing in paralleled converters can be ensured by adopting current-mode control

techniques. Average current-mode control (ACMC) is well established and it has advantages
of achieving higher bandwidths when compared to voltage mode control [2]. Average
current-mode control is free from instability problems unlike peak current-mode control,
which requires slope compensation to make it stable at duty ratio D > 0.5. Steady state
gain and noise immunity are high in average current-mode control [25].
In this work, average current-mode control for interleaved boost converter is implemented.
14
Figure 2.3: (From top) Gating pulse vg1 for switch Sw1 , current iD1 through diode D1 , gating pulse
vg2 for switch Sw2 , current iD2 through diode D2 , current iCo through capacitor bank Co ,
voltage vCo across capacitor bank Co of interleaved boost converter.
A detailed analysis on modeling and controller design are presented. The structure
of interleaved boost converter with average current-mode control is shown in Fig.2.4.
Interleaved boost converter consists of two inductors L1 , L2 as shown in Fig. 2.4 and
their average currents IL1 , IL2 are controlled using two independent current loops,
whereas load voltage is regulated using outer voltage loop. Current reference to the
two inner current loops is fed by the outer voltage loop. The output voltage vo of the
converter is sensed and fed to a error amplifier, through a voltage sensing element,
which has a sensing gain of Kv . The error amplifier calculates the error between the
feed back voltage vf b and the reference voltage vref . This error is fed to the voltage loop
compensator which generates current reference for the inductor currents. This current
reference is tracked with the help of two inner current loops. Two independent current
loops are required to ensure equal current sharing between the two inductors. Even both
the switches in the converter are operated at same duty the average value of inductor
15
iL1 L1 iD1 vo
D1
iL iD2
iL2 iCo io
L2 D2
vin Co RL
Sw2 Sw1
KiL1 KiL2
iL2s Kv
HiL2(s)
iL1s
HiL1(s) vf b
iref
Hv (s) vref
Figure 2.4: Average current-mode control of interleaved boost converter with two inner
current loops and one outer voltage loop
currents iL1 , iL2 may not be equal due to the non idealities present in the converter.
Unequal on-state resistance of the switches Sw1 and Sw2 , unequal forward voltage
drop of diodes D1 and D2 can cause unequal voltages to be applied across the inductors,
which in turn causes inequality in their average currents. The average current of each
inductor is sensed by a current sensing element and fed to the inner current loops. Here
the current sensing gain is denoted as KiL1 for the loop consisting inductor L1 and as
KiL2 for the loop consisting inductor L2 . Therefore iL1s and iL2s are the sensed inductor
currents. The error between the sensed current and the current reference iref generated
by the outer voltage loop is fed to the current loop compensator. Two current loop
compensators HiL1 , HiL2 are required to control the two inductor currents individually.
Output of the each compensator is fed to a comparator, which compares it with a ramp
signal signal to generate on-off commands for the switches. The ramp signals which
are fed to two different comparators are phase shifted by 180°, so as to generate gate
drive signals for the switches Sw1 and Sw2 with a 180° phase shift between them.
16
2.4 Mathematical Modeling
The steps involved in mathematical modeling of average current-mode controlled interleaved

boost converter are explained in this section. State space averaging method is used to
obtain small signal model of the converter. The model is derived under the assumption
that all the converter elements are ideal. The block diagram representation of average
current-mode controlled interleaved boost converter is shown in Fig. 2.5.
T wo boost converters operating in
interleaved mode of operation
1 d1ˆ(s) L1 D1 iL1ˆ(s)
HiL1(s) iLˆ(s) iˆd (s)
Vm
vrefˆ(s) L2 D2 voˆ(s)
Hv (s) iL1sˆ(s) GidiL (s) Zo (s)
C R
d2ˆ(s)
Sw1 Sw2 iL2ˆ(s)
vf bˆ(s) 1
HiL2(s)
irefˆ(s) Vm
iL2sˆ(s)
KiL1
KiL2
Kv
vo : Output voltage 1/Vm : M odulator gain

vref : Ref erence voltage KiL1, KiL2, Kv : Sensing gains
vf b : F eedback voltage Hv (s) : V oltage loop compensator
iL1 : Inductor current(L1) HiL1 (s), HiL2 (s) : Current loop compensators
iL2 : Inductor current(L2) iL1s , iL2s : Sensed inductor currents
iref : Ref erence current id : Sum of diode currents (iD1 + iD2)
iL : T otal input current (iL1 + iL2) d1, d2 : duty cycles of Sw1 , Sw2
Figure 2.5: Block diagram representation of ACMC for interleaved boost converter
2.4.1 Open loop power stage transfer functions
Initial step is to model the converter in open loop to derive control to inductor current
transfer function, which is used to design the inner current loop compensator. The
state space averaging approach is used to model the converter in continuous conduction
mode of operation (CCM). The basic steps of state space averaging are writing the state
equations of the network and then averaging state vector matrices, this completes the
averaging. After the parameters of the converter are perturbed by introducing small ac
variations into them and then linearized about a quiescent operating point. This gives
17
vg1
Sw1 , D1 Sw2 , D1 t
vg2
0 t1 t2 t3 Ts t
D1 , D2 D 1 , D2
Figure 2.6: Gating pulse for Sw1 ,Sw2
the small signal model of the converter.

The state space equation of the converter is given by (2.1),
dx(t)
= An x(t) + Bn u(t) (2.1)
dt
Where x(t) is state vector matrix and is given (2.2), u(t) is the input vector defined as
vin (t) and n is the state.  
i (t)
 L1 
x(t) =  iL2 (t) (2.2)
 

 
vCo (t)
The gating pulses for the switches Sw1 ,Sw2 are shown in Fig. 2.6. The circuit
conditions during turn on condition of the switch Sw1 and diode D2 in the interval
0 < t < t1 , are shown in Fig. 2.7(a). The circuit conditions during turn on condition
of the switch D1 and diode D2 in the interval t1 < t < t2 , are shown in Fig. 2.7(b).
The circuit conditions during turn on condition of the switch Sw2 and diode D1 in the
interval t2 < t < t3 , are shown in Fig. 2.7(c). The circuit conditions during turn on
condition of the switch D1 and diode D2 in the interval t3 < t < Ts , are shown in Fig.
2.7(d)
The node equation in state 1(t0 < t < t1 ) can be expressed in the matrix form, is
18
iL1 L1 iD1 vo iL1 L1 iD1 vo
D1 D1
iL iD2 iL iD2
iL2 iCo io iL2 iCo io
vin L2 D2 L2 D2
Co RL vin Co RL
Sw2 Sw1 Sw2 Sw1
(a) State 1, during 0 < t < t1 (b) State 2, during t1 < t < t2
iL1 L1 iD1 vo iL1 L1 iD1 vo

D1 D1
iL iD2 iL iD2
iL2 iCo io iL2 iCo io
L2 D2 L2 D2
vin Co RL vin Co RL
Sw2 Sw1 Sw2 Sw1
(c) State 3, during t2 < t < t3 (d) State 4, during t3 < t < Ts
Figure 2.7: Circuit conditions of interleaved boost converter
given by equation (2.3).

      
1
iL1 (t) 0 0 0 i (t)
d      L1   L1 h i
 i (t) = 0 0 − L12   iL2 (t) + 1  vin (t) (2.3)
      
dt  L2      L2 
1
vo (t) 0 Co
− RL1Co vCo (t) 0
      
iL1 (t) 0 0 − L11 i (t) 1
d      L1   L1 h i
 i (t) = 0 0 − L12   iL2 (t) + 1  vin (t) (2.4)
      
dt  L2      L2 
1 1
vo (t) Co Co
− RL1Co vCo (t) 0
      
iL1 (t) 0 0 − L11 iL1 (t) 1
L1
d      
1
h i
 i (t) = 0 0 0   iL2 (t) +  vin (t) (2.5)
      
dt  L2      L2 
1
vo (t) Co
0 − RL1Co vCo (t) 0
19
The node equation in state 4(t3 < t < Ts ) can be expressed in the matrix form, is
      
iL1 (t) 0 0 − L11 i (t) 1
d      L1   L1 h i
 i (t) = 0 0 − L12   iL2 (t) + 1  vin (t) (2.6)
      
dt  L2      L2 
1 1
vo (t) Co Co
− RL1Co vCo (t) 0
     
0 0 0 0 0 − L11 0 0 − L11
     
A1 =  0 0 − L12  ; A2 = A4 =  0 0 − L12  ; A3 =  0 0 0
     

     
1
0 Co
− RL1Co 1
Co
1
Co
− RL1Co 1
Co
0 − RL1Co
(2.7)
 
1
 L1 
B1 = B2 = B3 = B4 = 
 1 
(2.8)
L2

 
0
The linear small signal dynamic model of the converter can be obtained using the
state space averaged theory. By ignoring the second order non linear terms the small
signal dynamic model of the converter is given by
dx̂(t) ˆ
= hAix̂(t) + hBiû(t) + {(Ad )X + (Bd )U}d(t) (2.9)
dt
W here hAi = A1 D1 + A2 D2 + A3 D3 + A4 D4 (2.10)
hBi = B1 D1 + B2 D2 + B3 D3 + B4 D4 (2.11)
Ad = A1 + A3 − A2 − A4 (2.12)
Bd = B1 + B3 − B2 − B4 (2.13)
For simplified analysis it is assumed that
D1 = D3 ; D2 = D4
W here, D1 + D2 + D3 + D4 = 1 andD ‘ = 1 − D
20
Using equations (2.21) and (2.11), the averaged matrices hAi and hBi are given by
   
0 0 − (1−D)
L1
1
L1
   
(1−D) 1
hAi =  0 0 − L2  ; hBi =  (2.14)
   
L2

   
(1−D) (1−D)
Co Co
− RL1Co 0
Using equations (2.12) and (2.25), the matrices Ad and Bd are given by
   
0 0 − L11 0
   
Ad =  0 0 − L12  ; Bd =  0  (2.15)
   
   
1 1
Co Co
0 0
Using the obtained matrices hAi, hBi, Ad and Bd , given by (2.14) and (2.15), the
vectors in (2.20) are expressed in scalar form as follows:
dîL1 (t) ′
ˆ
L1 = v̂g (t) − D v̂o (t) + Vo d(t) (2.16)
dt
dîL2 (t) ′
ˆ
L2 = v̂g (t) − D v̂o (t) + Vo d(t) (2.17)
dt
dv̂Co (t) ′ v̂o (t) ˆ
Co = D [îL1 (t) + îL2 (t)] − − [IL1 + IL2 ]d(t) (2.18)
dt RL
Using the equation given by (2.16), (2.17), (2.18) the small signal model of the converter
is developed and is shown in the Fig. 2.8. The duty ratio to total input current transfer
îL1 (s) L1 ′
D :1
+
îL (s) Co RL
ˆ
Vo d(s)
îL2 (s) L2
v̂g (s) v̂o (s)
ˆ
IL d(s)
−
Figure 2.8: Small signal ac equivalent circuit model of ideal interleaved boost converter
function is given by
iˆL (s) Vo [2 + sRL Co ]

GiL d (s) = = (2.19)
ˆ
d(s) RL (1 − D)2 1 + s (L1 //L2 )
+ s2 (L(1−D)
1 //L2 )Co
RL (1−D)2 2
21
The combined duty to input current (iL1 +iL2 ) transfer function is obtained as:
iˆL (s) ˆ (s) + iL2

iL1 ˆ (s)
= ; dˆ = dˆ1 = dˆ2 (2.20)
ˆ
d(s) ˆ
d(s)
ˆ (s) iL2
iL1 ˆ (s)
= + (2.21)
dˆ1 (s) dˆ2 (s)
The duty ratio to individual inductor current transfer function is given by
ˆ (s)
iLx Vo [2 + sRL Co ]
GiLx dx (s) = = (2.22)
dˆx (s) 2RL (1 − D)2 1 + s (L1 //L2 )
RL (1−D)2
+ s2 (L(1−D)
1 //L2 )Co
2
The duty ratio to output voltage transfer function is given by
vô (s) Vo [1 − s R(LL (1−D)

1 //L2 )
2]
Gvo d (s) = = (2.23)
ˆ
d(s) (1 − D) 1 + s (L1 //L2 )2 + s2 (L1 //L2 )C
2
o
RL (1−D) (1−D)
The total input current to output voltage transfer function is given by
vô (s) Gvo d (s) RL (1 − D)[1 − s R(LL 1(1−D)

//L2 )
2]
Gvo iL (s) = = = (2.24)
iˆL (s) GiL d (s) 2 + sRL Co

L1 D1 ˆ
iL1
dˆ1
L2 D2
iˆL
C R
Sw1 Sw2 ˆ
dˆ2 iL2
Figure 2.9: Block diagram representation of interleaved boost converter
The block diagram representation of interleaved boost converter in open loop in

shown in Fig. 2.9. The obtained transfer function (2.19) is similar to duty to inductor
current transfer function of conventional boost converter. It can be observed that the
effective inductance is reduced to half. The reduced effective inductance results in
occurrence of right half plane zero at higher frequencies compared to conventional boost
converter. This ensures that higher bandwidths can be achieved in an interleaved boost
22
converter compare to its counterpart. The derived transfer functions are exploited to
design the inner current loop controller. The controller design aspects are explained
subsequently.
2.4.2 Closed current loop transfer functions
The inner current loop block diagram is shown in Fig. 2.10. The loop gain of the inner
îl
current loop with the current compensator is given by îref
.

L1 D1 ˆ
iL1
1 dˆ1
HiL1(s)
Vm
L2 D2
ˆ ˆ
iL1s iˆL
iref C R
Sw1 Sw2 ˆ
iL2
1 dˆ2
HiL2(s)
Vm
ˆ
iL2s
KiL1
KiL2
ˆ to iˆL .
The interleaved boost converter with closed current loop is modeled as iref
This transfer function can be viewed as sum of individual transfer functions:
iˆL (s) ˆ (s)

iL1 ˆ (s)
iL2
= + (2.25)
ˆ (s)
iref ˆ (s) iref
iref ˆ (s)
ˆ (s)
iLx 1
ˆ (s)
iLx dˆx (s)
· HiLx (s) · Vm
W here, = (2.26)
ˆ (s)
iref 1+
ˆ (s)
iLx
· HiLx (s) · KiLx · 1
dˆx (s) Vm
1 TiLx (s)
= · x : 1, 2 (2.27)
KiLx 1 + TiLx (s)
ˆ
Here TiLx = ( idL1 (s) 1
ˆ (s) · HiLx · KiLx · Vm ) is individual current loop gain. Substituting (2.17)
1
23
in (2.25) results
iˆL (s) 1 2 · TiLx (s)

= · (2.28)
ˆ (s)
iref KiLx 1 + TiLx (s)

L1 D1 ˆ
iL1
1 dˆ1
HiL1(s)
Vm
L2 D2 iˆL iˆd vô
ˆ ˆ
iL1s GidiL (s) Zo (s)
iref C R
Sw1 Sw2 ˆ
iL2
1 dˆ2
HiL2(s)
Vm
ˆ
iL2s
KiL1
KiL2
The block diagram representation of interleaved boost converter with current loop
closed in shown in Fig. 2.11. At low frequencies the controller is designed such that the
individual loop gain is high (TiL1 ≫ 1). Therefore at steady state the total input current
IL is double the Iref , if sensing gain (KiLx ) is unity. Once the current loop is closed,
ˆ (s) and can be derived as:
the system transfer function will be vô (s)/iref
vô (s) vô (s) iˆL (s)

= · (2.29)
ˆ
iref (s) iˆL (s) ˆ (s)
iref
vô (s) iˆd (s) iˆL (s)
= · · (2.30)
iˆd (s) iˆL (s) ˆ (s)
iref
In (2.29), the first term of R.H.S is decomposed into product of current gain transfer
function (GidiL (s)) & impedance transfer function (Zo (s)) and the second term of R.H.S
is derived in (2.18) .
îd (s) IL
W here, GidiL (s) = = (1 − D) − ; (2.31)
îL (s) ˆ
iˆL (s)/d(s)
vô (s) R
Zo (s) = = (2.32)
iˆd (s) 1 + SCR
The GidiL (s) transfer function features the occurrence of right half plane zero. This
24
implies, if there is a step increment in IL , Id fails to follow initially as it droops and
then start increasing. Thereby, this inherent delay in response can be seen as effect of
right half plane zero.
2.4.3 Closed voltage loop transfer functions
v̂o
For designing the Hv voltage compensator, we should derive îref
v̂o îdiode
= × Zo (2.33)
îref îref
1
Zo = Ro // (2.34)
SC
îdiode îL îdiode
= × (2.35)
îref îref îL
îdiode îL
= × Gidil (2.36)
îref îref
= Gilvc × Gidil
To find Gidil in the boost converter the average diode current is given by
hID i = IL (1 − D) (2.37)
Introducing small AC variations
ˆ
(ID + îd ) = (IL + iL )(D ′ − d) (2.38)
îd = îL (1 − D) − IL dˆ (2.39)
îd IL
= (1 − D) − (2.40)
îL Gild
25
we know that,
îdiode îL îdiode
= × (2.41)
îref îref îL
Sub Eqn.2.40 in Eqn.2.41
IL
Gidvc = Gilvc ((1 − D) − ) (2.42)
Gild
Sub Eqn.2.42 in Eqn.2.33
v̂o IL 1
= Gilvc ((1 − D) − ) × (Ro // ) (2.43)
îref Gild SC
v̂o Ro
= Gidvc (2.44)
îref 1 + SCo Ro
Total loop gain is

v̂o
TV = KV H V (2.45)
îref
Ro
TV = KV HV Gidvc (2.46)
1 + SRo Co
Finally, the total system transfer function (vô (s)/vref

ˆ (s)) with both current loop and
voltage loop been closed (as shown in Fig. 2.5) can be obtained as:
vô (s) ˆ (s)) · Hv (s)

(vô (s)/iref 1 Tv (s)
= = · (2.47)
vref
ˆ (s) ˆ (s)) · Hv (s) · Kv
1 + (vô (s)/iref Kv 1 + Tv (s)
where (voˆ(s)/iref
ˆ (s)) is given in (2.29), Tv (s)= ((vô (s)/iref
ˆ (s)) · Hv (s) · Kv ) is total
voltage loop gain.
2.5 Controller Design
The control structure for ACMC of interleaved boost converter shown in Fig. 2.4
consists of two current loop controllers (HiL1 (s), HiL2 (s)) and one voltage loop controller
(Hv (s)). All the three controllers are implemented using op-amps (shown in Fig. 2.12)
and they perform error amplification, averaging and integration. The output of the two
current loop controllers are modulated with two 180° phase shifted ramp signals in order
26
to generate gate drive signals for both the switches. Inner current loop controllers are
designed based on the iLxˆ (s)/dˆx (s) transfer function, whereas the outer voltage loop
controller is designed based on voˆ(s)/iref

ˆ (s) transfer function.
Current Loop Controller 1

IL1 KiL1
Ri1 Ci1 Vout
Cif Ri1
-
- +
+
Kv
Ri1
Gating to Sw1 Ri2 Rv1 Cv1
Cif
Ci1 Cvf Rv1
Iref -
+
Rv1
IL2 KiL2
Cvf Rv2 Vref
Ri1 Ci1
Cv1
Cif Ri1
-
- +
+
Ri1
Gating to Sw2 Ri2 Voltage Loop Controller

Cif
Ci1
Current Loop Controller 2
Figure 2.12: Implementation of current and voltage loop controllers
Table 2.1: Design parameters of 2 kW interleaved boost converter

1 Input Voltage,Vin Min:45-68 V
2 Output Voltage,Vo 70 V
3 Output Power,Po 2000 W
4 Switching Frequency,(fs ) 100 kHz
5 Inductors,L1 , L2 20 µH
6 Capacitor,Co 540 µF
7 Load Resistor,R 2.45 ohms
8 Duty ratio(D) 0.028-0.357
For stable operation, the converter bandwidth is maintained much lesser than right
half plane zero frequency that is 8.5 kHz at duty ratio D = 0.357. The right half plane
zero frequency is calculated using:
R(1 − D)2 Lx
fRHP Z = where Lef f = (2.48)
2πLef f 2
The current loop controller is designed such that individual current loop bandwidth
would be at 21 kHz. The frequency response of the inner current loop controller is
shown in Fig. 2.14(a). To avoid subharmonic oscillations the inner current loop gain
cross over frequency is limited to fs /6 i.e; 16 kHz. According to (2.27), the the gain
27
(a) Duty d to individual inductor current iLx (b) Duty d to total input current iL
(c) Duty d to output voltage vo (d) total input current iL to to output voltage vo
Figure 2.13: Analytical frequency response characteristics
cross over frequency of iˆL (s)/iref

ˆ (s) transfer function is double the individual current
loop bandwidth which happens to be at 42 kHz. The bode plot for the iˆL (s)/iref
ˆ (s)
is shown in Fig. 2.14(c). From the Fig. 2.14(c) it can be observed that the gain at
2
low frequencies is 6.93 dB i.e 20log KiLx . With the current loop closed the system
(voˆ(s)/iref
ˆ (s)) would behave as a over damped system with two real poles and this also
can be observed from the Fig. 2.14(d). Now, the voltage loop controller is designed
such that the bandwidth of the total system is at 3.2 kHz. The frequency response of the
designed outer voltage loop controller is shown in Fig. 2.15(a). The Fig. 2.15(b) shows
the total loop gain, in which it can be identify that the total bandwidth of the converter
would be 3.2 kHz, gain margin and phase margins are 13 dB and 53° respectively.
Finally, the bode plot for Tv /(1 + Tv ) is shown in Fig. 2.15(c) and it reveals that the
gain at lower frequencies would be at 0 dB as Tv ≫1.
28
(a) Inner current loop controller (b) Total current loop gain
(c) iref to total input current iL (d) iref to Output voltage vo
The current compensator transfer function is given by
S
Kc (1 + ωz
)
Hc (s) = S
(2.49)
S(1 + ωp
)
where
1
Kc = (2.50)
Rl (Cf p + Cf z )
1
ωz = (2.51)
Rf Cf z
Cf z + Cf p
ωp = (2.52)
Rf Cf z Cf p
29
(a) Outer Voltage loop controller (b) Voltage loop gain
(c) Reference voltage vref to Feed back voltage

vo
2.6 Small signal model validation of average current-mode

controlled interleaved boost converter
In this section, the controller is designed for an interleaved boost converter with operating
parameters specified in the Table-4.1. The frequency response characteristics of the
designed converter are measured practically using AP Instruments(Model 300) frequency
response analyzer and are compared with analytical plots obtained from MATLAB. The
frequency response plots for reference current iref to total input current itotal , reference
current iref to output voltage vo and reference voltage vref to output voltage vo transfer
functions are plotted and verified by Analytical and experimental. Network analyser
is used to obtain the experimental frequency response of the converter. The obtained
30
results are compared with the analytical plots derived from MATLAB. The results are
shown in Fig. 2.16
(a) iref to itotal (b) iref to vo
(c) vref to vo
Figure 2.16: Analytical and experimental frequency response characteristics of 2 kW interleaved boost
converter
2.7 Hardware Implementation
In Fig. ??, the hardware prototype of 2000 W interleaved boost converter with average
current-mode controller is shown. In which, two 1000 W boost converters are made to
operate in interleaved mode to achieve 2000 W. Each boost converter consists of a 20
µH toroidal core inductor, a MOSFET (IRFP4427PbF) and a diode (60APU02PbF).
All the power devices are mounted on the heat sink which is shown in Fig. 2.19.
At the output, to realize required capacitance (540µF), nine 60 µF, 300 V MKP low
31
O/P 1 Master
Gating pulse O/P 1
Slave 1 WIRED OR
Driver IC to SW1
SG3524
Modulator
O/P 2 MIC4424 Master
Current IC O/P 2
Controller 1 fclk= 2 * f sw
O/P
AND Gate IC Slave 1
’OR’ed O/P
Master IC O/P 1
Slave 2
SG3524
’OR’ed O/P
fclk= 2 * f sw O/P 2
HEF4081 Gating
for Sw1
O/P 1 Gating pulse
Slave 2
to SW2
SG3524 Gating
Driver IC for Sw2
Modulator
IC O/P 2 MIC4424
Current
Controller 2 fclk= 2 * f sw WIRED OR 0 Ts / Ts
O/P 2
(a) Block diagram of PWM circuit (b) Gating pulses
Figure 2.17: Block diagram of PWM circuit and Gating pulses
ESR capacitors are connected in parallel. MOSFET and diode currents are sensed
using current transformers (CS4200V-01L). The sensed outputs are added to obtain
the inductor current [32]. The experimental setup is shown in Fig. 2.20.
Average current-mode controller is realized using three OPA606 op-amps, three

SG3524 modulator ICs, two MIC4424 driver ICs and one HEF4081BP AND gate IC.
In this work, two 180° phase shifted gate drive signals are derived using the PWM
circuit shown in Fig. 2.17(a). This PWM circuit has one master, two slave modulator
ICs and are synchronized to operate at same clock frequency. The master IC decides the
maximum duty of the gating pulses and slave ICs derives the actual duty cycle for the
MOSFETs. As per the designed specifications of the converter, the operating duty is in
the range of 0 to 50%. So, the master IC in the PWM circuit is configured to operate at
50% duty cycle as shown in first and second trace of Fig. 2.17(b). The third and fourth
traces of Fig. 2.17(b) shows the wired OR o/p of slave-1 and slave-2 ICs respectively.
The master IC outputs and ’OR’ed outputs of slave ICs are ’AND’ed to derive the actual
gating pulses shown in fifth and sixth traces of Fig. 2.17(b).
The experimentally obtained phase shifted gate drive signals are shown in Fig.
?? (trace 3,4), trace-1 and trace-2 shows the total input current and capacitor current
receptively. It can be observed from Fig. ?? the ripple frequencies of total input current
and output capacitor currents are double that of switching frequency.
32
Figure 2.18: trace 1: Input current (Y-axis scale: 2 A/div), trace 2: Capacitor current (Y-axis scale:
5 A/div), trace 3,4: Gating pulses for Sw1 , Sw2 respectively (Y-axis scale: 10 V/div).
X-axis scale: 4µs
2.8 Steady state results
For the designed converter, it is observed that the line regulation is 0.4% at rated load
of 2000 W. The load regulation is 0.6% at nominal input voltage of 56.5 V where load
is varied from 10% to 100%. Efficiency of converter is 94% at nominal input voltage
of 56.5 V, rated load condition of 2000 W.The steady state results for the designed
converter are shown in Fig. 2.24.
2.9 Steady state performance evaluation of converter in

closed loop
The steady state performance of converter is evaluated after closing the loop. Performance
parameters like Line regulation, Load Regulation and efficiency of the converter are
tested and tabulated below. Line regulation of the designed 2 kW average current mode
controlled interleaved boost converter is observed at rated load condition of 2000 W.
Table.2.2 shows the variation in the output voltage, for the variation in input voltage
from 52 V to 68 V. It is observed that the load regulation is 0.17%. Load regulation
of the designed 2 kW average current mode controlled interleaved boost converter is
observed at a nominal input voltage level of 56.5 V. Table.2.3 shows the variation in the
33
Figure 2.19: 2 kW interleaved boost converter
Figure 2.20: Experimental setup for testing 2 kW interleaved boost converter
34
(a) trace 1,4: Gating pulses for Sw1 , Sw2 respectively (Y-axis scale: 10 V/div), (b) trace 1,4: Gating pulses for Sw1 , Sw2 respectively (Y-axis scale: 20 V/div),
trace 2,3: Inductors Current IL1 ,IL2 (Y-axis scale: 5 A/div), X-axis scale: 10µs trace 2,3: Drain Source Voltage for Sw1 , Sw2 respectively (Y-axis scale: 50
V/div), X-axis scale: 10µs
(c) trace 1:Output Voltage (Y-axis scale: 50 V/div), trace 2:Input Voltage (Y-axis
scale: 50 V/div), trace 3:Gating pulse for Sw1 (Y-axis scale: 10 V/div), trace 4:
Input Current Iin (Y-axis scale: 20 A/div), X-axis scale: 4µs
Figure 2.21: Experimentally observed steady state results of 2 kW interleaved boost converter
Output power (W) Input Voltage (V) Output Voltage (V)

2000 52 70.05
2000 54 70.02
2000 57 70.00
2000 60 69.99
2000 63 69.97
2000 65 69.95
2000 68 69.93
Table 2.2: Line regulation
output voltage, for the variation in load from 100% to 10%. It is observed that the load
regulation is 0.45%. Table.2.4 shows the efficiency of the designed 2 kW interleaved
35
Percentage of Loading(%) Output power (W) Output Voltage (V)
100 2000 69.98
76.75 1535 70.07
48.63 972.6 70.16
27.96 559.3 70.24
10.05 201 70.29
Table 2.3: Load regulation
Percentage of Loading(%) Output power (W) Efficiency(%)

10.2 204.1 93.18
20.32 406.5 94.54
30.31 606.3 95.13
40.39 807.9 95.23
50.48 1009.6 95
60.07 1201.4 94.71
71.1 1422 94.29
81.05 1621 93.94
91.7 1834.1 93.63
99.84 1996.9 93.30
102.88 2057.7 93.17
Table 2.4: Efficiency
boost converter, for the variation in load from 100% to 10%. Efficiency of converter is
93.3 % at nominal input voltage of 56.5 V, rated load condition of 2000 W. Efficiency
of the converter is plotted against the output power, at different input voltages and is
shown in Fig. 2.22.
2.10 Transient response of the converter in closed loop
The 2000 W interleaved boost converter with average current-mode controller is simulated
in saber simulation software, in order to verify the design aspects of the controller. The
simulated results of interleaved boost converter for 50% step change in load are shown
in Fig. 2.23. The transient response of the converter at nominal input voltage of 56.5
V for a 50% step change in load. It is observed that the peak over shoot (Fig. 2.23) is
3.7% (i.e 2.62 V) and settling time is 570 µs. Fig. 2.24 shows the transient response
of the converter at nominal input voltage of 56.5 V for a 50% step change in load. It is
36
Figure 2.22: Efficiency of 2 kW interleaved boost converter at different input voltages
Figure 2.23: Transient response of Vo due to step change in Iload in a 500 W interleaved
boost converter
observed that the peak over shoot (Fig. 2.24(a)) and peak under shoot (Fig. 2.24(b)) is
4% (i.e 3 V) and settling time is 523 µs, which are at acceptable levels.
2.11 Conclusion
The power stage transfer functions of interleaved boost converter are developed, which
are necessary to implement average current-mode control. Two inner current loop
controllers and one outer voltage loop controller are designed and implemented. A 500
W interleaved boost converter is built and tested with average current-mode control.
37
(a) Transient response of Vo due to step change in (b) Transient response of Vo due to step change in
load current from 26 A to 12 A. Upper trace is Vo load current from 12 A to 26 A. Upper trace is Vo
and lower trace is Iload . Horizontal scale is 200 and lower trace is Iload . Horizontal scale is 200
µs/div. Vertical scale for upper trace is 10 V/div µs/div. Vertical scale for upper trace is 10 V/div
and for lower trace is 10 A/div. and for lower trace is 10 A/div.
Figure 2.24: Experimentally observed transient response of 2 kW interleaved boost converter
Table 2.5: Performance of developed 2 kW BDR module
Sl.No Parameter Observation

1 Efficiency@56.5 V, 2000 W 93.30%
2 Line Regulation 0.17%
3 Load Regulation 0.44%
4 Peak under shoot & settling time for 50% step increase in load 3% & 523 us
38
The experimental results are in close agreement with analytical model.
39
CHAPTER 3
An Auxiliary Current Pump Module for Improved Load

Transient Response of Battery Discharge Regulator
3.1 Introduction
An Auxiliary Current Pump Module (ACPM) is used in conjunction with interleaved

boost converter to improve the load transient response. ACPM is a low power, bidirectional
converter with source and load voltages clamped to those of main converter. ACPM
comes into operation during load transients to support the output capacitor by sourcing/sinking
extra current required to mitigate the output voltage deviation. Therefore, the deviation
in the output voltage during load transients is alleviated with the help of this auxiliary
circuit. As the error seen by the voltage controller in the main converter is less, the rate
at which current reference increases is very less and it takes more time for input current
to meet the new load current demand. Therefore the auxiliary circuit needs to be in
operation for more time, supporting the output capacitor.
3.2 Operation of Auxiliary Current Pump Module
The developed auxiliary current pump module is shown in Fig. 3.2(a). ACPM is a
bidirectional converter with source and load voltages clamped to those of main converter
LOAD BU S ia
CAP ACIT AN CE
ST EP − UP/
iload Auxiliary
ST EP − DOW N L current
O
DC − DC pump
A
CONV ERT ER module
D
current
ref erence
generator
Figure 3.1: Basic structure of auxiliary current injection technique

as shown in Fig. 3.2(b). Developed ACPM can be used in conjunction with non-isolated
step-up DC-DC converters. It has an inductor La , two MOSFETS S1a , S2a with anti
parallel body diodes D1a , D2a respectively. Hysteresis current mode control is implemented
for controlling the current injected by the auxiliary current pump module. For a step
increase and step decrease of load, the operation of ACPM during sourcing and sinking
mode respectively is explained in this section.
MAIN DC−DC
CONVERTER
(STEP UP CONVERTER)
+ Co RL
vin +
D2a vo
iLa −
La D2a
−
iload
La S2a iLa S
1a
S 2a
D1a
vin S1a D1a vo
Hysteresis Current Current Reference

Mode Controller Generator
i Laref
(a) Auxiliary current pump module (b) Auxiliary current pump module operating in
parallel with main converter
Figure 3.2: Auxiliary current pump module
3.2.1 ACPM for source mode of operation
For a step increase in the load, the auxiliary circuit is designed to inject additional
current into the load point to minimize the undershoot in the output voltage. The
reference generator monitors the load current and appropriately generates a positive
current reference. The operation of the ACPM while tracking the positive current
reference is explained in this section. In source mode, the auxiliary converter operates
similar to the boost converter. In this mode, the power transfer is from vin to vo ; the
devices S1a , D2a are operated.
Interval 1 (t0 < t < t1 ) The circuit conditions in this interval are shown in Fig.
3.3(a). The key waveforms of ACPM acting in conjunction with main converter (Fig.
3.2(b)) during the source mode of operation are shown in Fig. 3.3(c). At the time instant
t0 , for a step increase in the load, the output voltage starts drooping. As the current
reference (iLaref (t)) generated for ACPM will be positive at this condition, switch S1a
is turned on. Then the auxiliary inductor (iLa (t)) current increases with a slope of
41
D2a
La iload (t)
iLa
t
+ vLa − vo (t)
S2a
vin vo
S1a D1a
iLaref (t) t
iLa (t)
(a) Interval t0 < t1

D2a vg,s1a (t) t
iLa La
+ vLa − vLa (t) t

S2a
vin vo
S1a D1a
t0 t1 t2 tend
(b) Interval t1 < t2
(c)
Figure 3.3: Circuit conditions and key waveforms of auxiliary current pump module
switch S1a , voltage across the inductor
vin (t)
La .
Interval 2 (t1 < t < t2 ) The instant t1 , at which iLa (t) reaches the the upper limit
above iLaref (t), the switch S1a is turned off. The diode D2a comes into conduction.
v (t)
iLa (t) reduces with a slope of La La , where vLa (t) is voltage across the inductor and is
equal to [vin (t) − vo (t)]. The circuit conditions in this interval are shown in Fig. 3.3(b).
The intervals 1 and 2 repeats till the instant tend at which, the output voltage recovers
and the iLaref (t) reaches zero.
3.2.2 ACPM for sink mode of operation
For a step decrease in the load, the auxiliary current pump module is designed to
draw additional current from the load point to minimize the overshoot in the output
voltage. The reference generator monitors the load current and appropriately generates
a negative current reference. In source mode, the auxiliary converter operates similar to
the buck converter. In this mode, the power transfer is from vo to vin ; devices S2a , D1a
are operated. The operation of the ACPM while tracking the negative current reference
is explained in this section.
42
iload (t)
D2a
iLa La
t
vout (t)
+ vLa −
S2a
vin vo
S1a D1a
iLaref (t) t
iLa (t) t
D2a vg,s2a (t)

iLa La
+ vLa − t
vLa (t)
S2a
vin vo
S1a D1a
t0 t1t2 tend
(b) Interval t1 < t2 (c)
operating in parallel with main converter for sink mode of operation, during
a step decrease in load. (From top) Load current, output voltage, current
reference for ACPM, auxiliary inductor current, gating pulse for switch S2a ,
voltage across the inductor
Interval 1 (t0 < t < t1 ) The circuit conditions in this interval are shown in
Fig. 3.4(a). The key waveforms of ACPM acting in conjunction with main converter
(Fig. 3.2(b)) during the sink mode of operation are shown in Fig. 3.4(c). At the time
instant t0 , for a step decrease in the load, an overshoot in the output voltage starts. As
the current reference iLaref (t) generated for ACPM will be negative at this condition,
switch S2a is turned on. Then the auxiliary inductor current increases with a slope of
vLa (t)
La , where vLa (t) is voltage across the inductor and is equal to [vin (t) − vo (t)] in
the negative direction.
Interval 2 (t1 < t < t2 ) At the instant t1 , iLa (t) reaches the the upper limit above
iLaref (t), then the S2a is turned off. The diode D1a comes into conduction. Then iLa (t)
v (t)
reduces with a slope of in La . With diode D1a coming into conduction, the energy
stored in the inductor La transfers to input. The circuit conditions in this interval are
shown in Fig. 3.4(b).
43
3.3 Operation of ACPM in conjunction with interleaved
boost converter
In Fig. 3.5, an interleaved boost converter operating along with the developed ACPM
is shown. Operation of ACPM is explained in section 3.2. Auxiliary current pump
module comes into operation during load transients to support the output capacitor by
sourcing/sinking extra current required to maintain the output voltage. Therefore the
deviation in the output voltage is alleviated with the help of this auxiliary circuit. As
the error seen by the voltage controller in the main converter is less, the rate at which
current reference increases is very less and it takes more time for input current to meet
the new load current demand. Therefore the auxiliary circuit needs to be in operation for
more time. To compensate the effect of ACPM on ACMC interleaved boost converter a
control scheme is proposed and explained in subsequent subsection.
L1 i L1 D1
vfb
L2 i L2 D2
S S2
1
+ Co RL
vin Average Current vref

+
Mode Controller
vo
−
La D2a
−
iload
iLa S
1a
S 2a
D1a

i Laref
Figure 3.5: Auxiliary current pump module operating in parallel with interleaved boost
converter
3.4 Average current mode controlled interleaved boost

converter with load current injection circuit
During the load transients, the power balance between the input and output is disturbed,
which in turn results in discharging or overcharging of output capacitor momentarily.
This effect is seen as undershoot or overshoot in the output voltage. The power balance
44
will be resorted when the voltage controller takes action to alter the input current
reference, thereby changing the input power drawn. But, due to the effect of ACPM
on ACMC interleaved boost converter the input reference will not change faster.
To eliminate the effect of the injected auxiliary current on the operation of main
converter, the input current reference must be changed faster in accordance to the
change in the load current. This can be achieved by adding a load current injection loop
which is a faster parallel path to the outer voltage controller loop [30]-[31]. Interleaved
boost converter with load current injection loop is shown in Fig. 3.6. Load current
injection loop helps to change the current reference faster during the load transients.
This effect is depicted in Fig. 3.7. The deviation in the output voltage for a step change
in load is more without enabling LCIC and ACPM as shown in Fig. 3.7. Enabling
only ACPM reduces the deviation in the output voltage, but it takes more time to settle
down. By enabling both the LCIC and ACPM, the deviation and settling time are less
as shown in Fig. 3.7.
L1 iL1 vo
D1
+ iin +
io iLa
vin L2 iL2 D2
Sw2 Sw1
− Co RL
−
ACP M
KiL1 KiL2 LCIC

iL2s Kv
HiL2(s)
iL1s K ∗ io
HiL1(s) vf b
iref
Hv (s) vref
ACMC
Figure 3.6: Average current-mode control of interleaved boost converter with LCIC &
ACPM
3.5 Design and Implementation
This section explains the design and implementation of interleaved boost converter,
average current mode controller, load current injection circuit, auxiliary current pump
module and hysteresis current mode controller.
45
Load
current
io (t)
Output
voltage t
Enabling both LCIC and ACP M
vo (t)
Enabling only ACP M
W ithout LCIC and ACP M
Input
current t
iin (t)
Auxiliary t
current
iLa (t)
Figure 3.7: Key waveforms of interleaved boost converter operating in conjunction with
ACPM, during step change in load. (From top) Load current, output voltage,
input current, auxiliary inductor current.

interleaved mode
1 d1ˆ(s) L1 D1 iL1ˆ(s)
ˆ (s)
ˆ (s) i′ ref HiL1(s) iLˆ(s) ˆ
id (s)
vref
ˆ (s) iref Vm
Hv (s) L2 D2 voˆ(s)
iL1sˆ(s) GidiL (s) Zo (s)
Co
Sw1 Sw2 ˆ (s)
vˆf b(s) 1 d2ˆ(s) RL iL2
HiL2(s)
Vm vo : Output voltage
vref : Ref erence voltage
ˆ (s)
iL2s vf b : F eedback voltage
iL1 : Inductor current(L1 )
KiL1 iL2 : Inductor current(L2 )
iref : Ref erence current
iL : T otal input current(iL1 + iL2 )
KiL2 iL1s , iL2s : Sensed inductor currents
id : Sum of diode currents(D1 , D2 )
d1 , d2 : duty cycles of Sw1 , Sw2
KiL1 , KiL2 , Kv : Sensing gains 1/Vm : Modulator gain
K/R
Load current injection loop
Hv (s) : V oltage loop compensator
HiL1 (s), HiL2(s) : Current loop compensators
Kv
Figure 3.8: Block diagram representation of ACMC for interleaved boost converter with
LCIC
3.5.1 Design of Interleaved Boost Converter and Average current

mode controller
Design of the interleaved boost converter and average current mode controller is presented
in chapter 2 .
46
3.5.2 Design of Load Current Injection Circuit
The block diagram representation of average current-mode controlled interleaved boost

converter with LCIC is shown in Fig. 3.8. Inclusion of load current injection circuit
improves the dynamic performance of the converter. If the load current is independent
of the output voltage then using the load current information for control can be treated as
feed forward control. The term load current injection is more preferred than load current
feed forward, if the load is a resistive load i.e load current is a function of output voltage.
In this case positive feed back is introduced due to addition of Kio term to the current
reference generated by voltage controller. This can cause instability in the system.
Instability can be avoided by proper design of the gain term ’K’. Transfer functions are
derived for the average current mode controlled interleaved boost converter with LCIC
to find the limit on value of K, for stable operation of the converter. The duty ratio to
total input current transfer function is given by
iˆL (s) Vo [2 + sRL Co ]

GiL d (s) = = (3.1)
ˆ
d(s) RL (1 − D)2 1 + s (L1 //L2 )
+ s2 (L(1−D)
1 //L2 )Co
RL (1−D)2 2
The duty ratio to output voltage transfer function is given by
vô (s) Vo [1 − s R(LL (1−D)

1 //L2 )
2]
Gvo d (s) = = (3.2)
ˆ
d(s) (1 − D) 1 + s 1 2 2 + s2 1 //L2 )C
(L //L ) (L
2
o
RL (1−D) (1−D)
The total input current to output voltage transfer function is given by
vô (s) Gvo d (s) RL (1 − D)[1 − s R(LL 1(1−D)

//L2 )
2]
Gvo iL (s) = = = (3.3)
iˆL (s) GiL d (s) 2 + sRL Co
Assuming the right half plane zero to be at higher frequency the input current to
output voltage transfer function can be approximated by
RL (1 − D)
Gvo iL (s) ≈ (3.4)
2 + sRL Co
vô (s) vô (s) iˆL (s)

Gvo iref (s) = = ∗ (3.5)
ˆ (s)
iref iˆL (s) iref
ˆ (s)
47
iˆL (s)
Assuming the inner current loop is faster and ˆ (s)
iref
≅ 2, current reference to output
voltage transfer function is given by
vô (s) 2RL (1 − D)

Gvo iref (s) = = (3.6)
ˆ (s)
iref 2 + sCo RL
With introducing LCIC the new current reference is given by
ˆ (s) = i′ˆ (s) + K vô (s)

iref (3.7)
ref
RL
′
Therefore the current reference iref to output voltage vo transfer function is given
by
vô (s)
vô (s) ˆ (s)
iref
Gvo i′ (s) = ′ = (3.8)
ref ˆ (s)
iref 1 − RKL i vˆô (s)
(s) ref
2RL (1−D)
2+sCo RL
= (3.9)
1 − RKL 2RL (1−D)
2+sCo RL
2RL (1 − D)
= Co RL
(3.10)
(2 − 2K(1 − D))(1 + s 2−2K(1−D) )
For the above transfer function to have the pole on left half of the s-plane i.e. for
the system to be stable
2 − 2K(1 − D) > 0 (3.11)

1
K < (3.12)
1−D
irefˆ(s) irefˆ(s) voˆ(s)

′
vrefˆ(s) Hv (s) Gvo iref (s)

irefˆ(s) voˆ(s)
vrefˆ(s) Hv (s) Gvo iref (s) vˆf b(s)
vf bˆ(s) 1
K∗ R
Kv Kv
(a) Block diagram of average current-mode (b) Block diagram of average current-mode
control of interleaved boost converter control of interleaved boost converter with LCIC
Figure 3.9: Average current-mode control of interleaved boost converter with LCIC &
ACPM
48
3.5.3 Design of Auxiliary Current Pump Module and Hysteresis
current mode controller
The current reference for ACPM is generated by the current reference generator circuit
shown in Fig. 3.10(a). The reference generator is fed with load current iload . Hysteresis
current mode control is implemented for isolated ACPM to track ILaref . Hysteresis
controller is fed with ILaref , ILa . In turn, it generates the gating signals for the MOSFETS
S1a , S2a in ACPM. The control structure of hysteresis current mode control is shown in
Fig. 3.10(b).
Low
i load pass Gain i L a ref
Filter
(a) Current reference generator for auxiliary current pump

module
Comparator
i Laref
i Laref Ground
For S
ref+ S Q DRIVER 1a
IC
Comparator Q AND Gate
R
For S
iLa S−R Latch DRIVER
2a
IC
S Q AND Gate
ref−
Comparator
R Q
i Laref
S−R Latch
Ground
i Laref
Comparator
(b) Implementation of Hysteresis current mode controller for auxiliary current

pump module
Figure 3.10: Reference generator and control circuitry for auxiliary current pump module
would be at 16 kHz. The voltage loop controller is designed such that the bandwidth
of the total system is at 2.96 kHz, gain margin and phase margins are 10 dB and
63° respectively.
49
Figure 3.11: Voltage loop gain of 2 kW interleaved boost converter
3.6 Experimental Results
In Fig. 2.19, the laboratory prototypes of 2 kW interleaved boost converter with average
current-mode controller is shown. In interleaved boost converter two 1 kW boost
converters are made to operate in interleaved mode to achieve 2 kW. Operating parameters
of the designed converter are shown in Table. 3.1. Efficiency of the designed converter
is observed to be 93.5 % at nominal input voltage of 56.5 V, rated load condition of 2
kW. Improvement in the transient response of 2 kW interleaved boost converter with
inclusion of LCIC & ACPM is observed experimentally. The transient response of the
converter is observed at input voltage of 45 V, for a 50% step change in load without
LCIC & ACPM. It is observed that the peak undershoot (Fig. 3.13(a)) is 3.2% (i.e. 2.24
V) and settling time is 650 µs with 540 µF load bus capacitance. The peak undershoot
(Fig. 3.14(a)) is 2.42% (i.e. 1.7 V) and settling time is 470 µs for 35% step change in
load without LCIC & ACPM.
Table 3.1: Operating parameters of the 2 kW interleaved boost converter prototype
Vin Vo Po Switching f requency(fs ) L1 , L2 C duty ratio(D) KiLx Kv

45-68 V 70 V 2000 W 100 kHz 20 µH 540 µF 0.028-0.357 0.165 0.07
For restricting the deviation in output voltage to ± 1% i.e 700 mv, 1200 µF load bus
capacitance is required. The simulated transient response of 2 kW interleaved boost
50
Table 3.2: Operating parameters of the auxiliary current pump module
Rated P ower of auxiliary converter Switching f requency(fs ) AuxiliaryInductance La

100 W @ load step frequency of 1 kHz 200 kHz 10 µH
(a) Interval 1(t0 < t < t1 ) (b) Interval 2 (t1 < t < t2 )
Figure 3.12: Auxiliary current injection circuit waveforms for source mode of operation
during a step increase in load
converter with 1200 µF load bus capacitance for 50% step change in load, at 48 V input
voltage is shown in Fig. ??.
For the designed converter, it is observed that the line regulation is 0.4% at rated
load of 2000 W. The load regulation is 0.6% at nominal input voltage of 56.5 V where
load is varied from 10% to 100%. Efficiency of converter is 96% at nominal input
voltage of 56.5 V, rated load condition of 2000 W. Fig. 3.18(b) shows the transient
response of the converter at nominal input voltage of 56.5 V for a 50% step change in
load. It is observed that the peak over shoot (Fig. 3.18(b)) and peak under shoot (Fig.
3.18(b)) is 4% (i.e 3 V) and settling time is 523 µs, which are not at acceptable levels.
3.7 Conclusion
An auxiliary current pump module is presented, which can be used as generic auxiliary
module for both and non-isolated step-up/step-down DC-DC converters. A suitable
control scheme is designed and implemented for interleaved boost converter operating
51
(a) Top trace is output voltage in ac mode (1 V/div) (b) Top trace is output voltage in ac mode (1 V/div)
and the bottom trace is Input current (20 A/div), and the bottom trace is Input current (20 A/div),
load current (10 A/div) with slew rate of 64 kA/s. load current (10 A/div) with slew rate of 512 kA/s.
The time scale is 400 us/div. The time scale is 400 us/div.
Figure 3.13: Experimentally observed transient response of 2 kW interleaved boost converter with
capacitance, at input voltage of 48 V.
(a) Top trace is output voltage in ac mode (1 V/div) (b) Top trace is output voltage in ac mode (1 V/div)
and the bottom trace is load current (10 A/div) with and the bottom trace is load current (10 A/div) with
slew rate of 64 kA/s. The time scale is 400 us/div. slew rate of 512 kA/s. The time scale is 400 us/div.
Figure 3.14: Experimentally observed transient response of 2 kW interleaved boost converter with
capacitance, at input voltage of 48 V.
52
Figure 3.15: Simulated transient response of 2 kW interleaved boost converter for 50% step change in
load with 1200µF load bus capacitance, at input voltage of 48 V.
Figure 3.16: Experimentally observed transient response of 2 kW interleaved boost converter for 50%
step change in load, with 540µF load bus capacitance, at input voltage of 48 V enabling
LCIC. The top trace is output voltage in ac mode (1 V/div) and the bottom trace is load
current (10 A/div) with slew rate of 512 kA/s. The time scale is 400 us/div.
53
(a) Load current (10 A/div) with slew rate of 62 (b) Load current (10 A/div) with slew rate of 144
kA/s kA/s
(c) Load current (10 A/div) with slew rate of 256 (d) Load current (10 A/div) with slew rate of 1000
kA/s kA/s
LCIC & ACPM. From the top, the first trace is output voltage in ac mode (1 V/div), the
second trace is input current of auxiliary converter (10 A/div) and the bottom trace is load
current (10 A/div). The time scale is 400 us/div.
in conjunction with proposed ACPM. Load current injection circuit (LCIC) employed in
the proposed control scheme, eliminates the requirement of complex non-linear control
algorithms. The laboratory prototypes are designed and fabricated, the transient response
is obtained experimentally for the 2000 W interleaved boost converter with & without
enabling ACPM and LCIC. Enabling ACPM and LCIC, the undershoot in output voltage
is minimized to 0.51% of rated output voltage, for a 50% of step change in load;
transient recovery time is also significantly reduced. The experimental results indicating
the improvement in dynamic response with inclusion of ACPM and LCIC are presented.
54
(a) From the top, the first trace is output voltage in (b) From the top, the first trace is output voltage in
ac mode (1 V/div), the second trace is input current ac mode (1 V/div), the second trace is input current
of auxiliary converter (10 A/div) and the bottom of auxiliary converter (10 A/div) and the bottom
trace is load current (10 A/div) with slew rate of trace is load current (10 A/div) with slew rate of
256 kA/s. The time scale is 400 us/div. 1000 kA/s. The time scale is 400 us/div.
LCIC & ACPM.
55
CHAPTER 4
A New Auxiliary Current Injection Circuit for Improved

Transient Response of Step-up/Step-down DC-DC
Converters
4.1 Introduction
This chapter presents a new isolated auxiliary current pump module (ACPM), to improve
the dynamic response of DC-DC converters under load transients. The developed
isolated ACPM can be used as a generic auxiliary module for both isolated and non-isolated
step-up/step-down DC-DC converters. The isolated ACPM is a low power bidirectional
converter, designed with higher bandwidth and operates only during the load transients.
The performance of the developed auxiliary power converter has been evaluated in
conjunction with an interleaved boost converter as main converter, which suffers from
poor dynamic performance due to inherent right half plane zero effect. A suitable
in conjunction with proposed isolated ACPM. Load current injection circuit (LCIC)
employed in the proposed control scheme, eliminates the requirement of complex non-linear
control algorithms. The proposed control scheme in particular suits for current-mode
controlled converters operating along with isolated ACPM. Experimental results for
a 250 W, 100 kHz interleaved boost converter prototype with auxiliary current pump
module are presented. The peak overshoot/undershoot and the transient recovery time
are reduced significantly with the incorporation of developed isolated ACPM.
Different auxiliary converter topologies and control strategies are reported in [15]-[20]
for the enhancement of dynamic response of DC-DC converter. An auxiliary converter
topology shown in the Fig. 4.1(a) is presented in [15]. If the main converter is a
step-down converter, the ACPM circuit configuration is as highlighted in blue color.
Therefore the current ia injected/drawn by the auxiliary converter to/from the load point
of main converter is inductor current. So, the slew rate and the control response of
this current depends on inductor value and the adopted control technique. If the main
converter is a step-up converter, the ACPM configuration is as highlighted in red color.
Therefore, the current ia injected/drawn is a discontinuous current. Although, the slew
rate of this current depends upon the inductor value, the control response is limited
by the presence of right half plane zero in its control to current ia transfer function.
This results in poor dynamic response of the auxiliary converter, which makes it not
recommended to use in conjunction with a step-up converter. In addition, this auxiliary
converter topology can be used only with non-isolated DC-DC converters.
On the other hand, there is an increasing demand for the use of isolated DC-DC
converters for space craft power supplies. A multi port isolated DC-DC converter
used for regulating the load bus in a satellite is reported in [21]. Isolated auxiliary
current pump module topologies especially for isolated DC-DC power converters are
still evolving. Auxiliary converter topologies for isolated converters are shown in [22],
where an auxiliary capacitor is required. In addition, these topologies require two stage
conversion increasing the complexity of the circuit. The auxiliary converter reported in
MAIN
MAIN
CONV ERT ER L
CONV ERT ER L
vin (ST EP UP/ ia o
a vo vin o
a vo
d (ST EP UP/ d
ST EP DOW N)
ST EP DOW N)
Auxiliary
current ia
pump Auxiliary
current
module pump
Ca module
(a) (b)
Figure 4.1: Existing auxiliary current pump modules for step-up/step-down converters
[19], is shown in Fig. 4.1(b), is free from right half plane zero effect and can be used in
conjunction with isolated/non-isolated DC-DC converter irrespective of the topology.
This converter requires an auxiliary voltage source and can be realized by a auxiliary
capacitor. The auxiliary capacitor transfers the energy to the main converter through
bi-directional auxiliary converter in the event of step up load transient and absorbs the
energy during a step down load transient. An additional control circuit is required to
regulate the voltage across the auxiliary capacitor. The size of the auxiliary capacitor
57
will be more, which increases the size and cost of the system. The efficiency of the
whole system may decrease due to loss of energy in equivalent series resistance (ESR)
of the capacitor. This topology asks for a capacitor with high rms current capability and
with low ESR.
In this work, a new isolated Auxiliary Current Pump Module (ACPM) has been
developed for enhancing the dynamic response of DC-DC converters during load transients
[23]. The isolated ACPM operates only at the time of load transients, during which
sinking/sourcing of additional current from/to the load point of main converter is done.
The load current of the main converter is monitored to take an appropriate action during
a load transient. The developed isolated ACPM can be used in conjunction with both
isolated and non-isolated step-up/step-down DC-DC converters. The developed isolated
ACPM is free from right half plane zero effects, thus can achieve high slew rate current
injection and fast response control. It does not require any auxiliary voltage source.
The inclusion of isolated ACPM will not affect the steady state efficiency of the main
converter, as it comes into operation only during load transients. In this paper, isolated
ACPM is designed and tested in conjunction with a 250 W interleaved boost converter.
Bandwidth of a common step-up converter i.e; boost converter is limited by the

right half plane zero (RHPZ) effect. This results in poor dynamic performance of the
converter during transients. Many techniques have been proposed for improving the
dynamic response of the boost converter by eliminating or attenuating the effects of
right half plane zero [24]-[? ]. Isolated ACPM developed in this paper, addresses the
issue of improving the dynamic response of boost converter in particular. A suitable
in conjunction with proposed isolated ACPM. Load current injection circuit (LCIC)
employed in the proposed control scheme, eliminates the requirement of complex non-linear
control algorithms.
This chapter is organized as follows: Section II presents the operation of auxiliary

current pump module in conjunction with main converter under load transients. Operation
of auxiliary current pump module in conjunction with average current-mode controlled
interleaved boost converter is explained in Section III. Section IV presents the controller
design and implementation for both interleaved boost converter and ACPM. A method
58
to derive the current reference for isolated ACPM is also presented in the Section IV.
Section V presents the simulation results of interleaved boost converter operating with
isolated ACPM. Developed laboratory prototypes and experimental results of 250 W,
100 kHz interleaved boost converter with isolated ACPM are also presented in section
V. Section VI gives the conclusion and the references.
4.2 Operation of Auxiliary Current Pump Module
The developed isolated auxiliary current pump module is shown in Fig. 4.2(a). Isolated
ACPM is a bidirectional converter with source and load voltages clamped to those of
main converter as shown in Fig. 4.2(b). Developed isolated ACPM can be used in
conjunction with isolated and non-isolated step-up/step-down DC-DC converters. It
has a three winding transformer, one diode D4a , an inductor La , three MOSFETS
S1a , S2a , S3a , with anti parallel body diodes D1a , D2a , D3a respectively. Turns ratio
of the transformer must be designed such that vin nn31 is greater than vo . Hysteresis
current-mode control is implemented for controlling the current injected by the auxiliary
current pump module. For a step increase and step decrease of load, the operation
of isolated ACPM during sourcing and sinking mode respectively is explained in this
section.
4.2.1 Isolated ACPM for source mode of operation
For a step increase in the load, the auxiliary circuit is designed to inject additional
current into the load point to minimize the undershoot in the output voltage. The
reference generator monitors the load current and appropriately generates a positive
current reference. The operation of the isolated ACPM while tracking the positive
current reference is explained in this section. In source mode, the auxiliary converter
operates similar to the forward converter. In this mode, the power transfer is from vin
to vo ; the devices S1a , D2a , D3a , D4a are operated.
Interval 1 (t0 < t < t1 ) The circuit conditions in this interval are shown in Fig. 4(a).
The key waveforms of isolated ACPM acting in conjunction with main converter (Fig.
59
La
n1 : n2 : n3
a e c + −i
vLa La
+ +
vin vout
− b f d −
D1a D2a D3a
S1a D4a S2a S3a
(a) Proposed auxiliary current pump module
MAIN DC−DC CONVERTER
(ISOLATED or NON−ISOLATED
STEP UP/STEP DOWN)
+ Co RL
vin +
vout
−
−
La
a
n1 : n2 : n3
c
iLa iload
e +
vLa −
b f d
S1a D1a S2a D2a D3a
D4a S3a

iLaref
(b) Auxiliary current pump module operating in parallel with main
converter
Figure 4.2: Proposed auxiliary current pump module

4.2(b)) during the source mode of operation are shown in Fig. 4(c). At the time instant
t0 , for a step increase in the load, the output voltage starts drooping. As the current
reference (iLaref (t)) generated for isolated ACPM is positive at this condition, switch
S1a is turned on. The diode D2a comes into conduction. Then the auxiliary inductor
v (t)
current (iLa (t)) increases with a slope of La La , where vLa (t) is voltage across the
n3 − v (t)].
inductor and is equal to [vin (t) n o
1
Interval 2 (t1 < t < t2 ) The instant t1 , at which iLa (t) reaches the upper limit
above iLaref (t), the switch S1a is turned off. The diode D3a comes into conduction,
−v (t)
iLa (t) reduces with a slope of Lo . During this interval, resetting action is carried
a
out by the resetting winding ′ ef ′ with diode D4a coming into conduction. The circuit
conditions in this interval are shown in Fig. 4(b). The intervals 1 and 2 repeats till the
instant tend at which, the output voltage recovers and the iLaref (t) reaches zero.
60
La
n1 : n2 : n3
a e c + −
vLa i La
iload (t)
+ + t
vin vout v out (t)
− b f d −
D1a D2a D3a
S1a D4a S2a S3a iLaref (t) t
iLa (t)
La
n1 : n2 : n3
vg,s1a (t) t
a c
e +
v −i
La La
+ + vLa (t) t
vin vout
− b f d −
D1a D2a D3a
t
S1a D4a S2 a S3a
t0 t1 t2 tend
(b) Interval t1 < t2 (c)
pulse for switch S1a , voltage across the inductor
4.2.2 Isolated ACPM for sink mode of operation
For a step decrease in the load, the auxiliary current pump module is designed to
draw additional current from the load point to minimize the overshoot in the output
voltage. The reference generator monitors the load current and appropriately generates
a negative current reference. The operation of the isolated ACPM while tracking the
negative current reference is explained in this section. In this mode, the power transfer
is from vo to vin ; devices S2a , S3a , D1a , D4a are operated.
Interval 1 (t0 < t < t1 ) The circuit conditions in this interval are shown in Fig.
5(a). The key waveforms of isolated ACPM acting in conjunction with main converter
(Fig. 4.2(b)) during the sink mode of operation are shown in Fig. 5(d). At the time
instant t0 , for a step change in the load, an overshoot in the output voltage starts. As the
current reference iLaref (t) generated for isolated ACPM is negative at this condition,
switch S3a is turned on. Then the auxiliary inductor current increases with a slope of
−vo (t)
La in the negative direction.
61
Interval 2 (t1 < t < t2 ) At the instant t1 , iLa (t) reaches the upper limit above
iLaref (t), then the switch S2a is turned on and S3a is turned off. Then iLa (t) reduces
v (t)
with a slope of La La , where vLa (t) is voltage across the inductor and is equal to
n3 − v (t)]. With diode D coming into conduction, the energy stored in the
[vin (t) n o 1a
1
inductor La is transferred to the primary side of the transformer. The circuit conditions
in this interval are shown in Fig. 5(b).
n1 : n2 : n3 La
c
vL −iL
a e +
a a iload (t)
+ +
vin b f d
vout t
− −
vout (t)
D1a D2a D3a
S1a D4a S2a S3a
(a) Interval t0 < t1 iLaref (t) t
n1 : n2 : n3 La iLa (t) t
a e c + −
vL i L a a
+ +
vin b f d
vout
− −
D1a D2a D3a vg,s3a (t)
S1a D4a S2a S3a

t
(b) Interval t1 < t2
La vg,s2a (t)
n1 : n2 : n3
c
a e + vL −i La
a t
vLa (t)
+ +
vin b f d
vout
− − t
D1a D2a D3a
t0 t1 t2t3 tend
S1a D4a S2a S3a
(d)
(c) Interval t2 < t3
operating in parallel with main converter for sink mode of operation, during
a step decrease in load. (From top) Load current, output voltage, current
reference for isolated ACPM, auxiliary inductor current, gating pulse for
switch S3a , gating pulse for switch S2a , voltage across the inductor
Interval 3 (t2 < t < t3 ) At the instant t2 , again the switch S3a is turned on and S2a
is turned off. Resetting of the transformer is carried out by winding ′ ef ′ with diode D4a
coming into conduction. The circuit conditions in this interval are shown in Fig. 5(c).
The intervals 1, 2 and 3 repeats till the instant tend at which, the output voltage recovers
and the iLaref (t) reaches zero. Operation of this auxiliary current pump module in
conjunction with the average current-mode controlled interleaved boost converter is
62
explained in the next section.
4.3 Operation of Proposed isolated ACPM in conjunction

with interleaved boost converter
This section explains the operation of interleaved boost converter, average current-mode
controller, load current injection circuit, auxiliary current pump module and hysteresis
current-mode controller. In Fig. 4.5, an interleaved boost converter operating along with
the developed isolated ACPM is shown. Operation of isolated ACPM is explained in
section II. Auxiliary current pump module comes into operation during load transients
to support the output capacitor by sourcing/sinking extra current required to maintain
the output voltage. Therefore the deviation in the output voltage is alleviated with
the help of this auxiliary circuit. As the error seen by the voltage controller in the
main converter is less, the rate at which current reference increases is very less and
it takes more time for input current to meet the new load current demand. Therefore
the auxiliary circuit needs to be in operation for more time. To compensate the effect
of ACPM on ACMC interleaved boost converter a control scheme is proposed and
explained in subsequent subsection.
L1 IL1 D1
Vfb
L2 IL2 D2
S S2
1
Co RL
+ +
Vin Average Current V ref
Vout
Mode Controller
− −
n1 : n2 : n3 La
IL a Iload
a e c + −
V La
b f d
S1a D1a S2a D2a D3a
D4a S3a
Peak Current Reference

Mode Controller ILaref Generator
Figure 4.5: Auxiliary current pump module operating in parallel with interleaved boost
converter
63
4.4 Design and Implementation
This section explains the design and implementation of interleaved boost converter,
average current-mode controller, load current injection circuit, auxiliary current pump
module and hysteresis current-mode controller. Design parameters of the prototypes
are shown in Table. 4.1.
Table 4.1: Design parameters of prototypes
Parameter Specification
Input Voltage 45 V
Output Voltage 70 V
Rated Power of main converter 250 W
Rated Power of Auxiliary converter 40 W
Inductance L1 , L2 , La 150 µH
Output Capacitance 90 µF
Transformer turns ratio n1 : n2 : n3 13:10:43
switching frequency of main converter 100 kHz
switching frequency of auxiliary converter 200 kHz
4.4.1 Design of Interleaved Boost Converter and Average current-mode

controller
Interleaved boost converter consists of two boost converters operating in parallel with
a phase shift between their gate drive signals. The model of the interleaved boost
converter is derived and is presented in [29]. Two 125 W boost converters are made
to operate in interleaved mode to achieve 250 W. Efficiency of the designed converter is
observed to be 96 % at a input voltage of 45 V, rated load condition of 250 W. Each boost
converter consists of a 150 µH toroidal core inductor, a MOSFET (IRFP4427PBF) and
a diode (MUR3020WTPBF). Inductors are designed to have 10% of current ripple
in the total input current. The bus capacitance is typically sized according to the
bus impedance requirements [2] i.e; [Co = P max/400πVo2 ] and is designed to be
90µF. Average current-mode control (ACMC) is implemented for the interleaved boost
converter. All the three controllers HiL1 (s), HiL2 (s), Hv (s) are implemented using
op-amps and they perform error amplification, averaging and integration. Inner current
ˆ (s)/dˆx (s) transfer function (Fig. 3.8),
loop controllers are designed based on the iLx
64
whereas the outer voltage loop controller is designed based on voˆ(s)/iref
ˆ (s) transfer
function. For stable operation, the converter bandwidth is maintained much lesser than
right half plane zero frequency. The right half plane zero frequency is calculated using
the equation (4.1), that is 15 kHz at duty ratio D = 0.4.
R(1 − D)2 Lx
fRHP Z = ; where Lef f = , x : 1, 2 (4.1)
2πLef f 2
would be at 16 kHz. The voltage loop controller is designed such that the bandwidth of
the total system is at 2.96 kHz with a gain margin of 10 dB and phase margin of 63° [?
].
4.4.2 Design of Load Current Injection Circuit
The block diagram representation of average current-mode controlled interleaved boost

converter with LCIC is shown in Fig. 3.8. Inclusion of load current injection circuit
improves the dynamic performance of the converter. If the load current is independent
of the output voltage, then using the load current information for control can be treated
as feed forward control. The term load current injection is more preferred than load
current feed forward, if the load is a resistive load i.e. load current is a function of
output voltage [30]. In this case, positive feed back is introduced due to addition of Kio
term to the current reference generated by voltage controller.
vô (s) 2RL (1 − D)

′ˆ
= Co RL
(4.2)
iref (s) (2 − 2K(1 − D))(1 + s 2−2K(1−D) )
This can cause instability in the system. Instability can be avoided by proper design of
the gain term ’K’. Transfer functions are derived for the average current-mode controlled
interleaved boost converter with LCIC to find the limit on value of K, for stable operation
of the converter. To have the pole on left half of the s-plane in v ˆ(s)/i ˆ (s) transfer
′
o ref
function (Fig. 3.8) given by equation (4.2) i.e. for the system to be stable, K must be
1
less than 1−D
. The value of K is designed to be 0.636.
65
Low
i load pass Gain i L a ref
Filter
(a) Current reference generator for auxiliary current

pump module
Comparator
i Laref
i Laref Ground
For S
ref+ S Q DRIVER 1a
IC
Comparator Q AND Gate
R
For S
iLa S−R Latch DRIVER
2a
IC
S Q AND Gate
ref−
Comparator For S
R Q 3a
i Laref DRIVER
S−R Latch IC
AND Gate
Ground
i Laref
Comparator
(b) Implementation of hysteresis current-mode controller for

auxiliary current pump module
Figure 4.6: Reference generator and control circuitry for auxiliary current injection
converter
4.4.3 Design of Auxiliary Current Pump Module and Hysteresis

current-mode controller
In isolated ACPM, turns ratio of the transformer must be designed such that vin nn13 is
greater than vo . The turns ratio is n1 : n2 : n3 = 13:10:43. The maximum voltage
imposed across the MOSFET S1a is [vin (t)(1 + n 1 n3 n3
n2 )], S2a is vin (t) n2 , S3a is vin (t) n1 .
The maximum offstage voltage of the MOSFETS S1a , S2a , S3a are 100 V, 190 V, 150
V respectively and 300 V rated MOSFETs (IRFB4137PBF) are used. The maximum
reverse voltage across the diode D4a is [vin (t)(1 + n2
n1 )] and is 80 V. MUR3020WTPBF
diode is used. The current reference for isolated ACPM is generated by the reference
generator circuit shown in Fig. 4.6(a). The reference generator is fed with load current
iload and in turn it generates iLaref . Hysteresis current-mode control is implemented for
isolated ACPM to track ILaref . Hysteresis current-mode controller is fed with iLaref ,
iLa . In turn, it generates the gating signals for the MOSFETS S1a , S2a , S3a in isolated
ACPM. The control structure of hysteresis current-mode control is shown in Fig. 4.6(b).
66
4.5 Simulation Results and Experimental Verification
Performance of the designed isolated ACPM is evaluated by using SABER simulation

software. Design parameters of the prototypes are shown in Table. 4.1. Transient
response of the 250 W interleaved boost converter with and without including isolated
ACPM is simulated. In Fig. 4.7, the output voltage of the converter with and without
inclusion of isolated ACPM is compared for 50% step increase in the load. Here, it is
observed that the peak undershoot and over shoot with average current-mode control is
2.2 V, which is 3.14% of the rated output voltage. With including isolated ACPM &
LCIC the undershoot and over shoot has been minimized to 0.5 V, which is 0.71% of the
rated output voltage. According to the European Cooperation for Space Standardization
(ECSS) the allowable peak overshoot/undershoot in output voltage of a space craft
power supply for a 50% step variation in load is ±1%.
Figure 4.7: Simulated transient response showing output voltage of interleaved boost
converter with and without isolated ACPM for step variations in load
The laboratory prototypes of 250 W interleaved boost converter with average current-mode
controller and the isolated auxiliary current pump module with hysteresis current-mode
controller are shown in Fig. 4.8. Improvement in the transient response of 250 W
interleaved boost converter with inclusion of LCIC & isolated ACPM is observed experimentally.
The transient response of the converter is observed at input voltage of 45 V, for a
50% step change in load. Employing ACMC, it is observed that the peak under shoot
(Fig. 4.9(a)) is 3.25% (i.e. 2.28 V) and settling time is 1.59 ms with 90 µF load bus
67
Figure 4.8: Laboratory prototype showing 250 W interleaved boost converter and
auxiliary current pump module
(a) Transient response of the interleaved boost (b) Transient response of the interleaved boost
converter for a 50% step change in load current. converter for a 50% step change in load current.
The time scale is 1 ms/div. The time scale is 1 ms/div.
Figure 4.9: Experimentally observed transient response of 250 W interleaved boost

converter with 90µF load bus capacitance, at input voltage of 45 V.
capacitance. The peak overshoot (Fig. 4.9(b)) is 3.42% (i.e. 2.4 V) and settling time
is 1.75 ms. With increase in load bus capacitance to 220 µF the deviation in output
voltage is decreased. It is observed that the peak under shoot (Fig. 4.10(a)) is 1%
(i.e. 700 mV) and settling time is 5.95 ms, with 220 µF load bus capacitance. The
peak overshoot (Fig. 4.10(b)) is 0.97% (i.e. 680 mV) and settling time is 5.95 ms.
Enabling the load current injection loop alone, it is observed that the peak under shoot
(Fig. 4.11(a)) is 1.9% (i.e. 1.38 V) and settling time is 1.67 ms with 90 µF load bus
capacitance. The peak overshoot (Fig. 4.11(b)) is 2% (i.e. 1.4 V) and settling time
is 1.72 ms. Enabling auxiliary current pump module alone, it is observed that the
peak under shoot (Fig. 4.12(a)) is 0.42% (i.e. 300 mV) and settling time is 6.37 ms
with 90 µF load bus capacitance. The peak overshoot (Fig. 4.12(b)) is 0.48% (i.e.
68
converter for a 50% step change in load current. converter for a 50% step change in load current.
The time scale is 2 ms/div. The time scale is 2 ms/div.

converter with 220µF load bus capacitance, at input voltage of 45 V.
converter for a 50% step change in load current, converter for a 50% step change in load current,
enabling LCIC. The time scale is 1 ms/div. enabling LCIC. The time scale is 1 ms/div.

enabling load current injection loop.
340 mV) and settling time is 4.8 ms. Enabling both load current injection circuit and
auxiliary current pump module significantly reduces the deviation in output voltage and
the settling time. LCIC in addition to isolated ACPM, reduces the amount of auxiliary
current to be injected, can be observed from Fig. 4.13. This in turn reduces the rating
of auxiliary converter. Enabling both isolated ACPM and LCIC, for 50% step change in
load, the peak overshoot (Fig. 4.13(b)) is 0.54% (i.e. 380 mV) and settling time is 933
69
enabling isolated ACPM. The time scale is 2 ms/div. enabling isolated ACPM. The time scale is 2 ms/div.

enabling auxiliary current pump module.
µs with 90 µF load bus capacitance. The peak undershoot (Fig. 4.14) is 0.51% (i.e. 360
mV) and settling time is 933 µs with 90 µF load bus capacitance enabling both isolated
ACPM and LCIC. All the measurements obtained from the experimental prototypes are
tabulated in Table. 4.2. With ACMC the deviation in the output voltage is not with in
the desirable limit of 1%. With increase in the load bus capacitance to 220µF i.e; 2.5
times of the designed value the deviation is with in the limit, but the settling time is
increased. We can observe that the deviation in the output voltage and settling time are
less with ACPM and LCIC being enabled.
Table 4.2: Measurements obtained from the experimental prototypes

50% step decrease in load 50% step increase in load
Control scheme
Peak over Peak under
Settling time Settling time
shoot(%) shoot(%)
ACMC with 90 µF 3.42% 1.75 ms 3.25% 1.59 ms
ACMC with 220 µF 0.97% 5.95 ms 1% 5.95 ms
ACMC with LCIC, with 90 µF 2% 1.72 ms 1.9% 1.67 ms
ACMC with ACPM, with 90 µF 0.48% 4.8 ms 0.42% 6.37 ms
ACMC with ACPM & LCIC, with 90 µF 0.54% 933µs 0.51% 933µs
Experimentally observed phase plane plot is shown in Fig. 4.15, which is plotted
between total input current and the output voltage. It shows the load disturbance effects
in phase space with, total input current on vertical axis and output voltage on horizontal
axis. The trajectory to make transition between one load operating point to the other,
70
enabling only isolated ACPM. The time scale is 2 enabling both isolated ACPM and LCIC. The time
ms/div. scale is 2 ms/div.
Figure 4.13: Comparison of the experimentally observed transient response of 250

W interleaved boost converter with 90µF load bus capacitance, at input
voltage of 45 V, with only isolated ACPM enabled and with both isolated
ACPM & LCIC enabled

enabling both isolated ACPM & LCIC.
with out enabling ACPM and LCIC is shown in Fig. 4.15(a). The trajectory with
increased load bus capacitance of 220µF is shown in Fig. 4.15(b). The trajectory with
LCIC alone being enabled, with load bus capacitance of 90µF is shown in Fig. 4.15(c).
The ideal trajectory would be a straight line between the two operating points. But, the
deviation is more in Fig. 4.15(a). Enabling both ACPM and LCIC, the deviation in the
trajectory is less and can be observed from Fig. 4.15(d).
71
(a) Phase-plane behavior of interleaved (b) Phase-plane behavior of interleaved
boost converter for 50% step change boost converter for 50% step change
in load current with 90µF load bus in load current with 220µF load bus
capacitance. capacitance.
(c) Phase-plane behavior of interleaved (d) Phase-plane behavior of interleaved

boost converter for 50% step change boost converter for 50% step change
in load current with 90µF load bus in load current with 90µF load bus
capacitance, enabling LCIC. capacitance, enabling both LCIC and
isolated ACPM.
Figure 4.15: Comparison of experimentally observed phase-plane behavior of 250 W

interleaved boost converter, at input voltage of 45 V.
4.6 Conclusion
An isolated auxiliary current pump module is presented, which can be used as generic
auxiliary module for both isolated and non-isolated step-up/step-down DC-DC converters.
A suitable control scheme is designed and implemented for interleaved boost converter
operating in conjunction with proposed isolated ACPM. Load current injection circuit
(LCIC) employed in the proposed control scheme, eliminates the requirement of complex
non-linear control algorithms. The laboratory prototypes are designed and fabricated,
the transient response is obtained experimentally for the 250 W interleaved boost converter
with & without enabling isolated ACPM and LCIC. Enabling isolated ACPM and LCIC,
the undershoot in output voltage is minimized to 0.51% of rated output voltage, for a
50% of step change in load; transient recovery time is also significantly reduced. The
experimental results indicating the improvement in dynamic response with inclusion of
72
isolated ACPM and LCIC are presented.
73
CHAPTER 5
Conclusions
5.1 Conclusions
The power stage transfer functions of interleaved boost converter are developed, which
are necessary to implement average current-mode control. Two inner current loop
controllers and one outer voltage loop controller are designed and implemented. A 2000
W interleaved boost converter is built and tested with average current-mode control.
The experimental results are in close agreement with analytical model.
An auxiliary current pump module is designed to meet the transient response requirements.
A suitable control scheme is designed and implemented for interleaved boost converter
operating in conjunction with proposed isolated ACPM. Load current injection circuit
(LCIC) employed in the proposed control scheme, eliminates the requirement of complex
non-linear control algorithms. The proposed control scheme in particular suits for
current-mode controlled converters operating along with isolated ACPM. Experimental
results showing the reduction in output voltage deviation with incorporation of ACPM
and LCIC are presented.
The laboratory prototypes are designed and fabricated, the transient response is
obtained experimentally for the 2000 W interleaved boost converter with & without
inclusion of ACPM and LCIC. It is observed that the undershoot in output voltage are
minimized to 0.8% of rated output voltage for a 50% of step change in load; transient
recovery time is negligibly small. The experimental results indicating the improvement
in dynamic response with inclusion of ACIC are shown.
A new isolated auxiliary current pump module is proposed which can be used
as generic auxiliary module with isolated or non-isolated step-up/step-down DC-DC
converters and does not require any auxiliary voltage source. The proposed isolated
ACPM prototype is designed and tested in conjunction with the 250 W interleaved boost
converter. The experimental results indicating the improvement in dynamic response
with inclusion of proposed isolated ACPM and LCIC are presented.
75
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List of refereed conference publications
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10-13 Nov. 2013.
80
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Analysis, Design and Implementation of an Auxiliary Current Pump Module

Thesis · June 2014

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for the award of the degree

DEPARTMENT OF ELECTRICAL ENGINEERING

Dr.N Lakshmi Narasamma

Date: 15th March 2014

Many complex control techniques to improve the dynamic performance of DC-DC

LIST OF TABLES vii

2 Analysis, Modeling, Design and Implementation of Average Current Mode

3 An Auxiliary Current Pump Module for Improved Load Transient Response

4 A New Auxiliary Current Injection Circuit for Improved Transient Response

1.1 Design requirements of DC-DC power converter w.r.t space standards . . . . . 2

2.1 Design parameters of 2 kW interleaved boost converter . . . . . . . 27

3.1 Operating parameters of the 2 kW interleaved boost converter prototype . . . . 50

4.1 Design parameters of prototypes . . . . . . . . . . . . . . . . . . . . . . 64

1.1 Spacecraft power subsystem . . . . . . . . . . . . . . . . . . . . . . . . 1

2.1 Interleaved boost converter . . . . . . . . . . . . . . . . . . . . . . 13

3.1 Basic structure of auxiliary current injection technique . . . . . . . 40

4.1 Existing auxiliary current pump modules for step-up/step-down converters 57

BDR Battery Discharge Regulator

BCR BDR Load

Figure 1.1: Spacecraft power subsystem

I/P: Unregulated DC O/P: Regulated DC

Figure 1.2: Battery Discharge Regulator

Sl.No Parameter Specification

1.2 Motivation, Objective and Scope

Several complex control techniques to improve the dynamic performance of DC-DC

Figure 1.3: Basic structure of auxiliary current pump technique

Sl.No Parameter Specification

1.3 Prior art on existing power converter topologies and

1.3.1 Power converter topologies

The problem of having lower bandwidth due to RHPZ is addressed in literature

The dynamic performance is improved by incorporating a differential current controller,

1.3.2 Control schemes

Dynamic response of a DC-DC power converter can be improved by introducing

In average current-mode control(ACMC), the average input current of boost converter

1.4 Thesis contributions

The major contributions of the thesis are:

• Design and implementation of average current-mode control for 2 kW interleaved

• Improvement in load transient response of average current-mode controlled interleaved

Voltage loop compensator

Figure 1.5: Average current-mode control of boost converter

1.5 Organization of thesis

This thesis is organized as follows.

Analysis, Modeling, Design and Implementation of

In high power applications, parallel operation of boost converters is recommended.

A boost converter is a conventional step up DC-DC power converter topology.

2.2 Operation of Interleaved Boost Converter

Figure 2.1: Interleaved boost converter

An interleaved boost converter is shown in Fig. 2.1, with two inductors L1 , L2 ,

2.3 Average Current Mode Control of Interleaved Boost

Current sharing in paralleled converters can be ensured by adopting current-mode control

The steps involved in mathematical modeling of average current-mode controlled interleaved

vo : Output voltage 1/Vm : M odulator gain

2.4.1 Open loop power stage transfer functions

Figure 2.6: Gating pulse for Sw1 ,Sw2

the small signal model of the converter.

iL1 L1 iD1 vo iL1 L1 iD1 vo

Figure 2.7: Circuit conditions of interleaved boost converter

given by equation (2.3).

For simplified analysis it is assumed that