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H110M-K Rev 1.01 2015.

08

ITP

VRD 12.5
on Board Channel A DDR4 1333/1600/1866/2133

PCIEx16
Intel Processor
Channel B DDR4 1333/1600/1866/2133
PCIE X16 SLOT1 x16
SKYLAKE

LGA-1151 Pin Socket


DDI C HDMI
DDI D DVI

DMI
RTD2168 VGA
PCI-EX1_1
PCIE5
PCIE GEN3 PCIE6

PCI-EX1_2 Audio
AZALIA
INTEL Codec Realtek ALC887-VD

PCIE8 PCIE GEN3 LAN RTL8111H

SKYLAKE
PCIE13/SATA0
SATA 6Gb/s SATA6G port 1/2
PCIE14/SATA1
PCH
PCIE15/SATA2
SATA 6Gb/s SATA6G port 3/4
PCIE16/SATA3

Integrated
BACK LAN_USB78 Clock

USB_7
USB2.0 USB_8

USB3_3
BACK USB3_34 USB3.0 USB3_4

USB3_5
BACK USB3_56 USB3.0 USB3_6

USB3_1
FRONT USB3_12 USB3.0 USB3_2

SIO
LPC BUS
24MHz
NCT5539D
USB_9
FRONT USB_910 USB2.0 USB_10
SPI
SPI FLASH

LPC BUS TPM


24MHz

<Variant Name>

Title : Block Diagram


ASUSTek COMPUTER INC.
Engineer: Bing-jie_Wang
Size Project Name Rev
R1.00
A2 SKYLAKE CHIPSET DEMO
Date: Tuesday, October 27, 2015 Sheet 1 of 93
Intel Processor
ICG : Integrated Clock Gen.
Skylake S

LGA-1151 Pin Socket

24MHz CLKOUT_CPUPCIBCLK
SIO CLKOUT_LPC0
NCT6791D
24MHz CLKOUT_CPUBCLK
CLKOUT_LPC1
CLKOUT_CPUNSSC

TPM CLKOUT_ITPXDP XDP


INTEL
SKYLAKE
PCH

Integrated
Clock

CLKOUT_PCIE0 PCIE X1 SLOT2

CLKOUT_PCIE1
CLKOUT_PCIE15

CLKOUT_PCIE2

PCIE X1 SLOT1 CLKOUT_PCIE14


CLKOUT_PCIE3

CLKOUT_PCIE4
CLKOUT_PCIE13

CLKOUT_PCIE12 CLKOUT_PCIE5

PCIE X16 SLOT1 CLKOUT_PCIE11 CLKOUT_PCIE6 LAN RTL8111H 25MHz

CLKOUT_PCIE10 CLKOUT_PCIE7

CLKOUT_PCIE9 CLKOUT_PCIE8
<Variant Name>

Title : Clock Distribution


ASUSTek COMPUTER INC.
Engineer: KENNY_CHEN
Size Project Name Rev
CLKOUT_FLEX: 33/14.138/24/48MHz A3 SKYLAKE CHIPSET DEMO R1.00

Date: Tuesday, October 27, 2015 Sheet 2 of 93


RESET_SWITCH

PCI_Express x 16_1 <19>O_PCIRST#_PCIEX16_1 XDP


PWRGD
SYS_RESET#
PCI_Express x 16_2 <19>O_PCIRST#_PCIEX16_2 DBR#

PWRGD H_CPURST#
RESET#
<19>O_PCIRST#_PCIEX16_3
PCH
PCI_Express x 1_1,2
& x16_3 LYNX POINT OBSDATA
PWRGD

SIO
AZ_RST# AUDIO
POWER_SWITCH NCT6779D HDA_RST# RESET#
ALC898
PROCESSOR
<5>O_PWRBTN#IN PCIRST1# HASWELL
PS_IN#
PCIRST2#
SYS_RESET#
PCIRST3# SYS_RESET# DBR#
*9
<18>S_PLTRST# *8 <18>H_CPURST#
LRESET# PLTRST# PLTRST_PROC# RESET#
*5
O_KB_RST# <13>S_DRAMPWRGD
KBRST# RCIN# DRAMPWROK SM_DRAMPWROK

<4>O_RSMRST# <1>RTCRST#
RSMRST# RSMRST# RTCRST#
CFG
<6>O_PWRBTN# <1>SRTCRST#
PS_OUT# PWRBTN# SRTCRST#
POWER SUPPLY
<10>12V,5V,3V SLP_S5#
Main PWR
<3>+5VSB, +3VSB <4.1> / <8>S_SLPS4# BATTERY
VSB SUSC# SLP_S4# *4
<9>O_PSON#
<2>AC Power PSON# PSON# *1 <4.2> / <9>S_SLPS3# *7
Switch On <11>B_ATX_PWROK SUSB# SLP_S3# *5 <14>H_CPUPWRGD
PWROK ATXPGD *2 PROCPUPWRGD PWRGOOD
<7>S_SLP_A#
SLP_A# *3
PWROK <15>VRM_SVID
<7.1>S_SLP_LAN# <3.1>S_DPWROK SVID
SLP_LAN# DPWROK <16>VCORE
VCORE
SYS_PWROK
*1
PSON# is inverted by SLP_S3#,
but gated and delayed by PCH_PWROK MEPWROK
PWRBTN#

*2 Non-AMT AMT
PWROK will assert when +3V arrives
at +2.1V then delay 300ms~500ms
and gated by ATXPGD
<12>O_PWROK
*3
If support AMT, SLP_A# ME_POWER
could already be high
before sequence begins. +1.05ME
If not support AMT, SLP_A# Vcore Controller
will come with SLP_S3 +3V_DUAL_LAN/EPW
<7.2>S_MEPWROK
SVID
*4
SLP_S4# controls +1.5VDual and VCORE
+VTTDDR
*6 S_SLPS3#
*5 <17>VRMPWRGD VR_ON
Come with 1.5VDUAL PGOOD +12V
*6 +3V
Come with +3V,+12V and gated ISL95818
by SLP_S3#
*7
CPUPWRGD= After PWROK
*8 <Variant Name>
PLTRST# = PCH PWROK AND PCH
SYS_PWROK Title : Signal & Reset map
*9 CHIP SOCKET or SLOT
PLTRST_PROC#=PLTRST#, ASUSTek COMPUTER INC.
Engineer: Bing-jie_Wang
voltage=1V, directly connect
Size Project Name Rev
to CPU
A3 SKYLAKE CHIPSET DEMO R1.00

Date: Tuesday, October 27, 2015 Sheet 3 of 93


Switch ON/OFF

Switching Linear

Control signal Power Rail

ASP1401BMNTXG 3+2
VCORE+VCCGT 0.55 ~ 1.55V
+12V_CPU QM3054M6*1+QM3056M6*1
S0
QM3054M6*1+QM3054M6*1
+VCCIO_PG

UP1540PDDA VCCSA 1.05V(11A) +VCCIO 0.95V (5.31A)


+12V ShortPin
QM3054M6*1+QM3054M6*1 +VCCIO_PG S0 S0

+5V
+5V

UP1540PDDA
+5VSB_DUAL +1.2VDUAL 1.2V (12.87A+0.75A) VTTDDR 0.6V (0.75A)
QM3056M6 + EMB20P03A QM3054M6*1+QM3054M6*1 RT9088AGQW
S0/S3 S0/S3 S0
+VPPDDR_PGD_10
+5VSB_ATX

+VPPDDR 2.5V (2.24A)


NB671LBGQ
+5V S_SLP_S4# S0/S3

+5VSB
QM3054M6 + EMB20P03A
+5VSB_ATX S0/S3/S5/DS5

O_PWROK +1.0V_A 1.0V (7.31A) VCCST_VCCSFR


NB671LBGQ AP2306GN
+1.8V_A_PG S0/S3/S5 S0/S3
S_SLP_S4#

+5VSB_ATX

3.3V

+3VSB_ATX +3VSB 3.3V


UZ2085G-AD-TN3-R EMB45P03P
S0/S3/S5 S0/S3/S5

+3V

<Variant Name>

Title : POWER FLOW CHART


ASUSTek COMPUTER INC.
Engineer: Bing-jie_Wang
Size Project Name Rev
A3 R1.00

Date:
SKYLAKE CHIPSET
Tuesday, October 27, 2015 Sheet
DEMO
4 of 93
LGA1151C

LGA1151

B8 A5
[24] H_X16_SL1_RXP0 PEG_RXP[0] PEG_TXP[0] H_X16_SL1_TXP0 [24]
B7 A6
[24] H_X16_SL1_RXN0 PEG_RXN[0] PEG_TXN[0] H_X16_SL1_TXN0 [24]

C7 B4
[24] H_X16_SL1_RXP1 PEG_RXP[1] PEG_TXP[1] H_X16_SL1_TXP1 [24]
C6 B5
[24] H_X16_SL1_RXN1 PEG_RXN[1] PEG_TXN[1] H_X16_SL1_TXN1 [24]

D6 C3
[24] H_X16_SL1_RXP2 PEG_RXP[2] PEG_TXP[2] H_X16_SL1_TXP2 [24]
D5 C4
[24] H_X16_SL1_RXN2 PEG_RXN[2] PEG_TXN[2] H_X16_SL1_TXN2 [24]

E5 D2
[24] H_X16_SL1_RXP3 PEG_RXP[3] PEG_TXP[3] H_X16_SL1_TXP3 [24]
E4 D3
[24] H_X16_SL1_RXN3 PEG_RXN[3] PEG_TXN[3] H_X16_SL1_TXN3 [24]

F6 E1
[24] H_X16_SL1_RXP4 PEG_RXP[4] PEG_TXP[4] H_X16_SL1_TXP4 [24]
F5 E2
[24] H_X16_SL1_RXN4 PEG_RXN[4] PEG_TXN[4] H_X16_SL1_TXN4 [24]

G5 F2
[24] H_X16_SL1_RXP5 PEG_RXP[5] PEG_TXP[5] H_X16_SL1_TXP5 [24]
G4 F3
[24] H_X16_SL1_RXN5 PEG_RXN[5] PEG_TXN[5] H_X16_SL1_TXN5 [24]

H6 G1
[24] H_X16_SL1_RXP6 PEG_RXP[6] PEG_TXP[6] H_X16_SL1_TXP6 [24]
H5 G2
[24] H_X16_SL1_RXN6 PEG_RXN[6] PEG_TXN[6] H_X16_SL1_TXN6 [24]

J5 H2
[24] H_X16_SL1_RXP7 PEG_RXP[7] PEG_TXP[7] H_X16_SL1_TXP7 [24]
J4 H3
[24] H_X16_SL1_RXN7 PEG_RXN[7] PEG_TXN[7] H_X16_SL1_TXN7 [24]

K6 J1
[24] H_X16_SL1_RXP8 PEG_RXP[8] PEG_TXP[8] H_X16_SL1_TXP8 [24]
K5 J2
[24] H_X16_SL1_RXN8 PEG_RXN[8] PEG_TXN[8] H_X16_SL1_TXN8 [24]

L5 K2
[24] H_X16_SL1_RXP9 PEG_RXP[9] PEG_TXP[9] H_X16_SL1_TXP9 [24]
L4 K3
[24] H_X16_SL1_RXN9 PEG_RXN[9] PEG_TXN[9] H_X16_SL1_TXN9 [24]

M6 L1
[24] H_X16_SL1_RXP10 PEG_RXP[10] PEG_TXP[10] H_X16_SL1_TXP10 [24]
M5 L2
[24] H_X16_SL1_RXN10 PEG_RXN[10] PEG_TXN[10] H_X16_SL1_TXN10 [24]

N5 M2
[24] H_X16_SL1_RXP11 PEG_RXP[11] PEG_TXP[11] H_X16_SL1_TXP11 [24]
N4 M3
[24] H_X16_SL1_RXN11 PEG_RXN[11] PEG_TXN[11] H_X16_SL1_TXN11 [24]

P6 N1
[24] H_X16_SL1_RXP12 PEG_RXP[12] PEG_TXP[12] H_X16_SL1_TXP12 [24]
P5 N2
[24] H_X16_SL1_RXN12 PEG_RXN[12] PEG_TXN[12] H_X16_SL1_TXN12 [24]

R5 P2
[24] H_X16_SL1_RXP13 PEG_RXP[13] PEG_TXP[13] H_X16_SL1_TXP13 [24]
R4 P3
[24] H_X16_SL1_RXN13 PEG_RXN[13] PEG_TXN[13] H_X16_SL1_TXN13 [24]

T6 R2
[24] H_X16_SL1_RXP14 PEG_RXP[14] PEG_TXP[14] H_X16_SL1_TXP14 [24]
T5 R1
[24] H_X16_SL1_RXN14 PEG_RXN[14] PEG_TXN[14] H_X16_SL1_TXN14 [24]

U5 T2
[24] H_X16_SL1_RXP15 PEG_RXP[15] PEG_TXP[15] H_X16_SL1_TXP15 [24]
U4 T3
[24] H_X16_SL1_RXN15 PEG_RXN[15] PEG_TXN[15] H_X16_SL1_TXN15 [24]
VCCIO

HR52 1 2 L7
PEG_RCOMP
24.9Ohm H_PEG_RCOMP
PLACE HR52 Inside CPU Cavity
Trace W/S: 12/15 mils, Length: 400mils

Y3 AC2
[29] H_DMI_RXP0 DMI_RXP[0] DMI_TXP[0] H_DMI_TXP0 [29]
Y4 AC1
[29] H_DMI_RXN0 DMI_RXN[0] DMI_TXN[0] H_DMI_TXN0 [29]

AA4 AD3
[29] H_DMI_RXP1 DMI_RXP[1] DMI_TXP[1] H_DMI_TXP1 [29]
AA5 AD2
[29] H_DMI_RXN1 DMI_RXN[1] DMI_TXN[1] H_DMI_TXN1 [29]

AB4 AE2
[29] H_DMI_RXP2 DMI_RXP[2] DMI_TXP[2] H_DMI_TXP2 [29]
AB3 AE1
[29] H_DMI_RXN2 DMI_RXN[2] DMI_TXN[2] H_DMI_TXN2 [29]

AC4 AF2
[29] H_DMI_RXP3 DMI_RXP[3] DMI_TXP[3] H_DMI_TXP3 [29]
AC5 AF3
[29] H_DMI_RXN3 DMI_RXN[3] DMI_TXN[3] H_DMI_TXN3 [29]

SOCKET1151
12001-00180300
REV = <REV>

Title : LGA1150 (DMI/PEG)

ASUSTek Computer Inc.


Engineer: Bing-jie_Wang
Size Project Name Rev
A3 SKYLAKE CHIPSET DEMO R1.00

Date: Tuesday, October 27, 2015 Sheet 5 of 93


LGA1151D
LGA1151
C21 E10 1 HT1
[20] H_DVI_TXDP2 DDI1_TXP[0] EDP_TXP[0]
D21 D10 1 HT2
[20] H_DVI_TXDN2 DDI1_TXN[0] EDP_TXN[0]
D22 D9 1 HT3
[20] H_DVI_TXDP1 DDI1_TXP[1] EDP_TXP[1]
E22 C9 1 HT4
DVI [20] H_DVI_TXDN1 DDI1_TXN[1] EDP_TXN[1]
B23 H10
[20] H_DVI_TXDP0 DDI1_TXP[2] EDP_TXN[2] H_DP2VGA_TXN0 [21]
A23 G10
[20] H_DVI_TXDN0 DDI1_TXN[2] EDP_TXP[2] H_DP2VGA_TXP0 [21]
C23 G9
[20] H_DVI_TXCP DDI1_TXP[3] EDP_TXN[3] H_DP2VGA_TXN1 [21]
D23 F9
[20] H_DVI_TXCN DDI1_TXN[3] EDP_TXP[3] H_DP2VGA_TXP1 [21] DP to VGA IC
/X/1151 HT9 1 B13 D12
DDI1_AUXP EDP_AUXP H_DP2VGA_AUXP [21]
/X/1151 HT10 1 C13 E12
DDI1_AUXN EDP_AUXN H_DP2VGA_AUXN [21]

B18
DDI2_TXP[0]
A18
DDI2_TXN[0]
D18 D14 1 HT5 VCCIO
DDI2_TXP[1] EDP_DISP_UTIL
HDMI E18 H_EDP_DISP_UTIL
DDI2_TXN[1]
C19
DDI2_TXP[2]
D19 M9 HR61 1 2
DDI2_TXN[2] EDP_RCOMP
D20 H_DP_RCOMP 24.9Ohm
DDI2_TXP[3]
E20 Place Inside CPU Cavity
DDI2_TXN[3]
traace W/S:12/25, max lengtch 200mil
A12
DDI2_AUXP
B12
DDI2_AUXN

B14
DDI3_TXP[0]
A14
DDI3_TXN[0]
C15
DDI3_TXP[1]
DP B15
DDI3_TXN[1]
B16
DDI3_TXP[2]
A16
DDI3_TXN[2]
C17
DDI3_TXP[3]
B17
DDI3_TXN[3]
V3 I
PROC_AUDIO_CLK S_HDA_SCLK [31]
B11 V2 I 33Ohm
DDI3_AUXP PROC_AUDIO_SDI S_HDA_SDO_R [31]
C11 U1 O 1 2
DDI3_AUXN PROC_AUDIO_SDO H_HDA_SDI [31]
H_HDA_SDI_R
HR1 place close CPU HR1
SOCKET1151 total lengtch <4,max=200
12001-00180300 REV = <REV> total lengtch >4,max=1000

Title : LGA1150 (FDI/DISPLAY)


ASUSTek Computer Inc.
Engineer: Bing-jie_Wang
Size Project Name Rev
A3 SKYLAKE CHIPSET DEMO R1.02A

Date: Tuesday, October 27, 2015 Sheet 6 of 93


Channel A
4 Layer routing

[13] D4_DQ_A[0:63]

LGA1151A
LGA1151
AE38 AW18
DDR0_DQ[0] DDR0_CKP[0] D4_MA_CLK0 [13]
D4_DQ_A5 AE37 AV18
DDR0_DQ[1] DDR0_CKN[0] D4_MA_CLK#0 [13]
D4_DQ_A1 AG38 AW17
DDR0_DQ[2] DDR0_CKP[1] D4_MA_CLK1 [13]
D4_DQ_A2 AG37 AY17
DDR0_DQ[3] DDR0_CKN[1] D4_MA_CLK#1 [13]
D4_DQ_A3 AE39 AW16
DDR0_DQ[4] DDR0_CKP[2]
D4_DQ_A4 AE40 AV16
DDR0_DQ[5] DDR0_CKN[2]
D4_DQ_A0 AG39 AT16
DDR0_DQ[6] DDR0_CKP[3]
D4_DQ_A6 AG40 AU16
DDR0_DQ[7] DDR0_CKN[3]
D4_DQ_A7 AJ38
DDR0_DQ[8]
D4_DQ_A13 AJ37 AY24
DDR0_DQ[9] DDR0_CKE[0] D4_CKE_A0 [13]
D4_DQ_A9 AL38 AW24
DDR0_DQ[10] DDR0_CKE[1] D4_CKE_A1 [13]
D4_DQ_A10 AL37 AV24
DDR0_DQ[11] DDR0_CKE[2]
D4_DQ_A11 AJ40 AV25
DDR0_DQ[12] DDR0_CKE[3]
D4_DQ_A8 AJ39
DDR0_DQ[13]
D4_DQ_A12 AL39 AW12
DDR0_DQ[14] DDR0_CS#[0] D4_CS_A#0 [13]
D4_DQ_A14 AL40 AU11
DDR0_DQ[15] DDR0_CS#[1] D4_CS_A#1 [13]
D4_DQ_A15 AN38 AV13
DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2]
D4_DQ_A21 AN40 AV10
DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3]
D4_DQ_A16 AR38
DDR0_DQ[18]/DDR0_DQ[34]
D4_DQ_A18 AR37 AW11
DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] D4_ODT_A0 [13]
D4_DQ_A19 AN39 AU14
DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] D4_ODT_A1 [13]
D4_DQ_A20 AN37 AU12
DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2]
D4_DQ_A17 AR39 AY10
DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3]
D4_DQ_A22 AR40
DDR0_DQ[23]/DDR0_DQ[39]
D4_DQ_A23 AW37 AY13
DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0] /DDR0_CAB[4]/DDR0_BA[0] D4_BAA0 [13]
D4_DQ_A25 AU38 AV15
DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1] /DDR0_CAB[6]/DDR0_BA[1] D4_BAA1 [13]
D4_DQ_A28 AV35 AW23
DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2] /DDR0_CAA[5]/DDR0_BG[0] D4_BGA0 [13]
D4_DQ_A27 AW35
DDR0_DQ[27]/DDR0_DQ[43] D4_MAA[0:16] [13]
D4_DQ_A31 AU37 AW13
DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS# /DDR0_CAB[3]/DDR0_MA[16]
D4_DQ_A29 AV37 AV14 D4_MAA16
DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE# /DDR0_CAB[2]/DDR0_MA[14]
D4_DQ_A24 AT35 AY11 D4_MAA14
DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS# /DDR0_CAB[1]/DDR0_MA[15]
D4_DQ_A30 AU35 D4_MAA15
DDR0_DQ[31]/DDR0_DQ[47]
D4_DQ_A26 AY8 AW15
DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0] /DDR0_CAB[9]/DDR0_MA[0]
D4_DQ_A32 AW8 AU18 D4_MAA0
DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1] /DDR0_CAB[8]/DDR0_MA[1]
D4_DQ_A36 AV6 AU17 D4_MAA1
DDR0_DQ[34]/DDR1_DQ[2] /DDR0_CAB[5]/DDR0_MA[2]
D4_DQ_A34 AU6 DDR0_MA[2] AV19 D4_MAA2
DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3]
D4_DQ_A35 AU8 AT19 D4_MAA3
DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4]
D4_DQ_A33 AV8 AU20 D4_MAA4
DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5] /DDR0_CAA[0]/DDR0_MA[5]
D4_DQ_A37 AW6 AV20 D4_MAA5
DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6] /DDR0_CAA[2]/DDR0_MA[6]
D4_DQ_A39 AY6 AU21 D4_MAA6
DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7] /DDR0_CAA[4]/DDR0_MA[7]
D4_DQ_A38 AY4 AT20 D4_MAA7
DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8] /DDR0_CAA[3]/DDR0_MA[8]
D4_DQ_A44 AV4 AT22 D4_MAA8
DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9] /DDR0_CAA[1]/DDR0_MA[9]
D4_DQ_A40 AT1 AY14 D4_MAA9
DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10] /DDR0_CAB[7]/DDR0_MA[10]
D4_DQ_A47 AT2 AU22 D4_MAA10
DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11] /DDR0_CAA[7]/DDR0_MA[11]
D4_DQ_A43 AV3 AV22 D4_MAA11
DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12] /DDR0_CAA[6]/DDR0_MA[12]
D4_DQ_A41 AW4 AV12 D4_MAA12
DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13] /DDR0_CAB[0]/DDR0_MA[13]
D4_DQ_A45 AT4 AV23 D4_MAA13
DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14] /DDR0_CAA[9]/DDR0_BG[1] D4_BGA1 [13]
D4_DQ_A46 AT3 AU24
DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15] /DDR0_CAA[8]/DDR0_ACT# D4_A_ACT# [13]
D4_DQ_A42 AP2
DDR0_DQ[48]/DDR1_DQ[32]
D4_DQ_A49 AM4 AY15
DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR D4_A_PAR [13]
D4_DQ_A54 AP3 AT23
DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# D4_A_ALERT# [13]
D4_DQ_A53 AM3
DDR0_DQ[51]/DDR1_DQ[35]
D4_DQ_A50 AP4
DDR0_DQ[52]/DDR1_DQ[36]
D4_DQ_A52 AM2 AF39
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] D4_DQS_A#0 [13]
D4_DQ_A51 AP1 AK39 D4_DQS_A#0
DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] D4_DQS_A#1 [13]
D4_DQ_A48 AM1 AP39 D4_DQS_A#1
DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] D4_DQS_A#2 [13]
D4_DQ_A55 AK3 AU36 D4_DQS_A#2
DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] D4_DQS_A#3 [13]
D4_DQ_A61 AH1 AW7 D4_DQS_A#3
DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[4]/DDR1_DQSN[0] D4_DQS_A#4 [13]
D4_DQ_A63 AK4 AU3 D4_DQS_A#4
DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSN[5]/DDR1_DQSN[1] D4_DQS_A#5 [13]
D4_DQ_A60 AH2 AN3 D4_DQS_A#5
DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSN[6]/DDR1_DQSN[4] D4_DQS_A#6 [13]
D4_DQ_A59 AH4 AJ3 D4_DQS_A#6
DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSN[7]/DDR1_DQSN[5] D4_DQS_A#7 [13]
D4_DQ_A62 AK2 D4_DQS_A#7
DDR0_DQ[61]/DDR1_DQ[45]
D4_DQ_A57 AH3 AF38
DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] D4_DQS_A0 [13]
D4_DQ_A58 AK1 AK38 D4_DQS_A0
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] D4_DQS_A1 [13]
D4_DQ_A56 AP38 D4_DQS_A1
DDR0_DQSP[2]/DDR0_DQSP[4] D4_DQS_A2 [13]
AU33 AV36 D4_DQS_A2
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] D4_DQS_A3 [13]
AT33 AV7 D4_DQS_A3
DDR0_ECC[1] DDR0_DQSP[4]/DDR1_DQSP[0] D4_DQS_A4 [13]
AW33 AU2 D4_DQS_A4
DDR0_ECC[2] DDR0_DQSP[5]/DDR1_DQSP[1] D4_DQS_A5 [13]
AV31 AN2 D4_DQS_A5
DDR0_ECC[3] DDR0_DQSP[6]/DDR1_DQSP[4] D4_DQS_A6 [13]
AU31 AJ2 D4_DQS_A6
DDR0_ECC[4] DDR0_DQSP[7]/DDR1_DQSP[5] D4_DQS_A7 [13]
AV33 D4_DQS_A7
DDR0_ECC[5]
AW31 AV32
DDR0_ECC[6] DDR0_DQSP[8]
AY31 AU32
DDR0_ECC[7] DDR0_DQSN[8]

DDR CHANNEL A

SOCKET1151

12001-00180300

Title : LGA1151 (DDR4_A Control)


ASUSTek Computer Inc.
Engineer: Bing-jie_Wang
Size Project Name Rev
A3 SKYLAKE CHIPSET DEMO R1.00

Date: Tuesday, October 27, 2015 Sheet 7 of 93


Follow CRB

Channel B
4 Layer routing

[14] D4_DQ_B[0:63]

LGA1151B
LGA1151
AD34 AM20
DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] D4_MB_CLK0 [14]
D4_DQ_B4 AD35 AM21
DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] D4_MB_CLK#0 [14]
D4_DQ_B5 AG35 AP22
DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[1] D4_MB_CLK1 [14]
D4_DQ_B7 AH35 AP21
DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKN[1] D4_MB_CLK#1 [14]
D4_DQ_B3 AE35 AN20
DDR1_DQ[4]/DDR0_DQ[20] DDR1_CKP[2]
D4_DQ_B1 AE34 AN21
DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKN[2]
D4_DQ_B0 AG34 AP19
DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKP[3]
D4_DQ_B6 AH34 AP20
DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKN[3]
D4_DQ_B2 AK35
DDR1_DQ[8]/DDR0_DQ[24]
D4_DQ_B13 AL35 AY29
DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] D4_CKE_B0 [14]
D4_DQ_B9 AK32 AV29
DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] D4_CKE_B1 [14]
D4_DQ_B14 AL32 AW29
DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2]
D4_DQ_B15 AK34 AU29
DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3]
D4_DQ_B12 AL34
DDR1_DQ[13]/DDR0_DQ[29]
D4_DQ_B8 AK31 AP17
DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] D4_CS_B#0 [14]
D4_DQ_B10 AL31 AN15
DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] D4_CS_B#1 [14]
D4_DQ_B11 AP35 AN17
DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2]
D4_DQ_B16 AN35 AM15
DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3]
D4_DQ_B20 AN32
DDR1_DQ[18]/DDR0_DQ[50]
D4_DQ_B22 AP32 AM16
DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] D4_ODT_B0 [14]
D4_DQ_B23 AN34 AL16
DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] D4_ODT_B1 [14]
D4_DQ_B17 AP34 AP15
DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2]
D4_DQ_B21 AN31 AL15
DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3]
D4_DQ_B18 AP31
DDR1_DQ[23]/DDR0_DQ[55]
D4_DQ_B19 AL29 AN18
DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS# /DDR1_CAB[3]/DDR1_MA[16]
D4_DQ_B28 AM29 AL17 D4_MAB16
DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE# /DDR1_CAB[2]/DDR1_MA[14]
D4_DQ_B24 AP29 AP16 D4_MAB14
DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS# /DDR1_CAB[1]/DDR1_MA[15]
D4_DQ_B30 AR29 D4_MAB15
DDR1_DQ[27]/DDR0_DQ[59]
D4_DQ_B26 AM28 AL18
DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0] /DDR1_CAB[4]/DDR1_BA[0] D4_BAB0 [14]
D4_DQ_B25 AL28 AM18
DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1] /DDR1_CAB[6]/DDR1_BA[1] D4_BAB1 [14]
D4_DQ_B29 AR28 AW28
DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2] /DDR1_CAA[5]/DDR1_BG[0] D4_BGB0 [14]
D4_DQ_B27 AP28
DDR1_DQ[31]/DDR0_DQ[63] D4_MAB[0:16] [14]
D4_DQ_B31 AR12 AL19
DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0] /DDR1_CAB[9]/DDR1_MA[0]
D4_DQ_B32 AP12 AL22 D4_MAB0
DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1] /DDR1_CAB[8]/DDR1_MA[1]
D4_DQ_B33 AM13 AM22 D4_MAB1
DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2] /DDR1_CAB[5]/DDR1_MA[2]
D4_DQ_B38 AL13 AM23 D4_MAB2
DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3]
D4_DQ_B34 AR13 AP23 D4_MAB3
DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4]
D4_DQ_B36 AP13 AL23 D4_MAB4
DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5] /DDR1_CAA[0]/DDR1_MA[5]
D4_DQ_B37 AM12 AW26 D4_MAB5
DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6] /DDR1_CAA[2]/DDR1_MA[6]
D4_DQ_B39 AL12 AY26 D4_MAB6
DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7] /DDR1_CAA[4]/DDR1_MA[7]
D4_DQ_B35 AP10 AU26 D4_MAB7
DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8] /DDR1_CAA[3]/DDR1_MA[8]
D4_DQ_B44 AR10 AW27 D4_MAB8
DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9] /DDR1_CAA[1]/DDR1_MA[9]
D4_DQ_B45 AR7 AP18 D4_MAB9
DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10] /DDR1_CAB[7]/DDR1_MA[10]
D4_DQ_B46 AP7 AU27 D4_MAB10
DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11] /DDR1_CAA[7]/DDR1_MA[11]
D4_DQ_B42 AR9 AV27 D4_MAB11
DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12] /DDR1_CAA[6]/DDR1_MA[12]
D4_DQ_B41 AP9 AR15 D4_MAB12
DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13] /DDR1_CAB[0]/DDR1_MA[13]
D4_DQ_B40 AR6 AY28 D4_MAB13
DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14] /DDR1_CAA[9]/DDR1_BG[1] D4_BGB1 [14]
D4_DQ_B47 AP6 AU28
DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15] /DDR1_CAA[8]/DDR1_ACT# D4_B_ACT# [14]
D4_DQ_B43 AM10
DDR1_DQ[48]
D4_DQ_B52 AL10 AL20
DDR1_DQ[49] DDR1_PAR D4_B_PAR [14]
D4_DQ_B53 AM7 AY25
DDR1_DQ[50] DDR1_ALERT# D4_B_ALERT# [14]
D4_DQ_B55 AL7
DDR1_DQ[51]
D4_DQ_B51 AM9
DDR1_DQ[52]
D4_DQ_B48 AL9 AF34
DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] D4_DQS_B#0 [14]
D4_DQ_B49 AM6 AK33
DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] D4_DQS_B#1 [14]
D4_DQ_B54 AL6 AN33
DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] D4_DQS_B#2 [14]
D4_DQ_B50 AJ6 AN29
DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] D4_DQS_B#3 [14]
D4_DQ_B61 AJ7 AN13
DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] D4_DQS_B#4 [14]
D4_DQ_B56 AE6 AR8
DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] D4_DQS_B#5 [14]
D4_DQ_B63 AF7 AM8
DDR1_DQ[59] DDR1_DQSN[6] D4_DQS_B#6 [14]
D4_DQ_B58 AH7 AG6
DDR1_DQ[60] DDR1_DQSN[7] D4_DQS_B#7 [14]
D4_DQ_B60 AH6
DDR1_DQ[61]
D4_DQ_B57 AE7 AF35
DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] D4_DQS_B0 [14]
D4_DQ_B59 AF6 AL33
DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] D4_DQS_B1 [14]
D4_DQ_B62 AP33
DDR1_DQSP[2]/DDR0_DQSP[6] D4_DQS_B2 [14]
AR25 AN28
DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] D4_DQS_B3 [14]
AR26 AN12
DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] D4_DQS_B4 [14]
AM26 AP8
DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] D4_DQS_B5 [14]
AM25 AL8
DDR1_ECC[3] DDR1_DQSP[6] D4_DQS_B6 [14]
AP26 AG7
DDR1_ECC[4] DDR1_DQSP[7] D4_DQS_B7 [14]
AP25
DDR1_ECC[5]
AL25 AN25
DDR1_ECC[6] DDR1_DQSP[8]
AL26 AN26
DDR1_ECC[7] DDR1_DQSN[8]

DDR CHANNEL B

AB40
DDR_VREF_CA H_D4_VREFCA_A [17]
AC40 1 HT6
DDR0_VREF_DQ
AC39 TP_DIMM_DQ0
DDR1_VREF_DQ H_D4_VREFCA_B [17]

SOCKET1151
REV = <REV>

12001-00180300
1

HC5 HC6 CRB & Z97


0.022UF/16V 0.022UF/16V High frequency
termination, can absorb
any high frequency
2

noise coming from


CPU/board crosstalk.
2

HR2 HR3
24.9Ohm 24.9Ohm

Title : LGA1151 (DDR4_B Control)


1

ASUSTek Computer Inc.


Engineer: CASPAR
GND GND
Size Project Name Rev
A3 SKYLAKE G R1.00

Date: Tuesday, October 27, 2015 Sheet 8 of 93


PLACE NEAR CPU
HR91 /X
1 1KOhm 2
VCCST_VCCSFR H_CFG0
HR92 /X
1 1KOhm 2
HC3 0.1UF/16V H_CFG1
1 2 LGA1151E HR93 /X
HC24 4.7UF/6.3V 1 1KOhm 2
LGA1151
1 2
N/A mbs_c0603 I W5 H15 IPU H_CFG2
[27] CK_100M_PCHOP BCLKP CFG[0] H_CFG0 [12]
I W4 F15 IPU H_CFG0 HR95 /X
[27] CK_100M_PCHON BCLKN CFG[1] H_CFG1 [12]
F16 IPU H_CFG1 1 1KOhm 2
CFG[2] H_CFG2 [12]
HR209 GND I W1 H16 IPU H_CFG2 HR94 H_CFG3
[27] CK_100M_PCIBCLKP PCI_BCLKP CFG[3] H_CFG3 [12]
I W2 F19 IPU H_CFG3
[27] CK_100M_PCIBCLKN PCI_BCLKN CFG[4] H_CFG4 [12] [12] XDP_PCUDEBUG
2 56.2Ohm 1 H_SVID_ALERT# H18 IPU H_CFG4 2 1
CFG[5] HR96
1 2 I K9 G21 IPU H_CFG5_R /X 1KOhm
[27] CK_24M_NSCCCLKP CLK24P CFG[6] H_CFG6 [12]
HR210 H_SVID_DATA I J9 H20 IPU H_CFG6 1KOhm
[27] CK_24M_NSCCCLKN CLK24N CFG[7] H_CFG7 [12]
100Ohm G16 IPU H_CFG7 H_CFG4 2 1
CFG[8] H_CFG8 [12]
follow CRB E16 IPU H_CFG8
CFG[9] H_CFG9 [12]
F17 IPU H_CFG9 1 2
CFG[10] H_CFG10 [12]
H17 IPU H_CFG10 H_CFG5_R HR98 1KOhm /X
CFG[11] H_CFG11 [12]
G20 IPU H_CFG11
CFG[12] H_CFG12 [12]
F20 IPU H_CFG12
CFG[13] H_CFG13 [12]
F21 IPU H_CFG13
CFG[14] H_CFG14 [12]
VCCST_VCCSFR HR208 I E39 H19 IPU H_CFG14 HR99 /X
[79] H_SVID_ALERT# VIDALERT# CFG[15] H_CFG15 [12]
2 220Ohm 1 H_SVID_ALERT#_R OD E38 H_CFG15 1 1KOhm 2
[79] H_SVID_CLK VIDSCK
I/O E40 F14 IPU H_CFG6
[79] H_SVID_DATA VIDSOUT CFG[17] H_CFG17 [12]
1 2 H_SVID_DATA I/OD C39 E14 IPU H_CFG17
[30,79] P_VCORE_VRHOT#_R_10 PROCHOT# CFG[16] H_CFG16 [12]
HR201 51Ohm /X/XDP/MERG HR218 499Ohm H_PROCHOT#_R F18 IPU H_CFG16 HR191 /X
CFG[19] H_CFG19 [12]
2 1 H_PREQ# O AC36 G18 IPU H_CFG19 1 1KOhm 2
[84] H_DDR_VTT_CNTL DDR_VTT_CNTL CFG[18] H_CFG18 [12]
unstuff HR201 for merged XDP O AC38 H_CFG18 H_CFG7
/X/1151 HT135 ZVM#
1 H_ZVM# AC37 D16 I/O IPU
/X/1151 HT90 RSVD_AC37 BPM#[0] SKL_XDP_MBP_0 [12]
1 D17 I/O IPU
BPM#[1] SKL_XDP_MBP_1 [12]
HR202 1KOhm G14 I/O IPU 1 HT7 /X/1151
BPM#[2]
2 1 P_VCORE_VRHOT#_R_10 I U2 H14 I/O IPU H_MBP#2 1 HT8 /X/1151
HR203 [38] S_VCCST_PWRGD VCCST_PWRGD BPM#[3]
S_VCCST_PWRGD H_MBP#3
I F8
[12,31] H_CPUPWRGD PROCPWRGD
2 1 H_THERMTRIP# H_CPUPWRGD I E7 H13 O
OD
[12,30] H_CPURST# RESET# PROC_TDO H_TDO [12]
place HR203 close to SPT-H H_CPURST# I E8 G12 I IPU H_TDO
1KOhm [30] S_PM_SYNC PM_SYNC PROC_TDI H_TDI [12]
HR217 1 2 O D8 F13 I IPU
[30] H_PM_DOWN PM_DOWN PROC_TMS H_TMS [12]
ESDC2 1000PF/50V /X 20OHM H_PM_DOWN_R I/O G7 F11 I
[47] O_H_PECI PECI PROC_TCK H_TCK [12]
OD D11 H_TCK
[30] H_THERMTRIP# THERMTRIP#
1 2 H_CPUPWRGD H_THERMTRIP# F12 I
PROC_TRST# H_TRST# [12]
ESDC3 1000PF/50V /X AB35 B9 I IPU
[32,47] H_SKTOCC# SKTOCC# PROC_PREQ# H_PREQ# [12]
AB36 B10 OD H_PREQ#
PROC_SELECT# PROC_PRDY# H_PRDY# [12]
1 2 H_CPURST# H_SKL_CNL#_R
ESDC4 1000PF/50V /X /X/1151 1 IPU OD D13
CATERR#
HT14 H_CATERR# M11
CFG_RCOMP
1 2 H_PROCHOT#_R H_CFG_RCOMP
ESDC5 1000PF/50V N/A

1
HR90
1 2 S_VCCST_PWRGD 49.9Ohm
SOCKET1151
12001-00180300REV = <REV>

2
GND

VCCIO
GND
CRB is 1.2Mohm
HR90 PLACE INSIDE CAVITY
1KOhm MAX trace lengtch 200mil
HR22 1 2 /X ALL CFG 1 = NO TERMAINATION ON BOARD DEFAULT HIGH
H_SKL_CNL#_R ALL CFG 0 = PHYSICAL STRAP LOW ON BOARD
Skylake Strap Table Rev 0.85
All Have Internal Pull-Ups +VCCIO
to +VCCIO PWM REFIN CFG H = 1 L = 0 Description
1 : SKL CPU 0 Normal STALL EAR GND
0 : CNL CPU 1 Reserved
2 Normal Lane Reverse PCIEX16 Lane Reversal
3 Reserved
4 disable enable eDP
5 PCIE Config PCIE Config SEL[0]
6 PCIE Config PCIE Config SEL[1]
7 RESET# BIOS REQ H_TCK TERMINATION (HR127)
8-19 Reserved PLACE HR131 CLOSER TO CPU HR127 PLACE NEAR CPU WITHIN 1.1 INCH

HR97
‧ CFG[0]: Stall reset sequence after PCU PLL lock until VCCST_VCCSFR H_TCK
de-asserted:

1
[12] H_CFG5 - 1 = (Default) Normal Operation; No stall.
2 1 H_CFG5_R - 0 = Stall. HR127
‧ CFG[1]: Reserved configuration lane. 51Ohm

1
1KOhm ‧ CFG[2]: PCI Express* Static x16 Lane Numbering Reversal.
- 1 = Normal operation HR131 /XDP
- 0 = Lane numbers reversed. 51Ohm 5%

2
‧ CFG[3]: Reserved configuration lane.
‧ CFG[4]: eDP enable: 5%
/XDP
- 1 = Disabled. /X/XDP

2
- 0 = Enabled.
‧ CFG[6:5]: PCI Express* Bifurcation GND
- 00 = 1 x8, 2 x4 PCI Express* H_TDO
- 01 = reserved
- 10 = 2 x8 PCI Express*
- 11 = 1 x16 PCI Express*
‧ CFG[7]: PEG Training:
- 1 = (default) PEGTrain immediately following RESET#
de-assertion.
- 0 = PEG Wait for BIOS for training.
‧ CFG[19:8]: Reserved configuration lanes.

Title : LGA1151 (Control)

ASUSTek Computer Inc.


Engineer: Morse_Peng
Size Project Name Rev
A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 9 of 93


VCORE VCORE
LGA1151I
LGA1151
VCCSA VDDQ
LGA1151K A25 H32
VCC_A25 VCC_H32
LGA1151
A26 J21
VCC_A26 VCC_J21
AA7 AT18 A27 F32
VCCSA1 VDDQ_AT18 VCC_A27 VCC_F32
AB6 AT21 A28 F33
VCCSA2 VDDQ_AT21 VCC_A28 VCC_F33
AB7 AU13 A29 F34
VCCSA3 VDDQ_AU13 VCC_A29 VCC_F34
AB8 AU15 A30 G23
VCCSA4 VDDQ_AU15 VCC_A30 VCC_G23
AC7 AU19 B25 G24
VCCSA5 VDDQ_AU19 VCC_B25 VCC_G24
AC8 AU23 B27 G25
VCCSA6 VDDQ_AU23 VCC_B27 VCC_G25
N7 AV11 B29 G26
VCCSA7 VDDQ_AV11 VCC_B29 VCC_G26
P7 AV17 B31 G27
VCCSA8 VDDQ_AV17 VCC_B31 VCC_G27
R7 AV21 B32 G28
VCCSA9 VDDQ_AV21 VCC_B32 VCC_G28
T7 AW10 B33 G29
VCCSA10 VDDQ_AW10 VCC_B33 VCC_G29
U7 AW14 B34 J22
VCCSA11 VDDQ_AW14 VCC_B34 VCC_J22
Y6 AW25 B35 J23
VCCSA12 VDDQ_AW25 VCC_B35 VCC_J23
Y7 AY12 B36 J24
VCCSA13 VDDQ_AY12 VCC_B36 VCC_J24
Y8 AY16 VDDQ B37 J25
VCCSA14 VDDQ_AY16 VCC_B37 VCC_J25
W7 AY18 C25 J26
VCCSA15 VDDQ_AY18 VCC_C25 VCC_J26
V7 AY23 C26 J27
VCCSA16 VDDQ_AY23 VCC_C26 VCC_J27
VCCIO AA6 C27 J28
VCCSA17 VCC_C27 VCC_J28
AJ9 C28 J29
VCCPLL_OC VCC_C28 VCC_J29
+VCCSFR_OC_R C29 J30
VCC_C29 VCC_J30

1
AK11 HC12 close to AJ9 HC12 C30 J31
VCCIO1 VCC_C30 VCC_J31
AK14 1UF/10V C32 K16
VCCIO2 VCC_C32 VCC_K16
AK24 mbs_c0603 C34 K18
VCCIO3 VCC_C34 VCC_K18

2
AJ23 /X C36 K20
VCCIO4 VCC_C36 VCC_K20
M8 D25 K21
VCCIO5 VCC_D25 VCC_K21
P8 GND D27 K23
VCCIO6 VCC_D27 VCC_K23
T8 D29 K25
VCCIO7 VCC_D29 VCC_K25
U8 VCC_EDRAM D31 K27
VCCIO8 VCC_D31 VCC_K27
W8 D32 K29
VCCIO9 VCC_D32 VCC_K29
AJ30 1 HT137 /X/1151 D33 K31
VCCOPC_AJ30 VCC_D33 VCC_K31
VCCST_VCCSFR AJ27 D34 L14
VCCOPC_AJ27 VCC_D34 VCC_L14
AJ28 D35 L15
VCCOPC_AJ28 VCC_D35 VCC_L15
V5 AJ29 D36 L16
VCCST_V5 VCCOPC_AJ29 VCC_D36 VCC_L16
V6 AK27 E24 L17
VCCST_V6 VCCOPC_AK27 VCC_E24 VCC_L17
VCC_EOPIO E25 L18
VCC_E25 VCC_L18
V4 E26 L19
VCCPLL VCC_E26 VCC_L19
AJ25 1 HT138 /X/1151 E27 L20
VCCEOPIO1 VCC_E27 VCC_L20
AJ26 E28 L21
VCCEOPIO2 VCC_E28 VCC_L21
+1.8V_A_EDRAM E29 L22
VCC_E29 VCC_L22
EDRAM_FUSEPRG E30 L23
VCC_E30 VCC_L23
AB37 1 HT139 /X/1151 E32 L24
VCC_OPC_1P8_AB37 VCC_E32 VCC_L24
AB38 1 HT140 /X/1151 E34 L25
VCC_OPC_1P8_AB38 VCC_E34 VCC_L25
E36 L26
VCC_E36 VCC_L26
F23 L27
VCC_F23 VCC_L27
1 AD5 F24 L28
NP_NC1 VCCSA_SENSE H_VCCSA_VCC_SENSE [82] VCC_F24 VCC_L28
2 AF4 F25 L29
NP_NC2 VCCIO_SENSE H_VCCIO_VCC_SENSE [83] VCC_F25 VCC_L29
3 AE4 F27 L30
NP_NC3 VSS_SAIO_SENSE H_SAIO_VSS_SENSE [82,83] VCC_F27 VCC_L30
4 F29 M13
NP_NC4 VCC_F29 VCC_M13
5 F31 M14
NP_NC5 VCC_F31 VCC_M14
6 AK21 1 HT130 /X/1151 G30 M16
NP_NC6 VCCOPC_SENSE VCC_G30 VCC_M16
7 AJ24 1 HT131 /X/1151 G32 M18
NP_NC7 VCCEOPIO_SENSE VCC_G32 VCC_M18
AK22 1 HT132 /X/1151 H22 M20
VSSOPC_EOPIO_SENSE VCC_H22 VCC_M20
H23 M22
VCC_H23 VCC_M22
H25 M24
VCC_H25 VCC_M24
H27 M26
VCC_H27 VCC_M26
SOCKET1151 H29 M28
VCC_H29 VCC_M28
12001-00180300 H31 M30
REV = <REV> VCC_H31 VCC_M30

AJ11 AJ12
VCC_AJ11 VCC_AJ12
LGA1151L AJ13 AJ14
VCC_AJ13 VCC_AJ14
LGA1151 AJ15 AJ16
VCC_AJ15 VCC_AJ16
/X/1151 HT101 1 J8 H11 1 HT107 /X/1151 AJ17 AJ18
RSVD_TP_J8 RSVD_TP_H11 VCC_AJ17 VCC_AJ18
/X/1151 HT102 1 J7 H12 1 HT108 /X/1151 AJ19 AJ20
RSVD_TP_J7 RSVD_TP_H12 VCC_AJ19 VCC_AJ20
/X/1151 HT103 1 L8 AJ21 AJ22 VCCSA
RSVD_TP_L8 VCC_AJ21 VCC_AJ22
/X/1151 HT104 1 K8 AW38
RSVD_TP_K8 RSVD_TP_AW38
AV39 C38
RSVD_TP_AV39 VCC_SENSE
AV1 D38
RSVD_TP_AV1 VSS_SENSE
AW2 AU39
RSVD_TP_AW2 RSVD_AU39

1
AU40 HC13 HC14 HC15 HC31
RSVD_AU40
H8 1UF/10V 1UF/10V 0.1UF/16V 0.1UF/16V
VSS372
AT15 mbs_c0603 mbs_c0603 /X /X
VSS_AT15

2
/X/1151 HT121 1 K10 SOCKET1151 /X /X
RSVD_K10
/X/1151 HT122 1 L10 AR23 12001-00180300
RSVD_L10 VSS_AR23 REV = <REV>
AR22
VSS_AR22 [79] H_VSS_SENSE
/X/1151 HT123 1 J17
RSVD_J17
/X/1151 HT124 1 B39
RSVD_B39 [79] H_VCC_SENSE GND Add for VCCSA noise
/X/1151 HT125 1 J19 J15 1 HT113 /X/1151
RSVD_J19 RSVD_J15
/X/1151 HT126 1 C40 J14 1 HT114 /X/1151
RSVD_C40 RSVD_J14

G8 AU9 1 HT115 /X/1151


VSS373 RSVD_AU9
AY3 AU10 1 HT116 /X/1151
VSS374 RSVD_AU10

I D1 VCCST_VCCSFR VCCSA VCCIO


[34] S_CPU_TRIGGER PROC_TRIGIN
1 2 O B3 J13 1 HT117 /X/1151
[34] H_CPU_TRIGGER PROC_TRIGOUT RSVD_J13
HR105 20OHM
H_CPU_TRIGGER_R K13
RSVD_K13
/X/1151 HT127 1 L12 J11 1 HT118 /X/1151 X5R
RSVD_L12 RSVD_J11

1
/X/1151 HT128 1 K12 HC8 HC7 HC9 HC10 HC11 HC26 HC27 HC28
RSVD_K12
D15 1 HT119 /X/1151 10UF/6.3V 0.1UF/16V 0.1UF/16V 1UF/10V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
RSVD_D15
K11 1 HT120 /X/1151 mbs_c0603 mbs_c0603 /X mbs_c0603 /X /X /X /X
RSVD_K11 2

2
N/A N/A /X mbs_c0402_nomask mbs_c0402_nomask
1

GND SOCKET1151 HR104 Place at Socket Edge Place IN SOCKET CAVITY BOTTOM or TOP
12001-00180300 560Ohm GND GND GND
REV = <REV>
/X
GND Place IN SOCKET CAVITY BOTTOM
2

VDDQ

X5R X5R X5R X5R


Title :
1

HC16 HC17 HC18 HC19 HC20 HC21 HC22 HC23 HC25 HC29 HC30 LGA1150 (POWER)
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 0.1UF/16V 0.1UF/16V
mbs_c0603 mbs_c0603 mbs_c0603 mbs_c0603 mbs_c0805 mbs_c0805 mbs_c0805_nomask
mbs_c0805_nomask /X
mbs_c0805_nomask /X Engineer: IAN
2

ASUSTek Computer Inc.


/X /X /X /X /X /X /X /X /X
Size Project Name Rev
GND
A3 Z87-PRO R1.02A
GND Fixed placement
Date: Tuesday, October 27, 2015 Sheet 10 of 93
VCCGT
LGA1151G LGA1151H
LGA1151F
A11 AK29 AR24 C37 K39 LGA1151J 1 HT136 /X/1151
VSS1 VSS79 VSS156 VSS236 VSS316
A13 AK30 AR27 C5 K4 LGA1151
VSS2 VSS80 VSS157 VSS237 VSS317
A15 AK36 AR3 C8 K7 AA34 F35
VSS3 VSS81 VSS158 VSS238 VSS318 VCCGT1 VCCGTX_F35
A17 AK37 AR30 C10 L13 AA35 G34
VSS4 VSS82 VSS159 VSS239 VSS319 VCCGT2 VCCGTX_G34
A24 AK40 AR31 D24 L3 AA36 G35
VSS5 VSS83 VSS160 VSS240 VSS320 VCCGT3 VCCGTX_G35
A7 AK5 AR32 D26 L32 AA37 H33
VSS6 VSS84 VSS161 VSS241 VSS321 VCCGT4 VCCGTX_H33
AA3 AK6 AR33 D28 L6 AA38 H34
VSS7 VSS85 VSS162 VSS242 VSS322 VCCGT5 VCCGTX_H34

LGA1151
AA33 AK7 AR34 D30 L9 AB33 J33
VSS8 VSS86 VSS163 VSS243 VSS323 VCCGT6 VCCGTX_J33
AA8 AK8 AR35 D37 M1 AB34 J35
VSS9 VSS87 VSS164 VSS244 VSS324 VCCGT7 VCCGTX_J35
AB39 AK9 AR36 D39 M10 G36 K32
VSS10 VSS88 VSS165 VSS245 VSS325 VCCGT8 VCCGTX_K32
AB5 AL1 AR4 D4 M12 G37 K34
VSS11 VSS89 VSS166 VSS246 VSS326 VCCGT9 VCCGTX_K34
AC3 AL11 AR5 D7 M15 G38 L31
VSS12 VSS90 VSS167 VSS247 VSS327 VCCGT10 VCCGTX_L31
AC33 AL14 AT10 E11 M17 G39 L33
VSS13 VSS91 VSS168 VSS248 VSS328 VCCGT11 VCCGTX_L33
AC34 AL2 AT11 E13 M19 G40 M32
VSS14 VSS92 VSS169 VSS249 VSS329 VCCGT12 VCCGTX_M32
AC35 AL21 AT12 E15 M21 H36
VSS15 VSS93 VSS170 VSS250 VSS330 VCCGT13
AC6 AL24 AT13 E17 M23 H38
VSS16 VSS94 VSS171 VSS251 VSS331 VCCGT14
AD1 AL27 AT14 E19 M25 H40
VSS17 VSS95 VSS172 VSS252 VSS332 VCCGT15
AD33 AL3 AT17 E21 M27 J36
VSS18 VSS96 VSS173 VSS253 VSS333 VCCGT16
AD36 AL30 AT24 E23 M29 J37
VSS19 VSS97 VSS174 VSS254 VSS334 VCCGT17
AD37 AL36 AT25 E3 M35 J38
VSS20 VSS98 VSS175 VSS255 VSS335 VCCGT18
AD38 AL4 AT26 E31 M37 J39
VSS21 VSS99 VSS176 VSS256 VSS336 VCCGT19
AD39 AL5 AT27 E33 M39 J40
VSS22 VSS100 VSS177 VSS257 VSS337 VCCGT20
AD4 AM11 AT28 E35 M4 K36
VSS23 VSS101 VSS178 VSS258 VSS338 VCCGT21
AD40 AM14 AT29 E37 M7 K38
VSS24 VSS102 VSS179 VSS259 VSS339 VCCGT22
AD6 AM17 AT30 E6 N3 K40
VSS25 VSS103 VSS180 VSS260 VSS340 VCCGT23
AD7 AM19 AT31 E9 N33 L34
VSS26 VSS104 VSS181 VSS261 VSS341 VCCGT24
AD8 AM24 AT32 F1 N6 L35
VSS27 VSS105 VSS182 VSS262 VSS342 VCCGT25
AE3 AM27 AT34 F10 N8 L36
VSS28 VSS106 VSS183 VSS263 VSS343 VCCGT26
AE33 AM30 AT36 F22 P1 L37
VSS29 VSS107 VSS184 VSS264 VSS344 VCCGT27
AE36 AM31 AT37 F26 P35 L38
VSS30 VSS108 VSS185 VSS265 VSS345 VCCGT28
AE5 AM32 AT38 F28 P37 L39
VSS31 VSS109 VSS186 VSS266 VSS346 VCCGT29
AE8 AM33 AT39 F30 P39 L40
VSS32 VSS110 VSS187 VSS267 VSS347 VCCGT30
AF1 AM34 AT40 F4 P4 M33
VSS33 VSS111 VSS188 VSS268 VSS348 VCCGT31
AF33 AM35 AT5 F40 R3 M34
VSS34 VSS112 VSS189 VSS269 VSS349 VCCGT32
AF36 AM36 AT6 F7 R33 M36
VSS35 VSS113 VSS190 VSS270 VSS350 VCCGT33
AF37 AM37 AT7 G11 R6 M38
VSS36 VSS114 VSS191 VSS271 VSS351 VCCGT34 P_CPU_GND_GT [79]
AF40 AM38 AT8 G13 R8 M40
VSS37 VSS115 VSS192 VSS272 VSS352 VCCGT35
AF5 AM39 AT9 G15 T1 N34
VSS38 VSS116 VSS193 VSS273 VSS353 VCCGT36
AF8 AM40 AU1 G17 T35 N35

1
VSS39 VSS117 VSS194 VSS274 VSS354 VCCGT37
AG1 AM5 AU25 G19 T37 N36 HR156
VSS40 VSS118 VSS195 VSS275 VSS355 VCCGT38
AG2 AN1 AU30 G22 T39 N37 0Ohm
VSS41 VSS119 VSS196 VSS276 VSS356 VCCGT39
AG3 AN10 AU34 G3 T4 N38
VSS42 VSS120 VSS197 VSS277 VSS357 VCCGT40 mbs_r0603
AG33 AN11 AU4 G31 U3 N39

2
VSS43 VSS121 VSS198 VSS278 VSS358 VCCGT41 /X
AG36 AN14 AU5 G33 U33 N40
VSS44 VSS122 VSS199 VSS279 VSS359 VCCGT42
AG4 AN16 AU7 G6 U6 P33
VSS45 VSS123 VSS200 VSS280 VSS360 VCCGT43
AG5 AN19 AV2 H1 V1 P34
VSS46 VSS124 VSS201 VSS281 VSS361 VCCGT44
AG8 AN22 AV26 H21 V35 P36 GND
VSS47 VSS125 VSS202 VSS282 VSS362 VCCGT45
AH33 AN23 AV28 H24 V37 P38
VSS48 VSS126 VSS203 VSS283 VSS363 VCCGT46
AH36 AN24 AV30 H26 V39 P40
VSS49 VSS127 VSS204 VSS284 VSS364 VCCGT47
AH37 AN27 AV34 H28 P_CPU_GND_GT V8 R34
VSS50 VSS128 VSS205 VSS285 VSS365 VCCGT48 P_CPU_GND_VCORE [79]
AH38 AN30 AV38 H30 W3 R35
VSS51 VSS129 VSS206 VSS286 VSS366 VCCGT49
AH39 AN36 AV5 H35 W33 R36
VSS52 VSS130 VSS207 VSS287 VSS367 VCCGT50
AH40 AN4 AV9 H37 W6 R37

1
VSS53 VSS131 VSS208 VSS288 VSS368 VCCGT51
AH5 AN5 AW3 H39 Y35 R38 HR158
VSS54 VSS132 VSS209 VSS289 VSS369 VCCGT52
AH8 AN6 AW30 H4 Y37 R39 0Ohm
VSS55 VSS133 VSS210 VSS290 VSS370 VCCGT53
AJ1 AN7 AW32 H7 Y5 R40
VSS56 VSS134 VSS211 VSS291 VSS371 VCCGT54 mbs_r0603
AJ31 AN8 AW34 H9 T33

2
VSS57 VSS135 VSS212 VSS292 VCCGT55 /X
AJ32 AN9 AW36 J10 T34
VSS58 VSS136 VSS213 VSS293 VCCGT56
AJ33 AP11 AW5 J12 A4 T36
VSS59 VSS137 VSS214 VSS294 VSS_NCTF1 VCCGT57
AJ34 AP14 AW9 L11 B38 T38
VSS60 VSS138 VSS215 VSS295 VSS_NCTF2 VCCGT58
AJ35 AP24 AY27 J16 P_CPU_GND_VCORE C2 T40 GND
VSS61 VSS139 VSS216 VSS296 VSS_NCTF3 VCCGT59
AJ36 AP27 AY30 J18 D40 U34
VSS62 VSS140 VSS217 VSS297 VSS_NCTF4 VCCGT60
AJ4 AP30 AY5 J20 U35
VSS63 VSS141 VSS218 VSS298 VCCGT61
AJ5 AP36 AY7 J3 SOCKET1151 U36
VSS64 VSS142 VSS219 VSS299 VCCGT62
AJ8 AP37 AY9 J32 12001-00180300 U37
VSS65 VSS143 VSS220 VSS300 REV = <REV> VCCGT63
AK10 AP40 B24 J34 U38
VSS66 VSS144 VSS221 VSS301 VCCGT64
AK12 AP5 B26 J6 GND U39
VSS67 VSS145 VSS222 VSS302 VCCGT65
AK13 AR1 B28 K1 U40
VSS68 VSS146 VSS223 VSS303 VCCGT66
AK15 AR11 B30 K14 V33
VSS69 VSS147 VSS224 VSS304 VCCGT67
AK16 AR14 B6 K15 V34
VSS70 VSS148 VSS225 VSS305 VCCGT68
AK17 AR16 C12 K17 V36
VSS71 VSS149 VSS226 VSS306 VCCGT69
AK18 AR17 C14 K19 V38
VSS72 VSS150 VSS227 VSS307 VCCGT70
AK19 AR18 C16 K22 V40
VSS73 VSS151 VSS228 VSS308 VCCGT71
AK20 AR19 C18 K24 W34
VSS74 VSS152 VSS229 VSS309 VCCGT72
AK23 AR2 C20 K26 W35
VSS75 VSS153 VSS230 VSS310 VCCGT73
AK25 AR20 C22 K28 W36
VSS76 VSS154 VSS231 VSS311 VCCGT74
AK26 AR21 C24 K30 W37
VSS77 VSS155 VSS232 VSS312 VCCGT75
AK28 C31 K33 W38 F39
VSS78 VSS233 VSS313 VCCGT76 VCCGT_SENSE H_GT_VCC_SENSE [79]
C33 K35 Y33 F38
VSS234 VSS314 VCCGT77 VSSGT_SENSE H_GT_VSS_SENSE [79]
C35 K37 Y34
VSS235 VSS315 VCCGT78
SOCKET1151 Y36 F37 1 HT133 /X/1151
VCCGT79 VCCGTX_SENSE
12001-00180300
REV = <REV> Y38 F36 1 HT134 /X/1151
VCCGT80 VSSGTX_SENSE
GND GND
SOCKET1151
REV = <REV>
12001-00180300
GND GND SOCKET1151
12001-00180300
REV = <REV>

ILM1 ILM2

Title : LGA1151 (GND)

ASUSTek Computer Inc.


Engineer: Morse_Peng
Size Project Name Rev
A3 SkyLake VC R1.00
ILM1 ILM2
Date: Tuesday, October 27, 2015 Sheet 11 of 93
XDP Card USB3 CON1 XDP Card USB3 CON4

/X/1151 CT1P1 1 +3VSB請從DIP電容跳線至XDP Card CON4 Pin1


H_CFG0 [9]

/X/1151 CT1P2 1 CT4P2 1


H_CFG1 [9] H_CPUPWRGD [9,31]
/X/1151
/X/1151 CT1P3 1 CT4P5 1
H_CFG2 [9] S_SYSPWROK [31,38]
/X/1151
/X/1151 CT1P5 1 CT4P6 1
H_CFG3 [9] H_CPURST# [9,30]
/X/1151
/X/1151 CT1P6 1 CT4P8 1 Naming Rule:
H_CFG4 [9] S_SMBCLK_MAIN [17,21,36,79]
/X/1151
/X/1151 CT1P8 1 CT4P9 1 CTxPy==>請跳線到XDP Card CONx connector的Piny
H_CFG5 [9] S_SMBDATA_MAIN [17,21,36,79]
/X/1151
/X/1151 CT1P9 1 CT4P11 1
H_CFG6 [9] H_TCK [9]
/X/1151
/X/1151 CT1P11 1 CT4P12 1 Placement Rule:
H_CFG13 [9] H_TMS [9]
/X/1151
/X/1151 CT1P12 1 CT4P14 1 此頁面測點全部放置背面靠近輸出端,
H_CFG12 [9] C_CPU_XDP [27]
/X/1151
/X/1151 CT1P13 1 CT4P15 1 Layout會協助把Reference文字面開出,
H_CFG11 [9] C_CPU_XDP# [27]
/X/1151
/X/1151 CT1P14 1 CT4P17 1 若有需求初期PCB版本可洗背面文字,
H_CFG10 [9] H_TDO [9]
/X/1151
/X/1151 CT1P15 1 CT4P18 1 但低階機種PVT PCB版本請記得通知板廠不洗背面文字
H_CFG9 [9] S_JTAG_TDO [31]
/X/1151
/X/1151 CT1P17 1
H_CFG8 [9] +3VSB_ATX請從DIP電容跳線至XDP Card CON4 Pin19
/X/1151 CT1P18 1 Power Rework:
H_CFG7 [9]

/X/1151 CT1P19 1 +1.0V_A請從DIP電容跳線至XDP Card CON2 Pin19


H_TRST# [9]

+3VSB請從DIP電容跳線至XDP Card CON4 Pin1

XDP Card USB3 CON2 +VCCST請從DIP電容跳線至XDP Card CON3 Pin19

+VCCIO請從DIP電容跳線至XDP Card CON2 Pin1


+VCCIO請從DIP電容跳線至XDP Card CON2 Pin1
+3VSB_ATX請從DIP電容跳線至XDP Card CON4 Pin19
/X/1151 CT2P2 1
H_CFG14 [9]
GND請跳線至XDP Card CON2 Pin7
/X/1151 CT2P3 1
H_CFG15 [9]

/X/1151 CT2P5 1
H_CFG16 [9]

/X/1151 CT2P6 1
H_CFG17 [9]

GND請跳線至XDP Card CON2 Pin7


/X/1151 CT2P8 1
H_CFG18 [9]

/X/1151 CT2P9 1
H_CFG19 [9]

/X/1151 CT2P11 1 SKL_XDP_MBP_1 [9]

/X/1151 CT2P12 1
SKL_XDP_MBP_0 [9]

/X/1151 CT2P14 1
H_TDI [9]

/X/1151 CT2P15 1
H_PRDY# [9]

/X/1151 CT2P17 1
H_PREQ# [9]

/X/1151 CT2P18 1
XDP_PCUDEBUG [9]

+1.0V_A請從DIP電容跳線至XDP Card CON2 Pin19

XDP Card USB3 CON3

CT3P1 1
S_XDP_PREQ# [34]
/X/1151
CT3P2 1
S_XDP_PRDY# [34]
/X/1151
CT3P3 1
O_RSMRST# [37,47,87]
/X/1151
CT3P5 1
O_IOPWRBTN# [31,47]
/X/1151
CT3P6 1
S_ITP_PMODE [31]
/X/1151
CT3P8 1
XDP_SPI_MOSI [28]
/X/1151
CT3P9 1
O_RSTCON# [31,47]
/X/1151
CT3P11 1
XDP_SPI_IO2 [28]
/X/1151

讓VCCST在插入XDP制具時有電

CT311請跳線至CON3 Pin11
CT3P12 1
S_JTAG_TMS [31]
/X/1151
CT3P14 1
S_JTAG_TDI [31]
/X/1151
CT3P15 1
S_JTAG_TCK [31]
/X/1151
CT3P17 1

/X/1151
S_XDP_TRST# [34]
Title : LGA1150 (XDP)
CT3P18 1
S_JTAGX [31]
/X/1151 ASUSTek Computer Inc.
Engineer: Grace
+VCCST請從DIP電容跳線至XDP Card CON3 Pin19
Size Project Name Rev
A3 Z170 Series R1.02A

Date: Tuesday, October 27, 2015 Sheet 12 of 93


[7] D4_DQ_A[0:63]

[7] D4_MAA[0:16] DIMM_A1A


234 280
A17 DQ63
82 135 D4_DQ_A63
A16_RAS_N DQ62
D4_MAA16 86 273 D4_DQ_A62
A15_CAS_N DQ61
D4_MAA15 228 128 D4_DQ_A61
A14_WE_N DQ60
D4_MAA14 232 282 D4_DQ_A60
A13 DQ59
D4_MAA13 65 137 D4_DQ_A59
A12 DQ58
D4_MAA12 210 275 D4_DQ_A58
A11 DQ57
D4_MAA11 225 130 D4_DQ_A57 double ear dark gray:12002-00075100
A10 DQ56
D4_MAA10 66 269 D4_DQ_A56
A9 DQ55
D4_MAA9 68 124 D4_DQ_A55 double ear dark black:12002-00075200
A8 DQ54
D4_MAA8 211 262 D4_DQ_A54
A7 DQ53
D4_MAA7 69 117 D4_DQ_A53 single ear dark gray:12002-00074900
A6 DQ52
D4_MAA6 213 271 D4_DQ_A52
A5 DQ51
D4_MAA5 214 126 D4_DQ_A51 single ear dark gray:12002-00075000
A4 DQ50
D4_MAA4 71 264 D4_DQ_A50
A3 DQ49
D4_MAA3 216 119 D4_DQ_A49
A2 DQ48
D4_MAA2 72 258 D4_DQ_A48
A1 DQ47
D4_MAA1 79 113 D4_DQ_A47
A0 DQ46
D4_MAA0 251 D4_DQ_A46 the symbol here is for double ear DIMM,
DQ45 if need to change to single ear,must relink
224 106 D4_DQ_A45
[7] D4_BAA1 BA1 DQ44 the symbol
81 260 D4_DQ_A44
[7] D4_BAA0 BA0 DQ43
207 115 D4_DQ_A43
[7] D4_BGA1 BG1 DQ42
63 253 D4_DQ_A42
[7] D4_BGA0 BG0 DQ41
108 D4_DQ_A41
DQ40
218 247 D4_DQ_A40
[7] D4_MA_CLK1 CK1P DQ39
219 102 D4_DQ_A39
[7] D4_MA_CLK#1 CK1N DQ38
74 240 D4_DQ_A38
[7] D4_MA_CLK0 CK0P DQ37
75 95 D4_DQ_A37
[7] D4_MA_CLK#0 CK0N DQ36
249 D4_DQ_A36
DQ35
235 104 D4_DQ_A35
C2 DQ34
Chip ID 237 242 D4_DQ_A34
S3_N_C1 DQ33
93 97 D4_DQ_A33
S2_N_C0 DQ32
89 188 D4_DQ_A32
[7] D4_CS_A#1 S1_N DQ31
84 43 D4_DQ_A31
[7] D4_CS_A#0 S0_N DQ30
181 D4_DQ_A30
DQ29
203 36 D4_DQ_A29 +3V
[7] D4_CKE_A1 CKE1 DQ28
60 190 D4_DQ_A28
[7] D4_CKE_A0 CKE0 DQ27
45 D4_DQ_A27
DQ26
91 183 D4_DQ_A26
[7] D4_ODT_A1 ODT1 DQ25
87 38 D4_DQ_A25
[7] D4_ODT_A0 ODT0 DQ24
177 D4_DQ_A24
DQ23
32 D4_DQ_A23
DQ22

4
199 170 D4_DQ_A22
CB7 DQ21
54 25 D4_DQ_A21 D4D1
CB6 DQ20
VDDQ 192 179 D4_DQ_A20
CB5 DQ19 IP4220CZ6
47 34 D4_DQ_A19
CB4 DQ18 /X
201 172 D4_DQ_A18
CB3 DQ17
2

56 27 D4_DQ_A17
CB2 DQ16
D4R1 194 166 D4_DQ_A16 Placed close to DIMM
CB1 DQ15
240Ohm 49 21 D4_DQ_A15
CB0 DQ14
/X/DDR4 159 D4_DQ_A14 SMBus CAPs
DQ13
1% 222 14 D4_DQ_A13
[7] D4_A_PAR PAR DQ12
1

58 168 D4_DQ_A12
RESET_N DQ11
S_D4_RESET#_R 78 23 D4_DQ_A11
EVENT_N DQ10

3
CHA_DIMM0_TS_EVENT# 208 161 D4_DQ_A10
[7] D4_A_ALERT# ALERT_N DQ9
62 16 D4_DQ_A9
[7] D4_A_ACT# ACT_N DQ8 S_SMBCLK_DDR
155 D4_DQ_A8
DQ7
10 D4_DQ_A7
DQ6
Address A0 238 148 D4_DQ_A6 GND
SA2 DQ5
140 3 D4_DQ_A5
SA1 DQ4
139 157 D4_DQ_A4
SA0 DQ3
12 D4_DQ_A3
DQ2

1
150 D4_DQ_A2 S_SMBDATA_DDR D3C22 D3C24
DQ1
GND 5 D4_DQ_A1 47PF/50V 47PF/50V
DQ0
285 D4_DQ_A0 /X /X
[14,17] S_SMBDATA_DDR SDA

2
S_SMBDATA_DDR 141 NPO NPO
[14,17] S_SMBCLK_DDR SCL
S_SMBCLK_DDR
144 GND GND
RFU2
227
RFU1
205
RFU0
1

D4C5 D4C6 230 VDDQ


SAVE_N_NC
330PF/50V 330PF/50V
/X/DDR4 /X/DDR4
2

197 51
DQS8P DQS17P
196 52
DQS8N DQS17N
278 132
[7] D4_DQS_A7 DQS7P DQS16P
GND GND 277 133
[7] D4_DQS_A#7 DQS7N DQS16N
267 121
[7] D4_DQS_A6 DQS6P DQS15P
266 122
[7] D4_DQS_A#6 DQS6N DQS15N
256 110
[7] D4_DQS_A5 DQS5P DQS14P
255 111
[7] D4_DQS_A#5 DQS5N DQS14N
245 99
[7] D4_DQS_A4 DQS4P DQS13P
244 100
[7] D4_DQS_A#4 DQS4N DQS13N
186 40
[7] D4_DQS_A3 DQS3P DQS12P
185 41
[7] D4_DQS_A#3 DQS3N DQS12N
175 29
[7] D4_DQS_A2 DQS2P DQS11P
174 30
[7] D4_DQS_A#2 DQS2N DQS11N
164 18
[7] D4_DQS_A1 DQS1P DQS10P
163 19
[7] D4_DQS_A#1 DQS1N DQS10N
153 7
[7] D4_DQS_A0 DQS0P DQS9P
152 8
[7] D4_DQS_A#0 DQS0N DQS9N

DDR4_DIMM_288P
12002-00074900
[14,31] S_D4_RESET#_R <Variant Name>
S_D4_RESET#_R
1

D4C8
0.1UF/10V Title :
/X/DDR4
DDR4 Channel A
2

ASUS TeK Computer INC


Engineer: Morse_Peng
Put One Caps Per DIMM Slot
GND Size Project Name Rev
A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 13 of 93


[8] D4_DQ_B[0:63]

[8] D4_MAB[0:16] DIMM_B1A


234 280
A17 DQ63
82 135 D4_DQ_B63
A16_RAS_N DQ62
D4_MAB16 86 273 D4_DQ_B62
A15_CAS_N DQ61
D4_MAB15 228 128 D4_DQ_B61
A14_WE_N DQ60
D4_MAB14 232 282 D4_DQ_B60 double ear dark gray:12002-00075100
A13 DQ59
D4_MAB13 65 137 D4_DQ_B59
A12 DQ58
D4_MAB12 210 275 D4_DQ_B58 double ear dark black:12002-00075200
A11 DQ57
D4_MAB11 225 130 D4_DQ_B57
A10 DQ56
D4_MAB10 66 269 D4_DQ_B56 single ear dark gray:12002-00074900
A9 DQ55
D4_MAB9 68 124 D4_DQ_B55
A8 DQ54
D4_MAB8 211 262 D4_DQ_B54 single ear dark gray:12002-00075000
A7 DQ53
D4_MAB7 69 117 D4_DQ_B53
A6 DQ52
D4_MAB6 213 271 D4_DQ_B52
A5 DQ51
D4_MAB5 214 126 D4_DQ_B51
A4 DQ50
D4_MAB4 71 264 D4_DQ_B50
A3 DQ49
D4_MAB3 216 119 D4_DQ_B49 the symbol here is for double ear DIMM,
A2 DQ48 if need to change to single ear,must link
D4_MAB2 72 258 D4_DQ_B48
A1 DQ47 the symbol
D4_MAB1 79 113 D4_DQ_B47
A0 DQ46
D4_MAB0 251 D4_DQ_B46
DQ45
224 106 D4_DQ_B45
[8] D4_BAB1 BA1 DQ44
81 260 D4_DQ_B44
[8] D4_BAB0 BA0 DQ43
207 115 D4_DQ_B43
[8] D4_BGB1 BG1 DQ42
63 253 D4_DQ_B42
[8] D4_BGB0 BG0 DQ41
108 D4_DQ_B41
DQ40
218 247 D4_DQ_B40
[8] D4_MB_CLK1 CK1P DQ39
219 102 D4_DQ_B39
[8] D4_MB_CLK#1 CK1N DQ38
74 240 D4_DQ_B38
[8] D4_MB_CLK0 CK0P DQ37
75 95 D4_DQ_B37
[8] D4_MB_CLK#0 CK0N DQ36
249 D4_DQ_B36
DQ35
235 104 D4_DQ_B35
C2 DQ34
Chip ID 237 242 D4_DQ_B34
S3_N_C1 DQ33
93 97 D4_DQ_B33
S2_N_C0 DQ32
89 188 D4_DQ_B32
[8] D4_CS_B#1 S1_N DQ31
84 43 D4_DQ_B31
[8] D4_CS_B#0 S0_N DQ30
181 D4_DQ_B30
DQ29
203 36 D4_DQ_B29
[8] D4_CKE_B1 CKE1 DQ28
60 190 D4_DQ_B28
[8] D4_CKE_B0 CKE0 DQ27
45 D4_DQ_B27
DQ26
91 183 D4_DQ_B26
[8] D4_ODT_B1 ODT1 DQ25
87 38 D4_DQ_B25
[8] D4_ODT_B0 ODT0 DQ24
177 D4_DQ_B24
DQ23
32 D4_DQ_B23
DQ22
199 170 D4_DQ_B22
CB7 DQ21
54 25 D4_DQ_B21
CB6 DQ20
VDDQ 192 179 D4_DQ_B20
CB5 DQ19
47 34 D4_DQ_B19
CB4 DQ18
201 172 D4_DQ_B18
CB3 DQ17
2

56 27 D4_DQ_B17
CB2 DQ16
D4R3 194 166 D4_DQ_B16
CB1 DQ15
240Ohm 49 21 D4_DQ_B15
CB0 DQ14
/X/DDR4 159 D4_DQ_B14
DQ13
1% 222 14 D4_DQ_B13
[8] D4_B_PAR PAR DQ12
1

58 168 D4_DQ_B12
RESET_N DQ11
S_D4_RESET#_R 78 23 D4_DQ_B11
EVENT_N DQ10
CHB_DIMM0_TS_EVENT# 208 161 D4_DQ_B10
[8] D4_B_ALERT# ALERT_N DQ9
62 16 D4_DQ_B9
[8] D4_B_ACT# ACT_N DQ8
155 D4_DQ_B8
DQ7
VDDSPD 10 D4_DQ_B7
DQ6
Address A0 238 148 D4_DQ_B6
SA2 DQ5
140 3 D4_DQ_B5
SA1 DQ4
139 157 D4_DQ_B4
SA0 DQ3
12 D4_DQ_B3
DQ2
150 D4_DQ_B2
DQ1
GND 5 D4_DQ_B1
DQ0
285 D4_DQ_B0
[13,17] S_SMBDATA_DDR SDA
S_SMBDATA_DDR 141
[13,17] S_SMBCLK_DDR SCL
S_SMBCLK_DDR
144
RFU2
227
RFU1
205
RFU0
1

D4C9 D4C10 230 VDDQ


SAVE_N_NC
330PF/50V 330PF/50V
/X/DDR4 /X/DDR4
2

197 51
DQS8P DQS17P
196 52
DQS8N DQS17N
278 132
[8] D4_DQS_B7 DQS7P DQS16P
GND GND 277 133
[8] D4_DQS_B#7 DQS7N DQS16N
267 121
[8] D4_DQS_B6 DQS6P DQS15P
266 122
[8] D4_DQS_B#6 DQS6N DQS15N
256 110
[8] D4_DQS_B5 DQS5P DQS14P
255 111
[8] D4_DQS_B#5 DQS5N DQS14N
245 99
[8] D4_DQS_B4 DQS4P DQS13P
244 100
[8] D4_DQS_B#4 DQS4N DQS13N
186 40
[8] D4_DQS_B3 DQS3P DQS12P
185 41
[8] D4_DQS_B#3 DQS3N DQS12N
175 29
[8] D4_DQS_B2 DQS2P DQS11P
174 30
[8] D4_DQS_B#2 DQS2N DQS11N
164 18
[8] D4_DQS_B1 DQS1P DQS10P
163 19
[8] D4_DQS_B#1 DQS1N DQS10N
153 7
[8] D4_DQS_B0 DQS0P DQS9P
152 8
[8] D4_DQS_B#0 DQS0N DQS9N

DDR4_DIMM_288P
12002-00074900 <Variant Name>
[13,31] S_D4_RESET#_R
S_D4_RESET#_R
Title :
1

D4C12 X5R
0.1UF/10V
DDR4 Channel B
/X/DDR4
ASUS TeK Computer INC
Engineer: Morse_Peng
2

Put One Caps Per DIMM Slot Size Project Name Rev
GND A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 14 of 93


VPPDDR VPPDDR
DIMM_A1B DIMM_B1B
142 1 142 1
VPP4 12V_1 VPP4 12V_1
143 145 143 145
VPP3 12V_0 VPP3 12V_0
288 288
VPP2 VPP2
286 286
VPP1 VPP1
287 VDDSPD VDDQ 287 VDDSPD VDDQ
VPP0 VPP0
VTT_DDR VTT_DDR

77 284 77 284
VTT1 VDDSPD VTT1 VDDSPD
221 221

1
VTT0 VTT0

1
VDDQ D4R5 Y5V VDDQ D4R7

1
D4C13 1KOhm D4C37 D4C14 1KOhm Y5V

1
59 0.1UF/16V 1% 0.1UF/16V 59 0.1UF/16V 1% D4C44
VDD25 VDD25

2
61 61 0.1UF/16V

2
VDD24 VDD24

2
64 64
VDD23 VDD23

2
67 GND 67 GND
VDD22 VDD22
70 146 70 146
VDD21 VREFCA VDD21 VREFCA
73 H_D4A_VREFCA 73 H_D4B_VREFCA
VDD20 VDD20
76 76
VDD19 VDD19
80 80

1
VDD18 VDD18
83 D4R6 83 D4R8
VDD17 VDD17
85 1KOhm 85 1KOhm
VDD16 VDD16
88 1% 88 1%
VDD15 VDD15
90 90

2
VDD14 VDD14
92 92
VDD13 VDD13
204 204
VDD12 VDD12
206 289 206 289
VDD11 NP_NC1 VDD11 NP_NC1
209 290 GND 209 290 GND
VDD10 NP_NC2 VDD10 NP_NC2
212 212
VDD9 VDD9
215 215
VDD8 [17] D4_VREFCA_A VDD8 [17] D4_VREFCA_B
217 217
VDD7 VDD7
220 220
VDD6 VDD6
223 X7R X7R 223 X7R X7R
VDD5 VDD5
1

1
226 D4C38 D4C39 D4C47 D4C48 226 D4C45 D4C46 D4C50
VDD4 VDD4
229 /DDR4 /DDR4 1UF/10V 22UF/6.3V 229 /DDR4 4.7UF/6.3V 22UF/6.3V
VDD3 VDD3
231 0.1UF/16V 0.1UF/16V mbs_c0603 mbs_c0603 231 0.1UF/16V mbs_c0603 mbs_c0805
VDD2 VDD2
2

2
233 233
VDD1 VDD1
236 236
VDD0 VDD0

GND GND
2 147 2 147
VSS93 VSS46 VSS93 VSS46
4 149 4 149
VSS92 VSS45 VSS92 VSS45
6 151 6 151
VSS91 VSS44 VSS91 VSS44
9 154 9 154
VSS90 VSS43 VSS90 VSS43
11 156 11 156
VSS89 VSS42 VSS89 VSS42
13 158 13 158
VSS88 VSS41 VSS88 VSS41
15 160 15 160
VSS87 VSS40 VSS87 VSS40
17 162 17 162
VSS86 VSS39 VSS86 VSS39
20 165 20 165
VSS85 VSS38 VSS85 VSS38
22 167 22 167
VSS84 VSS37 VSS84 VSS37
24 169 24 169
VSS83 VSS36 VSS83 VSS36
26 171 26 171
VSS82 VSS35 VSS82 VSS35
28 173 28 173
VSS81 VSS34 VSS81 VSS34
31 176 31 176
VSS80 VSS33 VSS80 VSS33
33 178 33 178
VSS79 VSS32 VSS79 VSS32
35 180 35 180
VSS78 VSS31 VSS78 VSS31
37 182 37 182
VSS77 VSS30 VSS77 VSS30
39 184 39 184
VSS76 VSS29 VSS76 VSS29
42 187 42 187
VSS75 VSS28 VSS75 VSS28
44 189 44 189
VSS74 VSS27 VSS74 VSS27
46 191 46 191
VSS73 VSS26 VSS73 VSS26
48 193 48 193
VSS72 VSS25 VSS72 VSS25
50 195 50 195
VSS71 VSS24 VSS71 VSS24
53 198 53 198
VSS70 VSS23 VSS70 VSS23
55 200 55 200
VSS69 VSS22 VSS69 VSS22
57 202 57 202
VSS68 VSS21 VSS68 VSS21
94 239 94 239
VSS67 VSS20 VSS67 VSS20
96 241 96 241
VSS66 VSS19 VSS66 VSS19
98 243 98 243
VSS65 VSS18 VSS65 VSS18
101 246 101 246
VSS64 VSS17 VSS64 VSS17
103 248 103 248
VSS63 VSS16 VSS63 VSS16
105 250 105 250
VSS62 VSS15 VSS62 VSS15
107 252 107 252
VSS61 VSS14 VSS61 VSS14
109 254 109 254
VSS60 VSS13 VSS60 VSS13
112 257 112 257
VSS59 VSS12 VSS59 VSS12
114 259 114 259
VSS58 VSS11 VSS58 VSS11
116 261 116 261
VSS57 VSS10 VSS57 VSS10
118 263 118 263
VSS56 VSS9 VSS56 VSS9
120 265 120 265
VSS55 VSS8 VSS55 VSS8
123 268 123 268
VSS54 VSS7 VSS54 VSS7
125 270 125 270
VSS53 VSS6 VSS53 VSS6
127 272 127 272
VSS52 VSS5 VSS52 VSS5
129 274 129 274
VSS51 VSS4 VSS51 VSS4
131 276 131 276
VSS50 VSS3 VSS50 VSS3
134 279 134 279
VSS49 VSS2 VSS49 VSS2
136 281 136 281
VSS48 VSS1 VSS48 VSS1
138 283 138 283
VSS47 VSS0 VSS47 VSS0

DDR4_DIMM_288P DDR4_DIMM_288P
12002-00074900 12002-00074900

GND GND GND GND

VDDSPD VPPDDR +3V_ATX

D4R9 1 2 0Ohm
D3F501 /x/DDR4 mbs_r0603
1 2 D4R10 1 2 0Ohm
/DDR4 mbs_r0603
1.6A/6V
+VDDSPD option to +3V

Rev 1.0 to +3V

<Variant Name>

Title : -12V
ASUS TeK Computer INC
Engineer: IAN
Size Project Name Rev
A2 Z87-PRO R1.02A

Date: Tuesday, October 27, 2015 Sheet 15 of 93


VDDQ

X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R

1
Layout to 0603 PCB1 PCB2 PCB3 PCB4 PCB5 PCB6 PCB7 PCB8 PCB45 PCB46 PCB47
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V PCB48 PCB49 PCB50
mbs_c0603 mbs_c0805 mbs_c0805 mbs_c0805 mbs_c0603 mbs_c0805 mbs_c0603 mbs_c0805 mbs_c0603 mbs_c0805 mbs_c0805 1UF/6.3V 1UF/6.3V 0.1UF/16V

2
/DDR4 /DDR4
Layout Layout Layout Layout Layout Layout

DIMM 附近
GND

VDDQ

Put near DIMM Slot DIMM_A1


1

1
X5R X5R X5R X5R
PCB9 PCB10 PCB11 PCB12 PCB13 PCB14 PCB15 PCB16
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2

2
/X/DDR4

GND

VDDQ

Put near DIMM Slot DIMM_B1


1

X5R X5R X5R X5R


PCB25 PCB26 PCB27 PCB28 PCB29 PCB30 PCB31 PCB32
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2

/X/DDR4 /DDR4 /DDR4 /DDR4

GND

VTT_DDR VTT_DDR VPPDDR VPPDDR

X5R Y5V X5R Y5V X5R Y5V X5R


1

1
D4C15 D4C16 D4C18 D4C19 D4C21 X7R X7R X7R X7R X7R X7R X7R X7R
4.7UF/6.3V 0.1UF/16V 0.1UF/16V 4.7UF/6.3V 4.7UF/6.3V D4C22 D4C29 D4C30 D4C31 D4C32 D4C33 D4C34 D4C35 D4C36
/DDR4 /DDR4 1UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2

2
/DDR4 /DDR4 /X/DDR4 /X/DDR4

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

Put near DIMM Slot DIMM_A Put near DIMM Slot DIMM_B Put near DIMM Slot DIMM_A Put near DIMM Slot DIMM_B

<Variant Name>

Title : DDR4 (Power CAPs)


ASUSTek Computer Inc.
Engineer: Miles Liu
Size Project Name Rev
A3 X99_Deluxe 1.00

Date: Tuesday, October 27, 2015 Sheet 16 of 93


DRAM SMBUS From PCH (Thru Level Shift)

+3V +3V +3V VDDSPD VDDSPD VDDSPD VDDSPD

2
+VDDSPD option to +3V
D4R11 D4R12 D4R13 D4R14 D4R15
240Ohm 240Ohm 1KOhm 1KOhm 8.2KOhm
/X/D4U1 /X/D4U1 /X/D4U1 /X/D4U1
/X/D4U1
TBD

1
D4U1
1 8
VCCA VCCB
2 7
[12,21,36,79] S_SMBCLK_MAIN SCLA SCLB S_SMBCLK_DDR [13,14]
3 6
[12,21,36,79] S_SMBDATA_MAIN SDAA SDAB S_SMBDATA_DDR [13,14]
4 5
GND EN
DDR_SMBUS_LS_EN

1
D4C23 PCA9617ADP D4C24 D4C25 D4C26
/X/D4U1
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
/X/DDR4 /X/DDR4 /X/DDR4
/X/D4U1

GND GND GND GND GND

D4R18 0Ohm

1 2
1 2
D4R19 0Ohm

CPU DDR Vref

For CPU DDR Vref

D4R16 2Ohm 1%
1 2
[8] H_D4_VREFCA_A D4_VREFCA_A [15]

X7R
1

D4C54 D4C53

1
/DDR4 1UF/10V D4C27
0.1UF/16V mbs_c0603 0.1UF/16V
2

2
To DIMM Slot

GND

Place close to DIMM pin

D4R17 2Ohm 1%
1 2
[8] H_D4_VREFCA_B D4_VREFCA_B [15]

X7R
1

D4C52 D4C51
1

1
/DDR4 1UF/10V D4C28 D4C42 D4C43
0.1UF/16V mbs_c0603 0.1UF/16V 0.1UF/16V 0.1UF/16V
2

/DDR4
2

<Variant Name>

GND Title : DDR4 (SMBUS/SPD)


ASUSTeK Computer Inc.
Engineer: Payton_Lin
Size Project Name Rev
A3 X99 VC Rev1.00 1.00

Date: Tuesday, October 27, 2015 Sheet 17 of 93


<Variant Name>

Title : DDR4 (SMBUS/SPD)


ASUSTeK Computer Inc.
Engineer: Payton_Lin
Size Project Name Rev
A3 X99 VC Rev1.00 1.00

Date: Tuesday, October 27, 2015 Sheet 18 of 93


<Variant Name>

Title : DDR4 (SMBUS/SPD)


ASUSTeK Computer Inc.
Engineer: Payton_Lin
Size Project Name Rev
A3 X99 VC Rev1.00 1.00

Date: Tuesday, October 27, 2015 Sheet 19 of 93


delete
it for
EMS +5V

POWER for HDMI & DVI


+12V
GQ23
2 AP2306GN

2
S
G
1
1

1
D GQ23C1
3 0.1UF/16V

3
/X

2
+5V_DVI/HDMI
+3V
GND GR129 470Ohm
1 2
H_DVI_TXDN2_C GR130 470Ohm

2
1 2
GR70 GR69 H_DVI_TXDP2_C GR131 470Ohm
If only HDMI,this power must still need 2.7KOhm 2.7KOhm 1 2
GQX10 mbs_r0603 mbs_r0603 H_DVI_TXDN1_C GR132 470Ohm

1
1
H2N7002

G
1 2

1
2 3 H_DVI_TXDP1_C GR133 470Ohm

3
[32] S_DVI_DDC_DATA
SW_DVI_DDC_DATA 1 2

D
S
H_DVI_TXDN0_C GR134 470Ohm
1 2
+5V_DVI/HDMI_Q +5V_DVI/HDMI GQX11 H_DVI_TXDP0_C GR135 470Ohm
1 2

1
1
H2N7002

G
GF1 1.1A/6V H_DVI_TXCN_C GR136 470Ohm
1 2 2 3 1 2

3
[32] S_DVI_DDC_CLK

1
GC5 SW_DVI_DDC_CLK H_DVI_TXCP_C

D
S
0.1UF/16V
N/A +3V +3V

2
+3V +3V
3

3
D

2
GND GQX13

2
GQX10C1 GQX11C1 GR42 H2N7002

1
0.1UF/16V 0.1UF/16V GR251 GQX12C1 11
0Ohm
/X /X 1MOHM 0.1UF/16V /X/DVI G
S

1
/X 2 GQX13C1

2
2

1
0.1UF/16V

1
GQX12 /X

2
GND GND

1
1
H2N7002

G
2 3

3
[32] S_DVI_HPD
SW_DVI_HPD

D
S
GND

1
GR151
20KOhm

2
GND

GD101 GD102
1 9 1 9
Line-1 NC4 Line-1 NC4
2 8 2 8
Line-2 NC3 Line-2 NC3
3 3
GND GND
4 7 4 7
Line-3 NC2 Line-3 NC2
5 6 5 6
Line-4 NC1 Line-4 NC1

AZ1045-04F AZ1045-04F

/X /X

GCX28 0.1UF/16V GND GND


2 1 X7R
[6] H_DVI_TXDN0 /X
4

H_DVI_TXDN0_C SW_DVI_TXDN0_R
CHOKE_4P
GCX27 0.1UF/16V SLX1
2 1 X7R
[6] H_DVI_TXDP0
1

H_DVI_TXDP0_C SW_DVI_TXDP0_R

GCX29 0.1UF/16V
2 1 X7R
[6] H_DVI_TXDP2
H_DVI_TXDP2_C SW_DVI_TXDP2_R
DVI
1

GCX30 0.1UF/16V
SLX2
CHOKE_4P
DVI 1
1
2 1 X7R /X 9 SW_DVI_TXDN2_R
4

[6] H_DVI_TXDN2 9
H_DVI_TXDN2_C SW_DVI_TXDN2_R 17 SW_DVI_TXDN1_R
17
2 SW_DVI_TXDN0_R
2
GCX31 0.1UF/16V 10 SW_DVI_TXDP2_R
10
2 1 X7R 18 SW_DVI_TXDP1_R
[6] H_DVI_TXDP1 18
H_DVI_TXDP1_C SW_DVI_TXDP1_R 3 SW_DVI_TXDP0_R
1

3
SLX3 11
11
GCX32 0.1UF/16V CHOKE_4P 25 19
P_GND1 19
2 1 X7R /X 26 4
4

[6] H_DVI_TXDN1 P_GND2 4


H_DVI_TXDN1_C SW_DVI_TXDN1_R 27 12
P_GND3 12
28 20
P_GND4 20
GCX33 0.1UF/16V 29 5 +5V_DVI/HDMI
P_GND5 5
2 1 X7R 30 13
[6] H_DVI_TXCP P_GND6 13
H_DVI_TXCP_C SW_DVI_TXCP_R 31 21
1

NP_NC1 21
SLX4 32 6
NP_NC2 6
GCX34 0.1UF/16V CHOKE_4P 14 SW_DVI_DDC_CLK
14
2 1 X7R /X 22
4

[6] H_DVI_TXCN 22
H_DVI_TXCN_C SW_DVI_TXCN_R 7
7
15 SW_DVI_DDC_DATA
15
23
23
GND 8 SW_DVI_TXCP_R
8
16
16
24 SW_DVI_HPD
24
SW_DVI_TXCN_R
塑膠固定pin(NC) DVI_CON_24P
12010-00032500

close to connector GND

SW_DVI_DDC_DATA SW_DVI_DDC_CLK SW_DVI_HPD


GD12

1
1 6 GC49 GC50 GC51
SW_DVI_HPD SW_DVI_DDC_CLK

2
100PF/50V 100PF/50V 100PF/50V
/X/EMI /X/EMI /X/EMI
+5V_DVI/HDMI_Q

2 5 GND GND GND

GND
3 4
SW_DVI_DDC_DATA

IP4220CZ6
/X

<Variant Name>

Title : DVI REDUCED LEV-SHIFT

ASUSTek COMPUTER INC.


Engineer: Morse_Peng
Size Project Name Rev
R1.00
A2 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 20 of 93
RTD2168 Power Caps and Beads Hot-Plug Detect

+3.3V_VGAVCCA +3.3V_VGADAC
+3V +1.2V_VGA +3V +3V
near GU3.19 Voltage Level +3.3V
GL1 /X GL2 /X
1 2 1 2
0603 0603
S_DP2VGA_HPD [32]
S_DP2VGA_HPD
1

1
GU1C1 GU1C2 GU1C3 GU1C4 GU1C5 GU1C6 GU1C7 GU1C8 GU1C9

2
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 2.2UF/6.3V 0.1UF/16V 4.7UF/6.3V 0.1UF/16V 10UF/10V GU1R1
/VGA /VGA /VGA /VGA/X /VGA /VGA /VGA/X /VGA N/A
2

2
mbs_c0603 mbs_c0805 100KOhm

GND GND GND GND

1
near GU3.5, GU3.20 near GU3.25
GND GND near GU3.24 near GU3.9
GND

+3.3V_VGAVCCA

+1.2V_VGA +3V

+3V
+3.3V_VGAVCCA

2
Check thermal if X5R/X7R needed STRAP_PIN23
STRAP_PIN22 GU1R16
100KOhm /X 100KOhm
GU1R9 LDO_EN /X/VGA
2 1 H_DP2VGA_AUXN_C
DP2VGA_XO [35]

1
100KOhm /X DP2VGA_XO
GU1R14
2 1 H_DP2VGA_AUXP_C DP2VGA_XO

24

23

22

21

20

19

18

17

2
GU3
GU1R17

AVCC_33

POL2_SCL

POL1_SDA

LDO_EN

DVCC_33_2

VCCK_12

XO

XI/CKIN
GND +3.3V_VGADAC 100KOhm
/VGA

1
25 16
AVCC_12 RED_N

GU1C11 0.1UF/16V 26 15
[6] H_DP2VGA_AUXP AUX_P RED_P VGA_RED [22]
2 1 H_DP2VGA_AUXP_C GND
GU1C12 0.1UF/16V 27 14
[6] H_DP2VGA_AUXN AUX_N GND_DAC
2 1 H_DP2VGA_AUXN_C
28 13
RRX GREEN_N

GU1C14 0.1UF/16V 29 12
[6] H_DP2VGA_TXP0 LANE0P GREEN_P VGA_GREEN [22]
2 1 H_DP2VGA_TXP0_C
GU1C13 0.1UF/16V 30 11
[6] H_DP2VGA_TXN0 LANE0N BLUE_N
2 1 H_DP2VGA_TXN0_C
GU1C15 0.1UF/16V 31 10
[6] H_DP2VGA_TXP1 LANE1P BLUE_P VGA_BLUE [22]
2 1 H_DP2VGA_TXP1_C
GU1C16 0.1UF/16V 32 9
[6] H_DP2VGA_TXN1 LANE1N VDD_DAC_33
2 1 H_DP2VGA_TXN1_C
33
GND1
34

1
GND2

DVCC_33_1
GU1R2 35

SMB_SDA

VGA_SDA
SMB_SCL

VGA_SCL
1% GND3
36

HSYNC
12KOHM

VSYNC
GND4
37

HPD
N/A GND
GND5

2
RTD2168-ASU-CG

8
GND GND
Strapping Pin +3V

VGA_HSYNC [22]
VGA_VSYNC [22]
S_DP2VGA_HPD
STRAP_PIN22 LDO_EN VGA_DDC_DATA [22]
RTD2168_SMB_CLK
VGA_DDC_CLK [22]
1 RTD2168_SMB_DATA
0 0 : VCCK_V12 from External 1.2V

0 X EP Mode 1 : VCCK_V12 from Embedded LDO


STRAP_PIN23
1 ROM EEPROM SMBus Programming +3V

+3V +3V +3V


GU1R12 1 2 0Ohm /VGA/PCH_SMB

1
S_SMBCLK_MAIN [12,17,36,79]
GU1R10 GU1R11
RTD2168 Slave Address :
2

1KOhm 1KOhm GU1R15 1 2 0Ohm /VGA/PCH_SMB


0x64/0x65 and 0x68/0x69 S_SMBDATA_MAIN [12,17,36,79]
GU1R3 GU1R4 GU1R7 /X/VGA /X/VGA
8.2KOhm 8.2KOhm 8.2KOhm
2

2
/X/VGA /VGA /VGA
1

RTD2168_SMB_CLK
STRAP_PIN22 LDO_EN
2

STRAP_PIN23 RTD2168_SMB_DATA
2

GU1R24
GU1R5 GU1R6 8.2KOhm
8.2KOhm 8.2KOhm /X/VGA
/VGA /X/VGA
1
1

GND
GND GND

P8Z77-V DELUXE R1.00

Title : DP to VGA_RTD2168

ASUSTeK COMPUTER INC


Engineer: Bing-jie_Wang
Size Project Name Rev
A2 SkyLake Chipset DEMO R1.00

Date: Tuesday, October 27, 2015 Sheet 21 of 93


PLACE THIS NEAR TO CONNECTOR

GL32 0.068UH
1 2
[21] VGA_RED
VGA_RED_L
GL33 0.068UH
1 2
[21] VGA_GREEN
VGA_GREEN_L
GL34 0.068UH
1 2
[21] VGA_BLUE
VGA_BLUE_L
GD15

1
1 6
GR1475 GR1474 GR1476 GC514 GC515 GC516 GC517 GC518 GC519
75Ohm 75Ohm 75Ohm 18PF/50V 18PF/50V 18PF/50V 18PF/50V 18PF/50V 18PF/50V

2
N/A N/A N/A N/A N/A N/A +3V

1
2 5
delete it for EMS
GND GND GND GND GND GND GND GND GND

GND
+5V_D_VGA 3 4
+5V
GD4
GF6 1.1A/6V IP4220CZ6
1 2 1 2
+V_5V

1
GC525
SS14 0.1UF/16V
/X

2
IO POWER GND

+3V +5V_D_VGA
2

2
GR500 GR501 +3V
GR502 GR503
2.7KOHM 2.7KOHM 1.8KOhm 1.8KOhm
1

1
1

GQ34C1 close to connector


mbs_r0603 mbs_r0603
10PF/50V
/X /X /X
2

/X
1
1
G

GND GR1478
2 3 1 2
2

[21] VGA_DDC_DATA
GQ34 H2N7002 VGA_DDC_DATA_Q VGA_DDC_DATA_R
D

choose on block by PES


S

1
100Ohm GC521
GR504 1 0Ohm 2 100PF/50V HIGH RISE +5V_D_VGA
NPO CONNECTOR
GQ35C1

2
+3V /X

GND
1 2 /X GND
/X 10PF/50V
1
1
G

GR1479
2 3 1 2
2

[21] VGA_DDC_CLK
GQ35 H2N7002 VGA_DDC_CLK_Q VGA_DDC_CLK_R VGA
D
S

16
1
100Ohm GC522
GR505 1 0Ohm 2 for slew rate control 100PF/50V
NPO

2
/X 6
level shift close to connector 1 11
GND VGA_RED_L 7
GD16 2 12
VGA_GREEN_L 8 VGA_DDC_DATA_R
1 6 3 13
VGA_BLUE_L 9 VGA_HSYNC_R
4 14
+V_5V 10 VGA_VSYNC_R
5 15
2 5 VGA_DDC_CLK_R

D_SUB_15P

17
Place near CPT side in 750mil. GND 12010V00046300
3 4
close to PCH for slew rate control

GR1504 33Ohm IP4220CZ6


1 2
[21] VGA_HSYNC
VGA_HSYNC_R GND
GR1505 33Ohm
1 2
[21] VGA_VSYNC
VGA_VSYNC_R
<Variant Name>
1

1
GC523 GC524 GC532 GC531
10PF/50V
NPO
10PF/50V
NPO
100PF/50V
NPO
100PF/50V
NPO
Title : VGA
2

2
/X /X /X /X
ASUSTek Computer Inc.
Engineer: alex_zhou
Size Project Name Rev
GND GND GND GND
A3
Standard Circiut 0.01A

Date: Tuesday, October 27, 2015 Sheet 22 of 93


<Variant Name>

Title : Switch 1440


ASUSTek COMPUTER INC.
Engineer: KENNY_CHEN
Size Project Name Rev
A3 Z87-PRO R1.02A

Date: Tuesday, October 27, 2015 Sheet 23 of 93


1.9

Support Gen3

+3VSB +3V_ATX +12V +12V +3V_ATX

PCIEX16_1

1
2
NP_NC1
NP_NC2
B1 A1
+12V_1 PRSNT1#
B2 A2
+12V_2 +12V_3
to SB SMBus(standby power) B3 A3
RSVD1 +12V_4
B4 A4
GND1 GND35
B5 A5
[36,42] S_SMBCLK_SLOT SMCLK JTAG2
B6 A6
[36,42] S_SMBDATA_SLOT SMDAT JTAG3
B7 A7
GND2 JTAG4
B8 A8
+3.3V_1 JTAG5
B9 A9
JTAG1 +3.3V_2
B10 A10
3.3Vaux +3.3V_3
B11 A11
WAKE# PWRGD
Pull-high at SB side

[31,42,69] S_WAKE#
O_X16_RST# [47]
B12 A12
RSVD2 GND36
XCX1 0.22UF/10V X5R B13 A13
GND3 REFCLK+ CK_100M_X16SL1P [27]

1
2 1 B14 A14
[5] H_X16_SL1_TXP0 HSOP0 REFCLK- CK_100M_X16SL1N [27]
2 1 H_X16_SL1_TXP0_C B15 A15 XC71
[5] H_X16_SL1_TXN0 HSON0 GND37
H_X16_SL1_TXN0_C B16 A16 1.5PF/50V
GND4 HSIP0 H_X16_SL1_RXP0 [5]

2
XCX2 0.22UF/10V X5R B17 A17
PRSNT2_1# HSIN0 H_X16_SL1_RXN0 [5] /X
B18 A18
GND5 GND38
GND
XCX3 0.22UF/10V X5R
2 1 B19 A19
[5] H_X16_SL1_TXP1 HSOP1 RSVD6
2 1 H_X16_SL1_TXP1_C B20 A20
[5] H_X16_SL1_TXN1 HSON1 GND39
H_X16_SL1_TXN1_C B21 A21
GND6 HSIP1 H_X16_SL1_RXP1 [5]
XCX5 0.22UF/10V X5R XCX4 0.22UF/10V X5R B22 A22
GND7 HSIN1 H_X16_SL1_RXN1 [5]
2 1 B23 A23
[5] H_X16_SL1_TXP2 HSOP2 GND40
2 1 H_X16_SL1_TXP2_C B24 A24
[5] H_X16_SL1_TXN2 HSON2 GND41
H_X16_SL1_TXN2_C B25 A25
GND8 HSIP2 H_X16_SL1_RXP2 [5]
XCX7 0.22UF/10V X5R XCX6 0.22UF/10V X5R B26 A26
GND9 HSIN2 H_X16_SL1_RXN2 [5]
2 1 B27 A27
[5] H_X16_SL1_TXP3 HSOP3 GND42
2 1 H_X16_SL1_TXP3_C B28 A28
[5] H_X16_SL1_TXN3 HSON3 GND43
H_X16_SL1_TXN3_C B29 A29
GND10 HSIP3 H_X16_SL1_RXP3 [5]
XCX8 0.22UF/10V X5R B30 A30
RSVD3 HSIN3 H_X16_SL1_RXN3 [5]
B31 A31
PRSNT2_2# GND44
B32 A32
GND11 RSVD7

XCX9 0.22UF/10V X5R


2 1 B33 A33
[5] H_X16_SL1_TXP4 HSOP4 RSVD8
2 1 H_X16_SL1_TXP4_C B34 A34
[5] H_X16_SL1_TXN4 HSON4 GND45
H_X16_SL1_TXN4_C B35 A35
GND12 HSIP4 H_X16_SL1_RXP4 [5]
XCX11 0.22UF/10V X5R XCX10 0.22UF/10V X5R B36 A36
GND13 HSIN4 H_X16_SL1_RXN4 [5]
2 1 B37 A37
[5] H_X16_SL1_TXP5 HSOP5 GND46
2 1 H_X16_SL1_TXP5_C B38 A38
[5] H_X16_SL1_TXN5 HSON5 GND47
H_X16_SL1_TXN5_C B39 A39
GND14 HSIP5 H_X16_SL1_RXP5 [5]
XCX13 0.22UF/10V X5R XCX12 0.22UF/10V X5R B40 A40
GND15 HSIN5 H_X16_SL1_RXN5 [5]
2 1 B41 A41
[5] H_X16_SL1_TXP6 HSOP6 GND48
2 1 H_X16_SL1_TXP6_C B42 A42
[5] H_X16_SL1_TXN6 HSON6 GND49
H_X16_SL1_TXN6_C B43 A43
GND16 HSIP6 H_X16_SL1_RXP6 [5]
XCX15 0.22UF/10V X5R XCX14 0.22UF/10V X5R B44 A44
GND17 HSIN6 H_X16_SL1_RXN6 [5]
2 1 B45 A45
[5] H_X16_SL1_TXP7 HSOP7 GND50
2 1 H_X16_SL1_TXP7_C B46 A46
[5] H_X16_SL1_TXN7 HSON7 GND51
H_X16_SL1_TXN7_C B47 A47
GND18 HSIP7 H_X16_SL1_RXP7 [5]
XCX16 0.22UF/10V X5R B48 A48
PRSNT2_3# HSIN7 H_X16_SL1_RXN7 [5]
X5R B49 A49
GND19 GND52
2 1 B50 A50
[5] H_X16_SL1_TXP8 HSOP8 RSVD9
2 1 H_X16_SL1_TXP8_C B51 A51
[5] H_X16_SL1_TXN8 HSON8 GND53
XCX17 0.22UF/10V H_X16_SL1_TXN8_C B52 A52
GND20 HSIP8 H_X16_SL1_RXP8 [5]
X5R XCX18 0.22UF/10V X5R B53 A53
GND21 HSIN8 H_X16_SL1_RXN8 [5]
2 1 B54 A54
[5] H_X16_SL1_TXP9 HSOP9 GND54
2 1 H_X16_SL1_TXP9_C B55 A55
[5] H_X16_SL1_TXN9 HSON9 GND55
XCX19 0.22UF/10V H_X16_SL1_TXN9_C B56 A56
GND22 HSIP9 H_X16_SL1_RXP9 [5]
X5R XCX20 0.22UF/10V X5R B57 A57
GND23 HSIN9 H_X16_SL1_RXN9 [5]
2 1 B58 A58
[5] H_X16_SL1_TXP10 HSOP10 GND56
2 1 H_X16_SL1_TXP10_C B59 A59
[5] H_X16_SL1_TXN10 HSON10 GND57
XCX21 0.22UF/10V H_X16_SL1_TXN10_C B60 A60
GND24 HSIP10 H_X16_SL1_RXP10 [5]
X5R XCX22 0.22UF/10V X5R B61 A61
GND25 HSIN10 H_X16_SL1_RXN10 [5]
2 1 B62 A62
[5] H_X16_SL1_TXP11 HSOP11 GND58
2 1 H_X16_SL1_TXP11_C B63 A63
[5] H_X16_SL1_TXN11 HSON11 GND59
XCX23 0.22UF/10V H_X16_SL1_TXN11_C B64 A64
GND26 HSIP11 H_X16_SL1_RXP11 [5]
X5RXCX24 0.22UF/10V X5R B65 A65
GND27 HSIN11 H_X16_SL1_RXN11 [5]
2 1 B66 A66
[5] H_X16_SL1_TXP12 HSOP12 GND60
2 1 H_X16_SL1_TXP12_C B67 A67
[5] H_X16_SL1_TXN12 HSON12 GND61
XCX25 0.22UF/10V H_X16_SL1_TXN12_C B68 A68
GND28 HSIP12 H_X16_SL1_RXP12 [5]
X5R XCX26 0.22UF/10V X5R B69 A69
GND29 HSIN12 H_X16_SL1_RXN12 [5]
2 1 B70 A70
[5] H_X16_SL1_TXP13 HSOP13 GND62
2 1 H_X16_SL1_TXP13_C B71 A71
[5] H_X16_SL1_TXN13 HSON13 GND63
XCX27 0.22UF/10V H_X16_SL1_TXN13_C
XCX28 0.22UF/10V X5R B72 A72
GND30 HSIP13 H_X16_SL1_RXP13 [5]
X5R B73 A73
GND31 HSIN13 H_X16_SL1_RXN13 [5]
2 1 B74 A74
[5] H_X16_SL1_TXP14 HSOP14 GND64
2 1 H_X16_SL1_TXP14_C B75 A75
[5] H_X16_SL1_TXN14 HSON14 GND65
XCX29 0.22UF/10V H_X16_SL1_TXN14_C B76 A76
GND32 HSIP14 H_X16_SL1_RXP14 [5]
X5R XCX30 0.22UF/10V X5R B77 A77
GND33 HSIN14 H_X16_SL1_RXN14 [5]
2 1 B78 A78
[5] H_X16_SL1_TXP15 HSOP15 GND66
2 1 H_X16_SL1_TXP15_C B79 A79
[5] H_X16_SL1_TXN15 HSON15 GND67
XCX31 0.22UF/10V H_X16_SL1_TXN15_C B80 A80
GND34 HSIP15 H_X16_SL1_RXP15 [5]
XCX32 0.22UF/10V X5R B81 A81
PRSNT2_4# HSIN15 H_X16_SL1_RXN15 [5]
B82 A82
RSVD4 GND68

PCI_EXPRESS_X16

12003-00032700

GND GND

[27] PCIEX16_SL1_PRSNT#

+12V
日製
XCE1
1

+ 270UF/16V

11V040477330
2

mbs_cpl270u16v_8x12_lfh_ms

GND
EL 470U: 11V040477330
PL 270U: 11V090277339
PL 270U 10KHRS: 11031-00066000
<Variant Name>

Title : PCIEX16_1(NAVY BLUE)

ASUSTek COMPUTER INC.


Engineer: IAN
Size Project Name Rev
R1.02A
A2 Z87-PRO
Date: Tuesday, October 27, 2015 Sheet 24 of 93
<Variant Name>

Title : PCIEX8_2(LIGHT GRAY)

ASUSTek COMPUTER INC.


Engineer: IAN
Size Project Name Rev
R1.02A
A2 Z87-PRO
Date: Tuesday, October 27, 2015 Sheet 25 of 93
CLOCK Gen_IDT6V41518
Title :
ASUSTek Computer Inc.
Engineer: CT_Ou
Size Project Name Rev
A2
SKYLAKE 1.00G

Date: Tuesday, October 27, 2015 Sheet 26 of 93


SPT-H_PCH
SU1G
N AR17
GPP_A16/CLKOUT_48

G1 L1
[9] CK_24M_NSCCCLKP CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_N C_CPU_XDP# [12]
CPU CK_24M_NSCCCLKP F1 L2 CK_100M_XDPN XDP
[9] CK_24M_NSCCCLKN CLKOUT_CPUNSSC_N CLKOUT_ITPXDP_P C_CPU_XDP [12]
CK_24M_NSCCCLKN J1 CK_100M_XDPP
CLKOUT_CPUPCIBCLK_N CK_100M_PCIBCLKN [9]
G2 J2 CK_100M_PCIBCLKN CPU
[9] CK_100M_PCHOP CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P CK_100M_PCIBCLKP [9]
CPU CK_100M_PCHOP H2 CK_100M_PCIBCLKP
[9] CK_100M_PCHON CLKOUT_CPUBCLK_N
CK_100M_PCHON
+1.0V_A_XCLK_BIAS A5 N7
XTAL24_OUT CLKOUT_PCIE_N0 CK_100M_X1SL2N [42]
S_24M_OUT A6 N8 CK_100M_X1SL2N
XTAL24_IN CLKOUT_PCIE_P0 CK_100M_X1SL2P [42] PCIEX1_2
SR11 S_24M_IN CK_100M_X1SL2P
close to PCH 1 2 E1 L7
XCLK_BIASREF CLKOUT_PCIE_N1
MAX trace lengtch 200mil 2.7KOhm S_XCLK_BIASREF L5 ASM 1142AE
CLKOUT_PCIE_P1
BC9
RTCX1
S_RTCX1 BD10 D3
RTCX2 CLKOUT_PCIE_N2
S_RTCX2 F2
CLKOUT_PCIE_P2
I BC24
[42] PCIEX1_SL2_PRSNT# GPP_B5/SRCCLKREQ0#
/X/SPTH ST171 1 S_GPP_B5 I AW24 E5
GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3
/X/SPTH ST173 1 S_GPP_B6 I AT24 G4
/X/SPTH ST174 1 S_GPP_B7 I BD25
GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3 Not use these 4 ports at better,
/X/SPTH ST175 1 S_GPP_B8 I BB24
GPP_B8/SRCCLKREQ3#
D5 they are easy to be
GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4
LAN CLK REQ# 看LAN page 是否有pull /X/SPTH ST176 1 S_GPP_B9 I BE25
GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4
E6 interfered
up S_GPP_B10 I AT33
[67] CLKREQ#_LAN1 GPP_H0/SRCCLKREQ6#
/X/SPTH ST180 1 S_GPP_H0 I AR31 D8
GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5
/X/SPTH ST181 1 S_GPP_H1 I BD32 D7
GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5
/X/SPTH ST183 1 S_GPP_H2 I BC32
GPP_H3/SRCCLKREQ9#
/X/SPTH ST177 1 S_GPP_H3 I BB31 R8
GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_N6 CK_100M_LAN1N [67]
S_GPP_H4 I BC33 R7 CK_100M_LAN1N LAN
[24] PCIEX16_SL1_PRSNT# GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_P6 CK_100M_LAN1P [67]
/X/SPTH ST178 1 S_GPP_H5 I BA33 CK_100M_LAN1P
GPP_H6/SRCCLKREQ12#
S_GPP_H6 I AW33 U5
GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_N7
I BB33 U7
[42] PCIEX1_SL1_PRSNT# GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_P7 M2_X4
/X/SPTH ST186 1 S_GPP_H8 I BD33
GPP_H9/SRCCLKREQ15#
S_GPP_H9 W10
CLKOUT_PCIE_N8
R13 W11 PCIEX16_3 (X4)
CLKOUT_PCIE_N15 CLKOUT_PCIE_P8
R11
CLKOUT_PCIE_P15
N3
CLKOUT_PCIE_N9
P1 N2 PCIEX16_2 (X8)
[42] CK_100M_X1SL1N CLKOUT_PCIE_N14 CLKOUT_PCIE_P9
PCIEX1_1 CK_100M_X1SL1N R2
[42] CK_100M_X1SL1P CLKOUT_PCIE_P14
CK_100M_X1SL1P P3
CLKOUT_PCIE_N10
W7 P2
CLKOUT_PCIE_N13 CLKOUT_PCIE_P10 ASM 1083
Y5
CLKOUT_PCIE_P13
R3 if not used,delete the unused signal
CLKOUT_PCIE_N11 CK_100M_X16SL1N [24]
U2 R4 CK_100M_X16SL1N PCIEX16_1 (X16,X8)
CLKOUT_PCIE_N12 CLKOUT_PCIE_P11 CK_100M_X16SL1P [24]
U3 CK_100M_X16SL1P
CLKOUT_PCIE_P12

SKYLAKE_PCH
REV = <REV>
02001-00491200
to CPU 100MHz
SC13 1.5PF/50V /X
CK_100M_PCHOP SC15 1 2 1.5PF/50V /X
CK_100M_PCHON 1 2

GPI PU
PCIE ref CLK to CPU 100MHz
SC1 1.5PF/50V /X
+3V CK_100M_PCIBCLKP SC2 1 2 1.5PF/50V /X
CK_100M_PCIBCLKN 1 2
CLK REQ# 請用+3V pull up,且上件
SR1000
CLK from Crystal to CPU 24MHz
1 2 SC4 1.5PF/50V /X
8.2KOhm S_GPP_B5 CK_24M_NSCCCLKP SC5 1 2 1.5PF/50V /X
CK_24M_NSCCCLKN 1 2

close to PCH GND


SR1001
1 2
8.2KOhm /X S_GPP_H0
PEG 100MHz
SC17 1.5PF/50V /X
W/S:4/40 mils CK_100M_X16SL1N SC18 1 2 1.5PF/50V /X
Routing on bottom side CK_100M_X16SL1P 1 2
SR1004
1 2
8.2KOhm SR1005 S_GPP_H5 S_24M_IN
1 2
8.2KOhm S_GPP_H8 CRB is 0603
SR801 SR14 1MOHM
1 2 1 2 S_24M_OUT
close to SLOT GND
15Ohm
SX2
2 1
S_24M_IN_R GND
SRC 100MHz
1

SC8 3 24MHZ SC9 SC140 1.5PF/50V /X


27PF/50V 27PF/50V CK_100M_X1SL1N SC139 1 2 1.5PF/50V /X
6/12:SR801 change to 15ohm.
CK_100M_X1SL1P 1 2
2

SC137 1.5PF/50V /X
CK_100M_X1SL2N SC138 1 2 1.5PF/50V /X
GND CK_100M_X1SL2P 1 2

S_RTCX1
S_RTCX2
SR1607 10MOhm
SX1_1
mbs_r0603 2 1

3 SX1 close to SLOT


1 GND 2 JUMPER_WIRE GND
GND no symbol 0.5Φ 6.3*4*6.3
4
32.768KHZ
Title :
1

SC143 SC144 PCH (CLOCK)


15PF/50V 15PF/50V
Trace < 1.5 Engineer: Bing-jie_Wang
2

ASUSTek Computer Inc.


Size Project Name Rev
Custom Skylake Chipset DEMO R1.00

RTC (10 MOHM RES): DO NOT CHANGE TO 0402 PACK_TYPE Date: Tuesday, October 27, 2015 Sheet 27 of 93
This strap should sample LOW. There should NOT be any
on-board device driving it to opposite direction during
strap sampling.

+3VSB

SR180 1 /X 2 8.2KOhm
+3VSB follow CRB S_GPP_H12
SR181 1 /X 2 8.2KOhm
stuff SR200 for XDP

CRB SR2 30 ohm GND


SR200 1KOhm /XDP SU1A
2 1 S_SPI_MOSI SR2
SR201 2 8.2KOhm 1 /X I/OD IPU BD17 BB27 O 1 2
[48] S_PME# GPP_A11/PME# GPP_B13/PLTRST# S_PLTRST# [47,67,71]
S_PME# S_PLTRST#_R 22Ohm
BOOT HALT ENABLED IF LOW AG15
RSVD1
PCH HAS INTERNAL WEAK PU AG14 P43 I follow CRB +3V
RSVD2 GPP_G16/GSXCLK
AF17 R39 I
RSVD3 GPP_G12/GSXDOUT
GND AE17 R36 I S_GPP_G12
RSVD4 GPP_G13/GSXSLOAD
R42 I SR28 /X 8.2KOhm
GPP_G14/GSXDIN
AR19 R41 I S_GPP_E3 2 1
TP2 GPP_G15/GSXSRESET#
AN17 SR15 /X 3.3KOHM
TP1
if not used,delete the unused signal S_GPP_G12 2 1
BB29 AF41 I SR78 /X 3.3KOHM
[40] S_SPI_MOSI SPI0_MOSI GPP_E3/CPU_GP0
S_SPI_MOSI IPU BE30 AE44 I S_GPP_E3 S_GPP_E7 2 1
[40] S_SPI_MISO SPI0_MISO GPP_E7/CPU_GP1
IPU BD31 BC23 I S_GPP_E7
[40] S_SPI_CS0# SPI0_CS0# GPP_B3/CPU_GP2
IPU BC31 BD24 I 1 ST182 /X/SPTH +3V_BAT
[40] S_SPI_CLK SPI0_CLK GPP_B4/CPU_GP3
IPU AW31 S_GPP_B4
SPI0_CS1#
BC36 I
GPP_H18/SML4ALERT#
IPU BC29 BE34 I S_GPP_H18 1 ST184 /X/SPTH
[40] S_SPI_IO2 SPI0_IO2 GPP_H17/SML4DATA
IPU BD30 BD39 I S_GPP_H17 SR87 1MOHM
[40] S_SPI_IO3 SPI0_IO3 GPP_H16/SML4CLK
IPU AT31 BB36 I S_GPP_H16 1 2
SPI0_CS2# GPP_H15/SML3ALERT#
I IPU AN36 BA35 I S_INTRUDER#
GPP_D1/SPI1_CLK GPP_H14/SML3DATA
I IPU AL39 BC35 I S_GPP_H14
GPP_D0/SPI1_CS# GPP_H13/SML3CLK
I IPU AN41 BD35 S_GPP_H13
I IPD
GPP_D3/SPI1_MOSI GPP_H12/SML2ALERT#
PU on SIO side(+3VSB) I IPU AN38 AW35 I S_GPP_H12 1 ST185 /X/SPTH
[47] O_PME# GPP_D2/SPI1_MISO GPP_H11/SML2DATA
S_GPP_D2 I IPU AH43 BD34 I S_GPP_H11 1 ST187 /X/SPTH SC521 1.5PF/50V /X
GPP_D22/SPI1_IO3 GPP_H10/SML2CLK
S_GPP_D22 I IPU AG44 BE11 S_GPP_H10 S_INTRUDER# 1 2
GPP_D21/SPI1_IO2 INTRUDER# S_INTRUDER# [49]
S_GPP_D21 S_INTRUDER#
GND
SKYLAKE_PCH

02001-00491200

for VBOOT control for DUMMY load control

SR96 1 /X 2 0Ohm +5VSB


[12] XDP_SPI_IO2
S_SPI_IO2

1
SR29
SR97 1 /X 2 0Ohm 8.2KOHM
[12] XDP_SPI_MOSI
S_SPI_MOSI
/X

2
mbs_r0603

1
SC191
O_+12V_DUMMYLOAD2 [86]
0.1UF/16V
/X 3

1 B

3
D

2
SQ52
H2N7002
GND 11 /X
P_GT_VBOOTA_0_10 S_GPP_D21 S_GPP_H14 G

C
2
E

3
S

1
SQ56 PMBS3904 SC203 2

2
1
1

1
SC195 +5VSB SC193 SR1742 0.1UF/16V
0.1UF/16V 0.1UF/16V 8.2KOhm /X

2
/X /X /X /X

1
2

2
SR33 GND

2
8.2KOHM GND
GND GND
/X O_+12V_DUMMYLOAD1 [86]
mbs_r0603 GND

2
+3VSB 3

3
D

1
SC192 SQ53
0.1UF/16V H2N7002
/X 11 /X

2
S_GPP_H18 G

1 B
S

1
SR1741 SC204 2

2
1
1 2 GND SR1743 0.1UF/16V
8.2KOhm S_GPP_D22 8.2KOhm /X
SRP4有用到,且需上件,swap 注意

2
P_VORE_VBOOT_0_10 S_GPP_D22 /X

C
2
E

3
/X
SQ57 PMBS3904 GND

2
1

1
SC196 SC194 GND
SR1740 0.1UF/16V 0.1UF/16V
1 2 /X /X /X GND

2
8.2KOhm S_GPP_H18
/X SR1739
1 2 GND
8.2KOhm S_GPP_H14 GND
/X SR1738
1 2
8.2KOhm S_GPP_D21
/X SR1737
1 2
8.2KOhm S_GPP_H16
/X SR1736
Title : SPTH (PCI/SPI)
1 2
8.2KOhm S_GPP_H13
ASUSTek Computer Inc.
Engineer: Morse_Peng
/X
Size Project Name Rev
A3 SkyLake VC R1.02A

Date: Tuesday, October 27, 2015 Sheet 28 of 93


SU1B
L27
[5] H_DMI_TXN0 DMI_RXN0
N27 AF5 IPD
[5] H_DMI_TXP0 DMI_RXP0 USB2N_1 S_U2DN1_R [61,62]
C27 AG7 IPD
[5] H_DMI_RXN0 DMI_TXN0 USB2P_1 S_U2DP1_R [61,62]
B27 AD5 IPD Front_USB3_12
[5] H_DMI_RXP0 DMI_TXP0 USB2N_2 S_U2DN2_R [61,62]
E24 AD7 IPD
[5] H_DMI_TXN1 DMI_RXN1 USB2P_2 S_U2DP2_R [61,62]
G24 AG8 IPD
[5] H_DMI_TXP1 DMI_RXP1 USB2N_3 S_U2DN3_R [61,62]
B28 AG10 IPD
[5] H_DMI_RXN1 DMI_TXN1 USB2P_3 S_U2DP3_R [61,62]
A28 AE1 IPD BACK_USB3_34
[5] H_DMI_RXP1 DMI_TXP1 USB2N_4 S_U2DN4_R [61,62]
G27 DMI AE2 IPD
[5] H_DMI_TXN2 DMI_RXN2 USB2P_4 S_U2DP4_R [61,62]
E26 AC2 IPD
[5] H_DMI_TXP2 DMI_RXP2 USB2N_5 S_U2DN5_R [61,63]
B29 AC3 IPD BACK_USB3_56
[5] H_DMI_RXN2 DMI_TXN2 USB2P_5 S_U2DP5_R [61,63]
C29 AF2 IPD
[5] H_DMI_RXP2 DMI_TXP2 USB2N_6 S_U2DN6_R [61,63]
L29 AF3 IPD
[5] H_DMI_TXN3 DMI_RXN3 USB2P_6 S_U2DP6_R [61,63]
K29 AB3 IPD
[5] H_DMI_TXP3 DMI_RXP3 USB2N_7 S_USB_PN6_R [60,68]
B30 USB 2.0 AB2 IPD
[5] H_DMI_RXN3 DMI_TXN3 USB2P_7 S_USB_PP6_R [60,68] LAN_USB78
A30 AL8 IPD
[5] H_DMI_RXP3 DMI_TXP3 USB2N_8 S_USB_PN7_R [60,68]
AL7 IPD
USB2P_8 S_USB_PP7_R [60,68]
Trace Width:12-15 mils, Other:12 mils B18 AA1 IPD
PCIE_RCOMPN USB2N_9 S_USB_PN8_R [59,60]
SR18 1 100Ohm 2 S_PCIE_RCOMPN C17 AA2 IPD
PCIE_RCOMPP USB2P_9 S_USB_PP8_R [59,60] Front_USB910
S_PCIE_RCOMPP AJ8 IPD
USB2N_10 S_USB_PN9_R [59,60]
H15 AJ7 IPD
PCIE1_RXN/USB3_7_RXN USB2P_10 S_USB_PP9_R [59,60]
G15 W2 IPD
PCIE1_RXP/USB3_7_RXP USB2N_11 S_USB_PN10_R [59,60]
H170 can only A16 W3 IPD
PCIE1_TXN/USB3_7_TXN USB2P_11 S_USB_PP10_R [59,60] Front USB1112
use as USB3.0 B16 AD3 IPD
PCIE1_TXP/USB3_7_TXP USB2N_12 S_USB_PN11_R [59,60]
AD2 IPD

PCIe/USB 3
USB2P_12 S_USB_PP11_R [59,60]
E17 V2 IPD
PCIE2_RXN/USB3_8_RXN USB2N_13
G17 V1 IPD
PCIE2_RXP/USB3_8_RXP USB2P_13
B19 AJ11 IPD
PCIE2_TXN/USB3_8_TXN USB2N_14
C19 AJ13 IPD SR157
PCIE2_TXP/USB3_8_TXP USB2P_14
S_USB_OC#1112 2
8.2KOhm 1
L17 /SPTH/H110
PCIE3_RXN/USB3_9_RXN
K17 +3VSB
PCIE3_RXP/USB3_9_RXP
If 10 USB3.0,these 2 ports B20 AD43 I IPD
PCIE3_TXN/USB3_9_TXN GPP_E9/USB2_OC0# S_USB3_OC#12 [61]
change to other PCIE port C20 AD42 I IPD
PCIE3_TXP/USB3_9_TXP GPP_E10/USB2_OC1# S_USB3_OC#34 [61]
AD39 I IPD
GPP_E11/USB2_OC2# S_USB3_OC#56 [61]
E20 AC44 I IPD
PCIE4_RXN/USB3_10_RXN GPP_E12/USB2_OC3# S_USB_OC#78 [59]
G19 Y43 I
PCIE4_RXP/USB3_10_RXP GPP_F15/USB2_OCB_4 S_USB_OC#910 [59]
B21 Y41 I
PCIE4_TXN/USB3_10_TXN GPP_F16/USB2_OCB_5 S_USB_OC#1112 [59]
A21 W44 I
PCIE4_TXP/USB3_10_TXP GPP_F17/USB2_OCB_6
W43 SR152
GPP_F18/USB2_OCB_7
K19 S_USB2_OCB_7 2
8.2KOhm 1
[42] S_X1_SL1_RXN PCIE5_RXN Place Within 500mil
L19
[42] S_X1_SL1_RXP PCIE5_RXP
D22 AG3 I SR22 1 2 113Ohm
[42] S_X1_SL1_TXN PCIE5_TXN USB2_COMP
C22 AD10 I S_USB2_COMP
[42] S_X1_SL1_TXP PCIE5_TXP USB2_VBUSSENSE
AB13 1 ST47 2
/X/SPTH 1 SR9
RSVD5
G22 AG2 IPU I GND
[42] S_X1_SL2_RXN PCIE6_RXN USB2_ID 1KOhm
E22 2 1
[42] S_X1_SL2_RXP PCIE6_RXP
B22 SR10
[42] S_X1_SL2_TXN PCIE6_TXN 1KOhm
A23
[42] S_X1_SL2_TXP PCIE6_TXP
BD14 1 ST48 /X/SPTH GND
GPD7/RSVD
L22 S_GP_D7
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP

K24
[67] S_X1_LAN1_RXN PCIE8_RXN
L24
[67] S_X1_LAN1_RXP PCIE8_RXP
C24
[67] S_X1_LAN1_TXN PCIE8_TXN
B24
[67] S_X1_LAN1_TXP PCIE8_TXP

SKYLAKE_PCH
REV = <REV>

02001-00491200

Title : SPTH (PCIE/DMI/USB)

ASUSTek Computer Inc.


Engineer: Morse_Peng
Size Project Name Rev
A4 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 29 of 93


P_+VDDQ_OV_1_10 [84] P_+VDDQ_OV_2_10 [84]

SPT-H_PCH
3 3
D H2N7002 D H2N7002
SU1C

3
AV2
CL_CLK
11 SQ905 11 SQ906 AV3 G35
CL_DATA CLINK PCIE13_RXN/SATA0B_RXN S_SATA6_RXN1 [43]
S_GPP_G2 G S_GPP_G3 G AW2 E35
S S CL_RST# PCIE13_RXP/SATA0B_RXP S_SATA6_RXP1 [43]
2 2
2

2
SC904 /X SC905 /X C36 If need 6 SATA 6G ports,

2
2

2
PCIE13_TXN/SATA0B_TXN S_SATA6_TXN1 [43] these 2 ports could be changed to SATA,
SR935 SR1655 I R44 B36
GPP_G8/FAN_PWM_0 PCIE13_TXP/SATA0B_TXP S_SATA6_TXP1 [43] if no SATAEXPRESS,these 2 ports could
8.2KOhm 0.1UF/16V 8.2KOhm 0.1UF/16V I R43 use as PCIE,but port 13 must not use to
1

1
GPP_G9/FAN_PWM_1
N/A N/A I U39 D39 connect LAN
GPP_G10/FAN_PWM_2 PCIE14_RXN/SATA1B_RXN S_SATA6_RXN2 [43]
I N42 E37
GPP_G11/FAN_PWM_3 PCIE14_RXP/SATA1B_RXP S_SATA6_RXP2 [43]
1

1
B38
FAN PCIE14_TXN/SATA1B_TXN S_SATA6_TXN2 [43]
I U43 C38
GPP_G0/FAN_TACH_0 PCIE14_TXP/SATA1B_TXP S_SATA6_TXP2 [43]
GND GND I U42
GPP_G1/FAN_TACH_1
I U41 F41
GPP_G2/FAN_TACH_2 PCIE15_RXN/SATA2_RXN S_SATA6_RXN3 [43]
S_GPP_G2 I M44 E41
GPP_G3/FAN_TACH_3 PCIE15_RXP/SATA2_RXP S_SATA6_RXP3 [43]
S_GPP_G3 I U36 B39
GPP_G4/FAN_TACH_4 PCIE15_TXN/SATA2_TXN S_SATA6_TXN3 [43]
S_GPP_G4 I P44 A39
GPP_G5/FAN_TACH_5 PCIE15_TXP/SATA2_TXP S_SATA6_TXP3 [43]
I T45
GPP_G6/FAN_TACH_6
I T44 D43
GPP_G7/FAN_TACH_7 PCIE16_RXN/SATA3_RXN S_SATA6_RXN4 [43]

PCIe/SATA
E42
PCIE16_RXP/SATA3_RXP S_SATA6_RXP4 [43]
I AB33 A41
GPP_F10/SCLOCK PCIE16_TXN/SATA3_TXN S_SATA6_TXN4 [43]
I AB35 A40
[47] GP_SIO_LED_SW1 GPP_F11/SLOAD PCIE16_TXP/SATA3_TXP S_SATA6_TXP4 [43]
I AA44
[47] GP_SIO_LED_SW3 GPP_F13/SDATAOUT0
I AA45 H42
[47] GP_SIO_LED_SW2 GPP_F12/SDATAOUT1 PCIE17_RXN/SATA4_RXN S_SATA6_RXN5 [43]
H40
PCIE17_RXP/SATA4_RXP S_SATA6_RXP5 [43]
G31 E45
PCIE9_RXN/SATA0A_RXN PCIE17_TXN/SATA4_TXN S_SATA6_TXN5 [43]
H31 F45
PCIE9_RXP/SATA0A_RXP PCIE17_TXP/SATA4_TXP S_SATA6_TXP5 [43]
C31
PCIE9_TXN/SATA0A_TXN SATA 5&6(ONLY B150)
B31 K37
PCIE9_TXP/SATA0A_TXP PCIE18_RXN/SATA5_RXN S_SATA6_RXN6 [43]
G37
PCIE18_RXP/SATA5_RXP S_SATA6_RXP6 [43]
G29 G45
P_+VDDQ_OV_3_10 [84] PCIE10_RXN/SATA1A_RXN PCIE18_TXN/SATA5_TXN S_SATA6_TXN6 [43]
E29 G44
PCIE10_RXP/SATA1A_RXP PCIE18_TXP/SATA5_TXP S_SATA6_TXP6 [43]
C32
PCIE10_TXN/SATA1A_TXN
B32 AD44 OD
PCIE10_TXP/SATA1A_TXP GPP_E8/SATALED#
3 AG36
D H2N7002
IPU I S_SATALED#_R
3

GPP_E0/SATAXPCIE0/SATAGP0
L31 AG35 IPU I
PCIE11_RXN GPP_E1/SATAXPCIE1/SATAGP1
K31 AG39 IPU I
PCIE11_RXP GPP_E2/SATAXPCIE2/SATAGP2
11 SQ914 C33 AD35 IPU I If not 2 SATA EXPRESS,DEL these 2 signal
PCIE11_TXN GPP_F0/SATAXPCIE3/SATAGP3
S_GPP_G4 G B33 AD31 IPU I
S PCIE11_TXP GPP_F1/SATAXPCIE4/SATAGP4
2
2

SC913 /X AD38 IPU I


2
2

GPP_F2/SATAXPCIE5/SATAGP5
SR1663 G33 AC43 IPU I SATAXPCIE[7:0]
PCIE12_RXN GPP_F3/SATAXPCIE6/SATAGP6
8.2KOhm 0.1UF/16V H33 AB44 IPU I Set 0 : PCIe
1

PCIE12_RXP GPP_F4/SATAXPCIE7/SATAGP7
N/A B35 Set 1 : SATA
PCIE12_TXN
A35 W36 I could change by ME
PCIE12_TXP GPP_F21/eDP_BKLTCTL
1

W35 I
GPP_F20/eDP_BKLTEN
L37 W42 I
PCIE19_RXN/SATA6_RXN GPP_F19/eDP_VDDEN
GND L39
PCIE19_RXP/SATA6_RXP
H43 HOST AJ3 I SR40 1 560Ohm 2
PCIE19_TXN/SATA6_TXN THERMTRIP#
H44 AL3 I/OS_VCORE_SHDN#_10_R S_VCORE_SHDN#_10
PCIE19_TXP/SATA6_TXP PECI
AJ4 SR44 1 2 30Ohm
PM_SYNC S_PM_SYNC [9]
N39 AK2 S_PM_SYNC_R
PCIE20_RXN/SATA7_RXN PLTRST_PROC# H_CPURST# [9,12]
N38 AH2
PCIE20_RXP/SATA7_RXP PM_DOWN H_PM_DOWN [9]
K44
PCIE20_TXN/SATA7_TXN

2
J45
PCIE20_TXP/SATA7_TXP

1
SC6 SR41
47PF/50V 1KOhm
SKYLAKE_PCH
REV = <REV> /X /X

2
02001-00491200

1
+1.0V_A

GND
SR1628
1 2 8.2KOhm
S_VCORE_SHDN#_10
ESDC14 1000PF/50V
2 1
/X S_VCORE_SHDN#_10_R

GND

SR618 1 0Ohm 2 /X
SR632 1 0Ohm 2
[79] P_VCORE_VRSHDN_10
Level Shift SD2
+3V +3V SR631 1 0Ohm 2 1
[9,79] P_VCORE_VRHOT#_R_10
/X 3
2 S_VCORE_SHDN#_10
[9] H_THERMTRIP#
2

SR1634 SR1635 BAT54AW


8.2KOhm 8.2KOhm
1

SC197
0.1UF/16V
/X
2

GND
1 B

HDLED- [49]
Title SPTH
: (HOST/FAN/SATA)
1

S_SATALED#_R
SC198
C
2
E

0.1UF/16V SQ46 PMBS3904


ASUSTek Computer Inc.
Engineer: Morse_Peng
/X
2

Size Project Name Rev


Custom SkyLake VC R1.00
GND
Date: Tuesday, October 27, 2015 Sheet 30 of 93
+3VSB Strap

SR93 8.2KOhm /X SU1D


1 2 S_GPP_C5

SR94 1KOhm /X 1 22Ohm 2 SR52 BA9 BB17


[55] S_HD_BITCLK HDA_BCLK GPP_A12/BMBUSY# /ISH_GP6/SX_EXIT_HOLDOFF#
2 1 1 22Ohm 2 SR1764 S_HD_BITCLK_R BD8 AW22 S_SX_EXIT_HOLDOFF#
I/OD
[55] S_HD_RST# HDA_RST# GPP_A8/CLKRUN#
S_HD_RST#_R IPD BE7 S_CLKRUN#
[55] A_HD_SDIN0 HDA_SDI0
0 = LPC Is selected for EC. (Default) IPD BC8 AR15
1 = eSPI Is selected for EC. HDA_SDI1 GPD11/LANPHYPC L1_ISOLATE# [67]
GND SR1763 If RTL LAN,change it to isolate
1 22Ohm 2 IPD BB7 AV13 O 1 ST144 /X/SPTH
[55] S_HD_SDOUT HDA_SDO GPD9/SLP_WLAN#
1 22Ohm 2 S_HD_SDOUT_R IPD BD9
[55] S_HD_SYNC HDA_SYNC
Strap SR1765 S_HD_SYNC_R BC14 OD
DRAM_RESET#
+3VSB BD1 BD23 I S_D4_RESET#
RSVD6 GPP_B2/VRALERT#
SR34 SR49 BE2 AL27 O S_VR_ALERT# 1 ST109 /X/SPTH
RSVD7 GPP_B1
/SBA 33Ohm
total lengtch <4,max=200;total lengtch >4,max=400 AR27 O If no combo DDR3&DDR4,
AUDIO GPP_B0 delete this
2 1 S_GPP_C2 1 2 IPD AM1 N44 I
[6] S_HDA_SDO_R DISPA_SDO GPP_G17/ADR_COMPLETE
1KOhm 33Ohm S_HDA_SDO IPD AN2 AN24 O 1 ST112 /X/SPTH
[6] H_HDA_SDI DISPA_SDI GPP_B11
SR35 8.2KOhm /X 1 2 AM2 AY1 I
[6] S_HDA_SCLK DISPA_BCLK SYS_PWROK S_SYSPWROK [12,38]
1 2 S_HDA_SCLK_R
TLS Confidentiality SR50 I AL42 BC13 I/OD IPD
GPP_D8/I2S0_SCLK WAKE# S_WAKE# [24,42,69]
0 = Disable Intel ME Crypto Transport Layer I AN42 BC15 O S_WAKE# 1 ST151 /X/SPTH
Security (TLS) cipher suite (no confidentiality). GPP_D7/I2S0_RXD GPD6/SLP_A#
GND I AM43 AV15 O S_SLP_A# 1 ST134 /X/SPTH
1 = Enable Intel ME Crypto Transport Layer GPP_D6/I2S0_TXD SLP_LAN#
Security (TLS) cipher suite (with confidentiality). I AJ33 BC26 O S_SLP_LAN# 1 ST113 /X/SPTH
Must be pulled up to support IntelR AMT with GPP_D5/I2S0_SFRM GPP_B12/SLP_S0#
/X/SPTH ST197 1 I AH44 AW15 O S_SLP_S0#
TLS and Intel SBA (Small Business Advantage) GPP_D20/DMIC_DATA0 GPD4/SLP_S3# S_SLP_S3# [38,47,84,90,93]
with TLS. S_GPP_D20 I AJ35 BD15 O
GPP_D19/DMIC_CLK0 GPD5/SLP_S4# S_SLP_S4# [47,84,88]
I AJ38 BA13 O
GPP_D18/DMIC_DATA1 GPD10/SLP_S5#
/X/SPTH ST194 1 I AJ42
GPP_D17/DMIC_CLK1
S_GPP_D17 AN15 O
GPD8/SUSCLK
BD13 I
GPD0/BATLOW#
BB19 I IPU S_GP_D0
+3VSB GPP_A15/SUSACK# S_SUSACK# [37]
LAN SMBUS BC10 BD19 o S_SUSACK#
RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK S_SUSWARN# [37]
S_RTCRST# BB10
SRTCRST#
S_SRTCRST#
I AW11 BD11 I IPD
[36,38,93] S_PWROK PCH_PWROK GPD2/LAN_WAKE#
SR167 499Ohm S_PWROK BA11 BB15 I L1_LAN_WAKE#
[37] S_RSMRST# RSMRST# GPD1/ACPRESENT
2 1 L1_SMBCLK S_RSMRST# BB13 O S_GP_D1
SLP_SUS# S_SLP_SUS# [40,86,87]
SR166 499Ohm I AV11 AT13 I IPU
[37] S_DPWROK DSW_PWROK GPD3/PWRBTN# O_IOPWRBTN# [12,47]
2 1 L1_SMBDATA S_DPWROK IPD O BB41 AW1 I O_IOPWRBTN#
GPP_C2/SMBALERT# SYS_RESET# O_RSTCON# [12,47]
SC31 1 2 10PF/50V S_GPP_C2 I AW44 BD26 O IPD O_RSTCON#
H: enable top swap mode +3VSB

SMBUS
[36] S_SMBCLK_VSB GPP_C0/SMBCLK GPP_B14/SPKR S_SPKR [49]
/X I BB43 AM3 1 2
[36] S_SMBDATA_VSB GPP_C1/SMBDATA PROCPWRGD H_CPUPWRGD [9,12]
SC32 1 2 10PF/50V IPD O BA40 S_CPUPWRGD_R SR75 30Ohm
GPP_C5/SML0ALERT#
/X S_GPP_C5 I AY44 AT2
GPP_C3/SML0CLK ITP_PMODE S_ITP_PMODE [12]
L1_SMBCLK I BB39 AR3 S_ITP_PMODE follow CRB
GPP_C4/SML0DATA JTAGX S_JTAGX [12]
L1_SMBDATA IPD O AT27 JTAG AR2 S_JTAGX 8.2KOhm SR1692
GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS S_JTAG_TMS [12]
GND S_GPP_B23 I AW42 AP1 S_JTAG_TMS 1 2
GPP_C6/SML1CLK JTAG_TDO S_JTAG_TDO [12]
S_GPP_C6 I AW45 AP2 S_JTAG_TDO S_SX_EXIT_HOLDOFF#
GPP_C7/SML1DATA JTAG_TDI S_JTAG_TDI [12]
S_GPP_C7 AN3 S_JTAG_TDI follow CRB 8.2KOhm SR1693
+3VSB JTAG_TCK S_JTAG_TCK [12]
GPI PU S_JTAG_TCK 1 2
S_VR_ALERT#
SKYLAKE_PCH
REV = <REV>
SR95 150KOHM /X
1 2 S_GPP_B23 SR60
02001-00491200
SR135 8.2KOhm SR56 1 2 0Ohm
1 2 S_GPP_C6 S_WAKE# 2 1
SR134 8.2KOhm
+3VSB 1KOhm
1 2 S_GPP_C7 +3V VDDQ +3V

VCC=+VDDQ SR36 /X

2
2
2
for EMI close to PCH SR1631 SR57 S_SYSPWROK 2 1
EC2 10PF/50V /X SR1636 8.2KOhm 470Ohm 1KOhm
8.2KOhm /X SR202 2 8.2KOhm 1
S_HD_BITCLK 1 2 /X S_CLKRUN#

1
ESDC13 1000PF/50V /X SR1641 2 8.2KOhm 1 /X
S_D4_RESET#_R [13,14]

1
S_SUSACK# 1 2 3

3
D
ESDC6 1000PF/50V /X SQ48
H2N7002 SC14 GND

2
S_SYSPWROK 1 2 11 /X 0.1UF/16V
ESDC7 1000PF/50V N/A +3VSB_ATX G /X

1
S
3 2 +3VSB_ADV

2
S_PWROK 1 2 C SQ47
ESDC8 1000PF/50V /X 8.2KOhm 1 B PMBS3904
S_D4_RESET# SR16301 2
/X /X
E

1
O_IOPWRBTN# 1 2 SC199
1

ESDC9 1000PF/50V /X SR102 0.1UF/16V 2

2KOhm /X GND GND 8.2KOhm SR1691

2
O_RSTCON# 1 2 3 1 2
ESDC10 1000PF/50V /X GND C SQ49 S_GP_D0
2

2 1 8.2KOhm 1 B PMBS3904 1 2
SR101
3VSB_ATX_R

S_RSMRST# S_SLP_S4# SR16321 2


/X /X S_GP_D1 8.2KOhm SR1688
E

1
ESDC12 1000PF/50V /X 1 2 BATTERY SC200
2 1 SR118 BATT_HOLDER 0.1UF/16V 2
SR122
S_DPWROK 47KOhm 1KOhm /X
DDR sequence,reseve follow CRB

2
mbs_r0603 1 2
+BAT_R 2 1 +BAT 1 2
BATTERY2 L1_LAN_WAKE#
GND GND
GND Battery GND
1

Socket 20KOhm
GND
1

KTS

SD1
LEAKTP2 LEAKTP1
+3V_BAT_RTC
LITHIUM BATT

CR2032
3V/220mAh
+3VSB +3V
ME disable

2
+3V_BAT BAT54CW SR120 PLACE ALL ABOVE CLOSE TO PCH

2
SR119 1KOhm SR1624 SR63
3

1 2 2.7KOHM 100Ohm
2 1 S_RTCRST# /X /X SR1625 1KOhm /X
1

18.7KOhm Clear RTC 1 2

1
SC59 S_HD_SDOUT_R
1

/X CLRTC 1UF/10V
1

1 3
X5R
SD3 2 SR66 1KOhm /X C SQ45
mbs_c0603 1 2 1 B PMBS3904
[35] ME_UNLOCK
+3V_BAT BAT54CW HEADER_1X2P /X
E
1
SR121 12006-00160500 GND SC201 SPTH (AUDIO/SMBUS/MISC)
3

1 2 0.1UF/16V2 Title :
S_SRTCRST# /X
2
1

20KOhm
ASUSTek Computer Inc.
Engineer: Morse_Peng
SC60 GND GND
PDG:RC time delay between 18ms~25ms must be met! 1UF/10V SR1623 0Ohm Size Project Name Rev
2

X5R
1 2
A3 SkyLake VC R1.00
mbs_c0603
audio side IO power must be +3VSB
GND Date: Tuesday, October 27, 2015 Sheet 31 of 93
SU1E

SPT-H_PCH

BB3
GPP_I7/DDPC_CTRLCLK
AW4 BD6 O IPD
[20] S_DVI_HPD GPP_I0/DDPB_HPD0 GPP_I8/DDPC_CTRLDATA
AY2 BA5
GPP_I1/DDPC_HPD1 GPP_I5/DDPB_CTRLCLK S_DVI_DDC_CLK [20]
AV4 BC4 O IPD S_DVI_DDC_CLK
GPP_I2/DDPD_HPD2 GPP_I6/DDPB_CTRLDATA S_DVI_DDC_DATA [20]
BA4 BE5 S_DVI_DDC_DATA +3VSB
[21] S_DP2VGA_HPD GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK
BE6 O IPD
GPP_I10/DDPD_CTRLDATA
Check if it need to be used
Y44 1 2 SR124 8.2KOhm
GPP_F14 H_SKTOCC# [9,47]
+3V V44 H_SKTOCC#_R 0Ohm /X
GPP_F23
/X/SPTH ST94 1 BD7 W39 S_GPP_H23 SR1633 2 1
GPP_I4/EDP_HPD GPP_F22
S_GPP_I4 L43
GPP_G23
L44
GPP_G22
U35 +3V
GPP_G21
R35
GPP_G20
BD36 I 8.2KOhm
GPP_H23
S_GPP_H23
SR1689 1 2 2.7KOHM S_SERIRQ SR100 2 1
S_DVI_DDC_CLK 8.2KOhm
SR1690 1 2 2.7KOHM
S_DVI_DDC_DATA O_KBRST# SR99 2 1
SKYLAKE_PCH
REV = <REV> 8.2KOhm

02001-00491200 S_GPP_G18 SR175 2 1 /X


8.2KOhm

S_GPP_G19 SR146 2 1 /X
8.2KOhm
S_DVI_HPD S_DP2VGA_HPD 1 2
SR243 /X

GND
+3VSB follow CRB
1

1
SC133 SC136
10PF/50V 10PF/50V
2

2
/X /X

1
SR145
8.2KOhm
GND GND

2
SPT-H_PCH
SU1F
S_LAD[3..0] [47,71]
B7
[61,62] S_U3RXDN1_R USB3_1_RXN
A7 AT22 IPU
[61,62] S_U3RXDP1_R USB3_1_RXP GPP_A1/LAD0/ESPI_IO0

LPC/eSPI
SC154 2 1 0.1UF/16V C11 AV22 IPU S_LAD0
[61,62] S_U3TXDN1_R USB3_1_TXN GPP_A2/LAD1/ESPI_IO1
X7R SC155 2 1 0.1UF/16V S_U3TXDN1_C B11 AT19 IPU S_LAD1
[61,62] S_U3TXDP1_R USB3_1_TXP GPP_A3/LAD2/ESPI_IO2
USB3_12 N/A void X7R N/A S_U3TXDP1_C BD16 IPU S_LAD2
GPP_A4/LAD3/ESPI_IO3
void C8 S_LAD3
[61,62] S_U3RXDN2_R USB3_2_RXN/SSIC_1_RXN
B8 BE16
[61,62] S_U3RXDP2_R USB3_2_RXP/SSIC_1_RXP GPP_A5/LFRAME#/ESPI_CS0# S_LFRAME# [47,71]
SC157 2 1 0.1UF/16V B12 BA17
[61,62] S_U3TXDN2_R USB3_2_TXN/SSIC_1_TXN GPP_A6/SERIRQ/ESPI_CS1# S_SERIRQ [47,71]
X7R SC156 2 1 0.1UF/16V S_U3TXDN2_C A12 AW17
[61,62] S_U3TXDP2_R USB3_2_TXP/SSIC_1_TXP GPP_A7/PIRQA#/ESPI_ALERT0#
N/A void
X7R N/A S_U3TXDP2_C AT17 S_GPP_A7
GPP_A0/RCIN#/ESPI_ALERT1# O_KBRST# [47]
void B10 BC18
[61,62] S_U3RXDN3_R USB3_3_RXN/SSIC_2_RXN GPP_A14/SUS_STAT#/ESPI_RESET# S_PWRDWN# [71]
A9 S_LPC_PD#
[61,62] S_U3RXDP3_R USB3_3_RXP/SSIC_2_RXP
SC159 2 1 0.1UF/16V C13
[61,62] S_U3TXDN3_R USB3_3_TXN/SSIC_2_TXN

USB
X7R SC158 2 1 0.1UF/16V S_U3TXDN3_C D13 BC17
[61,62] S_U3TXDP3_R USB3_3_TXP/SSIC_2_TXP GPP_A9/CLKOUT_LPC0/ESPI_CLK
USB3_34
void X7R S_U3TXDP3_C AV19 CK_24M_SIO_R
GPP_A10/CLKOUT_LPC1
void E11 CK_24M_TPM_R If no TPM,delete it
[61,62] S_U3RXDN4_R USB3_4_RXN CRB PU +3V for SMI#
G11 M45
[61,62] S_U3RXDP4_R USB3_4_RXP GPP_G19/SMI#
SC161 2 1 0.1UF/16V A14 N43 S_GPP_G19
[61,62] S_U3TXDN4_R USB3_4_TXN GPP_G18/NMI#
X7R SC160 2 1 0.1UF/16V S_U3TXDN4_C B13 S_GPP_G18
[61,62] S_U3TXDP4_R void
USB3_4_TXP
X7R S_U3TXDP4_C
void G13 AE45 PU on SIO side(+3VSB)
[61,63] S_U3RXDN5_R USB3_5_RXN GPP_E6/DEVSLP2
H13 AG43
[61,63] S_U3RXDP5_R USB3_5_RXP GPP_E5/DEVSLP1
SC163 2 1 0.1UF/16V B14 AG42
[61,63] S_U3TXDN5_R USB3_5_TXN GPP_E4/DEVSLP0
X7R SC162 2 1 0.1UF/16V S_U3TXDN5_C C14 AB39
[61,63] S_U3TXDP5_R USB3_5_TXP GPP_F9/DEVSLP7
void X7R S_U3TXDP5_C AB36 Check spec to determine whether to use these signal
USB3_56 /B150 GPP_F8/DEVSLP6
SATA

void K15 AB43


[61,63] S_U3RXDN6_R /B150 USB3_6_RXN GPP_F7/DEVSLP5
K13 AB42
[61,63] S_U3RXDP6_R USB3_6_RXP GPP_F6/DEVSLP4
SC165 2 1 0.1UF/16V B15 AB41
[61,63] S_U3TXDN6_R USB3_6_TXN GPP_F5/DEVSLP3
X7R SC164 2 1 0.1UF/16V S_U3TXDN6_C C15
[61,63] S_U3TXDP6_R void
USB3_6_TXP
X7R S_U3TXDP6_C
/B150 void
/B150 SKYLAKE_PCH
REV = <REV>

02001-00491200

1 22Ohm 2 SR3
CK_24M_SIO_IO [47]
CK_24M_SIO_R
/X

1 22Ohm 2 SR4
CK_24M_SIO_LPC [47]

If not NXP DP2VGA solution,delete this

1 22Ohm 2 SR125
CK_24M_TPM [71]
CK_24M_TPM_R /TPM
If not TPM,delete this Title : SPTH (DISPLAY/USB3)
close to PCH

ASUSTek Computer Inc.


Engineer: Morse_Peng
Size Project Name Rev
A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 32 of 93


+1.0V_A +1.0V_A_VCCAMPHYPLL
+1.0V_A
SR155
+3VSB

2
+1.0V_A +3VSB +P1V0_PRIME_PCH_FUSE_2V8 2 1
SPT-H_PCH

1
SU1H SR61 0Ohm SC76 SC77 SC78

0603
/X mbs_r0603 1UF/10V 0.1UF/16V 1UF/10V

1
AA23 s_short_r0603_nomask SC189 mbs_c0603 /X mbs_c0603
VCCPRIM_1p0_1

2
AA26 +3VSB_ADV SR72 0.1UF/16V /X /X
VCCPRIM_1p0_2

0603
AA28 AL22 /X /X Place close to PCH Pin A43 , B43
VCCPRIM_1p0_3 VCCPRIM_1p0_11

2
2
CORE
AC23 +P1V0_PRIME_PCH_FUSE_2V8 s_short_r0603_nomask
VCCPRIM_1p0_4
AC26 BA24 SR70 GND
VCCPRIM_1p0_5 VCCDSW_3p3_2

0603
1
+1V0_PCH_VCCDSW AC28 BA31 SC205 /X
VCCPRIM_1p0_6 VCCPGPPA

VCCGPIO
AE23 VCCPGPPA +3VSB 0.1UF/16V s_short_r0603_nomask
VCCPRIM_1p0_7
AE26 BC42 /X GND
VCCPRIM_1p0_8 VCCPGPPBCH1

1
Y23 BD40 +1.0V_A +1.0V_A_VCCAPLL
VCCPRIM_1p0_9 VCCPGPPBCH2
Y25 AJ41
VCCPRIM_1p0_10 VCCPGPPEF1
+1.0V_A BA29 AL41 GND SR154
DCPDSW_1p0 VCCPGPPEF2

1
AD41 VCCP_GPP SC85 SC184
VCCPGPPG
N17 AN5 0.1UF/16V 0.1UF/16V 2 1
VCCCLK1 VCCPRIM_3p3_1

1
R19 +1.0V_A +3V +3VSB +3V_BAT SC187 /X /X 0Ohm SC74 SC75
VCCCLK3

2
+1.0V_A_XCLK_BIAS U20 0.1UF/16V mbs_r0603 0.1UF/16V 1UF/10V
VCCCLK4
V17 AD15 /X /X mbs_c0603
VCCCLK2_1 VCCPRIM_1p0_12

2
R17 AD13 /X
VCCCLK2_2 VCCATS
K2 BA20 GND
VCCCLK5_1 VCCRTCPRIM_3p3
K3 BA22 GND Place close to PCH Pin AJ5, AL5, AN19
VCCCLK5_2 VCCRTC
+1.0V_A BA26 GND
DCPRTC
VCC_RTCEXT_CAP X7R BOARD CAP SC3 FOR VCCRTCEXT
U21 AJ20 +1.0V_A SC3

2
VCCMPHY_1p0_1 VCCPRIM_1p0_13
U23 AJ21 0.1UF/16V +1.0V_A +1.0V_A_XCLK_BIAS

MPHY
VCCMPHY_1p0_2 VCCPRIM_1p0_14
+1.0V_A_VCCAMPHYPLL U25 AJ23

1
VCCMPHY_1p0_3 VCCPRIM_1p0_15
U26 AJ25 +3VSB PLACE 3-5MM FROM PACKAGE EDGE SR153
VCCMPHY_1p0_4 VCCPRIM_1p0_16 PIN BA26
+1.0V_A_VCCMIPIPLL V26
VCCMPHY_1p0_5
A43 +3V_SPI GND 2 1
VCCMPHYPLL_1p0_1

1
B43 BE41 0Ohm SC182 SC68
VCCMPHYPLL_1p0_2 VCCSPI1
+1.0V_A C44 BE43 mbs_r0603 10UF/6.3V 0.1UF/16V
VCCPCIE3PLL_1p0_1 VCCSPI2
C45 BE42 VCCPGPPD mbs_c0603
VCCPCIE3PLL_1p0_2 VCCSPI3

2
2
+1.0V_A_VCCAPLL V28 BC44 /X
VCCAPLLEBB_1p0 VCCPGPPD1
AC17 BA45 SR71
VCCPRIM_1p0_17 VCCPGPPD2

0603
USB

AJ5 BC45 /X Place close to PCH Pin K2 , K3


VCCUSB2PLL_1p0_1 VCCPGPPD3
AL5 BB45 s_short_r0603_nomask GND
VCCUSB2PLL_1p0_2 VCCPGPPD4
+3VSB_HDA AN19
VCCHDAPLL_1P0

1
+3VSB_ADV BD3
VCCPRIM_3p3_2
BA15 BE3
VCCHDA VCCPRIM_3p3_3
W15 BE4 VCCPFUSE_3P3 +1.0V_A +1.0V_A
VCCDSW_3p3_1 VCCPRIM_3p3_4

1
SC190 USE 3 PAD
0.1UF/16V
/X
SKYLAKE_PCH

1
REV = <REV> SC181 SC69 SC70 SC71 SC72 SC73 SC179 SC180 SC79 SC80
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/10V 10UF/6.3V
02001-00491200 GND /X /X /X /X /X /X /X mbs_c0603 mbs_c0603

2
/X /X /X
Place close to PCH pin AD15
Place close to PCH pin U25, V26 , AC17,AA26,AC26,AE23,Y23 Place close to PCH pin U21

+3VSB +3VSB_HDA +3VSB VCCPGPPD GND GND


+3VSB
SR67 SR7
+3V_BAT +1.0V_A +3VSB
0603 0603
2 1 2 1

/X /X

1
SC84 SC86 SC87 SC88 SC185
s_short_r0603_nomask s_short_r0603_nomask 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/10V 0.1UF/16V

1
SD201 SD202 SD200 N/A /X /X mbs_c0603 N/A

2
PESD5V0S1UB PESD5V0S1UB PESD5V0S1UB N/A
07V10D55V0S0 07V10D55V0S0 07V10D55V0S0 close to PCH pin BC42 Place close to PCH pin BA20
/X /X /X

2
GND
GROUP D POWER
LPT-H : 3.3V (FOR INTERPOSER) CRB
SPT-H : 1.8V

注意PCH GPIO D Group power plane GND GND GND

+3V_SPI +3V_BAT +3V VCCPGPPD +3VSB_HDA


PCH-H SPEC : GPP A~G 1.8V or 3.3V
PCH-H SPEC : GPP I only 3.3V

1
SC183 X5R X5R
Deep Sleep Well Group (GPD) only 3.3V

1
0.1UF/16V SC202 SC81 SC89 SC177 SC178 SC66 SC67
/X 10UF/6.3V 1UF/6.3V 1UF/6.3V 0.1UF/16V 0.1UF/16V 1UF/6.3V 0.1UF/16V

2
mbs_c0603 /X /X /X N/A /X
RVP8 GPP D : 3.3V

2
/X to PCH pin BA22
Place close Place close to PCH pin AD13
Place close to PCH Pin BA15
/X
RVP10 GPP D : 1.8V
GND GND GND GND GND

+1V0_PCH_VCCDSW +3VSB_ADV

X5R X5R

1
SC82 SC83 SC174 SC186
+1.0V_A +1.0V_A_VCCMIPIPLL 1UF/6.3V 1UF/6.3V 0.1UF/16V 0.1UF/16V
N/A /X /X /X

2
SR156 Place close to PCH Pin BA29
Place close to PCH Pin W15,BA24,BA31
2 1
1

0Ohm SC188 GND GND


mbs_r0603 0.1UF/16V
/X
2

GND
Title : SPTH (POWER)
Change by intel update
ASUSTek Computer Inc.
Engineer: Morse_Peng
Size Project Name Rev
A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 33 of 93


SPT-H_PCH SPT-H_PCH
SU1I SU1L SU1J

SPT-H_PCH

AC18 AR5 C42 AB11 1 0Ohm 2 SR241


VSS1 VSS75 VSS165 VSS233
AN4 AR7 D10 AB7 CPU_VSS_AB11 BD2 AR22 1 ST6 /X/SPTH
VSS2 VSS76 VSS166 VSS234 VSS149 RSVD10
AN10 U15 D12 AB14 BD45 W13 TP_PCH_AR22 1 ST7 /X/SPTH
VSS3 VSS77 VSS167 VSS235 VSS150 RSVD11
BE14 AL4 D15 AB31 BD44 U13 TP_PCH_W13 1 ST8 /X/SPTH
VSS4 VSS78 VSS168 VSS236 VSS151 RSVD12
BE18 AE29 D16 AB32 BE44 P31 TP_PCH_U13 1 ST9 /X/SPTH
VSS5 VSS79 VSS169 VSS237 VSS152 RSVD13
BE23 AE4 D17 AB38 GND D45 N31 TP_PCH_P31 1 ST10/X/SPTH
VSS6 VSS80 VSS170 VSS238 VSS153 RSVD14
BE28 AE42 D19 AB4 A42 TP_PCH_N31
VSS7 VSS81 VSS171 VSS239 VSS154
BE32 AF18 D21 AB5 B45 P27 1 ST11/X/SPTH
VSS8 VSS82 VSS172 VSS240 VSS155 RSVD15
BE37 AF20 D24 AC1 B44 R27 TP_PCH_P27 1 ST12/X/SPTH
VSS9 VSS83 VSS173 VSS241 VSS156 RSVD16
BE40 AF21 D25 AC20 A4 N29 TP_PCH_R27 1 ST13/X/SPTH
VSS10 VSS84 VSS174 VSS242 VSS157 RSVD17
BE9 AF23 D27 AC21 A3 P29 TP_PCH_N29 1 ST14/X/SPTH
VSS11 VSS85 VSS175 VSS243 VSS158 RSVD18
C10 AF25 D29 AC25 B2 AN29 TP_PCH_P29 1 ST15/X/SPTH
VSS12 VSS86 VSS176 VSS244 VSS159 RSVD19
C2 AF26 D30 AC29 A2 R24 TP_PCH_AN29 1 ST16/X/SPTH
VSS13 VSS87 VSS177 VSS245 VSS160 RSVD20
C28 AF28 D31 AC45 B1 P24 TP_PCH_R24 1 ST17/X/SPTH
VSS14 VSS88 VSS178 VSS246 VSS161 RSVD21
C37 AF29 D33 AB8 BB1 TP_PCH_P24
VSS15 VSS89 VSS179 VSS247 VSS162
J7 AG11 D35 AD11 BC1 AT3
VSS16 VSS90 VSS180 VSS248 VSS163 PREQ# S_XDP_PREQ# [12]
K10 AG13 D36 AD14 A44 AT4
VSS17 VSS91 VSS181 VSS249 VSS164 PRDY# S_XDP_PRDY# [12]
K27 AG31 E13 AB15 AY5
VSS18 VSS92 VSS182 VSS250 CPU_TRST# S_XDP_TRST# [12]
K33 AG32 E15 AD32 C1 AL2
VSS19 VSS93 VSS183 VSS251 RSVD8 PCH_TRIGOUT
K36 AG33 E31 AD33 D1 AK1
VSS20 VSS94 VSS184 VSS252 RSVD9 PCH_TRIGIN
K4 AG38 E33 AD36
VSS21 VSS95 VSS185 VSS253
K42 AG4 F44 AD4
VSS22 VSS96 VSS186 VSS254
K43 AH1 F8 AD8
VSS23 VSS97 VSS187 VSS255
L12 AH17 G42 AE18
VSS24 VSS98 VSS188 VSS256 SKYLAKE_PCH
L13 AH18 G9 AE20 REV = <REV>
VSS25 VSS99 VSS189 VSS257 [10] H_CPU_TRIGGER
L15 AH20 H17 AE21
VSS26 VSS100 VSS190 VSS258 SR242
L4 AH21 H19 AE25 GND 02001-00491200
VSS27 VSS101 VSS191 VSS259
L41 AH23 H22 AE28 1 2
VSS28 VSS102 VSS192 VSS260
L8 AH25 H24 AL10 [10] S_CPU_TRIGGER S_CPU_TRIGGER_R
VSS29 VSS103 VSS193 VSS261
M35 AH26 H27 AL11
VSS30 VSS104 VSS194 VSS262 30Ohm
M42 AH28 H29 AL13
VSS31 VSS105 VSS195 VSS263
N10 AH29 H3 AL17
VSS32 VSS106 VSS196 VSS264
N15 AH45 H35 AL19
VSS33 VSS107 VSS197 VSS265
N19 AJ10 J10 AL24
VSS34 VSS108 VSS198 VSS266
N22 AJ14 J11 AL29
VSS35 VSS109 VSS199 VSS267
N24 AJ15 J3 AL32
VSS36 VSS110 VSS200 VSS268
N35 AJ17 J39 AL33
VSS37 VSS111 VSS201 VSS269
N36 AJ18 J5 AL38
VSS38 VSS112 VSS202 VSS270
N4 AJ26 T42 AM15
VSS39 VSS113 VSS203 VSS271
N41 AJ28 U10 AM17
VSS40 VSS114 VSS204 VSS272
N5 AJ29 U11 AM19
VSS41 VSS115 VSS205 VSS273
P17 AJ31 U14 AM22
VSS42 VSS116 VSS206 VSS274
P19 AJ32 U17 AM24
VSS43 VSS117 VSS207 VSS275
P22 AJ36 U18 AM27
VSS44 VSS118 VSS208 VSS276
P45 AK4 U28 AM29
VSS45 VSS119 VSS209 VSS277
R10 AK42 U29 AM45
VSS46 VSS120 VSS210 VSS278
R14 AU7 U31 AN11
VSS47 VSS121 VSS211 VSS279
R22 AV17 U32 AN22
VSS48 VSS122 VSS212 VSS280
R29 AV24 U33 AN27
VSS49 VSS123 VSS213 VSS281
R33 AV27 U38 AN31
VSS50 VSS124 VSS214 VSS282
R38 AV31 U4 AN39
VSS51 VSS125 VSS215 VSS283
R5 AV33 U8 AN7 HEATSINK
VSS52 VSS126 VSS216 VSS284
T1 AV6 V18 AN8 1
VSS53 VSS127 VSS217 VSS285
T2 AW13 V20 AP11
VSS54 VSS128 VSS218 VSS286
T4 AW19 V21 AP4
VSS55 VSS129 VSS219 VSS287
Y18 AW29 V23 AR33
VSS56 VSS130 VSS220 VSS288
Y20 AW37 V25 AR34
VSS57 VSS131 VSS221 VSS289
Y21 AW9 V29 AR42 2
VSS58 VSS132 VSS222 VSS290
Y26 AY38 V3 AR9
VSS59 VSS133 VSS223 VSS291
Y28 AY45 V45 AT10 HEATSINK
VSS60 VSS134 VSS224 VSS292
Y29 B25 W14 AT15
VSS61 VSS135 VSS225 VSS293 13071-00019600
A18 B3 W31 AT36
VSS62 VSS136 VSS226 VSS294
A25 B37 W32 AT9
VSS63 VSS137 VSS227 VSS295
A32 B40 W33 AU1
VSS64 VSS138 VSS228 VSS296
A37 B6 W38 AU35
VSS65 VSS139 VSS229 VSS297
AA17 BA1 W4 AU36
VSS66 VSS140 VSS230 VSS298
AA18 BB11 W8 AU39 M1
VSS67 VSS141 VSS231 VSS299
AA20 BB16 Y17 AU45 1
VSS68 VSS142 VSS232 VSS300 1
AA21 BB21 C4
VSS69 VSS143 VSS301
AA25 BB25 SMD98X67 /X
VSS70 VSS144
AA29 BB30 13030-00740100
VSS71 VSS145
AA4 BB34
VSS72 VSS146
AA42 BC2 M2
VSS73 VSS147
SR240 1 0Ohm 2 AB10 BD43 1
VSS74 VSS148 1
CPU_VSS_AB10
SKYLAKE_PCH
REV = <REV> SMD98X67 /X
13030-00740100
SKYLAKE_PCH
REV = <REV> 02001-00491200

02001-00491200 GND
GND GND GND GND GND

Title : LYNX (GND)


ASUSTek Computer Inc.
Engineer: IAN
Size Project Name Rev
A3 Z87-PRO R1.02A

Date: Tuesday, October 27, 2015 Sheet 34 of 93


+3VSB
Strap
CRB is 4.7k
SR27 1KOhm /X
2 1 S_GPP_B22

SR30 8.2KOhm /X
1 2
CRB is 20k
GND Boot BIOS Destination
0 SPI (Default)
1 LPC

+3VSB
CRB is 4.7k Strap
SPT-H_PCH
SU1K
SR31 8.2KOhm /X IPD O AT29
GPP_B22/GSPI1_MOSI
1 2 S_GPP_B18 /X/SPTH ST205 1 S_GPP_B22 I AR29 AL44 I
GPP_B21/GSPI1_MISO GPP_D9
/X/SPTH ST207 1 S_GPP_B21 I AV29 AL36 I
GPP_B20/GSPI1_CLK GPP_D10
SR32 1KOhm /X /X/SPTH ST206 1 S_GPP_B20 I BC27 AL35 I
GPP_B19/GSPI1_CS# GPP_D11
2 1 S_GPP_B19 AJ39 I S_GPP_D11
GPP_D12
IPD O BD28 S_GPP_D12
GPP_B18/GSPI0_MOSI
/X/SPTH ST209 1 S_GPP_B18 I BD27 AJ43 I
GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#
GND S_GPP_B17 I AW27 AL43 I S_GPP_D16
[54] GP_CHAFAN_PWM_DC# GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#
/X/SPTH ST208 1 S_GPP_B16 I AR24 AK44 I S_GPP_D15 S_PCB2
GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD /SML0BCLK/I2C2_SCL
0 = Disable “No Reboot” mode. (Default) S_GPP_B15 AK45 I S_GPP_D14 S_PCB1
1 = Enable “No Reboot” mode (PCH will disable the TCO I AV44
GPP_D13/ISH_UART0_RXD /SML0BDATA/I2C2_SDA
S_GPP_D13 S_PCB0
For clockgen
Timer system reboot feature). This function is useful GPP_C9/UART0_TXD
when running ITP/XDP. I BA41
GPP_C8/UART0_RXD
I AU44
GPP_C11/UART0_CTS#
/X/SPTH ST204 1 I AV43
GPP_C10/UART0_RTS#
S_GPP_C10
I AU41 BC38 I
GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL
I AT44 BB38 I S_GPP_H20
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA
/X/SPTH ST199 1 I AT43
GPP_C13/UART1_TXD/ISH_UART1_TXD
S_GPP_C13 I AU43 BD38 I
[31] ME_UNLOCK GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL
ME_UNLOCK BE39 I
GPP_H21/ISH_I2C1_SDA
I AN43
GPP_C23/UART2_CTS#
I AN44
GPP_C22/UART2_RTS#
I AR39
GPP_C21/UART2_TXD
I AR45 BC22 I
GPP_C20/UART2_RXD GPP_A23/ISH_GP5
BD18 I S_GPP_A23
GPP_A22/ISH_GP4
I AR41 BE21 I S_GPP_A22 1 2 SR131
GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 DP2VGA_XO [21]
I AR44 BD22 I DP2VGA_XO_R 0Ohm N/A
GPP_C18/I2C1_SDA GPP_A20/ISH_GP2
I AR38 BD21 I S_GPP_A20
GPP_C17/I2C0_SCL GPP_A19/ISH_GP1
I AT42 BB22 I S_GPP_A19
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0
I AM44 BC19 I S_GPP_A18
GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA GPP_A17/ISH_GP7
/X/SPTH ST212 1 I AJ44 S_GPP_A17
GPP_D23/ISH_I2C2_SCL/ ISH_I2C3_SCL
S_GPP_D23

SKYLAKE_PCH
02001-00491200

If the signal here is not unused,the GPIO need to be pull high to 3VSB here
PCB Rev. Strap
+3V

2
1

1
REV = <REV>
+3VSB SR37 SR39 SR64
+3VSB 1KOhm 8.2KOhm 1KOhm
/X /X

2
P_+VCCSAIO_OV#_1_10 [82,83] P_+VCCSAIO_OV#_2_10 [82,83]

1
2

+3VSB

2
SR1729
8.2KOhm SR1728 S_PCB0
3 3
D H2N7002 8.2KOhm D H2N7002 S_PCB1

3
N/A
S_PCB2
/X
1

SR1639

1
11 11

2
8.2KOhm SQ901 SQ902
S_GPP_D12 G S_GPP_D11 G SR38 SR43 SR73
S S
2 2
2

2
2 1 S_GPP_H20 SC900 /X 2 SC901 /X 8.2KOhm 8.2KOhm 8.2KOhm

2
2

2
SR1715 SR934 SR1651
1 2 8.2KOhm 0.1UF/16V 8.2KOhm 0.1UF/16V
1

1
8.2KOhm S_GPP_A17 /X N/A
/X
SR1716
1

1
1 2
/X
8.2KOhm S_GPP_A18
SR1717 GND GND
1 2
N/A
8.2KOhm S_GPP_A19 GND
SR1718
1 2
8.2KOhm S_GPP_A20
P_+1.0V_A_OV_1_10 [87]

/X

SR1720 3
D H2N7002
3

1 2
8.2KOhm S_GPP_A22
SR1721 11 SQ907
1 2 S_GPP_D16 G
/X S
2
2

8.2KOhm S_GPP_A23 SC906 /X


2
2

SR1662
8.2KOhm 0.1UF/16V
1

/X
N/A
1

GND

Title : SPTH (GPIO)

ASUSTek Computer Inc.


Engineer: Morse_Peng
Size Project Name Rev
A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 35 of 93

S_GPP_B20
+3VSB

+3VSB +3V

2
SR1722 SR1723
4.7KOHM 4.7KOHM

1
connect to PCI&PCIE
SLOT

4
SRN202D SRN202C SRN202A
SR1613 1 2 0Ohm /X 1KOHM 1KOHM 1KOHM SRN202B
[24,42] S_SMBCLK_SLOT
1KOHM

SR1612 1 2 0Ohm /X SQ1


[24,42] S_SMBDATA_SLOT

3
H2N7002

S
D
[31] S_SMBCLK_VSB S_SMBCLK_MAIN [12,17,21,79]
3 2

2
SQ2

G
11
H2N7002

S
D
[31] S_SMBDATA_VSB S_SMBDATA_MAIN [12,17,21,79]
3 2

2
G
11
1

1
SC58 SC57
10PF/50V +12V
10PF/50V

2
/X /X SR304 1 2 1KOhm

mbs_r0603

1
SQ2C1 +3VSB
0.1UF/16V 3 SQ3
GND /X C PMBS3904 SR305 1KOhm

2
B 1 1 2

Place near PCH E /X /X


2
GND

3
GND

3
D
SQ40
H2N7002
11
[31,38,93] S_PWROK
G /X
S
2

1
SQ40C1

2
0.1UF/16V
/X

2
GND GND

Title : SPTH (SMBUS/CLRTC)


ASUSTek Computer Inc.
Engineer: Morse_Peng
Size Project Name Rev
A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 36 of 93


POWER FLOW NOT SUPPORT DSW

Power plane Control link


+5VSB_ATX RT8065 +3VSB_ATX 0OHM
SR79
1 2 /X
+3VSB +3VSB_ADV S_SUSWARN# 0402 S_SUSACK#

SR81 0Ohm
1 2 SR80 0Ohm
1 2
S_DPWROK [31]
mbs_r0603 /NO-DSW O_RSMRST# S_DPWROK
EUP EUP mbs_r0402 /NO-DSW

PMOS 0OHM PMOS 0OHM +3VSB_ADV


if have one on SIO side,delet this
DSW DSW

SUPPORT DSW
Power plane Control link
+5VSB +3VSB 0OHM

[31] S_SUSWARN#

+3VSB_ATX +3VSB_ADV
[31] S_SUSACK#

PS:the common part design by SR83 0Ohm


[12,47,87] O_RSMRST#
power team,no-eup part and eup 1 2
part in SIO demo circuit
No-EUP Part mbs_r0603 /X/DSW

EUP Part if have one on SIO side,delet this

DSW Part

SR1627
1 2 /X
[31] S_RSMRST# O_RSMRST# [12,47,87]
0402

Title : SPTH (DSW SEQUENCE)


ASUSTek Computer Inc.
Engineer: IAN
Size Project Name Rev
A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 37 of 93


PCH_PWRGD & VCCST_PWRGD SR126 0Ohm /X SR1640 0Ohm N/A
Sequence Control Ckts 1 2 1 2
O_PWROK [47,65,85]

+3VSB +3V

2
SR127 SR128
8.2KOhm 8.2KOhm
/X

1
S_PWROK [31,36,93]
S_PWROK
3

3
D
SQ7

1
H2N7002 SC24
11 /X 0.1UF/16V
G /X
S

2
2

2
1
SQ7C1
3 0.1UF/16V

3
D
SQ6 /X

2
H2N7002
11 GND GND
[90] P_VR_READY_10
G GND
S
2

2
1
SC23 VCCST_VCCSFR
0.1UF/16V
/X

2
SR129
1KOhm
GND

1
S_VCCST_PWRGD [9]

SQ8 3 3

3
D D
H2N7002 SR130 SQ9
/X 0Ohm H2N7002
11 11
[31,47,84,90,93] S_SLP_S3#

1
G G SC26

2
S S
2 2 4.7UF/6.3V

2
1

1
SC25 SQ9C1 /X

2
0.1UF/16V 0.1UF/16V mbs_c0603
/X /X
2

2
GND GND GND GND GND

1. PCH will have a minimum of a 1ms delay from


PCH_PWROK to assertion of PROCPWRGD.
2. PLTRST# = AND (PCH_PWROK, SYS_PWROK, PROCPWRGD)
Refer to PDG Figure 40-1 SKL S Flow Diagram for
PCH_SYSPWROK Sequence Control Ckts SYS_PWROK/PCH_PWROK Generation
3. It is recommended that SYS_PWROK be
asserted after both PWROK assertion and processor
PCH does not monitor
4. PCH_PWROK and SYS_PWROK both needs to be high
to exit reset, but either signal can come up first.
SYS_PWROK be asserted after both PWROK assertion
and processor core VR PWRGD assertion.

SR132 0Ohm N/A

S_SYSPWROK [12,31]
P_VR_READY_10 1 2
SR133 0Ohm /X PU on PCH side

O_PWROK 1 2
SD5
1
S_SLP_S3# [31,47,84,90,93]
+VCC_EOPIO_PWRGD (OD) 3
2

+VCC_EDRAM_PWRGD (OD) BAT54AW

SPTH (PCH/SYS/PROC_PWROK)
Title :
ASUSTek Computer Inc.
Engineer: IAN
Size Project Name Rev
A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 38 of 93


<Variant Name>

TitleSPTH
: EUP Control

ASUSTeK COMPUTER INC


Engineer: Morse_Peng
Size Project Name Rev
A3 SkyLake VC R1.00

Date: Tuesday, October 27, 2015 Sheet 39 of 93


0.3G Beta
+3VSB

Standard Circuit

BIOS SPI
mbs_c0603_nomask

1
SR24 SC36

2
10KOHM 1UF/10V REV. F1_0.3G_Beta
mbs_r0402_nomask /X 2 SR26

2
S

0603
/X SQ36 s_short_r0603_nomask SPI /X/SPI

2
SR25 AP2301GN /X
11 07V512313130

BIOS

1
2 1 G mbs_sot23_ns +3V_SPI
D
0Ohm /X 3 /X
靠近PCH擺放

3
+3V_SPI mbs_r0402_nomask
3
SR1642 1KOhm N/A SR23 C SQ35
1 2 1 B PMBS3904
F_BIOS_WP# 2
SR1643 1
1KOhm
[31,86,87] S_SLP_SUS#
07G003000120 PEAK 30mA
N/A 10KOHM /X E mbs_sot23_ns
F_SPI_HOLD# 2 1 mbs_r0402_nomask 2 /X

1
SC35
F1U1 1UF/10V
1 8 mbs_c0603_nomask
CS# VCC

2
F_SPI_CS1#_R 2 7 /X
SO HOLD#
F_SPI_MISO 3 6 F_SPI_HOLD#
WP# SCLK
SR1644 F_BIOS_WP# 4 5 F_SPI_CLK
GND SI
F_SPI_MOSI GND GND
F_SPI_HOLD# 2 1 IC_SCK_8P

1
1KOhm
F1C1
SPI DIP SOCKET 1UF/6.3V
Reserved for support SBA/AMT

2
/X
GND

GND GND

靠近PCH擺放
SR569 15Ohm
1 2
[28] S_SPI_MISO
SR570 15Ohm F_SPI_MISO
1 2
[28] S_SPI_MOSI
SR571 15Ohm F_SPI_MOSI
1 2
[28] S_SPI_CLK
F_SPI_CLK

[28] S_SPI_CS0#
F_SPI_CS1#_R

SR573 15Ohm
1 2
[28] S_SPI_IO2
SR574 15Ohm F_BIOS_WP#
1 2
[28] S_SPI_IO3
F_SPI_HOLD#

SPI DIP 64M Flash P/N: F1U2

05006-00010600
SPI ROM

SPI DIP 128M Flash P/N: DIP 64M

05006-00090700
05006-00090700

<Variant Name>

Title : SINGLE BIOS

ASUSTek COMPUTER INC.


Engineer: IAN
Size Project Name Rev
R1.02A
A3 Z87-PRO
Date: Tuesday, October 27, 2015 Sheet 40 of 93
Title : PCH (CLOCK)

ASUSTek Computer Inc.


Engineer: Bing-jie_Wang
Size Project Name Rev
A2 Skylake Chipset DEMO R1.00

Date: Tuesday, October 27, 2015 Sheet 41 of 93


+3VSB +3V_ATX +12V +12V +3V_ATX

PCIEX1_1

S_SMBCLK_SLOT B1 A1
+12V_1 PRSNT1#
S_SMBDATA_SLOT B2 A2
+12V_2 +12V_3
B3 A3
RSVD1 +12V_4
B4 A4
GND1 GND6
B5 A5
SMCLK JTAG2
B6 A6
SMDAT JTAG3
B7 A7
GND2 JTAG4
B8 A8
+3.3V_1 JTAG5
B9 A9
JTAG1 +3.3V_2
B10 A10
3.3Vaux +3.3V_3
B11 A11
WAKE# PWRGD O_X1_RST# [47]
S_WAKE#

1
XCX73 2 1 0.1UF/16V X7R XC74
[29] S_X1_SL1_TXP
XCX74 2 1 S_X1_SL1_TXP_C 1.5PF/50V
[29] S_X1_SL1_TXN

2
0.1UF/16V X7R S_X1_SL1_TXN_C
/X

GND
B12 A12
RSVD2 GND7
Near Connector (Void) B13 A13
GND3 REFCLK+ CK_100M_X1SL1P [27]
B14 A14
HSOP0 REFCLK- CK_100M_X1SL1N [27]
B15 A15
HSON0 GND8
B16 A16
GND4 HSIP0 S_X1_SL1_RXP [29]
B17 A17
[27] PCIEX1_SL1_PRSNT# PRSNT2_1# HSIN0 S_X1_SL1_RXN [29]
B18 A18
GND5 GND9

1
NP_NC1
2
NP_NC2

SLOT_36P
GND GND
12003-00082100

+3VSB +3V_ATX +12V +12V +3V_ATX

PCIEX1_2

S_SMBCLK_SLOT B1 A1
+12V_1 PRSNT1#
S_SMBDATA_SLOT B2 A2
+12V_2 +12V_3
B3 A3
RSVD1 +12V_4
B4 A4
GND1 GND6
B5 A5
SMCLK JTAG2
B6 A6
SMDAT JTAG3
B7 A7
GND2 JTAG4
B8 A8
+3.3V_1 JTAG5
B9 A9 delete for 108x used
JTAG1 +3.3V_2
B10 A10
3.3Vaux +3.3V_3
B11 A11
WAKE# PWRGD O_X1_RST# [47]
S_WAKE# +3V_ATX delete it
for EMS

1
XCX83 2 1 0.1UF/16V X7R
[29] S_X1_SL2_TXP
XCX84 2 1 S_X1_SL2_TXP_C XC75 EL 820U: 11V040827130
[29] S_X1_SL2_TXN

1
0.1UF/16V X7R S_X1_SL2_TXN_C 1.5PF/50V PL 560U: 11V090567B22

2
+ X1CE2
/X
560UF/4V
GND mbs_cpl_560u4v_share_lfh_ms

2
B12 A12 11031-0002F000
RSVD2 GND7
B13 A13 /X
GND3 REFCLK+ CK_100M_X1SL2P [27]
B14 A14
HSOP0 REFCLK- CK_100M_X1SL2N [27]
Near Connector (Void) B15 A15
HSON0 GND8
B16 A16 GND
GND4 HSIP0 S_X1_SL2_RXP [29]
B17 A17
[27] PCIEX1_SL2_PRSNT# PRSNT2_1# HSIN0 S_X1_SL2_RXN [29]
B18 A18
GND5 GND9

+5V delete it +5VSB_ATX


for EMS
1
NP_NC1
2 EL 820U: 11V040827130
NP_NC2

1
PL 560U: 11031-0004F100
+ X1CE1 + X1CE3
560UF/6.3V 560UF/4V
SLOT_36P
GND GND mbs_cpl_560u6d3vshar_lfh_ms mbs_cpl_560u4v_share_lfh_ms

2
12003-00082100 11031-0004F100 11031-0002F000
/X /X

to SB SMBus(standby
power) GND GND

[24,36] S_SMBCLK_SLOT EL/PL colay


[24,36] S_SMBDATA_SLOT

[24,31,69] S_WAKE#

<Variant Name>

Pull-high at SB side
Title : PCIEX1_1

ASUSTek COMPUTER INC.


Engineer: KENNY_CHEN
Size Project Name Rev
R1.02A
A3 Z87-PRO
Date: Tuesday, October 27, 2015 Sheet 42 of 93
1.9

SATA6G_5
TCX3 2 1 0.01UF/16V 1 8
SATA6G_3 (30) S_SATA6_TXP5 1 P_GND1
/B150 mbs_c0402_ns_iv S_SATA6_TXP5_C 2
2
TCX2 2 1 0.01UF/16V 1 8 TCX5 2 1 0.01UF/16V 3
[30] S_SATA6_TXP3 GND1 NC1 (30) S_SATA6_TXN5 3
X7R S_SATA6_TXP3_C 2 /B150 mbs_c0402_ns_iv S_SATA6_TXN5_C 4
A+ 4
TCX4 2
void 1 0.01UF/16V 3 TCX7 2 1 0.01UF/16V 5
[30] S_SATA6_TXN3 A- (30) S_SATA6_RXN5 5
X7R S_SATA6_TXN3_C 4 /B150 mbs_c0402_ns_iv S_SATA6_RXN5_C 6
GND2 6
TCX6 2
void 1 0.01UF/16V 5 TCX10 2 1 0.01UF/16V 7 9
[30] S_SATA6_RXN3 B- (30) S_SATA6_RXP5 7 P_GND2
X7R S_SATA6_RXN3_C 6 /B150 mbs_c0402_ns_iv S_SATA6_RXP5_C
B+
TCX8 2
void 1 0.01UF/16V 7 9 SATA_CON_7P
[30] S_SATA6_RXP3 GND3 NC2
X7R S_SATA6_RXP3_C s_sata_7p_2hd_pinrex_lf3_ns
void /B150
SATA_CON_7P GND 12015-00063500
12015-00063500
GND

180度connector
SATA6G_6
TCX19 2 1 0.01UF/16V 1 8
SATA6G_4 (30) S_SATA6_TXP6 1 P_GND1
/B150 mbs_c0402_ns_iv S_SATA6_TXP6_C 2
2
TCX9 2 1 0.01UF/16V 1 8 TCX12 2 1 0.01UF/16V 3
[30] S_SATA6_TXP4 GND1 NC1 (30) S_SATA6_TXN6 3
X7R S_SATA6_TXP4_C 2 /B150 mbs_c0402_ns_iv S_SATA6_TXN6_C 4
A+ 4
TCX11 2
void 1 0.01UF/16V 3 TCX14 2 1 0.01UF/16V 5
[30] S_SATA6_TXN4 A- (30) S_SATA6_RXN6 5
X7R S_SATA6_TXN4_C 4 /B150 mbs_c0402_ns_iv S_SATA6_RXN6_C 6
GND2 6
TCX13 2
void 1 0.01UF/16V 5 TCX18 2 1 0.01UF/16V 7 9
[30] S_SATA6_RXN4 B- (30) S_SATA6_RXP6 7 P_GND2
X7R S_SATA6_RXN4_C 6 /B150 mbs_c0402_ns_iv S_SATA6_RXP6_C
B+
TCX15 2
void 1 0.01UF/16V 7 9 SATA_CON_7P
[30] S_SATA6_RXP4 GND3 NC2
X7R S_SATA6_RXP4_C s_sata_7p_2hd_pinrex_lf3_ns
void /B150
SATA_CON_7P GND 12015-00063500
12015-00063500 顏色: LIGHT GRAY
GND

SATA6G_1
TCX23 2 1 0.01UF/16V 1 8
[30] S_SATA6_TXP1 GND1 NC1
X7R S_SATA6_TXP1_C 2
A+
TCX22 2
void 1 0.01UF/16V 3
[30] S_SATA6_TXN1 A-
X7R S_SATA6_TXN1_C 4
GND2
TCX16 2
void 1 0.01UF/16V 5
[30] S_SATA6_RXN1 B-
X7R S_SATA6_RXN1_C 6
B+
TCX24 2
void 1 0.01UF/16V 7 9
[30] S_SATA6_RXP1 GND3 NC2
X7R S_SATA6_RXP1_C
void

SATA_CON_7P
12015-00063500
GND

180度connector
SATA6G_2
TCX25 2 1 0.01UF/16V 1 8
[30] S_SATA6_TXP2 GND1 NC1
X7R S_SATA6_TXP2_C 2
A+
TCX17 2
void 1 0.01UF/16V 3
[30] S_SATA6_TXN2 A-
X7R S_SATA6_TXN2_C 4
GND2
TCX20 2
void 1 0.01UF/16V 5
[30] S_SATA6_RXN2 B-
X7R S_SATA6_RXN2_C 6
B+
TCX21 2
void 1 0.01UF/16V 7 9
[30] S_SATA6_RXP2 GND3 NC2
X7R S_SATA6_RXP2_C
void

SATA_CON_7P
12015-00063500
GND

<Variant Name>

Title : SATA6G_123456(CHIPSET)

ASUSTek COMPUTER INC.


Engineer: KENNY_CHEN
Size Project Name Rev
R1.00
A2 Z87-PRO
Date: Tuesday, October 27, 2015 Sheet 43 of 93
Title
<Title>

Size Document Number Rev


A4 <Doc> <RevCode>

Date: Tuesday, October 27, 2015 Sheet 44 of 93


Check spec to choose one

<Variant Name>

Title : SATAEXPRESS

ASUSTek COMPUTER INC.


Engineer: Bing-jie_Wang
Size Project Name Rev
R1.00
C SKYLAKE
Date: Tuesday, October 27, 2015 Sheet 45 of 93
<Variant Name>

Title : 1.1VCG

ASUSTeK COMPUTER INC


Engineer: KENNY_CHEN
Size Project Name Rev
A3 Z87-PRO R1.02A

Date: Tuesday, October 27, 2015 Sheet 46 of 93


+3V_BAT

2
+5V +3V_BAT

O1R23
LPC Bus: check Chipset internal pull-high

2
2MOHM
O1R103 O1R101 O1R24

1
O1C2 2 1 10PF/50V 40.2KOhm 2MOHM
/X OU1 O1_P46 2 1 H_SKTOCC# mbs_r0603 /5538D_5568D_5539D
0Ohm /5510D O1R100

1
1
GND O1C11 /5510D
H_SKTOCC# [9,32]
100PF/50V O_5V_IN_2 2 1
O1R111 /5510D 0Ohm

1
2
+3VSB 3 O1R102 /5538D_5568D_5539D

IC Clock
[32] CK_24M_SIO_IO IOCLK
CK_SIO_IO_R3

Intruder
2 1 46 10KOhm O1C12

2
CASEOPEN0#
O1R1 1 2 8.2KOhm 0Ohm 48 O1_P46 GND 2 1 OC438 /X /5510D 1000PF/50V O1C12:
SKTOCC#
O_RSMRST# /5538D_5568D_5510D O_5V_IN_2 O_MS_CLK 100PF/50V 11V232101630 5538D_5568D - 100PF : 11V232101630

1
O1R2 1KOhm 5 2 1 OC437 /X 5510D - 1000PF: 11V232102670
[32,71] S_SERIRQ SERIRQ
O_IOPWRBTN#_R 1 2 12 O_MS_DATA 100PF/50V
[28,67,71] S_PLTRST# LRESET#
25 GND GND
[32,71] S_LFRAME# MCLK/GP23 O_MS_CLK [51]
+3V 11 26
[32,71] S_LAD[3..0] LFRAME# MDAT/GP22 O_MS_DATA [51] EE add GND

KBMS
9 27
LAD0 KCLK/GP21

LPC I/F
O_KB_CLK [51]
O1R3 8.2KOhm S_LAD0 8 28
LAD1 KDAT/GP20 O_KB_DATA [51]
O_RSTCON#_R 1 2 S_LAD1 7 13
LAD2 GA20M
S_LAD2 6 14 2 1 O_GA20 +3V Near monitor point
LAD3 KBRST# O_KBRST# [32]
+3V S_LAD3 4 O_KBRST#_R O1R25 300OHM
[32] CK_24M_SIO_LPC PCICLK
VCORE
CPUJP9

1
O1R4 1 2 1KOhm O1C1 O1R71 8.2KOhm
O_PWROK_R 10PF/50V O_KBRST#_R 1 2 /5510D
/X 2 1 /X

2
+3VSB_ATX
SHORTPIN
15
CTSA#/GP80 O_COM1_CTS1# [48]
+3VSB_ATX O1R97 300OHM GND 16 O1R70 8.2KOhm
DSRA#/GP81 O_COM1_DSR1# [48]
S_SLP_S3# 1 2 /5539D O1_PME# 17 O_GA20 1 2 /X O1R30 1KOhm
RTSA#/GP82/2E_4E_SEL O_COM1_RTS1# [48]
O1R6 8.2KOhm 18 O_COM1_RTS1# 2 1
DTRA#/GP83/24M_48M_SEL O_COM1_DTR1# [48]

COM
PWRBTN# 1 2 O1R98 0Ohm 19 O_COM1_DTR1# O1R72 8.2KOhm O_VCORE O_VCORE_IN
SINA/GP84 O_COM1_RXD1 [48]
O1R7 8.2KOhm 2 1 /5539D O_SLP_S3#_R 20 1 2 /X
SOUTA/GP85/TEST_MODE_EN O_COM1_TXD1 [48,72]
O_RSTCON#_P 1 2 21 O_COM1_TXD1 O1C30 1000PF/50V
DCDA#/GP86 O_COM1_DCD1# [48]
O1R8 8.2KOhm 47 22 GND 1 2 /X
RSMRST# RIA#/GP87 LAN_SIO_WAKE# [48,69]
O_3VSBSW# 1 2 /X O1R14 2 1 1KOhm O_12V_IN_2 30
[49] PWRBTN# PSIN
O1R5 1 2 33Ohm O_PWRBTN#_R 29 O1R31 2 1 1KOhm
[12,31] O_IOPWRBTN#
41
PSOUT# FAN Sense Speed Control
O1R10 300OHM O_IOPWRBTN#_R
[31,84,88] S_SLP_S4# SLP_S5#
O1R11 1 2 300OHM /5538D_5568D_5510D
O_SLP_S4#_R 32 CPU_FAN O_CPUFANIN O_CPUFAN_PWM
[31,38,84,90,93] S_SLP_S3# SLP_S3#
O1R99 1 2 0Ohm /5538D_5568D_5510D O_SLP_S3#_R 31 GND
[50] O_PSON#_O1 PSON#
+3VSB 2 1 O_+1.8VA CPU_OPT O_CPUOPTIN

Fan Control
O1R12 1 2 33Ohm 39
[38,65,85] O_PWROK PWROK

ACPI
O1R19 8.2KOhm O_PWROK_R 35 62 CHA_FAN1 O_CHAFANIN1 O_CHAFAN_PWM
[84] O_3VSBSW# 3VSBSW#/GP33/LATCH_BKFD_CUT# CPUFANOUT O_CPUFAN_PWM [53]
O_PME# 1 2 34 64
[52,65,85,86] O_DEEP_S5 DEEP_S5_0/3VSBSW/LATCH_BF_CUT /PWROK/ATXPGD SYSFANOUT O_CHAFAN_PWM [54]
O1R13 2 1 1KOhm 40 59 CHA_FAN2 O_CHAFANIN2 O_CHAFAN_PWM2 +5VSB_ATX
+3VSB [49] O_RSTCON#_P RESETCONI#/GP30/OVT#/SMI# AUXFANOUT0/GP00
O1R9 1 2 49.9Ohm O_RSTCON#_P_R 23 60
[12,31] O_RSTCON# RESETCONO#/GP47 GP01/AUXFANOUT1
O1R140 0Ohm /X O_RSTCON#_R 33 CHA_FAN3 O_CHAFANIN3 O_CHAFAN_PWM3 1 2
[28] O_PME# PME#
O1R21 8.2KOhm 2 1 O1_PME# O1R134 40.2KOhm /X
O_PLED 1 2 1 CHA_FAN4 O_CHAFANIN4 O_CHAFAN_PWM4 mbs_r0603
AUXFANIN0/GP04
/5538D_5568D_5510D 2 +3V_O1P1
AUXFANIN1/GP05

FANIN
O1R147 1 2 0Ohm 42 CHA_FAN5 O_CHAFANIN5 O_CHAFAN_PWM5 +12V
[65] USBPWR_SW# GP54/3VSBSW#/PWROK
+3VSB_ATX O1_PIN42 61 O1R32
CPUFANIN O_CPUFANIN [53]
O1R148 1 2 0Ohm /5539D 63 PWR_FAN O_PWRFANIN 1 2
SYSFANIN O_CHAFANIN1 [54]
O1R20 8.2KOhm SIO_LED_PWM_R O_12V_IN_1
O_MEMOK# 1 2 /X OC439 0.1UF/16V 11KOhm mbs_r0603

HW MONITOR

TEMP.IN
55 1 2 /5538D_5568D_5539D
CPUTIN H_TR [50]
56 /X
CPUD- GND
54 2 1
VIN4/AUXTIN0 O_TR_MB [50,77]
ESDO1C3 2 1 1000PF/50V mbs_r0603 GND O1R33 1KOhm 1 2
1000PF/50V
/X S_PLTRST# OR410 1 2 33Ohm 38 O1C32
[24] O_X16_RST# RSTOUT1#/GP75
OR411 1 2 33Ohm O_X16_RST#_R 37 52 /5538D_5568D_5539D /5538D_5568D_5539D
GND

RSTOUT
[42] O_X1_RST# RSTOUT2#/GP76 CPUVCORE
ESDO1C4 2 1 100PF/50V mbs_r0603 O_X1_RST#_R O_VCORE_IN GND

VIN
/X O_SLP_S4#_R 49
VIN0
50 O_12V_IN_1 +5V
ESDO1C5 2 1 100PF/50V
VIN1
O_5V_IN_1
1. unused TIN connect to O_TR_MB O1R34 40.2KOhm
/X O_SLP_S3#_R 2. unused VIN (no TIN multi-function) tie to GND 1 2

[9] O_H_PECI
58
PECI VREF
53
O_VREF_SIO [50]
3. unused FANIN tie to GND O_5V_IN_1 /5538D_5568D_5539D
ESDO1C15 2 1 100PF/50V mbs_r0603 +5VSB_DUAL

PECI
/X O1_PME#
+3V_BAT 1 2
O1R36 22KOhm
GND +VTT_O1 mbs_r0603 /5510D
O1R106 0Ohm O1R35
2 1 /5510D +3V_BAT_2 +3V_BAT_2 44 +3V 2 1
GP27/MLED
36 O1C34 1 2
1000PF/50V
GPIOE#
O1R107 OU1C44 O_MEMOK# 57 +3VSB_ATX +3V_BAT 10KOhm N/A N/A
2

GPIOE
VTT
1 2 0.1UF/16V 10 10V212100310
3VCC

POWER
SIO_LED_PWM_R /5510D 51 GND GND
1

AVCC
0Ohm /5538D_5568D 24 +AVCC_SIO O1R35:
3VSB
45 O1R104 0Ohm 5538D_5568D - 10K : 10V212100310
VBAT
O_+1.8VA +3V_BAT_1 2 1 /5538D_5568D_5539D
GND 5510D - 5.1K : 10V212510210
1

OU1C31 OU1C231 OR219


2

GND
0.1UF/16V 4.7UF/6.3V 1 2 43 OU1C45 O1R105 0Ohm

2
VSS
/5539D mbs_c0603 0.1UF/16V 2 1 /5510D O_RSMRST#
1

/X 0Ohm /5510D /5538D_5568D_5539D

1
GND
NCT5538D
GND
Nuvoton SIO COM Port Strapping Pin pull down
GND
06116-00050000 with 680 Ohm, pull high with 680 - 1K Ohm
O1R146
1 2 NCT5538D-A: 06116-00010000 +3V
USBPWR_SW# NCT5568D : 06116-00030000 LOW HIGH
0Ohm 3
NCT5539D : 06116-00050000
3

D
/X NCT5510D : 06116-00100000 O1R40 680Ohm N/A
O1Q146 2E 4E 1 2
11 H2N7002 O_COM1_RTS1#
O1R199 G /5539D
S
0Ohm O1C146 2 O1R42 680Ohm /5538D_5568D O1R43 680Ohm
2
2

AUDIO_LED_PWM 2 1 +3V_BAT_2 0.1UF/16V 24M 48M 1 2 1 2


/5539D /X O_COM1_DTR1#
1

+3VSB_ATX +3V +3VSB_ATX +3VSB +3V_BAT /5539D_5510D


O1R44 680Ohm N/A O1R45 680Ohm
Test_Mode Test_Mode 1 2 1 2
GND O_VREF_SIO _Dis _EN O_COM1_TXD1 /X
1

1
OU1C424 OU1C253 OU1C53 OU1C10 OU1C224 OU1C24 OU1C97 OU1C245
2

2
10UF/6.3V 1UF/16V 0.1UF/16V 0.1UF/16V 1UF/16V 0.1UF/16V 0.1UF/16V 10UF/6.3V
mbs_c0805 mbs_c0603 mbs_c0603 /X mbs_c0805
1

1
2

2
X5R /X /X X5R GND
/X /X

GND GND GND GND GND GND STANDARD CIRCUIT

O1C190 XUMB Super I/O


2 1 +3VSB
[30] GP_SIO_LED_SW1
2

0.1UF/16V +12V SIO_0.4E


O1R190 /X GND O1R108
2

1KOhm O1R110 0Ohm 1 2 /X


[12,37,87] O_RSMRST#
/5538D_5568D O1Q190 O1R193 2 1 /5538D_5568D_5539D
O_12V_IN_2
H2N7002 8.2KOhm 11KOhm mbs_r0603 /5510D +3V
1

/5538D_5568D /5538D_5568D
1
G

O1R122
1

GND 2 1
3

[49] O_PLED
SIO_LED_PWM_D1 O1R109 1KOhm 1 2
1000PF/50V +AVCC_SIO 2 1 BOM mount 5538D or 5568D mount 5539D mount 5510D
D

3
S

2
O1C100 0Ohm /5538D_5568D_5510D
O1C191 /5510D /5510D GND OU1C51 +3VSB_ATX N/A mount mount mount
2

2 1 GND 0.1UF/16V
[30] GP_SIO_LED_SW2
SIO_LED_PWM_R

O1R123 /X unmount unmount unmount


1
2

0.1UF/16V
O1R191 /X GND 2 1 /5538D_5568D mount unmount unmount
1KOhm GND 0Ohm /5539D
/5538D_5568D O1Q191 /5538D_5568D_5539D mount mount unmount
H2N7002 O1D193
1

/5538D_5568D 1 +3V /5538D_5568D_5510D mount unmount mount


1
G

3
GND 2 VCCST_VCCSFR +VTT_O1 /5539D_5510D unmount mount mount
3

[58] AUDIO_LED_PWM
SIO_LED_PWM_D2 O1R143 0Ohm /5539D
D

3
S

2
BAT54CW +3V_O1P1 2 1 1 2 0Ohm /5539D /5539D unmount mount unmount
3 /5538D_5568D
3

D
O1Q192 O1R159 /5510D unmount unmount mount
H2N7002 OU1C1
2

S
D

11 /5538D_5568D 0.1UF/16V 3 2
O1C12, O1R35 need change Part Number by SIO
3

[30] GP_SIO_LED_SW3
G /5539D O1Q159 OU1C57
1

2
S
G

2
2

O1R194 1 2 0Ohm H2N7002 +5V 0.1UF/16V


11
2

O1R192 O1C192 O_PLED /5539D O1C159 /5538D_5568D_5510D

1
2

<Variant Name>
1KOhm 0.1UF/16V
/5538D_5568D /X O1R195 1 2 0Ohm GND 1 2
1

AUDIO_LED_PWM /X 0.1UF/16V Title : NCT5538D_Intel


1

GND /X GND

ASUSTEK COMPUTER INC


Engineer: Kell_Huang
O1R196 1 2 0Ohm
GND /X O1_PME# Size Project Name Rev
A2
Super I/O Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 47 of 93


LPT PORT

LAN_SIO_WAKE# [47,69]

O1R171 1 2 0Ohm /NO_EUP

O1Q171

S
D
3 2 O_COM1_RI1#_Q

2
H2N7002

G
/EUP

11
+5V

O1C171

2
0.1UF/16V
/X

1
+3VSB

COM PORT GND

COM Header

1
BRN10A
8.2KOHM
COM
1 2 RING#
LS_COM1_DCD1# 3 4 LS_COM1_RXD1
to Chipset

2
LS_COM1_TXD1 5 6 LS_COM1_DTR1# BRN10B
+12V -12V +5V 7 8 LS_COM1_DSR1# 3 4
8.2KOHM
LS_COM1_RTS1# 9 LS_COM1_CTS1#
S_PME# [28]
LS_COM1_RI1#
HEADER_2X5P_K10 3
1

BU3C1 BU3C10 BU3C20 GND BRN10C C BQ14


12V602025BA0 5 6 1 B PMBS3904
8.2KOHM
0.1UF/16V 0.1UF/16V 0.1UF/16V LS_COM1_RI1#
2

/X /X /X E
modify Part Number by color 2

8
-12V +12V +5V
BRN10D
8.2KOHM
GND BU3
1 20
VDD VCC
2 19
RA1 RY1 O_COM1_DCD1# [47]

7
LS_COM1_DCD1# 3 18
RA2 RY2 O_COM1_DSR1# [47]
5 6 BCN5C N/A LS_COM1_DSR1# 4 17
150PF/50V RA3 RY3 O_COM1_RXD1 [47]
LS_COM1_RXD1 1 2 BCN4A N/A LS_COM1_RXD1 5 16
150PF/50V DY1 DA1 O_COM1_RTS1# [47]
LS_COM1_TXD1 7 8 BCN4D N/A LS_COM1_RTS1# 6 15
150PF/50V DY2 DA2 O_COM1_TXD1 [47,72]
LS_COM1_RI1# 5 6 BCN4C N/A LS_COM1_TXD1 7 14
150PF/50V RA4 RY4 O_COM1_CTS1# [47]
LS_COM1_DTR1# LS_COM1_CTS1# 8 13 GND
DY3 DA3 O_COM1_DTR1# [47]
1 2 BCN5A N/A LS_COM1_DTR1# 9 12
150PF/50V RA5 RY5
LS_COM1_DCD1# 3 4 BCN4B N/A LS_COM1_RI1# 10 11 O_COM1_RI1#_Q <Variant Name>
150PF/50V VSS GND
LS_COM1_CTS1# 7 8 BCN5D N/A
150PF/50V
LS_COM1_RTS1#
LS_COM1_DSR1#
3
150PF/50V
4 BCN5B N/A GD75232PWR
Title : COM_LPT
GND
GND ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Super I/O Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 48 of 93


+5VSB_ATX

HDLED+ HDLED- PLED+ PLED- PWRBTN# O_RSTCON#_P


SB_PWR
LED

1
ESDOC203 ESDOC205 ESDOC201 ESDOC204 OC206 OC202

2
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1000PF/50V 0.1UF/25V

2
/X N/A /X /X mbs_c0603 mbs_c0603
1

2
OR203
4.7KOhm
mbs_r0603
GND GND GND GND GND GND /X

1
If change to single resistor, use
PLACE NEAR PANEL or FPANEL 75 Ohm(10V213750010)
SMD SB_LED+
0805
+5V Green SB_PWR
GREEN
OR767
OR202 1 2 33Ohm 1 2 /X
[47] PWRBTN#
PWRBTN#_PANEL +5V_SPKO
75Ohm
OR204 1 2 33Ohm GND
[47] O_RSTCON#_P
O_RSTCON#_PR 33Ohm
OR766 1 2
SPKO SPKO-_R

[30] HDLED- 3
OR768
C
OC207 B 1

2
S_SPKR [31]
0.1UF/16V S_SPKR_R 2 1
/X E OQ202

1
2 8.2KOhm
PMBS3904

O_PLED/S_PLED GPIO select:


1. GPIO with blink function, default GPI (no internal pull-down resistor)
2. stand by power plane, 3V tolerance
10 Pin F_PANEL + 4 Pin SPEAKER OC252 3. GPI or GPO high to turn on Power LED
GND

2
0.1UF/16V 4. GPO low to turn off Power LED
/X 5. blink under S3
F_PANEL

1
1 2
HDLED+ 3 4 PLED+ GND
HDLED- 5 6 PLED-
7 8 PWRBTN#_PANEL
O_RSTCON#_PR 9

HEADER_2X5P_K10

12V602025BA0
GND

modify Part Number by color


Power LED power source use +5VSB_DUAL
+5V
SPEAKER
OR775
1 1 2
2 +5V_SPKO HDLED+
3 499Ohm
4
SPKO +5VSB_DUAL
HEADER_1X4P OR774
1 2
GND PLED+
499Ohm

PLED-

3 VDDQ
OR772
C
B 1
O_PLED_B 2 1
E OQ205 OC250
CHASSIS INTRUDER From

2
2 8.2KOhm
PMBS3904 0.1UF/16V
/X
SIO

1
+3V_BAT O_PLED_E
3 GND
pull high 2M Ohm to +3V_BAT & 100PF OR771
C
Cap to GND on SIO side or Chipset From
B 1
side O_PLED [47] SB
OR211 O_PLED_R 2 1
E
2

1 2 OQ203 OC251

2
S_INTRUDER# [28] 2 8.2KOhm
OR210 PMBS3904 0.1UF/16V
+5VSB_ATX 2MOHM 1KOhm /X

1
/X/CHASSIS /X O_CASEOPEN# to SIO
CHASSIS 3 S_INTRUDER# to Chipset GND
3

D
1

1 GND
OR251 OQ204
3 1 2 11
4 O_CASEOPEN G H2N7002
S /X/CHASSIS
OC210 1KOhm 2
2
2

HEADER_1X4P_K2 0.1UF/25V /X/CHASSIS


/X/CHASSIS mbs_c0603
1

/X

GND GND GND


<Variant Name>

modify Part Number by color Title : PANEL


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Super I/O Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 49 of 93


HW Monitor
EATX POWER [47] O_VREF_SIO

2
+5VSB_ATX
OR217 OR218
10KOhm 10KOhm
+5V +5V -5V +5VSB_ATX

1
+12V +3V_ATX +3V_ATX -12V
[47] H_TR O_TR_MB [47,77]

2
EATXPWR
EATXR216

25

2
20KOhm

1
1 13 mbs_r0603 HTC1 HTR1 OC217 OTR1 OTC1

hold1
+3V1 +3V4
2 14 0.1UF/16V 10KOHM 1UF/16V 10KOHM 0.1UF/16V
+3V2 -12V

1
3 15 EATXR16 mbs_c0603
GND1 GND4

2
4 16 1 2 X7R
+5V1 PSON# O_PSON#_O1 [47]

1
5 17 ATX_PSON#_R /X
GND2 GND5
6 18 33Ohm
+5V2 GND6
7 19
GND3 GND7 Place Place Place Place Place
8 20
PWR0K -5V EATXR16 & EATXR216 place near in CPU near follow near
9 21
5VSB +5V3 near EATX 24Pin GND HTR1 Socket SIO Rule OTR1 GND

1
10 22 EATXC16
+12V1 +5V4
11 23 1000PF/50V
+12V2 +5V5
hold2

12 24 /X
+3V3 GND8

2
If no CPU thermistor, unmount components HTR1, OC430, OR431
26

GND POWER_CON_24P GND GND


If no MB thermistor, unmount components OTR1, OC432, OR433
P_PWROK_PS

12015V00031500

modify Part Number by color


1

EATXC8
1000PF/50V
/X AMD:mount EMI CAP by model/by test,default /X
2

Intel:mount /Intel CAPs

GND +3V_ATX +5V +12V

ESDATC1 EATXC12 ESDATC4 EATXC6 ESDATC10


2

2
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
/Intel /X /Intel /X N/A
1

1
GND GND GND

+5VSB_ATX -12V -5V

ESDATC9 ESDATC14 EATXC15 EATXC20


2

0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V


/Intel /Intel /X /X
1

GND GND GND

place near EATXPWR

Delete it for
EMS
+5VSB_ATX
1

OD202
PESD5V0S1UB
07V10D55V0S0
/X
2

GND
placement near EATXPWR

<Variant Name>

Title : EATX
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Super I/O Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 50 of 93


share USB Port Power
+5V_USB3_P56 +5V_ZPS2

1
ESDOC405
0.1UF/16V
/X

2
GND

KBMS
+5VSB_DUAL

OR402 1 2 4.7KOhm mbs_r0603


OR403 1 2 4.7KOhm mbs_r0603
OR404 1 2 4.7KOhm mbs_r0603 2 1 OC435 /X
OR405 1 2 4.7KOhm mbs_r0603 O_MS_CLK 100PF/50V
2 1 OC436 /X
O_MS_DATA 100PF/50V

OCN403B 3 4 OR406 1 2 33Ohm 2 1 OC433 /X


150PF/50V O_KB_DATA [47]
O_KB_DATA_R mbs_r0603 O_KB_CLK 100PF/50V
OCN403A 1 2 OR407 1 2 33Ohm 2 1 OC434 /X
150PF/50V O_KB_CLK [47]
O_KB_CLK_R mbs_r0603 O_KB_DATA 100PF/50V
OCN403D 7 8 OR408 1 2 33Ohm
150PF/50V O_MS_DATA [47]
O_MS_DATA_R mbs_r0603
OCN403C 5 6 OR409 1 2 33Ohm GND
150PF/50V O_MS_CLK [47]
O_MS_CLK_R mbs_r0603
EE add
GND

+5V_ZPS2

KBMS
16 SIDE_G16

4 VCC1 NC2 6
2 NC1
17 SIDE_G17

1 KDATA
O_KB_DATA_R 3 GND1 KCLK 5
15 SIDE_G15 O_KB_CLK_R

PS2 MOUSE
14 SIDE_G14

10 VCC2 NC4 12
8 NC3

7 MDATA
O_MS_DATA_R 9 GND2 MCLK 11
13 SIDE_G13 O_MS_CLK_R

MINI_DIN_6PX2
12V017121002
GND

OD400

1 6
O_KB_DATA_R O_MS_DATA_R

2 5
6/17:pin5 NC designIP
GND

3 4
O_KB_CLK_R O_MS_CLK_R

IP4220CZ6
N/A

<Variant Name>

Title : KBMS
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Super I/O Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 51 of 93


ERP Circuit

Resistor
[47,65,85,86] O_DEEP_S5
+3VSB_ATX +3VSB

OR764 0Ohm /NO_EUP


1 2 mbs_r0805

1
OR765 0Ohm /NO_EUP ESDOC762
1 2 mbs_r0805 0.1UF/16V

2
/X

GND
Near SIO for ESD

No ERP Circuit
+3VSB_ATX OQ760 +3VSB
EMB45P03P
/EUP
D
S
3

2
G
1
2

2
1

OR763 OC761 OR760


2.7KOHM 0.1UF/16V 33Ohm
/EUP mbs_c0603 /EUP
2

X7R
1

/EUP

OR762 OC760
1 2 2 1
O_DEEP_S5 O_DEEP_S5_C /EUP
5.6KOhm
0.1UF/16V
mbs_r0603
/EUP

-12V

OR761 OQ761
<Variant Name>
S
D

2 1 O_DEEP_S5_12V 3 2
3

1KOhm H2N7002
Title : ERP
G

/EUP /EUP
11

ASUSTEK COMPUTER INC


Engineer: Kell_Huang
GND Size Project Name Rev
A4
Super I/O Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 52 of 93


CPU FAN +3V +5V +3V
OR302
1 2

2.7KOHM
PWM Mode

2
OR301 OR303
+12V 2.7KOHM 2.7KOhm OR304 O_CPUFAN_PWM
mbs_r0603 8.2KOhm
If change to single /X O_CPUFAN_PWM_B

1
resistor, use 0603

1
(10V213270210) O_CPUFAN_PWM_B O_CPUFAN_PWM_Q
OQ300

B 1

1
PMBS3904 OC303 OC304 OC305
CPU_FAN 0.1UF/16V 0.1UF/16V 0.1UF/16V
1 /X /X /X
PWM 1 O_CPUFAN_PWM [47]

2
2 O_CPUFAN_PWM_Q

C
3

E
2
SENSE 2
3
+12V 3
4
GND 4

1
5 OC300 OC301
NP_NC
0.1UF/16V 0.1UF/16V GND
WAFER_HD_4P /X OR300
2

2
GND 1 2
O_CPUFANIN [47]
12V802004A40 O_CPUFANIN_R
GND GND 2.7KOHM

<Variant Name>

Title : CPU_FAN
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Super I/O Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 53 of 93


4 Pin PWM Mode & DC Mode
Chassis FAN 1 +3V +5V +3V
OR312
1 2
DC QFAN PWM QFAN GP_CHAFAN_PWM_DC# O_CHAFAN_PWM

2
2.7KOHM

2
only one OR315 O_CHAFAN_PWM_B

2
CHAFAN call OR311 OR313 8.2KOhm
CHA_FAN, CHAFANPWR 2.7KOHM 2.7KOhm OR314 O_CHAFAN_PWM_Q
else call mbs_r0603 8.2KOhm

1
CHA_FAN1

1
If change to single /X OC313 OC314 OC315

1
resistor, use 0603 0.1UF/16V 0.1UF/16V 0.1UF/16V

1
(10V213270210) O_CHAFAN_PWM_B /X /X /X

2
OQ310

B 1
PMBS3904
CHA_FAN
1
PWM 1 O_CHAFAN_PWM [47]
2 O_CHAFAN_PWM_Q GND

C
3

E
2
SENSE 2
3
+12V 3
4
GND 4
1

1
5 OC310 OC311
NP_NC
0.1UF/16V 0.1UF/16V
WAFER_HD_4P /X OR310
2

GND 1 2
O_CHAFANIN1 [47]
12008V00011600 O_CHAFANIN1_R
GND GND 2.7KOHM

<Variant Name>

Title : CHA_FAN
Chassis FAN 1 +12V CHAFANPWR +12V Engineer: Kell_Huang
ASUSTEK COMPUTER INC
Split Power
Size Project Name Rev
Super I/O Demo Circuit
2

OU310R1 0Ohm A3 0.0


OR318 mbs_r0805 1 2 /X OU310
Date: Tuesday, October 27, 2015 Sheet 54 of 93
8.2KOhm 9VIA 18
9
10
11
12
13
14
15
16
17
GND10
GND11
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
mbs_r0603 1 8
VOUT NC3
2 7
VIN NC2
1

OU310R4 3 6
ENABLE(FON#) GND1
1 2 4 5
[47] O_CHAFAN_PWM VSET NC1
O_CHAFAN_VSET1
100KOhm NCT3941S
2

OR319 OU310C1 OU310C4 OU310C2 06053-00180000 GND


2.7KOHM 10UF/16V 1UF/16V 1UF/16V
mbs_c0805 mbs_c0603 mbs_c0603
2

X5R X7R X7R


use NCT3941S-A
1

GND GND GND GND

O_CHAFAN_EN
3
3

D
GP_CHAFAN_PWM_DC# GPIO select:
OQ311 1. could be GPI & GPO both, default GPI (no
11 H2N7002 internal pull-down/pull-high resistor)
[35] GP_CHAFAN_PWM_DC#
G 2. stand by power plane, 3V tolerance
S 3. GPI to switch to PWM Mode
1

OC312 2
2

0.1UF/16V 4. GPO low to switch to DC Mode


/X
2

GND GND
AU1
AR11
S_HD_SDOUT_R 22 Ohm S_HD_SDOUT 1 2 8 23
[31] A_HD_SDIN0 SDATA-IN LINE1-L(PORT-C-L) A_LINE_L_C [57]
A_HD_SDIN0_R
S_HD_SYNC_R 22 Ohm S_HD_SYNC 22Ohm 5 24
[31] S_HD_SDOUT SDATA-OUT LINE1-R(PORT-C-R) A_LINE_R_C [57]
10
Chipset S_HD_RST#_R S_HD_RST#
[31] S_HD_SYNC
11
SYNC
+5VA_IN
22 Ohm [31] S_HD_RST# RESET#

S_HD_BITCLK_R 22 Ohm S_HD_BITCLK 6 29


[31] S_HD_BITCLK BCLK LDOVDD

1
AU1C29 AU1C229
/X 0.1UF/16V 10UF/6.3V
The Resistor & CAP design
/X mbs_c0805
in Chipset Circuit and

2
35 X5R
place on Chipset side FRONT-L(PORT-D-L) A_LOUT_L_C [57]

36
FRONT-R(PORT-D-R) A_LOUT_R_C [57]
A_GND

12
BEEP

+3V

21
MIC1-L(PORT-B-L) A_MIC1_L_C [57]

1
AU1C201 AU1C1 22
MIC1-R(PORT-B-R) A_MIC1_R_C [57]
1UF/10V 0.1UF/16V
mbs_c0603

2
X5R 48 28
SPDIFO_1 MIC1-VREFO-L(PORT-B-VREFO-L) A_VREF_MIC1_L [57]
/X
18 32
CD-L MIC1-VREFO-R(PORT-B-VREFO-R) A_VREF_MIC1_R [57]
GND GND 19
CD-GND
20
CD-R

+3VSB
IO Power
1
DVDD
9
DVDD-IO
+5VA 45
SIDESURR-L(PORT-H-L)
1

1
AU1C209 AU1C9
1UF/10V 0.1UF/16V 38 46
AVDD2 SIDESURR-R(PORT-H-R)
mbs_c0603 25
AVDD1
2

2
X5R
/X

GND GND
33
SenseC

27
VREF
A_VREF 43
CENTER(PORT-G-L)
1

1
AU1C227 AU1C27
0.1UF/16V 10UF/6.3V 44
LFE(PORT-G-R)
/X mbs_c0805
2

2 X5R

A_GND

AR1 1 2 20KOhm 40
JDREF
A_JDREF 39
SURR-L(PORT-A-L)

A_GND 41
SURR-R(PORT-A-R)

2
[56] A_SPDIFO_HEADER GPIO0/DMIC_CLK/SPDIFO_2
3
REGREF
A_REGREF
1

AU1C3
10UF/6.3V
mbs_c0805
2

X5R
BOM
GND 14
LINE2-L(PORT-E-L) A_HPOUT_L_C [56]
N/A mount
15
LINE2-R(PORT-E-R) A_HPOUT_R_C [56]

/X unmount
+5VA
31
LINE2-VREFO(PORT-E-VREFO) A_VREF_FMIC2 [56]
1

AU1C225 AU1C25 AU1C238 AU1C38 16


MIC2-L(PORT-F-L) A_FMIC1_L_C [56]
10UF/6.3V 0.1UF/16V 10UF/6.3V 0.1UF/16V
STANDARD CIRCUIT
mbs_c0805 mbs_c0805 17
MIC2-R(PORT-F-R) A_FMIC1_R_C [56]
2

X5R X5R 37
PIN37-VREFO
XUMB Audio /X

Audio_0.3D A_GND 30
MIC2-VREFO(PORT-F-VREFO) A_VREF_FMIC1 [56]

HD_STANDARD_AUDIO
/X
47
EAPD/SPDIFI
GPIO1/DMIC_DATA

13
[57] A_SENSE_A SenseA
<Variant Name>
AVSS2

AVSS1
DVSS

34
[56] A_SENSE_B SenseB
Title : ALC887-VD
1

AC48 AC49 ALC892-GR


4
7

42

26

100PF/50V 100PF/50V 02G611007310


/X /X ASUSTEK COMPUTER INC
Engineer: Kell_Huang
2

ALC887-VD : 02G611007310 Size Project Name Rev


ALC892(Cu): 02G611230701
A3
AUDIO Demo Circuit
0.0
A_GND GND A_GND
Date: Tuesday, October 27, 2015 Sheet 55 of 93
for ALC887-VD2/ALC892/ALC1150
AAFP
for ALC887-VD2/ALC892
AAFP
1 2
A_FMIC1_L 3 4
A_FMIC1_R 5 6 AR8 1 2 20KOhm
A_HPOUT_R 7 A_JD_FMIC1
A_JD_FRONT 9 10 AR9 1 2 39.2KOhm
A_HPOUT_L A_JD_HPOUT
ACE9 100UF/16V AL13 1 2 75Ohm HEADER_2X5P_K8

+
[55] A_HPOUT_L_C
1 2 11011-00026000 A_HPOUT_L_L mbs_r0603 10V213750010 A_HPOUT_L mbs_hd_2x5p_k8_audio_lf3
ACE10 100UF/16V AL14 1 2 75Ohm A_GND

+
[55] A_HPOUT_R_C
1 2 11011-00026000 A_HPOUT_R_L mbs_r0603 10V213750010 A_HPOUT_R AR10 1 2 47OHM
A_SENSE_B [55]

1
AC27
100PF/50V AC37 0.01UF/16V N/A
AD2 A_FMIC1_L 1 2 11V232103370

2
1 2 ARN2A AC13 100PF/50V
2.7KOHM
2 A_VREF_FMIC2_L A_HPOUT_L_L A_HPOUT_L 1 2 /X AC38 0.01UF/16V N/A
[55] A_VREF_FMIC2 N/A
3 3 4 ARN2B AC14 100PF/50V A_GND A_FMIC1_R 1 2 11V232103370
2.7KOHM
1 A_VREF_FMIC2_R A_HPOUT_R_L A_HPOUT_R 1 2 /X
N/A
BAT54AW AC37, AC38
N/A A_GND 0.01UF without AMP: 11V232103370 A_GND
0.033UF with AMP : 11V232333370
without AMP

DIP CAP
EL 100U : 11G040810743
PL 100U : 11031V0001F000
Audio 100U: 11011-00026000
Gamer 100U: 11011-0002Z000

+5VSB +5VA_IN
AGL1
1 2 AGC1 2 1 0.1UF/16V

0Ohm mbs_r0603 AGC2 2 1 0.1UF/16V


SPDIF Header
+5V
AGC3 2 1 0.1UF/16V
SPDIF_OUT
1

A_GND GND 3
A_SPDIFO_HEADER [55]
4

1
AC32 AC28
HEADER_1X4P_K2 0.1UF/16V 100PF/50V
mbs_hd_1x4p_100_k2_lf3 /X /X

2
GND

AC21 2 1 10UF/6.3V AL15 1 2 75Ohm


[55] A_FMIC1_L_C
X5R mbs_c0805 A_FMIC1_L_L mbs_r0603 A_FMIC1_L
AC22 2 1 10UF/6.3V AL16 1 2 75Ohm
[55] A_FMIC1_R_C
X5R mbs_c0805 A_FMIC1_R_L mbs_r0603 A_FMIC1_R
1

AC15 AC16
100PF/50V 100PF/50V
AD1 /X /X
2

5 6 ARN2C
2.7KOHM
2 A_VREF_FMIC1_L
[55] A_VREF_FMIC1
3 7 8 ARN2D
2.7KOHM
1 A_VREF_FMIC1_R A_GND <Variant Name>
BAT54AW
Title : AAFP
ASUSTEK COMPUTER INC
Engineer: Kell_Huang

Delete it for EMS


Size Project Name Rev
A3
AUDIO Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 56 of 93


Delete it for EMS
for ALC887-VD2/ALC892
10UF
AR2 1 2 5.1KOhm
[55] A_SENSE_A
AR3 1 2 10KOhm A_JD_LOUT
ACE1 10UF/10V AR4 1 2 20KOhm A_JD_LINE

+
[55] A_LOUT_L_C
1 2 11011-00066000 A_JD_MIC1
ACE2 10UF/10V

+
[55] A_LOUT_R_C
1 2 11011-00066000

AL3 1 2 75Ohm
A_LOUT_L_L mbs_r0603 10V213750010 A_LOUT_L
AL4 1 2 75Ohm
A_LOUT_R_L mbs_r0603 10V213750010 A_LOUT_R

without AMP/De-POP
AC3 100PF/50V
A_LOUT_L 1 2 /X
AC4 100PF/50V
A_LOUT_L_L A_LOUT_R 1 2 /X

A_LOUT_R_L
A_GND

AC17 2 1 10UF/6.3V AL1 1 2 75Ohm


[55] A_LINE_L_C
X5R mbs_c0805 A_LINE_L_L mbs_r0603 A_LINE_L
AC18 2 1 10UF/6.3V AL2 1 2 75Ohm
[55] A_LINE_R_C
X5R mbs_c0805 A_LINE_R_L mbs_r0603 A_LINE_R

1
AC1 AC2
100PF/50V 100PF/50V
/X /X

2
A_GND

AC19 2 1 4.7UF/6.3V AL5 1 2 75Ohm


[55] A_MIC1_L_C
X5R mbs_c0603 A_MIC1_L_L mbs_r0603 A_MIC1_L
AC20 2 1 4.7UF/6.3V AL6 1 2 75Ohm
[55] A_MIC1_R_C
X5R mbs_c0603 A_MIC1_R_L mbs_r0603 A_MIC1_R

1
AC5 AC6 AUDIO
100PF/50V 100PF/50V 32
5 6 ARN1C /X /X A_LINE_L 33
Normal 2.7KOHM

2
A_JD_LINE 34 PORT3
7 8 ARN1D 35
2.7KOHM
1 2 ARN1A A_LINE_R 31 Light Blue
[55] A_VREF_MIC1_L 2.7KOHM
A_MIC1_L_L A_GND 22
3 4 ARN1B A_LOUT_L 23
[55] A_VREF_MIC1_R 2.7KOHM
A_MIC1_R_L A_JD_LOUT 24 PORT2
25
A_LOUT_R 21 Lime
2
A_MIC1_L 3
A_JD_MIC1 4 PORT1
5
A_MIC1_R 1 Pink
G1 P_GND1
G2 P_GND2
G3
P_GND3
G4
P_GND4
A_CGND P1
NP_NC1

1
AC24 AC23
0.1UF/16V 0.1UF/16V AUDIO_JACK_13P_5HOLD
/X mbs_audio_jack_13p_5hd_lf3

2
DIP CAP
EL 10U : 11G040822620
PL 10U : 11V090106207
Audio 10U: 11011-00066000 A_GND
Gamer 10U: 11011-0006Z000
EL 100U : 11G040810743
PL 100U : 11031V0001F000
Audio 100U: 11011-00026000
Gamer 100U: 11011-0002Z000

<Variant Name>

Title : 3 Jacks
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
AUDIO Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 57 of 93


AUDIO LED
+5VSB_DUAL if ARN101 change to single resistor, +5VSB_DUAL if ARN102 change to single resistor,
use R0603(10V213300110) use R0603(10V213300110)
2

2
AR270 AR271 AR272 AR273 AR274 AR275
300Ohm 300Ohm 300Ohm 300Ohm 300Ohm 300Ohm
1

1
/AUDIO_GAP_LED /AUDIO_GAP_LED /AUDIO_GAP_LED /AUDIO_GAP_LED /AUDIO_GAP_LED /AUDIO_GAP_LED
1

1
AULED1 AULED2 AULED3 AULED4 AULED5 AULED6
+

+
YELLOW YELLOW YELLOW YELLOW YELLOW YELLOW
07014-00091400 07014-00091400 07014-00091400 07014-00091400 07014-00091400 07014-00091400

/AUDIO_GAP_LED /AUDIO_GAP_LED /AUDIO_GAP_LED /AUDIO_GAP_LED /AUDIO_GAP_LED /AUDIO_GAP_LED


2

2
mbs_led_2p_63x31_spe mbs_led_2p_63x31_spe mbs_led_2p_63x31_spe mbs_led_2p_63x31_spe mbs_led_2p_63x31_spe mbs_led_2p_63x31_spe

place on Bottom Side, place on Bottom Side,


close to Gap close to Gap

Audio LED
ATX normal 12 pcs LED, m-ATX normal 6 pcs LED Yellow: 07014-00091400
Red : 07VA010R0000

+3VSB
2

AULED_GND1
AR100
8.2KOhm 3
3

D
/AUDIO_GAP_LED AQ101
H2N7002
1

11 /AUDIO_GAP_LED
[47] AUDIO_LED_PWM
G
S
2
2
1

AC102
0.1UF/16V
/X
2

GND

GND

AUDIO_LED_PWM GPIO select:


1. could be GPI & GPO both, default GPI (no internal pull-down resistor)
2. could mapping to Fading PWM function
3. stand by power plane, 3V tolerance
4. GPI to turn on Audio LED
5. GPO low to turn off Audio LED
6. Fading PWM to be Respiration Lamp

<Variant Name>

Title : Cover_LED
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
AUDIO Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 58 of 93


OC# circuit for Intel USB2 Header
+5V_USB_P910 +5VSB_DUAL +5V_USB_P910 +5V_USB_P910

UF5
1 2

1.6A/6V USB910
[29,60] S_USB_PN8

2
2 1
[29,60] S_USB_PP8
UR761 4 3
4.7KOhm S_USB_PN8 6 5 S_USB_PN9
[29,60] S_USB_PN9

1
ESDUC5 S_USB_PP8 8 7 S_USB_PP9
[29,60] S_USB_PP9
0.1UF/16V 10

1
/X

2
HEADER_2X5P
mbs_hd_2x5p_100_k9_usb_lf3
UR758
1 2
[29] S_USB_OC#910
12006-00022900
8.2KOhm GND
GND GND
modify Part Number by color

+5V_USB_P1112 +5VSB_DUAL +5V_USB_P1112 +5V_USB_P1112

UF6
1 2

USB1112 [29,60] S_USB_PN10


1.6A/6V
[29,60] S_USB_PP10
2

/B150 2 1
UR762 4 3
s_polyswitch_2p_179x128_ns [29,60] S_USB_PN11
4.7KOhm S_USB_PN10 6 5 S_USB_PN11
[29,60] S_USB_PP11

1
/B150 ESDUC6 S_USB_PP10 8 7 S_USB_PP11
0.1UF/16V 10
1

/X/B150
mbs_r0603_ns

2
HEADER_2X5P
mbs_c0402_nomask
s_hd_2x5p_100_k9_pin_lf3_ns
UR759
1 2
[29] S_USB_OC#1112
12006-00022900 /B150
8.2KOhm /B150 GND
GND GND
mbs_r0603_ns
modify Part Number by color

+5VSB_DUAL +5V_USB_P78
+5V_USB_P78
UF4
1 2

1.6A/6V
2

UR763
1

4.7KOhm ESDUC4
0.1UF/16V
/X
1

UR760
1 2
[29] S_USB_OC#78

8.2KOhm GND
GND

<Variant Name>

Title : USB2 Port


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Chipset USB Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 59 of 93


Delete it for
EMS

ESD Diode Reserve Location (RES A)


UD5 UD51

1 6 1 6
S_USB_PP8 S_USB_PN8 S_USB_PN9 S_USB_PP9

+5VSB +5VSB

[29,59] S_USB_PP8_R S_USB_PP8 [29,59]


2 5 2 5
[29,59] S_USB_PN8_R S_USB_PN8 [29,59]
[29,59] S_USB_PP9_R S_USB_PP9 [29,59]
[29,59] S_USB_PN9_R S_USB_PN9 [29,59]
GND GND

3 4 3 4
S_USB_PP9 S_USB_PN9 S_USB_PN8 S_USB_PP8

IP4220CZ6 IP4220CZ6
N/A /X

UD6
UD61

1 6 1 6
S_USB_PP10 I/O1 I/O4 S_USB_PN10 S_USB_PN11 I/O1 I/O4 S_USB_PP11

+5VSB +5VSB

[29,59] S_USB_PP10_R S_USB_PP10 [29,59]


2 5 2 5
[29,59] S_USB_PN10_R S_USB_PN10 [29,59]
GND VDD GND VDD
[29,59] S_USB_PP11_R S_USB_PP11 [29,59]
[29,59] S_USB_PN11_R S_USB_PN11 [29,59]
GND GND

3 4 3 4
S_USB_PP11 I/O2 I/O3 S_USB_PN11 S_USB_PN10 I/O2 I/O3 S_USB_PP10

AZC099-04SP
AZC099-04SP
/B150/X
/B150
s_sot23_s6_national_ns
s_sot23_s6_national_ns

UD4 UD41

1 6 1 6
S_USB_PP6 S_USB_PN6 S_USB_PP6 S_USB_PN6

+5VSB +5VSB

2 5 2 5

GND GND

3 4 3 4
[29,68] S_USB_PP6_R S_USB_PP6 [29,68]
S_USB_PP7 S_USB_PN7 S_USB_PP7 S_USB_PN7
[29,68] S_USB_PN6_R S_USB_PN6 [29,68]
[29,68] S_USB_PP7_R S_USB_PP7 [29,68]
IP4220CZ6 IP4220CZ6
[29,68] S_USB_PN7_R S_USB_PN7 [29,68]
N/A /X

<Variant Name>

Title : USB2 Port


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Chipset USB Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 60 of 93


OC# circuit for Intel
+5V_USB3_P12 +5VSB_DUAL +5V_USB3_P12 +5V_USB3_P12 +5V_USB3_P12

UF31 USB3_12
1 2 1
Vbus1
2 19
[32,62] S_U3RXDN1 RX1- Vbus2
2.6A/8V 3 18
[32,62] S_U3RXDP1 RX1+ RX2- S_U3RXDN2 [32,62]

2
4 17
GND1 RX2+ S_U3RXDP2 [32,62]
UR766 5 16
[32,62] S_U3TXDN1 TX1- GND4
4.7KOhm 6 15
[32,62] S_U3TXDP1 TX1+ TX2- S_U3TXDN2 [32,62]

1
ESDUC31 7 14
GND2 TX2+ S_U3TXDP2 [32,62]
0.1UF/16V 8 13
[29,62] S_U2DN1 D1- GND3

1
/X 9 12
[29,62] S_U2DP1 D1+ D2- S_U2DN2 [29,62]

2
10 11
ID D2+ S_U2DP2 [29,62]

UR764 BOX_HD_2X10P_K20
1 2 mbs_box_hd_2x10p_79_k20_sp
[29] S_USB3_OC#12

8.2KOhm 12007V00011900
GND GND GND GND

modify Part Number by color

+5V_USB3_P34 +5VSB_DUAL +5V_USB3_P34


+5V_USB3_P34 +5V_USB3_P34
UF32 USB3_34
1 2 1 10
VBUS1 VBUS2
2 11
[29,62] S_U2DN4 D-1 D-2 S_U2DN3 [29,62]
2.6A/8V 3 12
[29,62] S_U2DP4 D+1 D+2 S_U2DP3 [29,62]
2

4 13
GND1 GND2
UR768 5 14
[32,62] S_U3RXDN4 STDA_SSRX-1 STDA_SSRX-2 S_U3RXDN3 [32,62]
4.7KOhm 6 15
[32,62] S_U3RXDP4 STDA_SSRX+1 STDA_SSRX+2 S_U3RXDP3 [32,62]

1
ESDUC32 7 16
GND_DRAIN1 GND_DRAIN2
0.1UF/16V 8 17
[32,62] S_U3TXDN4 STDA_SSTX-1 STDA_SSTX-2 S_U3TXDN3 [32,62]
1

/X 9 18
[32,62] S_U3TXDP4 STDA_SSTX+1 SSTDA_STX+2 S_U3TXDP3 [32,62]

2
19 20
P_GND1 P_GND2
UR765 21 22
P_GND3 P_GND4
1 2
[29] S_USB3_OC#34
USB_CON_18P
8.2KOhm mbs_usb_18p_4hd_lf3
GND GND GND GND

+5V_USB3_P56 +5VSB_DUAL +5V_USB3_P56 +5V_USB3_P56 +5V_USB3_P56


USB56
UF33 1 10
VBUS1 VBUS2
1 2 2 11
(29,63) S_U2DN6 D-1 D-2 S_U2DN5 (29,63)
3 12
(29,63) S_U2DP6 D+1 D+2 S_U2DP5 (29,63)
1.6A/6V 4 13
GND1 GND2
2

07V709316000 5 14
(32,63) S_U3RXDN6 STDA_SSRX-1 STDA_SSRX-2 S_U3RXDN5 (32,63)
UR769 6 15
(32,63) S_U3RXDP6 STDA_SSRX+1 STDA_SSRX+2 S_U3RXDP5 (32,63)
4.7KOhm 7 16
GND_DRAIN1 GND_DRAIN2

1
ESDUC33 8 17
(32,63) S_U3TXDN6 STDA_SSTX-1 STDA_SSTX-2 S_U3TXDN5 (32,63)
0.1UF/16V 9 18
(32,63) S_U3TXDP6 STDA_SSTX+1 SSTDA_STX+2 S_U3TXDP5 (32,63)
1

2.6A: 07V709526000 /X

2
1.6A: 07V709316000 19 20
P_GND1 P_GND2
21 22
P_GND3 P_GND4
UR767
1 2 USB_CON_18P
[29] S_USB3_OC#56
mbs_usb_18p_4hd_lf3
8.2KOhm GND GND
GND GND 12012-00050200

USB 3.0 Conn: 12013V00031200


USB 2.0 Conn: 12012-00050200

<Variant Name>

Title : USB3 Port


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Chipset USB Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 61 of 93


Port 12 Reserve Location (RES A) Reserve Location (Single RES)
Delete it for

3
EMS URN32C ULA33
5 6 0OHM CHOKE_4P
ESD Diode URN32D
/X mbs_choke_r_4p_colay_ns
/X

2
7 8 0OHM

3
/X ULB33
CHOKE_4P
[32,61] S_U3RXDN1_R S_U3RXDN1 [32,61]
mbs_choke_r_4p_colay_ns
[32,61] S_U3RXDP1_R S_U3RXDP1 [32,61]
/X
[32,61] S_U3TXDN1_R S_U3TXDN1 [32,61]

2
UD31
[32,61] S_U3TXDP1_R S_U3TXDP1 [32,61]
1 9 URN31C
Line-1 NC4
S_U3TXDP2 2 8 5 6 0OHM
Line-2 NC3 [32,61] S_U3RXDN3_R S_U3RXDN3 [32,61]
S_U3TXDN2 3 /X
GND [32,61] S_U3RXDP3_R S_U3RXDP3 [32,61]
4 7 URN31D
Line-3 NC2 [32,61] S_U3TXDN3_R S_U3TXDN3 [32,61]
S_U3TXDN1 5 6 7 8 0OHM
Line-4 NC1 [32,61] S_U3TXDP3_R S_U3TXDP3 [32,61]
S_U3TXDP1 /X
AZ1045-04F

GND
URN32A

3
1 2 0OHM ULA34
/X CHOKE_4P
URN32B mbs_choke_r_4p_colay_ns
3 4 0OHM /X

2
/X

3
UD32 ULB34
[32,61] S_U3RXDN2_R S_U3RXDN2 [32,61]
1 9 CHOKE_4P
Line-1 NC4 [32,61] S_U3RXDP2_R S_U3RXDP2 [32,61]
S_U3RXDN2 2 8 mbs_choke_r_4p_colay_ns
Line-2 NC3 [32,61] S_U3TXDN2_R S_U3TXDN2 [32,61]
S_U3RXDP2 3 /X
GND [32,61] S_U3TXDP2_R S_U3TXDP2 [32,61]

2
4 7 URN31B
Line-3 NC2
S_U3RXDN1 5 6 3 4 0OHM
Line-4 NC1
S_U3RXDP1 /X
[32,61] S_U3RXDN4_R S_U3RXDN4 [32,61]
AZ1045-04F URN31A
[32,61] S_U3RXDP4_R S_U3RXDP4 [32,61]
1 2 0OHM
[32,61] S_U3TXDN4_R S_U3TXDN4 [32,61]
GND /X
[32,61] S_U3TXDP4_R S_U3TXDP4 [32,61]

UD21

1 6
S_U2DP1 S_U2DN1

+5VSB

[29,61] S_U2DP2_R S_U2DP2 [29,61]


2 5
[29,61] S_U2DN2_R S_U2DN2 [29,61]
[29,61] S_U2DP1_R S_U2DP1 [29,61]
[29,61] S_U2DN1_R S_U2DN1 [29,61]
GND

3 4
[29,61] S_U2DP4_R S_U2DP4 [29,61]
S_U2DP2 S_U2DN2
[29,61] S_U2DN4_R S_U2DN4 [29,61]
[29,61] S_U2DP3_R S_U2DP3 [29,61]
IP4220CZ6
[29,61] S_U2DN3_R S_U2DN3 [29,61]
N/A

UD211

1 6
S_U2DP1 S_U2DN1

+5VSB

2 5

GND UD221

3 4 1 6
S_U2DP2 S_U2DN2 S_U2DP4 S_U2DN4

Port 34
IP4220CZ6 +5VSB
/X
2 5

Delete it for GND


EMS
3 4
ESD Diode S_U2DP3 S_U2DN3

IP4220CZ6
UD22 /X

1 6
S_U2DP3 S_U2DN3
UD33 UD34
1 9 1 9 +5VSB
Line-1 NC4 Line-1 NC4
S_U3TXDN4 2 8 S_U3RXDN3 2 8
Line-2 NC3 Line-2 NC3
S_U3TXDP4 3 S_U3RXDP3 3 2 5
GND GND
4 7 4 7
Line-3 NC2 Line-3 NC2
S_U3TXDN3 5 6 S_U3RXDN4 5 6 <Variant Name>
Line-4 NC1 Line-4 NC1
S_U3TXDP3 S_U3RXDP4 GND
AZ1045-04F AZ1045-04F
3 4
Title : USB3 Port
GND GND S_U2DP4 S_U2DN4
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
IP4220CZ6
Size Project Name Rev
N/A
A3
Chipset USB Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 62 of 93


Port 56
Delete it for
Reserve Location (Single RES)
EMS
ESD Diode

3
ULA35
CHOKE_4P
mbs_choke_r_4p_colay_ns
/X/B150

2
4

3
ULB35
UD35 CHOKE_4P
1 9 mbs_choke_r_4p_colay_ns
Line-1 NC4
S_U3RXDN6 2 8 /X/B150
Line-2 NC3

2
S_U3RXDP6 3
GND
4 7
Line-3 NC2
S_U3RXDN5 5 6
Line-4 NC1 [32,61] S_U3RXDN5_R S_U3RXDN5 [32,61]
S_U3RXDP5
[32,61] S_U3RXDP5_R S_U3RXDP5 [32,61]
AZ1045-04F
[32,61] S_U3TXDN5_R S_U3TXDN5 [32,61]
/USB_P56_3.0
[32,61] S_U3TXDP5_R S_U3TXDP5 [32,61]
GND s_dfn_10p_20_98x39_h26_ns

3
ULA36
CHOKE_4P
UD36 mbs_choke_r_4p_colay_ns
1 9 /X/B150
Line-1 NC4

2
S_U3TXDN5 2 8
Line-2 NC3

3
S_U3TXDP5 3 ULB36
GND
4 7 CHOKE_4P
Line-3 NC2
S_U3TXDN6 5 6 mbs_choke_r_4p_colay_ns
Line-4 NC1
S_U3TXDP6 /X/B150

2
AZ1045-04F
/USB_P56_3.0
GND
s_dfn_10p_20_98x39_h26_ns [32,61] S_U3RXDN6_R S_U3RXDN6 [32,61]
[32,61] S_U3RXDP6_R S_U3RXDP6 [32,61]
[32,61] S_U3TXDN6_R S_U3TXDN6 [32,61]
[32,61] S_U3TXDP6_R S_U3TXDP6 [32,61]

UD23

1 6
S_U2DN6 S_U2DP6

+5VSB

2 5

GND

3 4
S_U2DN5 S_U2DP5

IP4220CZ6
[29,61] S_U2DP6_R S_U2DP6 [29,61]
N/A
[29,61] S_U2DN6_R S_U2DN6 [29,61]
[29,61] S_U2DP5_R S_U2DP5 [29,61]
[29,61] S_U2DN5_R S_U2DN5 [29,61]

UD231

1 6
S_U2DN5 S_U2DP5

+5VSB

2 5

GND

3 4
S_U2DN6 S_U2DP6

IP4220CZ6
/X

<Variant Name>

Title : USB3 Port


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Chipset USB Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 63 of 93


PL CAP & EL CAP co-lay PL CAP & EL CAP co-lay

+5VSB_DUAL +5VSB_DUAL

EL 820U: 11V040827130 EL 820U: 11V040827130


PL 560U: 11031V0004F200 PL 560U: 11031V0004F200
PL 100U: 11031V0001F000 PL 100U: 11031V0001F000
1

1
+ UCE1 + UCE5
560UF/6.3V 560UF/6.3V
mbs_cpl_560u6d3vsha_lfh_ms mbs_cpl_560u6d3vsha_lfh_ms
2

2
N/A N/A

11V040827130 11V040827130

GND GND

+5VSB_DUAL +5VSB_DUAL

EL 820U: 11V040827130 EL 820U: 11V040827130


PL 560U: 11031V0004F200 PL 560U: 11031V0004F200
PL 100U: 11031V0001F000 PL 100U: 11031V0001F000
1

+ UCE2 + UCE6
560UF/6.3V 560UF/6.3V
mbs_cpl_560u6d3vsha_lfh_ms mbs_cpl_560u6d3vsha_lfh_ms
2

/X /X

11031V0001F000 11031V0001F000

GND GND

BOM

N/A mount

/X unmount

STANDARD CIRCUIT

XUMB USB

CS_USB_0.2B

HD_DEMO_USB
/X

<Variant Name>

Title : USB CAP


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Chipset USB Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 64 of 93


+3VSB

2
P_5V_USB_Q1_10 [85]
UR731
1KOhm
/X 3

3
D
O_PWROK_SB UQ730

1
UR730 H2N7002
1 2 11
[38,47,85] O_PWROK
P_USBPWR_SW G
S
10KOhm 2

2
1
UC730
0.1UF/16V
/X UQ759

2
3

3
H2N7002
D
/X
GND
GND 11
O_DEEP_S5 [47,52,85,86]
G
S
2

1
USBPWR_SW# GPIO select: UC759
1. could be GPI & GPO both 0.1UF/16V
2. default GPI (no internal pull-down/pull-high resistor) /X

2
3. +3VSB_ATX power plane, 3V tolerance
4. High level to force +5VSB_DUAL switch to +5V
5. Low level to let +5VSB_DUAL switch to +5VSB_ATX under S3/S4/S5 GND GND
6. default need High level +3VSB_ATX

1
UR733
8.2KOhm 3

3
D
UQ731
H2N7002

2
11
[47] USBPWR_SW#
G
S

1
UC732 2

2
0.1UF/16V
/X

2
GND
GND

<Variant Name>

Title : USB Power


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Chipset USB Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 65 of 93


<Variant Name>

Title : USB Inrush


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Chipset USB Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 66 of 93


+3VSB

RES A

1
L1R17
8.2KOhm L1R4 1 2 300OHM
L1_LINK1000# [68]
N/A L1_LINK1000#_R
L1R16

2
1 2 +3VSB_LAN1
[27] CLKREQ#_LAN1
CLKREQ#_LAN1_R
0Ohm N/A
L1R6 1 2 300OHM
L1_ACTLEDP [68]

L1U1A
L1C13 2 1 10PF/50V
/X
L1C12 2 1 10PF/50V
/X 12
CLKREQB
15
[27] CK_100M_LAN1P REFCLK_P
GND 16 10
[27] CK_100M_LAN1N REFCLK_N MDIN3 L1_MDI_N3 [68]
9
MDIP3 L1_MDI_P3 [68]
7
MDIN2 L1_MDI_N2 [68]
6
MDIP2 L1_MDI_P2 [68]
5
MDIN1 L1_MDI_N1 [68]
Place near Chipset 4
MDIP1 L1_MDI_P1 [68]
SL1C1 2 1 0.1UF/16V X7R 13 2
[29] S_X1_LAN1_TXP HSIP MDIN0 L1_MDI_N0 [68]
SL1C2 2 1 0.1UF/16V X7R S_X1_LAN1_TXP_C 14 1
[29] S_X1_LAN1_TXN HSIN MDIP0 L1_MDI_P0 [68]
S_X1_LAN1_TXN_C

L1C3 2 1 0.1UF/16V X7R 17


[29] S_X1_LAN1_RXP HSOP
L1C4 2 1 0.1UF/16V X7R S_X1_LAN1_RXP_C 18 28
[29] S_X1_LAN1_RXN HSON CKXTAL1
S_X1_LAN1_RXN_C 29 L1_XIN
CKXTAL2
Place near LAN IC L1_XOUT L1X1
21 1 2
[69] S_WAKE#_LAN1 LANWAKEB
GND 25Mhz
L1C14 2 1 0.01UF/16V 3 mbs_xtal_2p_h145_lfh

1
X7R /X 19
[28,47,71] S_PLTRST# PERSTB
L1C10 L1C11
GND +3V 30PF/50V 30PF/50V

2
2

L1R2 GND
1KOhm
1

20
[31] L1_ISOLATE# ISOLATEB
27
LED0 L1_ACTLEDN [68]
2

L1R3 26
LED1/GPO L1_LINK100# [68]
L1_ISOLATE# GPIO select: 15KOhm
1. could be GPI & GPO both, default GPI (no mbs_r0603 L1R1
LED2
25
internal pull-down/pull-high resistor) 1 2 31 L1_LINK1000#_R
RSET
1

2. main power plane or stand by power L1_LREXT


plane, 3V tolerance 2.49KOhm
3. GPI to enable Realtek LAN GND GND
4. GPO low to disable Realtek LAN

+3VSB_LAN1 +3VSB_LAN1 to Pin 23


trace need 40 mils wide +L1_1.0V_VOUT trace need
60 mils wide +L1_1.0V
23
VDDREG
L1L24
11 24 1 2
AVDD33_1 REGOUT
32 +L1_1.0V_VOUT
AVDD33_2

1
L1U1C24 SHORTPIN_0603_NM
1

L1U1C211 L1U1C11 L1U1C232 L1U1C32 0.1UF/16V /X


4.7UF/6.3V 0.1UF/16V 4.7UF/6.3V 0.1UF/16V

2
STANDARD CIRCUIT mbs_c0603 mbs_c0603 /X
2

/X
GND
XUMB LAN
near pin 11 near pin 32
GND 3
AVDD10_1
LAN_0.4E 8
AVDD10_2
30
AVDD10_3

1
LOGO_HD_DEMO_LAN 22 L1U1C22 L1U1C222 L1U1C3 L1U1C8 L1U1C30
DVDD10
/X 1UF/10V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
mbs_c0603

2
RTL8111G : 02043-00090500
RTL8111GR: 02043-00090900
RTL8111H : 02043-00091100 near pin 22 near pin 3/8/30
BOM

GND
N/A mount
L1U1B

GND5
/X unmount 37
GND4
36 33
GND3 GND1
35 <Variant Name>
GND2
34
RTL8111G-CG RTL8111G-CG
GND
Title : RTL8111G_GR
02043-00091100 GND 02043-00091100
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
LAN Demo Circuit
0.0
Date: Tuesday, October 27, 2015 Sheet 67 of 93
for Realtek LAN OP1 - Connector

GLAN + USB2 *2 Connector

LAN_USB78
L1_CTR

1
L1C96 L1C94 L1C95 GND

29

27
28

30
1UF/10V 100PF/50V 120PF/50V
mbs_c0603

2
/X +5V_USB_P78
ACTLEDP

LANGND29

LANGND27
LANGND28

LANGND30
22
ACTLEDN
L1_ACTLEDP 21
L1_ACTLEDN
LAN_GND
18
TD4- VCC1
17 8
TD4+ VCC2
L1_MDI_N3 16 7
TD3- 2P-
GND L1_MDI_P3 15 6
TD3+ 1P- S_USB_PN7 [29,60]
L1_MDI_N2 14 5
TD2- 2P+ S_USB_PN6 [29,60]
L1_MDI_P2 13 4
TD2+ 1P+ S_USB_PP7 [29,60]
L1_MDI_N1 12 3
TD1- GND1 S_USB_PP6 [29,60]
L1_MDI_P1 11 2
TD1+ GND2
L1_MDI_N0 10 1
CTR
L1_MDI_P0 9 S_USB_PN(a+1)
L1_CTR S_USB_PN(a)
LILEDN

USBGND25

USBGND23
USBGND24

USBGND26
20
LILEDP S_USB_PP(a+1)
L1_LINK1000# 19
S_USB_PP(a)
L1_LINK100#

USB_LAN_LED

25

23
24

26
L1C90 2 1 1000PF/50V mbs_lan_usbx2_ledx2_stc_lf3
[67] L1_ACTLEDP
X7R /X 12014-00671400

L1C91 2 1 1000PF/50V
[67] L1_ACTLEDN
X7R /X

L1C92 2 1 1000PF/50V
[67] L1_LINK1000# Surge 6KV/6KV : 12014-00061700
X7R /X Surge 15KV/6KV: 12014-00671400 GND
OP1
L1C93 2 1 1000PF/50V
[67] L1_LINK100#
X7R /X

Place near LAN Connector


GND

Delete it for EMS

L1D1

1 6
[67] L1_MDI_P0 L1_MDI_N0 [67]

+3VSB_LAN1

2 5

GND

3 4
[67] L1_MDI_P1 L1_MDI_N1 [67]

IP4220CZ6
/X

unmount L2D1, L2D2 when use Surge 15KV/6KV LAN Connector


L1D2

1 6
[67] L1_MDI_P2 L1_MDI_N2 [67]

+3VSB_LAN1

2 5

GND

3 4
[67] L1_MDI_P3 L1_MDI_N3 [67]

<Variant Name>
IP4220CZ6
/X
Title : LAN Connector
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
LAN Demo Circuit
0.0
Date: Tuesday, October 27, 2015 Sheet 68 of 93
Note:
1. LAN IC power change to +3VSB_ATX (remove short-pin L1R88, add resistor
L1R88 & L1R89) Hardware Solution
2. for Intel PHY LAN, L1_LAN_DISABLE# renamed L1_LAN_DISABLE#_R
in LAN IC Page, and change BOM to use +3VSB_ATX power plane GPIO
3. for Intel PHY LAN, L1_LAN_DISABLE# pull high resistor L1R7 Optional change
to /EUP
4. for Intel PHY LAN, L1_LAN_WAKE# renamed L1_LAN_WAKE#_R in LAN IC
Page
5. for Intel PCIE LAN, L1_DEV_OFF# choose +3VSB_ATX power plane GPIO

6. for PCIE LAN, S_WAKE# renamed S_WAKE#_LAN1 in LAN IC Page

POWER
+3VSB +3VSB_LAN1 +3VSB_ATX

L1R88 L1R89
1 2 1 2

0Ohm 0Ohm
/NO_EUP /EUP

SIO Solution

for PCIE LAN +3VSB_LAN1


1

L1R85
8.2KOhm
/EUP
from LAN
to Chipset
2

L1R81
1 2
[67] S_WAKE#_LAN1 S_WAKE# [24,31,42]

0Ohm
/NO_EUP
PHY LAN : L1_LAN_WAKE#_R PHY LAN : L1_LAN_WAKE#
PCIE LAN: S_WAKE#_LAN1 PCIE LAN: S_WAKE#

L1R83
1 2
LAN_SIO_WAKE# [47,48]

0Ohm
/EUP
to SIO's support wake-up pin
<Variant Name>

Title : Deep S4/S5 Wake


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
LAN Demo Circuit
0.0
Date: Tuesday, October 27, 2015 Sheet 69 of 93
Delete it for EMS m-ATX Screw Hole

H1 H4
1 9 1 9 MB SCREW FOOTPRINT
GND1 NC GND1 NC
2 8 2 8
GND2 GND8 GND2 GND8
3 7 3 7
GND3 GND7 GND3 GND7
4 6 4 6
GND4 GND6 GND4 GND6
5 5
GND5 GND5
MB_HOLE_160_T_LF3
MB_HOLE_160_T_U_LF3 MB_HOLE_160_T_U_LF3
GND /X GND GND /X GND

origin-xy:(1300.00, 9350.00) origin-xy:(6500.00, 9350.00)

MB_HOLE_160_T_U_LF3

MB_HOLE_160_T_R_LF3

MB_HOLE_160_T_UR_LF3

H2 H5
1 9 1 9
9.6 inch 2
GND1 NC
8 2
GND1 NC
8
GND2 GND8 GND2 GND8
3 7 3 7
GND3 GND7 GND3 GND7
4 6 4 6
GND4 GND6
5
GND4 GND6
5 m-ATX Screw Select
GND5 GND5

MB_HOLE_160_T_LF3 MB_HOLE_160_T_LF3
GND /X GND GND /X GND
Standard Scale down
origin-xy:(400.00, 3150.00) origin-xy:(6500.00, 3150.00)
(9.6 x 9.6) (9.6 x <9.6)

H1
V V
H3
1 9 H2
2
GND1 NC
8 V V
GND2 GND8
3 7
GND3 GND7
4 6 H3
GND4 GND6
5 place on bottom side V V
GND5
origin-xy:(6500.00, 1350.00)
MB_HOLE_160_T_LF3 H4
A_GND /X A_GND V V
origin-xy:(400.00, 1350.00) H5
V V
H6
V V
H7
H6 V X
1 9
GND1 NC
2 8 H8
3
GND2 GND8
7 V X
GND3 GND7
4 6
GND4 GND6
5 H20
GND5 V V
MB_HOLE_160_T_LF3
GND /X GND

origin-xy:(6500.00, 550.00)

(X,Y)=(0,0) < 9.6 inch


<Variant Name>

Title : Screw Hole


9.6 inch
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Other Demo Circuit
0.1C

Date: Tuesday, October 27, 2015 Sheet 70 of 93


BOM mount TPM unmount TPM

/TPM mount unmount

/X unmount unmount
Delete it for
EMS

2x7 Pin TPM Header


+3VSB +3V

TPM
[32,47] S_LAD[3..0]
1 2 S_CK_33M_TPM
S_LAD0 3 4
S_LAD1 5 6
CK_24M_TPM [32]
S_LAD2 7 8
S_LAD3 9
[32,47] S_LFRAME#
11 12
[32,47] S_SERIRQ S_PLTRST# [28,47,67]
13 14
+3V
HEADER_2X7P_K10 TMC4 TMC3

2
TMR1 1 2 8.2KOhm /X /TPM HEADER 0.01UF/16V 10PF/50V
X7R /X

1
TMR2 1 2 0Ohm /X 12006-00320500 GND /X
[32] S_PWRDWN#
TPM_PD#

Intel connect to Chipset SUS_STAT# pin


modify Part Number by color GND

AMD connect to Chipset LPC_PD# pin


+3V +3VSB

1
TMC1 TMC2
0.1UF/16V 0.1UF/16V
/X /X

2
GND GND

<Variant Name>

Title : TPM Header


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Other Demo Circuit
0.1C

Date: Tuesday, October 27, 2015 Sheet 71 of 93


Delete it for
EMS
COM Debug Header

+3V

COM_DEBUG
1 2
[47,48] O_COM1_TXD1
4
5 6

HEADER_2x3P_K3
s_hd_2x3p_100_k3_jve_lf3_ns

/COM_DEBUG
GND

<Variant Name>

Title : Debug Header


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A
Other Demo Circuit
0.1C

Date: Tuesday, October 27, 2015 Sheet 72 of 93


ASUS PCB Logo If don't need Component Silk,
delete this block

NEED_COMP_SILK

STANDARD CIRCUIT

New Project Logo


1

LOGO7 LOGO5 XUMB OTHER


1 1
PCB MADE IN CHINA WEEE_LOGO
PCB_MADE_IN_CHINA WEEE_LOGO
/X /X
LOGO_HD_DEMO_OTHER
/X

LOGO8
1
VCCI

VCCI

Old Project Logo


/X

LOGO4
1
MARK_L
MARK_L
/X

LOGO6
1
CE
CE
/X

LOGO2
1
FCC
FCC
/X

LOGO3
1
RCM

RCM
/X

LOGO1
1
EMI_D33005_H
EMI_D33005_H
/X

LOGO9
1
CAN ICES-3(B)/NMB-3(B)
CAN_ICES_3B_NMB_3B
/X

LOGO10 <Variant Name>


1
KC_MSQ

KC_MSQ
Title : PCB Logo
/X
ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Silkscreen Demo Circuit
0.2A

Date: Tuesday, October 27, 2015 Sheet 73 of 93


Selling Point
1. Selling Point 新增流程及窗口人員
SPM 提出申請 CIS Team 建立 Symbol CE Team 申請建立 Part
http://prm.asus.com.tw Navy Yao(姚鈞_華碩蘇州) Mary Cai(蔡媛媛_華碩蘇州)
類別: CIS課需求申請

2. 如何抓取 Selling Point Part,


如下圖

3. Example

M4
1
DDR4 Support

DDR4_SUPPORT
/X

M11 M5 M6 M7
1 1 1
LAN GUARD ESD FAN_XPERT
1
EPU FAN_XPERT
LAN_GUARD ESD
EPU /X
/X /X
M3
M12 /X
1 M8
1 AI Suite 3 1
DIGI+VRM
Gb Lan
DIGI_VRM AI_SUITE_3
M9 GB_LAN
1 M10
/X /X
M13 SATA 6Gb/s 1
/X
1 USB 3.0 BOOST
PCIe 3.0 SATA_6GB_S
USB_3D0_BOOST
PCIE_3D0
/X
/X
/X

<Variant Name>

Title : Selling Point


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Silkscreen Demo Circuit
0.2A

Date: Tuesday, October 27, 2015 Sheet 74 of 93


Fiducial Mask
(光學點)

Delete it for
EMS

十字光學點 LayoutRD會依空間大小,
擺放大顆或小顆光學點;
所以兩種光學點都需畫入線路中,
最後再做刪除.

大顆光學點

小顆光學點

INDEX32 INDEX33 INDEX34 INDEX35 INDEX36 INDEX37


1 1 1 1 1 1
1 1 1 1 1 1

INDEX_PLUS INDEX_PLUS INDEX_PLUS INDEX_PLUS INDEX_PLUS INDEX_PLUS


/X/FIDUCIAL MASK /X/FIDUCIAL MASK /X/FIDUCIAL MASK /X/FIDUCIAL MASK /X/FIDUCIAL MASK /X/FIDUCIAL MASK

<Variant Name>

Title : Fiducial Mask


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Silkscreen Demo Circuit
0.2A

Date: Tuesday, October 27, 2015 Sheet 75 of 93


You can only choose 6 pcs point for your project! Please choose them by your need!

Intel Platform
Priority1, must choose if MB have these functions

1 2 3 4
LAN PCIE GEN2/3 DDR3 USB2.0
DATA&CTRL
IP1 IP3 IP5 IP7
1 1 1 1
1 1 1 1

IMPEDANCE_CONTROL IMPEDANCE_CONTROL IMPEDANCE_CONTROL IMPEDANCE_CONTROL


/X /X /X /X

IP2 IP4 IP8


1 1 1
1 1 1

IMPEDANCE_CONTROL IMPEDANCE_CONTROL IMPEDANCE_CONTROL


/X /X /X

Priority2, can choose if MB have these functions (by project)

1 2
DP/DVI/HDMI USB3.0
IP9 IP11
1 1
1 1

IMPEDANCE_CONTROL IMPEDANCE_CONTROL
/X /X

IP10 IP12
1 1
1 1

IMPEDANCE_CONTROL IMPEDANCE_CONTROL
/X /X

Priority3, can choose if MB have these functions (by project)

1 2 signal W/P Impedance

LAN 4/8 100 ohm +- 10%


DMI DDR3 CLK
USB/SATA/ PCIE/DP/HDMI 4/4 85 ohm +- 10%
IP13 IP15
1 1 DDR CLK 9/3.5 60 ohm +- 10%
1 1

IMPEDANCE_CONTROL IMPEDANCE_CONTROL
/X /X DDRDATA&CTRL 7 40 ohm +- 5ohm
IP14 IP16
1 1 USB3.0 4/4 85 ohm +- 10%
1 1

IMPEDANCE_CONTROL IMPEDANCE_CONTROL
/X /X

*** You can only choose 1 function to place point per block ***

<Variant Name>

Title : PCB Impedance Point

ASUSTEK COMPUTER INC


Engineer: Kell_Huang

Delete it for EMS Size

A3

Date:
Project Name
Silkscreen Demo Circuit
Tuesday, October 27, 2015 Sheet 76 of 93
Rev

0.2A
+5VSB_DUAL

1
EC3 EC4 EC5 EC6 EC7 EC8 EC9 EC10
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
N/A N/A N/A /X N/A /X N/A N/A
2

2
GND
+12V

VCCIO

O_TR_MB [47,50]
O_TR_MB
1

1
EC21 EC13 EC14 EC15 EC64 EC65
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
/X /X /X /X /X /X
2

2
GND GND
GND
+5V
1

EC31 EC11
0.1UF/16V 0.1UF/16V
/X /X
2

+5VSB_ATX

+3VSB
GND

1
EC63
+3V +5VSB 0.1UF/16V
N/A

2
1

1
EC62 EC12
0.1UF/16V 0.1UF/16V
1

EC41 EC16 EC67 EC68 /X /X GND

2
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
/X /X /X /X
2

GND

GND GND

<Variant Name>

Title : EMI
ASUSTek COMPUTER INC.
Engineer: Morse_Peng
Size Project Name Rev
R1.00
A4 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 77 of 93
<Variant Name>

Title : +1.2V_CON_DVDD

ASUSTek COMPUTER INC.


Engineer: Morse_Peng
Size Project Name Rev
R1.00
A3 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 78 of 93
P_GT_CSN1A_10 [81]
P_GT_CSN1A_10

2
PR196

2
100KOhm PC110
/X 0.1UF/16V

1
+5V
PR111

1
680PF/50V 2200PF/50V
PR154
49.9Ohm P_GT_PHASE1_10 [81]
1 2 P_GT_CSP1A_10 2 1

2
1 2 P_VCORE_DIFF_R_10 2 1 P_VCORE_FB_R_10 2 1
PR156 6.8KOhm

2
PC104 6.65KOhm PC106 PR199
8.2KOhm PR124 PR119
1KOhm 2 1 mbs_r0603 10Ohm

2
1 2 47PF/50V PC105 PC212

1
PR155 0.1UF/16V 90.9KOHM

1
P_VCORE_CSCOMP_10
/X P_GT_CSREFA_10

P_VCORE_CSSUM_10
P_VCORE_CSREF_10
P_VCORE_COMP_10

P_VCORE_CSN3_10
P_VCORE_CSP4_10

P_VCORE_CSP3_10
P_VCORE_DIFF_10
P_VCORE_VSN_10
P_VCORE_VSP_10

P_VCORE_ILIM_10
PC121

P_VCORE_FB_10
25.5KOhm

470PF/50V
+3V

1
1PR101 2

PR104
P_VCORE_VRHOT#_R_10 P_VCORE_IOUT_10 DGND PC125

1KOhm PR225

2
VCCST_VCCSFR 499Ohm 1000PF/50V

1KOhm

2
2
PR108

100Ohm PR107

1
PR142
1UF/16V PC112

1
1
45.3Ohm PR109

57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
2

2
mbs_c0603 PR188 PU101 DGND

1
+5V +5V +3V

1
+12V_CPU VCCIO 0Ohm DGND PR123

100Ohm

GND5
GND4
GND3
GND2
GND1
VSN
VSP
DIFF
FB
COMP
CSCOMP
ILIM
CSSUM
CSREF
NC2
NC1
CSP3
CSN3
5% 1 2

2
/X P_GT_ILIMA_10 P_GT_CSCOMPA_10

2
1KOhm

2
PR105

PR227 /X DGND 1 39 20KOHM


IOUT CSP2

1
2

1KOhm PR189 PR110 P_VCORE_IOUT_R_10 2 38 P_VCORE_CSP2_10


EN CSN2

2
PR102 /X 8.2KOhm DGND PR184 10Ohm P_VCORE_EN_10 3 37 P_VCORE_CSN2_10
SDIO CSP1

1
2.2Ohm mbs_r0603 8.2KOhm H_SVID_DATA 12 2
1 P_SVID_DATA 4 36 P_VCORE_CSP1_10 PTR102 PR131
ALERT# CSN1
5% mbs_r0603 /X H_SVID_ALERT# 1
PR185 2
0Ohm P_SVID_ALERT# 5 35 P_VCORE_CSN1_10 75KOhm PC114 PC124
SCLK TSENSE
1

H_SVID_CLK PR186 49.9Ohm P_SVID_CLK 6 mbs_qfn_52p_s236_pd_4v_half 34 P_VCORE_TM_10 100KOhm 220PF/50V 2200PF/50V


VR_RDY PWM1/SV_ADDR P_VCORE_PWM1_10 [80]
1

2
P_VRM_PGD_10 7 33 P_VCORE_PWM1_10
0.01UF/16V

VCC PWM2/VBOOT P_VCORE_PWM2_10 [80]

1
P_VCORE_VCC5_20 8 32 P_VCORE_PWM2_10 PR132
VRSHDN PWM3/ICCMAX P_VCORE_PWM3_10 [80]
0.1UF/16V

0.1UF/16V
PC109
1

P_VCORE_VRSHDN_10 9 31 P_VCORE_PWM3_10 1 2
VRMP SM_ADDR
PC210

PC193
PC107 P_VCORE_VRMP_10 10 30 P_VCORE_SM_ADDR_10 P_GT_CSPA_R_10 P_GT_CSSUMA_10
OCPL_VRHOT# DRON P_VCORE_DRON_10 [80,81]
2

1UF/16V P_VCORE_VRHOT#_10 11 29 P_VCORE_DRON_10 316KOhm


2

SM_SDA PWM2A/VBOOTA
2

mbs_c0603 PR187 PC111 P_SMB_DATA_4 12 28 P_GT_PWM2A_10


2

470PF/50V
SM_SCL PWM1A/ICCMAXA P_GT_PWM1A_10 [81]
2.7KOHM /X PC120 PR224 P_SMB_CLK_4 13 27 P_GT_PWM1A_10
1

IOUTA TSENSEA

PR103

PR153

PR163

PR195
2 1 P_GT_IOUTA_R_10

CSCOMPA
/X 47PF/50V P_GT_IOUTA_10 P_GT_TMA_10
1

CSSUMA
CSREFA

100KOhm

133KOhm
PC123
2

COMPA
/X PC113 47PF/50V /X 499Ohm

CSN1A

CSN2A
CSP1A

CSP2A

10KOhm

10KOhm
DIFFA
VSNA
1

ILIMA
VSPA

2
47PF/50V PR106

FBA
2
12KOhm
ASP1401BMNTXG

14
15
16
17
18
19
20
21
22
23
24
25
26
DGND DGND DGND DGND DGND DGND DGND DGND

1
+3V

1 DGND

P_GT_CSCOMPA_10

P_GT_CSSUMA_10
P_GT_CSREFA_10
1KOhm PR151

1KOhm PR152

2 DGND DGND DGND DGND

P_GT_COMPA_10

2P_GT_CSN1A_10
P_GT_CSP1A_10

P_GT_CSP2A_10
P_GT_DIFFA_10
P_GT_VSNA_10

P_GT_ILIMA_10
P_GT_VSPA_10
2

P_GT_FBA_10
HEADER_1X3P
VRM_TEST_SW100 1 2
s_hd_1x3p_100_ns PR192 0Ohm S_SMBDATA_MAIN
/X 1 2
1

/X /X PR190 0Ohm S_SMBCLK_MAIN


PR146 PC102 PR217
1 2 2 1 8.2KOhm
47PF/50V

47PF/50V

1KOhm mbs_r0603
PC235

PC234

15PF/50V

1
PR147 PC101 PR148 PC103
+5V
1

1 2 2 1 1 2 2 1
49.9Ohm P_GT_DIFFA_R_10 P_GT_FBA_R_10
6.65KOhm
330PF/50V 1500PF/50V
2

/X /X

DGND

P_VCORE_CSN1_10 [80]
P_VCORE_CSN1_10

2
PR203 PC116
100KOhm 0.1UF/16V

1
PR137 100Ohm PR139 1.5KOhm PR128 100Ohm PR129 1.5KOhm /X
PR117

1
2 1 2 1 P_GT_VSNA_10 2 1 2 1 P_VCORE_VSN_10
P_VCORE_PHASE1_10 [80]
PC137 PC132 P_VCORE_CSP1_10 1 2
1

1
PC135 PC130 6.8KOhm
[11] H_GT_VSS_SENSE [10] H_VSS_SENSE
1

1
GND PC138 1000PF/50V 1 2 GND PC133 1000PF/50V 1 2
1000PF/50V /X 1000PF/50V 1000PF/50V /X 1000PF/50V
2

2
2

2
[11] H_GT_VCC_SENSE [10] H_VCC_SENSE
P_VCORE_CSN2_10 [80]
VCCGT PR138 100Ohm DGND VCORE PR135 100Ohm DGND P_VCORE_CSN2_10

2
2 1 P_GT_VSPA_10 2 1 P_VCORE_VSP_10

2
PR205 PC115
100KOhm 0.1UF/16V

1
/X
PC119 PR118
1

PC136 1 PC131

1
1000PF/50V 2 1 1000PF/50V
P_VCORE_PHASE2_10 [80]
/X /X P_VCORE_CSP2_10 1 2
2

6.8KOhm
0.01UF/16V

PJP101
DGND 1 2 DGND

P_VCORE_CSN3_10 [80]
SHORT_PIN P_VCORE_CSN3_10
/X

2
GND DGND

2
PR216 PC118
100KOhm 0.1UF/16V

1
/X
PR125

1
P_VCORE_PHASE3_10 [80]
P_VCORE_CSP3_10 1 2
P_VCORE_TM_R_10

6.8KOhm
P_VR_READY_10 [38,90]
PR141
1 2
P_VCORE_DRON_10 [80,81]
P_VCORE_TM_10
0.1UF/16V
2

100Ohm PR133
P_VCORE_EN_10 [82,90]
PC126
2

649Ohm
PTR103
2

P_VRM_PGD_10 [90]
1

10KOHM
1

P_VCORE_VRSHDN_10 [30]
1

/X PR182 0Ohm
1 2
S_SMBDATA_MAIN [12,17,21,36] [83,84] P_+VDDQ_PG_10
P_VCORE_EN_10
GND PR183 0Ohm
S_SMBCLK_MAIN [12,17,21,36]
1 2
[83] P_+VCCIO_PG_10
H_VCC_SENSE [10]
P_GT_TMA_R_10

PC195

PC196

PC197
PR130
H_VSS_SENSE [10]
1 2 /X PR191 0Ohm
P_GT_TMA_10 1 2
H_GT_VCC_SENSE [11] [82] P_VCCSA_POK_10
0.1UF/16V

0.1UF/16V

0.1UF/16V

0.1UF/16V

2
220Ohm
PC122
2

PR120 PR116 PR126

2
H_GT_VSS_SENSE [11]
2

PR140 10Ohm 10Ohm 10Ohm


PTR101 649Ohm

1
2

H_SVID_CLK [9]

1
10KOHM
1

H_SVID_DATA [9]
1

/X /X /X
1

H_SVID_ALERT# [9]

2
P_VCORE_CSREF_10

1
PR121 PR115 PR127
P_VCORE_VRHOT#_R_10 [9,30]
GND PC127
DGND 1000PF/50V

2
PR122 90.9KOHM 90.9KOHM 90.9KOHM

1
1 2
P_GT_PWM2A_10 P_VCORE_PWM2_10 P_VCORE_ILIM_10 P_VCORE_CSCOMP_10
37.4KOhm DGND
P_CPU_GND_GT [11]
2

2
PR149 PR150
PTR104
P_CPU_GND_VCORE [11]

1
PC117
10KOhm 10KOhm 100KOhm PR136 PC128
60.4KOhm 3300PF/50V
P_VRM_PGD_10 [90]
1

2
PR219 PR232 220PF/50V
1 2 1 2 PR134

1
P_CPU_GND_GT P_CPU_GND_VCORE 1 2
2

0Ohm 0Ohm P_VCORE_CSP_R_10 P_VCORE_CSSUM_10


PR198 PR197 196KOhm
49.9KOhm 49.9KOhm
1

DGND DGND

Title
<Title>

Size Document Number Rev


D <Doc> <RevCode>

Date: Tuesday, October 27, 2015 Sheet 79 of 93


+12V_CPU
+5VSB
+12V_CPU

1
PD101 P_VCORE_L+12V_S
BAT54CW

1
PR162 PC152
0Ohm 1UF/16V

2
5% mbs_c0603
mbs_r0603

1
/X PR170 5%
1 2 PR171 1Ohm PC145 0.1UF/16V PQ111 GND

5
D
P_DRIVER1_VCC_20
2.2OHM P_VCORE_BST1_20 mbs_r0603 P_VCORE_BST1_R_20 1 2 PR174
mbs_r0805 11V233104370 4
PU102 G S
P_VCORE_R_HG1_20

2
11 1Ohm mbs_r0603
GND4
10 5% PR157 PH6030DLB

1
2
3
GND3 VCORE
9 8.2KOhm
GND2
1 8 mbs_r0603
mbs_powpak_5p_203x242_colay PL111
[79] P_VCORE_PWM1_10 PWM BST
PR169 2 7 P_VCORE_BST1_20
NC DRVH

1
1 2 3 6 P_VCORE_HG1_20
[79,81] P_VCORE_DRON_10 EN SW

P_VCORE_PH1_SNU_10
P_OD#1_10 4 5 P_VCORE_PHASE1_20 1 2
VCC DRVL

1
49.9Ohm P_VCORE_VCC1_R_20 P_VCORE_LG1_20 PC146 0.68UH
4700PF/50V
NCP81166AMNTBG
mbs_dfn_8p_s79_p_on_2v_half PQ112 PQ114

5
D D

2
1
PC140
1UF/16V 4 4

1
2
mbs_c0603 G S G S PC159 PJP102

1
PH4030DLA SHORTPIN SHORTPIN

1
PC149 PH4030DLA PR177

1
2
3

1
2
3
/X /X
2200PF/50V /X 1Ohm

2
GND /X mbs_powpak_5p_203x242_colay

2
mbs_powpak5p_203x242_col_ns

2
GND GND GND GND GND

[79] P_VCORE_PHASE1_10

[79] P_VCORE_CSN1_10

VCORE
P_VCORE_L+12V_S
VRM Input CAP
P_VCORE_L+12V_S

11V09025675V

11V09025675V

11V09025675V

11V09025675V
PCE108

PCE102

PCE103

PCE104
+12V_CPU

1
+5VSB

PCE100

PCE109
PC154 P_VCORE_L+12V_S

11V090427712

11V090427712
1UF/16V

560UF/6.3V

560UF/6.3V

560UF/6.3V

560UF/6.3V
2

1
mbs_c0603
+ + + +
2

270UF/16V

270UF/16V
1

1
PD102
2

BAT54CW + +

2
PR220 PR165 0.1UF/16V PQ121
PC141 GND

5
D
0Ohm

2
5% P_VCORE_BST2_20 P_VCORE_BST2_R_20 1 2 PR175
3

mbs_r0603 1Ohm 11V233104370 4


1

PU103 G S
mbs_r0603 P_VCORE_R_HG2_20

2
/X 5% 11 1Ohm mbs_r0603
GND4
10 5% PR158 PH6030DLB

1
2
3
GND3
9 8.2KOhm
GND2
1 8 mbs_powpak_5p_203x242_colay PL121
[79] P_VCORE_PWM2_10 PWM BST
PR164 49.9Ohm 2 7 P_VCORE_BST2_20 mbs_r0603 GND
NC DRVH

1
1 PR160 2 3 6 P_VCORE_HG2_20 GND
EN SW

P_VCORE_PH2_SNU_10
P_VCORE_DRON_10 1 2 P_OD#2_10 4 5 P_VCORE_PHASE2_20 1 2
VCC DRVL

1
P_DRIVER2_VCC_20 P_VCORE_VCC2_R_20 P_VCORE_LG2_20 PC147 0.68UH
2.2OHM 4700PF/50V
NCP81166AMNTBG
mbs_dfn_8p_s79_p_on_2v_half PQ122 PQ124

1
D D

2
1

mbs_r0805 PJP104 PJP103


PC142 SHORTPIN SHORTPIN
1UF/16V 4 4
/X /X
2

mbs_c0603 G S G S

1
PH4030DLA

2
1
PC150 PH4030DLA PR178

1
2
3

1
2
3
2200PF/50V /X 1Ohm

2
/X mbs_powpak_5p_203x242_colay VCORE
mbs_powpak5p_203x242_col_ns

1
GND GND GND GND GND GND
PC166 PC175 PC173 PC177 PC170 PC171 PC160 PC161 PC179 PC180 PC186 PC172

[79] P_VCORE_PHASE2_10 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

2
[79] P_VCORE_CSN2_10

GND

VCORE

P_VCORE_L+12V_S

1
+12V_CPU PC162 PC163 PC164 PC167 PC182 PC174 PC176 PC178

1
+5VSB 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V PC168 PC169 PC181 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
PC156 /X /X /X /X 22UF/6.3V 22UF/6.3V 22UF/6.3V /X /X /X /X

2
1UF/16V

2
mbs_c0603 mbs_c0805_h57_ns
/X /X /X
2

PD103 GND
PR166 0.1UF/16V
BAT54CW PC143
2

PQ131 GND
5

D
PR221 P_VCORE_BST3_20 P_VCORE_BST3_R_20 1 2
0Ohm 1Ohm 11V233104370 PR176
3

5% mbs_r0603 4
PU104 G S
mbs_r0603 5% P_VCORE_R_HG3_20
1

VCORE
2

11 1Ohm mbs_r0603
GND4
/X 10 5% PR159 PH6030DLB
1
2
3

GND3
9 8.2KOhm
GND2
1 8 mbs_r0603
mbs_powpak_5p_203x242_colay PL131
[79] P_VCORE_PWM3_10 PWM BST
PR168 49.9Ohm 2 7 P_VCORE_BST3_20
NC DRVH
1

1 PR167 2 3 6 P_VCORE_HG3_20
EN SW

P_VCORE_PH3_SNU_10

1
P_VCORE_DRON_10 1 2 P_OD#3_10 4 5 P_VCORE_PHASE3_20 1 2 PC187 PC191 PC165 PC188 PC192 PC183 PC184 PC190 PC185
VCC DRVL

1
P_DRIVER3_VCC_20 P_VCORE_VCC3_R_20 P_VCORE_LG3_20 PC148 0.68UH PC189 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2.2OHM 4700PF/50V 22UF/6.3V /X /X /X /X /X /X /X /X /X
NCP81166AMNTBG

2
mbs_dfn_8p_s79_p_on_2v_half PQ132 PQ134
5

1
D D

2
1

PJP106 PJP105
mbs_r0805
PC144 SHORTPIN SHORTPIN /X
1UF/16V 4 4
/X /X
2

mbs_c0603 G S G S
GND
1

PH4030DLA

2
1

PC151 PH4030DLA PR179


1
2
3

1
2
3

2200PF/50V /X 1Ohm
2

/X mbs_powpak_5p_203x242_colay
mbs_powpak5p_203x242_col_ns
2

GND GND GND GND GND GND

[79] P_VCORE_PHASE3_10

[79] P_VCORE_CSN3_10

<Variant Name>

Title : VCORE DRIVER

ASUSTek COMPUTER INC.


Engineer: RAY
Size Project Name Rev
R1.00
A1 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 80 of 93
P_VCORE_L+12V_S

+12V_CPU
+5VSB P_VCORE_L+12V_S

1
PC209
1UF/16V

2
mbs_c0603

1
2
PD201
PR204 BAT54CW PQ211

5
D
0Ohm
5% PR208 1Ohm PC203 0.1UF/16V PR212
GND
mbs_r0603 5% 4

3
1
P_GT_BST1_20 mbs_r0603 P_GT_BST1_R_20 1 2 P_GT_R_HG1_R_20 G S
/X 11V233104370 1Ohm mbs_r0603
PU201
5% PH6030DLB

P_GT_DRIVER_VCC_20

1
2
3
2
11
GND4
10 PR201 mbs_powpak_5p_203x242_colay
GND3 VCCGT
9 8.2KOhm
GND2
1 8 mbs_r0603 PL201
[79] P_GT_PWM1A_10 PWM BST
PR207 2 7 P_GT_BST1_20
NC DRVH

1
1 2 PR206 3 6 P_GT_R_HG1_20
[79,80] P_VCORE_DRON_10 EN SW
1 2 P_GT_OD#1_10 4 5 P_GT_PHASE1_20 1 2
VCC DRVL

1
49.9Ohm P_GT_VCC1_R_20 P_GT_LG1_20 PC205 0.68UH

P_GT_PH1_SNU_10
2.2OHM 4700PF/50V
NCP81166AMNTBG
mbs_dfn_8p_s79_p_on_2v_half PQ214 PQ212

5
D D

2
1
mbs_r0805
PC201
1UF/16V 4 4

1
2
mbs_c0603 G S G S PJP202 PJP201

1
SHORTPIN SHORTPIN

1
PC207 PH6030DLB PH6030DLB PR214

1
2
3

1
2
3
/X /X
2200PF/50V 1Ohm

2
GND /X mbs_powpak_5p_203x242_colay
mbs_powpak_5p_203x242_colay

2
2
GND GND GND GND GND

[79] P_GT_PHASE1_10

[79] P_GT_CSN1A_10

VCCGT
1

PC213 PC227 PC215 PC216 PC226 PC218 PC228 PC229 PC230


P_VCORE_L+12V_S
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V VRM Input CAP
2

VCCGT

VCCGT

11V09025675V

11V09025675V
PCE201

PCE205

PCE207
11V09025675V
GND
11V090427712

PCE206
560UF/6.3V

560UF/6.3V
270UF/16V
1

1
PC222 PC225 PC214 PC217 PC223 PC221

560UF/6.3V
1
PC219 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V + + +
22UF/6.3V /X /X /X /X /X /X +
2

2
2
GND

<Variant Name>

Title : VCCGT DRIVER


GND
GND
ASUSTek COMPUTER INC.
Engineer: RAY
Size Project Name Rev
R1.00
A2 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 81 of 93
P_VCORE_L+12V_S
P_VCORE_L+12V_S

1
+12V_CPU PC753
PQ710 1UF/16V

5
D

2
mbs_c0603
PR757
4
P_VCCSA_UGATE_M_20 G S GND
1Ohm mbs_r0603
5% PH6030DLB

1
2
3
PR764
8.2KOhm mbs_powpak_5p_203x242_colay
VCCSA
1%

2
mbs_r0603
PR761 PL704
2.2Ohm
1 2

11V09025675V

11V09025675V
PCE706

PCE707
mbs_r0805 5%

1
1.2UH
PC755
PC752 4700PF/50V

560UF/6.3V

560UF/6.3V
2
PR765

1
mbs_c0603

1
2 1 + +
P_VCCSA_BOOT_R_20 PC749 PC750 PC747 PC748
1Ohm mbs_r0603 PQ711 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

5
0.1UF/16V mbs_c0603 D

2
5% P_VCCSA_SNB

1
PR763
4 1Ohm

2
P_VCCSA_BOOT_20 G S mbs_r1206

2
PR760 5% PJP708

2
PU706 PH6030DLB SHORTPIN

1
2
3
13 25.5KOhm
GND3
12 mbs_powpak_5p_203x242_colay GND
GND2
11 mbs_r0603 GND
GND1

1
10 1
0.01UF/16V

REFOUT BOOT
1 2 P_VCCSA_REFOUT_10 9 2
OFS UG
P_VCCSA_OFS_10 8 3 P_VCCSA_UGATE_20 GND
POK PH /X
PR756 255Ohm P_VCCSA_POK_10 7 4 P_VCCSA_PHASE_20 GND
COMP/EN LG/OCS
1

6 5 P_VCCSA_LGATE_20
FB VCC
1

PC758 PC759 P_VCCSA_VCC_20


PR762 499Ohm PR766
UP1540PDDA
2

/X 0.022UF/16V 1 2 2 1
2

P_VCCSA_FB_10 P_VCCSA_FB_shortpin P_VCCSA_FB_R_shortpin


5% 10Ohm

2
PR759 PC757 1 PR755 PC751 PR758 PJP707
P_VCCSA_COMP_10

GND GND
GND 1 2 2 1 PC756 1.96KOhm 2 1 1 2 1 2
H_VCCSA_VCC_SENSE [10]
P_VCCSA_FB_R_10 1UF/16V P_VCCSA_FB_C_10
2

32.4KOhm mbs_c0603 PR769 10OHM SHORTPIN /X


0.068UF/16V

1
3300PF/50V PC746 PJP709
PC754 [35,83] P_+VCCSAIO_OV#_1_10
2 1 1 2
H_SAIO_VSS_SENSE [10,83]
2 1 8.2KOhm /X 1000PF/50V

2
GND GND SHORTPIN /X
10PF/50V
PR771
1 2 GND GND
[35,83] P_+VCCSAIO_OV#_2_10
GND
4.02KOHM

O_VCCSA_OV#_1_10 O_VCCSA_OV#_2_10 VCCSA

1 1 1.005V

0 1 1.05V(default)

+5VSB
1 0 1.1V

0 0 1.15V
2

PR767
8.2KOhm
mbs_r0603 P_VCCSA_COMP_10
3
3

D
1

PQ712
11 H2N7002
P_VCCSA_C1_10 G
S
2
2

3 PQ707
P_VCCSA_POK_10 [79]
PR745 1KOhm C PMBS3904 P_VCCSA_POK_10
1 B 07V3N2339040
[79,90] P_VCORE_EN_10
P_VCORE_EN_10 2 1 P_VCCSA_B1_10
E
2
/X
1

PC762
PR768 1KOhm 0.1UF/16V
/X
[83,90] P_+VCCIO_EN_10
2

2 1

N/A

GND GND GND

PR703 0Ohm /X
2 1

Title
<Title>

Size Document Number Rev


C <Doc> <RevCode>

Date: Tuesday, October 27, 2015 Sheet 82 of 93


nOhm_nW_n%
PR322
mbs_r0603_nomask
/X
VDDQ P_VCCIO_OUT1/2_1_10 2 1

P_VCCIO_OUT_2_10 2 1
PR320
mbs_r0603_nomask +12V

/X GND

5
D
PQ301
PR303
2

PH6030DLB PC312

mbs_c0805_nomask

mbs_c0805_nomask
1
PR329 4 1UF/16V
S G 2
P_VCCIO_Gate1/2_1_10 1 /X
mbs_r0402_nomask s_powpak5p_203x242_share_ns mbs_c0603_ns
place top

2
1
/X 3 07005-A0220100 /X
2
1
1

/X PC310 VCCIO

2
mbs_r0402_nomask
/X
PU303
PR324 GND
P_VCCIO_IN1/2_1+_10 1 8
VOUT1 VCC

22UF/6.3VPC305

22UF/6.3VPC304

22UF/6.3VPC301
P_VCCIO_OUT1/2_1_10 2 7
VIN1- VOUT2
1

2 1 P_VCCIO_IN1/2_1-_10 3 6 P_VCCIO_OUT_2_10
VIN1+ VIN2-
PC311 mbs_r0402_nomask P_VCCIO_IN1/2_1+_10 4 5 P_VCCIO_IN_2-_10
GND VIN2+
mbs_c0402_nomask /X P_VCCIO_IN_2+_10
2

PC303

PC302
1

1
P_VCCIO_1/2_REGIN

AS393MTR-E1
/X
GND mbs_soic_8p_50_197x236_ns

2
GND
/X
/X
2

PR321
5

D
mbs_r0402_nomask PQ302 GND GND GND GND GND
PR302
PH6030DLB
1

/X 4 /X
S G P_VCCIO_Gate2/2_1_10 2 1 /X
s_powpak5p_203x242_share_ns mbs_r0402_nomask
VCCIO 07005-A0220100
H_VCCIO_VCC_SENSE [10]
3
2
1

/X

1
/X
(0.95V) PC314
H_SAIO_VSS_SENSE [10,82]
mbs_c0402_nomask
PR327 PR325 PR310

2
PJP301
1 2
P_+VCCSAIO_OV#_1_10 [35,82]
P_VCCIO_FB_SHORTPIN_10 2 1 2 1 /X P_VCCIO_IN_2-_10 2 1
SHORTPIN mbs_r0402_nomask mbs_r0402_nomask
VCCIO VCCSA
1

/X mbs_r0402_nomask
2

+ PCE302 /X /X
PR306 + PCE301 560UF/4V /X
560UF/4V 11031V00026000
PR311
2

11031V00026000 PR301
2

mbs_r0603_nomask s_cpl_560u6d3vsha_lfh_ns 1 2
P_+VCCSAIO_OV#_2_10 [35,82]
1

s_cpl_560u6d3vsha_lfh_ns 2 1 1206
+3VSB
mbs_r0402_nomask /X
/X /X s_shortpin_r1206_ns
/X /X

1
GND GND GND PR308 PR319
1 2 mbs_r0402_nomask
1206
/X
s_shortpin_r1206_ns

2
/X
+5VSB P_VCCIO_IN_2+_10
P_VCCIO_FB_10

1
s_shortpin_r1206_ns

1
PR326
P_+VCCIO_OV_1_10 P_+VCCIO_OV_2_10 VCCSA PC308
mbs_r0402_nomask

2
mbs_c0402_nomask

2
X X 0.95V PJP304

1
1 2 +3V +5V PR330 /X
H_VCCIO_VCC_SENSE [10]
/X
GND GND
SHORTPIN /X 3
0 1 1.0V

3
mbs_r0603_nomask D
1

2
PJP305

2
1
PC313 1 2 PR307 PR317 PQ305
H_SAIO_VSS_SENSE [10,82]
1.05V 1KOhm mbs_r0603_nomask 11
0 0
2

mbs_c0402_nomask SHORTPIN /X /X P_+VCCIO_EN_C_10 G 2N7002


S
PQ307 3 2 mbs_sot23_ns

2
PR331

1
/X C
GND 2 1 1 B
GND [79,84] P_+VDDQ_PG_10
P_+VDDQ_PG_10 /X
P_+VCCIO_EN_10 2 1 P_+VCCIO_EN_B_10 /X
0Ohm PR304 mbs_r0402_nomask E

1
+5VSB 2

1
PR318 MMBT3904
PC306 mbs_sot23_ns GND
P_+VCCIO_PG_10 [79] [82,90] P_+VCCIO_EN_10
mbs_r0402_nomask
/X

2
mbs_c0402_nomask /X

2
2

PR323 /X P_VCCIO_IN1/2_1+_10
8.2KOhm 3 /X
3

D
mbs_r0603 3

3
D
PQ304 GND
1

11 H2N7002 GND PQ303


P_VCCIO_PG_G2_10 G 11
S
2 G 2N7002
2

S
3 2 mbs_sot23_ns

2
PR328 C
VCCIO 1 B
2 1 PMBS3904
P_VCCIO_PG_G1_10 /X
E PQ306
1

8.2KOhm PC309 GND


2 <Variant Name>
0.1UF/16V
/X
Title : +VCCIO
2

ASUSTek COMPUTER INC.


Engineer: RAY
GND GND GND Size Project Name Rev
R1.00
A3 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 83 of 93
If IC is NB671LB,then PR521's op�onal is /X and PR519's op�onal is N/A.

If IC is RT6220A,then PR521's op�onal is N/Aand PR519's op�onal is /X.

PR514

+3VSB +5VSB

P_VPPDDR_BST_20
2 1 P_VPPDDR_BSTR_20
4.7Ohm
PL501
1 2
P_VPPDDR_L+5VSB_S
JA-300P05003

1
PR515 PC511 PC516 PC509 PC519
200KOhm 10UF/16V 10UF/16V 0.1UF/16V 0.1UF/16V

10
mbs_c0805 mbs_c0805 mbs_c0603 PU502

2
2

BST
1 VPPDDR +5VSB_ATX +5VSB_ATX
VIN
GND GND GND 8 PL502
SW1
9 1 2
SW2
13 15 P_VPPDDR_LX_S
EN SW3

2
P_+VPPDDR_EN_10 +5VSB 16 2.2UH PR550

1
PR521 SW4
PR517 1KOhm PR527 P_+VPPDDR_EN_10

1
3 7 1MOhm PC510 PC508 PC507 PC513 PC518 mbs_r0603 8.2KOhm
LP# VOUT
1 2 P_VPPDDR_LP#_10 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 3 PQ522

3
/X D
5 12 /X

2
NC1 FB PR559

1
1

2
2.2Ohm 6
NC2
PC505 /X 2 1 11
2

AGND

PGND
[47] O_3VSBSW#

VCC
0.1UF/16V VPPDDR mbs_r0603 P_VPPDDR_COMP_GATE_10 G H2N7002

PG
S
/X PR519 PR513 GND GND GND GND GND 40.2KOhm 2
1

2
1
200KOHM 1 2

11

14

2
NB671LBGQ mbs_qfn_16p_16_118x118 P_VPPDDR_FB_10 P_VPPDDR_FBR_10 mbs_r0603 PC522

1
PR520 mbs_r0603 PC515 499Ohm +5V 1UF/6.3V

2
8.2KOhm 2 1

2
PC517 3
/X PR560
GND GND 220PF/50V C PQ523
220PF/50V

1
/X 1 B PMBS3904
PR511 PJP502 2 1 P_S_SLP_S4#_10 GND
1 2 1 2 40.2KOhm E
2

1
+VPPDDR_PGD_10 P_VPPDDR_VOUT_10 mbs_r0603 PC561

1
56KOhm SHORTPIN PR568 0.1UF/16V

1
PR518

2
PR516 /X 13KOhm /X

2
1
100KOhm PR512 PC514
If using P_VDDQ_SIO_EN_10 from SIO control VDDQ EN,then Vout=0.6*(1+Rtop/Rbt)
[31,47,88] S_SLP_S4#
mbs_r0603 16.9KOhm 0.1UF/16V 1 2 GND GND

2
+VPPDDR_PGD_10 need to VPPDDR pull high,that is,PR520 need 2.467V=0.6*(1+56k/18k)
8.2KOhm /X

2
mounted and PR516 need /X.

2
GND

1
+VPPDDR_VCC_20 GND

1 PC512
2.2UF/6.3V
2

mbs_c0603

GND GND GND GND


3
C

0.1UF/16V
+5VSB_DUAL 1 B
Irms,cin=Io(D(1-D))^0.5 PMBS3904

PC521
PL504
E PQ517
1 2 2

2
11031V00046400
P_VDDQ_REGIN_S VDDQ

PCE518
FBN3560B-450

1
PH6030DLB
+12V
If HMOS is NXP/UBIQ,then PR534=1Ohm and PR539=1Ohm
If HMOS is ON,then PR534=1Ohm and PR539=0Ohm

560UF/6.3V
1

2
PQ511

5
D

1
PD501 5% + PR553 GND GND
1 PR539 1Ohm PC548 1KOhm
3 4 10UF/16V

2
2 P_VDDQ_VCC_P_20 P_VDDQ_UGATE_M_20 G S

1
mbs_r0603 PR555 PR558
BAT54CW 1 2 1 2
1
2
3

mbs_cpl_560u6d3vsha_lfh_ms
P_+VDDQ_VPP_B_10
PR599 VDDQ 10KOhm 10KOhm /X

P_+VDDQ_PG1_10
8.2KOhm
2

mbs_r0603 +5VSB_ATX +3VSB


PR536 mbs_powpak_5p_203x242_share PL511
1.2V
GND
2.2Ohm

11031V0002F000

2
1 2
mbs_r0805 5% 47mil PR557

PCE514

PCE515

560UF/4V PCE517
1

1
1.2UH

11V090567B21

11V090567B21
1KOhm

2
PC533 /X
PC536 4700PF/50V PR556

P_VDDQ_SNB
2

1
PR534 mbs_c0603 10KOhm P_+VDDQ_PG_10 [79,83]

560UF/4V

560UF/4V
1

1
2 1 mbs_r0603 P_+VDDQ_PG_10
PH6030DLB

P_VDDQ_BOOT_R_20 + + +

1
1
1Ohm mbs_r0603 PQ512 3
5

3
0.1UF/16V mbs_c0603 D D
5% PC541

2
PR532 10UF/6.3V PQ516

2
4 1Ohm mbs_c0603 11 H2N7002
2

P_VDDQ_BOOT_20 G S mbs_r1206 P_+VDDQ_PG_B2_10 G


S
PU501 PR535 5% 3 2

2
/X PR554 C
25.5KOhm
1
2
3

13 1 2 1 B
GND3 PMBS3904
12 P_+VDDQ_PG_B1_10
GND2
1

11 10KOhm E PQ515
GND1 GND
10 1 2
0.01UF/16V

REFOUT BOOT GND


1 P_VDDQ_REFOUT_10
2 9 2 GND mbs_powpak_5p_203x242_share GND
OFS UG
P_VDDQ_OFS_10 8 3 P_VDDQ_UGATE_20 GND
POK PH
PR540 255Ohm P_+VDDQ_PG1_10 7 4 P_VDDQ_PHASE_20 GND
COMP/EN LG/OCS
1

PC531 6 5 P_VDDQ_LGATE_20 GND


FB VCC
GND PC540 P_VDDQ_VCC_20
0.022UF/16V UP1540PDDA PR533 499Ohm PJP505
2

/X 1 2 1 2
P_VDDQ_FB_10
mbs_dfn_10p_s118_p_2v_half P_VDDQ_FB_shortpin
SHORTPIN
2

/X
PC537
1

GND GND PR537 PC530 PR531 PR538


P_VDDQ_COMP_10

1 2 2 1 PC532 976OHM 2 1 1 2
P_VDDQ_FB_R_10 1UF/16V P_VDDQ_FB_C_10 VDDQ
2

32.4KOhm mbs_c0603 10Ohm +5VSB_ATX


0.068UF/16V
1

3300PF/50V PR503 9.76KOhm


PC534 1 2
P_+VDDQ_OV_1_10 [30] VDDQ Bleed circuit

2
2 1 P_+VDDQ_OV_1_10

1
GND GND PR551 PR552
P_+VDDQ_PG_10 [79,83]
PR504 3.65KOhm P_+VDDQ_PG_10 8.2KOhm 51Ohm
10PF/50V
1 2
P_+VDDQ_OV_2_10 [30]
P_+VDDQ_OV_2_10

1
GND
PR505 2.87KOhm
1 2
P_+VDDQ_OV_3_10 [30]
P_+VDDQ_OV_3_10
P_+VDDQ_G_10
3

3
D
3

3
D
PQ532
11 H2N7002 PQ533
[31,47,88] S_SLP_S4# G 11 H2N7002
S
2 G

2
S
VDDQ 2
P_+VDDQ_OV_1_10 P_+VDDQ_OV_2_10 P_+VDDQ_OV_3_10 VDDQ

2
X X X 1.2V GND
2

PR542
10KOhm 0 X X 1.25V
GND
1

X 0 X 1.32V
P_VTT_DDR_REFIN_10
VDDQ ===> VTT_DDR combine RT9040

Io:0.75A
+3V +3V +5V X X 1.35V
0
2

+5VSB_ATX
1

PR545 PC539
10KOhm 0.1UF/16V PR543 PR572 X 1.36V
0 0
1

PR546
2

8.2KOhm 10Ohm 10Ohm


1

5% 5% X 1.39V
VDDQ VTT_DDR mbs_r0603 mbs_r0603 PU503B
0 0
2

PU503A /X 12
GND2

2
11 13
GND1 GND3 X 0 0 1.46V
GND 1 10 PR507
REFIN VCNTL
2 9 P_VTT_DDR_CTRL_10 8.2KOhm P_VDDQ_COMP_10
VIN PGOOD
3 8 mbs_r0603 3
0 0 0 1.5V

3
VOUT GND2 D
1

4 7
PGND EN

1
1

5 6 P_VTT_DDR_EN_10 PC546 PQ505


SENSE REFOUT
1

PC545 PC544 PC549 PC550 P_VTT_DDR_REFOUT_10 4.7UF/6.3V RT9088AGQW 11 H2N7002


2
P_VTT_DDR_VOSNS_10

10UF/6.3V 10UF/6.3V 22UF/6.3V PC553 22UF/6.3V RT9088AGQW mbs_c0603 GND P_VDDQ_C1_10 G


S
2

mbs_c0805 mbs_c0805 mbs_c0805 PC552 2


22UF/6.3V

2
s_dfn_10p_s118_colay2v_half
2

mbs_c0805 mbs_c0805 0.1UF/16V


1

s_dfn_10p_s118_colay2v_half
/X PJP506 3

3
D
2

GND SHORTPIN
GND GND GND GND GND /X GND PR508 PQ506

2
1 2 11 H2N7002
[31,47,88] S_SLP_S4#
GND P_+VDDQ_B1_10 G PR574
2

S
GND 10KOhm 2
0Ohm

2+VPPDDR_PGD_C1_10
/X

1
1
PC503
0.1UF/16V GND
1

PC551 /X

2
0.1UF/16V
2

GND 3
GND

3
D

PR563 10KOhm PQ508


11 H2N7002
+VPPDDR_PGD_10 2 1 +VPPDDR_PGD_R_10 G
PR571 S
2

2
1 2

1
0Ohm PC506
0.1UF/16V
/X /X
+5VSB_ATX
2
If we use P_VDDQ_SIO_EN_10 from SIO to control
VDDQ EN,then PR573,PQ508,PR574,PR507,PQ505
need mounted.Otherwise,we s�ll use S_SLP_S4#
and +VPPDDR_PGD_10 to control VDDQ EN.
GND GND
2

PR567
8.2KOhm P_VTT_DDR_EN_10
mbs_r0603
1

3
3

PQ520
11 H2N7002
PR562 P_DDR_VTT_C_10 G
S
1 2 2
2

[31,38,47,90,93] S_SLP_S3#
S_SLP_S3# DDR_VTT_CNTL_B_R_10
10KOhm /X

3
PR570 PR565 C GND
1 2 1 B
[9] H_DDR_VTT_CNTL PMBS3904
2 1 DDR_VTT_CNTL_B_10
0Ohm 1KOhm E PQ521
2
2

PR566
20KOhm PC538
0.1UF/16V
2

/X /X
1

<Variant Name>

GND GND
Title : 1.2VDUAL
GND
PR575
ASUSTek COMPUTER INC.
Engineer: RAY
1 2
Size Project Name Rev
0Ohm R1.00
/X
A1 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 84 of 93
1.Vin and Vout keep more than 30mils away.

2.Input cap and Output cap can't use same GND.

mbs_cpl_560u6d3vsha_lfh_ms
3.P_5VSB_GATE_10 is away from Vin more than 15mils ,from Vout more than 30mils.
+5VSB

11031V00046400
+5VSB
+12V +5V

NOTE:which power rail powerd to audio ic should be confirmed by EE. PQ606

560UF/4V
PCE601
PH6030DLB

2
+5VSB_ATX 3

1
PR612 2 5

D
40.2KOhm 1 PC602 +
10UF/16V

2
mbs_r0603 mbs_powpak_5p_203x242_share mbs_c0805

4
1

2
2
PR616
Note: PC602靠近PQ605放置 /X
4.7KOhm
P_5VSB_GATE1_10
mbs_r0603 3
PR615

1
C PQ607
1 B PMBS3904
2 1 P_5VSB_Q2_10
E +5VSB_ATX GND
8.2KOhm 2

2
PQ605

1
PR614
PC630 4.7KOHM EMB20P03A +5VSB_ATX +5VSB_ATX +5VSB_ATX
0.047UF/16V /inrush

D
S
1
GND

2
G
1
1

2
GND GND +5VSB_ATX
PC601 PR608
2
10UF/16V 10KOhm

1
E
mbs_c0805
PC607 PMBS3906

1
2

2
B 1
0.068UF/16V P_+5VSB_ATX_OV_B_10

2
C

2
PR610 PR607
3

1
8.2KOhm 10KOhm PQ601 PR602
mbs_r0603 PC606 2.49KOhm
FOR O_PWROK mbs_r0603 GND
P_5VSB_GATE_10 [93] 100PF/50V

2
S0 P_5VSB_GATE_10 mbs_r1206

1
/X
1 P_+5VSB_ATX_OV_G_10
P_5VSB_GATE_10_1 [93]

3 P_5VSB_GATE_10 +5VSB
0 PR613 Note:

1
C PQ604 PC603

2
1 B PMBS3904 1000PF/50V
DS5/S5/S4/S3 DS5/S5/S4/S3
P_5VSB_Q1_10 2 1 P_5VSB_Q3_10 P_5VSB_GATE_10 is about 15mil or more PR603 /X

2
E Cathode
8.2KOhm 2
distance apart from other power rail.

2
3 2.94KOhm
PR625
C PQ613 3 3

2
PR611

3
D

1
1 B PMBS3904 4.7KOHM C PQ602 PU601
[38,47,65] O_PWROK Ref
2 1 P_5VSB_B1_10 PQ620 /inrush B 1
E 11 H2N7002 P_+5VSB_ATX_OV_REF_10 1 AS431BNTR-G1
[47,52,65] O_DEEP_S5

1
8.2KOhm 2 G E PMBS3904 /X
S 2
2

3
edonA
2
GND GND
PC604 PR604

2
0.1UF/16V 4.7KOhm
GND /X mbs_r0603

1
GND

1
P_+5VSB_ATX_OV_E_10
+5VSB_ATX

GND GND
FOR O_DEEP_S5 GND

DS5 PQ603 PR601 PR605


1 470Ohm mbs_r0805 PMBS3904 1 2 1 2
+3VSB_ATX
PR609 1 2 P_+5VSB_ATX_OV_E_R_10

E
2
C
P_5VSB_SHORT_10 499Ohm 499Ohm

2
0 /inrush 5% /inrush PC605

2
PR606

1 B
S5/S4/S3/S0 S5/S4/S3/S0 8.2KOhm 0.1UF/16V

1
1
Inrush circuit is available as matching UVP circuit.
GND GND

+5VSB_DUAL
+12V +5V
+5VSB_DUAL

PQ610
PH4030DLA
2

+5VSB_ATX 3
S

PR622 2 5
D

40.2KOhm 1
G

mbs_r0603 mbs_powpak_5p_203x242_share
4
1

1
2

PR618 PC610
4.7KOhm 10UF/16V
2

P_5V_USB_GATE_10 mbs_c0805
3
PR624 /X
1

C PQ609
1 B PMBS3904
2 1 P_5V_USB_Q2_10
PC610靠近PQ611放置
E
2

+5VSB_ATX
8.2KOhm 2
PR617
1

4.7KOHM
PQ611
PC631
EMB20P03A
0.047UF/16V
1

/X GND
D
S

GND GND
3

GND
G
1
1

+5VSB_ATX
PC608
10UF/16V
Note:
2

mbs_c0805
/X P_5VSB_USB_GATE_10 is about 15mil or
2

more distance apart from other power rail.


PR619
8.2KOhm

mbs_r0603 GND
1

P_5V_USB_C3_10
3
PR621
C PQ608
1 B PMBS3904
[65] P_5V_USB_Q1_10
2 1 P_5V_USB_Q3_10
E
2

8.2KOhm 2
PR623
4.7KOHM
1

GND

+5VSB_ATX GND

PQ612
PMBS3904
PR620 1 2 470Ohm
3

E
2
C

mbs_r0805 P_5VSB_DUAL_SHORT_10_1
5%
1 B

<Variant Name>

Title :
+5VDUAL/5V_DUAL_USBKB
ASUSTek COMPUTER INC.
Engineer: RAY
Size Project Name Rev
R1.00
A1 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 85 of 93
+5VSB_ATX +12V

+3V_ATX

Io:1.5A

2
+5V
+5VSB_ATX ====>+3VSB_ATX PR777
8.2KOhm
PR778
180Ohm
mbs_r2512_colay

2
mbs_r0603 /X

1
2
+5VSB_ATX PU702 PR772 PR770 PR773 /X
+3VSB_ATX 200OHM PR774 100Ohm 100Ohm
3 2 s_r1206_h26 100Ohm /X /X P_+12V_DUMMY_R1

ADJ/GND
IN OUT
/X s_r1206_h26 s_r1206_h26 3
D PQ770

3
1

1
( +3.38V ) /X s_r1206_h26

1
H2N7002
UZ2085G-AD-TN3-R 11

1
[28] O_+12V_DUMMYLOAD1

2
mbs_to252_share_lf3 PR701 G /X
S
2

2
1.27KOhm GND GND

1
DUMMY LOAD GND
1

1
PC715
PC701 P_+3VSB_ATX_ADJ_20 22UF/6.3V +5VSB_ATX +12V +12V
10UF/16V mbs_c0805
2

2
2

2
PR718
mbs_c0805 2.15KOhm PR781

2
180Ohm
PR780 PR779 mbs_r2512_colay

1
8.2KOhm 180Ohm /X

1
mbs_r0603 mbs_r2512_colay /X

1
/X P_+12V_DUMMY_R3
3 P_+12V_DUMMY_R2 3
D PQ771 D PQ772

3
GND
H2N7002 H2N7002
11 11
[28] O_+12V_DUMMYLOAD2 [28] O_+12V_DUMMYLOAD2
G G /X
S S
2 /X 2

2
GND GND

<Variant Name>

Title : +3VSB_ATX/+1.8V_A
ASUSTek COMPUTER INC.
Engineer: RAY
Size Project Name Rev
R1.00
A3 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 86 of 93
PR737

2 1 P_+1.0V_A_BST_R_20
4.7Ohm

P_+1.0V_A_BST_20
+5VSB

40 mil
PL706
+5VSB 1 2
+3VSB P_1.0A_L+5VSB_S
JA-300P05003

1
PC733 PC734 PC735 PC731
2
10UF/16V 10UF/16V 0.1UF/16V 0.1UF/16V

10
2
PR710 PU704

2
10KOhm PR742

BST
10KOhm 1 +1.0V_A
VIN
8 PL703
SW1
1

/X GND GND GND 9 1 2


SW2

1
13 15

1UF/6.3V
P_+1.0V_A_SW_20
EN SW3

PC761
P_+1.8V_A_PG_10 P_+1.0V_A_EN_10
+5VSB 16 1UH
PR720 SW4

2
2

1
3 7 PR739 PC730 PC729 PC728 PC727 PC726

2
+3VSB +5VSB_ATX LP# VOUT
PR712 1 2 P_+1.0V_A_LP#_10 1MOHM 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
10KOhm 5 12 /X

1
NC1 FB

2
2.2Ohm
6
NC2

1
/X
1

AGND

PGND
1

VCC
PR736 PR735 mbs_r0603

PG
3 PR725 PR740 GND GND GND GND GND
10KOhm 8.2KOhm GND

3
D
GND mbs_r0603 200KOHM 1 2

11

14

2
/X PQ732 NB671LBGQ P_+1.0V_A_FB_10 499Ohm P_+1.0V_A_FBR_10
2

11 H2N7002 mbs_r0603 PC737

2
G 2 1

2
S
/X P_+1.0V_G_EN_10 2 PC736
3 2
GND 220PF/50V 220PF/50V

1
P_+1.0V_B_EN_10

C PQ734 /X
1 B PMBS3904 /X PR702 PR707 499Ohm PJP704
1 2 1 2
0.1UF/16V

E P_+1.0V_A_PG_10 2 1 P_+1.0V_A_VOUT_10
PC760

2 6.04KOhm SHORTPIN

1
GND PR738 PC738 /X

2
/X 100KOhm 0.1UF/16V

P_+1.0V_A_FB_R_10
1

PR719 /X mbs_r0603 PR708

2
Vout=0.6*(1+Rtop/Rbt)
5.6KOhm
1

2
1.0V=0.6*(1+12k/18k)
/X 10KOhm
/X +1.0V_A_VCC_20
2

1
1
GND
PC732 PR711
GND GND GND 2.2UF/6.3V 1 2
P_+1.0V_A_OV_1_10 [35]

2
mbs_c0603 P_+1.0V_A_OV_1_10
4.7KOhm
GND GND GND
0821

2
[12,37,47] O_RSMRST# 3
P_+1.0V_A_OV_1_10 +1.0V_A
1
PD701 BAT54AW
X 1.0V
PR709 5%

[31,40] S_SLP_SUS#
2 1
0 1.1V
0Ohm
/DSW

<Variant Name>

Title : +1.0_A/+VCCSFR_OC
ASUSTek COMPUTER INC.
Engineer:
Size Project Name Rev
R1.00
A3 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 87 of 93
PR748 /X
1 2

0Ohm

PQ709
+5VSB_ATX +1.0V_A VCCST_VCCSFR
AP2306GN

S
D
3 2

2
1

G
PR744 PR743

11
40.2KOhm 8.2KOhm
mbs_r0603 mbs_r0603

2
P_VCCST_VCCSFR_C_10

0.1UF/16V
PC740
P_VCCST_VCCSFR_D1_10

2
D

PQ706

1
11 H2N7002
G
S
3 2

2
0.1UF/16V
PR741 C
PC742

1 2 1 B GND
[31,47,84] S_SLP_S4# PMBS3904
P_VCCST_VCCSFR_B_10
10KOhm E PQ705
GND
2

2
1

/X
GND
GND

<Variant Name>

Title : SWITCH
ASUSTek COMPUTER INC.
Engineer: RAY
Size Project Name Rev
R1.00
A3 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 88 of 93
<Variant Name>

Title : UP6262

ASUSTek COMPUTER INC.


Engineer: IAN
Size Project Name Rev
R1.02A
A3 Z87-PRO
Date: Tuesday, October 27, 2015 Sheet 89 of 93
+5VSB PR807 0Ohm /X
+12V_CPU 2 1
+5VSB_ATX P_+12V/3V_EN_10 P_VCORE_EN_10
PR819 0Ohm
2 1

1
P_+VCCIO_EN_10 [82,83]
PR808

1
PR809 40.2KOhm

1
PR801 mbs_r0603
27KOhm
4.7KOhm mbs_r0603 3

3
P_VCORE_EN_10 [79,82] D
mbs_r0603

2
3 PQ806

3
D

1
11 H2N7002

P_+12V/3V_EN_R1_10
PQ801 PC808 P_+12V/3V_EN_C1_10 G
S
11 H2N7002 0.1UF/16V
3 2

2
1
2
P_VREN#_10 G PR812 10KOhm C PR813
S
2 /X 1 2 1 B
0Ohm

0.1UF/16V
3 PMBS3904
P_+12V/3V_EN_B1_10

3
D /X

PC803
E PQ807

2
PR803 PQ803 2

0.1UF/16V
1 2 11 H2N7002

2
[31,38,47,84,93] S_SLP_S3#

PC801
P_VREN_10 G GND PR814 GND
S
10KOhm 2
3.9KOHM

1
P_VR_READY_10 [38]

1
0724加0ohm實驗EN

2
PC806

2
0.1UF/16V

2
P_+12V/3V_EN_C2_10
/X
GND /X
3

3
D
GND GND GND GND
PQ805
11 H2N7002 +3V
G
S
2

1
PR815
10KOhm

GND

2
P_+VCCIO_EN_10 [82,83]

P_+12V/3V_EN_R2_10
3
3 PR816 10KOhm C

3
D

1
1 2 1 B

0.1UF/16V
PMBS3904
PQ811 PC809 P_+12V/3V_EN_B2_10

PC804
11 H2N7002 E PQ810
0.1UF/16V

2
G 2
S
2 /X

2
1

1
PC810 PR817

1
0.1UF/16V 5.6KOhm
2

/X GND

2
GND GND
GND GND

PR804

2 1

0Ohm
/x
5%

+3V +5VSB_ATX
2

PR802 PR805
1KOhm 8.2KOhm
[38] P_VR_READY_10 mbs_r0603
1

PQ809

3
3

D H2N7002

11
G P_VCORE_PG#_10
S
2
PQ808
2
1

PC805 3
PMBS3904
0.1UF/16V C
/x B 1
P_VRM_PGD_10 [79]
2

P_VRM_PGD_10
E
1

2 PC807
1000PF/50V
2

<Variant Name>
GND

Title : POWER SEQUENCE


GND GND GND

Engineer: RAY
ASUSTek COMPUTER INC.
Size Project Name Rev
R1.00
A3 SkyLake VC
Date: Tuesday, October 27, 2015 Sheet 90 of 93
+3V

1
PC412
PC412靠近PQ403放置
10UF/16V

2
mbs_c0805

/3VOVP

+3V_ATX +3V

PQ404,PQ410 and other components are be�er to place close to PQ403.


mbs_r0805
PR433 GND
0Ohm /NO_3VOVP

+3V_ATX +3V_ATX
PR432 mbs_r0805 +3V_ATX
0Ohm /NO_3VOVP

2
2
E
PR426 PQ404
PQ403
8.2KOhm PMBS3906
P2003ED P_+3V_OV_G1_10
B 1
/3VOVP
C

2
/3VOVP /3VOVP

1
3

1
PR429 PR430
D
S

mbs_r0603 8.2KOhm PC415 2.49KOhm


3

/3VOVP 0.01UF/16V P_3V_GATE_10 mbs_r1206


G

2
1.Vin and Vout keep more than 30mils away. mbs_r0603 /3VOVP /X/3VOVP
1

1
1

PC419 PC414 2.Input cap and Output cap can't use same GND. P_+3V_OV_G_10
10UF/16V 0.1UF/16V +3V
2

mbs_c0805 3.P_3V_GATE_10 is away from Vin more than 15mils ,from Vout more than 30mils.
mbs_c0603
/3VOVP

1
/3VOVP PC416

2
GND 1000PF/50V
PR421 -12V PR431 /X/3VOVP

2
1 2 1KOhm
P_3V_GATE_10 10KOhm /3VOVP
mbs_r0603 3 PQ411

1
1
/3VOVP C PQ410 TL431G-AE2-R
2

PMBS3904 B 1 2
PR407 P_+3V_OV_REF_10 /X/3VOVP
E
1.5KOhm
mbs_r0603 2 /3VOVP

3
/3VOVP
1

1
PR415 PC417

2
8.2KOhm 0.1UF/16V

P_+3V_OV_E_10
mbs_r0603

1
/X/3VOVP

2
/3VOVP
GND PR413 PR418
+3VSB_ATX
2 1 P_+3V_OV_ER_10 2 1

2
PR416 499Ohm 499Ohm
8.2KOhm /3VOVP /3VOVP GND GND GND
PC418

2
/3VOVP 0.1UF/16V

1
1
/3VOVP

GND GND

Title : +5VSB_DUAL/+1.1VSB
ASUSTek Computer Inc.
Engineer:
Size Project Name Rev
A3 FM2 PLUS 1.00

Date: Tuesday, October 27, 2015 Sheet 91 of 93


4 Pin +12V Connector

顏色: CHL
0801

Z97 : 12015-00053200 +12V_CPU

2 4
2 4
1 3
1 3
5
NP_NC

POWER_CON_4P

1
mbs_pwr_2x2p_165_h_lf3 BC6
GND 12015-00021600 0.1UF/16V

2
N/A
ATX12V
GND

<Variant Name>

Title : HEAT SINK


ASUSTeK COMPUTER INC
Engineer: KENNY_CHEN
Size Project Name Rev
A3 Z87-PRO R1.02A

Date: Tuesday, October 27, 2015 Sheet 92 of 93


S5 ----> S0 S0 ----> S3

P_5VSB_USB_GATE_10
PR627 2 1 1KOhm
[85] P_5VSB_GATE_10
mbs_r0603

P_5VSB_USB_GATE_10_1

S_SLP_A# PR628 1 2 1KOhm


mbs_r0603 P_5VSB_GATE_R_10

S_SLP_S3#

+5VSB_ATX

+5V
ITE: 150 ms
NCT: 300 PR629 1 2 100KOhm
ms mbs_r0603 /Inrush
S_PWROK
PQ621

E
2
C
PD601
1 PMBS3904
3 /Inrush

1 B
[85] P_5VSB_GATE_10_1
2

P_5VSB_GATE_D_10
BAT54AW P_5VSB_GATE_B1_10

2
/Inrush
PR630
1KOhm +5VSB
mbs_r0603
PR631 /Inrush

1
+5V 100KOhm PC613
1 2 2 1
P_5VSB_GATE_RC_10
[31,38,47,84,90] S_SLP_S3#

2
mbs_r0603 mbs_c0603 /Inrush
0.01UF/16V
PR632 /Inrush

2
8.2KOhm
PR634 mbs_r0603 PC614 2 1 0.22uF/16V /X
8.2KOhm /Inrush 3 mbs_c0603

1
/Inrush C PQ622
1 B PMBS3904

1
P_SLPS3#_C1_10 /Inrush GND
3 E
2

2
C PQ624
1 B

1
PMBS3904 PR633 PC611
P_SLPS3#_R_10 /Inrush 8.2KOhm
E /Inrush 0.1UF/16V
S_PWROK_SB

2
3 2

1
PC622 /X
3

1
GND
PQ625 0.1UF/16V

2
11 H2N7002 /X GND GND GND
[31,36,38] S_PWROK
G /Inrush
S
2
2
1

PC612 GND

0.1UF/16V
2

/X GND

GND

don't need for Flash Back

Inrush Circuit for USB Port default have Power or Flash Back Function <Variant Name>

Title : USB Inrush


ASUSTEK COMPUTER INC
Engineer: Kell_Huang
Size Project Name Rev
A3
Chipset USB Demo Circuit
0.0

Date: Tuesday, October 27, 2015 Sheet 93 of 93

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