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IPMIP-GS
PAGE TITLE VRD 11.1 128-bit Dual-Channel Memory x 4 Slots
01 BLOCK DIAGRAM on Board Intel Processor Channel A DDR3 800/1066/1333
02 CHANGE HISTORY 100MHz
03 CLOCKS DISTRIBUTION Clarkdale/ Lynnfield
PCI-E X16 SLOT PCI_E BUS
D
04 SIGNAL & RESET MAP D
Channel B DDR3 800/1066/1333
05 POWER FLOW
LGA-1156 Pin Socket
06 POWER DISTRIBUTION
ITP
07 POWER SEQUENCE
08 CLOCK SLG8SP424

FDI LINK
09 VID RESISTER

DMI
10~15 CPU_SOCKET1160_MEMORY 1 - 6
16 DDR3 CHANNEL A
17 DDR3 CHANNEL B
18 DDR3 TERMINATION A&B
19 PCI EXPRESS X 16 SLOT
High-Speed USB 480Mb/s RGB VGA CONN
20~28 INTEL PCH 1 - 9
12 ports
29
30
INTEGRATED VGA PORT
DVI LEVEL SHIFTER
INTEL
DVI
C 31 DVI CONTROL C

32 DVI-I CONNECTOR
33 Intel 82578DC LAN Audio Reartek 24MHz Ibex Peak Display Port
34 RJ45+USB CONNECTER ALC888S/662
35 Dual USB CONNECTER PCH
36 PCI EXPRESS X1 SLOT -1
37 PCI SLOT INTERFACE - PCI-1 PCI BUS 2* PCI SLOT
38 PCI SLOT INTERFACE - PCI-2 33MHz
39 RTL 888S/662 AZALIA CODEC
40 FRONT AUDIO CONNECTOR SATA BUS
SATA0 SATA2 SATA4
41 Azalia Rear Audio Connector SATA1 SATA3 SATA5(e-SATA)
Intel 82578DC 951 Pin
42 USB HEADER CONNECTOR - 1 PCIE x1
10/100/1000
43 USB HEADER CONNECTOR - 2 100MHz
27mm X 27mm SPI
44 SATA & TPM CONNECTOR SPI FLASH
8MB

B
45 SPI SERIAL FLASH & SMBUS B
46 SUPER I/O - ITE 8721-1

33MHz
47 SUPER I/O - ITE 8721-2
48 FAN CIRCUIT FOR 4 - PIN

LPC BUS
49 FRONT PANEL CIRCUIT FOR CPC
50 RTC / CMOS / SCREW/KM 133 MHz
51 RSMRST CIRCUIT / EMI CLOCK
100 MHz
52 CPU ITP / LPC DEBUG CONN PCI-E X1 SLOT2 PCIE BUS
SILEGO
53 RTL8111DL LAN 100MHz 100 MHz
54 LED / COM / SPKR / INTRUDER SIO TPM
424
96 MHz
55 LPT Print port
ITE 8721 SLB9635TT
56 ATX POWER CONNECTOR 14.318 MHz
57 VCORE CONTROLLER
58 VCORE DRIVER1
59 VCORE DRIVER2
A
60 VAGX CONTROLLER A

61 VAGX DRIVER
62 +1P1V_VTT KB/MS COM x 2 PEGATRON DT-MB RESTRICTED SECRET
63 +1P5V_DUAL Title : BLOCK DIAGRAM
64 +1P05V_PCH / +1P05V_ME Pegatron Corp. Engineer: Vic_Chen
65 +5V_DUAL / +3P3V_ME www.schematic-x.blogspot.com Size Project Name
IPMIP-GS
Rev
66 +SM_VTT / +1P8V_SFR A3 1. 01
Date: Friday, April 23, 2010 Sheet 1 of 68
5 4 3 2 1
5 4 3 2 1

Schematics Change History

Version Date Comments

D D

C C

B B

CAD Note:
Default component footprint is SMD 0402, Y5V, 5% type. Difference footprint show on schematics.
A
Property: BOM A

I = Installed Part. PEGATRON DT-MB RESTRICTED SECRET


NI = Not Installed Part. Title : CHANGE HISTORY
Engineer: Vic_Chen
PROTO = PROTO Phase Only. Pegatron Corp.
Size Project Name Rev

VP = Virtual Part. A3 IPMIP-GS 1. 01


Date: W ednesday, April 07, 2010 Sheet 2 of 68
5 4 3 2 1
5 4 3 2 1

PCH Buffer Mode


2
M 4M
CK_ITP/# Intel M_CHA_CLK[0..5]/# M M
IPMIP-GS ITP Connector
133 MHz X X
Processor M_CHB_CLK[0..5]/# , ,
1
M 3M
D
CK_HOST_CPU/# 133 MHz M M D

X X
Havendale
CK_120M_IPL/# 1156 pin CK_100M_PEG/#
120 MHz
100 MHz

CK_100M_PE16/#
100 MHz
PCIEx16 Slot
CK_133M_PCH_IN/# Intel
AZ_BITCLK 24 MHz AZALIA
Realtek888S
CK_96M_DREF/# 96 MHz PCH
SPI_CLK 33 MHz
C
CK_100M_PCH_DMI/# 100 MHz
SPI C

CLOCK CHIP CK_33M_SL1 33 MHz


CK_100M_SATA/# 100 MHz PCI Slot
CK_33M_SL2 33 MHz
CK_14M_PCH 14.318 MHz PCI Slot

CK_100M_PE1/#
100 MHz
PCIEx1 Slot 1
SILEGO
424
H CK_100M_LAN/#
C
P 100 MHz
G
U _
B CRYSTAL M
3
INTEL 82578 CRYSTAL
E
D 3
_ _ 25MHz
B B

M 25MHz K
C
3
3
_
K
C
CRYSTAL 33 MHz
LPC DEBUG1
14.318MHz

CK_33M_SIO 33 MHz
ITE-8721

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : CLOCK DISTRIBUTION
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: Tuesday, March 23, 2010 Sheet 3 of 68
5 4 3 2 1
5 4 3 2 1

IPMIP-GS
RESET_SWITCH

<17>PCH_PCIRST#
RST# PCI SLOT
D D

PCI_Express x 16 <18>PCIES_RST#
PWRGD ITP
<17>PLTRST#
PCI_Express x 1 <18>PCIES_RST# DBR#
PWRGD SYS_RESET# H_RSTOUT#
RESET#

PCH TRST#

AZ_RST# AUDIO
POWER_SWITCH SIO ITE-8721 HDA_RST# RESET#
ALC888S
<3>PWRBTN# PROCESSOR
PSIN#
PCIRST# SYS_RESET#
RSTOUT0# SYS_RESET# DBR#
C C
<17>PLTRST#
LRESET# PLTRST# RSTIN#
RST_KB# <15>DRAM_PWROK
KBRST# RCIN# DRAMPWROK SM_DRAMPWROK
<2>RSMRST#
RSMRST# RSMRST# TRST#
TRST#
<4>SB_PWRBTN# <1>RTCRST#
PSOUT# PWRBTN# RTCRST#
RESET_OBS#
POWER SUPPLY <5>SLP_S5#
<8>PSON# SLP_S5#
PSON# BATTERY
PSON# <6>SLP_S4#
SLP_S5# SLP_S4#
<9>ATX_PWRGD
PWROK <7>SLP_S3# <16>CPUPWRGD
ATXPGD SLP_S3# SLP_S3# CPUPWRGD VCCPWRGOOD
<5.1>SLP_M#
SLP_M#
<11>VRM_VID[0..7] VID[0..7]
<5.1>SLP_LAN#
SLP_LAN#
B
VCORE B
SYS_PWROK
VTTPWRGD
PWROK MEPWROK

<14>PWROK

ME_POWER +1P1V_VTT
If support AMT, SLP_M# +1P05V_ME
will come with SLP_S5 Vcore Controller
+3P3V_ME <5.2>MEPWROK VTTPWRGD
VID[0..7]
If not support AMT, SLP_M#
will come with SLP_S3 CK 505 VCORE <12>VCORE
ISL6341
<13>VRM_PWRGD <10>VTTPWRGD
CKPWRGD/PD# VR_RDY EN_VTT
A A

NCP5395
PEGATRON DT-MB RESTRICTED SECRET
Title : SIGNAL & RESET MAP
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
CHIP SOCKET or SLOT A3 IPMIP-GS 1. 01
Date: Tuesday, March 23, 2010 Sheet 4 of 68
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5 4 3 2 1
Controller : NCP5395
22.1875A 16.042A +1.4V_CPU/110A
H/S:FDU8780_F071*2
+12V_VCORE
L/S:IPDH6N03LAG*2
3 Phase

3.4375A Controller : ISL6341CRZ_TR +1.1V_VTT/30A


H/S:AOD452*2
D L/S:AOD472*2 D

Controller : ISL6314
2.708A H/S:IPD09N03LAG*1 +1.3V_AXG/20A
L/S:IPD09N03LAG*2

USB/6A

11.8305A
+5V +5V_DUAL
+1P5V_DUAL 19.548A
13.8305A 7.8305A Controller:RT8105/AWN7120 +1.5V_Dual/13.2A
SPDT H/S:AOD452*2
2A L/S:AOD452*2
C +5VSB C
+0P75V_VTT_DDR/0.83A
RT9173C
0.549A +1P05V_ME 2.222A
RT8015APQW

+1P05V_PCH/5.598A
LM358+MOS
3.44A
+3VSB 3.18A
Controller : MP2307
2.838A
UP7704U8

+3P3V_ME 0.26A
B SPDT
B

+3.3V

+12V

A A
<Variant Name>

Title : POWER FLOW


SWITCHING SWITCH ON/OFF
LINEAR PEGATRON CORPOATION Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1. 01

Date: Tuesday, March 23, 2010 Sheet 5 of 68


5 4 3 2 1

Lynnfield/Clarkdale PCI Express x 1


1394A
VCORE +12V
-> 90A - 95(TBD)W -> 0.5A - 6W +3P3V
+1.1V_VTT -> mA - W
-> 30A(TBD) - 33W +3P3V
+1.5V -> 3.0A - 9.9W
Vddq -> 6A - 9W
+1.8V +3P3V_PCI
Vccpll -> 1.35A - 2.43W WAKE -> 0.375A - 1.24W
HDMI
D No WAKE-> 20mA - 66mW D
+3P3V
Intel Ibex Peak -> mA - mW
V_CPU_IO PCI Express x 16 +2P5V_DVI
-> <1mA - 1.1mW -> mA - mW
+5V +12V
V5REF -> <1mA - 5mW -> 5.5A - 66W
+5V
V5REF_Sus -> <1mA - 5mW +3P3V
-> 3.0A - 9.9W SATA 6 PORTS
+3.3V Vcc3_3 -> 0.357A - 1.178W +3P3V_PCI +5V
WAKE -> 0.375A - 1.24W -> 0.975A - 4.875W
VccDAC -> 0.069A - 0.228W
No WAKE-> 20mA - 66mW +12V
-> 0.9A - 10.8W
+1.1V
VccDMI -> 0.065A - 0.07W
PCI SLOTS
+12V FAN
VccADPLLA -> 0.075A - 0.079W -> 0.5A - 6W
+12V
VccADPLLB-> 0.075A - 0.079W -12V -> 0.6A - 7.2W
-> 0.1A - 1.2W
+1.05V VccCORE -> 1.629A - 1.71W
+5V
VccIO -> 3.251A - 3.414W -> 5.0A - 25W
C PS2 KB/MS C
VccLAN -> 0.372A - 0.39W +3P3V
-> 7.6A - 25.08W +5V_DUAL
VccME -> 2.222A - 2.333W (S0, S1) -> 0.345A - 1.73W
+3P3V_PCI
WAKE -> 0.375A - 1.24W (S3) -> 2mA - 10mW
+1.8V VccqNAND -> 0.156A - 0.281W No WAKE-> 20mA - 66mW
VccVRM -> 0.196A - 0.353W
SPI
VccTX_LVDS -> 0.059A - 0.106W INTEL 82578
+3V
+3P3V +3P3V_CL -> 30mA - 99mW
VccALVDS -> <1mA - 3.3mW -> 15.5mA(TBD) - 51.15mW
+1P8VSB_LAN
VccRTC -> 2mA - 6.6mW -> 300mA - 540mW
HDD
+3P3VSB VccSus3_3 -> 0.168A - 0.554W VCC_LAN(1.05V)
-> 300mA -315mW +12V
VccSusHDA -> 0.006A - 0.02W -> 0.75A - 9.0W
VccME3_3-> 0.086A - 0.284W +5V
SIO ITE-8721 -> 0.75A - 3.75W
+5V
-> 1mA - 5mW
B
+3.3VSB CD ROM B

-> 2.4uA - 7.92uW


+12V
+3.3V -> 0.75A - 9.0W
-> 2mA - 6.6mW
CLOCK- CK505 +5V
-> 0.75A - 3.75W
+3P3V
-> 250mA - 0.825W ALC888S Azalia Codec
+VDD_IO (0.8V)
-> 80mA - 64mW +5VSB
-> 0.6A - 3W
+3P3V
-> 0.4A - 1.32W
DDR3 DIMM (4) & Termination
+1.5V_DAUL
VDD (S0, S1) -> 7.2 A - 10.8W USB 12 PORTS
VDD (S3) -> 712mA - 1.07W +5V_DUAL
(S0, S1) -> 8.4A - 42W
SM_VTT(0.75V)
SM VTT (S0, S1) -> 0.83A - 0.623W (S3) -> 0.336A - 1.68W

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : POWER DISTRIBUTION
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 1.01
IPMIP-GS 1. 01
Date: Tuesday, March 23, 2010 Sheet 6 of 68
5 4 3 2 1
5 4 3 2 1

IPMIP-GS G5 S5 S4 S3 S0

t1

D D

t2

+5VSB t3

+3VSB
t4
t5

t10

t14
RSMRST#

C C
t11

SLP_S4#
SLP_S3#
t7

SLP_SM# t6

PS_ON#

Latch Latch

B
+12V, +5V B

+3V

VTTPWRGD
t8
t12

VRM_PWRGD

PWROK

DRAM_PWROK
t13

t9

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : POWER SEQUENCE
Pegatron Corp. Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1.01
1. 01
Date: Tuesday, March 23, 2010 Sheet 7 of 68
5 4 3 2 1
5 4 3 2 1

ICS9LRS4180AKLFT: 0610-0038000
SLG8SP424VTR: 0610-007D000
D D

+3P3VSB NI I +CLKVCC3
CKR55 CKL1
0 600Ohm/100Mhz/0.5A CKU1
mx_r0603 mx_l0603
1 2 +CLKPW 1 2 1 21 RCPUHCLK CKR3 2 1 0 NOBOM
VDD1 CPU CK_133M_PCH_IN 24
30 20 RCPUHCLK# CKR4 2 1 0 NOBOM
VDD2 CPU# CK_133M_PCH_IN# 24
19 VDD_CPU
+3P3V I 12 15 RCK_100M_PCIE CKR12 2 1 0 NOBOM
VDD_SRC SRC CK_100M_PCH_DMI 20

1
CKR56 NI I I I I 9 14 RCK_100M_PCIE# CKR13 2 1 0 NOBOM
VDD_SATA SRC# CK_100M_PCH_DMI# 20
0 CKCB11 CKCB12 CKCB6 CKCB7 CKCB2 3
mx_r0603 10UF/6.3V 10UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V VDD_96 CKR20
16 10 RCK_100M_SATA 2 1 0 NOBOM CK_100M_PCH_SATA 21

2
X5R 10% X5R 10% X7R 10% X7R 10% X7R 10% VDD_A SATA CKR21
1 2 25 VDD_REF SATA# 11 RCK_100M_SATA# 2 1 0 NOBOM CK_100M_PCH_SATA# 21
mx_c0805 mx_c0805
6 RCK_96M_DREF CKR24 2 1 0 NOBOM
DOT_96 CK_96M_PCH_DREF 23
GND GND GND GND GND 7 RCK_96M_DREF# CKR25 2 1 0 NOBOM
DOT_96# CK_96M_PCH_DREF# 23
22 VSS_CPU
13 VSS_SRC
5 VSS_96
31 VSS1
32 VSS2
1

1
I I I I I 17 VSS_A
CKCB4 CKCB5 CKCB3 CKCB8 CKCB9 28
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V VSS_REF
33
2

2
X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% GND
34 GND1
35 GND2
C +CLKVCC3 C
GND GND GND GND GND
36 GND3 NOTE: RESET(Pin 18) on ICS9LRS4180A
37 GND4
Real time system reset signal for frequency gear

1
NI/SLG8SP424
CKR39 ratio change or watchdog timer timeout.
GND 4.7K

VP
NOTE: NC(Pin 18) on SLG8SP424
PU in F_PANEL

2
CKR43 NI CKR5
22,59 VRM_PW RGD 1 2 CK505_PW RGD 2 CKPWRGD/PD# NC 18 CK_RESET# 1 2 0 SYS_RESET# 13,22,52,57
0
1

NICKCB10
0.1UF/16V
X7R 10%
2

GND
OSC_CK14M_XTALIN 27
OSC_CK14M_XTALOUT XIN
26 XOUT
VP I
CKR48 Y1
0 14.318Mhz
1 2 Y1_R 1 2
GND
3 +CLKVCC3 +CLKVCC3 +CLKVCC3
1

I I
CKC8 CKC9

1
2
33PF/50V 33PF/50V
2

NPO 5% NPO 5% CKR36 CKR38 CKR37


B B
10KOhm 10KOhm 10KOhm
5% 5% 5%
GND GND GND

2
1
I NI NI

USB_48M/FS_A 4 CK_48MHz I CKR27 1 33 2 CK_48M_SIO 47


23 8 CK_FSLB
16,17,49,57 SMB_CLK_M SCL FS_B

16,17,49,57 SMB_DATA_M 24 SDA REF/FS_C 29 RCK_REF_14P318 I CKR29 1 33 2 CK_14M_PCH 24

1
1

1
1

NI NI

1
1
CKC10 CKC11 CKR47 CKR49 CKR50 NI NI
33PF/50V 33PF/50V 10KOhm 10KOhm 10KOhm CKC2 CKC5
2
2

NPO 5% NPO 5% 5% 5% 5% 10PF/50V 10PF/50V

2
2
NPO 5% NPO 5%

2
2

2
NI I I
GND GND

GND GND GND GND GND

SLG8SP424VTR
I

A A
NOTE:

FSLC FSLB FSLA CPU FREQ PEGATRON DT-MB RESTRICTED SECRET


0 0 1 133MHz Title : ICS 4180/SLG 424
Pegatron Corp. Engineer: Vic_Chen
1 0 1 100MHz Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 8 of 68
5 4 3 2 1
5 4 3 2 1

D D

C C

+1P1V_VTT

1
NI I I I NI I NI NI
HR9 HR11 HR18 HR42 HR44 HR46 HR48 HR50
1K 1K 1K 1K 1K 1K 1K 1K
13,59 VRM_VID[0..7]

2
VRM_VID0
VRM_VID1
VRM_VID2
VRM_VID3
VRM_VID4
VRM_VID5
VRM_VID6
VRM_VID7

1
1

1
I NI NI NI I NI I I
HR10 HR17 HR41 HR43 HR45 HR47 HR49 HR51
B 1K 1K 1K 1K 1K 1K 1K 1K B

2
2

2
GND

+1P1V_VTT

1
1

1
1
NI I NI NI NI NI NI VAXG_VID[1..7] 62
HR52 HR62 HR64 HR66 HR68 HR70 HR72
1K 1K 1K 1K 1K 1K 1K
13 GFX_VID[0..6]
2

2
2

2
2
GFX_VID6 VP HR53 1 0 2 VAXG_VID7
GFX_VID5 VP HR54 1 0 2 VAXG_VID6
GFX_VID4 VP HR55 1 0 2 VAXG_VID5
GFX_VID3 VP HR56 1 0 2 VAXG_VID4
GFX_VID2 VP HR57 1 0 2 VAXG_VID3
GFX_VID1 VP HR58 1 0 2 VAXG_VID2
GFX_VID0 VP HR59 1 0 2 VAXG_VID1
A A
1

1
1

1
NI NI NI NI NI NI NI
HR61 HR63 HR65 HR67 HR69 HR71 HR73
1K 1K 1K 1K 1K 1K 1K PEGATRON DT-MB RESTRICTED SECRET

2
2

2
2

2
Title : VID RES
2

Pegatron Corp. Engineer: Vic_Chen


Size Project Name Rev
GND A3 IPMIP-GS 1.01
1. 01
Date: W ednesday, April 07, 2010 Sheet 9 of 68
5 4 3 2 1
5 4 3 2 1

I M_CHA_DQ[0..63] 16
HU1A
16 M_CHA_MAA[0..15]
M_CHA_MAA0 AW18 AK3 M_CHA_DQS0
SA_MA[0] SA_DQS[0] M_CHA_DQS0 16
M_CHA_MAA1 AY15 AJ3 M_CHA_DQS0#
SA_MA[1] SA_DQS#[0] M_CHA_DQS0# 16
M_CHA_MAA2 AV15 AJ2 M_CHA_DM0
SA_MA[2] SA_DM[0] M_CHA_DM0 16
M_CHA_MAA3 AU15
M_CHA_MAA4 SA_MA[3] M_CHA_DQ0
AW14 SA_MA[4] SA_DQ[0] AH1
M_CHA_MAA5 AY13 AJ4 M_CHA_DQ1
M_CHA_MAA6 SA_MA[5] SA_DQ[1] M_CHA_DQ2
AV14 SA_MA[6] SA_DQ[2] AL2
D M_CHA_MAA7 AW13 AL1 M_CHA_DQ3 D
M_CHA_MAA8 SA_MA[7] SA_DQ[3] M_CHA_DQ4
AU14 SA_MA[8] SA_DQ[4] AG2
M_CHA_MAA9 AW12 AH2 M_CHA_DQ5
M_CHA_MAA10 SA_MA[9] SA_DQ[5] M_CHA_DQ6
AT19 SA_MA[10] SA_DQ[6] AK1
M_CHA_MAA11 AU13 AK2 M_CHA_DQ7
M_CHA_MAA12 SA_MA[11] SA_DQ[7]
AW11 SA_MA[12]
M_CHA_MAA13 AU24 AP2 M_CHA_DQS1
SA_MA[13] SA_DQS[1] M_CHA_DQS1 16
M_CHA_MAA14 AT11 AP3 M_CHA_DQS1#
SA_MA[14] SA_DQS#[1] M_CHA_DQS1# 16
M_CHA_MAA15 AR10 AN1 M_CHA_DM1
SA_MA[15] SA_DM[1] M_CHA_DM1 16
AN3 M_CHA_DQ8
SA_DQ[8] M_CHA_DQ9
16 M_CHA_W E# AT22 SA_WE# SA_DQ[9] AN2
AU22 AR3 M_CHA_DQ10
16 M_CHA_CAS# SA_CAS# SA_DQ[10] M_CHA_DQ11
16 M_CHA_RAS# AT20 SA_RAS# SA_DQ[11] AR2
AM3 M_CHA_DQ12
SA_DQ[12] M_CHA_DQ13
SA_DQ[13] AM2
AP1 M_CHA_DQ14
SA_DQ[14] M_CHA_DQ15
SA_DQ[15] AR4
M_CHA_BA0 AV20
16 M_CHA_BA0 M_CHA_BA1 SA_BS[0] M_CHA_DQS2
16 M_CHA_BA1 AU19 SA_BS[1] SA_DQS[2] AU4 M_CHA_DQS2 16
M_CHA_BA2 AU12 AU3 M_CHA_DQS2#
16 M_CHA_BA2 SA_BS[2] SA_DQS[2]# M_CHA_DQS2# 16
AU1 M_CHA_DM2
SA_DM[2] M_CHA_DM2 16
AT4 M_CHA_DQ16
SA_DQ[16] M_CHA_DQ17
SA_DQ[17] AU2
M_CHA_CS#0 AV21 AW3 M_CHA_DQ18
16 M_CHA_CS#0 M_CHA_CS#1 SA_CS[0]# SA_DQ[18] M_CHA_DQ19
16 M_CHA_CS#1 AW24 SA_CS[1]# SA_DQ[19] AW4
M_CHA_CS#2 AU21 AT3 M_CHA_DQ20
16 M_CHA_CS#2 M_CHA_CS#3 SA_CS[2]# SA_DQ[20] M_CHA_DQ21
16 M_CHA_CS#3 AU23 SA_CS[3]# SA_DQ[21] AT1
C AV2 M_CHA_DQ22 C
SA_DQ[22] M_CHA_DQ23
SA_DQ[23] AV4

AY6 M_CHA_DQS3
SA_DQS[3] M_CHA_DQS3 16
M_CHA_CKE0 AU10 AW6 M_CHA_DQS3#
16 M_CHA_CKE0 SA_CKE[0] SA_DQS#[3] M_CHA_DQS3# 16
M_CHA_CKE1 AW10 AV6 M_CHA_DM3
16 M_CHA_CKE1 SA_CKE[1] SA_DM[3] M_CHA_DM3 16
M_CHA_CKE2 AV10
16 M_CHA_CKE2 M_CHA_CKE3 SA_CKE[2] M_CHA_DQ24
16 M_CHA_CKE3 AY10 SA_CKE[3] SA_DQ[24] AW5
AY5 M_CHA_DQ25
SA_DQ[25] M_CHA_DQ26
SA_DQ[26] AU8
AY8 M_CHA_DQ27
SA_DQ[27] M_CHA_DQ28
SA_DQ[28] AU5
M_CHA_ODT0 AV23 AV5 M_CHA_DQ29
16 M_CHA_ODT0 M_CHA_ODT1 SA_ODT[0] SA_DQ[29] M_CHA_DQ30
16 M_CHA_ODT1 AV24 SA_ODT[1] SA_DQ[30] AV7
M_CHA_ODT2 AW23 AW7 M_CHA_DQ31
16 M_CHA_ODT2 M_CHA_ODT3 SA_ODT[2] SA_DQ[31]
16 M_CHA_ODT3 AY24 SA_ODT[3]
AR28 M_CHA_DQS4
SA_DQS[4] M_CHA_DQS4 16
AT29 M_CHA_DQS4#
SA_DQS[4]# M_CHA_DQS4# 16
AN29 M_CHA_DM4
SA_DM[4] M_CHA_DM4 16
AR22 AN27 M_CHA_DQ32
+1P5V_DUAL 16 M_CHA_CLK0 SA_CK[0] SA_DQ[32] M_CHA_DQ33
16 M_CHA_CLK0# AR21 SA_CK[0]# SA_DQ[33] AT28
AP18 AP28 M_CHA_DQ34
16 M_CHA_CLK1 SA_CK[1] SA_DQ[34] M_CHA_DQ35
16 M_CHA_CLK1# AN18 SA_CK[1]# SA_DQ[35] AP30
AN21 AN26 M_CHA_DQ36
16 M_CHA_CLK2 SA_CK[2] SA_DQ[36]
1

AP21 AR27 M_CHA_DQ37


16 M_CHA_CLK2# SA_CK[2]# SA_DQ[37] M_CHA_DQ38
I 16 M_CHA_CLK3 AP19 SA_CK[3] SA_DQ[38] AR29
HR60 AN19 AN30 M_CHA_DQ39
0 16 M_CHA_CLK3# SA_CK[3]# SA_DQ[39]
B M_CHA_DQS5 B
AV32 M_CHA_DQS5 16
2

SA_DQS[5] M_CHA_DQS5#
SA_DQS[5]# AW32 M_CHA_DQS5# 16
AW31 M_CHA_DM5
SA_DM[5] M_CHA_DM5 16
AV8 AU30 M_CHA_DQ40
16,17 DDR3_DRAMRST# SM_DRAMRST# SA_DQ[40] M_CHA_DQ41
SA_DQ[41] AU31
AV33 M_CHA_DQ42
SA_DQ[42] M_CHA_DQ43
SA_DQ[43] AU34
1

NI NOBOM TPC26b HT1 1 TP_CPU_AK22 AK22 AV30 M_CHA_DQ44


HC1 NOBOM TPC26b HT2 TP_CPU_AM22 SA_CS[4]# SA_DQ[44] M_CHA_DQ45
1 AM22 AW30
IP R1.02 added to reduce 220PF/50V NOBOM TPC26b HT3 1 TP_CPU_AL23 AL23
SA_CS[5]# SA_DQ[45]
AU33 M_CHA_DQ46
2

NOBOM TPC26b HT4 TP_CPU_AK23 SA_CS[6]# SA_DQ[46] M_CHA_DQ47


X7R 10% 1 AK23 AW33
The glitch. SA_CS[7]# SA_DQ[47]
AW36 M_CHA_DQS6
SA_DQS[6] M_CHA_DQS6 16
GND AV35 M_CHA_DQS6#
SA_DQS[6]# M_CHA_DQS6# 16
AU35 M_CHA_DM6
SA_DM[6] M_CHA_DM6 16
M_CHA_DQS8 AL10 AW35 M_CHA_DQ48
16 M_CHA_DQS8 M_CHA_DQS8# SA_DQS[8] SA_DQ[48] M_CHA_DQ49
16 M_CHA_DQS8# AM10 SA_DQS[8]# SA_DQ[49] AY35
AV37 M_CHA_DQ50
SA_DQ[50] M_CHA_DQ51
NOTE: SA_DQ[51] AU37
AY34 M_CHA_DQ52
SA_DQ[52] M_CHA_DQ53
For ECC DIMM SA_DQ[53] AW34
AV36 M_CHA_DQ54
SA_DQ[54] M_CHA_DQ55
16 MA_ECC_CB[0..7] SA_DQ[55] AW37

MA_ECC_CB0 AP10 AR39 M_CHA_DQS7


SA_ECC_CB[0] SA_DQS[7] M_CHA_DQS7 16
MA_ECC_CB1 AN10 AR38 M_CHA_DQS7#
SA_ECC_CB[1] SA_DQS[7]# M_CHA_DQS7# 16
A MA_ECC_CB2 AR11 AT38 M_CHA_DM7 A
SA_ECC_CB[2] SA_DM[7] M_CHA_DM7 16
MA_ECC_CB3 AP11
MA_ECC_CB4 SA_ECC_CB[3] M_CHA_DQ56
AK9 SA_ECC_CB[4] SA_DQ[56] AT39
MA_ECC_CB5 AL9 AT40 M_CHA_DQ57
MA_ECC_CB6 SA_ECC_CB[5] SA_DQ[57] M_CHA_DQ58
MA_ECC_CB7
AK11
AM11
SA_ECC_CB[6] SA_DQ[58] AN38
AN39 M_CHA_DQ59 PEGATRON DT-MB RESTRICTED SECRET
SA_ECC_CB[7] SA_DQ[59] M_CHA_DQ60
SA_DQ[60] AU38
SA_DQ[61] AU39
AP39
M_CHA_DQ61
M_CHA_DQ62
Title : CPU 1160 + MEMORY - 1
SA_DQ[62]
SA_DQ[63] AP40 M_CHA_DQ63
Pegatron Corp. Engineer: Vic_Chen
DDR_A Size Project Name Rev
Rev 1.2
SOCKET_1156P A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 10 of 68
5 4 3 2 1
5 4 3 2 1

I M_CHB_DQ[0..63] 17
HU1B
17 M_CHB_MAA[0..15]
M_CHB_MAA0 AU20 AF4 M_CHB_DQS0
SB_MA[0] SB_DQS[0] M_CHB_DQS0 17
M_CHB_MAA1 AU18 AE5 M_CHB_DQS0#
SB_MA[1] SB_DQS[0]# M_CHB_DQS0# 17
M_CHB_MAA2 AV18 AE4 M_CHB_DM0
SB_MA[2] SB_DM[0] M_CHB_DM0 17
M_CHB_MAA3 AU17
M_CHB_MAA4 SB_MA[3] M_CHB_DQ0
AY18 SB_MA[4] SB_DQ[0] AD7
M_CHB_MAA5 AV17 AD6 M_CHB_DQ1
M_CHB_MAA6 SB_MA[5] SB_DQ[1] M_CHB_DQ2
AW17 SB_MA[6] SB_DQ[2] AH8
M_CHB_MAA7 AU16 AJ8 M_CHB_DQ3
M_CHB_MAA8 SB_MA[7] SB_DQ[3] M_CHB_DQ4
D AT17 SB_MA[8] SB_DQ[4] AC7 D
M_CHB_MAA9 AY16 AC6 M_CHB_DQ5
M_CHB_MAA10 SB_MA[9] SB_DQ[5] M_CHB_DQ6
AY25 SB_MA[10] SB_DQ[6] AF5
M_CHB_MAA11 AW16 AE6 M_CHB_DQ7
M_CHB_MAA12 SB_MA[11] SB_DQ[7]
AW15 SB_MA[12]
M_CHB_MAA13 AW28 AH6 M_CHB_DQS1
SB_MA[13] SB_DQS[1] M_CHB_DQS1 17
M_CHB_MAA14 AY12 AJ5 M_CHB_DQS1#
SB_MA[14] SB_DQS[1]# M_CHB_DQS1# 17
M_CHB_MAA15 AV11 AH4 M_CHB_DM1
SB_MA[15] SB_DM[1] M_CHB_DM1 17
AG5 M_CHB_DQ8
SB_DQ[8] M_CHB_DQ9
17 M_CHB_W E# AU26 SB_WE# SB_DQ[9] AH7
AW27 AK6 M_CHB_DQ10
17 M_CHB_CAS# SB_CAS# SB_DQ[10] M_CHB_DQ11
17 M_CHB_RAS# AW26 SB_RAS# SB_DQ[11] AL4
AG6 M_CHB_DQ12
SB_DQ[12] M_CHB_DQ13
SB_DQ[13] AG4
AJ7 M_CHB_DQ14
SB_DQ[14] M_CHB_DQ15
SB_DQ[15] AK7
M_CHB_BA0 AU25
17 M_CHB_BA0 M_CHB_BA1 SB_BS[0] M_CHB_DQS2
17 M_CHB_BA1 AW25 SB_BS[1] SB_DQS[2] AN6 M_CHB_DQS2 17
M_CHB_BA2 AV12 AM6 M_CHB_DQS2#
17 M_CHB_BA2 SB_BS[2] SB_DQS#[2] M_CHB_DQS2# 17
AM7 M_CHB_DM2
SB_DM[2] M_CHB_DM2 17
AL6 M_CHB_DQ16
SB_DQ[16] M_CHB_DQ17
SB_DQ[17] AN5
M_CHB_CS#0 AY27 AP6 M_CHB_DQ18
17 M_CHB_CS#0 M_CHB_CS#1 SB_CS[0]# SB_DQ[18] M_CHB_DQ19
17 M_CHB_CS#1 AW29 SB_CS[1]# SB_DQ[19] AR5
M_CHB_CS#2 AV26 AL5 M_CHB_DQ20
17 M_CHB_CS#2 M_CHB_CS#3 SB_CS[2]# SB_DQ[20] M_CHB_DQ21
17 M_CHB_CS#3 AV29 SB_CS[3]# SB_DQ[21] AM4
AN7 M_CHB_DQ22
C SB_DQ[22] M_CHB_DQ23 C
SB_DQ[23] AP5

AR8 M_CHB_DQS3
SB_DQS[3] M_CHB_DQS3 17
M_CHB_CKE0 AW8 AP8 M_CHB_DQS3#
17 M_CHB_CKE0 SB_CKE[0] SB_DQS#[3] M_CHB_DQS3# 17
M_CHB_CKE1 AY9 AT7 M_CHB_DM3
17 M_CHB_CKE1 SB_CKE[1] SB_DM[3] M_CHB_DM3 17
M_CHB_CKE2 AU9
17 M_CHB_CKE2 M_CHB_CKE3 SB_CKE[2] M_CHB_DQ24
17 M_CHB_CKE3 AV9 SB_CKE[3] SB_DQ[24] AT6
AR7 M_CHB_DQ25
SB_DQ[25] M_CHB_DQ26
SB_DQ[26] AR9
AM8 M_CHB_DQ27
SB_DQ[27] M_CHB_DQ28
SB_DQ[28] AN8
M_CHB_ODT0 AU27 AR6 M_CHB_DQ29
17 M_CHB_ODT0 M_CHB_ODT1 SB_ODT[0] SB_DQ[29] M_CHB_DQ30
17 M_CHB_ODT1 AU29 SB_ODT[1] SB_DQ[30] AL8
M_CHB_ODT2 AV27 AT9 M_CHB_DQ31
17 M_CHB_ODT2 M_CHB_ODT3 SB_ODT[2] SB_DQ[31]
17 M_CHB_ODT3 AU28 SB_ODT[3]
AT25 M_CHB_DQS4
SB_DQS[4] M_CHB_DQS4 17
AR24 M_CHB_DQS4#
SB_DQS[4]# M_CHB_DQS4# 17
AN24 M_CHB_DM4
SB_DM[4] M_CHB_DM4 17
AR17 AN23 M_CHB_DQ32
17 M_CHB_CLK0 SB_CK[0] SB_DQ[32] M_CHB_DQ33
17 M_CHB_CLK0# AR16 SB_CK[0]# SB_DQ[33] AP23
AT15 AR25 M_CHB_DQ34
17 M_CHB_CLK1 SB_CK[1] SB_DQ[34] M_CHB_DQ35
17 M_CHB_CLK1# AR15 SB_CK[1]# SB_DQ[35] AR26
AN17 AT23 M_CHB_DQ36
17 M_CHB_CLK2 SB_CK[2] SB_DQ[36] M_CHB_DQ37
17 M_CHB_CLK2# AN16 SB_CK[2]# SB_DQ[37] AP22
AR19 AP25 M_CHB_DQ38
17 M_CHB_CLK3 SB_CK[3] SB_DQ[38] M_CHB_DQ39
17 M_CHB_CLK3# AR18 SB_CK[3]# SB_DQ[39] AT26

AP32 M_CHB_DQS5
B SB_DQS[5] M_CHB_DQS5 17 B
AR32 M_CHB_DQS5#
SB_DQS[5]# M_CHB_DQS5# 17
AN32 M_CHB_DM5
SB_DM[5] M_CHB_DM5 17
AT32 M_CHB_DQ40
SB_DQ[40] M_CHB_DQ41
SB_DQ[41] AP31
AR33 M_CHB_DQ42
SB_DQ[42] M_CHB_DQ43
SB_DQ[43] AM32
NOBOM TPC26b HT5 1 TP_CPU_AM23 AM23 AT31 M_CHB_DQ44
NOBOM TPC26b HT6 TP_CPU_AM24 SB_CS[4]# SB_DQ[44] M_CHB_DQ45
1 AM24 SB_CS[5]# SB_DQ[45] AR31
NOBOM TPC26b HT7 1 TP_CPU_AL24 AL24 AR34 M_CHB_DQ46
NOBOM TPC26b HT8 TP_CPU_AK24 SB_CS[6]# SB_DQ[46] M_CHB_DQ47
1 AK24 SB_CS[7]# SB_DQ[47] AT33

AR36 M_CHB_DQS6
SB_DQS[6] M_CHB_DQS6 17
AR37 M_CHB_DQS6#
SB_DQS#[6] M_CHB_DQS6# 17
AM33 M_CHB_DM6
SB_DM[6] M_CHB_DM6 17
M_CHB_DQS8 AR14 AR35 M_CHB_DQ48
17 M_CHB_DQS8 M_CHB_DQS8# SB_DQS[8] SB_DQ[48] M_CHB_DQ49
NOTE: 17 M_CHB_DQS8# AR13 SB_DQS[8]# SB_DQ[49] AT36
AN33 M_CHB_DQ50
SB_DQ[50] M_CHB_DQ51
For ECC DIMM SB_DQ[51] AP36
AP34 M_CHB_DQ52
SB_DQ[52] M_CHB_DQ53
SB_DQ[53] AT35
AN34 M_CHB_DQ54
SB_DQ[54] M_CHB_DQ55
17 MB_ECC_CB[0..7] SB_DQ[55] AP37

MB_ECC_CB0 AR12 AL37 M_CHB_DQS7


SB_ECC_CB[0] SB_DQS[7] M_CHB_DQS7 17
MB_ECC_CB1 AT13 AM36 M_CHB_DQS7#
SB_ECC_CB[1] SB_DQS[7]# M_CHB_DQS7# 17
MB_ECC_CB2 AN15 AK35 M_CHB_DM7
SB_ECC_CB[2] SB_DM[7] M_CHB_DM7 17
A MB_ECC_CB3 AP14 A
MB_ECC_CB4 SB_ECC_CB[3] M_CHB_DQ56
AM12 SB_ECC_CB[4] SB_DQ[56] AL35
MB_ECC_CB5 AN12 AM35 M_CHB_DQ57
MB_ECC_CB6 SB_ECC_CB[5] SB_DQ[57] M_CHB_DQ58
AN14 SB_ECC_CB[6] SB_DQ[58] AJ36
MB_ECC_CB7 M_CHB_DQ59
AP13 SB_ECC_CB[7] SB_DQ[59] AJ37
AN35 M_CHB_DQ60 PEGATRON DT-MB RESTRICTED SECRET
SB_DQ[60] M_CHB_DQ61
SB_DQ[61] AM34
SB_DQ[62] AJ35
AL36
M_CHB_DQ62
M_CHB_DQ63
Title : CPU 1160 + MEMORY - 2
SB_DQ[63]
DDR_B Pegatron Corp. Engineer: Vic_Chen
Rev 1.2 Size Project Name Rev
SOCKET_1156P
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 11 of 68
5 4 3 2 1
5 4 3 2 1

I I
HU1C HU1D
D D
EXP_RXP0 C9 C7 EXP_TXP0 AC4 U6
38 EXP_RXP0 PEG_RX[0] PEG_TX[0] EXP_TXP0 38 24 DL_FSYNC_0 FDI_FSYNC[0] FDI_TX[0] FDI_TXP0 24
EXP_RXN0 D9 D7 EXP_TXN0 AD4 U5
38 EXP_RXN0 PEG_RX[0]# PEG_TX[0]# EXP_TXN0 38 24 DL_LSYNC_0 FDI_LSYNC[0] FDI_TX[0]# FDI_TXN0 24
EXP_RXP1 B8 E7 EXP_TXP1 V4
38 EXP_RXP1 PEG_RX[1] PEG_TX[1] EXP_TXP1 38 FDI_TX[1] FDI_TXP1 24
EXP_RXN1 C8 E6 EXP_TXN1 V3
38 EXP_RXN1 PEG_RX[1]# PEG_TX[1]# EXP_TXN1 38 FDI_TX[1]# FDI_TXN1 24
EXP_RXP2 A7 E5 EXP_TXP2 U8
38 EXP_RXP2 PEG_RX[2] PEG_TX[2] EXP_TXP2 38 FDI_TX[2] FDI_TXP2 24
EXP_RXN2 A6 F5 EXP_TXN2 U7
38 EXP_RXN2 PEG_RX[2]# PEG_TX[2]# EXP_TXN2 38 FDI_TX[2]# FDI_TXN2 24
EXP_RXP3 B6 F3 EXP_TXP3 W8
38 EXP_RXP3 PEG_RX[3] PEG_TX[3] EXP_TXP3 38 FDI_TX[3] FDI_TXP3 24
EXP_RXN3 C6 F4 EXP_TXN3 W7
38 EXP_RXN3 PEG_RX[3]# PEG_TX[3]# EXP_TXN3 38 FDI_TX[3]# FDI_TXN3 24
EXP_RXP4 A5 G6 EXP_TXP4
38 EXP_RXP4 PEG_RX[4] PEG_TX[4] EXP_TXP4 38
EXP_RXN4 B5 G5 EXP_TXN4 DISPLAY LINK
38 EXP_RXN4 PEG_RX[4]# PEG_TX[4]# EXP_TXN4 38
EXP_RXP5 B4 H4 EXP_TXP5
38 EXP_RXP5 PEG_RX[5] PEG_TX[5] EXP_TXP5 38
EXP_RXN5 C4 H3 EXP_TXN5 AC3 W5
38 EXP_RXN5 PEG_RX[5]# PEG_TX[5]# EXP_TXN5 38 24 DL_FSYNC_1 FDI_FSYNC[1] FDI_TX[4] FDI_TXP4 24
24 DL_LSYNC_1 AD3 FDI_LSYNC[1] FDI_TX[4]# W4 FDI_TXN4 24
EXP_RXP6 C3 F7 EXP_TXP6
38 EXP_RXP6 PEG_RX[6] PEG_TX[6] EXP_TXP6 38
EXP_RXN6 D3 G7 EXP_TXN6 R8
38 EXP_RXN6 PEG_RX[6]# PEG_TX[6]# EXP_TXN6 38 FDI_TX[5] FDI_TXP5 24
FDI_TX[5]# R7 FDI_TXN5 24
EXP_RXP7 D2 J6 EXP_TXP7
38 EXP_RXP7 PEG_RX[7] PEG_TX[7] EXP_TXP7 38
EXP_RXN7 E2 J5 EXP_TXN7 Y4

PEG
38 EXP_RXN7 PEG_RX[7]# PEG_TX[7]# EXP_TXN7 38 FDI_TX[6] FDI_TXP6 24
FDI_TX[6]# Y3 FDI_TXN6 24
EXP_RXP8 E1 K3 EXP_TXP8
38 EXP_RXP8 PEG_RX[8] PEG_TX[8] EXP_TXP8 38
EXP_RXN8 F1 K4 EXP_TXN8 AC2 Y6
38 EXP_RXN8 PEG_RX[8]# PEG_TX[8]# EXP_TXN8 38 24 DL_INT FDI_INT FDI_TX[7] FDI_TXP7 24
FDI_TX[7]# Y5 FDI_TXN7 24
EXP_RXP9 G3 H8 EXP_TXP9
38 EXP_RXP9 PEG_RX[9] PEG_TX[9] EXP_TXP9 38
C EXP_RXN9 G2 J8 EXP_TXN9 C
38 EXP_RXN9 PEG_RX[9]# PEG_TX[9]# EXP_TXN9 38
EXP_RXP10 G1 L6 EXP_TXP10
38 EXP_RXP10 PEG_RX[10] PEG_TX[10] EXP_TXP10 38
EXP_RXN10 H1 L5 EXP_TXN10
38 EXP_RXN10 PEG_RX[10]# PEG_TX[10]# EXP_TXN10 38 Rev 1.2
SOCKET_1156P
EXP_RXP11 J3 M4 EXP_TXP11
38 EXP_RXP11 PEG_RX[11] PEG_TX[11] EXP_TXP11 38
EXP_RXN11 J2 M3 EXP_TXN11
38 EXP_RXN11 PEG_RX[11]# PEG_TX[11]# EXP_TXN11 38
EXP_RXP12 J1 K7 EXP_TXP12
38 EXP_RXP12 PEG_RX[12] PEG_TX[12] EXP_TXP12 38
EXP_RXN12 K1 L7 EXP_TXN12
38 EXP_RXN12 PEG_RX[12]# PEG_TX[12]# EXP_TXN12 38
EXP_RXP13 L2 N6 EXP_TXP13
38 EXP_RXP13 PEG_RX[13] PEG_TX[13] EXP_TXP13 38
EXP_RXN13 L3 N5 EXP_TXN13
38 EXP_RXN13 PEG_RX[13]# PEG_TX[13]# EXP_TXN13 38
EXP_RXP14 P3 M8 EXP_TXP14
38 EXP_RXP14 PEG_RX[14] PEG_TX[14] EXP_TXP14 38
EXP_RXN14 P4 N8 EXP_TXN14
38 EXP_RXN14 PEG_RX[14]# PEG_TX[14]# EXP_TXN14 38
EXP_RXP15 T3 R5 EXP_TXP15
38 EXP_RXP15 PEG_RX[15] PEG_TX[15] EXP_TXP15 38
EXP_RXN15 T4 R6 EXP_TXN15
38 EXP_RXN15 PEG_RX[15]# PEG_TX[15]# EXP_TXN15 38

DMI_RXP0 R1 L1 DMI_TXP0
20 DMI_RXP0 DMI_RX[0] DMI_TX[0] DMI_TXP0 20
DMI_RXN0 T1 M1 DMI_TXN0
20 DMI_RXN0 DMI_RX[0]# DMI_TX[0]# DMI_TXN0 20
B DMI_RXP1 DMI_TXP1 B
20 DMI_RXP1 U3 DMI_RX[1] DMI_TX[1] N3 DMI_TXP1 20
DMI_RXN1 U2 N2 DMI_TXN1
20 DMI_RXN1 DMI_RX[1]# DMI_TX[1]# DMI_TXN1 20
DMI_RXP2 U1 N1 DMI_TXP2
DMI

20 DMI_RXP2 DMI_RX[2] DMI_TX[2] DMI_TXP2 20


DMI_RXN2 V1 P1 DMI_TXN2
20 DMI_RXN2 DMI_RX[2]# DMI_TX[2]# DMI_TXN2 20
DMI_RXP3 W3 R2 DMI_TXP3
20 DMI_RXP3 DMI_RX[3] DMI_TX[3] DMI_TXP3 20
DMI_RXN3 W2 R3 DMI_TXN3
20 DMI_RXN3 DMI_RX[3]# DMI_TX[3]# DMI_TXN3 20

I
HR1
49.9 1%
D11 CPU_GRCOMP 1 2
PEG_ICOMPI

PEG_ICOMPO C10 I
HR2
B10 750 GND
PEG_RCOMPO 1%
A11 CPU_GRBIAS 1 2
PEG_RBIAS

SOCKET_1156P Rev 1.2 GND

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : CPU 1160 + MEMORY - 3
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 12 of 68
5 4 3 2 1
5 4 3 2 1

I
HU1E
VRM_VID[0..7] 9,59
AA7 U40 VRM_VID0
24 CK_133M_PCH_OUT BCLK[0] VID[0]/MSID[0]
AA6 U39 VRM_VID1
24 CK_133M_PCH_OUT# BCLK[0]# VID[1]/MSID[1]
U38 VRM_VID2
VID[2]/MSID[2] VRM_VID3
24 CK_100M_PEG_DMI AA3 PEG_CLK VID[3]/CSC[0] U37
AA4 U36 VRM_VID4
24 CK_100M_PEG_DMI# PEG_CLK# VID[4]/CSC[1]
U35 VRM_VID5
CPU_BCLK1# VID[5]/CSC[2] VRM_VID6
Y8 BCLK[1]# VID[6] U34
CPU_BCLK1 AA8 U33 VRM_VID7
BCLK[1] VID[7]
D
PSI# AG38 VRM_PSI# 59 D
TPC26b HT95 1TDO_TDI_M AF37 TDI_M GFX_VID[0..6] 9

2
AF38 TDO_M
HR108 HR109 NOBOM G10 GFX_VID0
GFX_VID[0] GFX_VID1
Divide to 1P1V 0 0 GFX_VID[1] B12
E12 GFX_VID2
NOBOM NOBOM GFX_VID[2] GFX_VID3
E11

1
+1P5V_DUAL +1P1V_VTT +1P1V_VTT GFX_VID[3] GFX_VID4
GFX_VID[4] C12
G11 GFX_VID5
GFX_VID[5] GFX_VID6
1 GFX_VID[6] J11

1
I GND GND GFX_VR_EN F12 GFX_VR_EN 62
HR78 NI NI F6 GFX_IMON HR3 2 1 0 NOBOM
1.1K HR6 HR32 GFX_IMON
1% 49.9 PU in SIO 51 AE38 TP_CPU_AE38 1 HT9 TPC26b NOBOM
1% FC_AE38
AF39 VTT_SELECT 64
2

2
HR7 VTT_SELECT
22,57 CPUPW RGD 2 1 0 NOBOM PROC_PW RGD_AH36AH36
VCCPWRGOOD_1 FC_AG40 AG40 TP_CPU_AG40 1 HT12 TPC26b NOBOM GND
HR4 2 1 0 NOBOM PROC_PW RGD_AH35AH35
VCCPWRGOOD_0
22,36,47,50,57 PLTRST# I HR5 1 1.3K 2 1% H_CPURST AF34
RSTIN# VCC_SENSE T35 VCC_SENSE_A 59
59,64 VTTPW RGD AG37 VTTPWRGOOD VSS_SENSE T34 VSS_SENSE_A 59
22 DRAM_PW ROK AH37 SM_DRAMPWROK
VTT_SENSE AE35 VCCVTT_SENSE_A 64
1

1
I I VSS_SENSE_VTT AE36 VSSVTT_SENSE_A 64
HR79 +1P1V_VTT +1P1V_VTT +1P1V_VTT +1P1V_VTT +1P1V_VTT HR8 I
3K 665 HC20 NOTE:

2
1% 1% 0.1UF/16V
Lynnfield --> NI HR105/HR107

1
1

1
X7R 10%
2

2
VP HR75 NI I I I NI VAXG_SENSE A13 I HR105 1 2 0 VCCAXG_SENSE_A 62
48 PECI_SIO 1 2 0 HR30 HR29 HR28 HR33 HR31
VSSAXG_SENSE B13 I HR107 1 2 0 VSSAXG_SENSE_A 62
GND 51 51 51 51 51 GND GND IPMIP-GS Add HR105 and HR107
C NI HR74 2 C

2
2

21 PECI 1 2 0 PCH_PECI AG35 PECI ISENSE T40 MCP_ISENSE_A 59


HIERR# AG39
PROCHOT# CATERR#
AH34 PROCHOT#
AF35 +1P1V_VTT +1P1V_VTT +1P1V_VTT
21 H_THMTRIP# THERMTRIP#
21 PM_SYNC AH39 PM_SYNC NI HR36,38,40
( CRB1.1 page.102 )

1
1
+1P1V_VTT
+3P3VSB NI I NI
AB5 HR38 HR39 HR40
AB4
PM_EXT_TS[0]# 51 51 51 NOTE:
PM_EXT_TS[1]#
1

I HR13 2 1 20 1% MCP_COMP2 B11 PLACE TCK, TDI, TMS RESISTOR CLOSE TO CPU SOCKET

2
2
2
COMP2
I I HR12 2 1 20 1% MCP_COMP3 C11 COMP3 TCK AN37 TCK 57
HR76
10K HQ3 3 MISC TDI
TDO
AM37
AM38
TDI
TDO
57
57
C I I HR14 2 1 100 1% MCP_SM_RCOMP0 AG1 AN40 TMS 57
2

1 B SM_RCOMP[0] TMS
VTTPG_GATE2 I HR16 2 1 24.9 1% MCP_SM_RCOMP1 AD1 SM_RCOMP[1] TRST# AM39 TRST# 57
I HR15 2 1 130 1% MCP_SM_RCOMP2 AE1 SM_RCOMP[2]
3 PMBS3904 E
C I 2
1 B HQ4 NI HD2

1
PMBS3904 2 I HR20 2 1 49.9 1% MCP_NORTH_COMP AF2 +1P1V_VTT +1P1V_VTT
E COMP1
GND 3 I HR19 2 1 49.9 1% MCP_SOUTH_COMP AF36
COMP0 NI I
2 1 HR36 HR37

1
51 51
GND AK38 NI NI

2
I BAT54AW 22 SKTOCC# SKTOCC# HR35 HR34
GND
HR77 NOBOM TPC26b HT21 1 TP_GFX_DPRSLPVR J10 51 51
VTTPG_GATE1 1 GFX_DPRSLPVR
2 SLP_S3# 22,48,64,66

2
B B
4.7K GND GND
BCLK_ITP# AK40 CK_ITP# 57 Pin AJ38: PRDY#
NOTE: BCLK_ITP AK39 CK_ITP 57 CRB V1.1 , page.6 (Reserved pull-up for PRDY#)
CFG[0:5] have internal pull-up AJ38 PDG V1.0 , page.70(System Pull-up required)
PRDY# H_PRDY# 57
NI HR21 2 1 1.5K H_CFG0 E8 AK37
CFG[0] PREQ# H_PREQ# 57
NI HR22 2 1 1.5K H_CFG1 G8 AL40
CFG[1] DBR# SYS_RESET# 8,22,52,57
NI HR23 2 1 1.5K H_CFG2 E10 AK34
CFG[2] TAPPWRGOOD H_TAPPW RGOOD 57
NI HR24 2 1 1.5K H_CFG3 F10 AL39
CFG[3] RESET_OBS# H_RSTOUT# 57
NI HR25 2 1 1.5K H_CFG4 H10 CFG[4]
NI HR26 2 1 1.5K H_CFG5 H9 CFG[5] Pin AL39: RESET_OBS#
NI HR86 2 1 1.5K CFG6 E9
HR84 2 CFG[6] CRB V1.1 , page.6 (Reserved pull-up for RESET_OBS#)
NI 1 1.5K CFG7 F9 CFG[7]
NOBOM TPC26b HT84 1 TP_CFG8 G12 PDG V1.0 , page.393(System Pull-up required)
NOBOM TPC26b HT85 TP_CFG9 CFG[8]
GND 1 H12 CFG[9]
PEG CONFIG TABLE AL33 BPM#0 1 HT11 TPC26b NOBOM
CFG[0~5] All have internal P-U NOBOM TPC26b HT86 TP_CFG10 BPM[0]# BPM#1 HT16 TPC26b NOBOM
1 K10 CFG[10] BPM[1]# AL32 1
CFG0 CFG1 CFG2 PCIE CONFIG NOBOM TPC26b HT88 1 TP_CFG11 K8 AK33 BPM#2 1 HT20 TPC26b NOBOM
1 1 1 1 x 16 NOBOM TPC26b HT24 TP_CFG12 CFG[11] BPM[2]# BPM#3 HT89 TPC26b NOBOM
1 J12 CFG[12] BPM[3]# AK32 1
0 1 1 2 x 8 NOBOM TPC26b HT25 1 TP_CFG13 L8 AM31 BPM#4 1 HT90 TPC26b NOBOM
NOBOM TPC26b HT26 TP_CFG14 CFG[13] BPM[4]# BPM#5 HT91 TPC26b NOBOM
1 K9 CFG[14] BPM[5]# AL30 1
H L Description NI HR85 2 1 1.5K CFG15 K12 AK30 BPM#6 1 HT92 TPC26b NOBOM
CFG3 NORM Reversal PEG Lane Reversal NOBOM TPC26b HT28 TP_CFG16 CFG[15] BPM[6]# BPM#7 HT93 TPC26b NOBOM
1 H7 CFG[16] BPM[7]# AK31 1
CFG4 Disabled Enabled DP Presence NOBOM TPC26b HT29 1 TP_CFG17 L11 CFG[17]
CFG7 Engineering experiment GND
CFG15 Engineering experiment

A A

PEGATRON DT-MB RESTRICTED SECRET


Rev 1.2
Title : CPU 1160 + MEMORY - 4
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
SOCKET_1156P
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 13 of 68
5 4 3 2 1
5 4 3 2 1

I I I
+VCORE +VCORE +1P1V_VTT +1P1V_VTT +V_AXG +1P5V_DUAL
HU1F HU1G HU1H
CPU POWER CPU POWER MCH POWER
A38 VCC_NCTF1 VCC89 H26 AA33 VTT1 VTT60 T6 A14 VAXG1 VDDQ1 AJ11
C40 VCC_NCTF2 VCC90 H28 AA34 VTT2 VTT61 T7 A15 VAXG2 VDDQ2 AJ13
D A23 VCC1 VCC91 H29 AA35 VTT3 VTT62 T8 A17 VAXG3 VDDQ3 AJ15 D

1
A24 VCC2 VCC92 H31 AA36 VTT4 VTT63 V7 A18 VAXG4 VDDQ4 AT18 I I
A26 H32 AA37 V8 B14 AT21 HCB1 HCB3
VCC3 VCC93 VTT5 VTT64 VAXG5 VDDQ5 22UF/6.3V 22UF/6.3V
A27 H34 AA38 AB7 B15 AT10

2
VCC4 VCC94 VTT6 VTT78 VAXG6 VDDQ6 X5R 20% X5R 20%
A33 VCC5 VCC95 H35 AC33 VTT7 VTT65 V6 B17 VAXG7 VDDQ7 AU11
A35 H37 AC34 W1 B18 AV13 mx_c0805 mx_c0805
VCC6 VCC96 VTT8 VTT66 VAXG8 VDDQ8
A36 VCC7 VCC97 H38 AC35 VTT9 VTT67 W6 C14 VAXG9 VDDQ9 AV16
B23 VCC8 VCC98 H40 AC36 VTT10 VTT68 L10 C15 VAXG10 VDDQ10 AV19 GND GND
B25 VCC9 VCC99 J18 AC37 VTT11 VTT69 M10 C17 VAXG11 VDDQ11 AV22
B26 VCC10 VCC100 J19 AC38 VTT12 VTT70 M11 C18 VAXG12 VDDQ12 AV25
B28 VCC11 VCC101 J21 AC39 VTT13 VTT71 M9 C20 VAXG13 VDDQ13 AV28
B29 VCC12 VCC102 J22 AC40 VTT14 VTT72 N7 C21 VAXG14 VDDQ14 AW9
B31 VCC13 VCC103 J24 AD33 VTT15 VTT73 P6 D14 VAXG15 VDDQ15 AY11
B32 VCC14 VCC104 J25 AD34 VTT16 VTT74 P7 D15 VAXG16 VDDQ16 AY14
B34 VCC15 VCC105 J27 AD35 VTT17 VTT75 P8 D17 VAXG17 VDDQ17 AY17
B35 VCC16 VCC106 J28 AD36 VTT18 VTT76 T2 D18 VAXG18 VDDQ18 AY23
B37 VCC17 VCC107 J30 AD37 VTT19 VTT77 V2 D20 VAXG19 VDDQ19 AY26
B38 VCC18 VCC108 J31 AD38 VTT20 D21 VAXG20
C23 VCC19 VCC109 J33 AD39 VTT21 E14 VAXG21
C24 VCC20 VCC110 J34 AD40 VTT22 E15 VAXG22
C25 VCC21 VCC111 J36 AE33 VTT23 E17 VAXG23
C27 J37 AE34 +1P8V_SFR E18
VCC22 VCC112 VTT24 VAXG24
C28 VCC23 VCC113 J39 AE39 VTT25 E20 VAXG25
C30 VCC24 VCC114 J40 AE40 VTT26 F14 VAXG26
C31 VCC25 VCC115 K17 AF33 VTT27 VCCPLL1 AF7 F15 VAXG27
C33 VCC26 VCC116 K18 AG33 VTT28 VCCPLL2 AF8 F17 VAXG28
C34 VCC27 VCC117 K20 AJ31 VTT29 VCCPLL3 AG8 F18 VAXG29

1
C36 VCC28 VCC118 K21 AJ32 VTT30 I F19 VAXG30
C37 K23 V33 HCB2 G14
C VCC29 VCC119 VTT31 1UF/16V VAXG31 C
C39 K24 V34 G15

2
VCC30 VCC120 VTT32 X7R 10% VAXG32
D23 VCC31 VCC121 K26 V35 VTT33 G17 VAXG33
D24 K27 V36 mx_c0603 G18
VCC32 VCC122 VTT34 VAXG34
D26 VCC33 VCC123 K29 V37 VTT35 H14 VAXG35
D27 VCC34 VCC124 K30 V38 VTT36 GND H15 VAXG36
D29 VCC35 VCC125 K32 V39 VTT37 H17 VAXG37
D30 VCC36 VCC126 K33 V40 VTT38 J14 VAXG38
D32 VCC37 VCC127 K35 Y33 VTT39
Check PDG 0.7 J15 VAXG39
D33 VCC38 VCC128 K36 Y34 VTT40 & CPU EDS REV.0.7 J16 VAXG40
D35 VCC39 VCC129 K38 Y35 VTT41 Ch6.12 POWER SIGNALS K14 VAXG41
D36 VCC40 VCC130 K39 Y36 VTT42 K15 VAXG42
D38 VCC41 VCC131 L17 Y37 VTT43 K16 VAXG43
D39 VCC42 VCC132 L19 Y38 VTT44 L14 VAXG44
E22 VCC43 VCC133 L20 AJ21 VTT45 L15 VAXG45
E23 VCC44 VCC134 L22 AJ25 VTT46 L16 VAXG46
E25 VCC45 VCC135 L23 AJ27 VTT47 M14 VAXG47
E26 VCC46 VCC136 L25 AJ29 VTT48 M15 VAXG48
E28 VCC47 VCC137 L26 AK20 VTT49 M16 VAXG49
E29 VCC48 VCC138 L28 AK21 VTT50
E31 VCC49 VCC139 L29 AL20 VTT51
E32 L31 AL21 SOCKET_1156P Rev 1.2
VCC50 VCC140 VTT52
E34 VCC51 VCC141 L32 AC8 VTT53
E35 VCC52 VCC142 L34 AE8 VTT54
E37 VCC53 VCC143 L35 AJ17 VTT55
E38 VCC54 VCC144 L37 AJ19 VTT56
E40 VCC55 VCC145 L38 AK19 VTT57 NOTE:

1
F21 VCC56 VCC146 L40 AC5 VTT58 NI
F22 M17 AJ23 HR117 HR117 FOR
VCC57 VCC147 VTT59
F24 M19 0
B
F25
VCC58 VCC148
M21 mx_r0603 Lynnfield Only B
VCC59 VCC149
F27 M22

2
VCC60 VCC150
F28 VCC61 VCC151 M24
F30 VCC62 VCC152 M25
F31 VCC63 VCC153 M27
F33 VCC64 VCC154 M28
F34 VCC65 VCC155 M30
F36 VCC66 VCC156 M33 GND
F37 VCC67 VCC157 M34
F39 VCC68 VCC158 M36
F40 VCC69 VCC159 M37
G20 VCC70 VCC160 M39
G21 VCC71 VCC161 M40
G23 VCC72 VCC162 N33
G24 N35 SOCKET_1156P Rev 1.2
VCC73 VCC163
G26 VCC74 VCC164 N36
G27 VCC75 VCC165 N38
G29 VCC76 VCC166 N39
G30 VCC77 VCC167 P33
G32 VCC78 VCC168 P34
G33 VCC79 VCC169 P35
G35 VCC80 VCC170 P36
G36 VCC81 VCC171 P37
G38 VCC82 VCC172 P38
G39 VCC83 VCC173 P39
H19 VCC84 VCC174 P40
H20 VCC85 VCC175 R33
H22 VCC86 VCC176 R34
A H23 VCC87 VCC177 R35 A
H25 VCC88 VCC178 R36
R39 VCC181 VCC179 R37
R40 VCC182 VCC180 R38
PEGATRON DT-MB RESTRICTED SECRET
SOCKET_1156P Rev 1.2
Title : CPU 1160 + MEMORY - 5
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: Tuesday, March 23, 2010 Sheet 14 of 68
5 4 3 2 1
5 4 3 2 1

I
HU1I I
HU1J
A16 VSS1 VSS91 AP33 G16 VSS181 VSS271 W35
A25 AP38 G19 W36
A28
VSS2 VSS92
AU7 G22
VSS182 VSS272
W37 ILM1
VSS3 VSS281 VSS183 VSS273
A34 VSS4 VSS94 AP7 G25 VSS184 VSS274 W38
D A37 VSS5 VSS95 AP9 G28 VSS185 VSS275 Y7 D
AA5 AR1 G31 B39 TP_CPU_B39 1 HT87 TPC26b NOBOM
VSS6 VSS96 VSS186 CGC_TP_NCTF
AB3 VSS7 VSS97 AR20 G34 VSS187
AB33 VSS8 VSS98 AR23 G37 VSS188 RSVD44 A12
AB34 VSS9 VSS99 AR40 G4 VSS189 GND
AB35 VSS10 VSS100 AT12 G40 VSS190
AB36 VSS11 VSS101 AT14 G9 VSS191 RSVD47 AD2
AB37 VSS12 VSS102 AT16 H11 VSS192 RSVD48 AE2
AB38 AT2 H13 AF3 CPU_DIMMA_VREF_AF3 I 1 0 2 HR27
VSS13 VSS103 VSS193 SA_DIMM_VR DIMM_VREF_A 16,18
AB39 AT24 H16 AG3 CPU_DIMMB_VREF_AG3 I 1 0 2 HR80
VSS14 VSS104 VSS194 SB_DIMM_VR DIMM_VREF_B 17,18
AB40 VSS15 VSS105 AT27 H18 VSS195
AB6 VSS16 VSS106 AT30 H2 VSS196 RSVD52 AH40
AB8 VSS17 VSS284 AH5 H21 VSS197 RSVD53 AJ39
AC1 VSS18 VSS287 AM9 H24 VSS198 IHR27 HR80 Change to I for QS CPU
AD5 VSS19 VSS288 AT37 H27 VSS199
AD8 VSS20 VSS110 AT5 H30 VSS200 NOTE:
AE3 VSS21 VSS111 AU32 H33 VSS201 RSVD1 AM14
AE37 VSS22 VSS289 AP35 H36 VSS202 RSVD2 AM13 INTEL LGA1156 SOCKET ILM
AE7 VSS23 VSS113 AV3 H39 VSS203 RSVD3 AK15 Lynnfield ES2 QS Production SOCKET1156_ILM
AF1 VSS24 VSS114 AV31 H5 VSS204 RSVD4 AK16
AF40 VSS25 VSS115 AV34 H6 VSS205 I
AF6 VSS26 VSS116 AV38 J13 VSS206 RSVD30 AM25 HR27 NI I I
AG34 VSS27 VSS117 AU36 J17 VSS207 RSVD31 AL29
AG36 VSS28 VSS118 AY33 J20 VSS208 RSVD32 AM30
AN9 VSS276 VSS119 AY36 J23 VSS209 RSVD33 AK29 HR80 NI I I
AG7 VSS30 VSS120 AY4 J26 VSS210 RSVD34 AK28
AH3 VSS31 VSS121 AY7 J29 VSS211 RSVD35 AM29
AH33 VSS32 VSS122 B16 J32 VSS212 RSVD36 AM28
AH38 VSS33 VSS123 B24 J35 VSS213 RSVD37 AL27
C AJ1 B27 J38 AK27 C
VSS34 VSS124 VSS214 RSVD38
AJ12 VSS35 VSS125 B30 J4 VSS215 RSVD39 AM26
AJ14 VSS36 VSS126 B33 J7 VSS216 RSVD40 AM27
AJ16 VSS37 VSS127 B36 J9 VSS217 RSVD41 AL26
AJ18 VSS38 VSS128 B7 K11 VSS218 RSVD42 AK26
AJ20 VSS39 VSS129 B9 K13 VSS219
AJ22 VSS40 VSS130 C13 K19 VSS220 RSVD43 AK25
AJ24 VSS41 VSS131 C16 K2 VSS221
AJ26 C19 K22
AJ28
VSS42 VSS132
C22 K25
VSS222
L12 BACKPLATE1
VSS43 VSS133 VSS223 RSVD25
AJ30 VSS44 VSS134 C26 K28 VSS224 RSVD24 M12
AJ33 VSS45 VSS135 C29 K31 VSS225
AJ34 VSS46 VSS136 C32 K34 VSS226 RSVD11 AM21
AJ40 VSS47 VSS137 C35 K37 VSS227 RSVD10 AM20
AJ6 VSS48 VSS138 C38 K40 VSS228 RSVD13 AM19
AJ9 VSS49 VSS139 C5 K5 VSS229 RSVD12 AM18
AK10 VSS50 VSS140 D10 K6 VSS230 VSS T39
AK17 VSS51 VSS141 D12 L13 VSS231
AK36 VSS52 VSS142 D13 L18 VSS232 RSVD21 AL18
AK5 VSS53 VSS143 D16 L21 VSS233 RSVD22 AK18
AK8 VSS54 VSS144 D19 L24 VSS234 GND
AL11 VSS55 VSS145 D22 L27 VSS235 RSVD7 AM15
AL13 VSS56 VSS146 D25 L30 VSS236 RSVD8 AM16
AL16 VSS57 VSS147 D28 L33 VSS237 RSVD26 AL15
AL19 VSS58 VSS148 D31 L36 VSS238 RSVD27 AL14
AL22 VSS59 VSS149 D34 L39 VSS239
AL25 VSS60 VSS150 D37 L4 VSS240
AL28 VSS61 VSS151 D4 L9 VSS241 RSVD28 AL17
B
AL3 VSS62 VSS152 D40 M13 VSS242 RSVD29 AM17 INTEL LGA 1156P BACK PLATE,3 SCREW B
AL31 VSS63 VSS153 D5 M18 VSS243 RSVD5 AK14
AL34 D6 M2 AK13 PT44P11-6401
VSS64 VSS154 VSS244 RSVD6
AL38 VSS65 VSS155 D8 M20 VSS245 RSVD14 AL12 I
AL7 VSS66 VSS156 E13 M23 VSS246 RSVD15 AK12
AM1 VSS67 VSS157 E16 M26 VSS247 RSVD_TP AN11
AM40 VSS68 VSS158 E19 M29 VSS248
AK4 E21 M32 AY3 TP_CPU_AY3 1 HT13 TPC26b NOBOM
VSS277 VSS159 VSS249 RSVD_NCTF11
AN13 VSS70 VSS160 E24 M35 VSS250
AN20 E27 M38 C2 TP_CPU_C2 1 HT14 TPC26b NOBOM
VSS71 VSS161 VSS251 RSVD_NCTF7 TP_CPU_D1 HT15 TPC26b NOBOM
AN22 VSS72 VSS162 E3 M5 VSS252 RSVD_NCTF8 D1 1
AN25 E30 M6 AY37 TP_CPU_AY37 1 HT17 TPC26b NOBOM
VSS73 VSS163 VSS253 RSVD_NCTF3 TP_CPU_AW 38 HT18 TPC26b NOBOM
AN28 VSS74 VSS164 E33 M7 VSS254 RSVD_NCTF4 AW38 1
AN31 E36 N34 AV1 TP_CPU_AV1 1 HT19 TPC26b NOBOM
VSS75 VSS165 VSS255 RSVD_NCTF9 TP_CPU_AW 2 HT22 TPC26b NOBOM
AN4 VSS278 VSS166 E39 N37 VSS256 RSVD_NCTF10 AW2 1
AN36 E4 N4 AV39 TP_CPU_AV39 1 HT23 TPC26b NOBOM
VSS77 VSS167 VSS257 RSVD_NCTF5 TP_CPU_AU40 HT27 TPC26b NOBOM
AP4 VSS279 VSS168 F11 N40 VSS258 RSVD_NCTF6 AU40 1
AT8 VSS280 VSS169 F13 P2 VSS259
AP12 VSS80 VSS170 F16 P5 VSS260
AP15 F2 R4 A4 TP_CPU_A4 1 HT30 TPC26b NOBOM
VSS81 VSS171 VSS261 RSVD_NCTF1 TP_CPU_B3 HT31 TPC26b NOBOM
AP16 VSS82 VSS172 F20 T33 VSS262 RSVD_NCTF2 B3 1
AP17 VSS83 VSS173 F23 T36 VSS263
AP20 VSS84 VSS174 F26 T37 VSS264
AP24 VSS85 VSS175 F29 T38 VSS265
AP26 VSS86 VSS176 F32 T5 VSS266 NP_NC1 1
AP27 VSS87 VSS177 F35 U4 VSS267 NP_NC2 2
AP29 VSS88 VSS178 F38 V5 VSS268 NP_NC3 3
AR30 VSS282 VSS179 F8 W33 VSS269
AT34 VSS283 VSS180 G13 W34 VSS270 NP_NC4 4
A AU6 VSS286 GND
VSS285 AM5 NP_NC5 5 A
NP_NC6 6
SOCKET_1156P Rev 1.2 7
NP_NC7

GND PEGATRON DT-MB RESTRICTED SECRET


GND GND GND
SOCKET_1156P Rev 1.2
Title : CPU 1160 + MEMORY - 6
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 15 of 68
5 4 3 2 1
5 4 3 2 1

NOTE: +1P5V_DUAL XMM1B +1P5V_DUAL


Below 4 signals are different connection in Eaglelake DDR3 platform 78 VDD10 VDD21 197
75 194
Channel A : CS1/WE/MA0 72
VDD9 VDD20
191
VDD8 VDD19
Channel B : ODT3 69 VDD7 VDD18 189
M_CHA_DQ[0..63] 10 66 VDD6 VDD17 186
M_CHA_MAA[0..15] 10 65 VDD5 VDD16 183
62 VDD4 VDD15 182
60 VDD3 VDD14 179
57 VDD2 VDD13 176
XMM1 COLOR: BLUE XMM2 COLOR: BLACK +SM_VTT 54 VDD1 VDD12 173
51 VDD0 VDD11 170
D
GND59 239 D
240 235
XMM1A XMM2A 120
VTT2
VTT1
GND58
GND57 232
GND56 229

1
1
M_CHA_MAA0 188 234 M_CHA_DQ63 M_CHA_MAA0 188 234 M_CHA_DQ63 I I 113 226
M_CHA_MAA1 181 A0 DQ63 M_CHA_DQ62 M_CHA_MAA1 181 A0 DQ63 M_CHA_DQ62 D3CB1 D3CB2 GND27 GND55
A1 DQ62 233 A1 DQ62 233 110 GND26 GND54 223
M_CHA_MAA2 61 228 M_CHA_DQ61 M_CHA_MAA2 61 228 M_CHA_DQ61 4.7UF/6.3V 0.1UF/16V 107 220

2
2
M_CHA_MAA3 180 A2 DQ61 M_CHA_DQ60 M_CHA_MAA3 180 A2 DQ61 M_CHA_DQ60 X5R 10% X7R 10% GND25 GND53
A3 DQ60 227 A3 DQ60 227 104 GND24 GND52 217
M_CHA_MAA4 59 115 M_CHA_DQ59 M_CHA_MAA4 59 115 M_CHA_DQ59 mx_c0805 101 214
M_CHA_MAA5 58 A4 DQ59 M_CHA_DQ58 M_CHA_MAA5 58 A4 DQ59 M_CHA_DQ58 GND23 GND51
A5 DQ58 114 A5 DQ58 114 98 GND22 GND50 211
M_CHA_MAA6 178 109 M_CHA_DQ57 M_CHA_MAA6 178 109 M_CHA_DQ57 95 208
M_CHA_MAA7 56 A6 DQ57 M_CHA_DQ56 M_CHA_MAA7 56 A6 DQ57 M_CHA_DQ56 GND21 GND49
A7 DQ56 108 A7 DQ56 108 GND GND 92 GND20 GND48 205
M_CHA_MAA8 177 225 M_CHA_DQ55 M_CHA_MAA8 177 225 M_CHA_DQ55 89 202
M_CHA_MAA9 175 A8 DQ55 M_CHA_DQ54 M_CHA_MAA9 175 A8 DQ55 M_CHA_DQ54 GND19 GND47
A9 DQ54 224 A9 DQ54 224 86 GND18 GND46 199
M_CHA_MAA10 70 219 M_CHA_DQ53 M_CHA_MAA10 70 219 M_CHA_DQ53 83 166
M_CHA_MAA11 55 A10/AP DQ53 M_CHA_DQ52 M_CHA_MAA11 55 A10/AP DQ53 M_CHA_DQ52 GND17 GND45
A11 DQ52 218 A11 DQ52 218 80 GND16 GND44 163
M_CHA_MAA12 174 106 M_CHA_DQ51 M_CHA_MAA12 174 106 M_CHA_DQ51 47 160
M_CHA_MAA13 196 A12 DQ51 M_CHA_DQ50 M_CHA_MAA13 196 A12 DQ51 M_CHA_DQ50 GND15 GND43
A13 DQ50 105 A13 DQ50 105 44 GND14 GND42 157
M_CHA_MAA14 172 100 M_CHA_DQ49 M_CHA_MAA14 172 100 M_CHA_DQ49 41 154
NOTE: M_CHA_MAA15 171 A14 DQ49
99 M_CHA_DQ48 NOTE: M_CHA_MAA15 171 A14 DQ49
99 M_CHA_DQ48 GND 38
GND13 GND41
151
A15 DQ48 M_CHA_DQ47 A15 DQ48 M_CHA_DQ47 GND12 GND40
Check clock source if CPU DQ47 216 Check clock source if CPU DQ47 216 35 GND11 GND39 148
215 M_CHA_DQ46 215 M_CHA_DQ46 32 145
implemented DQ46
210 M_CHA_DQ45 implemented DQ46
210 M_CHA_DQ45 29
GND10 GND38
142
DQ45 M_CHA_DQ44 DQ45 M_CHA_DQ44 GND9 GND37
10 M_CHA_CLK1 63 CK1P/NU DQ44 209 10 M_CHA_CLK3 63 CK1P/NU DQ44 209 26 GND8 GND36 139
64 97 M_CHA_DQ43 64 97 M_CHA_DQ43 23 136
10 M_CHA_CLK1# CK1N/NU DQ43 10 M_CHA_CLK3# CK1N/NU DQ43 GND7 GND35
184 96 M_CHA_DQ42 184 96 M_CHA_DQ42 20 133
10 M_CHA_CLK0 CK0P DQ42 10 M_CHA_CLK2 CK0P DQ42 GND6 GND34
185 91 M_CHA_DQ41 185 91 M_CHA_DQ41 17 130
10 M_CHA_CLK0# CK0N DQ41 10 M_CHA_CLK2# CK0N DQ41 GND5 GND33
90 M_CHA_DQ40 90 M_CHA_DQ40 14 127
DQ40 M_CHA_DQ39 DQ40 M_CHA_DQ39 GND4 GND32
DQ39 207 DQ39 207 11 GND3 GND31 124
C 206 M_CHA_DQ38 206 M_CHA_DQ38 8 121 C
DQ38 M_CHA_DQ37 DQ38 M_CHA_DQ37 GND2 GND30
10 M_CHA_CS#1 76 CS1# DQ37 201 10 M_CHA_CS#3 76 CS1# DQ37 201 5 GND1 GND29 119
193 200 M_CHA_DQ36 193 200 M_CHA_DQ36 2 116 +3P3V
10 M_CHA_CS#0 CS0# DQ36 10 M_CHA_CS#2 CS0# DQ36 GND0 GND28
88 M_CHA_DQ35 88 M_CHA_DQ35 241
DQ35 M_CHA_DQ34 DQ35 M_CHA_DQ34 DIMM_CA_VREF_A NP_NC1
10 M_CHA_CKE1 169 CKE1 DQ34 87 10 M_CHA_CKE3 169 CKE1 DQ34 87 67 VREFCA NP_NC2 242
50 82 M_CHA_DQ33 50 82 M_CHA_DQ33 243 GND
10 M_CHA_CKE0 CKE0 DQ33 M_CHA_DQ32 10 M_CHA_CKE2 CKE0 DQ33 M_CHA_DQ32 DIMM_VREF_A NP_NC3
DQ32 81 DQ32 81 1 VREFDQ VDDSPD 236
52 156 M_CHA_DQ31 52 156 M_CHA_DQ31
10 M_CHA_BA2 BA2 DQ31 10 M_CHA_BA2 BA2 DQ31

1
1
190 155 M_CHA_DQ30 190 155 M_CHA_DQ30 I I DDR3_DIMM_240P
10 M_CHA_BA1 BA1 DQ30 M_CHA_DQ29 10 M_CHA_BA1 BA1 DQ30 M_CHA_DQ29 D3CB3 D3CB4
10 M_CHA_BA0 71 BA0 DQ29 150 10 M_CHA_BA0 71 BA0 DQ29 150 I
149 M_CHA_DQ28 149 M_CHA_DQ28 0.1UF/16V 0.1UF/16V +1P5V_DUAL +1P5V_DUAL
XMM2B

2
2
DQ28 M_CHA_DQ27 DQ28 M_CHA_DQ27 X7R 10% X7R 10%
8,17,49,57 SMB_DATA_M 238 SDA DQ27 37 8,17,49,57 SMB_DATA_M 238 SDA DQ27 37
118 36 M_CHA_DQ26 118 36 M_CHA_DQ26 78 197
8,17,49,57 SMB_CLK_M SCL DQ26 M_CHA_DQ25 8,17,49,57 SMB_CLK_M SCL DQ26 M_CHA_DQ25 VDD10 VDD21
10 MA_ECC_CB[0..7] DQ25 31 10 MA_ECC_CB[0..7] DQ25 31 75 VDD9 VDD20 194
MA_ECC_CB7 165 30 M_CHA_DQ24 MA_ECC_CB7 165 30 M_CHA_DQ24 72 191
MA_ECC_CB6 CB7 DQ24 M_CHA_DQ23 MA_ECC_CB6 CB7 DQ24 M_CHA_DQ23 VDD8 VDD19
NOTE: 164 CB6 DQ23 147 NOTE: 164 CB6 DQ23 147 GND GND 69 VDD7 VDD18 189
MA_ECC_CB5 159 146 M_CHA_DQ22 MA_ECC_CB5 159 146 M_CHA_DQ22 66 186
MA_ECC_CB4 CB5 DQ22 M_CHA_DQ21 MA_ECC_CB4 CB5 DQ22 M_CHA_DQ21 VDD6 VDD17
For ECC DIMM 158 CB4 DQ21 141 For ECC DIMM 158 CB4 DQ21 141 65 VDD5 VDD16 183
MA_ECC_CB3 46 140 M_CHA_DQ20 MA_ECC_CB3 46 140 M_CHA_DQ20 62 182
MA_ECC_CB2 CB3 DQ20 M_CHA_DQ19 MA_ECC_CB2 CB3 DQ20 M_CHA_DQ19 VDD4 VDD15
45 CB2 DQ19 28 45 CB2 DQ19 28 60 VDD3 VDD14 179
MA_ECC_CB1 40 27 M_CHA_DQ18 MA_ECC_CB1 40 27 M_CHA_DQ18 57 176
MA_ECC_CB0 CB1 DQ18 M_CHA_DQ17 MA_ECC_CB0 CB1 DQ18 M_CHA_DQ17 +SM_VTT VDD2 VDD13
39 CB0 DQ17 22 39 CB0 DQ17 22 54 VDD1 VDD12 173
21 M_CHA_DQ16 +3P3V 21 M_CHA_DQ16 51 170
DQ16 M_CHA_DQ15 DQ16 M_CHA_DQ15 VDD0 VDD11
DQ15 138 DQ15 138 GND59 239
237 137 M_CHA_DQ14 237 137 M_CHA_DQ14 240 235
SA1 DQ14 M_CHA_DQ13 SA1 DQ14 M_CHA_DQ13 VTT2 GND58
117 SA0 DQ13 132 117 SA0 DQ13 132 120 VTT1 GND57 232
131 M_CHA_DQ12 131 M_CHA_DQ12 229
DQ12 DQ12 GND56

1
19 M_CHA_DQ11 19 M_CHA_DQ11 I I 113 226
DQ11 M_CHA_DQ10 DQ11 M_CHA_DQ10 D3CB5 D3CB6 GND27 GND55
GND DQ10 18 DQ10 18 110 GND26 GND54 223
B M_CHA_DQ9 M_CHA_DQ9 4.7UF/6.3V 0.1UF/16V B
13 GND 13 107 220

2
DQ9 M_CHA_DQ8 DQ9 M_CHA_DQ8 X5R 10% X7R 10% GND25 GND53
10 M_CHA_W E# 73 WE# DQ8 12 10 M_CHA_W E# 73 WE# DQ8 12 104 GND24 GND52 217
192 129 M_CHA_DQ7 192 129 M_CHA_DQ7 mx_c0805 101 214
10 M_CHA_RAS# RAS# DQ7 10 M_CHA_RAS# RAS# DQ7 GND23 GND51
74 128 M_CHA_DQ6 74 128 M_CHA_DQ6 98 211
10 M_CHA_CAS# CAS# DQ6 10 M_CHA_CAS# CAS# DQ6 GND22 GND50
123 M_CHA_DQ5 123 M_CHA_DQ5 95 208
DQ5 M_CHA_DQ4 DQ5 M_CHA_DQ4 GND21 GND49
10 M_CHA_ODT1 77 ODT1 DQ4 122 10 M_CHA_ODT3 77 ODT1 DQ4 122 GND GND 92 GND20 GND48 205
195 10 M_CHA_DQ3 195 10 M_CHA_DQ3 89 202
10 M_CHA_ODT0 ODT0 DQ3 10 M_CHA_ODT2 ODT0 DQ3 GND19 GND47
9 M_CHA_DQ2 9 M_CHA_DQ2 86 199
DQ2 M_CHA_DQ1 DQ2 M_CHA_DQ1 GND18 GND46
DQ1 4 DQ1 4 83 GND17 GND45 166
168 3 M_CHA_DQ0 168 3 M_CHA_DQ0 80 163
10,17 DDR3_DRAMRST# RESET# DQ0 10,17 DDR3_DRAMRST# RESET# DQ0 GND16 GND44
47 GND15 GND43 160
44 GND14 GND42 157
161 DM8/DQS17P DQS7P 112 M_CHA_DQS7 10 161 DM8/DQS17P DQS7P 112 M_CHA_DQS7 10 41 GND13 GND41 154
162 NC/DQS17N DQS7N 111 M_CHA_DQS7# 10 162 NC/DQS17N DQS7N 111 M_CHA_DQS7# 10 GND 38 GND12 GND40 151
10 M_CHA_DM7 230 DM7/DQS16P DQS6P 103 M_CHA_DQS6 10 10 M_CHA_DM7 230 DM7/DQS16P DQS6P 103 M_CHA_DQS6 10 35 GND11 GND39 148
231 NC/DQS16N DQS6N 102 M_CHA_DQS6# 10 231 NC/DQS16N DQS6N 102 M_CHA_DQS6# 10 32 GND10 GND38 145
10 M_CHA_DM6 221 DM6/DQS15P DQS5P 94 M_CHA_DQS5 10 10 M_CHA_DM6 221 DM6/DQS15P DQS5P 94 M_CHA_DQS5 10 29 GND9 GND37 142
222 NC/DQS15N DQS5N 93 M_CHA_DQS5# 10 222 NC/DQS15N DQS5N 93 M_CHA_DQS5# 10 26 GND8 GND36 139
212 85 212 85 +1P5V_DUAL +1P5V_DUAL 23 136
10 M_CHA_DM5 DM5/DQS14P DQS4P M_CHA_DQS4 10 10 M_CHA_DM5 DM5/DQS14P DQS4P M_CHA_DQS4 10 GND7 GND35
213 NC/DQS14N DQS4N 84 M_CHA_DQS4# 10 213 NC/DQS14N DQS4N 84 M_CHA_DQS4# 10 20 GND6 GND34 133
10 M_CHA_DM4 203 DM4/DQS13P DQS3P 34 M_CHA_DQS3 10 10 M_CHA_DM4 203 DM4/DQS13P DQS3P 34 M_CHA_DQS3 10 17 GND5 GND33 130
204 NC/DQS13N DQS3N 33 M_CHA_DQS3# 10 204 NC/DQS13N DQS3N 33 M_CHA_DQS3# 10 14 GND4 GND32 127

1
10 M_CHA_DM3 152 DM3/DQS12P DQS2P 25 M_CHA_DQS2 10 10 M_CHA_DM3 152 DM3/DQS12P DQS2P 25 M_CHA_DQS2 10 11 GND3 GND31 124
153 NC/DQS12N DQS2N 24 M_CHA_DQS2# 10 153 NC/DQS12N DQS2N 24 M_CHA_DQS2# 10 I I 8 GND2 GND30 121
143 16 143 16 D3R1 D3R2 5 119
10 M_CHA_DM2 DM2/DQS11P DQS1P M_CHA_DQS1 10 10 M_CHA_DM2 DM2/DQS11P DQS1P M_CHA_DQS1 10 GND1 GND29
144 15 144 15 1K 1K 2 116 +3P3V
NC/DQS11N DQS1N M_CHA_DQS1# 10 NC/DQS11N DQS1N M_CHA_DQS1# 10 GND0 GND28
134 7 134 7 1% 1% 241
10 M_CHA_DM1 M_CHA_DQS0 10 10 M_CHA_DM1 M_CHA_DQS0 10

2
DM1/DQS10P DQS0P DM1/DQS10P DQS0P DIMM_CA_VREF_A NP_NC1
135 NC/DQS10N DQS0N 6 M_CHA_DQS0# 10 135 NC/DQS10N DQS0N 6 M_CHA_DQS0# 10 67 VREFCA NP_NC2 242
A 125 125 243 GND A
10 M_CHA_DM0 DM0/DQS9P 10 M_CHA_DM0 DM0/DQS9P NP_NC3
126 126 DIMM_VREF_A 1 236
NC/DQS9N NC/DQS9N 15,18 DIMM_VREF_A VREFDQ VDDSPD
10 M_CHA_DQS8 43 NC/DQS8P 10 M_CHA_DQS8 43 NC/DQS8P
10 M_CHA_DQS8# 42 NC/DQS8N RESERVED 79 10 M_CHA_DQS8# 42 NC/DQS8N RESERVED 79 DDR3_DIMM_240P

1
1
PEGATRON
I DT-MB RESTRICTED SECRET

1
NOTE: 198 FREE1 NOTE: 198 FREE1 I I
187 68 187 68 D3R3 D3R4 D3CB7 D3CB8
FREE2 NC/PAR_IN FREE2 NC/PAR_IN
For ECC DIMM 49 53 For ECC DIMM 49 53 1K 1K 2.2UF/10V 1UF/6.3V Title : DDR3 CHANNEL A

2
FREE3 NC/ERR_OUT FREE3 NC/ERR_OUT 1% 1%
48 167 48 167 X5R 10% X5R 10%

2
2

FREE4 NC/TEST4 FREE4 NC/TEST4


I I Pegatron Corp. Engineer: Vic_Chen
DDR3_DIMM_240P DDR3_DIMM_240P Size Project Name Rev
GND
GND I GND I GND GND GND A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 16 of 68
5 4 3 2 1
5 4 3 2 1

+1P5V_DUAL XMM3B +1P5V_DUAL


78 VDD10 VDD21 197
75 VDD9 VDD20 194
M_CHB_DQ[0..63] 11 72 VDD8 VDD19 191
M_CHB_MAA[0..15] 11 69 VDD7 VDD18 189
66 VDD6 VDD17 186
65 VDD5 VDD16 183
62 VDD4 VDD15 182
60 VDD3 VDD14 179
57 VDD2 VDD13 176
XMM4 COLOR: BLACK +SM_VTT 54 VDD1 VDD12 173
XMM3 COLOR: BLUE 51 VDD0 VDD11 170
GND59 239
D 240 235 D
XMM3A XMM4A 120
VTT2
VTT1
GND58
GND57 232
GND56 229

1
M_CHB_MAA0 188 234 M_CHB_DQ63 M_CHB_MAA0 188 234 M_CHB_DQ63 I I 113 226
M_CHB_MAA1 181 A0 DQ63 M_CHB_DQ62 M_CHB_MAA1 A0 DQ63 M_CHB_DQ62 D3CB9 D3CB10 GND27 GND55
A1 DQ62 233 181 A1 DQ62 233 110 GND26 GND54 223
M_CHB_MAA2 61 228 M_CHB_DQ61 M_CHB_MAA2 61 228 M_CHB_DQ61 4.7UF/6.3V 0.1UF/16V 107 220

2
M_CHB_MAA3 180 A2 DQ61 M_CHB_DQ60 M_CHB_MAA3 A2 DQ61 M_CHB_DQ60 X5R 10% X7R 10% GND25 GND53
A3 DQ60 227 180 A3 DQ60 227 104 GND24 GND52 217
M_CHB_MAA4 59 115 M_CHB_DQ59 M_CHB_MAA4 59 115 M_CHB_DQ59 mx_c0805 101 214
M_CHB_MAA5 58 A4 DQ59 M_CHB_DQ58 M_CHB_MAA5 A4 DQ59 M_CHB_DQ58 GND23 GND51
A5 DQ58 114 58 A5 DQ58 114 98 GND22 GND50 211
M_CHB_MAA6 178 109 M_CHB_DQ57 M_CHB_MAA6 178 109 M_CHB_DQ57 95 208
M_CHB_MAA7 56 A6 DQ57 M_CHB_DQ56 M_CHB_MAA7 A6 DQ57 M_CHB_DQ56 GND21 GND49
A7 DQ56 108 56 A7 DQ56 108 GND GND 92 GND20 GND48 205
M_CHB_MAA8 177 225 M_CHB_DQ55 M_CHB_MAA8 177 225 M_CHB_DQ55 89 202
M_CHB_MAA9 175 A8 DQ55 M_CHB_DQ54 M_CHB_MAA9 A8 DQ55 M_CHB_DQ54 GND19 GND47
A9 DQ54 224 175 A9 DQ54 224 86 GND18 GND46 199
M_CHB_MAA10 70 219 M_CHB_DQ53 M_CHB_MAA10 70 219 M_CHB_DQ53 83 166
M_CHB_MAA11 55 A10/AP DQ53 M_CHB_DQ52 M_CHB_MAA11 A10/AP DQ53 M_CHB_DQ52 GND17 GND45
A11 DQ52 218 55 A11 DQ52 218 80 GND16 GND44 163
M_CHB_MAA12 174 106 M_CHB_DQ51 M_CHB_MAA12 174 106 M_CHB_DQ51 47 160
M_CHB_MAA13 196 A12 DQ51 M_CHB_DQ50 M_CHB_MAA13 A12 DQ51 M_CHB_DQ50 GND15 GND43
A13 DQ50 105 196 A13 DQ50 105 44 GND14 GND42 157
M_CHB_MAA14 172 100 M_CHB_DQ49 M_CHB_MAA14 172 100 M_CHB_DQ49 41 154
NOTE: M_CHB_MAA15 171 A14 DQ49
99 M_CHB_DQ48 NOTE: M_CHB_MAA15 171
A14 DQ49
99 M_CHB_DQ48 GND 38
GND13 GND41
151
A15 DQ48 M_CHB_DQ47 A15 DQ48 M_CHB_DQ47 GND12 GND40
Check clock source if CPU DQ47 216 Check clock source if CPU DQ47 216 35 GND11 GND39 148
215 M_CHB_DQ46 215 M_CHB_DQ46 32 145
implemented DQ46
210 M_CHB_DQ45 implemented DQ46
210 M_CHB_DQ45 29
GND10 GND38
142
DQ45 M_CHB_DQ44 DQ45 M_CHB_DQ44 GND9 GND37
11 M_CHB_CLK1 63 CK1P/NU DQ44 209 11 M_CHB_CLK3 63 CK1P/NU DQ44 209 26 GND8 GND36 139
64 97 M_CHB_DQ43 64 97 M_CHB_DQ43 23 136
11 M_CHB_CLK1# CK1N/NU DQ43 11 M_CHB_CLK3# CK1N/NU DQ43 GND7 GND35
184 96 M_CHB_DQ42 184 96 M_CHB_DQ42 20 133
11 M_CHB_CLK0 CK0P DQ42 11 M_CHB_CLK2 CK0P DQ42 GND6 GND34
185 91 M_CHB_DQ41 185 91 M_CHB_DQ41 17 130
11 M_CHB_CLK0# CK0N DQ41 11 M_CHB_CLK2# CK0N DQ41 GND5 GND33
90 M_CHB_DQ40 90 M_CHB_DQ40 14 127
DQ40 M_CHB_DQ39 DQ40 M_CHB_DQ39 GND4 GND32
DQ39 207 DQ39 207 11 GND3 GND31 124
206 M_CHB_DQ38 206 M_CHB_DQ38 8 121
C DQ38 M_CHB_DQ37 DQ38 M_CHB_DQ37 GND2 GND30 C
11 M_CHB_CS#1 76 CS1# DQ37 201 11 M_CHB_CS#3 76 CS1# DQ37 201 5 GND1 GND29 119
193 200 M_CHB_DQ36 193 200 M_CHB_DQ36 2 116 +3P3V
11 M_CHB_CS#0 CS0# DQ36 11 M_CHB_CS#2 CS0# DQ36 GND0 GND28
88 M_CHB_DQ35 88 M_CHB_DQ35 241
DQ35 M_CHB_DQ34 DQ35 M_CHB_DQ34 DIMM_CA_VREF_B NP_NC1
11 M_CHB_CKE1 169 CKE1 DQ34 87 11 M_CHB_CKE3 169 CKE1 DQ34 87 67 VREFCA NP_NC2 242
50 82 M_CHB_DQ33 50 82 M_CHB_DQ33 243 GND
11 M_CHB_CKE0 CKE0 DQ33 M_CHB_DQ32 11 M_CHB_CKE2 CKE0 DQ33 M_CHB_DQ32 DIMM_VREF_B NP_NC3
DQ32 81 DQ32 81 1 VREFDQ VDDSPD 236
52 156 M_CHB_DQ31 52 156 M_CHB_DQ31
11 M_CHB_BA2 BA2 DQ31 M_CHB_DQ30 11 M_CHB_BA2 BA2 DQ31 M_CHB_DQ30
11 M_CHB_BA1 190 BA1 DQ30 155 11 M_CHB_BA1 190 BA1 DQ30 155 DDR3_DIMM_240P

1
71 150 M_CHB_DQ29 71 150 M_CHB_DQ29 I I
11 M_CHB_BA0 BA0 DQ29 M_CHB_DQ28 11 M_CHB_BA0 BA0 DQ29 M_CHB_DQ28 D3CB11 D3CB12 +1P5V_DUAL I +1P5V_DUAL
149 149
238
DQ28
37 M_CHB_DQ27 238
DQ28
37 M_CHB_DQ27 0.1UF/16V 0.1UF/16V XMM4B

2
8,16,49,57 SMB_DATA_M SDA DQ27 M_CHB_DQ26 8,16,49,57 SMB_DATA_M SDA DQ27 M_CHB_DQ26 X7R 10% X7R 10%
8,16,49,57 SMB_CLK_M 118 SCL DQ26 36 8,16,49,57 SMB_CLK_M 118 SCL DQ26 36 78 VDD10 VDD21 197
31 M_CHB_DQ25 31 M_CHB_DQ25 75 194
11 MB_ECC_CB[0..7] DQ25 11 MB_ECC_CB[0..7] DQ25 VDD9 VDD20
MB_ECC_CB7 165 30 M_CHB_DQ24 MB_ECC_CB7 165 30 M_CHB_DQ24 72 191
MB_ECC_CB6 CB7 DQ24 M_CHB_DQ23 MB_ECC_CB6 CB7 DQ24 M_CHB_DQ23 VDD8 VDD19
NOTE: 164 CB6 DQ23 147 NOTE: 164 CB6 DQ23 147 69 VDD7 VDD18 189
MB_ECC_CB5 159 146 M_CHB_DQ22 MB_ECC_CB5 159 146 M_CHB_DQ22 GND GND 66 186
MB_ECC_CB4 CB5 DQ22 M_CHB_DQ21 MB_ECC_CB4 CB5 DQ22 M_CHB_DQ21 VDD6 VDD17
For ECC DIMM 158 CB4 DQ21 141 For ECC DIMM 158 CB4 DQ21 141 65 VDD5 VDD16 183
MB_ECC_CB3 46 140 M_CHB_DQ20 MB_ECC_CB3 46 140 M_CHB_DQ20 62 182
MB_ECC_CB2 CB3 DQ20 M_CHB_DQ19 MB_ECC_CB2 CB3 DQ20 M_CHB_DQ19 VDD4 VDD15
45 CB2 DQ19 28 45 CB2 DQ19 28 60 VDD3 VDD14 179
MB_ECC_CB1 40 27 M_CHB_DQ18 MB_ECC_CB1 40 27 M_CHB_DQ18 57 176
MB_ECC_CB0 CB1 DQ18 M_CHB_DQ17 MB_ECC_CB0 CB1 DQ18 M_CHB_DQ17 +SM_VTT VDD2 VDD13
39 CB0 DQ17 22 39 CB0 DQ17 22 54 VDD1 VDD12 173
+3P3V 21 M_CHB_DQ16 +3P3V 21 M_CHB_DQ16 51 170
DQ16 M_CHB_DQ15 DQ16 M_CHB_DQ15 VDD0 VDD11
DQ15 138 DQ15 138 GND59 239
237 137 M_CHB_DQ14 237 137 M_CHB_DQ14 240 235
SA1 DQ14 M_CHB_DQ13 SA1 DQ14 M_CHB_DQ13 VTT2 GND58
117 SA0 DQ13 132 117 SA0 DQ13 132 120 VTT1 GND57 232
131 M_CHB_DQ12 131 M_CHB_DQ12 229
DQ12 DQ12 GND56

1
1
19 M_CHB_DQ11 19 M_CHB_DQ11 I I 113 226
DQ11 M_CHB_DQ10 DQ11 M_CHB_DQ10 D3CB13 D3CB14 GND27 GND55
DQ10 18 DQ10 18 110 GND26 GND54 223
GND 13 M_CHB_DQ9 13 M_CHB_DQ9 4.7UF/6.3V 0.1UF/16V 107 220

2
2
B DQ9 M_CHB_DQ8 DQ9 M_CHB_DQ8 X5R 10% X7R 10% GND25 GND53 B
11 M_CHB_W E# 73 WE# DQ8 12 11 M_CHB_W E# 73 WE# DQ8 12 104 GND24 GND52 217
192 129 M_CHB_DQ7 192 129 M_CHB_DQ7 mx_c0805 101 214
11 M_CHB_RAS# RAS# DQ7 11 M_CHB_RAS# RAS# DQ7 GND23 GND51
74 128 M_CHB_DQ6 74 128 M_CHB_DQ6 98 211
11 M_CHB_CAS# CAS# DQ6 11 M_CHB_CAS# CAS# DQ6 GND22 GND50
123 M_CHB_DQ5 123 M_CHB_DQ5 95 208
DQ5 M_CHB_DQ4 DQ5 M_CHB_DQ4 GND21 GND49
11 M_CHB_ODT1 77 ODT1 DQ4 122 11 M_CHB_ODT3 77 ODT1 DQ4 122 GND GND 92 GND20 GND48 205
195 10 M_CHB_DQ3 195 10 M_CHB_DQ3 89 202
11 M_CHB_ODT0 ODT0 DQ3 11 M_CHB_ODT2 ODT0 DQ3 GND19 GND47
9 M_CHB_DQ2 9 M_CHB_DQ2 86 199
DQ2 M_CHB_DQ1 DQ2 M_CHB_DQ1 GND18 GND46
DQ1 4 DQ1 4 83 GND17 GND45 166
168 3 M_CHB_DQ0 168 3 M_CHB_DQ0 80 163
10,16 DDR3_DRAMRST# RESET# DQ0 10,16 DDR3_DRAMRST# RESET# DQ0 GND16 GND44
47 GND15 GND43 160
44 GND14 GND42 157
161 DM8/DQS17P DQS7P 112 M_CHB_DQS7 11 161 DM8/DQS17P DQS7P 112 M_CHB_DQS7 11 41 GND13 GND41 154
162 NC/DQS17N DQS7N 111 M_CHB_DQS7# 11 162 NC/DQS17N DQS7N 111 M_CHB_DQS7# 11 GND 38 GND12 GND40 151
11 M_CHB_DM7 230 DM7/DQS16P DQS6P 103 M_CHB_DQS6 11 11 M_CHB_DM7 230 DM7/DQS16P DQS6P 103 M_CHB_DQS6 11 35 GND11 GND39 148
231 NC/DQS16N DQS6N 102 M_CHB_DQS6# 11 231 NC/DQS16N DQS6N 102 M_CHB_DQS6# 11 32 GND10 GND38 145
11 M_CHB_DM6 221 DM6/DQS15P DQS5P 94 M_CHB_DQS5 11 11 M_CHB_DM6 221 DM6/DQS15P DQS5P 94 M_CHB_DQS5 11 29 GND9 GND37 142
222 NC/DQS15N DQS5N 93 M_CHB_DQS5# 11 222 NC/DQS15N DQS5N 93 M_CHB_DQS5# 11 26 GND8 GND36 139
212 85 212 85 +1P5V_DUAL +1P5V_DUAL 23 136
11 M_CHB_DM5 DM5/DQS14P DQS4P M_CHB_DQS4 11 11 M_CHB_DM5 DM5/DQS14P DQS4P M_CHB_DQS4 11 GND7 GND35
213 NC/DQS14N DQS4N 84 M_CHB_DQS4# 11 213 NC/DQS14N DQS4N 84 M_CHB_DQS4# 11 20 GND6 GND34 133
11 M_CHB_DM4 203 DM4/DQS13P DQS3P 34 M_CHB_DQS3 11 11 M_CHB_DM4 203 DM4/DQS13P DQS3P 34 M_CHB_DQS3 11 17 GND5 GND33 130
204 NC/DQS13N DQS3N 33 M_CHB_DQS3# 11 204 NC/DQS13N DQS3N 33 M_CHB_DQS3# 11 14 GND4 GND32 127

1
11 M_CHB_DM3 152 DM3/DQS12P DQS2P 25 M_CHB_DQS2 11 11 M_CHB_DM3 152 DM3/DQS12P DQS2P 25 M_CHB_DQS2 11 11 GND3 GND31 124
153 NC/DQS12N DQS2N 24 M_CHB_DQS2# 11 153 NC/DQS12N DQS2N 24 M_CHB_DQS2# 11 I I 8 GND2 GND30 121
143 16 143 16 D3R5 D3R6 5 119
11 M_CHB_DM2 DM2/DQS11P DQS1P M_CHB_DQS1 11 11 M_CHB_DM2 DM2/DQS11P DQS1P M_CHB_DQS1 11 GND1 GND29
144 15 144 15 1K 1K 2 116 +3P3V
NC/DQS11N DQS1N M_CHB_DQS1# 11 NC/DQS11N DQS1N M_CHB_DQS1# 11 GND0 GND28
134 7 134 7 1% 1% 241
11 M_CHB_DM1 M_CHB_DQS0 11 11 M_CHB_DM1 M_CHB_DQS0 11

2
DM1/DQS10P DQS0P DM1/DQS10P DQS0P DIMM_CA_VREF_B NP_NC1
135 NC/DQS10N DQS0N 6 M_CHB_DQS0# 11 135 NC/DQS10N DQS0N 6 M_CHB_DQS0# 11 67 VREFCA NP_NC2 242
125 125 243 GND
11 M_CHB_DM0 DM0/DQS9P 11 M_CHB_DM0 DM0/DQS9P NP_NC3
A 126 126 DIMM_VREF_B 1 236 A
NC/DQS9N NC/DQS9N 15,18 DIMM_VREF_B VREFDQ VDDSPD
11 M_CHB_DQS8 43 NC/DQS8P 11 M_CHB_DQS8 43 NC/DQS8P
11 M_CHB_DQS8# 42 NC/DQS8N RESERVED 79 11 M_CHB_DQS8# 42 NC/DQS8N RESERVED 79 DDR3_DIMM_240P

1
I

1
1
198
NOTE: 198
187
FREE1
68
NOTE: 187
FREE1
68
I
D3R7
I
D3R8 D3CB15 D3CB16 PEGATRON DT-MB RESTRICTED SECRET
FREE2 NC/PAR_IN FREE2 NC/PAR_IN 1K 1K
For ECC DIMM 49 53 For ECC DIMM 49 53 2.2UF/10V 1UF/6.3V
Title : DDR3 CHANNEL B

2
2
FREE3 NC/ERR_OUT FREE3 NC/ERR_OUT 1% 1%
48 167 48 167 X5R 10% X5R 10%
2

2
FREE4 NC/TEST4 FREE4 NC/TEST4
I I
Pegatron Corp. Engineer: Vic_Chen
DDR3_DIMM_240P DDR3_DIMM_240P Size Project Name
GND GND GND GND GND GND Rev
I I
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 17 of 68
5 4 3 2 1
5 4 3 2 1

+5VSB

+1P5V_DUAL

1
NI
D3C4
+3P3VSB NI U5_OUT1 1UF/16V

2
NI D3R17 NI X7R 10%
U3 12.1K 1% U5 NI
1 6 1 2 U3RW 3 A+ GND D3R23 D3R25
VDD RH + VCC 8
2 GND RW 5 1 1 2.2 2 U5_1 NI 1 0 2 DIMM_VREF_A 15,16
19,38,39,40,41,49,50 SMB_CLK_R NI 1 0 2 D3R9 U3SCL 3 SCL SDA 4 2 A- - AO

1
D NI NI D

1
ISL90728W IE627Z-TK D3R19 D3C1 5 B+ + NI NI
NI 1 0 2 D3R10 U3SDA 12.1K 10PF/50V BO 7 D3R21 D3C9
19,38,39,40,41,49,50 SMB_DATA_R
1% NPO 5% 6 B- - GND 4 1K 1UF/16V

2
+1P5V_DUAL X7R 10%

2
+3P3VSB NI LM358
NI D3R18
U4 GND GND 12.1K 1% NI
1 6 1 2 GND D3R24 GND D3R26
VDD RH U4RW U5_OUT2
2 GND RW 5 1 2.2 2 U5_2 NI 1 0 2 DIMM_VREF_B 15,17
NI 1 0 2 D3R11 U4SCL 3 4
19,38,39,40,41,49,50 SMB_CLK_R SCL SDA

1
NI NI

1
ISL90728W IE627Z-TK D3R20 D3C7 NI NI
NI 1 0 2 D3R12 U4SDA 12.1K 10PF/50V D3R22 D3C10
19,38,39,40,41,49,50 SMB_DATA_R
1% NPO 5% 1K 1UF/16V

2
X7R 10%

2
1

1
NI NI
D3C11 D3C12
0.1UF/16V 0.1UF/16V GND GND

2
X7R 10% X7R 10% GND GND GND
+1P5V_DUAL

GND GND GND


1

1
C I I I I I I I I C
D3CB33 D3CB34 D3CB35 D3CB36 D3CB37 D3CB38 D3CB39 D3CB40
1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V
2

2
mx_c0603 mx_c0603 mx_c0603 mx_c0603 mx_c0603 mx_c0603 mx_c0603 mx_c0603

GND GND GND GND GND GND GND GND


1

1
1

1
I I I I I I I I NI
D3CB41 D3CB42 D3CB43 D3CB44 D3CB45 D3CB46 D3CB47 D3CB48 D3CB49
1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 4.7UF/6.3V
2

2
2

2
mx_c0603 mx_c0603 mx_c0603 mx_c0603 mx_c0603 mx_c0603 mx_c0603 mx_c0603 X5R 10%
mx_c0805

GND GND GND GND GND GND GND GND GND


1
1

B B
+ NI + + + NI
D3CE3 I I D3CE6
680UF/4V D3CE4 D3CE5 680UF/4V
1800UF/6.3V 1800UF/6.3V
2
2

GND GND GND GND

IP 1.00
Change
NOTE:
DIMM Placement for different platform

DIMM DIMM
2 1 4 3 1 2 3 4
LGA 775
A A

LGA1160
PEGATRON DT-MB RESTRICTED SECRET
Eaglelake
Title : DDR3 DECOUPLING
Pegatron Corp. Engineer: Vic_Chen
CH A CH B CH A CH B Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 18 of 68
5 4 3 2 1
5 4 3 2 1

P55 ES2: 0200-006T000


I
U1A

40,41 PCH_PCIRST# AH10 PCIRST# C/BE0# AV3 C/BE0# 40,41


IPU AH11 AY6
40,41 PME# PME# C/BE1# C/BE1# 40,41
AP6 AP5
Strap 40,41
40,41
PAR
DEVSEL# AT6
PAR
DEVSEL#
C/BE2#
C/BE3# AW10
C/BE2#
C/BE3#
40,41
40,41
D
(GNT0#~GNT3# have IPU) 24 CK_33M_PCH AL11
AP7
CLKIN_PCILOOPBACK
D
40,41 IRDY# IRDY#
40,41 SERR# AV6 SERR#
0 TOP Block SWAP 40,41 STOP# AN8 STOP#
GNT3# 40,41 PLOCK# AK12
AL6
PLOCK#
40,41 TRDY# TRDY#
1 Normal(Default) 40,41 PERR# AT4 PERR#
40,41 FRAME# AL7 FRAME#
A_D[0..31] 40,41
ESI mode
A_D0
0 (Server Only) PCH_GNT3 IPU AM3 AD0 AT9
A_D1
GNT2# PCH_GNT2 IPU BA9 GNT3#/GPIO55 AD1 AP11
AU6 A_D2
GNT2#/GPIO53 AD2
1 DMI(Default) 41 GNT1#
PCH_GNT1 IPU AK6
GNT1#/GPIO51 AD3 AY10 A_D3
IPU AK11 AP9 A_D4
40 GNT0# GNT0# AD4 A_D5
AD5 AV8
A_D6
GNT1# GNT0# BOOT BIOS AD6 AR9

1
AV7 A_D7
AD7 A_D8
1 0 RESERVED NI
SR1
NI
SR2
NI
SR9
NI
SR40 AD8 AW9
AR3 A_D9
1K 1K 1K 1K AD9 A_D10
0 1 PCI PCI AD10 AW7
AR8 A_D11

2
AD11 A_D12
1 1 SPI AD12 AU3
AP2 A_D13
AD13 A_D14
0 0 LPC GND GND GND GND AD14 AU1
AN3 A_D15
AD15 A_D16
AD16 AM2
AH8 AM11 A_D17
41 REQ3# REQ3#/GPIO54 AD17
AY4 AM4 A_D18
41 REQ2# REQ2#/GPIO52 AD18
AW5 AY8 A_D19
41 REQ1# REQ1#/GPIO50 AD19
C AP4 AL10 A_D20 C
40,41 REQ0# REQ0# AD20
AT5 A_D21
AD21 A_D22
AD22 AL2
AT2 A_D23
AD23 A_D24
40,41 INTA# AT8 PIRQA# AD24 AL4
AR4 AV10 A_D25
40,41 INTB# PIRQB# AD25
AT11 AL9 A_D26
40,41 INTC# PIRQC# AD26
BA5 AN7 A_D27
40,41 INTD# PIRQD# AD27
AU8 AK7 A_D28
41 INTE# PIRQE#/GPIO2 AD28
+3P3VSB +3P3VSB +3P3VSB +3P3VSB +3P3VSB +3P3VSB AH7 AN6 A_D29 +3P3VSB +3P3VSB +3P3VSB
41 INTF# PIRQF#/GPIO3 AD29
AP12 AH12 A_D30
41 INTG# PIRQG#/GPIO4 AD30
AW4 AN11 A_D31
PIRQH#/GPIO5 AD31
1

1
1

I I I I I I I I I
SR154 SR155 SR152 SR153 SR131 SR132 SR3 SR4 SR5
10K 10K 10K
2.2K 2.2K 2.2K 2.2K 2.2K 2.2K SMBUS
2

2
2

AV32 AL31 SMBALERT#


18,38,39,40,41,49,50 SMB_CLK_R SMBCLK SMBALERT#/GPIO11
18,38,39,40,41,49,50 SMB_DATA_R AM31 SMBDATA

AW33 BA33 SML0ALERT#


36 SML0_LAN_CLK SML0CLK SML0ALERT#/GPIO60
36 SML0_LAN_DATA AT34 SML0DATA

AY32 SML1ALERT#
SML1ALERT#/GPIO74
B PCH_SML1CLK B
AV31 SML1CLK/GPIO58
PCH_SML1DATA AR31 +3P3V_ME
SML1DATA/GPIO75
Strap
1

1
1

I I I I I I
SC6 SC7 SC25 SC26 SC4 SC5 Disable ITPM

1
150PF/50V 150PF/50V 150PF/50V 150PF/50V
150PF/50V 150PF/50V
SPI_MOSI 0 (Default)
2

2
2

NPO 5% NPO 5% NPO 5% NPO 5% NPO 5% NPO 5% NI


SR8
1K
(IPD)
RTC SPI 1 Enable ITPM
GND GND GND GND GND GND

2
AK24 T32 ICH_SPI_CS1# 1 ST26 TPC26b NOBOM
53 RTCRST# RTCRST# SPI_CS1#
V32 ICH_SPI_CS# SPI_CS# 49
SPI_CS0# IPD ICH_SPI_MOSI
53 SRTCRST# AP28 SRTCRST# SPI_MOSI T34 SPI_MOSI 49
V30 IPU
SPI_MISO SPI_MISO 49
PCH_RTCX1 AW30 V31 ICH_SPI_CLK SPI_CLK 49
RTCX1 SPI_CLK
CRB R1.0 (page.39) suggests that don't
I PCH_RTCX2 BA30
change it to 0402 package type RTCX2

1
SR13 MX_R0603
10MOhm NI
1 2 SR14
1K
I

2
I Y5 NOBOM
32.768Khz SR15
XY5 11 22 Y5_R 1 2 0
Crystal Holder GND GND IBEXPEAK Rev 1.0
3 4 GND
3

4
1

A A
SC1 SC2
15PF/50V 15PF/50V
2

NPO 5% NPO 5%
I I PEGATRON DT-MB RESTRICTED SECRET
GND GND GND Title : INTEL_PCH - 1
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: Thursday, April 08, 2010 Sheet 19 of 68
5 4 3 2 1
5 4 3 2 1

I
NOTE:
U1B USB[0:13] have a internal pull down resistor
12 DMI_TXN0 A19 DMI0RXN USBP0N AW25 USBN0 37
D 12 DMI_TXP0 B18 DMI0RXP USBP0P AY25 USBP0 37 D
12 DMI_RXN0 J22 DMI0TXN
12 DMI_RXP0 H22 DMI0TXP USBP1N BA23 USBN1 37
USBP1P AY24 USBP1 37
12 DMI_TXN1 B20 DMI1RXN
12 DMI_TXP1 C19 DMI1RXP USBP2N AW23 USBN2 35
12 DMI_RXN1 G22 DMI1TXN USBP2P AY22 USBP2 35
12 DMI_RXP1 F22 DMI1TXP

DMI
USBP3N AR22 USBN3 35
12 DMI_TXN2 E20 DMI2RXN USBP3P AP22 USBP3 35
12 DMI_TXP2 D20 DMI2RXP
12 DMI_RXN2 H24 DMI2TXN USBP4N AV21 USBN4 34
12 DMI_RXP2 G24 DMI2TXP USBP4P AV22 USBP4 34

12 DMI_TXN3 G18 DMI3RXN USBP5N AY20 USBN5 34


12 DMI_TXP3 H18 DMI3RXP USBP5P AW21 USBP5 34
12 DMI_RXN3 L24 DMI3TXN
12 DMI_RXP3 K24 DMI3TXP USBP6N AK20
USBP6P AL20

I USBP7N AV20
+1P05V_FILTER SR16 AW19
49.9 USBP7P
1% DMICOMP D21 BA19
DMI_IRCOMP USBP8N USBN8 45
1 2 C21 DMI_ZCOMP USBP8P AY18 USBP8 45

8 CK_100M_PCH_DMI# H20 CLKIN_DMI_N USBP9N AM20 USBN9 45


8 CK_100M_PCH_DMI G20 CLKIN_DMI_P USBP9P AN20 USBP9 45
C AV17 C
USBP10N USBN10 45
USBP10P AV18 USBP10 45

USB
USBP11N AR20 USBN11 45
USBP11P AT20 USBP11 45

USBP12N AK18 USBN12 46


USBP12P AL18 USBP12 46
D15 PERn1 USBP13N AY17 USBN13 46
C16 BA16 +3P3VSB +3P3VSB
PERp1 USBP13P USBP13 46
D18 PETn1
D17 PETp1

PCI-E
B17 AT31 PCH_OC#01
PERn2 OC0#/GPIO59 OC01# 37

1
A16 AT30 PCH_OC#23
PERp2 OC1#/GPIO40 OC23# 35
H16 AK28 PCH_OC#45 I I
PETn2 OC2#/GPIO41 OC45# 34
G16 AP30 PCH_OC#67 10K 10K
PETp2 OC3#/GPIO42 OC67# 46
AP31 PCH_OC#89 SR116 SR125
OC4#/GPIO43 OC89# 45
B15 AL28 PCH_OC#1011
OC1011# 45

2
PERn3 OC5#/GPIO9 OC#6/GPIO10
C14 PERp3 OC6#/GPIO10 AL30
H14 AM30 OC7#/GPIO14
PETn3 OC7#/GPIO14
G14 PETp3
D14 PERn4
D13 PERp4
K14 PETn4
L14 PETp4
B B
39 PE1_RXN1 C12 PERn5 USBRBIAS# AY15
B13 AV15 USBRBIAS_PCH
39 PE1_RXP1 PERp5 USBRBIAS
PORT1 TO PCI_EXP_J31 39 PE1_TXN1 H12 PETn5
39 PE1_TXP1 G12 PETp5

1
36 LAN_RXN1 D8 PERn6 I
PORT6 TO PCI_EXP_LAN1 36 LAN_RXP1 C9 PERp6
SR25 THE TRACES TOGETHER CLOSE TO PINS WITH LENGTH NO
I SC9 2 1 0.1UF/16V X7R 10% PCH_LAN_TXN_C G11 22.6
36 LAN_TXN1
I SC10 2 1 0.1UF/16V X7R 10% PCH_LAN_TXP_C H11
PETn6 1% LONGER THAN 200 MILS TO RESISTOR

2
36 LAN_TXP1 PETp6
NOBOM TPC26b ST9 1 TP_PCH_PERn7 A12
NOBOM TPC26b ST10 TP_PCH_PERp7 PERn7
1 B11 PERp7
NOBOM TPC26b ST11 1 TP_PCH_PETn7 D11
NOBOM TPC26b ST12 TP_PCH_PETp7 PETn7
1 D10 PETp7 GND

NOBOM TPC26b ST13 1 TP_PCH_C7 C7


NOBOM TPC26b ST14 TP_PCH_B8 PERn8
1 B8 PERp8
NOBOM TPC26b ST15 TP_PCH_K12
NOTE: FOR H55 USB PORT 6 AND 7 DISABLED NOBOM TPC26b ST16
1
1 TP_PCH_J12
K12
J12
PETn8
PETp8
SKU
Feature Set IBEXPEAK Rev 1.0
Q57 H57 H55 P55 P57

PCI Express 2.0 8 8 6 8 8


A A
USB 2.0 14 14 12 14 14
SATA 6 6 6 6 6 PEGATRON DT-MB RESTRICTED SECRET
HDMI/DVI/VGA/SDVO/DisplayPort YES YES YES NO NO Title : INTEL_PCH - 2
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 20 of 68
5 4 3 2 1
5 4 3 2 1

NOTE:
Install SR32, SR68, NI SR26 if M3 support
I
Install SR26, SR68, NI SR32 if no M3 support U1C

AK35 TP18 SATA0RXN W41 SATA_RXN0 46


66 MEPW ROK NI/AMTI SR32 1 0 2 NOBOM TPC26b ST18 1 TP_PCH_AN36 AN36 TP19 SATA0RXP V40 SATA_RXP0 46
NOBOM TPC26b ST19 1 TP_PCH_AU39 AU39 U38
TP20 SATA0TXN SATA_TXN0 46
SATA0TXP V38 SATA_TXP0 46
D 22,54 PW ROK I/AMTNI SR26 1 0 2 D
SATA1RXN Y38 SATA_RXN1 46
SATA1RXP Y37 SATA_RXP1 46
I SR68 1 0 2 PCH_MEPW ROK AL33 AB36
22 PCH_LANRST# MEPWROK SATA1TXN SATA_TXN1 46
SATA1TXP AB35 SATA_TXP1 46

1
NI
SC15 CLINK AD36
0.1UF/16V SATA2RXN SATA_RXN2 46
AD35 SATA_RXP2 46

2
Y5V +80-20% SATA2RXP
SATA2TXN AB31 SATA_TXN2 46
mx_c0402 FAN AB32
SATA2TXP SATA_TXP2 46
GND
+3P3V NOBOM TPC26b ST35 1 BA12 AC41
NOBOM TPC26b ST49 PWM0 SATA3RXN SATA_RXN3 46
1 AR12 PWM1 SATA3RXP AC39 SATA_RXP3 46
NOBOM TPC26b ST27 1 AW12 AB37
PWM2 SATA3TXN SATA_TXN3 46
NOBOM TPC26b ST33 1 AY13 AB38
PWM3 SATA3TXP SATA_TXP3 46

SATA
I SR51 1 2 8.2K AW11 AF41
SR67 8.2K TACH0/GPIO17 SATA4RXN SATA_RXN4 46
I 1 2 AL14 TACH1/GPIO1 SATA4RXP AE40 SATA_RXP4 46
I SR74 1 2 8.2K AV11 AD38
TACH2/GPIO6 SATA4TXN SATA_TXN4 46
I SR80 1 2 8.2K AY11 AE38
TACH3/GPIO7 SATA4TXP SATA_TXP4 46

SATA5RXN AF35 SATA_RXN5 35


AF34
SATA5RXP
SATA5TXN AD33
SATA_RXP5
SATA_TXN5
35
35
Port5 is for eSATA
SST AN31 AD32
SST SATA5TXP SATA_TXP5 35

1
NI
SC13
C 220PF/50V C

2
X7R 10%

+3P3V
GPIO
+3P3V GND
AJ37 SATA0GP I SR28 2 1 10K
SATA0GP/GPIO21 SATA1GP SR34 10K
SATA1GP/GPIO19 AH38 I 2 1
I SR29 1 2 10K PCH_SGP22 AN41 AK39 SATA2GP I SR33 2 1 10K +1P05V_FILTER +3P3V
SR31 4.7K SCLOCK/GPIO22 SATA2GP/GPIO36 SATA3GP SR35 10K
I 1 2 AM38 SLOAD/GPIO38 SATA3GP/GPIO37 AR38 I 2 1
I SR30 1 2 10K PCH_SGP39 AL39 AH39 SATA4GP I SR37 2 1 10K
SDATAOUT0/GPIO39 SATA4GP/GPIO16

1
I SR36 1 2 10K PCH_SGP40 AG38 AG40 SATA5GP I SR38 2 1 10K
SDATAOUT1/GPIO48 SATA5GP/GPIO49
I I
SR41 SR39
37.4Ohm 10K
NOBOM V34 TP_PCH_V34 1 ST22 TPC26b NOBOM 1%

2
MFG1 TP8
PEGATRON_MFG
MFGIN 3 1 AN39
GPI1 NP_NC1 SATALED# HD_LED# 52
4 GPI2 NP_NC2 2
6 GND NP_NC3 5
T39 SATARBIAS_PCH
NOTE: EDS_Rev2_1 add H55 AHCI support. SATAICOMPI
T41
NOTE:
SATAICOMPO
THE TRACES TOGETHER CLOSE TO
SKU PINS WITH LENGTH NO LONGER THAN
Feature Set GND Y34
CLKIN_SATA_N/CKSSCD_N CK_100M_PCH_SATA# 8
CLKIN_SATA_P/CKSSCD_P Y35 CK_100M_PCH_SATA 8
200 MILS TO RESISTOR
Q57 H57 H55 P55 P57
B B

LVDS NO NO NO NO NO +3P3V +3P3V +3P3V

1
1

1
PAVP 1.5 YES YES YES NO NO
I I I
FIS Based Port HOST SR42 SR43 SR44
YES YES NO YES YES 10K 10K 10K
Multiplier Support
NOTE:

2
2

2
QST YES YES YES NO YES NOBOM TPC26b ST23 1TP_PCH_AF15 AF15 AG37 INIT3_3V# is reserved
NC1 A20GATE IPU INIT3_3V# A20GATE 47
AR39
INIT3_3V#
AM40
for Strap cpu output
RCIN# RST_KB# 47

1
Braidwood YES YES NO NO YES SERIRQ AL40 SERIRQ 47,50 stronger if low.
THRMTRIP# C38 H_THMTRIP# 13 NI
D36 SR138
PECI PECI 13 1K
Coral Harbor NO NO NO NO YES PMSYNCH C37 PM_SYNC 13

2
AHCI YES YES YES YES YES
GND
NOTE:
Raid 0/1/5/10 YES YES NO YES YES Check if Signal A20GATE, KBDRST#, SERIRQ
IBEXPEAK Rev 1.0 have a PU resistor in SIO side
lgnition ME FW only NO NO NO YES NO

A AT-p YES NO NO NO NO A

iAMT 6.0 YES NO NO NO NO


PEGATRON DT-MB RESTRICTED SECRET
IRPA for Business YES NO NO NO NO
Title : INTEL_PCH - 3
IRPA for Consumer NO YES NO NO NO Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
IRWT NO YES YES NO NO A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 21 of 68
5 4 3 2 1
5 4 3 2 1

SR87 NI for power sequence t237


NOTE: GPIO33 ME update
+3P3V +3P3VSB +3P3VSB +3P3VSB +3P3VSB +3P3VSB +3P3VSB +3P3V +3P3V +3P3VSB
Internal Pull-up in PCH 1-2 OVERRIDEN

1
50 LDRQ1# I I NI I I I I I I I I 2-3 DEFAULT
+3P3V +3P3V NI SR45 SR87 SR58 SR56 SR98 SR139 SR76 SR59 SR62 SR64
SR50 U1D 10K 10K 100K 10K 10K 10K 1K 10K 10K 10K
10K

1
1 2 LDRQ1# IPU AP14

2
LDRQ1#/GPIO23
NI
SR49 AK41 F_AUDIO_DET# 43
10K BMBUSY#/GPIO0
GPIO8 AK30 IPU GP8
D LAD0 IPU AT12 BA35 D
47,50 LAD0 SLP_LAN# 67

2
LAD1 IPU FWH0/LAD0 SLP_LAN#/GPIO29 GP30
47,50 LAD1 AK16 FWH1/LAD1 SUS_PWR_ACK/GPIO30 AT37
LAD2 IPU AL16 AU34 IPMIP-GS ADD
47,50 LAD2 FWH2/LAD2 LAN_PHY_PWR_CTRL/GPIO12 LAN_DISABLE 36
LAD3 IPU AM16 AR16 IPD LPC_PME# 48
47,50 LAD3 FWH3/LAD3 GPIO13
AY36 IPD GP15 I
LDRQ0# GPIO15 ST40 TPC26b NOBOM PASSW ORD_EN# 53
47 LDRQ0#
IPU AL12
LDRQ0# MEM_LED/GPIO24 AR34 GP24 1 E50
AP37 IPU GP27 GPIO33_E50 1
GPIO27
47,50 LFRAME# AR14 FWH4/LFRAME# GPIO28 AV40 IPU 2
AP40 GP31 3
ACPRESENT/GPIO31
GPIO32 AJ40 CLKRUN# 50
LPC GPIO33 AT16 IPU GPIO33 I SR91 1 2 1K mx_r0603 HEADER_1X3P
AT40 PCI_STOP#
STP_PCI#/GPIO34
GPIO57 AL32 SKTOCC_L SKTOCC# 13 GND

1
1

1
IPD +3P3VSB

GP28
42 SDATA_IN0 AV13 HDA_SDIN0 I JE50:23
NOBOM TPC26b ST32 1 IPD AP18 NI NI NI NI NI
Strap NOBOM TPC26b ST31 1 IPD AU13
HDA_SDIN1
HDA_SDIN2
SR65 SR113 SR99 SR61 SR66
NOBOM TPC26b ST28 1 TP_PCH_SDIN3 IPD AN16 10K 10K 10K 10K 10K
HDA_SDIN3

I
I

I
AZ_SDATA_OUT USING CORE POWER
0

2
2

2
1

1
1

1
FOR NAND FLASH MINI_JUMPER
(IPD)

10K

10K

10K

10K
10K

10K
USING EPW POWER +3P3VSB
1 FOR NAND FLASH GND GND GND GND GND Strap
NI 1 1K 2 SR136 AUDIO INTEGRATED CLOCK

SR167

SR187

SR188

SR168
SR189

SR169
AZ_SYNC OnDie PLL VR USE 1K 2 SR137
0 NI 1 GPIO8 0 Chip ENABLE

2
2

2
1.8V SUPPLY
(IPD)
1 OnDie PLL VR USE
1.5V SUPPLY PCIECLKRQ0
(IPU) INTEGRATED CLOCK
AN35 IPU 1
I SR63 1 2 33 HDA_SDO_R IPD AP16 PCIECLKRQ0#/GPIO73
AM39 PCIECLKRQ1 NI
Chip DISABLE
42 SDATA_OUT_1 HDA_SDO PCIECLKRQ1#/GPIO18 0
PCIECLKRQ2#/GPIO20 AP38 PCIECLKRQ2 2 1 LAN_CLKREQ# 36 TLS CONFIDENTIALITY
C SR53 1 2 33 HDA_SYNC_R IPD AU15 PCIECLKRQ3 SR93 C
42 AZ_SYNC_1 I HDA_SYNC PCIECLKRQ3#/GPIO25 AP33
AW37 PCIECLKRQ4
GPIO15 0 DISABLE
PCIECLKRQ4#/GPIO26
42 AZ_BITCLK_1 I SR54 1 2 33 HDA_BITCLK_R IPD AW14
HDA_BCLK PCIECLKRQ5#/GPIO44 AW38 PCIECLKRQ5
PCIECLKRQ6
(IPD) TLS CONFIDENTIALITY
AV36 IPU 1
I SR55 1 2 33 HDA_AZRST#_R
IPD AV14 PCIECLKRQ6#/GPIO45
AP36 PCIECLKRQ7 ENABLE
42 AZ_RST#_1 HDA_RST# PCIECLKRQ7#/GPIO46
PEG_A_CLKRQ#/GPIO47 AV39 PEG_A_CLKRQ OnDie PLL VccVRM
PEG_B_CLKRQ
PEG_B_CLKRQ#/GPIO56 AW35
AR41 GP35 1 ST73
GPIO27 0 DISABLE
SATACLKREQ#/GPIO35
TPC26b (IPU) OnDie PLL VccVRM
1

1
1

1
I
SC8
I
SC22
NI
SC23
NI
SC24 NOBOM I
SR150
I
SR135
I
SR134
I
SR151
NI
SR133
1 ENABLE
10PF/50V 10PF/50V 10PF/50V 10PF/50V 10K 10K 10K 10K 10K Flash descriptor
2

NPO 5% NPO 5% NPO 5% NPO 5% AY31 LAN_RST# 0 overriden


GPIO33

2
2

2
GND GND GND GND Flash descriptor
21 PCH_LANRST#
GND GND GND GND GND
1 in effect
NOTE: AK31 LDCPD#
SUS_STAT#/GPIO61 LPCPD# 50
1

NI NI SUSCLK/GPIO62 AH31 SUS_CLK_C I CKR41 1 2 33 SUS_CLK 50


SR69 SC14
0 1UF/10V
2

1
+3P3VSB +3P3VSB +BATT +3P3V NI NOTE:
2

Install for non-Intel LAN support SR105


0 Just for measure

1
GND GND I I I I

2
SR70 SR71 SR72 SR73
IPU AL34 10K 1K 1M 1K
B JTAG_TMS GND B
AN34

2
IPU JTAG_TDO
AL36 JTAG_TDI
IPD AK33 AT33 PCH_RI#
JTAG_TCK RI# PCH_RI1# 56
IPU AL35 JTAG_RST#
WAKE# AR33 W AKE# 38,39
IPMIP-GS ADD SC35
INTRUDER# AN24 INTRUDER# 52
13,57 CPUPW RGD B38 PROCPWRGD
DRAM_PW ROK_R AW32 AJ38 IPD
13 DRAM_PW ROK DRAMPWROK SPKR SPKR 52
21,54 PW ROK AM24 PWROK
SYSPW ROK AT38
8,59 VRM_PW RGD SYS_PWROK
1
1

+3P3VSB
1

+BATT NI NI I NI
SC3 SR77 SR78 SC35 AK36 IPU
PWRBTN# SB_PW RBTN# 48

1
0.1UF/16V 100K
I
+3P3VSB 10K 100PF/50V
2

1
1

I X7R 10% NPO 5% SR60


2
2

SR79 10K
2

330K
SR81 1% AV35 SLP_S3# 13,48,64,66

2
SLP_S3#
4.7K GND GND GND GND AP35 SLP_S4# 48
2

SLP_S4# TP_SLP_S5# ST30 TPC26b NOBOM


I SLP_S5#/GPIO63 AU36 1
PCH_INTVRMEN AW31 AY34 IPU GPIO72/BATLOW #
1

PCH_PLTRST# INTVRMEN GPIO72


13,36,47,50,57 PLTRST# AV34 PLTRST# SLP_M# AT36 SLP_M# 66,67
8,13,52,57 SYS_RESET# AL38 SYS_RESET#
54 RSMRST# AL24 RSMRST#
1

A A
1

NI NI I AH35 TP_PCH_AH35 1 ST29 TPC26b NOBOM


SR75 SC16 SR82 TP23
1K 100PF/50V 100K IBEXPEAK Rev 1.0
2

NPO 5%
PEGATRON DT-MB RESTRICTED SECRET
2

Strap Strap
Disable intergrated
Disable No-reboot option
Title : INTEL_PCH - 4
GND GND GND 0 1.05V VRM for GbE SPKR 0 Engineer: Vic_Chen
INTVRMEN Pegatron Corp.
(IPD) Size Project Name
1 Enable(Default) 1 Enable No-reboot option Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 22 of 68
5 4 3 2 1
5 4 3 2 1

I
U1E

T12 AD4 VGA_HSYNC_3P3V NI/VGA-I SR88 1 2 22 OHM


TP7 CRT_HSYNC VGA_HSYNC 28
D T13 AD3 VGA_VSYNC_3P3V NI/VGA-I SR83 1 2 22 OHM D
TP6 CRT_VSYNC VGA_VSYNC 28
NOBOM TPC26b ST34 1 TP_PCH_P13 P13 TP5
P12 TP4 CRT_RED AC1 VGA_RED 28
CRT_GREEN AC3 VGA_GREEN 28
CRT_BLUE AB2 VGA_BLUE 28

28 DDCA_CLK AG2 CRT_DDC_CLK CRT_IRTN AB4


28 DDCA_DATA AG4 CRT_DDC_DATA

1
I I I

1
NI NI NI SR89 SR85 SR86
SC17 SC19 SC18 150 150 150
AL22 22PF/50V 22PF/50V 22PF/50V 1% 1% 1%
8 CK_96M_PCH_DREF

2
CLKIN_DOT_96P mx_r0402 mx_r0402 mx_r0402
8 CK_96M_PCH_DREF# AM22

2
CLKIN_DOT_96N

NOTE: GND GND GND GND GND GND GND

NOT INSTALL CKR24,25 PLACED CAPACITOR CLOSE TO PLACED RESISTOR CLOSE TO


for Non-Graphic sku PCH FOR EMI PCH WITHIN 250 MIL LENGTH
AD2 Vss1
AE3 Vss2
AE4 AE2 DACREFSET
Vss3 DAC_IREF

1
PLACED RESISTOR I
GND SR90
CLOSE TO THE PCH 1.02K NOTE:
WITHIN 500 MIL 1% Change SR90 and SR85,86,89 to 0 OHM for non-Graphics SKU,
C C
LENGTH

2
KEEP PU resistor VR14~15 for DDCDATA/CLK

I GND
SR117
1 2 DVI_HPD_R J1 K10
30 DVI_HPD DDPB_HPD DDPB_0P DVI_TMDSB_DATA2 30
DDPB_0N J8 DVI_TMDSB_DATA2# 30
0 Ohm K11
DDPB_1P DVI_TMDSB_DATA1 30
5% DDPB_1N J11 DVI_TMDSB_DATA1# 30
NOBOM TPC26b ST72 1 TP_PCH_DDPBAUXP M1 DDPB_AUXP DDPB_2P H6 DVI_TMDSB_DATA0 30 DVI
1

NOBOM TPC26b ST76 1 TP_PCH_DDPBAUXN L2 F6


DDPB_AUXN DDPB_2N DVI_TMDSB_DATA0# 30
SR119 G4
DDPB_3P DVI_TMDSB_CLK 30
IPMIP-DP for not DVI 1K DDPB_3N H4 DVI_TMDSB_CLK# 30
NI
IPD AB13 M3
2

30 SDVO_CTRL_CLK IPD AB12 SDVO_CTRLCLK SDVO_INTP


30 SDVO_CTRL_DATA SDVO_CTRLDATA SDVO_INTN N4

I N2
SR120 SDVO_STALLP
SDVO_STALLN P3
1 2 GND DP_HPD_R
32 DPB_HPD
+3P3V L6
0 Ohm SDVO_TVCLKINP
SDVO_TVCLKINN L7
5%
1
1

I I
1

SR108 SR109
SR118 2.2K 2.2K J3 E3
B DDPC_HPD DDPC_0P DP_TXP0 32 B
IPMIP-DP for not DP 1K mx_r0402 mx_r0402 F4
DDPC_0N DP_TXN0 32
F2 DP_TXP1 32
2
2

NI DDPC_1P
33 DPC_AUX_DP_MUX L9 G3 DP_TXN1 32
2

DDPC_AUXP DDPC_1N
GND
33 DPC_AUX_DN_MUX L10 DDPC_AUXN DDPC_2P
DDPC_2N
B4
C4
DP_TXP2
DP_TXN2
32
32
Display Port
33 DDPC_CTRL_CLK IPD 10K AB10 DDPC_CTRLCLK DDPC_3P D3 DP_TXP3 32
33 DDPC_CTRL_DATA IPD 15K~40K AB11 DDPC_CTRLDATA DDPC_3N D2 DP_TXN3 32

1K 2 1 SR114 I PD_HPD H2 C5
DDPD_HPD DDPD_0P
DDPD_0N B6
DDPD_1P D6
NOBOM TPC26b ST64 1 TP_PCH_DDPDAUXP K4 D7
GND NOBOM TPC26b ST65 TP_PCH_DDPDAUXN DDPD_AUXP DDPD_1N
1 L4 DDPD_AUXN DDPD_2P F8
DDPD_2N G8
AB7 DDPD_CTRLCLK DDPD_3P F9
AB9 DDPD_CTRLDATA DDPD_3N G9

IBEXPEAK Rev 1.0

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : INTEL_PCH - 5
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 23 of 68
5 4 3 2 1
5 4 3 2 1

I
U1F

12 FDI_TXN0 K30 FDI_RXN0 FDI_FSYNC0 E34 DL_FSYNC_0 12


12 FDI_TXP0 J30 FDI_RXP0 FDI_LSYNC0 C35 DL_LSYNC_0 12
12 FDI_TXN1 H30 FDI_RXN1
12 FDI_TXP1 G30 FDI_RXP1
12 FDI_TXN2 D31 FDI_RXN2
12 FDI_TXP2 D32 FDI_RXP2 FDILINK
12 FDI_TXN3 F31 FDI_RXN3
D 12 FDI_TXP3 G31 FDI_RXP3 D
12 FDI_TXN4 K31 FDI_RXN4 FDI_FSYNC1 E36 DL_FSYNC_1 12
12 FDI_TXP4 J31 FDI_RXP4 FDI_LSYNC1 D35 DL_LSYNC_1 12
12 FDI_TXN5 C30 FDI_RXN5
12 FDI_TXP5 B31 FDI_RXP5
12 FDI_TXN6 A33 FDI_RXN6
12 FDI_TXP6 B32 FDI_RXP6
12 FDI_TXN7 C33 FDI_RXN7
12 FDI_TXP7 B34 FDI_RXP7 FDI_INT B36 DL_INT 12

NVRAM
J34 NV_ALE NV_DQ0/NV_IO0 T33
L35 NV_CLE NV_DQ1/NV_IO1 P35
M32 NV_RB# NV_DQ2/NV_IO2 T31
J36 NV_WR#0_RE# NV_DQ3/NV_IO3 P33
J35 NV_WR#1_RE# NV_DQ4/NV_IO4 M35
M31 NV_WE#_CK0 NV_DQ5/NV_IO5 L33
F38 NV_WE#_CK1 NV_DQ6/NV_IO6 M36
M34
Del ONFI NV_DQ7/NV_IO7
NV_DQ8/NV_IO8 M30
NV_DQ9/NV_IO9 F36
E41 NV_CE#3 NV_DQ10/NV_IO10 H33
P32 NV_CE#2 NV_DQ11/NV_IO11 F37
H35 NV_CE#1 NV_DQ12/NV_IO12 E39
H36 NV_CE#0 NV_DQ13/NV_IO13 G33
C D40 C
NV_DQ14/NV_IO14
P36 NV_DQS0 NV_DQ15/NV_IO15 F33
F40 NV_DQS1
L36 NV_RCOMP

CLKOUT_BCLK0_N/CLKOUT_PCIE8N L38 CK_133M_PCH_OUT# 13


CLKOUT_BCLK0_P/CLKOUT_PCIE8P K38 CK_133M_PCH_OUT 13

8 CK_133M_PCH_IN# Y32 CLKIN_BCLK_N CLKOUT_DMI_N H40 CK_100M_PEG_DMI# 13


8 CK_133M_PCH_IN Y31 CLKIN_BCLK_P CLKOUT_DMI_P J41 CK_100M_PEG_DMI 13
H37 CK_120M_IPL#_R 1 ST41 TPC26b NOBOM
CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P H38 CK_120M_IPL_R 1 ST42 TPC26b NOBOM

T7 TP_CK_100M_SRC7# 1 ST36 TPC26b NOBOM


CLKOUT_PCIE7N TP_CK_100M_SRC7 ST37 TPC26b NOBOM
CLKOUT_PCIE7P T6 1

U4 TP_CK_100M_SRC6# 1 ST38 TPC26b NOBOM


CLKOUT_PCIE6N TP_CK_100M_SRC6 ST39 TPC26b NOBOM
CLKOUT_PCIE6P V4 1

Y8 TP_CK_100M_SRC5# 1 ST48 TPC26b NOBOM


CLKOUT_PCIE5N TP_CK_100M_SRC5 ST62 TPC26b NOBOM
8 CK_14M_PCH AF7 REFCLK14IN CLKOUT_PCIE5P Y9 1

+1P05V_PCH P7 TP_CK_100M_SRC4# 1 ST63 TPC26b NOBOM


CLKOUT_PCIE4N TP_CK_100M_SRC4 ST66 TPC26b NOBOM
CLKOUT_PCIE4P P6 1
B B
1

M9 TP_CK_100M_SRC3# 1 ST74 TPC26b NOBOM


CLKOUT_PCIE3N ST75 TPC26b NOBOM
I CLKOUT_PCIE3P M10 TP_CK_100M_SRC3 1
SR94
90.9 M6
CLKOUT_PCIE2N CK_100M_LAN# 36
1% M7 CK_100M_LAN 36
2

XCLK_RCOMP CLKOUT_PCIE2P
AA3 XCLK_RCOMP
CLKOUT_PCIE1N T10
CLKOUT_PCIE1P T9

XTAL_25M_PCH_IN Y4 V2
XTAL25_IN CLKOUT_PCIE0N CK_100M_PE1# 39
CLKOUT_PCIE0P W1 CK_100M_PE1 39
XTAL_25M_PCH_OUT Y2 XTAL25_OUT
CLKOUT_PEG_A_N Y6 CK_100M_PE16# 38
SR92 Y7
CLKOUT_PEG_A_P CK_100M_PE16 38
1% 1 21MOHM
I V7 TP_CK_100M_PEX16_SL2# 1 ST70 TPC26b NOBOM
CLKOUT_PEG_B_N TP_CK_100M_PEX16_SL2 ST71 TPC26b NOBOM
CLKOUT_PEG_B_P V8 1
Y12 NOBOM
25Mhz SR27 AF6 IPD CKOUT0 I SR47 1 2 39 OHM 5%
1 2 CLKOUT_PCI0 CK_33M_PCH 19
Y10_R 1 2 0 CLKOUT_PCI1 AD7 IPD CKOUT1 I SR46 1 2 39 OHM 5%
CK_33M_SL1 40
GND AF9 IPD CKOUT2 I SR48 1 2 39 OHM 5%
CLKOUT_PCI2 CK_33M_SIO 47
1

NI 3 I AD9 IPD CKOUT3 I SR52 1 2 39 OHM 5%


CLKOUT_PCI3 CK_33M_TPM 50
1

SR6 I I AD12 IPD CKOUT4 I SR57 1 2 39 OHM 5%


CLKOUT_PCI4 CK_33M_SL2 41
0 SC20 SC21
33PF/50V 33PF/50V AD10 IPD TP_CK_33M_14M_0 1 ST43 TPC26b NOBOM
2

NPO 5% NPO 5% CLKOUTFLEX0/GPIO64 TP_CK_33M_14M_1 ST47 TPC26b NOBOM


AK1 IPD 1
2

CLKOUTFLEX1/GPIO65 TP_CK_33M_14M_2 ST45 TPC26b NOBOM


CLKOUTFLEX2/GPIO66 AB6 IPD 1
A AL3 IPD TP_CK_48M_33M_14M 1 ST46 TPC26b NOBOM A
CLKOUTFLEX3/GPIO67
GND GND GND GND
IBEXPEAK Rev 1.0
PEGATRON DT-MB RESTRICTED SECRET
Title : INTEL_PCH - 6
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 24 of 68
5 4 3 2 1
5 4 3 2 1

NOTE:
Internal VRM straping pin:GPIO27
+1P05V_FILTER +1P05V_PCH (page.23)
I
+1P05V_FILTER +1P05V_PCH
U1G SJP1 NOBOM
VccVRM powers VccSATAPLL,
1 2 VccapllEXP, VccFDIPLL, and VccACLK
P15 VccIO1 VccCore1 AE18
SHORTPIN_RECT
P16
N16
VccIO2 VccCore2 AD18
AF19 SJP2 NOBOM
VccSATAPLL, VccAPLLEXP,
VccIO3 VccCore3
1

1
I
SCB39
I
SCB41
I
SCB37
I
SCB38
M16 VccIO4 VccCore4 AE19 I
SCB17
I
SCB5
I
SCB24
I
SCB25
1 2 VccFDIPLL & VccAClk can ne left NC
D P18 VccIO5 VccCore5 AF20 D
10UF/6.3V 10UF/6.3V X5R 10% 1UF/16V N18 AE20 1UF/16V 4.7UF/6.3V 10UF/6.3V 10UF/6.3V SHORTPIN_RECT in on-Die VR enable Mode
2

2
X5R 10% X5R 10% 4.7UF/6.3V X7R 10% VccIO6 VccCore6 X7R 10% X5R 10% X5R 10% SJP3 NOBOM
M18 VccIO7 VccCore7 AD20 X5R 10%
mx_c0805 mx_c0805 mx_c0805 mx_c0603 N20 U20 mx_c0603 mx_c0805 mx_c0805 1 2
VccIO8 VccCore8 +1P05V_FILTER
M20 VccIO9 VccCore9 T20
GND GND GND GND N22 AF22 GND GND GND GND SHORTPIN_RECT
VccIO10 VccCore10 SJP4 NOBOM
M22 VccIO11 VccCore11 AE22
P24 VccIO12 VccCore12 U22 1 2 NI
N24 T22 SL1
VccIO13 VccCore13 SHORTPIN_RECT 10UH/125mA
M24 VccIO14 VccCore14 AF23
D24 AE23 mx_l0805
VccIO15 VccCore15 VCCSATAPLL
C24 VccIO16 VccCore16 AD23 2 1
B24 VccIO17 VccCore17 AA23
D25 VccIO18 VccCore18 Y23

1
C25 VccIO19 VccCore19 V23 NI NI
B25 U23 SCB1 SCB2
VccIO20 VccCore20 1UF/16V 10UF/6.3V
M26 T23

2
VccIO21 VccCore21 X7R 10% X5R 10%
L26 VccIO22 VccCore22 AF24
K26 AE24 mx_c0603 mx_c0805
VccIO23 VccCore23
J26 VccIO24 VccCore24 AB24 NI
H26 AA24 SL2
VccIO25 VccCore25 mx_l0805
G26 VccIO26 VccCore26 Y24 GND GND
F26 V24 1UH/300mA
VccIO27 VccCore27 VCCAPLLEXP
Y29 VccIO28 VccCore28 T24 2 1
V29 VccIO29 VccCore29 AE26
T29 VccIO30 VccCore30 AD26

1
T30 VccIO31 VccCore31 AB26 NI
Y36 V26 SCB4
VccIO32 VccCore32 10UF/6.3V
V36 U26

2
C VccIO33 VccCore33 X5R 10% +1P05V_PCH C
T36 VccIO34 VccCore34 T26
T37 P26 IP R1.01 Add crb1.5 mx_c0805
NOTE: R37
VccIO35 VccCore35
E26 NI
VccIO36 VccCore36 SL3
SU1.U15 and SU1.T15 can be shorted together R38 VccIO37 VccCore37 C26
mx_l0805
P38 VccIO38 VccCore38 A26 NI SL9 GND
but no with SU1.V15 and Y26 for better electrical quality P39 T27 1UH/300mA
VccIO39 VccCore39 VCCFDIPLL
R40 VccIO40 VccCore40 P27 2 1 2 1
on HDMI 1080P 60Hz Deep color mode base on WW34 2009. AA27 VccIO41 VccCore41 E27
AT28 VccIO42 VccCore42 D27 0

1
T19 VccIO43 VccCore43 B27 NI
+1P05V_FILTER P19 N28 SCB6
VccIO44 VccCore44 10UF/6.3V
V15 M28 IP R1.01 Add crb1.5

2
VccIO45 VccCore45 X5R 10%
U15 VccIO46 VccCore46 L28 IP R1.01 Add crb1.5
VCCIO1 T15 K28 mx_c0805 NI
VccIO47 VccCore47 +1P05V_PCH_R SL4
AH20 VccIO48 VccCore48 J28
AJ22 H28 NI GND NI 10UH/125mA
VccIO49 VccCore49 SL8 SL10
1

I AH22 G28 mx_l0805


M1C15 VccIO50 VccCore50 +1P05V_PCH_SL4
AH23 VccIO51 VccCore51 F28 2 1 2 1 2 1
+1P05V_FILTER 0.1UF/16V U19 D28
2

X7R 10% VccIO52 VccCore52


N26 VccIO53 VccCore53 C28 0 0

1
mx_c0402 AA26 A28 NI NI
VCCIO2 VccIO54 VccCore54 SCB7 SCB8
GND Y26 VccIO55 VccCore55 P29
E29 1UF/16V 10UF/6.3V

2
VccCore56
1

I D29 X7R 10% X5R 10%


M1C18 VccCore57 mx_c0603 mx_c0805
VccCore58 B29
+1P1V_VTT 0.1UF/16V +3P3V
2

X7R 10% GND GND I


mx_c0402 SL5
GND A23 C23 VCCADAC 1 2
B +1P05V_ME VccDMI Vss4 B
Vss5 B22
600Ohm/100Mhz/0.5A

1
AE16 P22 I + mx_l0603
VccME1 Vss6 SCB9
AD16 VccME2 Vss7 P23 I
AB16 1UF/16V SCE4

2
VccME3
1
1

I I I AH1 X7R 10% 220UF/16V

2
SCB40 SCB36 SCB35 VccME4 mx_c0603
AH3 VccME5
1UF/16V 10UF/6.3V 1UF/16V AJ4 GND I
2
2

X7R 10% VccME6


X7R 10% X5R 10% AH4 VccME7 IP R1.02 I SL6
mx_c0603 mx_c0805 mx_c0603 AJ5 GND GND 10UH/125mA
VccME8 mx_l0805
AG5 VccME9
AH6 VccME10 VccSATAPLL P41 VCCSATAPLL VCCA_DPLLA I SR142 1 0 2 VCCA_DPLLA_R 2 1
GND GND GND AF8 VccME11

1
AF10 A21 VCCAPLLEXP +
VccME12 VccAPLLEXP

1
AH13 VccME13 I I
AF13 A37 VCCFDIPLL SCB10 SCE2
VccME14 VccFDIPLL

1
AD13 1UF/16V 220UF/16V NI

2
VccME15 VCCCLKPLL X7R 10% SR144
AE15 VccME16 VccAClk AA1
AD15 mx_c0603 0
VccME17 VCCADAC
AB15 VccME18 VccADAC AF1 I
AA15 SL7

2
VccME19 VCCA_DPLLA 10UH/125mA
Y15 VccME20 VccADPLLA R2 GND GND
AA16 mx_l0805
VccME21
Y16 VccME22 VccADPLLB T1 VCCA_DPLLB I SR143 1 0 2 VCCA_DPLLB_R 2 1
AA18 VccME23
Y18 VccME24 1 +
1

Y19 VccME25 I I IP R1.01 Change to o OHM


AF16 SCB11 SCE3
VccME26 1UF/16V 220UF/16V
A AJ2 A
2

VccME27 X7R 10%


IBEXPEAK Rev 1.0 mx_c0603

GND GND
PEGATRON DT-MB RESTRICTED SECRET
IP R1.02 I Title : INTEL_PCH - 7
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: Friday, April 02, 2010 Sheet 25 of 68
5 4 3 2 1
5 4 3 2 1

Note
Place SCB45 close to
SU1.AJ18 for EMI issue
I +5VSB
I SR100
+3P3VSB 10 NI +3P3VSB
U1H 2 1 Q1
1
AJ18 AW16 V5REF_SUS 3
VccSusHDA V5REF_Sus
2

1
D I D

1
I I SCB14 BAT54CW
SCB26 SCB45 0.1UF/16V

2
1UF/16V 0.1UF/16V X7R 10%

2
X7R 10% X7R 10% I +5V
mx_c0603 GND SR101
10 I +3P3V
GND GND 2 1 Q2
1
AN1 V5REF 3
V5REF
2
+3P3V_ME

1
I +1P8V_SFR +1P05V_PCH_R BAT54CW
SCB15
+VCCME3P3 N38 1UF/16V +1P8V_SFR +1P05V_PCH

2
VccME3_3_1 X7R 10%
N40 VccME3_3_2

1
mx_c0603

1
I I NI
SCB16 SR156 SR159 I NI
0.1UF/16V GND 0 0 SR148 SR149

2
X7R 10% 0 0

2
C2 VCCVRM1

2
VccVRM1 VCCVRM2
VccVRM2 C3
GND VccVRM3 L40
VccVRM4 L39
Change for CRB1.5 NOTE:
+1P8V_SFR
C
VccVRM powers VccSATAPLL, C
+1P1V_VTT VccapllEXP, VccFDIPLL, and VccACLK
VccPNAND1 P30
VccPNAND2 M39
B39 V_CPU_IO VccPNAND3 M41 I
A39 SR103 +1P05V_ME
V_CPU_IO_NCTF 0

1
1
I I mx_r0603
SCB3 SCB12 Y20 VCCLAN 2 1
0.1UF/16V VccLAN1
4.7UF/6.3V Y22

2
2

VccLAN2

1
X5R 10% X7R 10%

1
I I NI I

1
SCB34 SCB42 SR102 SCB33
GND GND 0.1UF/16V 0.1UF/16V 0 1UF/16V

2
X7R 10% X7R 10% mx_r0603 X7R 10%
NOTE:

2
2
mx_c0603 SR102 SR103
+3P3V
GND GND GND GND USE INTEL LAN NI I
AH16 Vcc3_3_1 VccSus3_3_1 AV29
AH18 Vcc3_3_2 VccSus3_3_2 AV25 +3P3VSB NON-INTEL LAN I NI
AE27 Vcc3_3_3 VccSus3_3_3 BA26
1

1
1

I I I I I I AD27 Vcc3_3_4 VccSus3_3_4 AW26


SCB13 SCB30 SCB27 SCB28 SCB29 SCB44 AW1 AU26
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V Vcc3_3_NCTF1 VccSus3_3_5
BA3 AT26
2

2
2

X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% Vcc3_3_NCTF2 VccSus3_3_6
AV2 Vcc3_3_5 VccSus3_3_7 AR26

1
AY3 Vcc3_3_6 VccSus3_3_8 AP26 I I
AK14 AN26 SCB31 SCB32
B Vcc3_3_7 VccSus3_3_9 0.1UF/16V 0.1UF/16V B
GND GND GND GND GND GND AJ14 AM26

2
Vcc3_3_8 VccSus3_3_10 X7R 10% X7R 10%
AJ16 Vcc3_3_9 VccSus3_3_11 AL26
A9 Vcc3_3_10 VccSus3_3_12 AK26
U40 Vcc3_3_11 VccSus3_3_13 AY27
VccSus3_3_14 AV27 GND GND
VccSus3_3_15 AU27
VccSus3_3_16 AW39
VccSus3_3_17 AW40
VccSus3_3_NCTF1 BA40
VccSus3_3_NCTF2 AY40

+BATT

+1P5V_STBY_INT AH33 AY29


+1P1V_DSW _INT DcpSST VccRTC +1P5V_RTC_INT
AF27 DcpSusByp VccRTC_NCTF BA39
+1P1V_STBY_INT AF30 AY38
DcpSus DcpRTC

1
1
I I I
SCB18 SCB19 SCB20
0.1UF/16V 0.1UF/16V 1UF/16V

2
2
1

I I I I X7R 10% X7R 10% X7R 10%


SCB21 SCB43 SCB22 SCB23 IBEXPEAK Rev 1.0 mx_c0603
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2

X7R 10% X7R 10% X7R 10% X7R 10% GND GND GND

A A
GND GND GND GND

NOTE: PEGATRON DT-MB RESTRICTED SECRET


MOW WW08 recommand to
reserved SCB43. Title : INTEL_PCH - 8
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: Tuesday, March 23, 2010 Sheet 26 of 68
5 4 3 2 1
5 4 3 2 1

I I
U1I U1J
AB19 V11 R5 L18 TP_PCH_L18 1 ST51 TPC26b NOBOM
Vss8 NC2 Vss144 TP1 TP_PCH_K18 ST53 TPC26b NOBOM
D AB27 Vss9 NC3 Y12 R4 Vss145 TP2 K18 1 D
Y27 V10 AA41 J20 TP_PCH_J20 1 ST54 TPC26b NOBOM
Vss10 NC4 Vss146 TP3
AH15 Vss11 NC5 Y11 AH41 Vss147 TP9 AT24
AD19 Vss12 AU41 Vss148 TP10 AR24
AA19 K40 P10 TP_PCH_P10 1 ST57 TPC26b NOBOM
Vss13 Vss149 TP12 TP_PCH_P9 ST58 TPC26b NOBOM
V19 Vss14 Y40 Vss150 TP13 P9 1
E19 GND AB40 AH30 TP_PCH_AH30 1 ST59 TPC26b NOBOM
Vss15 Vss151 TP21
AU20 Vss16 AD40 Vss152 TP11 V20
AP20 Vss17 C39 Vss153
AJ20 Vss18 Vss87 AV28 D39 Vss154
AB20 U39 G39 AY1 TP_TP22NCTF1 1 ST61 TPC26b NOBOM
Vss19 Vss88 Vss155 TP22_NCTF1 TP_TP22NCTF2 ST67 TPC26b NOBOM
AA20 Vss20 Vss89 B10 J39 Vss156 TP22_NCTF2 A41 1
P20 B41 K39 BA41 TP_TP22NCTF3 1 ST68 TPC26b NOBOM
Vss21 Vss_NCTF1 Vss157 TP22_NCTF3 TP_TP22NCTF4 ST69 TPC26b NOBOM
L20 Vss22 Vss_NCTF2 C41 V39 Vss158 TP22_NCTF4 A3 1 NOTE:
K20 Vss23 Vss_NCTF3 AW41 W39 Vss159
F20 Vss24 Vss_NCTF4 AY41 AA39 Vss160 BOM option depend on thermal result
BA21 Vss25 Vss_NCTF5 A40 AD39 Vss161
AU22 Vss26 Vss_NCTF6 B40 AE39 Vss162
AT22 Vss27 Vss_NCTF7 A5 AF39 Vss163
AN22 Vss28 Vss_NCTF8 B2 G38 Vss164
AK22 Vss29 Vss_NCTF9 AY2 AH19 Vss165 I
AD22 BA2 AU19 SHS1
Vss30 Vss_NCTF10 Vss166
AB22 Vss31 Vss_NCTF11 C1 C18 Vss167
AA22 Vss32 Vss_NCTF12 E1 F18 Vss168 1
V22 Vss33 Vss_NCTF13 BA1 J18 Vss169 2
L22 Vss34 Vss90 G41 T18 Vss170 3
K22 Vss35 Vss91 AA38 L16 Vss171 4
E22 Vss36 Vss92 AU38 T16 Vss172
D22 Vss37 Vss93 D37 U16 Vss173
C AU23 E37 V16 HEATSINK_2ANCHOR C
Vss38 Vss94 Vss174
AB23 Vss39 Vss95 J37 AU16 Vss175 Vss221 AR1
E23 Vss40 Vss96 M37 E15 Vss176 Vss222 P1
AW24 Vss41 Vss97 N37 A14 Vss177 Vss223 G1
AV24 Vss42 Vss98 W37 F14 Vss178 Vss224 U2
AP24 Vss43 Vss99 AC37 J14 Vss179 Vss225 K2
AJ24 Vss44 Vss100 AF37 M14 Vss180 Vss226 AW3
AH24 Vss45 Vss101 AK37 N14 Vss181 Vss227 AK3
AD24 Vss46 Vss102 AN37 AM14 Vss182 Vss228 AF3 GND
U24 Vss47 Vss103 AU37 AN14 Vss183 Vss229 W3
J24 Vss48 Vss104 BA37 AT14 Vss184 Vss230 V3
F24 Vss49 Vss105 AF36 BA14 Vss185 Vss231 U3
AJ26 Vss50 Vss106 AH36 E13 Vss186 Vss232 T3 I I
AH26 Vss51 Vss107 A35 V13 Vss187 Vss233 L3 CLIP1 CLIP2
AF26 Vss52 Vss108 T35 Y13 Vss188 Vss234 K3
AH27 V35 E12 AA4 ANCHOR_CLIP ANCHOR_CLIP
Vss53 Vss109 Vss189 Vss235 ANGLE_45 ANGLE_45
V27 Vss54 Vss110 D34 F12 Vss190 Vss236 P4
U27 Vss55 Vss111 F34 L12 Vss191 Vss237 E4
BA28 Vss56 Vss112 G34 M12 Vss192 Vss238 AV5
AW28 Vss57 Vss113 L34 V12 Vss193 Vss239 AU5
AR28 Vss58 Vss114 P34 AF12 Vss194 Vss240 AN5
AN28 Vss59 Vss115 AB34 AM12 Vss195 Vss241 AK5
AM28 Vss60 Vss116 AD34 AN12 Vss196 Vss242 AF5
AJ28 Vss61 Vss117 AH34 AU12 Vss197 Vss243 AC5
AU29 Vss62 Vss118 U18 C11 Vss198 Vss244 AB5
AH29 Vss63 Vss119 V18 F11 Vss199 Vss245 Y5
AF29 Vss64 Vss120 AB18 M11 Vss200 Vss246 W5
AD29 Vss65 Vss121 AF18 L11 Vss201 Vss247 T5
AB29 Vss66 Vss122 AM18 P11 Vss202 Vss248 N5
B B
AU30 Vss67 Vss123 AN18 T11 Vss203 Vss249 M5
AR30 Vss68 Vss124 AR18 AD11 Vss204 Vss250 J5
AN30 Vss69 Vss125 AT18 AF11 Vss205 Vss251 H5
AD30 Vss70 Vss126 AW18 AR11 Vss206 Vss252 F5
AB30 Vss71 Vss127 C17 C10 Vss207 Vss253 E5
Y30 Vss72 Vss128 AW17 Y10 Vss208 Vss254 AD6
L30 Vss73 Vss129 E16 AK10 Vss209 Vss255 V6
F30 Vss74 Vss130 F16 AM10 Vss210 Vss256 J6
E30 Vss75 Vss131 J16 E9 Vss211 Vss257 E6
A30 Vss76 Vss132 K16 H9 Vss212 Vss258 BA7
AF31 Vss77 Vss133 AK34 V9 Vss213 Vss259 J7
AD31 Vss78 Vss134 E33 AH9 Vss214 Vss260 H7
P31 Vss79 Vss135 M33 AK9 Vss215 Vss261 A7
L31 Vss80 Vss136 V33 AU9 Vss216 Vss262 AL8
H31 Vss81 Vss137 Y33 E8 Vss217 Vss263 AK8
C31 Vss82 Vss138 AB33 L8 Vss218 Vss264 AD8
AM32 Vss83 Vss139 AF33 M8 Vss219 Vss265 AB8
AK32 Vss84 Vss140 AU33 P8 Vss220 Vss266 T8
AH32 Vss85 Vss141 C32
AF32 Vss86 Vss142 K32
L32 IBEXPEAK Rev 1.0
Vss143

IBEXPEAK Rev 1.0

GND GND GND GND

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : INTEL_PCH - 9
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: Tuesday, March 23, 2010 Sheet 27 of 68
5 4 3 2 1
5 4 3 2 1

+5V
+5V_DAC_CLAMP

1
NI NOTE:
VCB1

1
0.1UF/16V Install the VD1/VD2/VD3/VD4/VD5 diode

1
NI/VGA-I NI/VGA-I NI/VGA-I
VD1 VD2 VD3 to prevent from ESD issue NI/VGA-I NI/VGA-I
BAV99W -L BAV99W -L BAV99W -L VD4 VD5
BAV99W -L BAV99W -L
GND GND

3
D GND D

3
NI/VGA-I NI/VGA-I
VL2 VL3
0 Ohm 0.068UH/300mA
1 2 RA 1 2
23 VGA_RED

1
mx_l0603 mx_l0603 NI/DVI-I-I VR10 1 0 2 R_BLUE 31

1
NI/VGA-I NI NI/VGA-I NI/VGA-I
VR1 VC1 VC2 VC3 NI/DVI-I-I VR11 1 0 2 R_GREEN 31
150 3.3PF/50V 5.6PF/50V 3.3PF/50V

2
1% NPO 0.25PF NPO 0.25PF NPO 0.25PF NI/DVI-I-I VR12 1 0 2 R_RED 31

2
GND GND GND GND
NI/VGA-I NI/VGA-I NI/DVI-I-I VR13 1 0 2 R_VHSYNC 31
VL4 VL5 RED
0 Ohm 0.068UH/300mA NI/DVI-I-I VR22 1 0 2 R_VVSYNC 31
1 2 GA 1 2 GREEN
23 VGA_GREEN
BLUE

1
mx_l0603 mx_l0603 VHSYNC

1
NI/VGA-I NI NI/VGA-I NI/VGA-I NI/VGA-I 1 2 VGADATA VGADATA
VR2 VC4 VC5 VC6
150 3.3PF/50V 5.6PF/50V 3.3PF/50V VR3 100

2
1% NPO 0.25PF NPO 0.25PF NPO 0.25PF
I

16
J69

1
NI/VGA-I D_SUB_15P
GND GND GND GND VR20
C NI/VGA-I NI/VGA-I 200KOhm 6 C
VL6 VL7 RED 1 11

2
0 Ohm 0.068UH/300mA 7
1 2 BA 1 2 GREEN 2 12
23 VGA_BLUE
8
1

mx_l0603 mx_l0603 BLUE 3 13

1
1

1
NI/VGA-I NI NI/VGA-I NI/VGA-I GND +5V_VGA_CONN 9
VR4 VC7 VC8 VC9 4 14
NOTE: 150 3.3PF/50V 5.6PF/50V 3.3PF/50V 10

2
2

2
Place there VGA filter components 1% NPO 0.25PF NPO 0.25PF NPO 0.25PF 5 15
2

within 500 mils of the VGA connector


GND GND GND GND

17
VVSYNC
I VR6 1 2 0 1 2 VGACLK
+3P3V

1
I VR7 1 2 0 NI/VGA-I NI NI NI NI
VR5 VC10 VC11 VC12 VC13 VGACLK
NI VR21 100 470PF/50V 12PF/50V 12PF/50V 470PF/50V

2
VU1 1 2 X7R 10% NPO 5% NPO 5% X7R 10% VVSYNC
+5V
74AHCT1G125 4.7KOHM VHSYNC
1 OE# Vcc 5 5%
2 VR8 NI GND GND GND GND
23 VGA_HSYNC A
3 4 VHSYNC_OB 1 2
GND Y +3P3V

1
30 OHM
B B
5% NI/VGA-I
NI NI VR23 VR44 GND
GND VU2 1 2 200KOhm

2
74AHCT1G125 4.7KOHM
1 OE# Vcc 5 5%
2 VR9 NI
23 VGA_VSYNC A
3 4 VVSYNC_OB 1 2
GND Y
GND
30 OHM
1

NI 5%
VCB6 NI
GND 0.1UF/16V
2

NI/VGA-I
GND +5V NI/VGA-I +5V_VGA NI/VGA-I VL8
VD6 VF1 80Ohm/100Mhz/2A
SS14 1.1A/6V mx_l0805
+3P3V 1 2 1 2 +5V_VGA_L 1 2 +5V_VGA_CONN

1
4.7K 2 1 VR14 NI/VGA-I NI/VGA-I
1

4.7K 2 1 VR15 NI/VGA-I VCB3


DDCA_CLK_G 4.7K 2 1 VR16 NI/VGA-I NI/VGA-I NI/VGA-I 0.1UF/16V

2
DDCA_DATA_G 4.7K 2 1 VR17 NI/VGA-I VR18 VR19
2.2K 2.2K
A A
2

NI/VGA-I GND
VQ1
1
G

2N7002
RDDCA_DATA
PEGATRON DT-MB RESTRICTED SECRET
2 S

23 DDCA_DATA
D

NI/VGA-I
VQ2 Title : VGA PORT
1
G

2N7002
RDDCA_CLK Engineer:
2 S

23 DDCA_CLK Pegatron Corp. Vic_Chen


D

Size Project Name Rev


A3 IPMIP-GS 1.01
1. 01
Date: W ednesday, April 07, 2010 Sheet 28 of 68
5 4 3 2 1
5 4 3 2 1

D D

+3P3V

1
NI/DVI-I
M1R28
1K
+3P3V

2
1

NI/DVI-I OE_EN# 30
C M1R26 C
1K
2

NI/DVI-I NI/DVI-I
M1Q5 3
M1R33 C
30,38 PCIE_B4 1 2PCIE_B4_R 1 B
1

NI 10K PMBS3904 E
M1CB24 2
15PF/50V
2

NPO 5%

GND GND

B NOTE: B

SEL DDC_EN# OE_EN# Function


PCIE X16 PCIE_B4 (MUX) (Level Shifter) (Level Shifter)
Plugged LOW LOW LOW HI PCIE x16
Unplugged HI HI HI LOW DVI , HDMI

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : DVI Control
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 29 of 68
5 4 3 2 1
5 4 3 2 1

CH7318: 02G480001000
ASM1442: 022U-0004000

MU5

+3P3V +3P3V

D D
2 VCC1
ML1 120Ohm/100Mhz/0.6A NI/DVI-I 26 VCC5 +5V_DVI
1 2 DVI_VDD3P3V 15 VCC3
21 VCC4
mx_l0603 11 VCC2
33 VCC6

1
NI NI NI NI NI/DVI-I NI/DVI-I NI/DVI-I 46 VCC8 NOTE: HPD_SINK status (+5V tolerance)

1
NI/DVI-I NI/DVI-I MCB7 MCB8 MCB9 MCB10 MCB11 MCB12 MCB13 40
MR25 MR36 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V VCC7
10UF/6.3V NI/DVI-I NI/DVI-I plugged
HI

2
2.2K 2.2K X5R 10% MR34 MR11
2.2K 2.2K unplugged
LOW

2
GND GND GND GND GND GND GND
23 DVI_HPD 7 HPD HPD_SINK 30 DVI_HP_DETECT 31
DVI_LEV_SDA_SOCE 8 29
23 SDVO_CTRL_DATA SDA SDA_SINK DVI_DDCA_DATA 31
DVI_LEV_SCL_SOCE 9 28
23 SDVO_CTRL_CLK SCL SCL_SINK DVI_DDCA_CLK 31
29,38 PCIE_B4 32 DDC_EN

1
NI NI

1
NI MCB14 MCB15
NOTE:

1
NI MCB17 15PF/50V 15PF/50V

2
MCB6 15PF/50V DDC_EN Passgate NPO 5% NPO 5%

2
15PF/50V NPO 5%

2
NPO 5% 0V Disable GND GND
GND 3.3V 22
Enable OUT_D1+ DVI_TXC_P 31
GND NI MC3 NI MR12
1 2 OUT_D1 1 2
R1.02G X7R 10% 390
C NI/DVI-I M2C2 0.1UF/16V 2 1 X7R 10% DVI_TMDSB_CLK_C 39 23 0.1UF/16V C
23 DVI_TMDSB_CLK IN_D1+ OUT_D1- DVI_TXC_N 31
NI/DVI-I M2C4 0.1UF/16V 2 1 X7R 10% DVI_TMDSB_CLK#_C 38
23 DVI_TMDSB_CLK# IN_D1-
OUT_D2+ 19 DVI_TXD0_P 31
NI MC6 NI MR26
NI/DVI-I M2C1 0.1UF/16V 2 1 X7R 10% DVI_TMDSB_DATA0_C 42 1 2 OUT_D2 1 2
23 DVI_TMDSB_DATA0 IN_D2+
NI/DVI-I M2C5 0.1UF/16V 2 1 X7R 10% DVI_TMDSB_DATA0#_C 41 X7R 10% 390
23 DVI_TMDSB_DATA0# IN_D2- 0.1UF/16V
OUT_D2- 20 DVI_TXD0_N 31
NI/DVI-I M2C8 0.1UF/16V 2 1 X7R 10% DVI_TMDSB_DATA1_C 45 16
23 DVI_TMDSB_DATA1 IN_D3+ OUT_D3+ DVI_TXD1_P 31
NI/DVI-I M2C7 0.1UF/16V 2 1 X7R 10% DVI_TMDSB_DATA1#_C 44 NI MC10 NI MR27
23 DVI_TMDSB_DATA1# IN_D3-
1 2 OUT_D3 1 2
X7R 10% 390
NI/DVI-I M2C9 0.1UF/16V 2 1 X7R 10% DVI_TMDSB_DATA2_C 48 17 0.1UF/16V
23 DVI_TMDSB_DATA2 IN_D4+ OUT_D3- DVI_TXD1_N 31
NI/DVI-I M2C110.1UF/16V 2 1 X7R 10% DVI_TMDSB_DATA2#_C 47
23 DVI_TMDSB_DATA2# IN_D4-
OUT_D4+ 13 DVI_TXD2_P 31
NI MC12 NI MR28
NOTE: Place near Level shifter 1 2 OUT_D4 1 2
X7R 10% 390
14 0.1UF/16V
OUT_D4- DVI_TXD2_N 31
29 OE_EN# 25 OE#

+3P3V +3P3V +3P3V +3P3V 6 REXT_DVI_R


REXT

2
NOTE: Pericom PI3VDP411LS MR30
2
2

2
Pin 3, 4, 6, 10,34, and 35 are internal 100K ohm pull-up MR33 MR35 MR31 MR32
499 Ohm
1%
10KOhm 10KOhm 10KOhm 10KOhm
OC_3 OC_2 OC_1 OC_0 Vswing

1
B NI/DVI-I B
Pre/Deemphasis NI/DVI-I NI NI NI R1.04G
(mV) GND
(Pin10) (Pin6) (Pin4) (Pin3)
1
1

1
ANALOG2_R_1 10 1
RT_EN# GND1
500 5
0 0 0 0 0 GND2
12
FUN_R1 GND3
600 3 24
0 0 0 1 0 FUN_R2 PC0 GND5
FUN_R3
4
34
PC1 GND4 18
36
NOTE: If using Parade PS8101 Level Shifter, pin 4 pin 3
0 0 1 0 750 0 FUN_R4 35
DDCBUF_EN GND8
31 Recommended Equalization[PC1,PC0]=01, 4dB
CFG GND7
1000 27
0 0 1 1 0 GND6
1

1
1

MR21 MR23 MR19 MR20 MR29 GND10 43 If using Asmedia ASM1442 Level Shifter,
500 37
0 1 0 0 0 NI 0 NI 0 NI 0 NI 0 NI 0
GND9
49 connect a 10.2K ohm 1% to GND.
GND11
500 50
0 1 0 1 1.5dB GND12
51 If using Chrontel CH7318C Level Shifter,
2

2
2

GND13
500 52
0 1 1 0 3.5dB GND14
53 connect a 1.2K ohm 1% to GND.
GND GND GND GND GND GND15
0 1 1 1 500 6dB PS8101
400 NI/DVI-I
1 0 0 0 0
GND
1 0 0 1 400 3.5dB NOTE: Pericom PI3VDP411LS IP R1.01 Change to PS8101
1 0 1 0 400 6dB EQ0 EQ1 Equalization NOTE:
1 0 1 1 400 9dB (Pin34) (Pin35) (dB) OE* IN_D Termination OUT_D Outputs
1 1 0 0 1000 0 0 0 3 1 Hi-Z Hi-Z
A A
1 1 0 1 1000 -3.5dB 0 1 7.2 0 50ohm Active
1 1 1 0 1000 -6dB 1 0 10
PEGATRON DT-MB RESTRICTED SECRET
1 1 1 1 1000 -9dB 1 1 12
Title : DVI Level shifter
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 30 of 68
5 4 3 2 1
5 4 3 2 1

MR1 1 2 0 NI/DVI-I

30 DVI_TXD0_P
NI

2
90OHM/100MHZ/330mA
ML6

3
NI/DVI-I +5V_DVI +5V
30 DVI_TXD0_N
ML4 NI/DVI-I
MR2 1 2 0 NI/DVI-I NI 70Ohm/100Mhz/3A MD1
mx_l0805 MF2 SS14
MU9 +5V_DVI_CONN 2 1 +5V_DVI_L 1 2 2 1
CM1213_04SO
D 1.1A/6V D

1
CH1 1 6CH4 NI/DVI-I
+5VSB MCB18 NI/DVI-I
VN 2 5 VP 0.1UF/16V

2
CH2 3 4 CH3 R_DVI_TXD2_P
R_DVI_TXD2_N
GND GND

MR3 1 2 0 NI/DVI-I

R_DVI_TXD1_P
30 DVI_TXD1_P
R_DVI_TXD1_N
NI
1

90OHM/100MHZ/330mA
ML8
4

R_DVI_TXD0_P
30 DVI_TXD1_N
R_DVI_TXD0_N
MR4 1 2 0 NI/DVI-I 2 1 C_DVI_HPD

NI/DVI-I
MR5 1 2 0 NI/DVI-I +3P3V +3P3V MR18
R_DVI_TXC_P 1K
R_DVI_TXC_N +5V
30 DVI_TXD2_P

1
NI
1

1
NI
90OHM/100MHZ/330mA MR15 NI
ML7 4.7K MR16

2
4.7K
4

2
30 DVI_TXD2_N NI NI

2
MQ3 MD4
MR6 1 2 0 NI/DVI-I NI 3 PMBS3904 GND BAT54SW
C
MU6 B 1 DVI_HP_DETECT# NI

3
CM1213_04SO MQ4 NI
+5VSB R_DVI_DDCA_DATA E 3 PMBS3904 MR17
CH1 1 6CH4 R_DVI_DDCA_CLK 2 C 4.7K
B 1 R_DVI_HPD 2 1
VN 2 30 DVI_HP_DETECT
5 VP
GND E
C CH2 3 4 CH3 2 C

GND J64 12X525028000


R_DVI_TXD2_P 2 6 R_DVI_DDCA_CLK GND
MR7 R_DVI_TXD2_N TMDS_DATA_2+ DDC_CK R_DVI_DDCA_DATA
1 2 0 NI/DVI-I 1 7
TMDS_DATA_2- DDC_DATA
5 16 C_DVI_HPD CON2
30 DVI_TXC_P
4
TMDS_DATA_4+ HOT_PLUG_DETECT 1245-000D000
NI
1

TMDS_DATA_4- R_RED R_DVI_TXD0_P 18 +5V_DVI_CONN


C1 R_RED 28 14
90OHM/100MHZ/330mA R_DVI_TXD1_P 10 RED R_DVI_TXD0_N 17 TMDS_DATA_0+ +5V_POWER
ML5 R_DVI_TXD1_N 9 TMDS_DATA_1+ R_GREEN TMDS_DATA_0-
C2 R_GREEN 28
TMDS_DATA_1- GREEN R_DVI_TXD1_P 10 15
4

R_DVI_TXC_N R_BLUE R_DVI_TXD1_N 9 TMDS_DATA_1+ GND_for+5V


30 DVI_TXC_N 13 C3 R_BLUE 28
TMDS_3+ BLUE TMDS_DATA_1-
12
MR8 TMDS_DATA_3- R_VHSYNC R_DVI_TXD2_P
1 2 0 NI/DVI-I C4 R_VHSYNC 28 2
R_DVI_TXD0_P 18 H_SYNC R_VVSYNC R_DVI_TXD2_N TMDS_DATA_2+
8 R_VVSYNC 28 1
+5VSB R_DVI_TXD0_N 17 TMDS_DATA_0+ NC TMDS_DATA_2- C_DVI_HPD
16
TMDS_DATA_0- HOT_PLUG_DETECT
C51 13
Change +5V to +5VSB 21
A_GND1
C52 12
TMDS_DATA_3+
TMDS_DATA_5+ A_GND2 TMDS_DATA_3-
20 15
for leakage current risk TMDS_DATA_5- GND_for+5V
5
R_DVI_TXC_P +5V_DVI_CONN TMDS_DATA_4+
23 14 4
R_DVI_TXC_N TMDS_CLK+ +5V_POWER TMDS_DATA_4-
24
2

TMDS_CLK-
22 21 19
TMDS_CLK_Shield TMDS_DATA_5+ TMDS_DATA_0/5_Shield
NI/DVI-I NI/DVI-I 25 3 20 11
MD10 MD9 P_GND1 TMDS_2/4_Shield TMDS_DATA_5- TMDS_DATA_1/3_Shield
26 11 3
BAT54SW BAT54SW P_GND2 TMDS_DATA_1/3_Shield TMDS_2/4_Shield
19 22
TMDS_DATA_0/5_Shield R_DVI_TXC_P TMDS_CLK_Shield
27 23
NP_NC1 R_DVI_TXC_N TMDS_CLK+
GND 28 29 24
3

NP_NC2 GND1 TMDS_CLK-


30
GND2
31
GND3 R_DVI_DDCA_DATA
32 7 25
30 DVI_DDCA_DATA GND4 R_DVI_DDCA_CLK DDC_DATA P_GND1
6 26
DDC_CK P_GND2

P_GND3
P_GND4
P_GND5
P_GND6
DVI_CON_30P
NI/DVI-I 27
R_VVSYNC NP_NC1
8 28
30 DVI_DDCA_CLK NC NP_NC2

Just for Layout

29
30
31
32
GND
GND DVI-I DVI_CON_24P
B B
Shield: 1245-001W000 (12X525028000)
NI
No Shield: 1245-001S000 (12X525028W00) PEGATRON DT-MB RESTRICTED SECRET GND

DVI-D
Shield: 1245-000D000 (12X524283000)
No Shield: 1245-0018000 (12X525024W00)

A A

Title : DVI-I Connector


Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A2 IPMIP-GS
Date: Wednesday, April 07, 2010 Sheet 31 of 68
5 4 3 2 1
5 4 3 2 1

VP
23 DP_TXP0 I 1 2 M1C7 1 0 2 ML_LANE_0P
X7R 10% 0.1UF/10V
mx_c0402 M1RN4A
VP
23 DP_TXN0 I 1 2 M1C5 3 0 4 ML_LANE_0N
X7R 10% 0.1UF/10V
mx_c0402 M1RN4B
D M1L11
NI I M1U2 D

4
CM1213_04SO
90Ohm/100MHz +5VSB
L203 ML_LANE_3P CH1 1 6CH4 ML_LANE_3N
M1L12

3
VN 2 5 VP
M1L13
NI

4
ML_LANE_1P CH2 3 4 CH3 ML_LANE_1N
90Ohm/100MHz
L204 GND

3
VP
23 DP_TXP1 I 1 2 M1C6 7 0 8 ML_LANE_1P
X7R 10% 0.1UF/10V
mx_c0402 M1RN3D I M1U3
VP CM1213_04SO
23 DP_TXN1 I 1 2 M1C8 5 0 6 ML_LANE_1N +5VSB
X7R 10% 0.1UF/10V ML_LANE_0P CH1 1 6CH4 ML_LANE_0N
mx_c0402 M1RN3C
VN 2 5 VP

ML_LANE_2P CH2 3 4 CH3 ML_LANE_2N

GND

VP +3P3V
C
23 DP_TXP2 I 1 2 M1C9 5 0 6 ML_LANE_2P C
X7R 10% 0.1UF/10V
mx_c0402 M1RN4C
VP
23 DP_TXN2 I 1 2 M1C10 7 0 8 ML_LANE_2N

1
X7R 10% 0.1UF/10V I NI
M1RN4D J125 M1D3 M1R4
mx_c0402
M1L21 SS14 0
NI
1

1 mx_r0603
90Ohm/100MHz ML_LANE_0P I

2
L205 3 M1F1
M1L22 ML_LANE_0N DP_3P3V_POW ER DP_3P3V_PW R_FUSE
20 2 1
2

DP_PWR
4 ML_LANE_1P 1.1A/6V
NI
1

90Ohm/100MHz 6 ML_LANE_1N

1
NI +5V
L206 7 M1C1
ML_LANE_2P 0.1UF/16V
2

2
9 mx_c0402
ML_LANE_2N
VP
23 DP_TXP3 I 1 2 M1C11 3 0 4 ML_LANE_3P 10 ML_LANE_3P

1
X7R 10% 0.1UF/10V 19 GND I
M1RN3B RETURN M2R1
mx_c0402 12 ML_LANE_3N
VP 100KOHM
23 DP_TXN3 I 1 2 M1C14 1 0 2 ML_LANE_3N mx_r0402
X7R 10% 0.1UF/10V

2
mx_c0402 M1RN3A
GND
GND
B B

1
G
18 DP_DPD_CONN

S 2
HOT_PLUG_DETECT DPB_HPD 23

D
1
33 DPC_AUX_DP 15 AUX_CH_P I M2Q8
17 M1R5 I
33 DPC_AUX_DN AUX_CH_N 100K 1.02 2N7002
1.02 1.02 mx_r0402

2
3

3
M1D1 M1D2 M2D5
BAV99W -L BAV99W -L PIN13_R 13 BAV99W -L
CONFIG1
1
1

+5VSB NI +5VSB NI GND +5VSB


M1C2 M1C3
I I I
100PF/50V 100PF/50V
2
2

mx_c0402 mx_c0402 CEC_R 14 2


2

1
+5V +5V CONFIG2 GND_0
GND_1 5
GND_2 8

2
I I I GND_3 11
1
1

M1R49 16
GND GND GND GND M1R9 M1R36 GND_6
10KOhm 10KOhm 0 21 GND
5% 5% mx_r0402 P_GND1
1 P_GND2 22
mx_r0402 mx_r0402 23
2
2

P_GND3
P_GND4 24
33 CA_DET
GND
3 DISPLAYPORT_CON_20P GND
33 DP_DDPC_CTRL D
A I A
M2Q7
3 1
D 2N7002 G
S 2
1

M2Q1 I I
PEGATRON DT-MB RESTRICTED SECRET
1

1 M1R8 I
2N7002 G 1M M1C4
S 2
I mx_r0402 0.1UF/16V Title : DP CONNECTOR
2

mx_c0402
2

Pegatron Corp. Engineer: Vic_Chen


GND GND GND GND Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 32 of 68
5 4 3 2 1
5 4 3 2 1

D
Display Port to HDMI/DVI Dongle control D

+3P3VSB +3P3V +3P3V +3P3VSB

1
NI I NI NI
PCH Side M1R3 M1R2 M1R1 M1R6
100K 100K 100K 100K
I mx_r0402 mx_r0402 mx_r0402 mx_r0402

2
M1Q11
I 2N7002
M1C12
1 2 DONGLE_CTRL_AUX_DP

2 S
D
23 DPC_AUX_DP_MUX DPC_AUX_DP 32

3
0.1UF/16V

G
X7R 10%

1
mx_c0402 I
M1Q12 CA_DET 32
2N7002
I
M1C13
DP Connector Side
1 2 DONGLE_CTRL_AUX_DN

2 S
D
23 DPC_AUX_DN_MUX DPC_AUX_DN 32

3
0.1UF/16V

G
X7R 10%

1
mx_c0402

C C

DP_DDPC_CTRL 32

1
I NI I
M1Q15 M1R50 M1R51

1
2N7002

G
100K 100K
mx_r0402 mx_r0402

S 2
23 DDPC_CTRL_DATA

2
D
GND GND
I
M1Q14

1
2N7002

G
3

S 2
23 DDPC_CTRL_CLK

D
B B

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : DP DONGLE
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 33 of 68
5 4 3 2 1
5 4 3 2 1
Default as short pin 2-3

+5V_DUAL +5V_KBMS

YR7 0 Ohm 5%
1 2
NI/EVT
+5VSB +5V_KBMS

YR6 0 Ohm 5%
1 2
NI/EVT
D D

+5VSB_ATX +5V_KBMS
+5V_KBMS
YR8 0 Ohm 5%
1 2
I for S5 / NI

2
+5V_DUAL_USB_A +SBV45
I KR10
UF5 0
1.6A/6V J14 I I
1 2 8 +5V_KB YL1 I

1
LP4- VCC2 CMSCLK 70Ohm/100Mhz/3A YF1
7 2P- NC2 14
1

LP4+ 6 13 CKBCLK mx_l0805 1.6A/6V


2P+ KCLK- +5V_KBMS_F +5V_KBMS_R
I 5 GND2 VCC3 12 2 1 2 1

1
UR9 + 4 11 CMSDATA
8.2K UCE611 LP5- VCC1 NC1 CKBDATA
3 1P- KDAT 10

1
mx_r0402 100UF/16V LP5+ 2 9
2

1P+ GND3

1
I 1 NI
I
2
UC1111 GND1 YR1

1
0.1UF/16V 16 15 634 I NI

2
20 OC45# mx_c0402 P_GND2 P_GND1 1% UC14 UC15
18 17

2
P_GND4 P_GND3 0.1UF/16V 0.1UF/16V

2
1

MINI_DIN/2USB_14P mx_c0402 mx_c0402


1

I I GND I
UC7 UR11 GND GND GND
0.1UF/16V 15K GND GND GND
2

mx_c0402 mx_r0402
2

C C

GND GND

URN3B
I 3 4 +5V_KBMS
0
+5V_KB
20 USBN4
1

NI I
UL7 KR11 1 2 4.7K
90OHM/100MHZ/330mA
4

20 USBP4 I

1
KR12 1 2 4.7K
I 1 0 2 NI NI
YD5 YD6 GND
URN3A
BAV99W -L BAV99W -L
NI +5VSB
UU3

3
CM1213_04SO

CH1 1 6CH4
R8525
VN 2 5 VP I YL7 2 1 120Ohm/100Mhz/0.6A KDAT 5% I 1 2 33 Ohm KBDATA 47
R8526
B CH2 3 B
4 CH3 I YL6 2 1 120Ohm/100Mhz/0.6A KCLK I 5% 1 2 33 Ohm KBCLK 47
GND

URN3D
I 7 8 +5V_KBMS
0
mx_c0402
20 USBN5 I YC5 1 2 150PF/50V NPO 5% +5V_KB
I YC6 1 2 150PF/50V NPO 5%
1

NI mx_c0402 I
UL8 KR13 1 2 4.7K
90OHM/100MHZ/330mA
4

20 USBP5 I

1
2

1
GND KR14 1 2 4.7K
I 5 0 6 NI NI
YD7 YD8 GND
URN3C
BAV99W -L BAV99W -L

3
3

R8528
CMSDATA I YL9 2 1 120Ohm/100Mhz/0.6A MDAT 5% I 1 2 33 Ohm MSDATA 47
R8527
CMSCLK I YL8 2 1 120Ohm/100Mhz/0.6A MCLK I 5% 1 2 33 Ohm MSCLK 47
A A

mx_c0402
I YC7 1 2 150PF/50V NPO 5%
I YC8 1 2 150PF/50V NPO 5%
Title
mx_c0402 <Title>

Size Document Number Rev


A3 IPMIP-DP 1.01
GND
IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 34 of 68
5 4 3 2 1
5 4 3 2 1

I
+3P3V U94 IPMIP-GS Change U94 to PS8511
6 VDD1
16 VDD2
7 EN

1
NI I I
TCB1 TCB2 TCB3
1UF/10V 0.1UF/16V 0.01UF/25V

2
mx_c0603 X7R 10%

GND GND GND


D D

21 SATA_TXP5 I TC162 1 2 0.01UF/25V X7R 10% ESATA_TXP5_C 1 A_INp A_OUTp 15 ESATA_TXP5_CONN_C I TC161 1 2 0.01UF/25V X7R 10% SATA_TXP5_C

21 SATA_TXN5 I TC118 1 2 0.01UF/25V X7R 10% ESATA_TXN5_C 2 A_INn A_OUTn 14 ESATA_TXN5_CONN_C I TC117 1 2 0.01UF/25V X7R 10% SATA_TXN5_C

21 SATA_RXP5 I TC109 2 1 0.01UF/25V X7R 10% ESATA_RXP5_C 5 B_OUTp B_INp 11 ESATA_RXP5_CONN_C I TC108 2 1 0.01UF/25V X7R 10% SATA_RXP5_C

21 SATA_RXN5 I TC129 2 1 0.01UF/25V X7R 10% ESATA_RXN5_C 4 B_OUTn B_INn 12 ESATA_RXN5_CONN_C I TC128 2 1 0.01UF/25V X7R 10% SATA_RXN5_C

+3P3V +3P3V
+3P3V +3P3V +3P3V

1
1

1
NI NI
NI NI NI TR4 TR5
TR1 TR2 TR3 4.7K 4.7K
4.7K 4.7K 4.7K J7B

2
9 PS8511B_A_PRE
2

2 PS8511B_AUTOPW _EN 17 A_PRE PS8511B_B_PRE


AUTOPW_EN B_PRE 8 GND3 31
PS8511B_A_EQ 19 20 PS8511B_A_BST# SATA_TXP5_C 36
PS8511B_B_EQ A_EQ A_BST# PS8511B_B_BST# SATA_TXN5_C 35 TXP
NOTE: Parade PS8511B 18 B_EQ B_BST# 10 NOTE: Parade PS8511B TXN
34
GND4

1
Automatic Power Saving Enable: (pin 17) IPD ~150K ohm NI
TR6
NIOutput Pre-emphasis Setting: (pin 9/8) IPD ~150K ohm
TR7 SATA_RXP5_C 32
SATA_RXN5_C 33 RXP
0: Disable 0 0 0: Disable RXN
GND1 3 GND5 37
C C
1: Enable 13 1: Enable

2
GND2 USB_SATA_15P
GND3 21
Input EQ Setting: (pin 19/18) IPD ~150K ohm Output Level Boost Setting: (pin 20/10) IPU ~150K ohm I
GND GND
0: short and medium length PCB traces 0: 800~1200mVpp GND

1: long length PCB traces GND 1: 400~700mVpp


PS8511BTQFN20GTR

E-SATA + Dual USB CONNECTOR

+SBV23

+SBV23 +5V_DUAL_USB_A
J7A I
UF10
B 1.6A/6V B
LP2- 12 11 2 1
USB0- VCC0

1
I

1
LP2+ 13 UCB9 + I
USB0+ 0.1UF/16V UCE10 I

2
820UF/6.3V UR23
8.2K

2
GND

2
20 USBN2 7 0 8
VP
URN2D
OC23# 20
GND

1
LP3- 22 21
USB1- VCC1

1
20 USBP2 5 0 6 I NI

1
VP NI UR24 UC12
URN2C I UCB10 15K 0.1UF/16V

2
LP3+ 23 0.1UF/16V
UU2

2
2
USB1+
2

UL11 CM1213_04SO
90Ohm/100MHz +5VSB 14 GND
CH1 1 GND0
NI 6CH4 24 GND GND
1

GND1
VN 2 5 VP
2

UL12 CH2 3 4 CH3


A 90Ohm/100MHz P_GND1 41 A
NI GND 42
1

P_GND2
P_GND3 43
P_GND4 44
PEGATRON DT-MB RESTRICTED SECRET
20 USBN3 3 0 4
VP
URN2B
USB_SATA_15P
I
Title : RJ45+USB CONN.2
20 USBP3 1 0 2 GND Pegatron Corp. Engineer: Vic_Chen
VP
URN2A Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 35 of 68
5 4 3 2 1
5 4 3 2 1

+3P3V_LAN +2P5V_LAN I
LU1

5 VDD3P3
+3P3V_LAN LJP1 13 LAN_MDI0_P
MDI_PLUS[0] LAN_MDI0_P 37
1 2 SHORT 4 14 LAN_MDI0_N
CTRL_2P5 MDI_MINUS[0] LAN_MDI0_N 37
17 LAN_MDI1_P
MDI_PLUS[1] LAN_MDI1_P 37
SHORTPIN_RECT 18 LAN_MDI1_N
MDI_MINUS[1] LAN_MDI1_N 37
NOBOM 20 LAN_MDI2_P
MDI_PLUS[2] LAN_MDI2_P 37
15 21 LAN_MDI2_N
AVDD2P5_1 MDI_MINUS[2] LAN_MDI2_N 37
19 23 LAN_MDI3_P
AVDD2P5_2 MDI_PLUS[3] LAN_MDI3_P 37
1

1
VP NI NI I I I I I I 29 24 LAN_MDI3_N
DVDD2P5 MDI_MINUS[3] LAN_MDI3_N 37
D LR5 LR6 LCB2 LCB1 LCB3 LCB4 LCB5 LCB6 LCB10 D
0 4.99K 0.01UF/25V 10UF/6.3V 0.1UF/16V 10UF/6.3V 0.1UF/16V 1UF/16V 0.1UF/16V

1
mx_r0805 1% X7R 10% mx_c0805 X5R 10% X7R 10%
X5R 10% mx_c0805 mx_c0603 I I I I I I I I
2

2
LAN_LQ1E LR7 LR8 LR1 LR2 LR9 LR10 LR11 LR12
49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9
GND GND 1% 1% 1% 1% 1% 1% 1% 1%
3
GND GND GND GND

2
E
LAN_1P2V_CTRL 7 MDI0_PN MDI1_PN MDI2_PN MDI3_PN
1 B CTRL_1P2
C
I

1
2 4
LQ1 BCP69-16 +1P2V_AVDD_LAN +1P2V_DVDD_LAN I I I I
LC5 LC6 LC7 LC1
LR13 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
VP 1 0 2 mx_r0603 37 X7R 10% X7R 10% X7R 10% X7R 10%
DVDD1P2_1
47 DVDD1P2_2
1

I I 46 DVDD1P2_3
LC2 LC8
4.7UF/6.3V 4.7UF/6.3V 8 GND GND GND GND
2

X5R 10% X5R 10% AVDD1P2_1


16 AVDD1P2_3
1
1

mx_c0805 mx_c0805 I I 22
LCB7 LCB8 AVDD1P2_4
40 AVDD1P2_5
GND GND 10UF/6.3V 0.1UF/16V
2
2

mx_c0805 VP 1 0 2 LR3 +AVDD43 43


X5R 10% mx_r0603 AVDD1P2_6
VP 1 0 2 LR14 +AVDD11 11
GND GND mx_r0603 AVDD1P2_2
LED2 25 LAN_LED2 37
LED1 27 LAN_LED1 37
+1P8V_LAN 26
C LED0 LAN_ACT# 37 C

6 VCT SMB_DATA 31 SML0_LAN_DATA 19


SMB_CLK 28 SML0_LAN_CLK 19

+3P3V_LAN +3P3V_LAN +3P3V_LAN

1
1
I I

1
LR16 LR17 I
20 LAN_RXP1
I LC4 1 2 0.1UF/16V X7R 10% LAN_RXP_C 38 PETp
3K 3K LR18
20 LAN_RXN1
I LC3 1 2 0.1UF/16V X7R 10% LAN_RXN_C 39 PETn
10K

2
2
41 1 RSVD1
20 LAN_TXP1

2
PERp RSVD_VCC3P3_1 RSVD2
20 LAN_TXN1 42 PERn RSVD_VCC3P3_2 2
3 LAN_DIS I 1 0 2 LR19
LAN_DISABLE_N LAN_DISABLE 22

1
24 CK_100M_LAN 44 PE_CLKP NI
45 LR20
24 CK_100M_LAN# PE_CLKN 10K

2
13,22,47,50,57 PLTRST# VP LR29 1 0 2 82578_RST 36 PE_RST_N
GND
+3P3V_LAN
B B
1

I Pin 48: 10 LAN_XTAL_IN


LR21 XTL_IN
10K For Mobile only, 9 LAN_XTAL_OUT I LR22
XTL_OUT
clock request funtion Y10 0 Ohm
NOBOM
2

O/D 48 Y10_X 1 2 Y10_RX 1 2


22 LAN_CLKREQ# CLK_REQ_N GND
3 25Mhz

1
I I
LC10 LC11
+3P3V_LAN +3P3V_LAN +3P3V_LAN +3P3V_LAN 33PF/50V 33PF/50V

2
NPO 5% NPO 5%
1
1

1
1

NI NI NI NI GND GND GND


LR80 LR30 LR23 LR24 NOTE:
10KOhm 10KOhm 10KOhm 10KOhm The 25MHz input Vswing cannot exceed 1.8 V dc,
if it from clock gen.
2

2
2

L_JTAG_TCK 35
L_JTAG_TMS JTAG_TCK LAN_RBIAS
33 JTAG_TMS RBIAS 12 Refer 82578 datasheet and
IPU TP_LAN_LT3 32
NOBOM TPC26b LT2 1 TP_LAN_LT2 34
JTAG_TDI
49 Piketon/Kings Creek PDG
JTAG_TDO VSS_EPAD
1
TEST_EN 30 I for more detail.
TEST_EN LR26
2

I 2.37K
A
LR25 1% A
1KOhm
2

50 GND1
51
1

GND2
GND GND

GND GND
82578DC
Title : Intel 82578 GIGA
Intel WG82578XX Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
DC:0200-00EP000
DM C0: 0200-005O000
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 36 of 68
5 4 3 2 1
5 4 3 2 1

Change +3p3V to +3P3V_LAN

+3P3V_LAN
36 LAN_ACT#
J9 to 12XA07MGYG00 LAN_LED1 36
I

1
I LU3
LC14 I I
470PF/50V LR27 LR28 CM1213_04SO +5VSB_ATX

2
D X7R 10% 200 200 D
mx_r0603 J9 mx_r0603 LAN_MDI0_P_C CH1 1 6CH4 LAN_MDI0_N_C

2
GND
LANLED2 20 22 LANLED1 VN 2 5 VP
LRN2D ACTLEDP LILEDP
VP

1
7 8 I I LAN_MDI1_P_C CH2 3 4 CH3 LAN_MDI1_N_C
36 LAN_MDI0_P 0
LC12 LC13
VP LRN2C 470PF/50V G G 470PF/50V GND

2
5 6 X7R 10% Y X7R 10% I
36 LAN_MDI0_N 0
NI LL2 GND GND LU4
1 8 19 21 CM1213_04SO
ACTLEDN LILEDN LAN_LED2 36
+5VSB_ATX
2 7 LAN_MDI2_P_C CH1 1 6CH4 LAN_MDI2_N_C
3 6

1
I VN 2 5 VP
4 5 LC15
LAN_MDI0_P_C 10 9 470PF/50V LAN_MDI3_P_C CH2 3 4 CH3 LAN_MDI3_N_C

2
TD1+ CTR X7R 10%
90OHM/100MHz/400mA LAN_MDI0_N_C 11 TD1- GND
VP LRN2B 18 GND
LAN_GND +1P8V_LAN
36 LAN_MDI1_P 3 0 4
LAN_MDI1_P_C 12
LRN2A TD2+
VP
1 2 LAN_MDI1_N_C 13 NIN_VCC_CTR
36 LAN_MDI1_N 0 TD2-

1
LAN_MDI2_P_C 14 I
TD3+ LCB9
C VP LRN1D LAN_MDI2_N_C 15 30 1UF/16V C

2
TD3- LANGND30 X7R 10%
36 LAN_MDI2_P 7 0 8 LANGND29 29
28 mx_c0603
LAN_MDI3_P_C LANGND28
16 TD4+ LANGND27 27
VP LRN1C GND
5 6 LAN_MDI3_N_C 17
36 LAN_MDI2_N 0 TD4-

LL1
1 8 GND

2 7 LP0- 6 1P-
3 6
+SBV01 +5V_DUAL_USB_A
4 5 GND1 8 I
UF7
1.6A/6V
90OHM/100MHz/400mA LP0+ 7 1P+ VCC1 5 2 1
NI
VP LRN1B
36 LAN_MDI3_P 3 0 4

1
I + I
VP LRN1A UCB5 UCE7 I
1 2 0.1UF/16V 820UF/6.3V UR15
36 LAN_MDI3_N 0

2
8.2K

2
LP1- 2 4
2P- GND2
GND
B OC01# 20 B
20 USBN0 7 0 8 VCC2 1
VP GND

1
URN1D

1
LP1+ 3 I NI
2P+ UR16 UC9
15K 0.1UF/16V

2
5 0 6

2
20 USBP0

1
VP NI
URN1C I 26 UCB6
USBGND26 0.1UF/16V
UU1 25

2
USBGND25
2

24 GND GND
UL13 CM1213_04SO USBGND24
USBGND23 23
90Ohm/100MHz +5VSB
CH1 1 6CH4
NI
1

VN 2 5 VP
2

USB_LAN_LED
UL14 CH2 3 4 CH3 I GND GND
90Ohm/100MHz
NI GND
1

20 USBN1 3 0 4
VP
URN1B

A A

20 USBP1 1 0 2
VP
URN1A
PEGATRON DT-MB RESTRICTED SECRET
Title : RJ45+USB CONN.1
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 37 of 68
5 4 3 2 1
5 4 3 2 1

PCI EXPRESS X16 Graphics Card Slot


+12V +3P3V +3P3V
+3P3V +12V
+3P3VSB J41

1
2

1
NI NI

NP_NC1
NP_NC2
B1 A1 XR1 XR2
+12V_1 PRSNT1# 0 0
B2 +12V_2 +12V_3 A2
D B3 A3 D

2
RSVD1 +12V_4
29,30 PCIE_B4 B4 GND1 GND35 A4
1

+ B5 A5 PE16_TCK
18,19,39,40,41,49,50 SMB_CLK_R SMCLK JTAG2

1
I I B6 A6 PE16_A6
XCB2 18,19,39,40,41,49,50 SMB_DATA_R SMDAT JTAG3
1

XCE1 I B7 A7 +3P3V
470uF/16V XCB1 0.1UF/16V GND2 JTAG4
NI XR3 B8 A8 PE16_A8
2

2
0.1UF/16V 0 PE16_TRST# +3.3V_1 JTAG5
1 2 B9 A9
2

JTAG1 +3.3V_2
B10 3.3Vaux +3.3V_3 A10
22,39 W AKE# B11 WAKE# PWRGD A11 PCIES_RST# 39,48
GND GND GND

1
GND NI I + NI NI
B12 A12 XR4 XCB3 XCE2 XC1
XC2 RSVD2 GND36
I 1 2 0.1UF/16V X7R 10% B13 A13 CK_100M_PE16 24
0 0.1UF/16V 820UF/6.3V 0.1UF/16V

2
12 EXP_TXP0 EXP_TXP0_C GND3 REFCLK+
B14 A14 CK_100M_PE16# 24

2
12 EXP_TXN0 XC3 HSOP0 REFCLK-
I 1 2 0.1UF/16V X7R 10% EXP_TXN0_C B15 HSON0 GND37 A15
B16 GND4 HSIP0 A16 EXP_RXP0 12
B17 PRSNT2_1# HSIN0 A17 EXP_RXN0 12
B18 GND5 GND38 A18
GND GND GND GND
I XC4 1 2 0.1UF/16V X7R 10%
12 EXP_TXP1 EXP_TXP1_C
12 EXP_TXN1 B19 HSOP1 RSVD6 A19
I XC5 1 2 0.1UF/16V X7R 10% EXP_TXN1_C B20 A20
HSON1 GND39
B21 GND6 HSIP1 A21 EXP_RXP1 12
I XC6 1 2 0.1UF/16V X7R 10% B22 A22
12 EXP_TXP2 GND7 HSIN1 EXP_RXN1 12
EXP_TXP2_C B23 A23
12 EXP_TXN2 XC7 HSOP2 GND40
I 1 2 0.1UF/16V X7R 10% EXP_TXN2_C B24 HSON2 GND41 A24
B25 GND8 HSIP2 A25 EXP_RXP2 12
C I XC8 1 2 0.1UF/16V X7R 10% B26 A26 C
12 EXP_TXP3 GND9 HSIN2 EXP_RXN2 12
EXP_TXP3_C B27 A27
12 EXP_TXN3 XC9 HSOP3 GND42
I 1 2 0.1UF/16V X7R 10% EXP_TXN3_C B28 HSON3 GND43 A28
B29 GND10 HSIP3 A29 EXP_RXP3 12
B30 RSVD3 HSIN3 A30 EXP_RXN3 12
B31 PRSNT2_2# GND44 A31
B32 GND11 RSVD7 A32

I XC10 1 2 0.1UF/16V X7R 10%


12 EXP_TXP4 EXP_TXP4_C
12 EXP_TXN4 B33 HSOP4 RSVD8 A33
I XC11 1 2 0.1UF/16V X7R 10% EXP_TXN4_C B34 A34
HSON4 GND45
B35 GND12 HSIP4 A35 EXP_RXP4 12
I XC12 1 2 0.1UF/16V X7R 10% B36 A36
12 EXP_TXP5 GND13 HSIN4 EXP_RXN4 12
EXP_TXP5_C B37 A37
12 EXP_TXN5 XC13 1 HSOP5 GND46
I 2 0.1UF/16V X7R 10% EXP_TXN5_C B38 HSON5 GND47 A38
B39 GND14 HSIP5 A39 EXP_RXP5 12
I XC14 1 2 0.1UF/16V X7R 10% B40 A40
12 EXP_TXP6 GND15 HSIN5 EXP_RXN5 12
EXP_TXP6_C B41 A41
12 EXP_TXN6 XC15 1 HSOP6 GND48
I 2 0.1UF/16V X7R 10% EXP_TXN6_C B42 HSON6 GND49 A42
B43 GND16 HSIP6 A43 EXP_RXP6 12
I XC16 1 2 0.1UF/16V X7R 10% B44 A44
12 EXP_TXP7 GND17 HSIN6 EXP_RXN6 12
EXP_TXP7_C B45 A45
12 EXP_TXN7 XC17 1 HSOP7 GND50
I 2 0.1UF/16V X7R 10% EXP_TXN7_C B46 HSON7 GND51 A46
B47 GND18 HSIP7 A47 EXP_RXP7 12
B48 PRSNT2_3# HSIN7 A48 EXP_RXN7 12
B49 GND19 GND52 A49
I XC18 1 2 0.1UF/16V X7R 10% EXP_TXP8_C B50 A50
EXP_TXN8_C HSOP8 RSVD9
12 EXP_TXP8 B51 HSON8 GND53 A51
I XC19 1 2 0.1UF/16V X7R 10% B52 A52
B 12 EXP_TXN8 GND20 HSIP8 EXP_RXP8 12 B
B53 GND21 HSIN8 A53 EXP_RXN8 12
I XC20 1 2 0.1UF/16V X7R 10% EXP_TXP9_C B54 A54
EXP_TXN9_C HSOP9 GND54
12 EXP_TXP9 B55 HSON9 GND55 A55
I XC21 1 2 0.1UF/16V X7R 10% B56 A56
12 EXP_TXN9 GND22 HSIP9 EXP_RXP9 12
B57 GND23 HSIN9 A57 EXP_RXN9 12
I XC22 1 2 0.1UF/16V X7R 10% EXP_TXP10_C B58 A58
EXP_TXN10_C HSOP10 GND56
12 EXP_TXP10 B59 HSON10 GND57 A59
I XC23 1 2 0.1UF/16V X7R 10% B60 A60
12 EXP_TXN10 GND24 HSIP10 EXP_RXP10 12
B61 GND25 HSIN10 A61 EXP_RXN10 12
I XC24 1 2 0.1UF/16V X7R 10% EXP_TXP11_C B62 A62
EXP_TXN11_C HSOP11 GND58
12 EXP_TXP11 B63 HSON11 GND59 A63
I XC25 1 2 0.1UF/16V X7R 10% B64 A64
12 EXP_TXN11 GND26 HSIP11 EXP_RXP11 12
B65 GND27 HSIN11 A65 EXP_RXN11 12
I XC26 1 2 0.1UF/16V X7R 10% EXP_TXP12_C B66 A66
EXP_TXN12_C HSOP12 GND60
12 EXP_TXP12 B67 HSON12 GND61 A67
I XC27 1 2 0.1UF/16V X7R 10% B68 A68
12 EXP_TXN12 GND28 HSIP12 EXP_RXP12 12
B69 GND29 HSIN12 A69 EXP_RXN12 12
I XC28 1 2 0.1UF/16V X7R 10% EXP_TXP13_C B70 A70
EXP_TXN13_C HSOP13 GND62
12 EXP_TXP13 B71 HSON13 GND63 A71
I XC29 1 2 0.1UF/16V X7R 10%
12 EXP_TXN13
B72 GND30 HSIP13 A72 EXP_RXP13 12
B73 GND31 HSIN13 A73 EXP_RXN13 12
I XC30 1 2 0.1UF/16V X7R 10% EXP_TXP14_C B74 A74
12 EXP_TXP14 EXP_TXN14_C HSOP14 GND64
12 EXP_TXN14 B75 HSON14 GND65 A75
I XC31 1 2 0.1UF/16V X7R 10% B76 A76
GND32 HSIP14 EXP_RXP14 12
B77 GND33 HSIN14 A77 EXP_RXN14 12
I XC32 1 2 0.1UF/16V X7R 10% EXP_TXP15_C B78 A78
12 EXP_TXP15 EXP_TXN15_C HSOP15 GND66
12 EXP_TXN15 B79 HSON15 GND67 A79
A I XC33 1 2 0.1UF/16V X7R 10% B80 A80 A
GND34 HSIP15 EXP_RXP15 12
B81 PRSNT2_4# HSIN15 A81 EXP_RXN15 12
B82 RSVD4 GND68 A82

PCI_EXPRESS_X16
PEGATRON DT-MB RESTRICTED SECRET
I
GND Title : PCI EXPRESS X16
GND Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 38 of 68
5 4 3 2 1
5 4 3 2 1

D
PCI Express x1 SLOT D

+3P3V +3P3V

1
I NI NI
X1R1 X1R2
+3P3VSB +12V J31 0 0 +12V
SLOT 36P,PCI-E X1

2
+3P3V B1 A1
+12V_1 PRSNT1#
B2 +12V_2 +12V_3 A2
B3 +12V_5 +12V_4 A3
B4 GND1 GND6 A4
B5 A5 PE1_TCK
18,19,38,40,41,49,50 SMB_CLK_R SMCLK JTAG2 PE1_A6 +3P3V
18,19,38,40,41,49,50 SMB_DATA_R B6 SMDAT JTAG3 A6
B7 GND2 JTAG4 A7
B8 A8 PE1_A8
PE1_TRST# +3.3V_1 JTAG5
B9 JTAG1 +3.3V_2 A9
B10 3.3Vaux +3.3V_3 A10
22,38 W AKE# B11 WAKE# PWRGD A11 PCIES_RST# 38,48

1
1

1
+ NI I NI

1
I X1CB1 X1CB2 NI I GND X1R3 I NI
X1CE1 0.1UF/16V 0.1UF/16V X1R4 X1CB3 0 X1CB4 X1CB5
2

2
C 820UF/6.3V 0 0.1UF/16V 0.1UF/16V 0.1UF/16V C
2

2
2
GND GND GND GND GND GND
GND GND B12 RSVD2 GND7 A12
B13 GND3 REFCLK+ A13 CK_100M_PE1 24
I X1C1 1 2 0.1UF/16V X7R 10% PE1_TXP1_C B14 A14
20 PE1_TXP1 HSOP0 REFCLK- CK_100M_PE1# 24
I X1C2 1 2 0.1UF/16V X7R 10% PE1_TXN1_C B15 A15
20 PE1_TXN1 HSON0 GND8
B16 GND4 HSIP0 A16 PE1_RXP1 20
1.Place Near to slot B17 PRSNT2_1# HSIN0 A17 PE1_RXN1 20
B18 A18
2.Please check if another side already GND5 GND9
have installed serial capacitor
NP_NC1 1
NP_NC2 2

GND GND

B B

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : PCI EXPRESS X1
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 39 of 68
5 4 3 2 1
5 4 3 2 1

+5V +3P3V -12V +5V +3P3V


19,41 A_D[0..31]
D D

+5V +5V

1
I +

1
I KCB4 I NOBOM NOBOM
KCB3 0.1UF/16V KCE8 KR6 KR7

2
0.1UF/16V Y5V +80-20% 820UF/6.3V 0Ohm 0Ohm

2
Y5V +80-20% 5% 5%
I

2
+12V
GND
J20 GND GND
SLOT 120P, PCI
B1 A1 PCI2_TRST#
PCI2_TCK -12V TRST
B2 TCK +12V A2
B3 A3 PCI2_TMS
GND11 TMS PCI2_TDI
B4 TDO TDI A4

1
B5 +5V22 +5V1 A5 NOBOM
B6 A6 KR8
+5V23 INTA INTA# 19,41
19,41 INTB# B7 INTB INTC A7 INTC# 19,41 0Ohm
19,41 INTD# B8 INTD +5V2 A8 5%
PCI2_PRSNT1# B9 A9

2
PRSNT1 RESERVED1
B10 RESERVED5 +5V3 A10
PCI2_PRSNT2# B11 A11 +3P3VSB
PRSNT2 RESERVED2
B12 GND12 GND1 A12
1

NOBOM B13 GND13 GND2 A13 GND


KR5 B14 A14
RESERVED6 RESERVED3
1
1

C 0Ohm NI NI B15 A15 C


GND14 RST PCH_PCIRST# 19,41
5% KC3 KC4 B16 A16
0.1UF/16V 0.1UF/16V 24 CK_33M_SL1 CLK +5V4
B17 A17 GNT0# 19
2
2

GND15 GNT

1
Y5V +80-20% Y5V +80-20% 19,41 REQ0# B18 REQ GND3 A18 I
B19 A19 KCB6
+5V8 RESERVED4 PME# 19,41
B20 A20 0.1UF/16V
A_D30 19,41

2
19,41 A_D31 AD31 AD30
19,41 A_D29 B21 AD29 +3.3V1 A21 Y5V +80-20%
GND GND GND B22 GND16 AD28 A22 A_D28 19,41
19,41 A_D27 B23 AD27 AD26 A23 A_D26 19,41
19,41 A_D25 B24 AD25 GND4 A24
B25 +3.3V7 AD24 A25 A_D24 19,41 GND
B26 A26 A_D20
19,41 C/BE3# C/BE3 IDSEL
19,41 A_D23 B27 AD23 +3.3V2 A27
B28 GND17 AD22 A28 A_D22 19,41
19,41 A_D21 B29 AD21 AD20 A29 A_D20 19,41
19,41 A_D19 B30 AD19 GND5 A30
B31 +3.3V8 AD18 A31 A_D18 19,41
19,41 A_D17 B32 AD17 AD16 A32 A_D16 19,41
19,41 C/BE2# B33 C/BE2 +3.3V3 A33
B34 GND18 FRAME A34 FRAME# 19,41
19,41 IRDY# B35 IRDY GND6 A35
B36 +3.3V9 TRDY A36 TRDY# 19,41
19,41 DEVSEL# B37 DEVSEL GND7 A37
B38 GND19 STOP A38 STOP# 19,41
19,41 PLOCK# B39 LOCK +3.3V4 A39
19,41 PERR# B40 PERR SDONE A40 SMB_CLK_R 18,19,38,39,41,49,50
B41 +3.3V10 SBO A41 SMB_DATA_R 18,19,38,39,41,49,50
19,41 SERR# B42 SERR GND8 A42
B43 +3.3V11 PAR A43 PAR 19,41
B B
19,41 C/BE1# B44 C/BE1 AD15 A44 A_D15 19,41
19,41 A_D14 B45 AD14 +3.3V5 A45
B46 GND20 AD13 A46 A_D13 19,41
19,41 A_D12 B47 AD12 AD11 A47 A_D11 19,41
19,41 A_D10 B48 AD10 GND9 A48
B49 GND21 AD9 A49 A_D9 19,41

19,41 A_D8 B52 AD8 C/BE0 A52 C/BE0# 19,41


19,41 A_D7 B53 AD7 +3.3V6 A53
B54 +3.3V12 AD6 A54 A_D6 19,41
19,41 A_D5 B55 AD5 AD4 A55 A_D4 19,41
19,41 A_D3 B56 AD3 GND10 A56
B57 A57 +5V
GND22 AD2 A_D2 19,41
19,41 A_D1 B58 AD1 AD0 A58 A_D0 19,41
B59 A59
hold_NC1

hold_NC2

ACK64#_2 +5V9 +5V5 REQ64#_2 KRN8B 3


B60 ACK64 REQ64 A60 I 2.7KOHM4
B61 +5V10 +5V6 A61
KRN8A 1 5%
B62 +5V11 +5V7 A62 I 2.7KOHM2
5%
1

GND GND

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : PCI EXPRESS X4
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 40 of 68
5 4 3 2 1
5 4 3 2 1

+5V +3P3V -12V +5V +3P3V


19,40 A_D[0..31] 0201 modify
(KCE2 & KCE8 choose one)

+5V +5V

1
+ I +

1
D I I KCB1 NI NOBOM NOBOM D
KCE1 KCB2 0.1UF/16V KCE2 KR1 KR2

2
820UF/6.3V 0.1UF/16V 820UF/6.3V 0Ohm 0Ohm

2
5% 5%
I

2
+12V
GND GND
J21 GND GND
SLOT 120P, PCI
B1 A1 PCI1_TRST#
PCI1_TCK -12V TRST
B2 TCK +12V A2
B3 A3 PCI1_TMS
GND11 TMS PCI1_TDI
B4 TDO TDI A4

1
B5 +5V22 +5V1 A5 NOBOM + NI
B6 A6 KR3 KCE3
+5V23 INTA INTB# 19,40
19,40 INTC# B7 INTB INTC A7 INTD# 19,40 0Ohm 470uF/16V
B8 A8 5%

2
PCI1_PRSNT1# 19,40 INTA# INTD +5V2
B9 A9

2
PRSNT1 RESERVED1
B10 RESERVED5 +5V3 A10
PCI1_PRSNT2# B11 A11 +3P3VSB
PRSNT2 RESERVED2
B12 GND12 GND1 A12
1

NOBOM B13 GND13 GND2 A13 GND GND


KR4 B14 A14
RESERVED6 RESERVED3
1

0Ohm NI NI B15 GND14 RST A15 PCH_PCIRST# 19,40


5% KC1 KC2 B16 A16
0.1UF/16V 0.1UF/16V 24 CK_33M_SL2 CLK +5V4
B17 A17 GNT1# 19
2
2

GND15 GNT

1
1
19 REQ1# B18 REQ GND3 A18 I +
B19 A19 KCB5 NI
+5V8 RESERVED4 PME# 19,40
B20 A20 0.1UF/16V KCE4
A_D30 19,40

2
19,40 A_D31 AD31 AD30 820UF/6.3V
B21 A21

2
C 19,40 A_D29 AD29 +3.3V1 C
GND GND GND B22 GND16 AD28 A22 A_D28 19,40
19,40 A_D27 B23 AD27 AD26 A23 A_D26 19,40
19,40 A_D25 B24 AD25 GND4 A24
B25 +3.3V7 AD24 A25 A_D24 19,40 GND GND
B26 A26 A_D19
19,40 C/BE3# C/BE3 IDSEL
19,40 A_D23 B27 AD23 +3.3V2 A27
B28 GND17 AD22 A28 A_D22 19,40
19,40 A_D21 B29 AD21 AD20 A29 A_D20 19,40
19,40 A_D19 B30 AD19 GND5 A30
B31 +3.3V8 AD18 A31 A_D18 19,40
19,40 A_D17 B32 AD17 AD16 A32 A_D16 19,40
19,40 C/BE2# B33 C/BE2 +3.3V3 A33
B34 GND18 FRAME A34 FRAME# 19,40
19,40 IRDY# B35 IRDY GND6 A35
B36 +3.3V9 TRDY A36 TRDY# 19,40
19,40 DEVSEL# B37 DEVSEL GND7 A37
B38 GND19 STOP A38 STOP# 19,40
19,40 PLOCK# B39 LOCK +3.3V4 A39
19,40 PERR# B40 PERR SDONE A40 SMB_CLK_R 18,19,38,39,40,49,50
B41 +3.3V10 SBO A41 SMB_DATA_R 18,19,38,39,40,49,50
19,40 SERR# B42 SERR GND8 A42
B43 +3.3V11 PAR A43 PAR 19,40
19,40 C/BE1# B44 C/BE1 AD15 A44 A_D15 19,40
19,40 A_D14 B45 AD14 +3.3V5 A45
B46 GND20 AD13 A46 A_D13 19,40
19,40 A_D12 B47 AD12 AD11 A47 A_D11 19,40
19,40 A_D10 B48 AD10 GND9 A48
B49 GND21 AD9 A49 A_D9 19,40
B B

19,40 A_D8 B52 AD8 C/BE0 A52 C/BE0# 19,40


19,40 A_D7 B53 AD7 +3.3V6 A53
B54 +3.3V12 AD6 A54 A_D6 19,40
19,40 A_D5 B55 AD5 AD4 A55 A_D4 19,40
19,40 A_D3 B56 AD3 GND10 A56
B57 A57 +5V
GND22 AD2 A_D2 19,40
19,40 A_D1 B58 AD1 AD0 A58 A_D0 19,40
B59 A59
hold_NC1

hold_NC2

ACK64#_1 +5V9 +5V5 REQ64#_1 I KRN8D 7 5%


B60 ACK64 REQ64 A60 2.7KOHM 8
B61 +5V10 +5V6 A61
B62 A62 I KRN8C 5 2.7KOHM 6 5%
+5V11 +5V7
1

GND GND

+3P3V +5V
A A

I KRN3A 1 2 I KRN6B 3 4
19,40 INTA# 8.2K 19,40 PERR# 2.7K
I KRN2D 7 8 I KRN6A 1 2
19,40 INTC# 8.2K 19,40 SERR# 2.7K
+3P3V KRN4D KRN6C 5 6
19 INTF# I
I KRN2B
7
3
8.2K 8
4
19,40 PLOCK#
I
I KRN7A 1
2.7K
2
PEGATRON DT-MB RESTRICTED SECRET
19 INTG# 8.2K 19,40 DEVSEL# 2.7K

19,40 REQ0# I
I
KRN4B
KRN3B
3
3
8.2K 4
4
19,40 INTB# I
I
KRN4A
KRN3C
1
5
8.2K 2
6
19,40 IRDY#
I
I
KRN7C
KRN6D
5
7
2.7K 6
8
Title : PCI1 SLOT
19 REQ1# 8.2K 19,40 INTD# 8.2K 19,40 STOP# 2.7K
I KRN4C 5 6 I KRN2A 1 2 I KRN7D 7 8 Engineer:
19 REQ3#
I KRN3D 7
8.2K
8
19 INTE#
I KRN2C 5
8.2K
6
19,40 FRAME#
I KRN7B 3
2.7K
4
Pegatron Corp. Vic_Chen
19 REQ2# 8.2K 8.2K 19,40 TRDY# 2.7K
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 41 of 68
5 4 3 2 1
5 4 3 2 1

+3P3V
Note:(AD48) AU22
I AR34 75
For some power supply , +5VSB
Please noite: 1 DVDD1 LINE1_R 24 F_LIN1_RC I AC5 1 2 4.7UF/6.3V X5R 10% I_F_LIN1_RC 1 2 LIN1_R_C 44
9 mx_c0805 I AR35 75
DVDD2
drop before +12V when AC AZ_BITCLK need add LINE1_L 23 F_LIN1_LC I AC7 1 2 4.7UF/6.3V X5R 10%
mx_c0805
I_F_LIN1_LC 1 2 LIN1_L_C 44

1
power out (S0 --> G3) , +12V NI I

will current back to +5VSB a serial res(22 ohm) ACB1


0.1UF/16V
ACB2
0.1UF/16V
4
7
DVSS1

2
DVSS2
I AR15 75
If your power supply has this Y5V +80-20% Y5V +80-20%

sequence issue , please near SB side FRONT_OUT_R 36 FRONT_RC I ACE4 1 2 10UF/25V I_FRONT_R_C 1 2
I AR16 75
FRONT_R_C 44

+
GND GND GND FRONT_OUT_L 35 FRONT_LC I ACE5 1 2 10UF/25V I_FRONT_L_C 1 2 FRONT_L_C 44
D
install AD48 instead of AQ1 D

+
I
AR1
33
1 2 RSDATA_IN0 8
22 SDATA_IN0 SDATA_IN
22 SDATA_OUT_1 5 SDATA_OUT I AR30 75
22 AZ_SYNC_1 10 SYNC MIC1_R 22 MIC1_RC I AC11 1 2 4.7UF/6.3V X5R 10% I_MIC1_R_C 1 2 MIC1_R_C 44
11 mx_c0805 I AR31 75
22 AZ_RST#_1 RESET#
6 21 MIC1_LC I AC18 1 2 4.7UF/6.3V X5R 10% I_MIC1_L_C 1 2
22 AZ_BITCLK_1 BIT_CLK MIC1_L MIC1_L_C 44
mx_c0805

1
NI NI
AC3 AC4
10PF/50V 22PF/50V 12 13 SENSE_A 44

2
PCBEEP SENSE_A
NPO 5% NPO 5%

I AR2 75
GND GND LINE2_R 15 LIN2_RC I ACE6 1 2 100uF/16V R_LIN2_RC 1 2 LIN2_R_C 43
I AR5 75

+
NI
AD48 LINE2_L 14 LIN2_LC I ACE7 1 2 100uF/16V R_LIN2_LC 1 2 LIN2_L_C 43

+
1 BAT54CW
3
2
I AR4 75
2 GPIO0/DMIC-CLK/SPDIFO2 MIC2_R 17 MIC2_RC I ACE8 1 2 100uF/16V I_MIC2_R_C 1 2 MIC2_R_C 43
3 I AR6 75

+
GPIO1/DMIC-DATA
MIC2_L 16 MIC2_LC I ACE9 1 2 100uF/16V I_MIC2_L_C 1 2 MIC2_L_C 43

+
C NI 1 0 2 AR23 Provision AR23 for ALC888S-VC codec C
/ALC888S-VC AQ1

ALC888S Rev. A
+5VSB +5VA 34
NTR4502PT1G SENSE_B SENSE_B 43,44
I
25
S

3 D

AVDD1
2

+12V I 38 AVDD2
AR7
G

100K 33
1

AGPIO
5%
1

1
1
1 2 AZ_AVDD_GATE + I I I 32 MIC1_VREF_R 44
ACE10 ACB4 ACB5 MIC1_VREFO_R
26 AVSS1
1

NI 100uF/16V 0.1UF/16V 0.1UF/16V 42 28 MIC1_VREF_L 44

2
ACB3 2 AVSS2 MIC1_VREFO_L
X7R 10% X7R 10%
2
1

I I 10UF/6.3V 37
PIN37_VREFO
2
1

AC26 AR8 X5R 10%


0.22UF/16V 100K mx_c0805 29
AGND LINE1_VREFO
X7R 10% 5% AGND AGND AGND
2

mx_c0603 30 MIC2_VREF 43
MIC2_VREFO
2

LINE2_VREFO 31 LIN2_VREF 43
27 ALC_VREF
D2 VREF
GND GND AGND ACE864
CD_R 2 11UF/10V CD_RC 20
Digital CD_R

1
1 I/EVT I
I G AQ3_G ACE865 ACB6
S
3 IPDH6N03LAG CD_L 2 1 1UF/10V CD_LC 18 10UF/6.3V

2
AU2 CD_L
B Region +12V

8 1 +5VA_AZ
I AQ3
CG_R 1
AC6
I/EVT

2
1UF/10V CD_GND
19 CD_GND
X5R 10%
B

Vin Vout
I/EVT AGND
7 GND4 GND1 2
1

+ NI
1

6 3 ACE11 I AR17 75
I/662 NI
GND3 GND2
100uF/16V AC2 46 SURB_RC I/662 NIACE868 1 2 10UF/25V I_SURB_R_C 1 2
SIDESURR_OUT_R SURB_R_C 44
0.1UF/16V AR18 75

+
5 4
SURB_LC I/662 NIACE869 1 I/662 NI
2

NC2 NC1
SIDESURR_OUT_L 45 2 10UF/25V I_SURB_L_C 1 2 SURB_L_C 44

+
78L05
AR19 75
I/662 NI ACE870 1 I/662 NI
LFE_OUT 44 LEFC 2 10UF/25V I_LEF_C 1 2 LEF_C 44
AGND AGND AGND AR20 75

+
GND I/662 NI
1 1M 2 43 CENC I/662 NI ACE871 1 2 10UF/25V I_CEN_C 1 2
CEN_OUT CEN_C 44
AR9

+
I
AR21 75
I/662 NI
I 47 41 SUR_RC I/662 NIACE872 1 2 10UF/25V I_SUR_R_C 1 2
NI SPDIFI/EAPD SURR_OUT_R SUR_R_C 44
1

ACB7 AR22 75

+
AC41 I/662 NI
10UF/16V 100PF/50V 48 39 SUR_LC I/662 NIACE873 1 2 10UF/25V I_SUR_L_C 1 2
43 SPDIF_OUT1 SPDIFO SURR_OUT_L SUR_L_C 44
X5R 10%

+
1 2
2

mx_c0805
NPO 5% 40 AUD_JD_REF
JDREF
AR73 0

1
1 2 I I
AR11
AR72 0
GND 1 2 NI 20KOhm
ALC888S_GR 1%
A AR71
1
0
2 I ALC662 02X611003200 A

2
I
AR74 0
1 2 NI
CD1
AR43 5% I/EVT
AR69
1
0
2 I CD_R 1 1KOhm 2CD_R_R
4 AR45 AGND PEGATRON DT-MB RESTRICTED SECRET
JP4 3CG_R_R1 2 CG_R
1
SHORTPIN
2
CD_L
AR44 5% I/EVT
1 1KOhm 2CD_L_R
1
2
1KOhm
Title : AUDIO CODEC
NOBOM 5% Pegatron Corp. Engineer: Vic_Chen
W AFER_BOX_4P I/EVT
AGND GND Size Project Name Rev
PLACE NEAR front audio CODEC FOR EMI I/EVT A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 42 of 68
5 4 3 2 1
5 4 3 2 1

D D

But for other customers (ex,


Intel, EPSON, FSC,
Dell......etc), they might don't
NI
AC30
need 6+3 configuration, just
100PF/50V
NPO 5% general 6+2 type. If so,
1 2

I +5V
please change LINE1 (Pin
AR78
0 J100 23/24) to Rear Line-In port
1 2 1
AL8 AR77
3 SPDIF_O1_L 2 1 SPDIF_OUT1_L
I 1 2 0 mx_r0603 SPDIF_OUT1 42
instead of CD-IN, because
4

2
120Ohm/100Mhz/0.6A CD-IN (Pin 18/19/20) port is

1
HEADER_1X4P_K2 I AR52
AGND GND I I
AC38 200 AC42
PLACE NEAR front audio header FOR EMI 0.1UF/16V 100PF/50V only dedicated input port

2
C NI C
NPO 5%

1
I and can't retasking
GND GND

GND

AD4
2 MIC2_VREF_R I 5% 1 ARN15A
4.7KOHM2
42 MIC2_VREF 3
1 MIC2_VREF_L I 5% 3 ARN15B
4.7KOHM4

BAW 56W PT
I
Front Audio Header
AD5
2 LIN2_VREF_R I 5% 5 ARN15C
4.7KOHM6
3 +3P3V
42 LIN2_VREF
1 LIN2_VREF_L I 5% 7 ARN15D
4.7KOHM8

1
BAW 56W PT AR38
I Color = Green 4.7KOHM
5%
P23

2
I
I AL4 1 2 120Ohm/100Mhz/0.6A MIC2_L 1 2
B 42 MIC2_L_C B
I AL3 1 2 120Ohm/100Mhz/0.6A MIC2_R 3 4
42 MIC2_R_C F_AUDIO_DET# 22
42 LIN2_R_C I AR80 1 2 0 mx_r0603 LIN2_R 5 6 MIC2_RTU
7
42 LIN2_L_C I AR81 1 2 0 mx_r0603 LIN2_L 9 10 LIN2_RTU

1
HEADER_2X5P_K8 ACB10
I 0.1UF/16V

2
1
1

1
Y5V +80-20%
AC28 AC29 AC31 AC43
NI
1

100PF/50V 100PF/50V 100PF/50V 100PF/50V

2
2

2
AR47 AR48 AR49 AR50 NPO 5% NPO 5% NPO 5% NPO 5%

1
22KOHM 22KOHM 22KOHM 22KOHM AGND GND
I I I I AR39 AR51
5% 5% 5% 5%
39.2KOHM 20KOhm
2

NI NI NI NI
AGND AGND AGND AGND 1% 1%

2
I I

AGND AGND AGND AGND

AR53

42,44 SENSE_B 2 1

47 Ohm
5% AGND

1
I
A AC32 A
100PF/50V

2
NPO 5%
NI PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>

AGND
Title : FORNT AUDIO CONN.
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 43 of 68

5 4 3 2 1
5 4 3 2 1

Azalia Rear Audio Connector


IPMIP-GS R1.01 Change port
D D

SENSE_A
42 SENSE_A
I/662 NI
42,43 SENSE_B J86
AUDIO_6IN1_AZA_26P

42 LIN1_L_C I AR56 1 2 0 mx_r0603 LIN1_L 10 L L 23 CEN I/662 NI AR62 1 2 0 mx_r0603 CEN_C 42


I AR68 1 2 10KOhm 1% LIN1_JD 11 B O 24 CEN_JD I/662 NI AR36 1 2 10KOhm 1%
12 PORT3 PORT6 25
42 LIN1_R_C I AR57 1 2 0 mx_r0603 LIN1_R 13 R R 26 LEF I/662 NI AR63 1 2 0 mx_r0603 LEF_C 42

42 FRONT_L_C I AR58 1 2 0 mx_r0603 FRONT_L 6 L L 19 SUR_L I/662 NI AR64 1 2 0 mx_r0603 SUR_L_C 42


I AR33 1 2 5.1KOHM 1% FRONT_JD 7 L B 20 SUR_JD I/662 NI AR29 1 2 39.2KOHM 1%
8 PORT2 PORT5 21
42 FRONT_R_C I AR70 1 2 0 mx_r0603 FRONT_R 9 R R 22 SUR_R I/662 NI AR65 1 2 0 mx_r0603 SUR_R_C 42

42 MIC1_L_C I AR60 1 2 0 mx_r0603 MIC1_L 2 L L 15 SURB_L I/662 NI AR66 1 2 0 mx_r0603 SURB_L_C 42


I AR32 1 2 20KOhm 1% MIC1_JD 3 16 SURB_JD I/662 AR37
NI 1 2 5.1KOHM 1%
P G
4 PORT1 PORT4 17
42 MIC1_R_C I AR61 1 2 0 mx_r0603 MIC1_R 5 18 SURB_R I/662 NI AR67 1 2 0 mx_r0603 SURB_R_C 42
1 R R 14

1
1

1
31 NC1 GND3 27
2
2

AC14 AC15 AC16 AC17 AC19 AC25 32 GND4 28 AC20 AC21 AC22 AC23 AC24 AC27
4.7K 4.7K NC2
100PF/50V
100PF/50V 100PF/50V
100PF/50V 100PF/50V
100PF/50V 33 GND1 GND5 29 100PF/50V
100PF/50V 100PF/50V 100PF/50V
100PF/50V
100PF/50V

2
2

2
2

2
2

2
AR10 AR12 34 30
NPO 5% NPO 5% NPO 5% NPO 5% NPO 5% NPO 5% GND2 GND6 NPO 5% NPO 5% NPO 5% NPO 5% NPO 5% NPO 5%
C I I C
I I I I I I AGND_C I/662 NI I/662 NI I/662 NI I/662 NI I/662 NI I/662 NI
1
1

42 MIC1_VREF_R

2
42 MIC1_VREF_L AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND
JP19
SHORTPIN
NOBOM

1
AGND AGND

0209 EMI request


J86 & J87 colay NI
C45
NI
C46 NI NI
J87 0.1UF/16V 0.1UF/16V C71 C72
LIN1_L 32 L 1 2 1 2 0.1UF/16V 0.1UF/16V
LIN1_JD 33 1 2 1 2
34 PORT3 B
LIN1_R 35 R

FRONT_L 22 L AGND GND AGND GND


FRONT_JD 23 AGND GND AGND GND
B PORT2 B
24
R
L
FRONT_R 25

MIC1_L 2 L
MIC1_JD 3
PORT1
4
R
P
MIC1_R 5
AGND_C 1

G1 P_GND1 NP_NC1 P1
G2 P_GND2
AGND G3 P_GND3
G4 P_GND4

AUDIO_3IN1_AZA_13P
NI/662 I

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : REAR AUDIO CONN.
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 44 of 68
5 4 3 2 1
5 4 3 2 1

NOTE:
Check USB cable internal whether had capacity
+SBV89 NI:BPC I +5V_DUAL_USB_B
I: CPC UF8
1.6A/6V
2 1

1
I +

1
UCB7 I
D 0.1UF/16V UCE8 I D

2
I 470uF/6.3V UR17

2
8.2K
P151

2
HEADER_2X5P_K9
1 2 GND GND
3 4 LP8- 3 4 LP9-
20 USBN8 0
VP LP8 5 6 LP9+
URN5B OC89# 20
7 8
10

1
NI
1 2 I UC10
20 USBP8 0
VP UR19 0.1UF/16V

2
URN5A I GND GND 15K
NI UU5

2
1

4
90Ohm/100MHz CM1213_04SO
UL3 +5VSB
CH1 1 6CH4 GND GND
2

VN 2 5 VP
NI
1

90Ohm/100MHz CH2 3 4 CH3


UL4
GND
2

C C

20 USBN9 7 0 8
VP
URN5D

20 USBP9 5 0 6
VP NOTE:
URN5C
Check USB cable internal whether had capacity
+SBV1011 NI: BPC I +5V_DUAL_USB_B
I: CPC UF9
1.6A/6V
2 1

1
I +

1
UCB8 I
0.1UF/16V UCE9 I

2
I 470uF/6.3V UR20

2
8.2K
P152

2
HEADER_2X5P_K9
1 2 GND GND
3 4 LP10- 3 4 LP11-
20 USBN10 0
VP LP10+ 5 6 LP11+
URN6B OC1011# 20
7 8
10
B B

1
NI
1 2 I UC11
20 USBP10 0
VP UR22 0.1UF/16V

2
URN6A I GND GND 15K
UU6

2
NI
1

CM1213_04SO
90Ohm/100MHz +5VSB
UL5 CH1 1 6CH4 GND GND
2

VN 2 5 VP
NI
1

CH2 3 4 CH3
90Ohm/100MHz
UL6 GND
2

20 USBN11 7 0 8
VP
URN6D

20 USBP11 5 0 6
VP
A URN6C A

PEGATRON DT-MB RESTRICTED SECRET


Title : USB HEADER CON.
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 45 of 68
5 4 3 2 1
5 4 3 2 1

NOTE:
Check USB cable internal whether had capacity
+SBV1213 NI: BPC I +5V_DUAL_USB_B
I: CPC UF11
1.6A/6V
2 1

1
I +

1
UCB11 I
0.1UF/16V UCE11 I

2
I 470uF/6.3V UR21

2
D 8.2K D
P153

2
HEADER_2X5P_K9
1 2 GND GND
3 4 LP12- 3 4 LP13-
20 USBN12 0
I LP12+ 5 6 LP13+
URN7B OC67# 20
7 8
10

1
NI
1 2 I UC13
20 USBP12 0
I UR25 0.1UF/16V

2
URN7A I GND GND 15K
UU7

2
NI
1

4 90Ohm/100MHz
CM1213_04SO
+5VSB
UL1 CH1 1 6CH4 GND GND
2

VN 2 5 VP
NI
1

CH2 3 4 CH3
90Ohm/100MHz
UL2 GND
2

20 USBN13 7 0 8
C I C
URN7D

20 USBP13 5 0 6
I
URN7C

I I
P60
SATA CONNECTOR FOR CPC P61
SATA_CON_7P SATA_CON_7P
21 SATA_TXP0 I TC17 1 2 0.01UF/25V X7R 10% 1 1 P_GND1 8 21 SATA_TXP1 I TC21 1 2 0.01UF/25V X7R 10% 1 1 P_GND1 8
SATA_TXP0_C SATA_TXP1_C
I TC18 1 2 0.01UF/25V X7R 10% SATA_TXN0_C
2
3
2 SATA CONTROLLER #1 I TC22 1 2 0.01UF/25V X7R 10% SATA_TXN1_C
2
3
2 SATA CONTROLLER #1
21 SATA_TXN0 3 21 SATA_TXN1 3
4 4 (PRIMARY MASTER) 4 4 (SECONDARY MASTER)
21 SATA_RXN0 I TC19 1 2 0.01UF/25V X7R 10% SATA_RXN0_C 5 5 21 SATA_RXN1 I TC23 1 2 0.01UF/25V X7R 10% SATA_RXN1_C 5 5
SATA_RXP0_C SATA_RXP1_C
I TC20 1 2 0.01UF/25V X7R 10%
6
7
6
9
COLOR = RED I TC24 1 2 0.01UF/25V X7R 10%
6
7
6
9
COLOR = RED
B 21 SATA_RXP0 7 P_GND2 21 SATA_RXP1 7 P_GND2 B

I I
GND P62 GND P63
SATA_CON_7P SATA_CON_7P
21 SATA_TXP2 I TC25 1 2 0.01UF/25V X7R 10% 1 1 P_GND1 8 SATA CONTROLLER #1 21 SATA_TXP3 I TC29 1 2 0.01UF/25V X7R 10% 1 1 P_GND1 8 SATA CONTROLLER #1
SATA_TXP2_C 2 SATA_TXP3_C 2
2 2
21 SATA_TXN2 I TC26 1 2 0.01UF/25V X7R 10% SATA_TXN2_C 3 3 (PRIMARY MASTER) 21 SATA_TXN3 I TC30 1 2 0.01UF/25V X7R 10% SATA_TXN3_C 3 3 (SECONDARY MASTER)
4 4 4 4
21 SATA_RXN2 I TC27 1 2 0.01UF/25V X7R 10% SATA_RXN2_C 5 5 COLOR = RED 21 SATA_RXN3 I TC31 1 2 0.01UF/25V X7R 10% SATA_RXN3_C 5 5 COLOR = RED
SATA_RXP2_C 6 SATA_RXP3_C 6
6 6
21 SATA_RXP2 I TC28 1 2 0.01UF/25V X7R 10% 7 7 P_GND2 9 21 SATA_RXP3 I TC32 1 2 0.01UF/25V X7R 10% 7 7 P_GND2 9

I
GND GND
P64
SATA_CON_7P
21 SATA_TXP4 I TC33 1 2 0.01UF/25V X7R 10% 1 1 P_GND1 8 SATA CONTROLLER #2
SATA_TXP4_C 2 2
21 SATA_TXN4 I TC34 1 2 0.01UF/25V X7R 10% SATA_TXN4_C 3 3 (PRIMARY MASTER)
4 4
21 SATA_RXN4 I TC35 1 2 0.01UF/25V X7R 10% SATA_RXN4_C 5 5 COLOR = RED
SATA_RXP4_C 6 6
21 SATA_RXP4 I TC36 1 2 0.01UF/25V X7R 10% 7 7 P_GND2 9

A GND A

PEGATRON DT-MB RESTRICTED SECRET


Title : USB HEADER CON.
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 46 of 68
5 4 3 2 1
5 4 3 2 1

I O2U1A
+3P3V I 4.7K +3P3V
O2R15 51 DENSEL#
1 2 63 INDEX# AVCC3 99
52 MTRA#

1
54 NI I I I
DRVA# O2CB2 O2CB4 O2CB5 O2CB6
57 SMBC_R2/DIR#
58 10UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
SMBC_M2/STEP#
56 WDATA# X5R 10%
D 60 SMBD_M2/WGATE# D
62 GND GND GND GND
TRK0#
64 WPT#
61 0210 ITE modify
RDATA# +3P3VSB_IO +3P3VSB_IO +5VSB_ATX
59 SMBD_R2/HDSEL#
65 4 I Q8512
DSKCHG# 3VSB1 +3P3VSB_I/O_REF_A
3VSB2 35 ADJ/GND 1
3VSB3 67 4 Vout OUT 2
IN 3

1
+
I LIN REG, 1117 I

1
PCE322 PC313
100uF/16V 0.1UF/16V

2
MLCC/+/-10%

2
108 GND
55 XSTB# SMBC_M/STB#/GP87
107 GND
55 XAFD# SMBC_R/AFD#/GP86
55 ERROR# 106 ERR#
103 +BATT
55 ACK# ACK#/GP83 +3P3VSB_IO
55 BUSY 102 BUSY/GP82
55 PE 101 PE/GP81 VBAT 69
Pin49: 55 SLCT 100 SLCT/GP80

1
55 XPD0 109 PD0/GP70

1
System clock input: 24/48 55 XPD1 110 PD1/GP71 I I

/MTRB#
111 O2CB3 PR314
55 XPD2 BUSSI0/PD2/GP72
MHz +3P3V 112 0.1UF/16V 120
55 XPD3

2
BUSSI1/PD3/GP73 1%
55 XPD4 113

2
BUSSI2/PD4/GP74 +3P3VSB_I/O_REF_A
55 XPD5 114 BUSSO0/PD5/GP75
115 GND +3P3VSB
Pin 39: SERIRQ 55 XPD6 BUSSO1/PD6/GP76
1

C 116 C
55 XPD7 BUSUO2/PD7/GP77

1
I 104 PC314
Please check if SB side already 55 XSLIN# SMBD_R/SLIN#/GP84

1
O2R42 105 I I 0.1UF/16V
4.7K 55 XINIT# SMBD_M/INIT#/GP85 O2R41 PR315
have a pull-up resistor! 200
I
MLCC/+/-10%
100
2

2
1% 1%

2
2
22,50 LAD0 41 LAD0 SYS_3VSB 70
42 GND GND
22,50 LAD1 LAD1

1
43 I +5VSB_ATX
22,50 LAD2 LAD2
44 O2CB1
22,50 LAD3 LAD3
40 0.1UF/16V +5VSB_ATX +5VSB
22,50 LFRAME#

2
LFRAME#
22 LDRQ0# 38 LDRQ# I/ NI for non-Eup

1
37 +5VSB_ATX O2Q1
13,22,36,50,57 PLTRST# LRESET#
47 GND I/ NI for non-Eup 1 8
24 CK_33M_SIO

S
PCICLK O2R23
21,50 SERIRQ 39 SERIRQ 2 7
49 4.7K I/ NI for non-Eup 3 6
8 CK_48M_SIO CLKIN

1
4 5

2
G D
I/ NI for non-Eup

1
O2R71 SI4835DDY-T1-E3 +

1
1
4.7K I/ NI for non-Eup I/ NI for non-Eup
O1Q1 3 O2C12 O2C11 O2CE1
O2R30

2
80 C 1UF/10V 10UF/16V I/ NI for non-Eup 100uF/16V
34 KBDATA

2
2

2
KDAT/GP61
34 KBCLK 81 KCLK/GP60 5VSB_CTRL 16 1 21 B PMBS3904 mx_c0603 X5R 10%
82 mx_c0805
34 MSDATA MDAT/GP57 E
83 4.7K
34 MSCLK MCLK/GP56 2
21 RST_KB# 45 KRST#/GP62 GND GND GND
21 A20GATE 46 GA20/JP5 I/ NI for non-Eup
1
1

B +3P3V +3P3V +3P3V B


NI NI NI
O2C1 O2C3 O2C4
1
1

0.1UF/16V 12PF/50V 0.1UF/16V GND


2
2

NPO 5% I I I
O2R37 O2R38 O2R35
GND GND GND 4.7K 4.7K 4.7K
2
2

127 +5VSB_ATX NI / I for non-Eup +5VSB


56 DCD1# DCD1# PR63
56 RI1# 128 RI1#
1 0 Ohm
56 CTS1# CTS1# mx_r0603
56 DTR1# 126 DTR1#/JP4
56 RTS1# 122 RTS1# 1 2
56
56
DSR1#
TXD1
123
124
DSR1#
SOUT1/JP3
GNDA 86
NOTE: PR57
56 RXD1 125 SIN1 GNDD1 15 1 2
0 Ohm
26
GNDD2 50
74
O2Q1 MOS Selection NI / I for non-Eup
56 DCD2# DCD2#/GP21 GNDD3
1

1
1

NI NI NI
56
NI56
RI2# 28
27
RI2#/GP17 GNDD4 117 Base on your plateform mx_r0603
CTS2# CTS2#/GP20
O2R17
680
O2R16
680
O2R18
680
O2R20
56
680
DTR2# 29 DTR2# Please check Power guy
56 RTS2# 23 FAN_TAC5/RTS2#/GP24
22 GND
56 DSR2#
2

2
2

FAN_TAC4/DSR2#/GP25
56 TXD2 21 SOUT2/GP26
20 87 TSD
56 RXD2 SIN2/GP27 TSD- TSD 48
GND GND GND GND

1
NI
A
IT8721F O2R6 A
680

2
PEGATRON DT-MB RESTRICTED SECRET
GND
Title : SIO NCT5571D
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 47 of 68
5 4 3 2 1
5 4 3 2 1

+VCORE +12V +5V


+5V +5V

1
1
I I

1
+3P3V I O2R45 O2R5
O2R167 31.6KOHM 7.15KOHM I I
1K 1% 1% I O2U1B O2R165 O2R166 Please check if another side already

2
1
1% 4.7K 4.7K have a pull-up resistor!

2
I 98

2
O2R168 VIN0(+12V_SEN)
D +1P5V_DUAL 10K 97 8 D
VIN1(+5V_SEN) FAN_CTL1 CPUFAN_PW M 51
10 CHAFAN_PW M 51
2
FAN_CTL2/GP51
96 VIN2 FAN_CTL3/GP36 12
1

NI 1 4.7K 2 O2R24
I 94 NI 1 4.7K 2 O2R29
O2R9 VLDT_12/VIN4
4.7K 93 VDDA25/VIN5 GND
7 CPUFAN_TACH 51
2

VDIMM(VIN4) FAN_TAC1
92 VDIMM_STR/VIN6 FAN_TAC2/GP52 9 CHAFAN_TACH 51
FAN_TAC3/GP37 11
1

1
O2C2
1

1
0.1UF/16V I I I +3P3V +3P3V
2

1
I I O2C24 O2C15 O2R46 I I
O2C25 O2R169 0.1UF/16V 0.1UF/16V 10KOhm O2C10 O2R44
2

1
0.1UF/16V 10KOhm 5% 0.1UF/16V10KOhm
2

2
GND 5% 5% I I
2

2
O2R40 O2R43
4.7K 4.7K 90
GND GND GND GND GND GND GND TMPIN1 MB_THRMP
89

2
TMPIN2
TMPIN3 88
+1P5V_DUAL_OV 84 3
+3P3VSB_IO VDIMM_STR_EN/PCIRST3#/GP10 C
120 VDDA_EN/GP65 I I

1
5 O2C5 B 1
VCORE_EN/GP64
1

NI 6 2200PF/50V O2Q12
O2R22 VCORE_GOOD/GP63 +3P3VSB X7R 10% E PMBS3904
119

2
4.7K VLDT_EN/GP66 2
118 CPU_PG/GP67
47 TSD

1
65 +1P5V_DUAL_OV
2

/MTRB#
C I C
O2R36
1

NI ITE change 11/24 4.7K


O2C14 91

2
10PF/50V VREF
73 LPC_PME# 22
2

NPO 5% PME#/GP54
36 VCORE
+3P3VSB_IO +5VSB_ATX +3P3VSB +3P3VSB I +3P3VSB +3P3VSB

1
GND O2C23 I
1UF/10V O2C13
1

1
1

1
0.022UF/16V +3P3V
Pin75/72/76: Please check if another side

2
I I I NI X7R 10% NI NI

1
already have a pull-up resistor! O2R14 O2R4 O2R19 O2R10 O2R51 O2R52
4.7K 4.7K 4.7K 4.7K GND GND 1K 1K I
NI O2R21 1% 1% O2R28
2

2
2

2
1 0 2 I O2C7 1K
1 2 33 75 77 1%
52 PW RBTN# SLP_S4# 22

2
0 PANSWH#/GP43 SUSC#/GP53
22 SB_PW RBTN# VP 1 2 O2R25 72 PWRON#/GP44 SUSB# 71 SLP_S3# 13,22,64,66
76 95 ATXPG_IN
58 PSON# PSON#/GP42 ATXPG/VIN3 ATX_PW RGD 58
85 78 POW EROK
54 SIO_RSMRST# RSMRST#/CIRRX1/GP55 PWRGD3 +3P3VSB
1

NI +BATT

1
O2C21 18 +3P3VSB NI
PWRGD2

1
10PF/50V 32 I O2C26
2

NPO 5% PWRGD1 O2R26 0.1UF/16V


O2R21 O2R25 AC power loss function NI

2
1

O2R12 1K
O2R3 4.7K 1%
1 NI I Controlled by SIO

2
GND 1MOhm 33 GND
PCIES_RST# 38,39 SIO_PW ROK 54

2
PCIRST1#/GP12
2 I NI Controlled by SB(Bypass) 5% PCIRST2#/GP11 34
2

B NI B

1
19 +3P3V NI
GP30 O2C16
14 GP34

1
13 10PF/50V

2
GP35 NPO 5%
66 GP47 I
O2R32 +3P3VSB
68 4.7K +3P3VSB GND +3P3VSB
+3P3VSB +3P3VSB COPEN#
Note:

2
1

1
+3P3VSB 3
PCIRSTIN#/CIRTX2/GP15
1

COPEN# should be connected I 2 I I I


FAN_CTL5/CIRRX2/GP16
1

I O2R13 121 O2R39 O2R1 O2R2


to GND, when this function FAN_CTL4
1

O2R159 I 1K 4.7K 4.7K 4.7K


is not be used 4.7K NI O2R27 1%
2

2
O2R11 4.7K 30
2

4.7K CE_N/CIRTX1
67 +3VSBSW 24 PLED 52 Pin 73: PME#
2

3 GND SI/GP23 TP_SO T54NOBOM


48 1
2

SO/GP50
I C 17 5VAUX_SW SCK/GP22 25 PLED2 52 Please check if another side already
O2Q4 B 1 2 1 79
PMBS3904 3VSBSW#/GP40
Only S3 high E
I
O2R160
have a pull-up resistor!
2 4.7KOHM
S4/S5 5% 53 SST/AMDTSI_D/PCH_D/PECI_AVA
1 13 PECI_SIO 55 PECI/AMDTSI_C/PCH_C/DRVB#
S3 GND 31 PECI_RQT/GP14
S0/S1 0
I
1

O2R60 NI IT8721F
A 100KOHM O2C6 A
1% 0.1UF/16V
Pin 79: 3VSBSW
2

S0# Tri-state / S3# Low state / S5# Tri-State


Pin 17: 3VSBSW GND GND
S0# Low state / S3# Tri-State / S5# Low state O2R60: Title : ONFI
avoid pre-bios floating Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 48 of 68
5 4 3 2 1
5 4 3 2 1

SM BUS Control
+3P3V

1
D D
NI NI
VP R14
0 R18 R19
To PCH, PCI, and PCIE Slot 1 2
2.7K 2.7K
To Clock Gen, DIMMs, and ITP Debug Port

2
2 S
D
18,19,38,39,40,41,50 SMB_DATA_R SMB_DATA_M 8,16,17,57
VP R39

3
NI 1 0 2

G
Q7

1
2N7002

2 S
D
18,19,38,39,40,41,50 SMB_CLK_R SMB_CLK_M 8,16,17,57

3
NI

G
Q14 +12V

1
2N7002

1
NI
R15
8.2K

2
PW ROK_R_Q

C C

I +3P3V_ME

19 SPI_CS#
E16 +3P3V_ME
SPI BIOS ROM - 64Mbit +3P3V_ME +3P3V_ME

1
HEADER_2X4P_K4
I
1 2 F3R5
3 8.2K
5 6 U14
F3R6

2
7 8 SPI_CS#_E16 1 8
SPI_MISO CS# VCC SPI_HOLD#
2 DO HOLD# 7 1 2
FW H_W P# 3 6
WP# CLK
NI 4 GND DIO 5 8.2K
F3R1 GND
0 SOCKET_8P I
B B
1 2 NI
GND

1
I
F3CB1
19 SPI_MISO 0.1UF/16V

2
GND
19 SPI_MOSI

19 SPI_CLK

JE16:12

MINI_JUMPER IPMIP-GS Change SPI 64Mb


I
64Mb: 05X00Z2GE330
A +3P3V_ME A

U96
SPI_CS#_E16 1 8
SPI_MISO 2
CS# VCC
7 SPI_HOLD# PEGATRON DT-MB RESTRICTED SECRET
FWH_WP# DO(IO1) HOLD#(IO3) SPI_CLK
3 6
4
WP#(IO2)
GND
CLK
DI(IO0) 5 SPI_MOSI Title : SPI FLASH - 8M
W25Q64BVSSIG Pegatron Corp. Engineer: Vic_Chen
I Size Project Name Rev
GND A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 49 of 68
5 4 3 2 1
5 4 3 2 1

+BATT

1
I/EVT
I/EVT R20
+3P3VSB +3P3V 10M
P102

2
HEADER_2X10P_K4

D CK_33M_TPM 1 2 D
24 CK_33M_TPM
LFRAME# 3
22,47 LFRAME# LRESET#
13,22,36,47,57 PLTRST# 5 6 SMB_DATA_R 18,19,38,39,40,41,49
LAD3 7 8
22,47 LAD3 LAD2 22,47
9 10 LAD1 22,47
LAD0 11 12
22,47 LAD0 LDRQ1# TPM_14
22 LDRQ1# 13 14
15 16 SERIRQ 21,47
17 18 CLKRUN#_L I R38 1 2 0 Ohm 5%
CLKRUN# 22
22 LPCPD# 19 20 SMB_CLK_R 18,19,38,39,40,41,49

1
1

1
NI NI R37 TCM:
CB15 CB16 2.7KOHM
0.1UF/16V 0.1UF/16V 5%
CLKRUN# to PCH GPIO32 (R6=I, R10=NI)

2
PD 2.7K Ohm by CRB (R6=NI, R10=I)

2
NI

GND GND GND GND GND

C C
I
+3P3VSB
+3P3V P101

VSB 5
19 VDD1
24 VDD2

1
I NI
1

I I NI 4 CB13 CB14
CB2 CB8 CB9 GND1 0.1UF/16V 10UF/10V
11

2
0.1UF/16V 0.1UF/16V 0.1UF/16V GND2 mx_c0805
18
2

GND3
25 GND4

GND GND
GND
GND GND GND

+3P3V
LAD3 17 2
22,47 LAD3 LAD2 LAD3 GPIO2
22,47 LAD2 20 LAD2 GPIO 6
LAD1 23
22,47 LAD1 LAD1

1
LAD0 26
22,47 LAD0 LAD0
I
R6
4.7K
B B

2
LFRAME# 22 28 LPCPD1#
22,47 LFRAME# LFRAME# LPCPD#
SERIRQ 27
21,47 SERIRQ SERIRQ
CK_33M_TPM 21
24 CK_33M_TPM LCLK

13,22,36,47,57 PLTRST# 16 LRESET#


CLKRUN1# 15 CLKRUN#

NOTE:
1

+3P3V +3P3V
I
R36
TPM_BASE_ADDR I/O SPACE
4.7K

1
0 2E
2

I NI
R35 R5
4.7K 4.7K
1 4E
2

2
GND

13 9 TESTBI_BADD
22 SUS_CLK XTALI/32k_IN TESTBI/BADD
14 XTALO TESTI 8
A A
7 TPM_PP
PP
NOTE:
10 NC4
1

12 NC3 PP Have internal PULL-DOWN PEGATRON DT-MB RESTRICTED SECRET


3 NC2 NI NI
1 R10 R34
NC1 4.7K 4.7K Title : SATA2 & TPM/TCM
2

Pegatron Corp. Engineer: Vic_Chen


GND
Size Project Name Rev
SLB9635TT1.2-FW 3.16 GND GND A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 50 of 68
5 4 3 2 1
5 4 3 2 1

CPU FAN
COLOR: WHITE
W/POST
I +3P3V +5V +5V

+12V P70
W AFER_HD_4P

3
1 1

1
2 2
D 3 3 I I I D
4 R1 D1 R2
4

1
+ 5 4.7K I BAT54CW 1K
NC

1
I NI R3

2
CE1 CB1 150
100uF/16V 0.01UF/25V mx_r0805

2
X7R 10% CPUFAN_PW M_C 2 1 RCPUFAN_PW M

CPUFAN_TACH_C 1 2 RCPUFAN_TACH
GND GND GND
I

1
I I R4
C1 C2 1.5K
100PF/50V 100PF/50V

2
NPO 5% NPO 5%

GND GND RCPUFAN_TACH mx_r0603 OR61 1 2 0 Ohm I CPUFAN_TACH 48

3 & 4 PIN CO-LAYOUT Circuit ( Default 3 pin fan )


/SFSC
RCPUFAN_PW M mx_r0603 OR64 1 2 0 Ohm I CPUFAN_PW M 48
FAN_OP_FB

C +12V C
I
U6
LM358
3 A+ + VCC 8
1
2 A- - AO +12V +12V

1
+3P3V +5V I
FAN_VB+ 5 B+ + CB11
BO 7 0.1UF/16V
2

1
1

I FAN_VB- 6 B- - GND 4 /4PIN FAN_NI


1

R25 NI GND I
1K R32 /4PIN FAN_NI R26
/4PIN FAN_NI 1K 8.2K
/4PIN FAN_NI GND /4PIN FAN_NI

2
2

1
I GND NI
2

I C56 3 R31
S
R29 1000PF/50V I 0
100K X7R 10% Q5 mx_r1206
RCHATEM_FANOUT 1 2 2 1 RSFAN_G 1 APM3095PUC /4PIN FAN_I
I

2
G /4PIN FAN_NI NI
/4PIN FAN_NI /4PIN FAN_NI 2 D
P72 P82
1

NI I
CB10 R27 W AFER_HD_4P W AFER_HD_3P
0.01UF/25V 30K 1 3 GND 3 PIN FAN
2

X7R 10% SFAN_PW R 1


2 1 2
3
2 2
1
+12V

SENSE
COLOR: RED
3
/4PIN FAN_NI 4 4
NC 4 W/POST
1

1
B B
+ 5 NC

1
GND I I NI /4PIN FAN_NI
R28 CE6 CB12 /4PIN FAN_I
10K 100uF/16V 0.01UF/25V

2
/4PIN FAN_NI X7R 10%
2

4 PIN FAN +3P3V +5V +5V

GND GND
COLOR: WHITE
GND W/POST

1
GND
I NI NI
R24 D6 R23
4.7K 1N4148W S 1K
/4PIN FAN_I

2
RCHAFANIN OR52 1 2 0 Ohm I mx_r0603 CHAFAN_TACH 48
/NB_FAN/AFSC
NI
R30
150
mx_r0805
RCHATEM_FANOUT OR56 1 2 0 Ohm I mx_r0603 CFAN_PW M_R 2 1 RCHATEM_FANOUT
CHAFAN_PW M 48
/NB_FAN/AFSC
/4PIN FAN_I
1
CFAN_D 3 RCHAFANIN
2
A A
I
3 PIN FAN D8
BAW 56W PT
PEGATRON DT-MB RESTRICTED SECRET
COLOR: RED
Title : 4-PIN FAN CONN
W/POST R1.03G
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: Thursday, April 08, 2010 Sheet 51 of 68
5 4 3 2 1
5 4 3 2 1

+5VSB : GREEN +5V


BUZZER INTRUDER
+BATT
I=5/(220+40)=19.2mA

2
+5VSB R12
P=I*I*R=19.2*19.2*220

2
220 Ohm +BATT
R22
5% =0.0811W=1/12.33 W +5VSB 10MOhm

1
+5V I/EVT
1 5%

2
P7

1
R17 NI
I/EVT P13 INTRUDER# 22
R21 BUZZ1_R
D
300 1 SPKO
1
2
40Ohm P305
10MOhm
3
D
5% D
mx_r0603
Max 40mA 1
2

1
AC_1205G I/EVT/chas_intru Q56
3
4 I/EVT 3 R_INTRUDER# 1
4 G 2N7002
2 S
CR1_R

HEADER_1X4P_K2 I/EVT/chas_intru

2
NI HEADER_1X4P_K2
I/EVT/chas_intru
R13

Q18_R156
GND 33 Ohm
5%
1

GND GND

1
I
+

I/EVT
Q18 3
CR1 R11 C
JP305:34

1
GREEN 1 2 Q88_R647 1 B
22 SPKR
SMD CB346
2

4.7KOHM E 0.1UF/16V

2
5% 2
PMBS3904 Y5V +80-20%
I I NI

MINI_JUMPER
GND GND GND I/EVT

C HPD CONTROL PANEL / LED CIRCUITRY C

+5V_DUAL

1
I +3P3VSB
O3R1
220
mx_r0805

1
NI
O3R13
NI/Dual I 1K
O3Q1 NI/Dual I

2
3 PMBS3904 O3R2
C 1K
B 1 SIO_LED1_G 2 1 PLED2 48
E
2

1
NI
O3C5
0.1UF/16V

2
GND

B +5V +3P3VSB B
GND
+3P3V +3P3VSB +5V_DUAL
1

1
2

1
I I
I NI O3R3 I O3R5 I +3P3VSB
O3R4 O3R12 220 4.7K O3R6
8.2K 4.7K mx_r0805 P5 220
2

HEADER_2X5P_K10 mx_r0805
1

1
HDLED+ 1 2 FP_LED+ NI
3 4 FP_LED- O3R7
21 HD_LED#
5 6 FP_PW RBTN# 2 1 I 1K
PW RBTN# 48
1 2 FP_SYS_RST# 7 8 O3Q2 I

2
8,13,22,57 SYS_RESET# 3 PMBS3904 O3R11
9 I

1
I O3R8 C 1K
1

1
O3R9 33 I NI NI NI B 1 SIO_LED2_G 2 1 PLED 48
1

I 33 O3C2 O3C3 O3C4 O3R10


O3C1 1000PF/50V 0.1UF/16V 0.1UF/16V 0 E
2

2
0.1UF/16V GND GND X7R 10% mx_r0805 2
2

2
GND
GND GND GND GND GND

A A

PEGATRON DT-MB RESTRICTED SECRET


FRONT POWER LED COLOR SUPPORT O3Q1 O3R2
FRONT
Title : PANEL
SINGLE COLOR NI NI Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
DUAL COLOR I I A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 52 of 68
5 4 3 2 1
5 4 3 2 1

CLEAR CMOS & PASSWORD


External RTC Circuitry SRTCRST# 19

RTCRST# 19
+3P3VSB_IO +BATT
I
D20 I
1 I R40 E69
3 1 20K 2 1 2
BAT R303_D8 PASSW ORD_EN# 22
1 2 2 3 4
D D
I 5 6
R33 BAT54CW
1K R41 HEADER_2X3P
I 1% JE69:35 JE69:46
1 2

1
BATT1
3V/220mAh 20KOhm
XBT2 1%

1
BATT_HOLDER I I GND GND
KTS
LITHIUM BATT I Battery Socket I C3 C4 MINI_JUMPER MINI_JUMPER

2
CR2032
1UF/16V 1UF/16V

2
X7R 10% X7R 10% I I
mx_c0603 mx_c0603
GND CLEAR PASSWORD & CMOS
GND GND

ME DATA Clear PW Clear CMOS


1-2 CLEAR
2-3 Default DEFAULT 3-5 4-6
SW 51 I
1
JSW51:23
2 CLEAR 1-3 2-4
3

HEADER_1X3P
I
GND MINI_JUMPER
C C

B B

NOBOM NOBOM NOBOM NOBOM NOBOM NOBOM


H1 H2 H3 H4 H5 H6
SCREW HOLE_160_HP SCREW HOLE_160_HP SCREW HOLE_160_HP SCREW HOLE_160_HP SCREW HOLE_160_HP SCREW HOLE_160_HP

1 GND1 NC 9 1 GND1 NC 9 1 GND1 NC 9 1 GND1 NC 9 1 GND1 NC 9 1 GND1 NC 9


2 GND2 GND8 8 2 GND2 GND8 8 2 GND2 GND8 8 2 GND2 GND8 8 2 GND2 GND8 8 2 GND2 GND8 8
3 GND3 GND7 7 3 GND3 GND7 7 3 GND3 GND7 7 3 GND3 GND7 7 3 GND3 GND7 7 3 GND3 GND7 7
4 GND4 GND6 6 4 GND4 GND6 6 4 GND4 GND6 6 4 GND4 GND6 6 4 GND4 GND6 6 4 GND4 GND6 6
GND5 5 GND5 5 GND5 5 GND5 5 GND5 5 GND5 5

NOBOM NOBOM
H7 H8
SCREW HOLE_160_HP SCREW HOLE_160_HP
A A
GND GND GND GND GND GND GND GND GND GND GND GND

1 GND1 NC 9 1 GND1 NC 9
2 8 2 8
3
GND2 GND8
7 3
GND2 GND8
7 PEGATRON DT-MB RESTRICTED SECRET
GND3 GND7 GND3 GND7
4 GND4 GND6 6 4 GND4 GND6 6
GND5 5 GND5 5
ONLY FOR SCREW HOLE Title : RTC / CMOS / KBMS
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev

AGND AGND AGND GND GND GND


A3 IPMIP-GS 1. 01
1.01
Date: W ednesday, April 07, 2010 Sheet 53 of 68
5 4 3 2 1
5 4 3 2 1

RSMRST CIRCUIT
D D
Schmitt-trigger for RTC issue
NI/SIO I
R50
1 0 2
NI/SIO
+3P3VSB +5VSB 1 2 RSMRST_R +3P3VSB +3P3VSB
R47
470 OHM 5%

1
R_RSMRST_R

14

14
NI/SIO
1

NI/SIO 1 NI/SIO R51 74LVC14AD 74LVC14AD


R52 C9 4.7KOHM 3 NI/SIO VCC VCC
D
5.6KOHM 0.1UF/16V 1% R48 1 2 U95_2_3 3 4
48 SIO_RSMRST#
2

1% X7R 10% 0 RSMRST# 22


1 2 RSMRST# 22

1
RSMRST_CTRL2 1 GND GND
2

G NI C39 U95A U95B C40

7
GND 3 2 S2N7002 1UF/10V NI NI 1UF/10V

2
1
C NI/SIO NI/SIO Q17 Y5V +80-20% Y5V +80-20%
RSMRST_CTRL1 1 B Q19 C8
NI NI

1
PMBS3904 0.1UF/16V NI GND GND GND GND

2
E X7R 10% R49
1

NI/SIO NI/SIO NI 2 10KOhm


R53 C10 C70
1.02KOHM 0.1UF/16V 4.7UF/6.3V I
2

2
1% X7R 10% X5R 10% R54
1 0 2
2

+3P3VSB +3P3VSB
C GND GND GND GND GND GND GND C

14

14
74LVC14AD 74LVC14AD
VCC VCC
10/02/01 Modify 5 6 U95_6_9 9 8
1.Q17,3904 to 2N7002 (0201change) 48 SIO_PW ROK PW ROK 21,22

1
2.R52,pull high form +5VSB to +3P3VSB GND GND
3.R51,pull high from +3P3VSB to +5VSB C41 U95C U95D

7
4.Add,C70 2.2UF/6.3V NI NI

2
X5R 10%
NI
GND GND GND

+3P3V +3P3V +3P3V +3P3V +3P3VSB +3P3VSB +5V +5V +5VSB +5VSB +5VSB +5V_DUAL +12V -12V +1P1V_VTT +1P1V_VTT +1P05V_PCH
1

1
1

1
1

1
I I I I I I NI I I I I I I I I I
B C28 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 B

0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2

2
2

2
2

2
2

2
NI

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

NI NI +3P3V +5V +3P3V +5V +5V +3P3V +3P3V +3P3V +5V +3P3V +3P3V +3P3V +5V +3P3V
C27 C29
0.1UF/16V 0.1UF/16V
1 2 1 2 NI NI
1

1
1

1
C42 C44 NI NI NI
0.1UF/16V 0.1UF/16V C43 C47 C48 C49 C50 C51 C52 C53 C54 C55
1 2 1 2 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2

2
2

2
NI I NI I NI NI NI
GND GND GND GND

GND GND GND GND GND GND GND GND GND GND

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : RSMRST CIRCUIT
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 54 of 68
5 4 3 2 1
5 4 3 2 1

+5V I I
D2 +5V_PRT R16

1
1SS355PT
2 1
2.2K
2
PARALLEL PORT
I RN2B I RN4B
D 3 4 SPD0 3 4 D
2.2k 2.2k
1

1
NI I I RN1B I RN4C
CB3 CB4 3 4 SPD1 5 6
2.2k 2.2k
0.1UF/16V 0.01UF/25V I RN1D I RN4D
2

2
X7R 10% 7 8 SPD2 7 8
2.2k 2.2k
I RN3A I RN2C
1 2 SPD3 5 6
2.2k 2.2k
I RN3B I RN1C
GND GND 3 4 SPD4 5 6
2.2k 2.2k
I RN3C I RN1A SLCT
47 SLCT
5 6 SPD5 1 2
2.2k 2.2k
I RN3D I RN2A PE
47 PE
7 8 SPD6 1 2
2.2k 2.2k
I RN4A I RN2D BUSY
47 BUSY
1 2 SPD7 7 8 HEADER_2X13P_K26 I
2.2k 2.2k
ACK# J50
47 ACK#
STB# 1 2 AFD#
I RN7A 1 2 SPD7 SPD0 3 4 ERROR#
47 XPD7 22
I RN7B 3 4 SPD1 5 6 PINIT#
47 XPD6 22
I RN7C 5 6 SPD6 SPD2 7 8 SLIN#
47 XPD5 22
I RN7D 7 8 SPD3 9 10
47 XPD4 22
SPD5 SPD4 11 12
SPD5 13 14
SPD4 SPD6 15 16
SPD7 17 18
I RN6A 1 2 SPD3 ACK# 19 20
47 XPD3 22
I RN6B 3 4 SLIN# BUSY 21 22
47 XPD2 22
I RN6D 7 8 SPD2 PE 23 24
47 XPD1 22
I RN5B 3 4 PINIT# SLCT 25
47 XPD0 22
C SPD1 C
ERROR#
SPD0
I RN5D 7 8 AFD#
47 XAFD# 22
I RN5C 5 6 STB# GND
47 XSTB# 22
I RN5A 1 2
47 XINIT# 22
I RN6C 5 6
47 XSLIN# 22

47 ERROR#
I C5 2 1 150PF/50V
I C65 2 1 150PF/50V I C68 1 2 150PF/50V I C63 2 1 150PF/50V I C7 2 1 150PF/50V
I C64 2 1 150PF/50V I C6 1 2 150PF/50V I C62 2 1 150PF/50V I C59 2 1 150PF/50V
I C69 2 1 150PF/50V I C78 1 2 150PF/50V I C61 2 1 150PF/50V I C57 2 1 150PF/50V
I C66 2 1 150PF/50V I C67 1 2 150PF/50V I C60 2 1 150PF/50V I C58 2 1 150PF/50V

GND GND GND GND

B B

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : HDMI Connector
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 55 of 68
5 4 3 2 1
5 4 3 2 1

+12V -12V

SERIAL PORT A

3
I/EVT

1
D3 I/EVT

1
BAT54AW NI D4 NI
CB5 BAT54AW CB6
0.01UF/25V 0.01UF/25V

2
X7R 10% X7R 10%

2
I/EVT

3
D +5V D
U2
INTERFACE RS-232 GND GND
20 1 +12V_COM
DCD1# 19
VCC VCC+
2 DDCD1# DDCD1# 1
P53 2
47 DCD1# RY1 RA1
DSR1# 18 3 DDSR1# DDSR1# 3 4
47 DSR1# RY2 RA2
1 I/EVT 47 RXD1
RXD1 17 RY3 RA3 4 RRXD1 RRXD1 5 6
CB7 RTS1# 16 5 RRTS1# RRTS1# 7 8
47 RTS1# DA1 DY1
0.1UF/16V TXD1 15 6 TTXD1 TTXD1 9
47 TXD1
2

CTS1# DA2 DY2 CCTS1# CCTS1#


47 CTS1# 14 RY4 RA4 7
DTR1# 13 8 DDTR1# DDTR1# HEADER_2X5P_K10
47 DTR1# DA3 DY3
RI1# 12 9 RRI1 RRI1 I
47 RI1# RY5 RA5
11 10 -12V_COM
GND VCC-
GND

RRI1 C30 1 2 150PF/50V NPO 5% I/EVT


+3P3VSB DDTR1# C31 1 2 150PF/50V NPO 5% I/EVT
GND CCTS1# C32 1 2 150PF/50V NPO 5% I/EVT
TTXD1 C34 1 2 150PF/50V NPO 5% I/EVT
GND
1

RRTS1# C35 1 2 150PF/50V NPO 5% I/EVT


NI RRXD1 C36 1 2 150PF/50V NPO 5% I/EVT
R7 DDSR1# C37 1 2 150PF/50V NPO 5% I/EVT
PCH PU 8.2K DDCD1# C38 1 2 150PF/50V NPO 5% I/EVT
2

22 PCH_RI1# I/EVT
Q4 I/EVT
3 PMBS3904 R9 I D5 GND
C C 4.7K 1 C
B 1 RRI1_B 2 1 RRI1_D 3
2 RRI2
E
1

2 BAT54CW
1

I/EVT I/EVT
C33 R8
1000PF/50V 2.2K
2

X7R 10%
2

GND GND GND


SERIAL PORT B

P52
DDCD2# 1 2 RRXD2
TTXD2 3 4 DDTR2#
5 6 DDSR2#
RRTS2# 7 8 CCTS2#
RRI2 9

HEADER_2X5P_K10
GND I
I C80 1 2 150PF/50V NPO 5%
B C81 B
I 1 2 150PF/50V NPO 5%
I C79 1 2 150PF/50V NPO 5%
I C73 1 2 150PF/50V NPO 5%

I C74 1 150PF/50V
2 GND NPO 5%
I C75 1 2 150PF/50V NPO 5%
I C76 1 2 150PF/50V NPO 5%
I C77 1 2 150PF/50V NPO 5%

GND

I/EVT
+5V
U7
INTERFACE RS-232
20 1 +12V_COM
DCD2# VCC VCC+ DDCD2#
47 DCD2# 19 RY1 RA1 2
DSR2# 18 3 DDSR2#
47 DSR2# RY2 RA2
1

I/EVT RXD2 17 4 RRXD2


47 RXD2 RY3 RA3
CB17 RTS2# 16 5 RRTS2#
47 RTS2# DA1 DY1
0.1UF/16V TXD2 15 6 TTXD2
47 TXD2
2

CTS2# DA2 DY2 CCTS2#


47 CTS2# 14 RY4 RA4 7
DTR2# 13 8 DDTR2#
47 DTR2# DA3 DY3
RI2# 12 9 RRI2
47 RI2# RY5 RA5
11 10 -12V_COM
GND VCC-
A GND A

GND
PEGATRON DT-MB RESTRICTED SECRET
!!!!!COM2 PIN NOT DECIDE
Title LED/COM/SPKR/INTRU
:
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 56 of 68

5 4 3 2 1
5 4 3 2 1

INTEL LGA-775 PROCESSOR ITP DEBUG PORT

IPT1
D 9 BPM0# TDO 23 TDO 13 D
7 BPM1# TDI 29 TDI 13
6 BPM2# TMS 31 TMS 13
4 BPM3# TCK 30 TCK 13
13 H_PRDY# 3 BPM4# TRST# 25 TRST# 13
13 H_PREQ# 1 BPM5#

+1P1V_VTT +1P1V_VTT

1
NI
NI NI GR11
GR17 GR14 2 1 H_TAPPW RGOOD 13
1.5K 4.7K
1K

2
NI
GR10
13 10 ITP_PW RGD 2 1
13 CK_ITP BCLK0 PWRGOOD CPUPW RGD 13,22
13 CK_ITP# 15 BCKL1 1K
Place near cpu
NI
GR8
ITP_TAPPW RGD 16 19 CPURST_ITP# 2 1
13 H_TAPPW RGOOD GCLKp RESET# H_RSTOUT# 13
18 GCLKn 1K
C C
NI
GR9 NI
0 GR12
1 2 ITP_SMBCLK 22 21 MR_R# 2 0 1
8,16,17,49 SMB_CLK_M SCL DBR# SYS_RESET# 8,13,22,52
8,16,17,49 SMB_DATA_M 1 2 ITP_SMBDATA 24 SDA
NI
GR13
0 NI
GR15
28 12 ITP_PLTRST# 2 1
NC RESERVED PLTRST# 13,22,36,47,50
1K

+1P1V_VTT

14 VTT GND1 2
GND5 5
GND2 8
1 GND6 11
NI GND7 17
GCB2
0.1UF/16V GND3 20
26 ASUS P/N: 12G161300310 => HRS/DF9C-31S-1V(22)
2

GND4
GND8 27

B B
GND
BtoB_CON_31P
NI GND

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : CPU ITP Debug CONN

Pegatron Corp. Engineer: Vic_Chen


Size Project Name Rev
A3
IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 57 of 68
5 4 3 2 1
5 4 3 2 1

ATX POWER_24P SUPPLY CONNECTOR


NOTE: I
ATX_PWRGD internal pull high in PSU P1 +5V -12V +3P3V
+5V +12V +5VSB_ATX +5V +3P3V POW ER_CON_2X12P

25
D D

1
1 13 I

hold1
+3V1 +3V4 P1R3
NI 2 +3V2 -12V 14
P1R2 3 15 47
8.2K GND1 GND4 P1_PSON#
4 +5V1 PSON# 16 2 1 PSON# 48
NI 5 17

2
P1R4 GND2 GND5
6 +5V2 GND6 18
100 7 19
ATX_PW RGD_C GND3 GND7
48 ATX_PW RGD 1 2 8 PWR0K -5V 20
9 5VSB +5V3 21
10 +12V1 +5V4 22

hold2
11 +12V2 +5V5 23
12 +3V3 GND8 24
1

1
I I I I I NI I NI NI I
P1C1 P1CB1 P1CB2 P1CB4 P1CB5 P1CB6 P1CB7 P1CE1 P1CB8 P1C2

26
470PF/50V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V + 100uF/16V 0.1UF/16V 470PF/50V
2

2
X7R 10% X7R 10%

1
GND GND GND GND GND GND GND GND GND GND GND GND

All of the Caps Around the ATX Power Connector

C C

PCB
I
PCB38

PCB

IPMIP-GS R1.00 RED

VRM POWER_4P SUPPLY CONNECTOR 08M1-0UX0200

I
B
P3 +12V_CPU
B

POWER_CON_2X2P

2 2 4 4
1 1 3 3
NP_NC 5
1

NI NI
P1CB9 P1CB10
0.1UF/16V 0.1UF/16V
2

GND GND GND

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : ATX POWER
Pegatron Corp. Engineer: Vic_Chen
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 58 of 68
5 4 3 2 1
5 4 3 2 1

I I
PD403 PR117 1 2 0 Ohm 5%
I I I BAT54CW +12V_CPU
+12V_CPU I VRM_VCC2_C I PR773 PU4 PR771 1 mx_r0805
PR770 PR772 10 OHM L6716TR 2.2 VRM_VCCDR2_C

D 3

S
3

2
0 Ohm 5% 0 Ohm 5% mx_r0603 mx_r0603 2 NI

1
VRM_VCC1_C 1 VRM_VCC_C VRM_VCCDR_C 2

G
1 2 1 2 2 3 VCC VCCDR 42 1 NI

1
PQ730 PR778
mx_r0805 mx_r0805 I 1 FDN340P_NL 10KOhm

1
PCB43 2 I I NI 3 5%
1UF/16V SGND PCB45 PCB44 PCB46 2

2
X7R 10% 1UF/16V 1UF/16V 0.1UF/16V VRM_VCCDR1_C

2
mx_c0603 X7R 10% X7R 10% X7R 10% PD404 +5VSB PQ731
D mx_c0805 mx_c0805 BAT54CW 3 2SC3052 D
NI C NI
GND GND GND B 1
VRM_PSI# 13
DGND DGND
E
2
9,13 VRM_VID[0..7]
BOOT1 1 VRM_BOOT1_C 60
+1P1V_VTT +3P3V +1P1V_VTT VRM_VID0 26 48
VID0 UGATE1 VRM_UGATE1_D 60
VRM_VID1 27 47
VID1 PHASE1 VRM_PHASE1_C 60
VRM_VID2 28 45 GND
VID2 LGATE1 VRM_LGATE1_D 60

1
VRM_VID3 29
VRM_VID4 VID3
I I I 30 VID4
PR779 PR774 PR780 VRM_VID5 31 VID5 PR781
1K 1K 1K VRM_VID6 32 VID6 CS1+ 17 R_ISEN1+_A X_ISEN1+_A 1 2 36KOHM ISEN1+_A 60
VRM_VID7 33 I 1%

2
VID7

1
13 VRM_PSI# I PR782
2 1 0 VRM_PSI 34 PSI I
13,64 VTTPW RGD I PR135
2 1 0 VRM_EN 16 OUTEN
PC794
VRM_SSEND_A 35 0.01UF/25V
8,22 VRM_PW RGD

2
SSEND X7R 10%
1

1
I NI I 2 1 VRM_SSOSC_A 15 SSOSC CS1- 18 R_ISEN1-_A I PR784 1 2 2.1KOHM 1%
ISEN1-_A 60
PC792 PCB47 PC795
10PF/50V 0.1UF/16V 10PF/50V I
2

2
NPO 5% X7R 10% NPO 5% PR775 I PC796 1 2 0.33UF/16V mx_c0603 GND
NI 56K
PC793 1%
56PF/50V DGND DGND DGND DGND 39
BOOT2 VRM_BOOT2_C 60
NPO 5% 40
UGATE2 VRM_UGATE2_D 60
C 2 1 VRM_FB_A 5 41 C
FB PHASE2 VRM_PHASE2_C 60
LGATE2 44 VRM_LGATE2_D 60
1

PC797 1 2 1500PF/50V RC_COMP_A I PR777 1 2 15KOhm 1% 4 COMP


NI NI I X7R 10%
PR776 PD402 19 R_ISEN2+_A X_ISEN2+_A PR785 1 2 36KOHM
CS2+ ISEN2+_A 60
0 BAT54CW I PC798 2 1 10PF/50V NPO 5% VRM_COMP_A I 1%
2

1
I
3

NIPR787 1 2 300 RC_VSEN_A NIPC799 2 1 270PF/50V 6 VSEN


PC800
0.01UF/25V

2
1

I X7R 10%
DGND DGND PR786 20 R_ISEN2-_A I PR788 1 2 2.1KOHM 1%
CS2- ISEN2-_A 60
51OHM
1%
I I PC801 1 2 0.33UF/16V mx_c0603 GND
2

PR789 1 2 2.74KOHM VRM_VSEN_A

1% mx_r0603 36
BOOT3 VRM_BOOT3_C 61
PR790 1 2 4.75KOHM TR_FB_A I PR791 1 2 10K 3% UGATE3 37 VRM_UGATE3_D 61
PHASE3 38 VRM_PHASE3_C 61
13 VCC_SENSE_A I PR792 1 2 0 LGATE3 43 VRM_LGATE3_D 61
I
+VCORE PJP2
SHORTPIN PR794 180PF/50V
1 2 I PR793 1 2 100 R_LTB_A 1 2 RC_LTB_A 1 2 PC802 VRM_LTB_A 8 21 R_ISEN3+_A X_ISEN3+_A PR795 1 2 36KOHM
LTB CS3+ ISEN3+_A 61
NPO 5% I I 1%
1

NOBOM 1KOhm

1
1% NI NI I
1

B PR796 PC804 PC805 B


NI I
PC803 1K 120PF/50V 0.01UF/25V

2
120PF/50V NPO 5% X7R 10%
2
2

NPO 5% CS3- 22 R_ISEN3-_A I PR797 1 2 2.1KOHM 1%


ISEN3-_A 61
DGND DGND
1 2 I PR798 1 2 100 VRM_FBG_A 7 FBG I PC806 1 2 0.33UF/16V mx_c0603 GND
NOBOM I
PJP3 I PR799 2 1 9.09KOHM 1% PR805 +3P3V
PWM4/PH_SEL 25 VRM_PW M4_A I PR800 2 1 0
GND SHORTPIN I 1MOHM
13 VSS_SENSE_A I PR801 1 2 0 I PC807 2 1 10PF/50V DGND 1%
NPO 5% PR804 1 2 ISEN3-_A
10K DGND
mx_r0603 23
CS4+
I PR802 2 1 0 TR_IMON_A 1 2 3% VRM_IMON_A 9 IMON

CS4- 24 R_ISEN4-_A I PR806 1 2 2.1KOHM 1% I PC808 1 2 0.33UF/16V mx_c0603 GND


1

I PR803 1 2 10KOhm I
PC809
0.022UF/16V
2

13 MCP_ISENSE_A I PR807 2 1 0 X7R 10%


PR1 13 VRM_OCSET_A
OCSET/PSI_A
1 2
12 VRM_OVP_A
0 Ohm DGND OVPSEL
5%

1
I I PR808 2 1 90.9K 1% VRM_OSC_A 14 NI
OSC/FAULT

1
A
PR810 I I A
PJP406 I PR809 2 1 0 VRM_OST_A 11 46 10KOhm PC810 PR811
OFFSET N.C. 100PF/50V 31.6K
1 2 5%

2
I PR812 2 1 120K 1% VRM_LTBGAIN_A 10 49 NPO 5% 1%

2
SHORTPIN_RECT LTBGAIN PGND
NOBOM
PEGATRON DT-MB RESTRICTED SECRET
GND DGND
GND10
GND11
GND12

Title :
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

DGND GND DGND DGND DGND VCORE CONTROLLER


Pegatron Corp. Engineer: Michael Lee
EXPOSED PAD AREA 5.2x5.2 mm
50
51
52
53
54
55
56
57
58
59
60
61

GND Size Project Name Rev

connect to the GND through 16 Vias unifomly distribuited


A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 59 of 68
5 4 3 2 1
5 4 3 2 1

+12V_CPU

I +12V_VCORE_VIN
PL1
0.4UH/25A
1 2

1
D + + + + + D

1
I I NI I I NI
VRM_VCC2_C PCB4 PCE10 PCE11 PCE12 PCE13 PCE14
Place near L6716 Place near L6716 4.7UF/16V 1000UF/16V 1000UF/16V 1000UF/16V 1000UF/16V 1000UF/16V

2
I I I X7R 20%
PD405 PR813 PR33 2D mx_c1206
BAV70W PT 3.3 OHM Place near L6716 0 Ohm
1 MX_R0603 mx_r0603 PQ201
3 1 2 VRM_BOOT2_RC_C PC811 2 1 0.22UF/16V 1 2 VRM_UGR2_D 1 GND GND GND GND GND GND
2 I mx_c0603 G 9mΩ/10V TO-252
S
3 I

1
I
PR34
8.2K
59 VRM_BOOT2_C
I +VCORE

2
PL201
0.4UH
59 VRM_UGATE2_D
59 VRM_PHASE2_C 1 2

1
PR814 1 2 0 Ohm I
59 VRM_LGATE2_D
I mx_r0603 PC12

1
2D 2D 4700PF/50V I

2
I I X7R 10% PC13
PQ203 PQ202 mx_c0603 680PF/50V

2
VRM_LGR2_D 1 1 X7R 10%
G IPDH6N03LAG G IPDH6N03LAG VRM_SN2_C mx_c0603 NOBOM NOBOM
S S
C 3 3 PJP4 PJP5 C

1
SHORTPIN SHORTPIN
PR36 GND
1 Ohm

1
5%
IPMIP-GS R1.01 Change to I

2
I
GND GND 59 ISEN2+_A

59 ISEN2-_A
GND

+12V_VCORE_VIN

Place near L6716


Place near L6716 Place near L6716
I I I
PD406 PR815 PR38 2D

1
BAV70W PT 3.3 OHM 0 Ohm I
1 MX_R0603 mx_r0603 PQ204 PCB5
3 1 2VRM_BOOT1_RC_C PC812 2 1 0.22UF/16V 1 2 VRM_UGR1_D 1 4.7UF/16V

2
2 I mx_c0603 G 9mΩ/10V TO-252 X7R 20%
S
3 I mx_c1206
1

I GND
B PR39 B
8.2K
59 VRM_BOOT1_C
I
2

PL202
0.4UH
59 VRM_UGATE1_D
59 VRM_PHASE1_C 1 2

1
PR816
1 2 0 Ohm I
59 VRM_LGATE1_D
I mx_r0603 PC15

1
2D 2D 4700PF/50V I

2
I I X7R 10% PC17
PQ206 PQ207 mx_c0603 680PF/50V

2
VRM_LGR1_D 1 1 X7R 10%
G IPDH6N03LAG G IPDH6N03LAG VRM_SN1_C mx_c0603 NOBOM NOBOM
S S
3 3 PJP7 PJP6
SHORTPIN SHORTPIN

1
GND
PR41

1
1 Ohm
5% IPMIP-GS R1.01 Change to I

2
I
GND GND
59 ISEN1+_A

59 ISEN1-_A
GND

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : VCORE DRIVER-1
Pegatron Corp. Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 60 of 68
5 4 3 2 1
5 4 3 2 1

+12V_VCORE_VIN

VRM_VCC2_C Place near L6716


Place near L6716 Place near L6716
D I I I D
PD407 PR817 PR69 2D

1
BAV70W PT 3.3 OHM 0 Ohm I
1 MX_R0603 mx_r0603 PQ210 PCB50
3 1 2 VRM_BOOT3_RC_C PC813 2 1 0.22UF/16V 1 2 VRM_UGR3_D 1 4.7UF/16V

2
2 I mx_c0603 G 9mΩ/10V TO-252 X7R 20%
S
3 I mx_c1206

1
I GND
PR46
8.2K
59 VRM_BOOT3_C
I +VCORE

2
PL203
0.4UH
59 VRM_UGATE3_D
59 VRM_PHASE3_C 1 2

1
PR56 1 2 0 Ohm I
59 VRM_LGATE3_D
I mx_r0603 PC19

1
2D 2D 4700PF/50V I

2
I I X7R 10% PC21
PQ209 PQ211 mx_c0603 680PF/50V

2
VRM_LGR3_D 1 1 X7R 10%
G IPDH6N03LAG G IPDH6N03LAG VRM_SN3_C mx_c0603 NOBOM NOBOM
S S
3 3 PJP9 PJP8
SHORTPIN SHORTPIN

1
GND
PR43

1
C 1 Ohm C

5% IPMIP-GS R1.01 Change to I

2
I
GND GND
59 ISEN3+_A

59 ISEN3-_A
GND

B B

+VCORE +VCORE +VCORE


1

1
1

+ + + + + + + + I I I I I I I I I I I I I I I I I I
1

1
1

1
1

1
NI I I I I I NI I PR819 PCB14 PCB15 PCB16 PCB17 PCB18 PCB19 PCB20 PCB21 PCB22 PCB23 PCB24 PCB25 PCB26 PCB27 PCB28 PCB29 PCB30
PCE16 PCE1 PCE2 PCE3 PCE4 PCE5 PCE6 PCE7 100 Ohm 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
150UF/2V 5% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20%
2

2
2

2
2

2
2

2
2

2
BOTTOM mx_r0603 MX_C0805_RD9
MX_C0805_RD9 MX_C0805_RD9 MX_C0805_RD9
MX_C0805_RD9 MX_C0805_RD9
MX_C0805_RD9 MX_C0805_RD9
MX_C0805_RD9 MX_C0805_RD9
MX_C0805_RD9 MX_C0805_RD9 MX_C0805_RD9
MX_C0805_RD9 MX_C0805_RD9
MX_C0805_RD9
MX_C0805_RD9
820UF/2.5V

820UF/2.5V
820UF/2.5V

820UF/2.5V

820UF/2.5V

820UF/2.5V

820UF/2.5V

GND GND GND


A A

+CPU VCORE OUTPUT CAPs


PEGATRON DT-MB RESTRICTED SECRET
Title : VCORE DRIVER-2
Pegatron Corp. Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 61 of 68
5 4 3 2 1
5 4 3 2 1

I I
+5V VAXG_VCC_C PR733 +5V
PU5 2.2 Ohm
mx_r0805
PR732 1 210 Ohm VAXG_VCC_C 24 20 VAXG_PVCC_C 2 1
5% VCC PVCC
I

1
I I
PC779 7 PC775
1UF/16V GND1 2.2UF/10V

2
X7R 10% X5R 10%
mx_c0603 mx_c0603
D D

GND GND GND

1 Ohm NI +5V
9 VAXG_VID[1..7]
PR734 PD401 2
VAXG_VID1 31 23 VAXG_BOOT1_C 2 1 VAXG_BOOT1_RC_C 3
VAXG_VID2 VID1 BST mx_r0603
30 VID2 1
VAXG_VID3 29 I
+1P1V_VTT +1P1V_VTT VAXG_VID4 VID3 BAV70W PT
28 VID4 I

1
VAXG_VID5 27 PC776
VAXG_VID6 VID5 X7R 10%
26 VID6

1
VAXG_VID7 25 0.1UF/16V

2
VID7 mx_c0603
I I
PR735 PR62
1K 1K 21 VAXG_PHASE1_C 63
SW

2
GFX_VR_EN 32 22
13 GFX_VR_EN EN DRVH VAXG_UG1_D 63
VAXG_PW RGD_A 1 19
PWRGD DRVL VAXG_LG1_D 63

PGND 18

GND

C Modify in 2009/5/6 C
PC777 2 11000PF/50V V_GFX_VSS_SENSE_A PC778 2 1 0.1UF/16V VAXG_INON_A 2
X7R 10% X7R 10% IMON
I I

PR736 2 1 4.99KOhm VAXG_INON_A


GND I 1%

PC780 2 1 0.1UF/16V
13 VSSAXG_SENSE_A
I X7R 10%
I
1 2 PR7371 2 100 Ohm V_GFX_VSS_SENSE_A PR738 2 1 20 OHM VAXG_FBRTN_A 4 PR740
1% 1% FBRTN 12KOHM
I I
NOBOM PR737 VAXG_VCC_C 1%
PJP402 8 VAXG_ILIM_A 2 1 PRT3 2 1 100KOHM
SHORTPIN ILIM 1%
GND I

PR739 1 2 887 OHM VAXG_FBRTN_A


I 1% I I
PR743 PR741
200KOHM 51KOHM
1% 1% PR744
16 VAXG_CSCOMP_A 2 1 PR743 2 1 1 2
CSCOMP VAXG_ISEN1+_A 63

1
+V_AXG NOBOM I 43KOHM

1
1
PJP403 GND PR742 I I 1%
SHORTPIN PR745 0 Ohm PC782 PC783 I
1 2 PR745 1 PR746 1
2 100 Ohm 2 0 Ohm V_GFX_VCC_SENSE_RC_A PC781 1 2 220PF/50V 5% 270PF/50V 5600PF/25V

2
2
I 1% NI 5% NI X7R 10% X7R 10% X7R10%

2
2 I CSFB 15 VAXG_CSFB_A
B PR747 PC814 B
13 VCCAXG_SENSE_A 1 2 1KOhm VAXG_FB_A
I 1% 6800PF/25V
1

X7R 10%
AXG_FB_RC
2

I
PR820 14 VAXG_CSREF_A
PR748 CSREF
2 1 20KOhm VAXG_FB_RC_A PC784 2 1 470PF/50V 1KOhm I
I 1% I X7R 10% 1% PR722
10 OHM
1

I PC785 2 1 22PF/50V NPO 5% VAXG_FB_A 5 13 VAXG_LLINE_A PR749 1 2 1KOhm 2 1% 1


FB LLINE VAXG_ISEN1-_A 63
NI 1%

1
VAXG_COMP_A 6 PC786
COMP
1000PF/50V

2
+12V_CPU X7R 10%
I
GND
PR750
1 2 1KOhm VAXG_COMP_RC_A PR751
1 2 649KOHM VAXG_RAMP_A 12 RAMP RT 11 VAXG_RT_A
I 1% I 1%
+12V 10 VAXG_RPM_A
RPM
PR752
1 2 1KOhm IREF 9 IVAXG_IREF_A R1.01 change
NI 1% PR760
41 0 Ohm
GND11

1
1
40 5% I I
GND10

1
I 39 3 PU5_31 2 PR753 PR754
GND9 N/C
1

PC788 38 17 82.5KOHM 332KOHM PR755


1000PF/50V GND8 GND2 1% 1%
37 GND7 GND3 33 604KOhm
A
X7R 10% 36 1% A
2

2
2
GND6
35

2
GND5 I
34 GND4

NCP5380MNTXG PEGATRON DT-MB RESTRICTED SECRET


GND GND GND GND GND GND
Title : VAGX CONTROLLER
Pegatron Corp. Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 62 of 68
5 4 3 2 1
5 4 3 2 1

+12V_VCORE_VIN

VP PR159 1 2 0 Ohm mx_r1206 +12V_VAX_VIN


D D

VP PR160 1 2 0 Ohm mx_r1206

VP PR162 1 2 0 Ohm mx_r1206

1
+I

1
I PCE501
PC789 1000UF/16V
4.7UF/16V

2
VP X7R 20%
PR756 2D mx_c1206
0
mx_r0603 PQ507
1 2 VAXG_UGR1_D 1 GND GND
G 9mΩ/10V TO-252
S
3 I

1
I
PR757
8.2K
+V_AXG

2
VAXG_UG1_D I
62 VAXG_UG1_D
PL404
62 VAXG_PHASE1_C VAXG_PHASE1_C 1 2

VAXG_LG1_D 1.2UH/29A
62 VAXG_LG1_D

1
I
C PC790 C

1
2D 2D 4700PF/50V I

2
X7R 10% PC791
PQ508 PQ509 mx_c0603 680PF/50V

PR758

2
1 1 X7R 10% NOBOM
G 9mΩ/10V TO-252 G 9mΩ/10V TO-252 NOBOM PJP405
S S
3 I 3 I PJP404 SHORTPIN

1
I SHORTPIN
PR758
1 Ohm GND

1
5%
mx_r1206 IPMIP-GS R1.01 Change to I

2
62 VAXG_ISEN1+_A

62 VAXG_ISEN1-_A
GND GND GND

B B

+V_AXG
+V_AXG
1

+I +I +I I I I I
1

PCE9 PCE15 PCE19 PCB37 PCB39 PCB40 PCB41


820UF/2.5V 820UF/2.5V 820UF/2.5V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
X5R 20% X5R 20% X5R 20% X5R 20%
2

MX_C0805_RD9 MX_C0805_RD9 MX_C0805_RD9 MX_C0805_RD9

GND GND GND GND GND

A A

PEGATRON DT-MB RESTRICTED SECRET


Title : VAGX DRIVER
Pegatron Corp. Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 63 of 68
5 4 3 2 1
5 4 3 2 1

I
PU400A
+5V +5V

PR821 1 2 4.7 OHM +1P1V_VDD_C 2 9


I 5%

PC815 2
VDD VDDP
PC816 1 2 1UF/16V GND
+1P1V_VTT ....(1.1V)
GND 1 1UF/16V I X7R 10% mx_c0603
I X7R 10% mx_c0603 I
PD408
BAT54CW +5V Imax=30A +12V_VCORE_VIN
D I 1 D
13 +1P1V_BOOT_C 1 PR824 2 P_+1P1V_BOOT_C 3
BOOT 0 Ohm 2
5%

VP PR822 1 2 0 Ohm
+1P1V_IN PC817 1 2 0.1UF/25V +1P1V_IN mx_r1206
I X7R 10% mx_c0603
+1P1V_IN VP PR825 1 2 0 Ohm
mx_r1206
FS = 253KHZ
VP PR826 1 2 0 Ohm

1
+I mx_r1206

1
I I PCE400
PR823 PC401 1000UF/16V
1 2 +1P1V_TON_C 16 4.7UF/16V

2
TON X7R 20%
820KOHM 2D mx_c1206
1% I
I PQ25

1
NI 12 +1P1V_HG_D 1 PR402 2 +1P1V_HG_R_D 1 GND GND
PC818 UGATE 0 Ohm G 9mΩ/10V TO-252
S

2
1000PF/50V 5% I 3

2
X7R 10% PR403
8.2KOHM +1P1V_VTT
5% I
+5V PL4

1
11 +1P1V_PHASE_D 1 2
C +5VSB PHASE C
GND
0.3UH/48A
1

NI

1
PR828 PJP407 I

1
1

1
NI 10KOhm SHORTPIN PC404 + NI +I +I
PR827 1% I PR829 NOBOM 4700PF/50V PCE410 PCE411 PCE412

2
10KOhm 10 +1P1V_ILIM_A1 2 +1P1V_ILIM_R_A 2 1 X7R 10% 820UF/2.5V 820UF/2.5V 820UF/2.5V
2

3 +1P1V_EN_A OC
D 15

2
2

2
EN/DEM

1
1% NI 12KOHM +1P1V_SUR_C NI
2

PQ732 1% PC405
1

PQ511_EN_A 1 2N7002 I 2D 2D 680PF/50V

2
G PC819 I I I X7R 10%
2 S 1000PF/50V PR830 PQ26 PQ34 mx_c0603
2

1
3 8 +1P1V_LG_D 1 2 +1P1V_LG_R_D 1 1 I GND GND GND
D +1P1V_VTT LGATE
NI G G PR406
S S

2
PQ733 0 Ohm 3 3 1 Ohm I
1 2N7002 GND GND mx_r0603 9mΩ/10V TO-252 9mΩ/10V TO-252 PR833
5%
1

1
13,22,48,66 SLP_S3# G NI 5% NI 0 Ohm

2
2 S
1

NI PR832 PR87 5%
PJP408
PR831 1KOhm 8.2KOHM

1
100KOHM 1% 13 VSSVTT_SENSE_A 1 2
5%
5%
2

2
2

13,59 VTTPW RGD SHORTPIN


4 PGOOD GND GND
NOBOM

GND GND 14 LEN


GND GND GND
5 PJP409
B LPGOOD PR105 2 B
1 510KOHM SHORTPIN
7 NI 1% NOBOM
LDRV
VOUT 1 +1P1V_VOUT_A 2 PR835 1 0 Ohm+1P1V_VOUT_R2_A I PR836 2 1 10 +1P1V_VOUT_R1_A 2 1
I 6 VP 5% mx_r0603
LFB PR837
PU400B 1% I 1
17 GND FB 3 +1P1V_FB_A 2 7.68KOHM

1
I
18 19 PC820
GND1 GND2 PC822 56PF/50V 0.1UF/16V
2 1

2
I X7R 10%
1

1
RT8204AGQW NI I mx_c0603 I PJP410
1

RT8204AGQW PC821 PR838 PR839 PR840


20PF/50V 20KOhm 120KOHM 1 2 2 1 VCCVTT_SENSE_A 13
NPO 5% 1% +3P3VSB GND
1%
2

GND GND 0 Ohm


2

I SHORTPIN

1
I 5%
GND +1P1V_VTT_EN_A PR841 NOBOM
1KOhm
BOTTOM GND GND 3 5%
D
+1P1V_VTT I

2
+1P1V_VTT +1P1V_VTT PQ734
2N7002 1 +1P1V_VTT_EN#_A
G
S 2
I 1 I3 PR177
PC823 PQ735 C
0.1UF/16V PMBS3904 B 1 VTT_SELECT_R 1 2 VTT_SELECT 13
2
1

+ I +I I I I I I I I NI I X7R 10% H--->1.05


1
1

PCE22 PCE413 PCB36 PCB42 PCB12 PCB13 PCB31 PCB32 PCB33 PCB34 PCB35 mx_c0603 E
A
2 1KOhm L--->1.1 A
330UF/2V 820UF/2.5V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% GND 5%
2
2

2
2

MX_C0805_RD9
MX_C0805_RD9 MX_C0805_RD9
MX_C0805_RD9
MX_C0805_RD9
MX_C0805_RD9
MX_C0805_RD9 MX_C0805_RD9
MX_C0805_RD9 I
ASUS OEM-DT MB RESTRICTED SECRET

GND GND GND GND GND GND GND GND GND GND GND GND GND
Title : +1P1V_VTT
Pegatron Corp. Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 64 of 68
5 4 3 2 1
5 4 3 2 1

+5V_DUAL +1P5V_DUAL_VIN
+5V_DUAL ==> +1P5V_DUAL PL3
1 2
D
Imax=19.628A 1UH/14A
D

1
NI I + +

1
PCB2 I PCE20 PCE21
0.1UF/16V PC11 560UF/6.3V 560UF/6.3V

2
X7R 10% X5R 10% I I

2
10UF/6.3V
mx_c0805

GND
2D 2D GND GND GND
I NI
PQ1 PQ2
1P5V_DUAL_HG_D 1 2 1P5V_DUAL_HGR_D 1 1 AOD452
G G
S S
NOBOM 3 3
PR113 9mΩ/10V TO-252

1
0
mx_r0603_short I
PR114
8.2K
+5V_DUAL +12V I Please this shortpin close to +1P5V_DUAL

2
PD2 I
BAT54CW
low-side MOSFET drain pin PL2
2 1.2UH/29A
3 1P5V_PW M_PW R 1 2
1

1
C I NI I C
+ + +
PC16 PC7 I I I PC14
1

NOBOM 4700PF/50V 680PF/50V PCE17 PCE18 PCE29 10UF/6.3V

2
2

2
I X7R 10% X7R 10% 1800UF/6.3V 1800UF/6.3V 1800UF/6.3V X5R 10%
PJP18

2
PR23 mx_c0603 mx_c0805
4.7 1P5V_DUAL_OCSET_R 1 2
mx_r0603
2

SHORTPIN

1
2D 2D
I I GND GND GND GND GND PJP10
PQ3 PQ4 SHORTPIN
1 1 +1P5V_DUAL_SN_C NOBOM
G G
S S
3 3

2
1
I 9mΩ/10V TO-252 9mΩ/10V TO-252
PD1 I
BAT54CW PR26
1 1
3 mx_r1206

2
2 1P5V_VCC_C
1

I PR7
PC9 15KOhm GND GND GND
0.1UF/16V 1%
X7R 10%
2

mx_c0603 I
1 2 OCP Point: 38.22A
B B

I
PU1 I
APW 7120 PR9
1P5V_DUAL_BST_C 1 8 1P5V_DUAL_PHASE_C 887 OHM I
1P5V_DUAL_HG_D 2 BOOT PHASE 1P5V_DUAL_OCSET_A 1% PR97
UGATE OCSET 7
3 6 1P5V_DUAL_FB_C 2 1 1P5V_DUAL_FB2_C 1 2 1P5V_DUAL_FB1_C
1P5V_DUAL_LG_D 4 GND FB 1P5V_DUAL_VCC_C
LGATE VCC 5
0 Ohm
1

mx_r0603
1

I I 2 1 5%
PC10 PR8
0.47UF/16V 1K NI
2

mx_c0603 1% PC18

超超超1.614V
2

X7R 10% 0.47UF/16V


X7R 10% +5V_DUAL
mx_c0603

GND GND GND


I +1P5V_DUAL_OV 48
PR80
1 2 R_R_+1P5V_DUAL_OV

1
I I
6.8KOHM HR88 HR87
1% I 10K 1K

1
3 2N7002
D
HQ8 2 NI

2
PR176

R2_+1P5V_DUAL_OV
1 0
A A
G

2
S 2
I
3 HQ7
C
B 1 PEGATRON DT-MB RESTRICTED SECRET
IPMIP-GS ADD
E
2
PMBS3904 Title : +1P5V_DUAL_SW
Pegatron Corp. Engineer: Michael Lee
GND GND Size Project Name Rev
R1_+1P5V_DUAL_OV A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 65 of 68
5 4 3 2 1
5 4 3 2 1

+1P5V_DUAL
R1.01 add for PCH CORE LVR CONTROL
+3P3VSB +1P05V_PCH +3P3VSB +3P3V_ME

Imax=5.598A
+3P3V +3P3VSB

1
I I 2D 2D NI/AMTI NI
PR508 PR509 I I R43 PR127
20K 20K PQ22 PQ23 0 Ohm 0 Ohm
1

NI 1% OP1_VG_C 1 1
1%

1
NI NI G IPDH6N03LAG G IPDH6N03LAG
S S

2
PR179 PR131 PR128 0 I PR124 3 3
Install for AMT support

1
1K 1K 1 2 OP1_REF_A PC501 4.7K

1
D PQ17_D I 470PF/50V I D
2

PQ17_G 2

3 PC503 X7R 10% PR506 I +1P05V_PCH R42R43


D NI/AMTI

2
1

1
I I 3900PF/50V 1K PD3

2
PQ18 PC520 PR505 X7R 10% GND BAT54CW
1 9.31K 1 2 1

2
G 2N7002 0.1UF/16V 1% 3
3 2 S +12V SLP_M# 22,67
PQ28 NI +1P05V_ME +1P05V_PCH 2

1
C
+I NI/AMTI NI/AMTI
1 B NI PCE8 PR54 PR55
PMBS3904 820UF/2.5V I/AMTNI 33KOHM 5.6KOHM
E
PR47

2
1
2 GND GND I 2 1

2
PC561
0
0.1UF/25V mx_r1206
MEPW ROK 21

2
mx_c0603 +3P3V
GND GND +3P3VSB

1
I PU3 GND NI/AMTI
3 A+ + VCC 8 GND PC30
1
1

NI I 1 0.1UF/16V

2
1
PC522 PR511 OP1_FB_A 2 A- - AO I +1P05V_ME PQ1415 X7R 10%
0.1UF/16V 20K PC554
2

1% OP2_REF_A OP2_REF_A 5 B+ + 0.1UF/25V

2
BO 7 OP2_VG_C 2D mx_c0603
2

6 B- - GND 4 GND
PQ32 3 3

1
GND LM358 I I 1 P3055LDG GND PR52 NI/AMTI C C
1

1
I I PR178 PC502 G I 1 2 PQ14B 1 B B 1
S

1
PC521 PR507 100K 470PF/50V 3
PQ18_B 0.1UF/16V 24K X7R 10% PR129 30.1KOHM NI/AMTI E E NI/AMTI
1%
2

2
C 1% 4.7K 1% PQ14 2 2 PQ15 C

2
PC69_PR80
Imax=1.84A PMBS3904 PMBS3904 IP R1.01 CRB1.5
2

GND I
NI/AMTI

2
1

1
I I

1
PC71 PR512 +1P8V_SFR PR53 NI/AMTI
GND GND 3300PF/25V 1K GND
PJP21 301K PC29 PC31

2
X7R 10% 0.47UF/16V 100PF/50V

2
NI R1.01 add for PCH CORE LVR CONTROL OP2_FB_A 1 2OP2_FB_R_A
1 2 1% X7R 10% NPO 5%
PR180

2
1
1 2 NI/AMTI
SLP_S3# 13,22,48,64 SHORTPIN +
R1.01 ADD OP2 NOBOM
I
PCE36 GND GND GND GND GND
1K 820UF/6.3V

2
GND

Install for AMT support +1P05V_ME +5VSB NI


PR76
8.2K
Fsw = 500KHz Imax=2.222A 1 2 PQ13_G

NI/AMTI NI/AMTI
PR728 PC771 NI 3
13KOHM 1000PF/50V PR13 C NI
1% X7R 10% 1 4.7K 2 1 B PQ37
B 22,67 SLP_M# B
1P05MECOM_A 2 1 PR728_A 2 1 PMBS3904
E
+5VSB 2
+5VSB

1P05MEFB_A PR729 1 2 154KOHM


NI/AMTI 1%
1

GND
PR73
1MOhm PR730 2 1 49.9KOHM
NI/AMTI NI/AMTI GND +1P05V_ME +1P05V_PCH
5%
PR731 PU763 2 1 1P05MEFB1_A +1P05V_ME
2

NI/AMTI 750KOhm
GND2 11

1
1P05VME_EN_A
1 2 1P05VME_FSW
1 SHDN/RT COMP 10 1P05MECOM_A NIPC42 22PF/50V NI/AMTI
1P05MEFB_A PR78

1
2 GND1 FB 9 NI

G
1P05MELX 3 8 0 Ohm
3 LX1 VDD PR45
1P05MELX 5%

3 D
4 7 2 1

2
D LX2 PVDD2

S
mx_r1206

+1P05V_PCH_PR45
NI/AMTI NI/AMTI 5 6 NI/AMTI 0

2
PR74 PQ17 PGND PVDD1 PL402
1 2 1
PQ17 RT8015APQW 1P05MELX 1 21P05MELX_R NI
22,67 SLP_M# 2N7002
G NI/AMTI FDN340P_NL PQ13
100K 2 S 4.7UH

1
1

1
NI/AMTI NI/AMTI NI/AMTI
PC722 PC723 PC724
22UF/6.3V 22UF/6.3V 22UF/6.3V

2
2

X5R 10% X5R 10% X5R 10%

A A
GND GND GND GND GND GND

PEGATRON DT-MB RESTRICTED SECRET


Title :+1P05V_PCH & +1P05V_ME
Pegatron Corp. Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 66 of 68
5 4 3 2 1
5 4 3 2 1

+5V
+5V_DUAL_USB_B......2A
+12V I
PR842
8.2K
3
S I
+5V_DUAL....7.8605A +5VSB +5V +5V_DUAL_USB_A
1 2 +5V_DUAL_MAIN_GATE
G APM2014NUC I
1
PQ7
I PQ9 APM9932CKC
PR28 3 D2
1K C 1 8
1 2 +5V_DUAL_MAIN 1 B I S1 D1
PQ6 +5V_DUAL_MAIN_GATE 2 N 7
D
E PMBS3904 G1 D1 D

1
NI 2 3 6
PC25 +5V_DUAL S2 D2
2200PF/50V +5V_DUAL_AUX_GATE 4 P 5

2
X7R 10% G2 D2

GND

1
GND +
+5VSB I NI
PR35 PCE27
8.2K D 3 I 820UF/6.3V
+5V_DUAL_USB_F......2A

2
+5V_DUAL_AUX_GATE PQ8
G
1 2
NTR4502PT1G
1
I
PR32 3 S GND
C 2
1K I +5VSB +5V +5V_DUAL_USB_B
1 2 +5V_DUAL_AUX 1 B PQ5 I
48 +3VSBSW
PMBS3904 PQ10
E APM9932CKC

1
NI 2
PC20 +5VSB 1 8
2200PF/50V S1 D1

2
X7R 10% +5V_DUAL_MAIN_GATE 2 N 7
G1 D1
GND 3 6
GND S2 D2
+5V_DUAL_AUX_GATE 4 P 5
G2 D2
C C

+5VSB I
PR81
8.2K
1 2 PQ20_G

3
D
NI

1
PR79 Q8513 PC41
1 2 PQ21_B 1 4.7UF/6.3V LAN chip choose
22 SLP_LAN#

1
G 2N7002 X5R 10%
INTEL LAN,PR192/I

2
13KOHM PC45 2 S I mx_c0805
1% 4.7UF/6.3V +3P3V_LAN RTL LAN,PR191/I

1
NI/AMTI X5R 10%

G
GND I GND GND +3P3VSB +3P3VSB_IO +3P3VSB +3P3V_ME +3P3V

3 D

2
S
NI/AMTI
PR77 I
4.7K 2 +5VSB NTR4502PT1G

+3P3VSB_PR75
22,66 SLP_M# 1 I
PR42 PQ20

1
8.2K
1

B PQ12_G PR192 PR191 PR189 PR190 B


1 2
PC67 0 0 0 0
10UF/16V
2

3 I NI NI I/AMTNI
X5R 10% NI/AMTI

2
1
GND C PC80 +3P3V_ME mx_r0805 mx_r0805 mx_r0805 mx_r0805
I NI/AMTI
1 B PQ11 4.7UF/6.3V

1
G
PMBS3904 X5R 10%

2
E mx_c0805

3 D

2
2

S
NI/AMTI
NTR4502PT1G +5V_DUAL => P_+3.3V_CL for WOL
GND GND PQ12
function(LAN:0.7A+others:0.1A)
WOL_EN & SLP_M#:
For AMT
1
S0/S1 S3 S4 S5
0

WOL_EN & SLP_M#:


For non-AMT
1 S0/S1 S0/S1

A 0 S3 S4 S5 A

PEGATRON DT-MB RESTRICTED SECRET


Title : +5V_DUAL & +3P3V_ME
Pegatron Corp. Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: W ednesday, April 07, 2010 Sheet 67 of 68
5 4 3 2 1
5 4 3 2 1

+1P5V_DUAL ==> +0P75V_VTT_DDR


D
Imax=0.83A D

+5V +1P5V_DUAL

I
+1P5V_DUAL I PR21
PU2 100KOHM
GND2 9 1%
+SM_VTT 1 8
VIN NC3
2 GND1 NC2 7
3 REFEN VCNTL 6
4 5 0P75V_REF_A
VOUT NC1
RT9045GSP
I

1
I I I I PR19 I
1

1
+ PC26 PC27 PCB9 PCB8 100KOHM PC8
0.1UF/16V 1UF/16V 1% 1000PF/50V
10UF/6.3V

10UF/6.3V

2
PCE25 X7R 10% X7R 10% X7R 10%
2

2
330UF/6.3V mx_c0603 mx_c0603
2

NI

C GND GND GND GND GND GND GND GND C

4/28 MODIFY

+5VSB ==> +3P3VSB....3.44A

I
+5VSB PQ19 +3P3VSB
B LIN REG, 1085 B

3 VIN VOUT 2
ADJ

I
1

I PR44 +
1

1
PC53 120 I I
0.1UF/16V 1% PCE23 PC59
2

X7R 10% 820UF/6.3V 10UF/6.3V


2

X5R 10%
3P3VSB_ADJ mx_c0805

GND
1

GND GND
1

NI I
PC68 PR29
0.1UF/16V 200
2

1%
2

GND GND

A A

PEGATRON DT-MB RESTRICTED SECRET


Title+0P75V_VTT_
: & +1P8V_SFR
Pegatron Corp. Engineer: Michael Lee
Size Project Name Rev
A3 IPMIP-GS 1. 01
Date: Thursday, April 01, 2010 Sheet 68 of 68
5 4 3 2 1

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