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IPISB-SB
Revision: 1.00 Intel Processor
Dual Channel DDR3 MEMORY x 2 Slots
04 CHANGE HISTORY - 3
05 CLCOK DISTRIBUTION
06 SIGNAL&RESET MAP
07 POWER FLOW Webcam
USB x 4
FDI LINK
08 POWER DISTRIBUTION
DMI
<Rear>
09 POWER SEQUENCE
10~15 Sandy Bridge LGA-1155
16 PLTRST_CPU# USB x 2
17 DDR3 CHANNEL A <Side>
18 DDR3 CHANNEL B
19 DDR3 TERMINATION A&B
INTEL
Card Reader AU6433-GBL USB
20 XXXXX 480Mb/s
21~29 Cougar Point Q67
Intel 82579LM PCIE BUS
30 AMT POWER OK
C 10/100/1000 100MHz Parade C
31 PCH_DPWROK & SUS_ACK# TMDS(Port D) LVDS
32 DEBUG VGA PORT PS8615 23" LCD
33 PANEL CONTROL
Cougar Point
34 eDP TO LVDS TRANSFORMER
35 LVDS TO PANEL PCH
36 WLAN SATA BUS
SATA 2.0
37 LEWISVILLE 82579LM RJ 45 Q67 SATA 2.0
38 RJ45
39 FRONT PANEL SPI SPI FLASH 64Mb
40 SCREW HOLE WLAN PCIE BUS
(MINICARD) 942 Pin
41 WEBCAM & MIC
42 CARD READER 27mm X 27mm ALAZIA AUDIO
Azalia SPK.
43 CODEC ALC269Q ALC269Q 2W per Channel
XDP
44 COM HEADER
B 45 AUDIO JACK B
46 TPM Rear
47 SIDE USB Line Out
LPC BUS
LPC BUS
33MHz
33MHz
48 REAR USB
49 SATA CONN Mic Headphone
50 SYSTEM FAN
51 SM BUS & SPI ROM
52 19V IN
53 +3VA,+5VA,+393V_MINI
SIO11 TPM
54 +1P5V_DUAL,+1P5V
55 +VTT_DDR&+1P5V_DUAL_EN +3P3VSB,+5VSB SLB 9635 TT 1.2
56 +19V,+5V,+3P3V
57 CURRENT METER & DEBUG LED
58 +5V_DUAL,+3P3V_DUAL 68 +V_AXG DRIVER
A
59 +12V,+1P8V_SFR 69 VCORE CAP A
60 +1P05V_PCH 70 RTC/CMOS/SPKR
61 +3P3V_LAN +3P3V_ME,+1P5VSB,+1P05V_ME 71 BIOS and LPC header PEGATRON DT-MB RESTRICTED SECRET
62 +1P05V_CPUIO,+0P925V_SA 72 CPU XDP DEBUG CONNECTOR
63 +1P05V_CPUIO CAP 73 PCH XDP DEBUG CONNECTOR Title : BLOCK DIAGRAM
64~66 VCORE CONTROLLER 74 SIO11-1 Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
67 VCORE CAP 75 SIO11-2 A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 1 of 73
5 4 3 2 1
5 4 3 2 1
Schematics Change History Observation Id: 718229 - to meet the enterprise requirement (Common Reference Designators)
Observation Id: 717253 - Kona EVT2 system boards FDO jumper is labeled as IE80.
Observation Id: 720315 - VTT_DDR enable level too low Observation Id: 717255 - Kona EVT2 system boards do not have silkscreen labels for
Change PR119 to 1Kohm,delete PQ44,PR164,PC248,PR379,add PC249/PQ78(NI)/PR419(NI). Bootblock and Bootblock Recovery.
Add mini jumper E15:12 E14:12
Observation Id: 715089 - remove the EDID_WP# feature and releated circuit. Delete E69 E69:46 E69:35
Delete R37438, R37439; install R85 Delete NET:Boot_BLK_WRITE_EN, R8826, R8824
D R27, R28, R37401, R37402 change to RN4407 save layout space P1 change to P5 Layout PB D
Observation Id: 720320 - Audio BEEP support delete mini jumpter IE80:23
AUDIO_DISABLE change from PCH(GPIO32) to using SIO11 control (pin69) add SR115 E19>E14 Layout should use BB change to 2pin connector 12X602012B00 SR21
Uninstall R7247,PR418; Install PQ77,R7221,PQ76,PQ74,R7234 change to 8.2K
Uninstall R37562,R37561; Install PQ79,PR90,PR91,PQ80,PR88,PR89,PQ81,PR116 E18>E15 Layout should use BBR
delete D3601; C3623 change to 2.2uF; JE16 >E16 Layout should use ROM RCVRY mini jumper change to E16:12
delete Q56,R3620,ER103,R3619;R1219 change to reserved 0.1uF cap.Add Q9346,R37563 J90>E17 Layout should use LPC
CON3813>J9 Layout should use RJ45
Observation Id: 720321 - Support BEEP from codec in S5 state P69>J69 Layout should use VGA
Audio codec pin39 pin46 change from core power to J11>J70 ; J12 >J71 ; CON3807>J90 ; CON3806>J91 ;CON3804>J81 ; CON3805>J82
standby power(+5VSB); Layout should use USB
J87>J72 Layout should use MIC
Observation Id: 716637 - Kona EVT2 system boards do not have a silkscreen for the four rear USB ports. J89>J74 Layout should use OUT
USB port 8 change to port12 and rename to USBN12,USBP12 J76>J75 Layout should use HDPH
Delete R7177,R7178(double PU) J9>J103 Layout should use PWR
J61>J105 Layout should use X1PCIEXP11
B B
Observation Id: 720464 - HD LED didn't meet PCA spec. PWR_CON1>P1 Layout should use PWR
Delete ODD_LED#,R37448,D8823,TD1 CON3814>P6 AND CON3815 Layout should use SPKR
R82 change to Pull-high standby power, and change to 75ohm P30>P8 Layout should use CPUFAN
P29>P9 Layout should use CHFAN
Observation Id: 720468 - DDR reset measurement fail P116>P160 Layout should use SATA PWR0
Add R37564,SQ9,R37565,R37566,R37567,SQ10,SQ11,R37569,R37568 P114>P161 Layout should use SATA PWR1
Reserved SR284,SR285; delete SR283 DIMMA0>XMM1 Layout should use DIMM1
R37565 change to pull-high +3vsb DIMMB0>XMM3 Layout should use DIMM3
XBT2>XBT1 Layout should use BATTERY
Observation Id: 720322 - Clock should follow PCA spec
Install R4707 720317
Change CK_33M_TPM to PCH ball AN14
SW51 change to 2pin connector 12X400120B20 change ref to E49 Layout should use PSWD
Change CK_33M_PCIFB to PCH ball AT12
SW50 change to button type
Change CK_33M_DEBUG to PCH ball AT14
Change CK_100M_PCHXDP to Port 7
Change CLK_PCIE_WLAN to port 6
A A
Observation Id: 720324 - SM-Link didn't connect to SIO11
Add smbus link from PCH to SIO
PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
Reserved SR117
Install SR85, uninstall SR64 Title : CHANGE HISTORY-1
Reserved SR48 add SR96 Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 2 of 73
5 4 3 2 1
5 4 3 2 1
Observation Id: 720326 - Debug LED and Serial port didn't meet PCA spec
D
Change serial port solution Delete PR327,PR330 ,U9378 ,C9352 ,SR133 ,SR134 ,U9379,R37418, R37450, PC329, PQ506,R37449, PC328 D
delete Q8,R37407,R37408,Q15,R16 delete ECA5
R8831,Q9348,CR7,R4819,R8830,CR6,Q9347,R4818,CR8,R8832,R4822,
Q9349,R8833,CR10,Q9350,R4823 net SLP_A#,SLP_S5#,SLP_SUS#,SLP_LAN#
Add U7204 for Serial port function Power modify
1).Add PR196,PC178
Observation Id: 720475 - GPIO should follow PCA spec
Reserved SR113 for USB detec control
Add SR114 Thermal issue
Add COMM_B_DET# CONNECT TO GPIO69 3).delete PPQ56 and relate circuit, add PU3/PC20/PC23.
Install SR50, delete PR381/PR384/PR406/PR410,PR382/PR386/PR407/PR411 change to NI.
add PC25(NI)/PC32(NI).
Observation Id: 720452 - Power noise fail with VccClkDMI and +5VSB
PQ64 change to 07X50S211059.
SR163 change to 0 ohm, follow CRB
PQ24/PQ28/PQ67/PQ58 to NI.PQ25/PQ29/PQ69/PQ60 to Critical
change PR339 to 97.6 K and PR321 to 24 K can fix +5V noise issue.
Uninstall SR261 install SR259
C C
Observation Id: 720456 - Power Status LED didn't meet PCA spec
Change Power LED design for PCA spec.
Observation Id: 721236 - O2R122 chould chane to un-install
Observation Id: 714716 - please implenentation the DC INRUSH CIRCUIT
Add at page 55
Observation Id: 718222 - to meet enterprise PCa requirement (Smart ID )
Add at page 76
Observation Id: 719021 - Kona EVT2 system can't detect mini PCIe ETD device.
Observation Id: 719694 - Kona EVT2 systems do not have R4706 installed for the mini-PCIe slot 1.5V
Add at page 36
B B
A A
D D
C C
B B
A A
XMM3 / XMM4
XMM1 / XMM2
Sandy Bridge
M_CHA_CLK[0..3]/#
LGA-1155 Pin Socket CPU XDP
D
M_CHB_CLK[0..3]/# D
RSVD_001/002
BCLK/#_0
CK_100M_DMI/#
CK_100M_CPUXDP/# CK_100M_CPU_XDP/#_CK505
Intel 100 MHz
CK_100M_PCHXDP/#
Platform Controller Hub 100 MHz PCH XDP
CK_100M_PE16/#
Cougar Point 100 MHz PCIEx16 Slot
C C
942 Pin CK_100M_PE1/#
100 MHz PCIEx1 Slot
CK_100M_DMI2/#_CK505 CLKIN_GND1_P/N
CK_100M_LAN/#
Intel 82579 25 MHz
100 MHz
CK_133M_BCLK_CK505/#
CLKIN_GND0_P/N
CK505 CK_100M_DMI_CK505/#
CK_100M_1394/#
24.576 MHz
CLKIN_DMI_P/N 100 MHz VT6315N 1394
CK_100M_SATA_CK505/# CK_33M_TPM
CLKIN_SATA_P/N TPM Header
SLG8SP424VTR 33 MHz
CKKIN_PCILOOPBACK
AZ_BITCLK AUDIO CODEC
HDA_BCLK
24 MHz
ALC888S-VD
14.318MHz
SPI_CLK
SPI_CLK SPI ROM
XTAL25_IN RTCX 33 MHz
A A
<26>VRM_PWRGD
<6>SUS_ACK#
SUS_ACK#
B B
<3>PCH_DPWROK
DPWROK <16>
PWROK APWROK +1P05V_CPUIO
<17>1P05V_CPUIO_PWRGD
PWRGD
<22>PWROK
ME & LAN POWER NCP5380MNTXG
+1P05V_ME Vcore Controller
ONBOARD POWER +3P3V_LAN <14>APWROK
VDIO/VCLK
+3P3V_ME VR_RDY <25>VCORE
<18>
CK505 VCORE +0P925V_SA
STANDBY POWER MB Logic <16>+1P05V_CPUIO
<22>CK505_PWRGD
<8> +5VSB CKPWRGD/PD# EN <19>+1P05V_CPUIO EN
CHIP +3P3VSB
LM358
RT8859AGQW
MB Logic
A A
<2>+5VA
MB Logic
SOCKET or SLOT PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
<2>+5VA
2X12 ATX PSU Title : SIGNAL&RESET MAP
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 6 of 73
5 4 3 2 1
5 4 3 2 1
ऌए࣮ࣜइࣾ࣫उए
+5V_DUAL
ऀऀऎ࣮ࣜऀअउउࣰࣜࣤࣥࣜࣜऐडमऩथपझरथफप ࣽईࣿࣴࣴࣴएࣩऒऀࣜࣿफठडट 66!$:
+1P5V_DAUL +3P3V 6!P$P:
!P$P:
9''666!$:
+VTT_DDR(0.75V) एऌअ
6097766!$:
+3P3V_ME
!P$P:
A A
D
RSMRST# D
SUSWARN#
SUSACK#
SLP_LAN#
SLP_A#
+1P05V_ME
SLP_S5# 30uS
SLP_S4#
SLP_S3# 30uS
APWROK
C PSU: <=20mS C
+12V / +5V
+3P3V
+1P5V_DUAL =500mS
+1P05V_CPUIO
=50mS UNCOREPWRGOOD assertion
+1P8V_SFR
VCCSA_VID[0] FINAL
VCCSA_VID
UNCOREPWRGOOD must be stable (low) at this time
Recommended that +0P925V_SA ramp after +1P05V_CPUIO has ramped to ensure VCCSA_VID[0] is stable +0P925V_SA FINAL
+0P925V_SA <5mS
VCORE EN Typ 60uS
CPU SVID buffers are Hi-Z once VCCIO is Set VID Get Reg Pay
VIDSCLK / VIDSOUT MISC ACK0/1... slow packet ACK0/1... status packet ACK0/1... load
B stable and Uncorepowergood = 0 B
<600uS >400uS
CPU SVID buffers are Hi-Z once VCCIO is
VIDALERT# stable and Uncorepowergood = 0 <1uS
PSU: 100ms~500ms
ATX_PWRGD 1mS
BCLK / PCIE CLOCKS
Min 10 PCIe BCLKs
>1mS
DRAM_PWROK
CPUPWRGD <5uS
<2mS
+VCORE 5mS
VRM_PWRGD
A
<5mS A
1~100mS
PLTRST#
PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
Critical
XU1A
{17} M_CHA_DQ[0..63] M_CHA_MAA[0..15] {17}
M_CHA_DQS0 AK3 AV27 M_CHA_MAA0
{17} M_CHA_DQS0 SA_DQS_0 SA_MA_0
M_CHA_DQS0# AK2 AY24 M_CHA_MAA1
{17} M_CHA_DQS0# SA_DQS#_0 SA_MA_1
AW24 M_CHA_MAA2
M_CHA_DQ0 SA_MA_2 M_CHA_MAA3
AJ3 SA_DQ_0 SA_MA_3 AW23
M_CHA_DQ1 AJ4 AV23 M_CHA_MAA4
M_CHA_DQ2 SA_DQ_1 SA_MA_4 M_CHA_MAA5
AL3 SA_DQ_2 SA_MA_5 AT24
M_CHA_DQ3 AL4 AT23 M_CHA_MAA6
M_CHA_DQ4 SA_DQ_3 SA_MA_6 M_CHA_MAA7
AJ2 SA_DQ_4 SA_MA_7 AU22
M_CHA_DQ5 AJ1 AV22 M_CHA_MAA8
M_CHA_DQ6 SA_DQ_5 SA_MA_8 M_CHA_MAA9
D AL2 SA_DQ_6 SA_MA_9 AT22 D
M_CHA_DQ7 AL1 AV28 M_CHA_MAA10
SA_DQ_7 SA_MA_10 M_CHA_MAA11
SA_MA_11 AU21
AT21 M_CHA_MAA12
M_CHA_DQS1 SA_MA_12 M_CHA_MAA13
{17} M_CHA_DQS1 AP3 SA_DQS_1 SA_MA_13 AW32
M_CHA_DQS1# AP2 AU20 M_CHA_MAA14
{17} M_CHA_DQS1# SA_DQS#_1 SA_MA_14
AT20 M_CHA_MAA15
M_CHA_DQ8 SA_MA_15
AN1 SA_DQ_8
M_CHA_DQ9 AN4
M_CHA_DQ10 SA_DQ_9
AR3 SA_DQ_10
M_CHA_DQ11 AR4
M_CHA_DQ12 SA_DQ_11
AN2 SA_DQ_12 SA_WE# AW29 M_CHA_WE# {17}
M_CHA_DQ13 AN3 AV30 M_CHA_CAS# {17}
M_CHA_DQ14 SA_DQ_13 SA_CAS#
AR2 SA_DQ_14 SA_RAS# AU28 M_CHA_RAS# {17}
M_CHA_DQ15 AR1 SA_DQ_15
M_CHA_DQS4 AV37
{17} M_CHA_DQS4 SA_DQS_4
M_CHA_DQS4# AV36 AY25 M_CHA_CLK0 {17}
{17} M_CHA_DQS4# SA_DQS#_4 SA_CK_0
SA_CK#_0 AW25 M_CHA_CLK0# {17}
M_CHA_DQ32 AU35 AU24 M_CHA_CLK1 {17}
M_CHA_DQ33 SA_DQ_32 SA_CK_1
AW37 SA_DQ_33 SA_CK#_1 AU25 M_CHA_CLK1# {17}
M_CHA_DQ34 AU39 AW27
M_CHA_DQ35 SA_DQ_34 SA_CK_2
AU36 SA_DQ_35 SA_CK#_2 AY27
M_CHA_DQ36 AW35 AV26
M_CHA_DQ37 SA_DQ_36 SA_CK_3
AY36 SA_DQ_37 SA_CK#_3 AW26
M_CHA_DQ38 AU38
M_CHA_DQ39 SA_DQ_38
AU37 SA_DQ_39
M_CHA_DQS5 AP38
{17} M_CHA_DQS5 SA_DQS_5
M_CHA_DQS5# AP39
B {17} M_CHA_DQS5# SA_DQS#_5 B
M_CHA_DQ40 AR40
M_CHA_DQ41 SA_DQ_40
AR37 SA_DQ_41
M_CHA_DQ42 AN38
M_CHA_DQ43 SA_DQ_42
AN37 SA_DQ_43
M_CHA_DQ44 AR39
M_CHA_DQ45 SA_DQ_44
AR38 SA_DQ_45
M_CHA_DQ46 AN39
M_CHA_DQ47 SA_DQ_46
AN40 SA_DQ_47 SM_DRAMRST# AW18 DDR3_DRAMRST# {20}
M_CHA_DQS6 AK38
{17} M_CHA_DQS6 SA_DQS_6
M_CHA_DQS6# AK39
{17} M_CHA_DQS6# SA_DQS#_6
M_CHA_DQ48 AL40
M_CHA_DQ49 SA_DQ_48
AL37 SA_DQ_49
M_CHA_DQ50 AJ38
M_CHA_DQ51 SA_DQ_50
AJ37 SA_DQ_51
M_CHA_DQ52 AL39
M_CHA_DQ53 SA_DQ_52
AL38 SA_DQ_53
M_CHA_DQ54 AJ39
M_CHA_DQ55 SA_DQ_54
AJ40 SA_DQ_55
SA_DQS_8 AV13
SA_DQS#_8 AV12
M_CHA_DQS7 AF38
{17} M_CHA_DQS7 SA_DQS_7
M_CHA_DQS7# AF39
{17} M_CHA_DQS7# SA_DQS#_7
M_CHA_DQ56 AG40 AU12
SA_DQ_56 SA_ECC_CB_0
A
M_CHA_DQ57
M_CHA_DQ58
AG37
AE38
SA_DQ_57 SA_ECC_CB_1 AU14
AW13
NOTE: A
Critical
XU1B
{18} M_CHB_DQ[0..63] M_CHB_MAA[0..15] {18}
M_CHB_DQS0 AH7 AK24 M_CHB_MAA0
{18} M_CHB_DQS0 SB_DQS_0 SB_MA_0
M_CHB_DQS0# AH6 AM20 M_CHB_MAA1
{18} M_CHB_DQS0# SB_DQS#_0 SB_MA_1
AM19 M_CHB_MAA2
M_CHB_DQ0 SB_MA_2 M_CHB_MAA3
AG7 SB_DQ_0 SB_MA_3 AK18
M_CHB_DQ1 AG8 AP19 M_CHB_MAA4
M_CHB_DQ2 SB_DQ_1 SB_MA_4 M_CHB_MAA5
AJ9 SB_DQ_2 SB_MA_5 AP18
M_CHB_DQ3 AJ8 AM18 M_CHB_MAA6
M_CHB_DQ4 SB_DQ_3 SB_MA_6 M_CHB_MAA7
AG5 SB_DQ_4 SB_MA_7 AL18
D M_CHB_DQ5 AG6 AN18 M_CHB_MAA8 D
M_CHB_DQ6 SB_DQ_5 SB_MA_8 M_CHB_MAA9
AJ6 SB_DQ_6 SB_MA_9 AY17
M_CHB_DQ7 AJ7 AN23 M_CHB_MAA10
SB_DQ_7 SB_MA_10 M_CHB_MAA11
SB_MA_11 AU17
AT18 M_CHB_MAA12
M_CHB_DQS1 SB_MA_12 M_CHB_MAA13
{18} M_CHB_DQS1 AM8 SB_DQS_1 SB_MA_13 AR26
M_CHB_DQS1# AL8 AY16 M_CHB_MAA14
{18} M_CHB_DQS1# SB_DQS#_1 SB_MA_14
AV16 M_CHB_MAA15
M_CHB_DQ8 SB_MA_15
AL7 SB_DQ_8
M_CHB_DQ9 AM7
M_CHB_DQ10 SB_DQ_9
AM10 SB_DQ_10
M_CHB_DQ11 AL10
M_CHB_DQ12 SB_DQ_11
AL6 SB_DQ_12 SA_CK[2] AR25 M_CHB_WE# {18}
M_CHB_DQ13 AM6 AK25 M_CHB_CAS# {18}
M_CHB_DQ14 SB_DQ_13 SA_CK[1]
AL9 SB_DQ_14 SA_ODT[2] AP24 M_CHB_RAS# {18}
M_CHB_DQ15 AM9 SB_DQ_15
M_CHB_DQS4 AN29
{18} M_CHB_DQS4 SB_DQS_4
M_CHB_DQS4# AN28 AL21 M_CHB_CLK0 {18}
{18} M_CHB_DQS4# SB_DQS#_4 SB_CK_0
SB_CK#_0 AL22 M_CHB_CLK0# {18}
M_CHB_DQ32 AR28 AL20 M_CHB_CLK1 {18}
M_CHB_DQ33 SB_DQ_32 SB_CK_1
AR29 SB_DQ_33 SB_CK#_1 AK20 M_CHB_CLK1# {18}
M_CHB_DQ34 AL28 AL23
M_CHB_DQ35 SB_DQ_34 SB_CK_2
AL29 SB_DQ_35 SB_CK#_2 AM22
M_CHB_DQ36 AP28 AP21
M_CHB_DQ37 SB_DQ_36 SB_CK_3
AP29 SB_DQ_37 SB_CK#_3 AN21
M_CHB_DQ38 AM28
M_CHB_DQ39 SB_DQ_38
AM29 SB_DQ_39
M_CHB_DQS5 AP33
B {18} M_CHB_DQS5 SB_DQS_5 B
M_CHB_DQS5# AR33
{18} M_CHB_DQS5# SB_DQS#_5
M_CHB_DQ40 AP32
M_CHB_DQ41 SB_DQ_40
AP31 SB_DQ_41
M_CHB_DQ42 AP35
M_CHB_DQ43 SB_DQ_42
AP34 SB_DQ_43
M_CHB_DQ44 AR32
M_CHB_DQ45 SB_DQ_44
AR31 SB_DQ_45
M_CHB_DQ46 AR35
M_CHB_DQ47 SB_DQ_46
AR34 SB_DQ_47
M_CHB_DQS6 AL33
{18} M_CHB_DQS6 SB_DQS_6
M_CHB_DQS6# AM33
{18} M_CHB_DQS6# SB_DQS#_6
M_CHB_DQ48 AM32
M_CHB_DQ49 SB_DQ_48
AM31 SB_DQ_49
M_CHB_DQ50 AL35
M_CHB_DQ51 SB_DQ_50
AL32 SB_DQ_51
M_CHB_DQ52 AM34
M_CHB_DQ53 SB_DQ_52
AL31 SB_DQ_53
M_CHB_DQ54 AM35
M_CHB_DQ55 SB_DQ_54
AL34 SB_DQ_55
SB_DQS_8 AN16
SB_DQS#_8 AN15
M_CHB_DQS7 AG35
{18} M_CHB_DQS7 SB_DQS_7
M_CHB_DQS7# AG34
{18} M_CHB_DQS7# SB_DQS#_7
A
M_CHB_DQ56 AH35 AL16 A
M_CHB_DQ57 SB_DQ_56 SB_ECC_CB_0
AH34 SB_DQ_57 SB_ECC_CB_1 AM16
M_CHB_DQ58 AE34 AP16
M_CHB_DQ59 SB_DQ_58 SB_ECC_CB_2
AE35 SB_DQ_59 SB_ECC_CB_3 AR16
M_CHB_DQ60 AJ35 AL15
M_CHB_DQ61 AJ34
SB_DQ_60 SB_ECC_CB_4
AM15
PEGATRON DT-MB RESTRICTED SECRET
M_CHB_DQ62 SB_DQ_61 SB_ECC_CB_5
AF33 SB_DQ_62 SB_ECC_CB_6 AR15
M_CHB_DQ63 AF35 SB_DQ_63 SB_ECC_CB_7 AP15 Title : DDR3_B 2-6
Pegatron Corp. Engineer: Scott Chen
DDR3_B Size Project Name Rev
SOCKET_1155P A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 11 of 73
5 4 3 2 1
5 4 3 2 1
Critical
XU1C
B11 PEG_RX_0 PEG_TX_0 C13
B12 PEG_RX#_0 PEG_TX#_0 C14 Critical
D12 E14
XU1D
PEG_RX_1 PEG_TX_1
D D11 PEG_RX#_1 PEG_TX#_1 E13 D
+1P05V_CPUIO AC8
FDI_TX_0 FDI_TXP0 {26}
C10 PEG_RX_2 PEG_TX_2 G14 FDI_TX#_0 AC7 FDI_TXN0 {26}
C9 PEG_RX#_2 PEG_TX#_2 G13
1
I FDI_TX_1 AC2 FDI_TXP1 {26}
E10 F12 HR2 AC3
PEG_RX_3 PEG_TX_3 FDI_TX#_1 FDI_TXN1 {26}
E9 F11 24.9
PEG_RX#_3 PEG_TX#_3 1%
FDI_TX_2 AD2 FDI_TXP2 {26}
B8 J14 mx_r0402_small AD1 FDI_TXN2 {26}
2
PEG_RX_4 PEG_TX_4 FDI_TX#_2
B7 PEG_RX#_4 PEG_TX#_4 J13
FDI_COMP AE2 AD4
FDI_COMPIO FDI_TX_3 FDI_TXP3 {26}
C6 PEG_RX_5 PEG_TX_5 D8 AE1 FDI_ICOMPO FDI_TX#_3 AD3 FDI_TXN3 {26}
C5 PEG_RX#_5 PEG_TX#_5 D7
A5
A6
PEG_RX_6 PEG_TX_6 D3
C3
FDI
PEG_RX#_6 PEG_TX#_6
E2 PEG_RX_7 PEG_TX_7 E6 {26} FDI_FSYNC_0 AC5 FDI_FSYNC_0 FDI_TX_4 AD7 FDI_TXP4 {26}
E1 PEG_RX#_7 PEG_TX#_7 E5 {26} FDI_LSYNC_0 AC4 FDI_LSYNC_0 FDI_TX#_4 AD6 FDI_TXN4 {26}
F4 PEG_RX_8 PEG_TX_8 F8 FDI_TX_5 AE7 FDI_TXP5 {26}
F3 PEG_RX#_8 PEG_TX#_8 F7 FDI_TX#_5 AE8 FDI_TXN5 {26}
{26} FDI_FSYNC_1 AE5 FDI_FSYNC_1
G2 PEG_RX_9 PEG_TX_9 G10 {26} FDI_LSYNC_1 AE4 FDI_LSYNC_1 FDI_TX_6 AF3 FDI_TXP6 {26}
G1 PEG_RX#_9 PEG_TX#_9 G9 FDI_TX#_6 AF2 FDI_TXN6 {26}
H3 PEG_RX_10 PEG_TX_10 G5 FDI_TX_7 AG2 FDI_TXP7 {26}
H4 PEG_RX#_10 PEG_TX#_10 G6 {26} FDI_INT AG3 FDI_INT FDI_TX#_7 AG1 FDI_TXN7 {26}
C J1 K7 C
PEG_RX_11 PEG_TX_11
J2 PEG_RX#_11 PEG_TX#_11 K8
K3 PEG_RX_12 PEG_TX_12 J5
K4 J6 SOCKET_1155P
PEG_RX#_12 PEG_TX#_12
L1 PEG_RX_13 PEG_TX_13 M8
L2 PEG_RX#_13 PEG_TX#_13 M7
M3 PEG_RX_14 PEG_TX_14 L6
M4 PEG_RX#_14 PEG_TX#_14 L5
N1 PEG_RX_15 PEG_TX_15 N5
N2 PEG_RX#_15 PEG_TX#_15 N6
PEG
{22} DMI_RXP0 W5 DMI_RX_0 DMI_TX_0 V7 DMI_TXP0 {22}
{22} DMI_RXN0 W4 DMI_RX#_0 DMI_TX#_0 V6 DMI_TXN0 {22}
+1P05V_CPUIO
DMI
1
I
HR3
24.9
B5 1%
PEG_ICOMPO mx_r0402_small
C4
2
PEG_RCOMPO PEG_COMP
PEG_COMPI B4
P3 PE_RX_0 PE_TX_0 P8
P4 PE_RX#_0 PE_TX#_0 P7
R2 PE_RX_1 PE_TX_1 T7
R1 PE_RX#_1 PE_TX#_1 T8
T4 PE_RX_2 PE_TX_2 R6
T3 PE_RX#_2 PE_TX#_2 R5
U2 PE_RX_3 PE_TX_3 U5
U1 PE_RX#_3 PE_TX#_3 U6
A GEN A
SOCKET_1155P
Critical
XU1E
1
{72} CK_100M_CPU_XDP C40 RSVD_001 VCC_SENSE A36 VCC_SENSE {64} NI
D D40 B36 HR60 D
{72} CK_100M_CPU_XDP# RSVD_002 VSS_SENSE VSS_SENSE {64}
1K
AB4 mx_r0402_small
VCCIO_SENSE VCCIO_SENSE {62}
NOTE: AB3 VSSIO_SENSE {62}
2
+1P05V_CPUIO VSSIO_SENSE
+1P5V_DUAL Place near CPU L32
VCCAXG_SENSE VCCAXG_SENSE {64}
VSSAXG_SENSE M32 VSSAXG_SENSE {64} GND
2
1
I
+1P05V_CPUIO NOTE:
SR90 NI NI I
200 Ohm
5%
HR4
51
HR5
90.9
HR6
110
HR7
75
C134 +5V +1P05V_CPUIO
NOTE:
0.01UF/25V Place near CPU
2
mx_r0402_small
1% 1% 1% X7R 10% Place near XDP connector
1
mx_r0402_small
mx_r0402_small
mx_r0402_small
2
NI
1
GND I PROTO
1
{64} VIDSCLK C37 VIDSCLK
HR52 PROTO PROTO HR10
B37 10K HR8 HR9 51
{64} VIDSOUT VIDSOUT
{64} VIDALERT# I HR11 44.2 1 2 1% mx_r0402_small
H_VIDALERT# A37
VIDALERT#
mx_r0402_small 51 51 mx_r0402_small
mx_r0402_small mx_r0402_small
2
2
2
{16} PLTRST_CPU# F36 RESET#
{24,72} CPUPWRGD J40 UNCOREPWRGOOD VCCP_SELECT P33 VCCIO_SEL {62}
{24} DRAM_PWROK I R1458 1 2 120 Ohm 1% R_DRAM_PWROK AJ19 SM_DRAMPWROK
NI TDO L39 TDO {72}
1
HC5 NI TDI L40 TDI {72}
0.1UF/16V HR59 M40
TCK TCK {72}
1
2
TMS
1
1
HC7 HR58 HC6 mx_c0402_small mx_r0402_small J39
TRST# TRST# {72}
0.1UF/16V 1K 0.1UF/16V For VR Debug
2
C X7R 10% mx_r0402_small X7R 10% C
2
1
mx_c0402_small mx_c0402_small GND MISC I
2
1
HR53 PROTO PROTO
+1P8V_SFR +1P05V_CPUIO GND 4.7K HR12 HR13
mx_r0402_small 51 51
GND GND GND +3P3VSB mx_r0402_small mx_r0402_small
2
1
I
1
1
HR14 NI NI I NI
2.2K HR16 HR17 HR18 HR20 GND NI
mx_r0402_small 1K 1K 51 51 HR15 GND GND
mx_r0402_small mx_r0402_small
mx_r0402_small
mx_r0402_small 220
2
mx_r0402_small
2
2
H_PECI_R J35 K38
{23,74} PECI_SIO PECI PRDY# H_PRDY# {72}
CATERR_R# E37 K40
{57} CATERR# CATERR# PREQ# H_PREQ# {72}
{64,74,76} PROCHOT# H34 PROCHOT# DBR# E39 SYS_RESET_DBR# {24,72,73}
{74} H_THMTRIP# G35 THERMTRIP#
{23} PM_SYNC E38 PM_SYNC
H_DDR_VREF AJ22 SM_VREF
HCB4 G39
BPM#_4 BPM4# {72}
Place HR23 close to NVRAM connector NI 0.1UF/16V
BPM#_5 F38 BPM5# {72}
1
I
D3R39 L9
100 RSVD_038
0 0 X8, X4/X4 GND RSVD_032 J9
1% NI HR41 2 1 1K mx_r0402_small
H_CFG16_SNB_PCUSTB0
G37 CFG_16 RSVD_034 K9
mx_r0402_small NI HR40 2 1 1K mx_r0402_small
H_CFG17_SNB_PCUSTB1
G36
2
CFG_17
RSVD_035 L31
GND AT14 RSVD_016
RSVD_050 J31
A AY3 RSVD_023 RSVD_053 K31 A
1
I I
1
mx_r0402_small mx_c0402_small
2
1
A18 G18 AB8 AJ24 HCB1 HCB6 HCB3 AB38
VCC_006 VCC_087 VCCIO_04 VDDQ_05 22UF/6.3V 22UF/6.3V 22UF/6.3V VCCAXG_06
A24 VCC_007 VCC_088 G19 AF8 VCCIO_05 VDDQ_06 AR20 AB39 VCCAXG_07
A25 G21 AG33 AR21 X5R 20% X5R 20% X5R 20% AB40
2
VCC_008 VCC_089 VCCIO_06 VDDQ_07 mx_c0805 mx_c0805 mx_c0805 VCCAXG_08
A27 VCC_009 VCC_090 G22 AJ16 VCCIO_07 VDDQ_08 AR22 AC33 VCCAXG_09
A28 VCC_010 VCC_091 G24 AJ17 VCCIO_08 VDDQ_09 AR23 AC34 VCCAXG_10
B15 VCC_011 VCC_092 G25 AJ26 VCCIO_09 VDDQ_10 AR24 AC35 VCCAXG_11
B16 VCC_012 VCC_093 G27 AJ28 VCCIO_10 VDDQ_11 AU19 AC36 VCCAXG_12
B18 VCC_013 VCC_094 G28 AJ32 VCCIO_11 VDDQ_12 AU23 GND GND GND AC37 VCCAXG_13
B24 VCC_014 VCC_095 G30 AK15 VCCIO_12 VDDQ_13 AU27 AC38 VCCAXG_14
B25 VCC_015 VCC_096 G31 AK17 VCCIO_13 VDDQ_14 AU31 Inside processor socket cavity AC39 VCCAXG_15
B27 VCC_016 VCC_097 G32 AK19 VCCIO_14 VDDQ_15 AV21 AC40 VCCAXG_16
B28 VCC_017 VCC_098 G33 AK21 VCCIO_15 VDDQ_16 AV24 T33 VCCAXG_17
B30 VCC_018 VCC_099 H13 AK23 VCCIO_16 VDDQ_17 AV25 T34 VCCAXG_18
B31 VCC_019 VCC_100 H14 AK27 VCCIO_17 VDDQ_18 AV29 T35 VCCAXG_19
B33 VCC_020 VCC_101 H15 AK29 VCCIO_18 VDDQ_19 AV33 T36 VCCAXG_20
B34 VCC_021 VCC_102 H16 AK30 VCCIO_19 VDDQ_20 AW31 T37 VCCAXG_21
C15 VCC_022 VCC_103 H18 B9 VCCIO_20 VDDQ_21 AY23 T38 VCCAXG_22
C16 VCC_023 VCC_104 H19 D10 VCCIO_21 VDDQ_22 AY26 T39 VCCAXG_23
C18 VCC_024 VCC_105 H21 D6 VCCIO_22 VDDQ_23 AY28 T40 VCCAXG_24
C19 VCC_025 VCC_106 H22 E3 VCCIO_23 U33 VCCAXG_25
C C21 H24 E4 AJ20 U34 C
VCC_026 VCC_107 VCCIO_24 VDDQ_03 VCCAXG_26
C22 VCC_027 VCC_108 H25 G3 VCCIO_25 U35 VCCAXG_27
C24 VCC_028 VCC_109 H27 G4 VCCIO_26 U36 VCCAXG_28
C25 VCC_029 VCC_110 H28 J3 VCCIO_27 U37 VCCAXG_29
C27 VCC_030 VCC_111 H30 J4 VCCIO_28 U38 VCCAXG_30
C28 VCC_031 VCC_112 H31 J7 VCCIO_29 U39 VCCAXG_31
C30 VCC_032 VCC_113 H32 J8 VCCIO_30 U40 VCCAXG_32
C31 VCC_033 VCC_114 J12 L3 VCCIO_31 W33 VCCAXG_33
C33 VCC_034 VCC_115 J15 L4 VCCIO_32 W34 VCCAXG_34
C34 VCC_035 VCC_116 J16 L7 VCCIO_33 W35 VCCAXG_35
C36 VCC_036 VCC_117 J18 N3 VCCIO_35 W36 VCCAXG_36
D13 VCC_037 VCC_118 J19 N4 VCCIO_36 W37 VCCAXG_37
D14 VCC_038 VCC_119 J21 N7 VCCIO_37 W38 VCCAXG_38
D15 VCC_039 VCC_120 J22 R3 VCCIO_38 Y33 VCCAXG_39
D16 VCC_040 VCC_121 J24 R4 VCCIO_39 Y34 VCCAXG_40
D18 VCC_041 VCC_122 J25 R7 VCCIO_40 Y35 VCCAXG_41
D19 VCC_042 VCC_123 J27 U3 VCCIO_41 Y36 VCCAXG_42
D21 VCC_043 VCC_124 J28 U4 VCCIO_42 Y37 VCCAXG_43
D22 VCC_044 VCC_125 J30 U7 VCCIO_43 Y38 VCCAXG_44
D24 VCC_045 VCC_126 K15 V8 VCCIO_44
D25 VCC_046 VCC_127 K16 W3 VCCIO_45
D27 VCC_047 VCC_128 K18
D28 VCC_048 VCC_129 K19
D30 K21 SOCKET_1155P
VCC_049 VCC_130
D31 VCC_050 VCC_131 K22
D33 K24 +0P925V_SA
VCC_051 VCC_132
D34 VCC_052 VCC_133 K25
D35 VCC_053 VCC_134 K27 H10 VCCSA_01
D36 VCC_054 VCC_135 K28 H11 VCCSA_02
B B
E15 VCC_055 VCC_136 K30 H12 VCCSA_03
E16 VCC_056 VCC_137 L13 J10 VCCSA_04
E18 VCC_057 VCC_138 L14 K10 VCCSA_05
E19 VCC_058 VCC_139 L15 K11 VCCSA_06
E21 VCC_059 VCC_140 L16 L11 VCCSA_07
E22 VCC_060 VCC_141 L18 L12 VCCSA_08
E24 VCC_061 VCC_142 L19 M10 VCCSA_09
E25 VCC_062 VCC_143 L21 M11 VCCSA_10
E27 VCC_063 VCC_144 L22 M12 VCCSA_11
E28 VCC_064 VCC_145 L24
E30 VCC_065 VCC_146 L25
E31 VCC_066 VCC_147 L27
E33 L28 +1P8V_SFR
VCC_067 VCC_148
E34 VCC_068 VCC_149 L30
E35 VCC_069 VCC_150 M14 AK11 VCCPLL_01
F15 VCC_070 VCC_151 M15 AK12 VCCPLL_02
F16 VCC_071 VCC_152 M16
F18 VCC_072 VCC_153 M18
F19 VCC_073 VCC_154 M19
F21 VCC_074 VCC_155 M21
F22 VCC_075 VCC_156 M22
F24 VCC_076 VCC_157 M24
F25 VCC_077 VCC_158 M25
F27 M27 SOCKET_1155P
VCC_078 VCC_159
F28 VCC_079 VCC_160 M28
F30 VCC_080 VCC_161 M30
F31 VCC_081
A A
1
AA34 AM39 AV6 H26 AJ31 AN20 HC2 HC3
VSS_007 VSS_097 VSS_187 VSS_277 RSVD_12 RSVD_13 0.1UF/10V 0.1UF/10V
AA35 VSS_008 VSS_098 AM4 AW10 VSS_188 VSS_278 H29 AV34 RSVD_19 RSVD_17 AU10
AA36 AM40 AW11 H33 AW34 AY10 0.1 0.1
2
VSS_009 VSS_099 VSS_189 VSS_279 RSVD_21 RSVD_22
AA37 VSS_010 VSS_100 AM5 AW14 VSS_190 VSS_280 H35
AA38 VSS_011 VSS_101 AN10 AW16 VSS_191 VSS_281 H37 P35 RSVD_43
AA6 VSS_012 VSS_102 AN11 AW36 VSS_192 VSS_282 H39 P37 RSVD_44
AB5 VSS_013 VSS_103 AN14 AW6 VSS_193 VSS_283 H5 P39 RSVD_45 GND GND
AC1 VSS_014 VSS_104 AN17 AY11 VSS_194 VSS_284 H6 R34 RSVD_46
AC6 VSS_015 VSS_105 AN19 AY14 VSS_195 VSS_285 H9 R36 RSVD_47
AD33 VSS_016 VSS_106 AN22 AY18 VSS_196 VSS_286 J11 R38 RSVD_48 RSVD_07 AF4
AD36 VSS_017 VSS_107 AN24 AY35 VSS_197 VSS_287 J17 R40 RSVD_49 RSVD_03 AB6
AD38 VSS_018 VSS_108 AN27 AY4 VSS_198 VSS_288 J20 RSVD_06 AE6
AD39 VSS_019 VSS_109 AN30 AY6 VSS_199 VSS_289 J23 RSVD_09 AJ11
AD40 VSS_020 VSS_110 AN31 AY8 VSS_200 VSS_290 J26
AD5 VSS_021 VSS_111 AN32 B10 VSS_201 VSS_291 J29
AD8 VSS_022 VSS_112 AN33 B13 VSS_202 VSS_292 J32 NOBOM HT38 1 TP_H_NCTF_1 A38 NCTF_01 RSVD_27 D38
AE3 VSS_023 VSS_113 AN34 B14 VSS_203 VSS_293 K1 AU40 NCTF_02 RSVD_26 C39
AE33 VSS_024 VSS_114 AN35 B17 VSS_204 VSS_294 K12 AW38 NCTF_03 RSVD_25 C38
AE36 VSS_025 VSS_115 AN36 B23 VSS_205 VSS_295 K13 NOBOM HT41 1 TP_H_NCTF_4 C2 NCTF_04 RSVD_31 J34
AF1 VSS_026 VSS_116 AN5 B26 VSS_206 VSS_296 K14 NOBOM HT42 1 TP_H_NCTF_5 D1 NCTF_05 RSVD_41 N34
AF34 VSS_027 VSS_117 AN6 B29 VSS_207 VSS_297 K17
AF36 VSS_028 VSS_118 AN7 B32 VSS_208 VSS_298 K2
AF37 VSS_029 VSS_119 AN8 B35 VSS_209 VSS_299 K20 NP_NC1 1
AF40 VSS_030 VSS_120 AN9 B38 VSS_210 VSS_300 K23 NP_NC2 2
AF5 VSS_031 VSS_121 AP1 B6 VSS_211 VSS_301 K26 NP_NC3 3
AF6 VSS_032 VSS_122 AP11 C11 VSS_212 VSS_302 K29 NP_NC4 4
AF7 VSS_033 VSS_123 AP14 C12 VSS_213 VSS_303 K33 NP_NC5 5
C AG36 AP17 C17 K35 6 C
VSS_034 VSS_124 VSS_214 VSS_304 NP_NC6
AH2 VSS_035 VSS_125 AP22 C20 VSS_215 VSS_305 K37 NP_NC7 7
AH3 VSS_036 VSS_126 AP25 C23 VSS_216 VSS_306 K39
AH33 VSS_037 VSS_127 AP27 C26 VSS_217 VSS_307 K5
AH36 VSS_038 VSS_128 AP30 C29 VSS_218 VSS_308 K6
AH37 VSS_039 VSS_129 AP36 C32 VSS_219 VSS_309 L10
AH38 AP37 C35 L17 SOCKET_1155P
VSS_040 VSS_130 VSS_220 VSS_310
AH39 VSS_041 VSS_131 AP4 C7 VSS_221 VSS_311 L20
AH40 VSS_042 VSS_132 AP40 C8 VSS_222 VSS_312 L23
AH5 VSS_043 VSS_133 AP5 D17 VSS_223 VSS_313 L26
AH8 VSS_044 VSS_134 AR11 D2 VSS_224 VSS_314 L29
AJ12 VSS_045 VSS_135 AR14 D20 VSS_225 VSS_315 L8
AJ15 VSS_046 VSS_136 AR17 D23 VSS_226 VSS_316 M1 Critical Critical
AJ18
AJ21
VSS_047 VSS_137 AR18
AR19
D26
D29
VSS_227 VSS_317 M17
M2
BACKPLATE1 ILM1
VSS_048 VSS_138 VSS_228 VSS_318
AJ25 VSS_049 VSS_139 AR27 D32 VSS_229 VSS_319 M20
AJ27 VSS_050 VSS_140 AR30 D37 VSS_230 VSS_320 M23
AJ36 VSS_051 VSS_141 AR36 D39 VSS_231 VSS_321 M26
AJ5 VSS_052 VSS_142 AR5 D4 VSS_232 VSS_322 M29
AK1 VSS_053 VSS_143 AT1 D5 VSS_233 VSS_323 M33
AK10 VSS_054 VSS_144 AT10 D9 VSS_234 VSS_324 M35
AK13 VSS_055 VSS_145 AT12 E11 VSS_235 VSS_325 M37
AK14 VSS_056 VSS_146 AT13 E12 VSS_236 VSS_326 M39
AK16 VSS_057 VSS_147 AT15 E17 VSS_237 VSS_327 M5
AK22 VSS_058 VSS_148 AT16 E20 VSS_238 VSS_328 M6
AK28 VSS_059 VSS_149 AT17 E23 VSS_239 VSS_329 M9
AK31 VSS_060 VSS_150 AT2 E26 VSS_240 VSS_330 N8
AK32 VSS_061 VSS_151 AT25 E29 VSS_241 VSS_331 P1
AK33 VSS_062 VSS_152 AT27 E32 VSS_242 VSS_332 P2
B B
AK34 VSS_063 VSS_153 AT28 E36 VSS_243 VSS_333 P36
AK35 VSS_064 VSS_154 AT29 E7 VSS_244 VSS_334 P38
AK36 VSS_065 VSS_155 AT3 E8 VSS_245 VSS_335 P40
AK37 VSS_066 VSS_156 AT30 F1 VSS_246 VSS_336 P5 INTEL LGA 1156P BACK PLATE,3 SCREW INTEL LGA1156 SOCKET ILM
AK4 VSS_067 VSS_157 AT31 F10 VSS_247 VSS_337 P6
AK40 AT32 F13 R33 PT44P11-6401 SOCKET1156_ILM
VSS_068 VSS_158 VSS_248 VSS_338
AK5 VSS_069 VSS_159 AT33 F14 VSS_249 VSS_339 R35
AK6 VSS_070 VSS_160 AT34 F17 VSS_250 VSS_340 R37
AK7 VSS_071 VSS_161 AT35 F2 VSS_251 VSS_341 R39
AK8 VSS_072 VSS_162 AT36 F20 VSS_252 VSS_342 R8
AK9 VSS_073 VSS_163 AT37 F23 VSS_253 VSS_343 T1
AL11 VSS_074 VSS_164 AT38 F26 VSS_254 VSS_344 T5
AL14 VSS_075 VSS_165 AT39 F29 VSS_255 VSS_345 T6
AL17 VSS_076 VSS_166 AT4 F35 VSS_256 VSS_346 U8
AL19 VSS_077 VSS_167 AT40 F37 VSS_257 VSS_347 V1
AL24 VSS_078 VSS_168 AT5 F39 VSS_258 VSS_348 V2
AL27 VSS_079 VSS_169 AT6 F5 VSS_259 VSS_349 V33
AL30 VSS_080 VSS_170 AT7 F6 VSS_260 VSS_350 V34
AL36 VSS_081 VSS_171 AT8 F9 VSS_261 VSS_351 V35
AL5 VSS_082 VSS_172 AT9 G11 VSS_262 VSS_352 V36
AM1 VSS_083 VSS_173 AU1 G12 VSS_263 VSS_353 V37
AM11 VSS_084 VSS_174 AU15 G17 VSS_264 VSS_354 V38
AM14 VSS_085 VSS_175 AU26 G20 VSS_265 VSS_355 V39
AM17 VSS_086 VSS_176 AU34 G23 VSS_266 VSS_356 V40
AM2 VSS_087 VSS_177 AU4 G26 VSS_267 VSS_357 V5
AM21 VSS_088 VSS_178 AU6 G29 VSS_268 VSS_358 W6
AM23 VSS_089 VSS_179 AU8 G34 VSS_269 VSS_359 Y5
AM25 VSS_090 VSS_180 AV10 G7 VSS_270 VSS_360 Y8
A AY37 VSS_NCTF_03 A
A4 VSS_NCTF_01 B3 VSS_NCTF_04
AV39 VSS_NCTF_02
+3P3V_AMP
D I D
1
HC9
0.1UF/16V
+3P3V_AMP X7R 10%
2
mx_c0402_small 178 ohm in CRB and PDG
1
NI I I
HR51 HR44 Critical GND HR46
10K 1K SU2C 162 Ohm
14
mx_r0402_small mx_r0402_small 74LVC14AD 1%
1 2 VCC
{36,37,75} PCIE_PLT_RST#
2
I PLTRST 5 6 PLTRST_CPU#_SHT 1 2 PLTRST_CPU# {13}
HR47
10K 3 GND
mx_r0402_small C I PROTO
7
1 2 HQ1_B 1 B HQ1 HR48
{24,46,71,72,73,74} PLTRST#
1
PMBS3904 I 1K
E HR49 mx_r0402_small
TBD
1
2 75 1 2
NI 1%
CPURST_XDP# {72,73}
HR50 mx_r0402_small
GND
2
5.1K
mx_r0402_small
2
GND
GND GND
C C
PLTRST_CPU#
+3P3V_AMP +3P3V_AMP
+3P3V_AMP
14
14
74LVC14AD 74LVC14AD 74LVC14AD
VCC VCC VCC
9 8 11 10 13 12
GND GND GND
7
7
GND GND
GND
B B
A A
M_CHA_MAA[0..15] {10}
M_CHA_DQ[0..63] {10}
12X2S1204B01(5.2H)
BLCAK
XMM1A +1P5V_DUAL XMM1B +1P5V_DUAL
M_CHA_MAA0 98 5 M_CHA_DQ0 75 76
M_CHA_MAA1 97 A0 DQ0 M_CHA_DQ4 VDD1 VDD2
A1 DQ1 7 81 VDD3 VDD4 82
M_CHA_MAA2 96 15 M_CHA_DQ2 87 88
M_CHA_MAA3 95 A2 DQ2 M_CHA_DQ3 VDD5 VDD6
D
A3 DQ3 17 93 VDD7 VDD8 94 D
M_CHA_MAA4 92 4 M_CHA_DQ5 99 100
M_CHA_MAA5 91 A4 DQ4 M_CHA_DQ1 VDD9 VDD10
A5 DQ5 6 105 VDD11 VDD12 106
M_CHA_MAA6 90 16 M_CHA_DQ6 111 112
M_CHA_MAA7 86 A6 DQ6 M_CHA_DQ7 VDD13 VDD14
A7 DQ7 18 117 VDD15 VDD16 118
M_CHA_MAA8 89 21 M_CHA_DQ9 123 124
M_CHA_MAA9 85 A8 DQ8 M_CHA_DQ8 VDD17 VDD18
A9 DQ9 23
modify:0811 M_CHA_MAA10 107 33 M_CHA_DQ15
A10/AP DQ10
NOTE: M_CHA_MAA11 84
M_CHA_MAA12 83 A11 DQ11 35
22
M_CHA_DQ14
M_CHA_DQ12
2
8
VSS1 VSS2 3
9
M_CHA_MAA13 119 A12/BC# DQ12 M_CHA_DQ13 VSS3 VSS4
Check clock source if Eaglelake M_CHA_MAA14 80 A13 DQ13 24
M_CHA_DQ11
13 VSS5 VSS6 14
34 19 20
implemented M_CHA_MAA15 78 A14 DQ14
36 M_CHA_DQ10 25
VSS7 VSS8
26
A15 DQ15 M_CHA_DQ16 VSS9 VSS10
DQ16 39 31 VSS11 VSS12 32
41 M_CHA_DQ21 37 38
DQ17 M_CHA_DQ19 VSS13 VSS14
{10} M_CHA_CLK1 102 CK1 DQ18 51 43 VSS15 VSS16 44
104 53 M_CHA_DQ22 48 49
{10} M_CHA_CLK1# CK1# DQ19 VSS17 VSS18
101 40 M_CHA_DQ20 54 55
{10} M_CHA_CLK0 CK0 DQ20 VSS19 VSS20
103 42 M_CHA_DQ17 60 61
{10} M_CHA_CLK0# CK0# DQ21 VSS21 VSS22
50 M_CHA_DQ18 65 66
DQ22 M_CHA_DQ23 VSS23 VSS24
{10} M_CHA_CS#1 121 S1# DQ23 52 71 VSS25 VSS26 72
114 57 M_CHA_DQ24 127 128
{10} M_CHA_CS#0 S0# DQ24 VSS27 VSS28
59 M_CHA_DQ25 133 134
DQ25 M_CHA_DQ26 VSS29 VSS30
{10} M_CHA_ODT1 120 ODT1 DQ26 67 GND 138 VSS31 VSS32 139
116 69 M_CHA_DQ27 144 145
{10} M_CHA_ODT0 ODT0 DQ27 VSS33 VSS34
56 M_CHA_DQ28 150 151
DQ28 M_CHA_DQ29 VSS35 VSS36
{10} M_CHA_WE# 113 WE# DQ29 58 155 VSS37 VSS38 156
110 68 M_CHA_DQ31 161 162
{10} M_CHA_RAS# RAS# DQ30 VSS39 VSS40
115 70 M_CHA_DQ30 167 168
{10} M_CHA_CAS# CAS# DQ31 VSS41 VSS42
C 129 M_CHA_DQ32 172 173 C
DQ32 M_CHA_DQ37 VSS43 VSS44
{10} M_CHA_BA2 79 BA2 DQ33 131 178 VSS45 VSS46 179
108 141 M_CHA_DQ34 184 185
{10} M_CHA_BA1 BA1 DQ34 M_CHA_DQ35 VSS47 VSS48
{10} M_CHA_BA0 109 BA0 DQ35 143 189 VSS49 VSS50 190
130 M_CHA_DQ36 195 196
DQ36 M_CHA_DQ33 VSS51 VSS52
{10} M_CHA_CKE1 74 CKE1 DQ37 132
73 140 M_CHA_DQ38 +1P5V_DUAL +1P5V_DUAL 207
{10} M_CHA_CKE0 CKE0 DQ38 M_CHA_DQ39 GND1
DQ39 142 198 EVENT# GND2 208
201 147 M_CHA_DQ40 125
SA1 DQ40 M_CHA_DQ41 TEST +VTT_DDR
197 SA0 DQ41 149 NP_NC1 205
1
DQ42 157 M_CHA_DQ42 I I 77 NC1 NP_NC2 206
159 M_CHA_DQ43 D3R1 D3R2 122 GND
DQ43 M_CHA_DQ44 1K 1K NC2
{10} M_CHA_DQS7 GND 188 DQS7 DQ44 146 VTT1 203
186 148 M_CHA_DQ45 1% 1% 204
{10} M_CHA_DQS7# DQS#7 DQ45 VTT2
171 158 M_CHA_DQ46 mx_r0402_small mx_r0402_small +3P3V
{10} M_CHA_DQS6
2
DQS6 DQ46
1
{10} M_CHA_DQS6# 169 DQS#6 DQ47 160 M_CHA_DQ47 DIMM_CA_VREF_A 126 VREFCA I I
154 163 M_CHA_DQ49 DIMM_DQ_VREF_A 1 199 D3CB52 D3CB51
{10} M_CHA_DQS5 DQS5 DQ48 {15} DIMM_DQ_VREF_A VREFDQ VDDSPD
152 165 M_CHA_DQ48 0.1UF/16V 4.7UF/6.3V
{10} M_CHA_DQS5#
2
DQS#5 DQ49 M_CHA_DQ50 DDR3_DIMM_204P X7R 10% X5R 10%
{10} M_CHA_DQS4 137 DQS4 DQ50 175
1
{10} M_CHA_DQS4# 135 DQS#4 DQ51 177 M_CHA_DQ51 I mx_c0805_small
1
64 164 M_CHA_DQ53 D3CB48
{10} M_CHA_DQS3 DQS3 DQ52
1
{10} M_CHA_DQS3# 62 166 M_CHA_DQ52 I I I I 0.1UF/16V
2
DQS#3 DQ53 M_CHA_DQ54 D3R3 D3CB8 D3R4 D3CB7 X7R 10%
{10} M_CHA_DQS2 47 DQS2 DQ54 174 Critical GND GND
45 176 M_CHA_DQ55 1K 0.1UF/16V 1K 0.1UF/16V mx_c0402_small
{10} M_CHA_DQS2#
2
DQS#2 DQ55 M_CHA_DQ56 1% X7R 10% 1% X7R 10%
{10} M_CHA_DQS1 29 181
2
DQS1 DQ56 M_CHA_DQ57 mx_r0402_small
mx_c0402_small
mx_r0402_small
mx_c0402_small
{10} M_CHA_DQS1# 27 DQS#1 DQ57 183
12 191 M_CHA_DQ59 GND
{10} M_CHA_DQS0 DQS0 DQ58
10 193 M_CHA_DQ58
{10} M_CHA_DQS0# DQS#0 DQ59
180 M_CHA_DQ61 GND GND GND GND
B DQ60 M_CHA_DQ60 B
187 DM7 DQ61 182
170 192 M_CHA_DQ62
DM6 DQ62 M_CHA_DQ63
153 DM5 DQ63 194
136 DM4
63 DM3
46 DM2
28 DM1
11 DM0
NI
HC1
GND Critical 150PF/50V
2
NPO 5%
1
NI NI mx_c0402_small
SC7 SC48
150PF/50V 150PF/50V
2
GND GND
A A
M_CHB_MAA[0..15] {11}
M_CHB_DQ[0..63] {11}
M_CHB_MAA0 98 5 M_CHB_DQ1 75 76
M_CHB_MAA1 97 A0 DQ0 M_CHB_DQ5 VDD1 VDD2
A1 DQ1 7 81 VDD3 VDD4 82
M_CHB_MAA2 96 15 M_CHB_DQ7 87 88
M_CHB_MAA3 95 A2 DQ2 M_CHB_DQ6 VDD5 VDD6
D
A3 DQ3 17 93 VDD7 VDD8 94 D
M_CHB_MAA4 92 4 M_CHB_DQ4 99 100
M_CHB_MAA5 91 A4 DQ4 M_CHB_DQ0 VDD9 VDD10
A5 DQ5 6 105 VDD11 VDD12 106
M_CHB_MAA6 90 16 M_CHB_DQ2 111 112
M_CHB_MAA7 86 A6 DQ6 M_CHB_DQ3 VDD13 VDD14
A7 DQ7 18 117 VDD15 VDD16 118
M_CHB_MAA8 89 21 M_CHB_DQ12 123 124
M_CHB_MAA9 85 A8 DQ8 M_CHB_DQ8 VDD17 VDD18
A9 DQ9 23
modify:0811 M_CHB_MAA10 107 33 M_CHB_DQ14
A10/AP DQ10
NOTE: M_CHB_MAA11 84
M_CHB_MAA12 83 A11 DQ11 35
22
M_CHB_DQ11
M_CHB_DQ13
2
8
VSS1 VSS2 3
9
M_CHB_MAA13 119 A12/BC# DQ12 M_CHB_DQ9 VSS3 VSS4
Check clock source if Eaglelake M_CHB_MAA14 80 A13 DQ13 24
M_CHB_DQ15
13 VSS5 VSS6 14
34 19 20
implemented M_CHB_MAA15 78 A14 DQ14
36 M_CHB_DQ10 25
VSS7 VSS8
26
A15 DQ15 M_CHB_DQ20 VSS9 VSS10
DQ16 39 31 VSS11 VSS12 32
41 M_CHB_DQ21 37 38
DQ17 M_CHB_DQ23 VSS13 VSS14
{11} M_CHB_CLK1 102 CK1 DQ18 51 43 VSS15 VSS16 44
104 53 M_CHB_DQ22 48 49
{11} M_CHB_CLK1# CK1# DQ19 VSS17 VSS18
101 40 M_CHB_DQ16 54 55
{11} M_CHB_CLK0 CK0 DQ20 VSS19 VSS20
103 42 M_CHB_DQ17 60 61
{11} M_CHB_CLK0# CK0# DQ21 VSS21 VSS22
50 M_CHB_DQ18 65 66
DQ22 M_CHB_DQ19 VSS23 VSS24
{11} M_CHB_CS#1 121 S1# DQ23 52 71 VSS25 VSS26 72
114 57 M_CHB_DQ24 127 128
{11} M_CHB_CS#0 S0# DQ24 VSS27 VSS28
59 M_CHB_DQ25 133 134
DQ25 M_CHB_DQ27 VSS29 VSS30
{11} M_CHB_ODT1 120 ODT1 DQ26 67 GND 138 VSS31 VSS32 139
116 69 M_CHB_DQ26 144 145
{11} M_CHB_ODT0 ODT0 DQ27 VSS33 VSS34
56 M_CHB_DQ28 150 151
DQ28 M_CHB_DQ29 VSS35 VSS36
{11} M_CHB_WE# 113 WE# DQ29 58 155 VSS37 VSS38 156
110 68 M_CHB_DQ30 161 162
{11} M_CHB_RAS# RAS# DQ30 VSS39 VSS40
115 70 M_CHB_DQ31 167 168
{11} M_CHB_CAS# CAS# DQ31 VSS41 VSS42
C +3P3V 129 M_CHB_DQ33 172 173 C
DQ32 M_CHB_DQ32 VSS43 VSS44
{11} M_CHB_BA2 79 BA2 DQ33 131 178 VSS45 VSS46 179
108 141 M_CHB_DQ38 184 185
{11} M_CHB_BA1 BA1 DQ34 M_CHB_DQ39 VSS47 VSS48
{11} M_CHB_BA0 109 BA0 DQ35 143 189 VSS49 VSS50 190
130 M_CHB_DQ36 195 196
DQ36 M_CHB_DQ37 VSS51 VSS52
{11} M_CHB_CKE1 74 CKE1 DQ37 132
73 140 M_CHB_DQ35 +1P5V_DUAL +1P5V_DUAL 207
{11} M_CHB_CKE0 CKE0 DQ38 M_CHB_DQ34 GND1
DQ39 142 198 EVENT# GND2 208
201 147 M_CHB_DQ45 125
SA1 DQ40 M_CHB_DQ44 TEST +VTT_DDR
197 SA0 DQ41 149 NP_NC1 205
1
DQ42 157 M_CHB_DQ47 I I 77 NC1 NP_NC2 206
159 M_CHB_DQ46 D3R13 D3R12 122 GND
DQ43 M_CHB_DQ40 1K 1K NC2
{11} M_CHB_DQS7 GND 188 DQS7 DQ44 146 VTT1 203
186 148 M_CHB_DQ41 1% 1% 204
{11} M_CHB_DQS7# DQS#7 DQ45 VTT2
171 158 M_CHB_DQ42 mx_r0402_small mx_r0402_small +3P3V
{11} M_CHB_DQS6
2
DQS6 DQ46
1
{11} M_CHB_DQS6# 169 DQS#6 DQ47 160 M_CHB_DQ43 DIMM_CA_VREF_B
126 VREFCA I I
154 163 M_CHB_DQ54 DIMM_DQ_VREF_B 1 VREFDQ 199 D3CB58 D3CB55
{11} M_CHB_DQS5 DQS5 DQ48 {15} DIMM_DQ_VREF_B VDDSPD
152 165 M_CHB_DQ49 0.1UF/16V 4.7UF/6.3V
{11} M_CHB_DQS5#
2
DQS#5 DQ49 M_CHB_DQ50 DDR3_DIMM_204P X7R 10% X5R 10%
{11} M_CHB_DQS4 137 DQS4 DQ50 175
1
{11} M_CHB_DQS4# 135 DQS#4 DQ51 177 M_CHB_DQ52 I mx_c0805_small
1
64 164 M_CHB_DQ48 D3CB59
{11} M_CHB_DQS3 DQS3 DQ52
1
{11} M_CHB_DQS3# 62 166 M_CHB_DQ53 I I I I 0.1UF/16V
2
DQS#3 DQ53 M_CHB_DQ55 D3R11 D3CB56 D3R14 C941012 D3CB57 X7R 10%
{11} M_CHB_DQS2 47 DQS2 DQ54 174 Critical GND GND
45 176 M_CHB_DQ51 1K 0.1UF/16V 1K 2.2UF/10V 0.1UF/16V mx_c0402_small
{11} M_CHB_DQS2#
2
DQS#2 DQ55 M_CHB_DQ61 1% X7R 10% 1% X7R 10%
{11} M_CHB_DQS1 29 181 X5R 10%
2
DQS1 DQ56 M_CHB_DQ60 mx_r0402_small
mx_c0402_small
mx_r0402_small mx_c0402_small
{11} M_CHB_DQS1# 27 DQS#1 DQ57 183 NI
12 191 M_CHB_DQ63 GND
{11} M_CHB_DQS0 DQS0 DQ58
10 193 M_CHB_DQ62
{11} M_CHB_DQS0# DQS#0 DQ59
180 M_CHB_DQ56 GND GND GND GND GND
B DQ60 M_CHB_DQ57 B
187 DM7 DQ61 182
170 192 M_CHB_DQ59
+3P3V +3P3V DM6 DQ62 M_CHB_DQ58
153 DM5 DQ63 194
136 DM4
1
I 63 DM3
1
SR14 I 46 DM2
2.7K SR13 28
2.7K
mx_r0402_small DM1
11 DM0
mx_r0402_small
2
NI
HC11
GND Critical 150PF/50V
2
NPO 5%
1
NI NI mx_c0402_small
SC10 SC49
150PF/50V 150PF/50V
2
GND GND
A A
+1P5V_DUAL
1
D
I
D3CB18
I
D3CB19
I
D3CB20
I
D3CB21
I
D3CB22 NOTE: D
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V Place those cap close to CH A DIMM0
2
X7R 10% X7R 10% X7R 10% X7R 10% X7R 10%
mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small
NOTE:
1
NI NI NI I I I I I I I I I I
D3CB23 D3CB24 D3CB25 D3CB26 D3CB27 D3CB28 D3CB29 D3CB30 D3CB31 D3CB32 D3CB33 D3CB34 D3CB35 Place those cap between CH B DIMM 0 to DIMM1
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/16V 1UF/16V 1UF/16V 1UF/16V
2
X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% mx_c0603 mx_c0603 mx_c0603 mx_c0603
mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small X7R 10% X7R 10% X7R 10% X7R 10%
GND GND GND GND GND GND GND GND GND GND GND GND GND
1
1
C NI NI NI NI NI NI NI NI NI NI NI NI C
D3CB36 D3CB37 D3CB38 D3CB39 D3CB40 D3CB41 D3CB42 D3CB43 D3CB44 D3CB45 D3CB46 D3CB47 Place those cap near CH B DIMM1
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
2
2
X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10%
mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small
GND GND GND GND GND GND GND GND GND GND GND GND
1
1
I
D3CB66
I
D3CB67
I
D3CB68
I
D3CB69
I
D3CB70
I
D3CB71 NOTE:
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/16V Place those cap between CH A DIMM1 to CH B DIMM0
2
2
X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% mx_c0603
mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small X7R 10%
B B
1
+
1
2
10UF/16V 10UF/16V 10UF/16V 10UF/16V 10UF/16V 10UF/16V TAN/Lf_T=2000hrs_105C/+/-20% X5R 10% X5R 10% X5R 10% X5R 10% X5R 10% X5R 10%
2
2
X5R 10% X5R 10% X5R 10% X5R 10% X5R 10% X5R 10% GND GND GND GND GND GND
I I I I I I
DIMM
0 1 0 1
A LGA1155 A
SNB
PEGATRON DT-MB RESTRICTED SECRET
Title : DDR3 TERMINATION A&B
CH A CH B Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 19 of 73
5 4 3 2 1
5 4 3 2 1
NI NI NI
SR287 SR285 SR284
1 2 DDR3_REST_A&B 1 2 DDR3_DRAMRST_B# 1 2
{10} DDR3_DRAMRST#
0 0 0
D D
+1P5V_DUAL
+3P3VSB
1
R37568
100 Ohm
1%
2
R37565 I
1KOhm
5% DDR3_DRAMRST_A# {17}
3
1
I C
1 B
I
3 SQ10 E
R37564 C PMBS3904 2
1 2 1 B
I
4.7KOHM SQ9 E
5% PMBS3904 2 GND
I
+1P5V_DUAL
C GND C
1
R37569
100 Ohm
1%
2
I
3 DDR3_DRAMRST_B# {18}
C
1 B
I
SQ11 E
PMBS3904 2
GND
B B
A A
Title : RSMRST#
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 20 of 73
5 4 3 2 1
5 4 3 2 1
+3P3VSB
Critical
2
NI
SR11 U4A
4.7K
NOBOM ST30 1 TP_SU1_AV14 AV14 PCIRST# C/BE0# BN4
+3P3V
{75} PME_IN# TPC26b IPU 20K AV15 BP7
1
PME# C/BE1#
NOBOM ST31 1 TP_SU1_BH8 BH8 PAR C/BE2# BG2
I SRN6C 5 8.2K 6 TPC26b SU1_DEVSEL# BH9 DEVSEL# C/BE3# BP13
{26} CK_33M_PCIFB BD15 CLKIN_PCILOOPBACK
CK_33M_PCIFB I SRN6D 7 8.2K 8 BF11 IRDY#
I SRN5D 7 8.2K 8 BR6 SERR#
I SRN7A 1 8.2K 2 BC12 STOP#
D I SRN8D 7 8.2K 8 BA17 PLOCK# D
1 NI I SRN4A 1 8.2K 2 BC8 TRDY#
SC24 I SRN4D 7 8.2K 8 BM3 PERR#
0.1UF/16V I SRN7B 3 8.2K 4 BC11 FRAME#
X7R 10%
2
mx_c0402_small
AD0 BF15
NOBOM ST26 1 PCH_GNT3 IPU 20K Native Core BE2 GNT3#/GPIO55 AD1 BF17
NOBOM ST27
TPC26b 1 PCH_GNT2 IPU 20K Native Core BU12 GNT2#/GPIO53 AD2 BT7
GND NOBOM ST28
TPC26b 1 PCH_GNT1 IPU 20K Native Core AV8 GNT1#/GPIO51 AD3 BT13
NOBOM ST29
TPC26b 1 PCH_GNT0 IPU BA15 GNT0# AD4 BG12
TPC26b AD5 BN11
NOTE: Strapping Options Flash AD6 BJ12
BU9
AD7
AD8 BR12
SATA1GP PCI AD9 BJ3
GNT1# /GPIO19 Boot Device AD10 BR9
AD11 BJ10
AD12 BM8
AD13 BF3
0 0 LPC +3P3V BN2
E14 AD14
AD15 BE4
1 SR21 8.2KOHM 5% I BE6
BOOT_BLK_EN#Native Core AV11 AD16
1 0 PCI 2 1 2 REQ3#/GPIO54 AD17 BG15
I SRN6B 3 8.2K 4 Native Core BK8 REQ2#/GPIO52 AD18 BC6
HEADER_1X2P I SRN5C 5 8.2K 6 Native Core BT5 REQ1#/GPIO50 AD19 BT11
1 1 SPI Critical I SRN4B 3 8.2K 4 BG5 REQ0# AD20 BA14
1
I AD21 BL2
SR20 +3P3V BC4
C 1K AD22 C
AD23 BL4
E14:12 mx_r0402_small I
I
SRN6A
SRN4C
1
5
8.2K 2
6
BK10
BJ5
PIRQA# AD24 BC2
BM13
8.2K
2
PIRQB# AD25
MINI_JUMPER_BLUE I SRN8B 3 8.2K 4 BM15 PIRQC# AD26 BA9
I SRN5B 3 8.2K 4 BP5 PIRQD# AD27 BF9
I SRN8C 5 8.2K 6 GPI Core BN9 PIRQE#/GPIO2 AD28 BA8
I SRN7D 7 8.2K 8 GPI Core AV9 PIRQF#/GPIO3 AD29 BF8
GND I SRN8A 1 8.2K 2 GPI Core BT15 PIRQG#/GPIO4 AD30 AV17
I SRN5A 1 8.2K 2 GPI Core BR4 PIRQH#/GPIO5 AD31 BK12
PROTO
1
I I I I I I I I I
SR5 SR6 SR7 SR8 SR9 SR10 SR16 SR17 SR18
2.7K 2.7K 2.7K 2.7K 2.7K 2.7K 10K 10K 10K
mx_r0402_small mx_r0402_small mx_r0402_small mx_r0402_small mx_r0402_small mx_r0402_small
SMBUS mx_r0402_small mx_r0402_small mx_r0402_small
2
2
{36,75} SMB_CLK_RESUME BT47 SMBCLK SMBALERT#/GPIO11 BN49 Native Sus SMBALERT#_GPIO11
{36,75} SMB_DATA_RESUME BR49 SMBDATA
NI NI NI NI NI NI +3P3V_ME
SC1 SC2 SC3 SC44 SC5 SC6
150PF/50V 150PF/50V 150PF/50V 150PF/50V 150PF/50V 150PF/50V
2
1
mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small mx_c0402_small NI
SR19
1K
GND GND GND GND GND GND mx_r0402_small
RTC SPI
2
{70} RTCRST# BT41 RTCRST# SPI_CS1# AR56 TP_SPI_CS1 1 ST24 NOBOM
SPI_CS0# AT57 TPC26b SPI_CS# {51}
{70} SRTCRST# BN37 SRTCRST# SPI_MOSI AU53 IPD 20K SPI_MOSI {51}
SPI_MISO AT55 IPU 20K SPI_MISO {51}
PCH_RTCX1 BR39 AR54 SPI_CLK {51}
RTCX1 SPI_CLK
I
I SR15 PCH_RTCX2 BN39 RTCX2
XY5 10M
1
mx_r0603_small NI
Crystal Holder 1 2 SC46
150PF/50V
2
NPO 5%
A Critical Rev=1.0 mx_c0402_small A
Y5
32.768Khz R37410 COUGARPOINT GND
11 22PCH_RTCX2_R
1 2
GND
3
GND
4 0 Ohm PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
3
4
1
I 5% I
SC8
12PF/50V
I SC9
12PF/50V
Title : PCI/SM/SPI/RTC 1-9
2
Critical
U4B
{12} DMI_TXN0 D33 DMI0RXN USBP0N BF36 IPD 20K USBN0 {47}
{12} DMI_TXP0 B33
J36
DMI0RXP USBP0P BD36IPD 20K USBP0 {47} SIDE USB
{12} DMI_RXN0 DMI0TXN
{12} DMI_RXP0 H36 DMI0TXP USBP1N BC33IPD 20K USBN1 {47}
D A36
USBP1P BA33 IPD 20K USBP1 {47} SIDE USB D
{12} DMI_TXN1 DMI1RXN
{12} DMI_TXP1 B35 DMI1RXP USBP2N BM33IPD 20K
{12} DMI_RXN1 P38 DMI1TXN USBP2P BM35IPD 20K
{12} DMI_RXP1 R38 DMI1TXP
USBP3N BT33 IPD 20K
{12} DMI_TXN2 B37 DMI2RXN USBP3P BU32IPD 20K
{12} DMI_TXP2 C36 DMI2RXP
{12} DMI_RXN2 H38 DMI2TXN USBP4N BR32IPD 20K
{12} DMI_RXP2 J38 DMI2TXP USBP4P BT31 IPD 20K
1
I I USBP9N BR26IPD 20K USBN9 {36}
SR36 SR37
USBP9P BT27 IPD 20K USBP9 {36}
1
10K 10K I DMI
mx_r0402_small
mx_r0402_small SR30
USBP10N BK25 IPD 20K USBN10 {48}
2
49.9 BJ25 IPD 20K USBP10 {48} REAR USB
2
1% USBP10P
mx_r0402_small BJ31 IPD 20K USBN11 {48}
2
USBP11N
BK31 IPD 20K REAR USB
C C
USBP11P USBP11 {48}
GND GND DMICOMP B31 DMI_IRCOMP
E31 DMI_ZCOMP USBP12N BF27 IPD 20K USBN12 {48}
USBP12P BD27IPD 20K +3P3VSB
USBP12 {48} REAR USB Power On Password Enable
DMI2RBIAS A32 DMI2RBIAS USBP13N BJ27 IPD 20K USBN13 {48}
NOTE: BK27 IPD 20K REAR USB
I RN4393A 5%
I RN4393B 5%
I RN4393C 5%
I RN4393D 5%
USBP13P USBP13 {48}
1 10KOhm 2
3 10KOhm 4
5 10KOhm 6
7 10KOhm 8
1
trace length < 450 mils I
SR31 +3P3VSB
750
1%
mx_r0402_small
USB
2
SR41
BM43Native Sus
GPIO42
OC0#/GPIO59 OC01# {47,73} 300 OHM
GND OC1#/GPIO40 BD41Native Sus OC23# {73} 5% E49
PCIE BG41Native Sus OC45# {73}
1
OC2#/GPIO41 I
OC3#/GPIO42 BK43 Native Sus OC67# {73}
PASSWORD_EN
2
OC4#/GPIO43 BP43 Native Sus 1
{36} WLAN_PE1_RXN1 J20 PERn1 OC5#/GPIO9 BJ41 Native Sus OC1011# {48,73}
{36} WLAN_PE1_RXP1 L20 PERp1 OC6#/GPIO10 BT45 Native Sus OC1213# {48,73} HEADER_1X2P
WLAN {36} WLAN_PE1_TXN1 F25 PETn1 OC7#/GPIO14 BM45Native Sus OC7#/GPIO14
OCDEBUG# {73} Critical
{36} WLAN_PE1_TXP1 F23 PETp1
1
NI NI NI OC89# {73}
1
P20 PERn2 I UC15 UC16 UC17
R20 SR40 0.1UF/16V 0.1UF/16V 0.1UF/16V
E49:12
2
PERp2 10K
C22 PETn2
A22 mx_r0402_small MINI_JUMPER_BLUE
B PETp2 B
NOTE: GND GND
2
H17 GND
PERn3
J17 PERp3 Used for integrated graphics, generate USB backbone,
E21 PETn3 GND
B21 PETp3 CLKIN_DOT_96N
24MHz HDA bit, and 48MHz clock.
CLKIN_DOT_96N BD38
P17 BF38 CLKIN_DOT_96P
PERn4 CLKIN_DOT_96P
M17 PERp4
F18 PETn4
1
E17 PETp4 I I
SR34 SR33 MP(I)
N15 10K 10K
PERn5 mx_r0402_small mx_r0402_small
M15 PERp5
B17
2
PETn5
C16 PETp5
1
H12 PERp7 I
F15 SR35 trace length < 200 mils
PETn7 22.6
F13 PETp7 1%
H10 mx_r0402_small
2
PERn8
J10 PERp8
A B13 PETn8 A
D13 PETp8
GND
Critical
U4C
1
SC30 AL56
100PF/50V SATA2TXN
SATA2TXP AL53
NPO 5%
2
mx_c0402_small AN46
SATA3RXN
FAN SATA3RXP AN44
AN56
GND SATA3TXN
SATA3TXP AM55
1
I I I I I
I I I
SATA5TXN AV50
1
NI I NI
SR50 SR49 SR52 SR47 SR72 SR71 SR58 SR51 AV49
10K 10K 10K 10K 10K 10K 10K 10K SATA5TXP SR60 SR45 SR48
mx_r0402_small
mx_r0402_small
mx_r0402_small
mx_r0402_small mx_r0402_small
mx_r0402_small mx_r0402_small
mx_r0402_small 10K 10K 10K
mx_r0402_small
mx_r0402_small
mx_r0402_small
2
2
GPI Core IPU 20K BT17 EDS 1.0 SATA2GP/SATA3GP should not
2
{35} SEL_2 TACH0/GPIO17
C GPI Core IPU 20K BR19 C
TACH1/GPIO1 be pulled high when strap is sampled.
GPI Core IPU 20K BA22 TACH2/GPIO6
{57,74} LPC_SMI# GPI Core IPU 20K BR16 BC54 GPI Core BRD_ID2
TACH3/GPIO7 SATA0GP/GPIO21
GPI Core IPU 20K GPI Core IPU 20K
I
BU16 AY52 SATA1GP_GPIO19 SR61 2 1 10K mx_r0402_small
{35} SEL_0 TACH4/GPIO68 SATA1GP/GPIO19
GPI Core IPU 20K BM18 TACH5/GPIO69 SATA2GP/GPIO36 BB55 GPI Core IPD 20K SATA2GP_GPIO36 I SR62 2 1 10K mx_r0402_small
Native Core IPU 20K BN17 TACH6/GPIO70 SATA3GP/GPIO37 BG53 GPI Core IPD 20K SATA3GP_GPIO37 I SR63 2 1 10K mx_r0402_small
{57} Boot_BLK_rec# Native Core IPU 20K BP15 AU56 GPI Core GPIO16
TACH7/GPIO71 SATA4GP/GPIO16
SATA5GP/GPIO49 BA56 GPI Core BRD_ID0
1
I
1
+1P05V_PCH +1P05V_PCH GND I SR96
1
NI SR89 10K
+3P3V +3P3V +3P3V SC31
NOTE: 10K mx_r0402_small
1
220PF/50V +3P3V I I NOTE: mx_r0402_small
2
2
X7R 10% trace length SR66 SR67
2
1
2
mx_r0402_small
mx_r0402_small
mx_r0402_small SR83 AJ55 GND
10K SATAICOMPI SATAICOMP
AJ53
2
SATA3COMPI SATA3COMP
SATA3RCOMPO AE52
NI
1
1
SR56 I I I
10K SR85 SR68 SR70
mx_r0402_small
10K 10K CLKIN_SATA_N AF55 750
mx_r0402_small
mx_r0402_small CLKIN_SATA_P CLKIN_SATA_N 1% +3P3V
AG56
2
CLKIN_SATA_P mx_r0402_small
2
2
+3P3V
1
+1P05V_CPUIO +3P3V
1
GND I I I
1
GND GND SR38 SR39 GND SR84
1
10K 10K I 10K I
mx_r0402_small
mx_r0402_small HR19 mx_r0402_small SR79 I
2
340 OHM 10K SR73
2
mx_r0402_small 10K
HOST
2
NOTE: mx_r0402_small
2
GND GND BB57
A20GATE A20GATE {74}
SEL_0 SEL_1 SEL_2 INIT3_3V# BN56 IPU 20K INIT3_3V#
RCIN# BG56 RST_KB# {74}
SERIRQ AV52 I/OD SERIRQ {46,57,74}
SAMSUNG 1 0 1 AY20 NC_1 THRMTRIP# E56 PCH_THMTRIP# {74}
PECI H48 IPD 0.35K PECI_PCH R7148 1 2 43 PECI_SIO {13,74}
PMSYNCH F55 PM_SYNC {13}
LG 1 1 0 NI
1
A I A
1
NI HC8 NI
SR74 680PF/50V O2C23
1K X7R 10% 0.1UF/16V
2
mx_r0402_small mx_c0402_small
PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
2
COUGARPOINT
1
NI
U4D I I I
SR116 SR100 SR115 SR105
I
R37444
I
SR103
I I NOTE:
SR109 SR110
+3P3V SR80 10K 10K 10K 10K 1KOhm 10K 10K 10K
External PU resistor required
+3P3V 10K mx_r0402_small
mx_r0402_small
mx_r0402_small
mx_r0402_small mx_r0402_small mx_r0402_small
mx_r0402_small
mx_r0402_small
LPC 5%
if used for CLKREQ# functionality.
2
I
1 2 LDRQ1#_GPIO23 IPU 20K Native Core BA20 LDRQ1#/GPIO23
1
BMBUSY#/GPIO0 AW55 GPI Core BMBUSY- {73}
D NI CLKRUN#/GPIO32 BC56 GPO Core D
SR81
HDA_DOCK_EN#/GPIO33 BC25 GPO Core
10K
{46,57,71,74} LAD0 IPU 20K BK15 FWH0/LAD0 STP_PCI#/GPIO34 BL56 GPI Core STP_PCI#_GPIO34
mx_r0402_small
{46,57,71,74} LAD1 IPU 20K BJ17 BJ57 GPO Core BRD_REV0
2
FWH1/LAD1 GPIO35
{46,57,71,74} LAD2 IPU 20K BJ20 FWH2/LAD2 GPIO8 BP51 GPO Sus IPU 20K
{46,57,71,74} LAD3 IPU 20KBG20 FWH3/LAD3 LAN_PHY_PWR_CTRL/GPIO12 BK50 Native Sus LAN_DISABLE# {37}
HDA_DOCK_RST#/GPIO13 BA25 GPI Sus
{74} LDREQ# IPU 20K BK17 LDRQ0# GPIO15 BM55 GPO Sus IPD 20K TP_GPIO15
GPIO24/MEM_LED BP53 GPO Sus BRD_REV1
{46,57,71,74} LFRAME# BG17 FWH4/LFRAME# GPIO28 BJ55 GPO Sus IPU 20K
SLP_LAN#/GPIO29 BH49 GPI Sus SLP_LAN# {57,61}
GPIO27 BJ43 GPO DSW IPU 20K GPIO27
GPIO31 BG43 GPI DSW IPD TBD GPIO31
NOTE: HDA_SYNC
1
+3P3VSB NI +3P3V +3P3VSB
On-die PLL VR voltage selector. SR111
10K
AUDIO
1
Hi: supplied by 1.5V. mx_r0402_small I NI
SR91 SR86
2
1
Low: supplied by 1.8V. {43} AZ_SDATA_IN0 IPD 20K BD22 HDA_SDIN0 I 10K 10K
NOBOM ST36 1 TP_PCH_SDIN1 IPD 20K BF22 HDA_SDIN1
SR107 mx_r0402_small mx_r0402_small
NOBOM ST37 1 TP_PCH_SDIN2 IPD 20K BK22 10K
2
HDA_SDIN2
NOTE: HDA_SDO +3P3V
NOBOM ST32 1 TP_PCH_SDIN3 IPD 20K BJ22 HDA_SDIN3
mx_r0402_small GND BRD_REV0 BRD_REV1
1
Disable ME in Manufacturing Mode +3P3VSB NI I
PCIECLKRQ2#/GPIO20 AV43 Native Core LAN_CLK_REQ- {37}
SR87 SR82
--> connect to GND. NI 1 1K 2 SR177 mx_r0402_small
PCIECLKRQ5#/GPIO44 BL54 Native Sus IPU TBD PCIECLKRQ5#_GPIO44 NI SR141 1 2 1K mx_r0402_small 10K 10K
E1
PCIECLKRQ6#/GPIO45 AV44 Native Sus IPU 20K PCIECLKRQ6#_GPIO45 NI SR256 1 2 1K mx_r0402_small mx_r0402_small mx_r0402_small
C 1 BP55 Native Sus IPU 20K PCIECLKRQ7#_GPIO46 NI SR180 1 2 1K mx_r0402_small C
2
1K 2 BR8 I 1 PCIECLKRQ7#/GPIO46
2 GPIO57 BT53 GPI Sus
mx_r0402_small IPD 20K
HEADER_1X2P SR69 1 27 OHM 2 1%
HDA_SDO_R
I BT23 HDA_SDO TBD
{43} AZ_SDATA_OUT_1
Critical IPD 20K +3P3VSB +3P3VA +3P3VA GND GND
SR53 1 33 OHM 2 5% I HDA_SYNC_R BP23
{43} AZ_SYNC_1 HDA_SYNC GND REVISION ID
1
{43} AZ_BITCLK_1 I
mx_r0402_small
SR54 1 2 33 HDA_BITCLK_R BU22
HDA_BCLK I NI
SR124 SR159 NI ID1 ID0
{43} AZ_RST#_1 I
mx_r0402_small
SR59 1 2 33 HDA_AZRST#_RBC22
HDA_RST#
10K 10K O2R122
mx_r0402_small mx_r0402_small 4.7K EVT 0 0
2
1
1
I NI SC47 SC45
GPIO8 BTM FCIM Clock validation
2
NOTE: mx_r0402_small
I
NI
SR106
SR183
1K
10PF/50V
NPO 5%
10PF/50V
NPO 5%
2
For platform not supporting deep O2R120
4.7K
10K
mx_r0402_small
mx_r0402_small mx_c0402_small mx_c0402_small
GPIO15 Enable Disable TLS confidentiality
2
B sleep connect directly to RSMRST#. +3P3VSB B
2
1
before DPWROK is asserted to PCH. GND I GND
SR75 +3P3VA +BATT +3P3VSB +3P3V
{13,72} CPUPWRGD D53 PROCPWRGD 10K
SUSACK# and SUSWARN#
{13} DRAM_PWROK BG46 DRAMPWROK
BJ38 mx_r0402_small can be tied together if EC/SIO
{57,75} PWROK PWROK
1
{57,64,72} VRM_PWRGD BJ53 I I NI
2
SYS_PWROK
TBD: Both are 390Kohm in CRB 0.7 I SR76 SR77 SR78 does not want to involve in
1
NI NI I O2R125 1M 1K 1K
SR104 SC40 SR97 NI +3P3V +BATT +BATT 4.7K mx_r0402_small mx_r0402_small mx_r0402_small the handshake mechanism
1
2
mx_r0402_small
X7R 10% mx_r0402_small
100PF/50V for the Deep Sleep state entry and exit.
1
NPO 5% I BJ48 RI
LPC_PME# {74}
2
I I INTRUDER#
1
O2R135 I
4.7K DSWVRMEN BR42
DSWVRMEN SPKR BE56 IPD 20K SPKR {43}
SC13
PCH_INTVRMEN BN41 0.1UF/16V
2
2
INTVRMEN
{16,46,71,72,73,74} PLTRST# BK48 PLTRST# X7R 10%
{13,72,73} SYS_RESET_DBR# I SR99 1 2 0 mx_r0402_small BE52 SYS_RESET# PWRBTN# BT43 IPU 20K SB_PWRBTN# {74}
R37442 0 Ohm 5% I
1
I SR93 I
NI
SR172
SQ8
PMBS3904
E
2
1K GND
mx_r0402_small
GND
SR95
GND
100K GND
Title : AUDIO/LPC/MISC 4-9
10K GND mx_r0402_small Engineer: Scott Chen
Pegatron Corp.
2
mx_r0402_small
2
Critical
U4E
Y18 TP6
Y17 TP7 CRT_HSYNC AR4 VGA_HSYNC_3P3V PROTO
SR245 1 2 33 mx_r0402_small
VHSYNC {32}
AB18 TP8 CRT_VSYNC AR2 VGA_VSYNC_3P3V PROTO
SR246 1 2 33 mx_r0402_small
VVSYNC {32}
AB17 TP9
AN6 VGA_RED_S JP20 1 2 SHORT_PIN
CRT_RED VGA_RED {32}
NI
AN2 VGA_GREEN_S JP21 1 2 SHORT_PIN
CRT_GREEN VGA_GREEN {32}
D NI D
DDCA_CLK AW3 AM1 VGA_BLUE_S JP22 1 2 SHORT_PIN
{32} DDCA_CLK CRT_DDC_CLK CRT_BLUE VGA_BLUE {32}
{32} DDCA_DATA
DDCA_DATA AW1 CRT_DDC_DATA NI
1
PROTO PROTO PROTO
SR247 SR248 SR249
150 150 150
1% 1% 1%
mx_r0402_small mx_r0402_small mx_r0402_small
2
NOTE:
GND GND GND Place RGB resistors close to PCH within 250mils
AT3 DACREFSET
DAC_IREF
CRT_IRTN AM6
1
I Replace DACREFSET resistor
NOTE: SR131
1K
1%
close to PCH within 500mils
DDP[B..D]_HPD are 3.3V tolerant. mx_r0402_small
2
GND
GND
C NOBOM ST72 1 TP_PCH_DDPBAUXP R8 DDPB_AUXP DDPB_0P R14 C
NOBOM ST73 1 TP_PCH_DDPBAUXN R9 DDPB_AUXN DDPB_0N R12
DDPB_1P M11
AL15 SDVO_CTRLCLK DDPB_1N M12
AL17 SDVO_CTRLDATA DDPB_2P H8
DDPB_2N K8
DDPB_3P L5
T1 DDPB_HPD DDPB_3N M3
SDVO_STALLP W3 IPD 50
SDVO_STALLN U5 IPD 50
SDVO_TVCLKINP U8 IPD 50
SDVO_TVCLKINN U9 IPD 50
N2 DDPC_HPD DDPC_3N E2
R37436 R37437
2.2KOHM 2.2KOHM
5% 5%
1
I NI
R44
100K
1%
A A
1
GND COUGARPOINT
PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
Critical
U4F
+1P05V_PCH
1 I
SR136
90.9
CLOCK
1% R52
CLKOUT_ITPXDP_N CK_100M_CPUXDP# {72}
mx_r0402_small N52 CK_100M_CPUXDP {72}
2
CLKOUT_ITPXDP_P
CLKOUT_PCIE4N Y9
1
B B
I I I I CLKOUT_PCIE4P Y8
SR125 SR126 SR127 SR128
10K 10K 10K 10K AB9
mx_r0402_small
mx_r0402_small
mx_r0402_small
mx_r0402_small CLKOUT_PCIE3N
CLKOUT_PCIE3P AB8
2
1
I CLKOUT_PEG_A_N AG8 NI
SR157 XTAL_25M_PCH_IN AJ3 AG9 SC35
XTAL25_IN CLKOUT_PEG_A_P
10K I 150PF/50V
2
mx_r0402_small SR140 XTAL_25M_PCH_OUT AJ5 AE12 TP_CLKOUT_PEG_B# 1 ST54 NOBOM NPO 5%
1M XTAL25_OUT CLKOUT_PEG_B_N TP_CLKOUT_PEG_B ST55 NOBOM mx_c0402_small
AE11 1
2
mx_r0603_h24 CLKOUT_PEG_B_P
1 2 H31 TP21 CLKOUT_PCI0 AT11 IPD 20K PCH_CLKOUT_PCI0 I SR251 1 2 22 OHM
CK_33M_SIO {74}
J31 TP25 CLKOUT_PCI1 AN14 IPD 20K PCH_CLKOUT_PCI1 I SR275 1 2 22 OHM
CK_33M_TPM {46}
GND C29 TP29 CLKOUT_PCI2 AT12 IPD 20K I SR277 1 2 22 OHM
CK_33M_PCIFB {21}
Critical E29 TP33 CLKOUT_PCI3 AT17 IPD 20K PROTO SR278 1 2 22 OHM
HP_DEBUG_CLK {57}
Y12 J27 TP22 CLKOUT_PCI4 AT14 IPD 20K PCH_CLKOUT_PCI4 I SR253 1 2 22 OHM
CK_33M_DEBUG {71}
R37414 25Mhz L27 TP26
1
1 2 1 2
XTAL_25M_PCH_IN_R F28 TP30 CLKOUTFLEX0/GPIO64 AT9 IPD 20K CLKOUTFLEX0_GPIO64 1 ST57 NOBOM NI NI NI
GND E27 TP34 CLKOUTFLEX1/GPIO65 BA5 IPD 20K PCH_CLKOUTFLEX1_48M_SIO 1 ST58 NOBOM SC34 SC37 SC38
A
0 Ohm 3 J25 AW5 IPD 20K 150PF/50V 150PF/50V 150PF/50V A
2
TP23 CLKOUTFLEX2/GPIO66
1
I 5% I L25 TP27 CLKOUTFLEX3/GPIO67 BA2 IPD 20K I SR153 1 2 22 mx_r0402_small CK_48M_CR {42} NPO 5% NPO 5% NPO 5%
SC55
I SC56 C26 mx_c0402_small mx_c0402_small mx_c0402_small
TP31
27PF/50V 27PF/50V B27 NOTE: GND GND GND
2
Critical
U4G
+1P05V_PCH NOTE: +1P05V_PCH
Install those cap during initial power-on. NOTE:
F20 VccIO_024 VccCore_001 AC24 VccAPLLEXP, VccAPLLSATA, and VccAPLLDMI2 can be NC
F30 VccIO_025 VccCore_002 AC26
V25 VccIO_026 VccCore_003 AC28 in On-Die VR mode. +1P05V_PCH
V27 VccIO_027 VccCore_004 AC30
1
1
I I I I V31 VccIO_028 VccCore_005 AC32 I I NI
SCB1 SCB2 SCB3 SCB4 V33 AE24 SCB14 SCB15 SR168
VccIO_029 VccCore_006
10UF/6.3V 10UF/6.3V 1UF/10V 1UF/10V Y24 AE28 1UF/16V 10UF/6.3V 0 PROTO
2
2
X5R 10% X5R 10% X5R 20% X5R 20% VccIO_030 VccCore_007 X5R 10% mx_r0402_small SL1
D Y26 VccIO_031 VccCore_008 AE30 D
mx_c0805_small mx_c0805_small Y30 AE32 mx_c0805_small 2 1 VCCAPLLEXP_R 2 1
VccIO_032 VccCore_009
Y32 VccIO_033 VccCore_010 AE34
GND GND GND GND Y34 AE36 GND GND 1UH/300mA
VccIO_034 VccCore_011 mx_l0805_small
V22 VccIO_035 VccCore_012 AG32
1
VccCore_013 AG34 PROTO PROTO
AA34 AJ32 SCB20 SCB21
1 VccIO_022 VccCore_014
1
NOTE: I I AA36 AJ34 1UF/16V 10UF/6.3V
2
SCB5 SCB6 VccIO_023 VccCore_015
VccCore_016 AJ36 X7R 10% X5R 10%
Splitting 2 power trace/shape 1UF/10V 1UF/10V Y20 AL32 mx_c0805_small
2
2
X5R 20% X5R 20% VccIO_036 VccCore_017 mx_c0603_small
Y22 VccIO_037 VccCore_018 AL34
on pin Y20/Y22/V22 to other pins. VccCore_019 AN32
VccCore_020 AN34 GND GND NI
GND GND AR32 SL2
+1P05V_CPUIO VccCore_021
VccCore_022 AR34 2 1
NOTE: B41
E41
VccDMI_02 NOTE: 10UH/125mA
mx_l0805_small
VccDMI_01
1
Trace needs 1 Splitting 2 power trace/shape NI NI
I SCB22 SCB23
to be at least SCB7 +1P05V_PCH on pins AV24/AV26 to AY25/AY27, 1UF/10V 10UF/6.3V
2
20 mils width 1UF/16V mx_c0603_small X5R 10%
2
1
+1P05V_PCH
VccIO_001 AV24 I I 2 1 VCCAPLLDMI2_R 2 1
AV26 SCB32 SCB33
C VccIO_002 1UH/300mA C
AL40 AY25 1UF/16V 1UF/16V
2
VccIO_008 VccIO_003
1
AN40
AN41
VccIO_009 VccIO_004 AY27 X7R 10% X7R 10% NI
SCB24
NI
SCB25 NOTE: mx_l0805_small
VccIO_010 mx_c0603_small mx_c0603_small
1
2
SCB8 VccIO_013
BA38 VccIO_019 X7R 10% X5R 10%
1UF/16V Y36 NOTE: GND GND mx_c0805_small if power noise is pass on SL3 and SL4.
2
VccIO_012 mx_c0603_small
X7R 10%
NOTE: mx_c0603_small VccIO_014 Y28 Splitting 2 power traces NOTE: GND GND
I
SR163
Splitting 2 power trace/shape GND on pins AC20 to AE20. If filter is unstuffed, 0 ohm resistor(SR163) 0 Ohm Critical
SL4
+1P05V_PCH must be stuffed in R and L site. 2 1 VCCIOPLL_R 2 1
AG38
AG40
VccIO_020
+1P05V_PCH
NOTE: 10UH/125mA
mx_l0805_small
VccIO_021
1
AG41 VccIO_007 I I CRB 0.7:
AJ38 AE15 SCB26 SCB27
VccIO_011 VccDIFFCLKN_01
1
2
SCB9 VccDIFFCLKN_02
VccDIFFCLKN_03 AG15 X7R 10% X5R 10%
1UF/16V mx_c0805_small SR163 is 0 ohm.
2
mx_c0603_small
1
X7R 10% I
mx_c0603_small SCB65
1UF/16V
NOTE: GND GND Critical
+3P3V
2
GND X7R 10% VccAFDIPLL and VccAClk SL5
mx_c0603_small 2 1
+1P05V_ME
AG24 VccASW_004 GND can be NC in on-die VR mode. 600Ohm/100Mhz/0.5A
AG26 VccASW_005
1
AG28 +1P05V_PCH +1P05V_PCH + mx_l0603_small
VccASW_006
1
AJ24 VccASW_007 NI NI I
B B
AJ26
AJ28
VccASW_008
SR160
0 NI
SCB28
1UF/16V
SCE1
220UF/16V NOTE:
2
VccASW_009 mx_r0402_small SR161
AL24 VccASW_010 X7R 10% Backup SL5 to 10X2121R0040(1 ohm/0402)
1
1
AR36 U56 VCCAPLLSATA + mx_l0805_small
VccASW_020 VccAPLLSATA
1
Install SCB12 during initial power-on. AR38
AU30
VccASW_021
A19 VCCAPLLDMI2
I
SCB29
I
SCE2 NOTE:
VccASW_022 VccAPLLDMI2 220UF/16V
AU36 1UF/16V Backup to 0 ohm 1/8W(0805)JUMP
2
+1P05V_ME VccASW_023 VCCCLKDMI
VccClkDMI AJ20 X7R 10%
VCCADAC mx_c0603_small if power noise is pass on SL6 and SL7.
AU34 VccASW_003 VccADAC AT1
AV36 VccASW_002
AU32 VccASW_001 VccADPLLA AB1 VCCA_DPLLA GND GND Critical
1
I SL7
SCB13 AC2 VCCA_DPLLB 2 1
1UF/10V VccADPLLB
2
1
+ mx_l0805_small
1
I I
GND SCB30 SCE3
A 1UF/16V 220UF/16V A
2
X7R 10%
mx_c0603_small
U4H 2
mx_r0402_small
1 I +3P3VSB
+3P3VSB SD1
1
AV28 BT25 V5REF_SUS 3
VccSusHDA V5REF_Sus
2
I NI
1
I NI SCB46 SCB47
NOTE: BAT54CW
1
SCB35 SCB36 I 0.1UF/16V 0.1UF/16V
0.1UF/16V 0.1UF/16V SR171 +5V Y5V +80-20% Y5V +80-20% NI or install is decided to DSW support or not.
2
X7R 10% X7R 10% 10 mx_c0402_small mx_c0402_small
2
D mx_c0402_small mx_c0402_small mx_r0402_small D
BOTTOM 2 1 I +3P3V
GND GND SD2
GND GND 1
BF1 V5REF 3
+3P3V_ME V5REF
2
I
1
AN52 SCB48 BAT54CW
VccSPI 1UF/16V
NOTE: X7R 10%
2
1
I mx_c0603_small
Place SCB59 and SCB66 near pin AU20, SCB37
1UF/16V
2
SCB60 near pin AL38, X7R 10% GND
mx_c0603_small
SCB61 and SCB67 near BC17. +1P8V_SFR +1P8V_SFR +1P8V_SFR
NOTE: GND
1
I I NI SCB60 SCB61 SCB67 AL38 Vcc3_3_05 VccVRM_04 R2
SCB58 SCB59 SCB66 0.1UF/16V 0.1UF/16V 0.1UF/16V AN38 R54
22UF/6.3V X7R 10% X7R 10% X7R 10% Vcc3_3_06 VccVRM_03
1UF/16V 1UF/16V R56
2
2
VccVRM_02
X5R 20% X7R 10% X7R 10% mx_c0402_small mx_c0402_small mx_c0402_small BC17
Vcc3_3_02 NI
1
C mx_c0805_small mx_c0603_small mx_c0603_small BD17 Vcc3_3_03
SCB49 I C
2
GND GND GND GND GND GND mx_c0402_small X5R 10% Install SCB31 during initial power-on.
mx_c0805_small
+3P3V
NOTE: A12
GND GND
Vcc3_3_08
Install SCB58 during initial power-on. AF57 Vcc3_3_01 +1P8V_SFR
I I
1
1
mx_c0402_small mx_c0402_small SCB52
0.1UF/16V
X7R 10%
2
GND GND mx_c0402_small
1
B56 BK36 SCB53 SCB54 SCB69
V_PROC_IO_NCTF VccSus3_3_007 0.1UF/16V 0.1UF/16V 2.2UF/6.3V
VccSus3_3_008 BM36
B B
I I X7R 10% X7R 10% X5R 10%
NOTE:
2
1
I SCB62 SCB63
VccSus3_3_009 AT40 mx_c0402_small mx_c0402_small mx_c0603_small
SCB40 0.1UF/16V 0.1UF/16V AU38 Place SCB53 near pin BT35, SCB54 near pin U31.
X7R 10% X7R 10% VccSus3_3_010
4.7UF/6.3V
2
X5R 10% mx_c0402_small mx_c0402_small U31 GND GND GND ,and SCB69 near pin AV30/AT40.
VccSus3_3_001
mx_c0805_small
+3P3VA
GND GND GND
VccDSW3_3 AV40
1 I
SCB55
0.1UF/16V
X7R 10%
2
mx_c0402_small
+1P5V_STBY_INT BA46
+1P1V_DSW_INT DcpSST
AV41 DcpSusByp GND
+1P1V_INT_DCPSUS1 AA32
+BATT
NOTE:
VCCSUS_INT AT41 DcpSus_01
DcpSus_02 VccRTC BU42 Place SCB56 near PCH within 40mils.
I +1P1V_USB A39 DcpSus_03
1
mx_c0402_small
Critical Critical
U4I U4J
BC15 Vss_0125 Vss_0005 A26 L12 Vss_0231 TP1 P22
BC20 Vss_0126 Vss_0006 A29 L17 Vss_0232 TP2 L31
BC27 Vss_0127 Vss_0007 A42 L38 Vss_0233 TP3 L33
BC31 Vss_0128 Vss_0008 A49 L41 Vss_0234 TP4 M38
BC36 Vss_0129 Vss_0009 A9 L43 Vss_0235 TP5 L36
BC38 Vss_0130 Vss_0010 AA20 M20 Vss_0236 TP10 BM46
BC47 Vss_0131 Vss_0011 AA22 M22 Vss_0237 TP11 BA27
BC9 Vss_0132 Vss_0012 AA24 M25 Vss_0238 TP13 AE49
BD25 Vss_0133 Vss_0013 AA26 M27 Vss_0239 TP14 AE41
D BD33 Vss_0134 Vss_0014 AA28 M31 Vss_0240 TP15 AE43 D
BF12 Vss_0135 Vss_0015 AA30 T52 Vss_0260 TP17 BA36
BF20 Vss_0136 Vss_0016 AA38 T6 Vss_0261 TP18 AY36
BF25 Vss_0137 Vss_0017 AB11 U11 Vss_0262 TP19 Y14
BF33 Vss_0138 Vss_0018 AB15 U15 Vss_0263 TP20 Y12
BF41 Vss_0139 Vss_0019 AB40 U17 Vss_0264
BF43 Vss_0140 Vss_0020 AB41 U20 Vss_0265
BF46 Vss_0141 Vss_0021 AB43 U22 Vss_0266
BF52 Vss_0142 Vss_0022 AB47 U25 Vss_0267
BF6 Vss_0143 Vss_0023 AB52 U27 Vss_0268
BG22 Vss_0144 Vss_0024 AB57 U33 Vss_0269
BG25 Vss_0145 Vss_0025 AB6 U36 Vss_0270
BG27 Vss_0146 Vss_0026 AC22 U38 Vss_0271
BG31 Vss_0147 Vss_0027 AC34 U41 Vss_0272 VSS_NCTF_001 A4
BG33 Vss_0148 Vss_0028 AC36 U47 Vss_0273 VSS_NCTF_005 BM57
BG36 Vss_0149 Vss_0029 AC38 U53 Vss_0274 VSS_NCTF BP1
BG38 Vss_0150 Vss_0030 AC4 V20 Vss_0275
BH52 Vss_0151 Vss_0031 AC54 V38 Vss_0276
BH6 Vss_0152 Vss_0032 AE14 V6 Vss_0277
BJ1 Vss_0153 Vss_0033 AE18 W1 Vss_0278
BJ15 Vss_0154 Vss_0034 AE22 W55 Vss_0279 GND
BK20 Vss_0155 Vss_0035 AE26 W57 Vss_0280
BK41 Vss_0156 Vss_0036 AE38 Y11 Vss_0281 PP VIH=2.8V VIL=0.6V
BK52 Vss_0157 Vss_0037 AE4 Y15 Vss_0282 L_BKLTCTL AG12 PCH_BKLCTL {35}
BK6 Vss_0158 Vss_0038 AE47 Y38 Vss_0283 L_BKLTEN AG18
BM10 Vss_0159 Vss_0039 AE8 Y40 Vss_0284 L_VDD_EN AG17
BM12 Vss_0160 Vss_0040 AE9 Y43 Vss_0285
BM16 Vss_0161 Vss_0041 AF52 Y46 Vss_0286
BM22 Vss_0162 Vss_0042 AF6 Y47 Vss_0287 Vss_0241 M33
C BM23 AG11 Y49 M36 C
Vss_0163 Vss_0043 Vss_0288 Vss_0242
BM26 Vss_0164 Vss_0044 AG14 Y52 Vss_0289 Vss_0243 M46
BM28 Vss_0165 Vss_0045 AG20 Y6 Vss_0290 Vss_0244 M52
BM32 Vss_0166 Vss_0046 AG22 AL43 Vss_0291 Vss_0245 M57
BM40 Vss_0167 Vss_0047 AG30 AL44 Vss_0292 Vss_0246 M6
BM42 Vss_0168 Vss_0048 AG36 R36 Vss_0293 Vss_0247 M8
BM48 Vss_0169 Vss_0049 AG43 P36 Vss_0294 Vss_0248 M9
BM5 Vss_0170 Vss_0050 AG44 R25 Vss_0295 Vss_0249 N4
BN31 Vss_0171 Vss_0051 AG46 P25 Vss_0296 Vss_0250 N54
BN47 Vss_0172 Vss_0052 AG5 Vss_0251 R11
BN6 Vss_0173 Vss_0053 AG50 Vss_0252 R15
BP3 Vss_0174 Vss_0054 AG53 A6 VSS_NCTF_002 Vss_0253 R17
BP33 Vss_0175 Vss_0055 AH52 B2 VSS_NCTF_003 Vss_0254 R22
BP35 Vss_0176 Vss_0056 AH6 BM1 VSS_NCTF_004 Vss_0255 R4
BR22 Vss_0177 Vss_0057 AJ22 BP57 VSS_NCTF_007 Vss_0256 R41
BR52 Vss_0178 Vss_0058 AJ30 BT2 VSS_NCTF_008 Vss_0257 R43
BU19 Vss_0179 Vss_0059 AJ57 BU4 VSS_NCTF_009 Vss_0258 R46
BU26 Vss_0180 Vss_0060 AK52 BU52 VSS_NCTF_010 Vss_0259 R49
BU29 Vss_0181 Vss_0061 AK6 BU54 VSS_NCTF_011
BU36 Vss_0182 Vss_0062 AL11 BU6 VSS_NCTF_012 Vss_0214 G54
BU39 Vss_0183 Vss_0063 AL18 D1 VSS_NCTF_013 Vss_0215 H15
C19 Vss_0184 Vss_0064 AL20 F1 VSS_NCTF_014 Vss_0216 H20
C32 Vss_0185 Vss_0065 AL22 Vss_0217 H22
C39 Vss_0186 Vss_0066 AL26 Vss_0218 H25
C4 Vss_0187 Vss_0067 AL30 Vss_0219 H27
D15 Vss_0188 Vss_0068 AL36 Vss_0220 H33
D23 Vss_0189 Vss_0069 AL41 Vss_0221 H6
D3 Vss_0190 Vss_0070 AL46 GND Vss_0222 J1
D35 Vss_0191 Vss_0071 AL47 Vss_0223 J33
B B
D43 Vss_0192 Vss_0072 AM52 Vss_0224 J46
D45 Vss_0193 Vss_0073 AM3 Vss_0225 J48
E19 Vss_0194 Vss_0074 AM57 Vss_0226 J5
E39 Vss_0195 Vss_0075 AN11 Vss_0227 J53
E54 Vss_0196 Vss_0076 AN12 Vss_0228 K52
E6 Vss_0197 Vss_0077 AN15 Vss_0229 K6
E9 Vss_0198 Vss_0078 AN17 Vss_0230 K9
F10 Vss_0199 Vss_0079 AN18 Vss_0119 BA49
F12 Vss_0200 Vss_0080 AN20 Vss_0120 BB1
F16 Vss_0201 Vss_0081 AN30 AY22 Vss_0004 Vss_0121 BB3
F22 Vss_0202 Vss_0082 AN36 C12 Vss_0003 Vss_0122 BB52
F26 Vss_0203 Vss_0083 AN4 AE56 Vss_0001 Vss_0123 BB6
F32 Vss_0204 Vss_0084 AN43 BR36 Vss_0002 Vss_0124 BC14
F33 Vss_0205 Vss_0085 AN47 AU2 VssADAC Vss_0104 AV18
F35 Vss_0206 Vss_0086 AN54 Vss_0105 AV22
F36 Vss_0207 Vss_0087 AN9 Vss_0106 AV34
F40 Vss_0208 Vss_0088 AR20 Vss_0107 AV38
F42 Vss_0209 Vss_0089 AR22 GND Vss_0108 AV47
F46 Vss_0210 Vss_0090 AR52 Vss_0109 AV6
F48 Vss_0211 Vss_0091 AR6 A54 TS_VSS1 Vss_0110 AW57
F50 Vss_0212 Vss_0092 AT15 A52 TS_VSS2 Vss_0111 AY38
F8 Vss_0213 Vss_0093 AT18 F57 TS_VSS3 Vss_0112 AY6
Vss_0094 AT43 D57 TS_VSS4 Vss_0113 B23
Vss_0095 AT47 Vss_0114 BA11
Vss_0096 AT52 Vss_0115 BA12
Vss_0097 AT6 Vss_0116 BA31
GND Vss_0098 AT8 GND Vss_0117 BA41
Vss_0099 AU24 Vss_0118 BA44
A Vss_0100 AU26 A
Vss_0101 AU28
Vss_0102 AU5
Vss_0103 AV12 GND
COUGARPOINT
PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
COUGARPOINT
GND
Title : VSS 9-9
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 29 of 73
5 4 3 2 1
5 4 3 2 1
D D
+3P3VSB +3P3V_ME
1
VP NI
R45 R50
0 0
C C
2
I
PD3
3P3VSB_APWROK BAT54CW
1
3 SLP_A# {24,57,60,61}
2
1
I
1
I PR55
PR54 5.6K
33K
2
2
APWROK {23,60}
+1P05V_ME
1
3 I
C PC30
PQ15_B 1 B I 0.1UF/16V
2
1
C I 100PF/50V
2
B B
I 2
1
PR53 I GND
301K PC29
1% 0.47UF/16V
2
X7R 10%
2
GND
GND GND
A A
+3P3VA +3P3VSB
PCH_DPWROK
2
SR259 SR261
0 0
+3P3V_AMP
I NI +3P3V_AMP
1
mx_r0402_small
mx_r0402_small
NI
O2R151
1
D I 4.7K D
SR185 I
2
47K I I SR186
mx_r0402_small 14 SU2A SU2B 499
14
74LVC14AD 74LVC14AD 1%
2
7
1
1
SC70 SC71
1UF/16V 0.1UF/16V
X7R 10% X7R 10% SUS_ACK#
2
2
1
1
mx_c0603_small I mx_c0402_small NI
SR254 SR226
0 GND GND 0
mx_r0402_small mx_r0402_small
GND GND
2
2
+5VA
NOTE:
Check voltage level of SUS_ACK# of PCH
1
SUS(NI)
SR198 and decide resistor value of SR199.
+5VA 10K SUS(NI)
PCH_DPWROK_PWRDN_DEF mx_r0402_small
SR217
SUS(NI) 0
2
1
SR196 mx_r0402_small
+5VA +3P3VA 10K SQ5_C 1 2 SUS_ACK# {24}
+5V_DUAL mx_r0402_small
C
NI C
+5VA +3P3VA SR197
2
1
1
I NI SUS(NI) 10K 3 SUS(NI) NI
1
SR224 SR227 SR192 mx_r0402_small C SUS(NI) SR199 SC72
4.7K 1K 10K SUS(NI) SQ4_C 1 2SQ5_B 1 B SQ5 20K 0.1UF/16V
1
I NI mx_r0402_small
mx_r0402_small mx_r0402_small SR194 SQ7_B PMBS3904 mx_r0402_small X7R 10%
2
SR222 SR228 0 3 E mx_c0402_small
2
2
5.6K 33K I mx_r0402_small C SUS(NI) 2
1
1% mx_r0402_small SR225 SUS_PWR_ACK_R 1 2 SQ4_B 1 B SQ4 NI
mx_r0402_small 1K 3 PMBS3904 C10
2
2
1
I SQ6_C 1 2 SQ7_B 1 B SQ7 NI NI 2 X7R 10%
1
SR255 PMBS3904 SR193 SC76
0 3 E 976 0.1UF/16V
mx_r0402_small C I 2 1% X7R 10%
2
0P82VA 1 2 SQ6_B 1 B SQ6 mx_r0402_small mx_c0402_small GND GND
2
PMBS3904 SR286
1
E NI 0
1
I NI 2 C9
SUS(NI)
1
1
1.1K 1UF/16V X7R 10%
1% X7R 10%
2
1
SUS(NI)
SR189
1
GND GND SUS(NI) 10K
SR188 mx_r0402_small
B 1K B
2
mx_r0402_small SUS_ACK_CNTRL
2
3
SUS(NI)
SR244 C SUS(NI)
SQ1_C 1 2SQ2_B 1 B SQ2
PMBS3904
SUS(NI) 10K mx_r0402_small E
1
SR187 SUS(NI) 2
10K 3 SC78
mx_r0402_small C SUS(NI) 10UF/6.3V
2
{24} SUS_WARN# 1 2 SUS_WARN#_R 1 B SQ1 X5R 10%
PMBS3904 mx_c0805_small
E
2 GND GND
1
change to 1% SUS(NI)
1
SR219 SUS(NI)
5.6K SC77
1% 10UF/6.3V +5VA
2
mx_c0805_small
1
I
SR190
+3P3VA GND GND 1K
mx_r0402_small
2
1
NI SR257
SR220 SQ3_C 1 2 SLP_SUS {24}
A
10K A
I
mx_r0402_small 0 Ohm
SR191 5%
2
4.7K 3
I
mx_r0402_small C I PEGATRON DT-MB RESTRICTED SECRET
{24,57,75} SLP_SUS# 1 2 SLP_SUS#_SQ3_B 1 B SQ3
PMBS3904
E
2
Title : PCH_DPWROK & SUS_ACK#
+5VA
1
Install the VD1/VD2/VD3/VD4/VD5 diode PROTO PROTO PROTO
to prevent from ESD issue VD1 VD2 VD3
BAV99W-L BAV99W-L BAV99W-L
D
NOTE: GND +5V
D
3
PROTO
VL3
0.082UH/300mA J69
mx_l0603_small
JP23 1 2 SHORT_PIN 1 2 17
{25} VGA_RED SIDE1
NI 2 2 1 1 RED
1
PROTO PROTO PROTO PROTO BLUE 4 4 3 3
1
VR1 VC1 VC2 VC3 6 5 GREEN
150 3.3PF/50V 5.6PF/50V 3.3PF/50V 6 5
{25,32} VHSYNC 8 8 7 7
1% NPO 0.25PF NPO 0.25PF NPO 0.25PF 10 9 VVSYNC {25,32}
2
mx_r0402_small mx_c0402_small mx_c0402_small mx_c0402_small DDCA_CLK_VCON 10 9 DDCA_DATA_VCON
12 11
2
12 11
14 14 13 13
16 16 15 15
18 SIDE2
GND GND GND PROTO GND
VL5 WtoB_CON_2X8P
0.082UH/300mA RED GND GND
mx_l0603_small PROTO
JP24 1 2 SHORT_PIN 1 2 GREEN
{25} VGA_GREEN
NI
1
1
VR2 PROTO VC5 VC6
150 VC4 5.6PF/50V 3.3PF/50V
1% 3.3PF/50V NPO 0.25PF NPO 0.25PF
2
2
mx_r0402_small NPO 0.25PF mx_c0402_small mx_c0402_small
2
C mx_c0402_small C
GND GND GND PROTO GND
VL7
0.082UH/300mA
mx_l0603_small
JP25 1 2 SHORT_PIN BA 1 2
{25} VGA_BLUE
NI
1
1
VR4
150
VC7
3.3PF/50V
VC8
5.6PF/50V
VC9
3.3PF/50V NOTE:
1% NPO 0.25PF NPO 0.25PF NPO 0.25PF
Place there VGA filter
2
2
mx_r0402_small mx_c0402_small mx_c0402_small mx_c0402_small
2
+5V
+5VA +3P3V
3
FD31
BAT54AW
PROTO
8
O2RN10A O2RN10B O2RN10C O2RN10D
2
2.7KOHM 2.7KOHM 2.7KOHM 2.7KOHM
2
5% 5% 5% 5%
1
B B
PROTO PROTO PROTO PROTO PROTO PROTO PROTO PROTO
VD4 VD5 M2R13 M2R14
7
BAV99W-L BAV99W-L 2.2K 2.2K
mx_r0402_small
mx_r0402_small
GND
3
2
PROTO
M2Q3 DDCA_DATA_VCON
{25,32} VHSYNC VHSYNC {25,32} 2N7002
1
G
VGA_DDC_DATA_LS
2 S
3
{25} DDCA_DATA
PROTO
D
M2Q4
2N7002
1
G
VGA_DDC_CLK_LS DDCA_CLK_VCON
2 S
3
{25} DDCA_CLK
3
{25,32} VVSYNC VVSYNC {25,32}
BAV99W-L NI BAV99W-L NI
1
M2D1 M2C10 M2D2 M2C11
PROTO PROTO
1
NI NI 100PF/50V 100PF/50V
VC11 VC12 +5VA NPO 5% +5VA NPO 5%
2
12PF/50V 12PF/50V mx_c0402_small mx_c0402_small
2
NPO 5% NPO 5%
mx_c0402_small mx_c0402_small
CHANGE TO BAV99
GND GND GND GND
GND GND
A A
<Variant Name>
D D
+5V +5V_LCD
Q9307
2
30mOhm/10V SOT-23
R8823
2 S
4.7KOHM
D
3
5%
Critical
G
1
I
I
1
R56
1 2
1
10KOhm R59
2 I 5% 1 2
R58
R8822 10KOhm Q9306 3 10 Ohm
1
C 8.2KOHM 5% C 5% I C
2
1 B C81
5% I
1
1UF/16V +
1
2
I E X7R 10% CE2
3 2
PMBS3904 mx_c0603_small100uF/16V
D
I NI
2
Q9305
1 R1.01
G 2N7002
2 S I
GND
{34} EDP_VDD_EN
GND GND GND GND
1
NI
C80
0.1UF/16V
2
GND
B B
A A
+1P2V_SW +1P2V_edp
L6331 L6328
1 2 1 2 +1P2V_edp_IN
2.2UH 600Ohm/100Mhz/0.5A
0.2 I
1
I
C17 C18 C14 C15 C20 C19
0.1UF 0.01UF 4.7UF/6.3V 10UF/6.3V0.1UF 0.1UF
2
X7R 10% X7R 10% X5R 10%
I I I I I NI
D GND GND GND GND X5RGND
10% GND D
+3P3V +VDDIOX
L6329
1 2
600Ohm/100Mhz/0.5A
I
1
U29A
C30 C13
0.47UF/16V 4.7UF/6.3V 6 53
2
+3P3V VDDRX TA0p LVDS_L0P_NB {35}
X7R 10% X5R 10% TA0n 54 LVDS_L0N_NB {35}
+VDDIO 13 51
I I VDDIOX1 TB0p LVDS_L1P_NB {35}
14 VDDIOX2 TB0n 52 LVDS_L1N_NB {35}
GND L6330 GND 48
TC0p LVDS_L2P_NB {35}
1 2 38 VDDIO3 TC0n 49 LVDS_L2N_NB {35}
+3P3V +3P3V 50 43
VDDIO4 TD0p LVDS_L3P_NB {35}
600Ohm/100Mhz/0.5A 44
TD0n LVDS_L3N_NB {35}
1
I +1P2V_edp 19 VDD12 TCK0p 46 LVDS_LCLKP_NB {35}
C28 C29 C27 C16 47
TCK0n LVDS_LCLKN_NB {35}
0.47UF/16V 10UF/6.3V 0.1UF 0.1UF+1P2V_SW 16 41
2
SW_OUT1 TA1p LVDS_U0P_NB {35}
1
X7R 10% NI 15 42
R48 R81 SW_OUT2 TA1n LVDS_U0N_NB {35}
I X5R 10% I I TB1p 39 LVDS_U1P_NB {35}
1MOhm 100KOHM TB1n 40 LVDS_U1N_NB {35}
5% 5% GND GND GND GND TC1p 36 LVDS_U2P_NB {35}
C21 2 1 0.1UF/16V I DP0_PCH_D_C 4 37
2
I I {25} DP_DATA0 C22 2 0.1UF/16V IX7R 10% DP0#_PCH_D_C DRX0p TC1n LVDS_U2N_NB {35}
{25} DP_DATA0# 1 5 DRX0n ENBLT/TD1p 31 LVDS_U3P_NB {35}
C23 2 1 0.1UF/16V I
X7R 10% DP1_PCH_D_C 7 32
C {25} DP_DATA1 C24 2 0.1UF/16V I DP1#_PCH_D_C DRX1p PWMO/TD1n LVDS_U3N_NB {35} C
{25} DP_DATA1# 1 X7R 10% 8 DRX1n TCK1p 34 LVDS_UCLKP_NB {35}
C25 2 1 0.1UF/16V IX7R 10% DP_AUX#_PCH_D_C 1 35 +VDDIO
{25} PCH_DDPDAUXN DAUXn TCK1n LVDS_UCLKN_NB {35}
C26 2 1 0.1UF/16V IX7R 10% DP_AUX_PCH_D_C 2
{25} PCH_DDPDAUXP DAUXp
X7R 10% 27 1 R42 2 1% I
RLV_AMP
1
22 RLV_CFG 4.99K +VDDIO
RLV_CFG
1
2
A1 WP RST#
3 6 3
2
1
EEPROM 2Kb +3P3V 18
C9347 GNDX1 C9346
GND GND Critical 30 DDC_SDA GNDX2 17
I2C_CFG = "H" 0.1UF/16V 29 20 0.1UF/16V
2
2
DDC_SCL TESTMODE
EEPROM for Initial Code X7R 10%I 5% 1 4.7KOHM2
RN4407A 45 PWMI NC1 55 X7R 10%
GND I2C Address: 0xA0 11 56
I {25} DP_HDP HPD NC2 I
GND
PS8615QFN56GTR-A0
I 5% 3 RN4407B +3P3V
GND 4.7KOHM4
Power On Configuration Critical GND
I 5% 5 RN4407C
4.7KOHM6
1
NI R21 NI R49
GND 1 4.7K 2 I2C_CFG 1 4.7K 2 +VDDIO R85
4.7K
I2C_CFG: Initial code loading selection, internal pull-down ~80K I 5% 7 RN4407D
4.7KOHM8 NI
L: Hardware self configuration +3P3V
2
B U88 U29B B
M: No initial code loading, external I2C control is expected
H: Load initial code from external EEPROM through MSCL/MSDA 1 8 58 62
A0 VCC GND4 GND8
2 A1 WP 7 59 GND5 GND9 63
NI R20 3 6 60 64
EDP_VDD_EN 4.7K 2 A2 SCL GND6 GND10
1 +VDDIO 4 GND SDA 5 61 GND7 GND11 65
I2C_ADDR: I2C slave address selection, internal pull-down ~80K EEPROM 2Kb PS8615QFN56GTR-A0
1
L: 0x10h ~0x1Fh NI
H: 0xB0h ~0xBFh C9348 Critical
0.1UF/16V
2
I R39 NI R84
GND 1 4.7K 2 RLV_CFG 1 4.7K 2 +VDDIO
RLV_CFG: LVDS color depth and data mapping selection, internal pull-down ~80K
L: 8-bit LVDS, VESA mapping
M: 8-bit LVDS, JEIDA mapping
H: 6-bit LVDS, both VESA and JEIDA mapping
I R43
RLV_LNK/GPIO0 1 4.7K 2 +VDDIO
A A
RLV_LNK: LVDS single link or dual link selection, internal pull-down ~80K
L: Single link LVDS
H: Dual link LVDS
D D
I
I 1 0Ohm 2 RN6A
3 0Ohm 4 RN1B
5%
5%
1
{34} LVDS_L3P_NB 200Ohm/100Mhz LVDS_U3P_NB {34}
{34} LVDS_L3N_NB NI +5V_LCD
LVDS_U3N_NB {34}
GL716 GL712 NI
4
I 200Ohm/100Mhz
I
1 I 0Ohm 2 RN1A 3 I 0Ohm 4 RN6B
3 0Ohm 4 RN2B 1 0Ohm 2
RN7A
5% 5%
5% Critical 5%
1
3
WtoB_CON_30P +5V_LCD
{34} LVDS_LCLKP_NB 200Ohm/100Mhz GL713 LVDS_UCLKP_NB {34}
{34} LVDS_LCLKN_NB NI 31 LVDS_UCLKN_NB {34}
GL720 29
SIDE1
30 NI
29 30
1
L2_TX3+_NB_C 27 28 L1_TX3+_NB_C NI
4
2
27 28
1
I L2_TX3-_NB_C 25 26 L1_TX3-_NB_C 200Ohm/100Mhz
I CB251 NI
25 26
1 I 0Ohm 2 RN2A 23 24 3 I 0Ohm 4 RN7B 0.1UF/25V CB250
2
23 24
C 3 0Ohm 4 RN3B L2_TXC+_NB_C 21 22 L1_TXC+_NB_C 1 0Ohm 2
RN8A mx_c0603_small 0.1UF/25V C
2
5% L2_TXC-_NB_C 21 22 L1_TXC-_NB_C 5% Y5V +80-20% mx_c0603_small
19 19 20 20
5% 5% Y5V +80-20%
17 17 18 18
1
3
L2_TX2+_NB_C 15 16 L1_TX2+_NB_C GND
{34} LVDS_L2P_NB 200Ohm/100Mhz 15 16 LVDS_U2P_NB {34}
{34} LVDS_L2N_NB NI L2_TX2-_NB_C 13 14 L1_TX2-_NB_C
LVDS_U2N_NB {34}
GL714 11
13 14
12 GL711 NI
L2_TX1+_NB_C 11 12 L1_TX1+_NB_C
9 10
4
2
9 10 200Ohm/100Mhz
I L2_TX1-_NB_C 7 7 8 8 L1_TX1-_NB_C I
1 I 0Ohm 2 RN3A 5 5 6 6 3 I 0Ohm 4 RN8B
3 0Ohm 4 RN4B L2_TX0+_NB_C 3 3 4 4 L1_TX0+_NB_C 1 0Ohm 2
RN9A
5% L2_TX0-_NB_C L1_TX0-_NB_C 5%
1 1 2 2
5% 5%
SIDE2 32
1
3
{34} LVDS_L1P_NB 200Ohm/100Mhz GL717 LVDS_U1P_NB {34}
{34} LVDS_L1N_NB NI LVDS_U1N_NB {34}
GL715 P170 NI
4
2
I 200Ohm/100Mhz
I
1 I 0Ohm 2 RN4A 3 I 0Ohm 4 RN9B
3 0Ohm 4 RN5B 1 0Ohm 2
RN10A
5% 5%
5% 5%
1
3
{34} LVDS_L0P_NB 200Ohm/100Mhz GL719 LVDS_U0P_NB {34}
{34} LVDS_L0N_NB NI LVDS_U0N_NB {34}
GL718 NI
4
2
200Ohm/100Mhz
I
I 3 0Ohm 4
RN10B
1 0Ohm 2 RN5A GND
5%
B 5% B
Inverter
Conn.
+19V
INV_CON1
{34} CON_BKLTEN 1
{29} PCH_BKLCTL 2
3
4
5
6
1
7
C9350 8
0.1UF/16V 9
2
5 4 3 2 1
5 4 3 2 1
WLAN +3V_WLAN
+1P5V_WLAN
J105
{24,75} WAKE# 1 WAKE# 3.3V_1 2
3 Reserved1 GND7 4
5 Reserved2 1.5V_1 6 +3V_WLAN +3V_WLAN
7 CLKREQ# UIM_PWR 8
D 9 GND1 UIM_DATA 10 D
11 12
1
{26} CLK_PCIE_WLAN# REFCLK- UIM_CLK I
1
{26} CLK_PCIE_WLAN 13 REFCLK+ UIM_RESET 14
R4707
15 GND2 UIM_VPP 16 5% R4713
8.2KOHM 0
I
17 18
2
Reserved/UIM_C8 GND8
19 Reserved/UIM_C4W_DISABLE# 20
21 GND3 PERST# 22 PCIE_PLT_RST# {16,37,75}
{22} WLAN_PE1_RXN1 23 PERn0 +3.3Vaux 24
{22} WLAN_PE1_RXP1 25 PERp0 GND9 26
27 GND4 1.5V_2 28
1
29 GND5 SMB_CLK 30 SMB_CLK_RESUME {21,75}
{22} WLAN_PE1_TXN1 I LC7 1 2 0.1UF/16V X7R 10% WLAN_PE1_TXN1_C
mx_c0402_small 31 32 SMB_DATA_RESUME {21,75}
C9333 C4712
PETn0 SMB_DATA
{22} WLAN_PE1_TXP1 I LC8 1 2 0.1UF/16V X7R 10% WLAN_PE1_TXP1_C
mx_c0402_small 33 34 470PF/50V 0.1UF/16V
2
+3V_WLAN PETp0 GND10
35 GND6 USB_D- 36 X7R 10% X7R 10%
37 38 USBN9 {22}
Reserved3 USB_D+ NI NI
R47081 2 0 I 39 Reserved4 GND11 40 USBP9 {22}
R47091 2 0 I 41 Reserved5 LED_WWAN# 42
H10 H11 43 44 GND GND
Reserved6 LED_WLAN#
45 Reserved7 LED_WPAN# 46
2
{23} CLINK_DATA_WLAN 47 Reserved8 1.5V_3 48
R4711 R4710 49 50
{23} CLINK_RST_WLAN_N Reserved9 GND12
A40M20-42C1AS A40M20-42C1AS 0 0 51 52
Reserved10 3.3V_2
I I
1
NI
1
I I
53 GND13 NP_NC2 56 C4713
54 GND14 NP_NC1 55 33PF/50V
2
GND GND MLCC/+/-5%
C MINI_PCI_LATCH_52P C
1
{23} CLINK_CLK_WLAN
NI
C4714
Critical 33PF/50V
2
MLCC/+/-5%
GND GND
1
80Ohm/100Mhz/2A
1
+1P5V +1P5V_WLAN C4706 C4705 C4708 C4707 C4709
NI
C4704 0.1UF/16V 0.1UF/16V 0.1UF/10V 0.1UF/10V 0.1UF/10V
2
R4702 10UF/6.3V X7R 10% X7R 10% 0.1 0.1 0.1
2
1 2 X5R 10% I I NI NI NI
I
2
80Ohm/100Mhz/2A
1
B Critical C4703 B
C4700 100KOHM C4701 C4702
10UF/6.3V 1% 0.1UF/16V 0.1UF/16V GND
2
I
I I I
+3P3VSB R4714
1 2
GND
70Ohm/100Mhz/3A
Critical
A A
Title : WLAN
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 36 of 73
5 4 3 2 1
5 4 3 2 1
Critical
U10
+3P3V_LAN +3P3V_LANOUT
1
I I I D8826 29 INVDD1
2
LCB1 LCB2 LCB3 23
MDI_PLUS[3] LAN_MDI3_P {38}
22UF/6.3V 0.1UF/16V 1UF/16V 24 LAN_MDI3_N {38}
2
X5R 20% X7R 10% X7R 10% D8852 MDI_MINUS[3]
2
MMSZ5228B_F
AZ5123-01J
NI
1
GND GND GND GND GND
I LL1
1 2 LAN_CTRL10 7 CTRL10
4.7uH
LAN_COREVDD 8 COREVDD1
11 COREVDD2
16 COREVDD3
22 COREVDD4
37 COREVDD5
1
1
I I I I I I 40 COREVDD6
C LCB4 LCB5 LCB6 LCB7 LCB8 LCB9 43 C
22UF/6.3V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V COREVDD7
46
2
2
X5R 20% X7R 10% X7R 10% X7R 10% X7R 10% X7R 10% COREVDD8
47 COREVDD9 LED[2] 25 LINK_100# {38}
LED[1] 27 LINK_1000# {38}
LED[0] 26 LAN_ACT# {38}
+3P3V_LAN
GND GND GND GND GND GND
1
I +3P3V_LAN +3P3V_LAN +3P3V_LAN
LR2
10K
1
mx_r0402_small I I
1
R37421 LR15 LR16 I
2
1 2 LAN_CLKREQ# 48 4.7K 4.7K LR17
{24} LAN_CLK_REQ- CLKREQN mx_r0402_small
mx_r0402_small 10K
0 Ohm 36 mx_r0402_small
{16,36,75} PCIE_PLT_RST#
2
PE_RSTN_N
5%
2
NI 1 LAN_GPIO0
GPIO[0]
1
NI GPIO[1] 2 LAN_GPIO1
LCB10
0.1UF/16V 3 LAN_DISABLE# {24}
2
LAN_XTAL_IN 10 XTLI
LAN_XTAL_OUT 9
XTLO
Critical TEST_ENABLE 30 LAN_TEST_ENABLE
R37419 Y3
1 2 LAN_XTAL_IN_R 1 2 12 LAN_RBIAS
RBIAS
1
GND NI NI
0 Ohm 3 LCB12 LCB11 49
GND
1
1
I 5% 25Mhz I 0.1UF/16V 0.1UF/16V 50 I I
2
2
GND5
GND6 55
GND7 56
GND GND GND 57
GND GND GND8 GND GND PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
D D
LR24
LINK_100#_R 2 1 LINK_100# {37}
150 OHM
1
5%
NI LC18 I
5% 0.1UF/16V
2
4 Critical 3 {37} LINK_1000#
0Ohm
LRN1B 90Ohm/100MHz I
{37} LAN_MDI0_P
1
I GND X7R 10%
4
LC17
0.1UF/16V
2
X7R 10%
LL6 CM1213_04SO J9
2
3
NI L1 2
{37} LAN_MDI0_N L1 P_GND2
5% GND
+5VA YELLOW
2 0Ohm 1 4 3 GREEN
NP_NC2 4
LRN1A NI CH3 CH2
LINK_100#_R L2 L2
5% VP 5 2 VN
1 0Ohm 2 LAN_MDI0_P_C R1
LRN3A LAN_MDI0_N_C TD1+
CH4 6 1 CH1 R2 TD1-
R3 TD2+
LL2 GND R4 TD2-
3
LAN_CTR
UU11
R5 CT1
C LAN_MDI1_P_C R6 C
{37} LAN_MDI1_P I CT2
R7 TD3+
LAN_MDI1_N_C R8
{37} LAN_MDI1_N
4
NI TD3-
R9 TD4+
5% R10
90Ohm/100MHz LAN_MDI2_P_C TD4-
3 0Ohm 4
LRN3B
NI Critical L3 3
{37} LAN_ACT# L3 NP_NC1
5% LAN_MDI2_N_C
4 0Ohm 3 +3P3V_LAN GREEN 1
LRN4B P_GND1
L4 L4
LAN_MDI3_P_C
{37} LAN_MDI2_P
1
LAN_JACK_14P
1
LAN_MDI3_N_C LR23
LL3 150 OHM Critical
90Ohm/100MHz 5%
Critical
2
2
I
{37} LAN_MDI2_N
NI I I
1
5% LCB17 LCB18 I LANLED2
2 0Ohm 1 0.1UF/16V 1UF/16V LC16
LRN4A X7R 10% X7R 10% 0.1UF/16V
2
+5VA 4 3 mx_c0402_small mx_c0603_small X7R 10% GND
1
I
CH3 CH2
VP 5 2 LC15
VN
1 Critical
0Ohm 2
LRN5A GND 470PF/50V
2
90Ohm/100MHz 6 1 GND GND X7R 10%
5% CH4 CH1
mx_c0402_small
{37} LAN_MDI3_P NI GND
1
CM1213_04SO
GND
B UU12 B
LL4 I
2
{37} LAN_MDI3_N
3 0Ohm 4 LRN5B
5%
NI
A A
<Variant Name>
Title : RJ45
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 38 of 73
5 4 3 2 1
5 4 3 2 1
PWR_LED+
R3759023 SIO_COLOR
R_ODD_EJECT# 1 2 P5_R_ODD_EJECT#
0 Ohm
5%
NI
1
I I I
CB256 CB254 CB255
D 0.1UF/25V 0.1UF/25V 0.1UF/25V D
2
X7R 10% X7R 10% X7R 10%
GND GND GND
R37400 P5
{72,74} PWRBTN# 1 2 1 1 SIDE2 14
2 2
+3P3VSB 75 OHM PWR_LED+ 3 3
1
5% I SIO_COLOR 4 4
I CB252 P5_R_ODD_EJECT# 5 5
1
0.1UF/25V 6
2
R82 P5_R_Bright_up# 6
7 7
75 Ohm X7R 10% 8
P5_R_Bright_down# 8 R37571
5% 9 9
GND PWR_LED+
10 HF 1 2 SIO_BLINK {74}
2
I
HDD_LED+ 10
11 11
12 13 75 Ohm
{75} HD_LED_OUT# 12 SIDE1
5%
WtoB_CON_12P I SIO_COLOR {74}
Critical
GND
C C
1
C9306 C9305
0.01UF/25V 0.01UF/25V
2
X7R 10% X7R 10%
NI NI
GND GND
I 3 I 3 I 3
D D D
M2Q1 M2Q2 M2Q5
R37401 2N7002 R37402 2N7002 R37403 2N7002 +3P3VSB
P5_R_ODD_EJECT#
1 2 1 P5_R_Bright_down# 1 2 1 P5_R_Bright_up# 1 2 1
G I G I G I
75 OHM 2 S 75 OHM 2 S 75 OHM 2 S
1
5% NI 5% I 5% I
I CB253 I CB257 I CB258
1
0.1UF/25V 0.1UF/25V 0.1UF/25V
2
R364
X7R 10% X7R 10% X7R 10% 300 OHM
GND GND GND 5%
2
I
1
CR1
+
GREEN
{74} R_ODD_EJECT# Critical
2
R3759025
A 1 2 P5_R_Bright_down# A
{74} R_Bright_down#
0 Ohm GND
5%
NI PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
R3759024
Title : FRONT PANEL
1 2 P5_R_Bright_up# Engineer: Scott Chen
{74} R_Bright_up# Pegatron Corp.
0 Ohm Size Project Name Rev
5% A3 IPISB-SB 1.00
NI
Date: Thursday, April 14, 2011 Sheet 39 of 73
5 4 3 2 1
5 4 3 2 1
D D
MTG4 MTG5
C IPISB-SB C
MTG2 MTG7
C315D157N C315D157N
I I
GND GND GND GND MTG6
1 NP_NC GND8 9
2 GND1 GND7 8
3 GND2 GND6 7
4 GND3 GND5 6
GND4 5
C315D157N C315D157N
I I
GND GND GND GND
A A
D D
C C
NI
RN4107A
1 90Ohm/100MHz
0Ohm 2
5% H_LP7- P66
{22} USBN7
3
2 1 1
2 2
Criticial 3
H_LP7+ 3
{22} USBP7 L57 4
4
4
5 5
3 0Ohm 4 RN4107B I ER99 1 2 0 DMIC_DATA_WEB 6 6
{43} DMIC_DATA I ER100 1 2 0 DMIC_CLK_WEB 7 9
{43} DMIC_CLK 7 SIDE1
NI 8 8 SIDE2 10
5% I
WtoB_CON_8P
22PF/50V I
1
22PF/50V Critical GND
1
C3924
/EMI_I C3923
2
NPO 5% /EMI_I GND
1
NPO 5% NI
1
EC29
0.1UF/16V C9329
2
GND 470PF/50V
2
GND X7R 10%
I
B B
GND
GND
A A
5%
R89
330 OHM
1 NI 2
+3P3V_DUAL
LED1
1
R88
D I D
10KOhm CR_LED_N 2 1CR_LED_P 1 I 2 +5V
R4407 +
6
5% Q8215A 4.7K
1
UM6K1N NI NI
I 2 CB249 WHITE CB248
0.1UF/25V 0.1UF/25V
2
{26} CK_48M_CR
3
Q8215B mx_c0603_small mx_c0603_small
Critical
UM6K1N Y5V +80-20% Y5V +80-20%
1
Card LED#
I 5 GND GND
C4106
4
0.1UF/16V
2
GND X7R 10%
+3P3V_DUAL
NI SD_CD#
GND
GND
R1.02 U5100B XDWRN
30 GND1
+3P3V_DUAL 31 GND2
32 GND3
1
33 GND4
R202 2 1 SD_CD# C4115 C4105
NI 1% AU6433B52-GEF-GR 0.1UF/16V 4.7UF/6.3V
2
10KOhm U5100A
Critical X7R 10% X5R 10% GND
R203 2 1 MS_INS# SD_WP
I I
NI 1%
GND 29 MS_CLK
10KOhm GND GND GND XDCLE
1 28 Card LED#
EXT48IN GPON7 SD_D0
1
C +1P8V_CR_CORE 2 27 MS_D0 C
C4107 CHIPRESETN CTRL1 XDDATA0
1
1UF/16V 3 26
2
REXT CTRL3
1
X7R 10% C4108 SD_D1
+3V_CARD NI 5% 1 2 RN4406A C4116 4.7UF/6.3V 4 25 MS_D1
0Ohm
2
I VD33P DATA1 XDDATA1
0.1UF/16V X5R 10%
2
{22} USBP8 L4103 X7R 10% I 5 DP DATA0 24
4
LP8+ GND
LP8- I XDDATA7
GND GND 6 DM DATA7 23
7 22 XDDATA6
{22} USBN8
2
3
+3V_CARD VS33P DATA6 SD_CLK
NI 5% 3 RN4406B MS_BS
0Ohm 4
90Ohm/100MHz 8 VDDU CTRL0 21
XDALE
I 9 20 XDDATA5
CF_V33 DATA5
1
SD_CMD
R4115 C4117 10 19
V33 CTRL2 XDRBN
330 OHM 0.1UF/16V
2
1% X7R 10% 11 18 XDDATA4
CTRL4 DATA4 SD_D3
1
I I
2
J66 GND 12 17 MS_D3
SD_D3 R4113 XDCDN DATA3 XDDATA3
SD_1 SD_DAT3 GND3 XD_1
SD_CMD SD_2 XD_2 XDCDN 0 Ohm XDCDN 13 16
SD_CMD CD XDRBN XDCEN DATA2
SD_3 SD_VSS1 R/B# XD_3 GND 5%
SD_4 XD_4 XDRDN XDCEN 14 15 XDWPN
1
SD_CLK SD_VCC RE# XDCEN NI XDCIS XDWPN
SD_5 SD_CLK CE# XD_5
SD_6 XD_6 XDCLE
SD_D0 SD_VSS2 CLE XDALE AU6433B52-GEF-GR SD_D2
SD_7 SD_DAT0 ALE XD_7 GND
SD_D1 SD_8 XD_8 XDWRN Critical MS_D2
B SD_D2 SD_DAT1 WE# XDWPN XDDATA2 B
SD_9 SD_DAT2 WP# XD_9
SD_CD1 GND1 GND4 43
SD_CD# SD_CD2 XD_10
SD_CD(DETECT) GND5 XDDATA0
SD_WP1 GND2 D0 XD_11
SD_WP SD_WP2 XD_12 XDDATA1
SD_WP(PROTECT) D1 XDDATA2
D2 XD_13
XD_14 XDDATA3 MS_INS#
D3 XDDATA4
D4 XD_15
MS_1 XD_16 XDDATA5 XDRDN
MS_BS MS_VSS1 D5 XDDATA6
MS_2 MS_BS D6 XD_17
MS_D1 MS_3 XD_18 XDDATA7
MS_D0 MS_VCC1 D7
MS_4 MS_SDIO VCC XD_19
MS_D2 MS_5 MS_CLK
MS_INS# MS_RESERVED1
MS_6 MS_INS GND6 SD_10
MS_D3 MS_7 SD_11
MS_CLK MS_RESERVED2 GND7
MS_8 MS_SCLK
MS_9 MS_VCC2 NP_NC1 44
1
MS_10 MS_VSS2 NP_NC2 45
46 C9395
NP_NC3
NP_NC4 47 2 10PF/50V
NPO 5%
CARD_READER_43P
NI
Critical
CARD_3V3_CON GND
GND GND
A A
1
I I I <Variant Name>
C273 C274 C272
4.7UF/6.3V 4.7UF/6.3V 0.1UF/16V
Title : CARD READER
2
+3P3V
VB5 Digital Region
+3P3V U13A
1
I I I I I LP6
C3601 C3603 C3602 C3604 7 RP6
10UF/16V 0.1UF/16V 10UF/16V 0.1UF/16V DVSS2 R_AMP_SPK_OUTL+ 1 R_AMP_SPK_OUTR+ 1
2
1 1
mx_c0805 X7R 10% mx_c0805 X7R 10% 24
+5VSB LINE1-R(PORT-C-R) R_AMP_SPK_OUTL- R_AMP_SPK_OUTR-
D X5R 10% X5R 10% 2 2 2 2 D
LINE1-L(PORT-C-L) 23
GND GND GND GND GND WAFER_HD_1X2P
WAFER_BOX_2P Critical
L5609
1 2 +5VS_CODEC_PVDD 39 PVDD1
46 PVDD2
180Ohm/100Mhz/2A
LINE2-R(PORT-E-R) 15 LIN2_RC I ACE8 1 2 10UF/25V R_LIN2_RC AR9 1 I 75 OHM
2 FRONT_R {45}
1
I I I I
+
I
C3605 C3607 C3606 C3608
LINE2-L(PORT-E-L) 14 LIN2_LC I ACE9 1 2 10UF/25V R_LIN2_LC AR23 1 I 75 OHM
2 FRONT_L {45}
0.1UF/16V 10UF/16V 0.1UF/16V 10UF/16V
+
42
2
mx_c0805 mx_c0805 PVSS1
X7R 10% X7R 10% 43 PVSS2
X5R 10% X5R 10%
1
I I I I
C3611 C3609 C3612 C3610 26 AVSS1 MIC1_RCI AC12
0.1UF/16V 10UF/16V 0.1UF/16V 10UF/16V 37 22 1 2 4.7UF/6.3V X5R 10% I_MIC1_R_C I AR32 1 2 1K MIC1_R {45}
2
2
AVSS2 MIC1-R(PORT-B-R)
1
1
I
C3625 C3627
180Ohm/100Mhz/2A X7R 10%
1
10UF/16V I 1000PF/50V NI
2
GND X5R 10% C3616
1UF/10V
2
I
1
I mx_c0603
L5605 C3628
X7R 10%
GND Y5V +80-20%
1
1
NI NI AGND AMP_SPK_OUTR- 1 2 1000PF/50V R_AMP_SPK_OUTR-
2
C3615 AC9
C9403 R37572 10PF/50V 10PF/50V 180Ohm/100Mhz/2A
2
2
2 1 1 2 PCBEEP NPO 5% NPO 5% 17 I
{75} SIO_BEEP MIC2-R(PORT-F-R) L5606
2
1
X7R 10% 5% R375731 GND GND I
C9404 C3631
180Ohm/100Mhz/2A
I 4.7KOHM X7R 10%
1
I C9402 100PF/50V 1000PF/50V NI
5% I
2
2
2 1 NPO 5% C3618
{24} SPKR
1
I 1UF/10V
29
2
I MIC2-VREFO
1
0.1UF/16V I mx_c0603
L5607 C3633
B X7R 10% X7R 10%
GND Y5V +80-20%
B
AMP_SPK_OUTL- 1 2 1000PF/50V R_AMP_SPK_OUTL-
2
I GND GND R37434
1 2 180Ohm/100Mhz/2A R1.01
MONO-OUT 20 I
0 Ohm
+5VSB 5% SenseA 13 I R37388 1 2 20KOHM 5% MIC1_JD {45}
NI SENSE_A I R37386 1 2 39.2KOHM 1% HPOUT_JD {45}
SenseB 18 SENSE_B I AR65 1 2 39.2KOHM 1% FRONT_JD {45}
47 EAPD
2
R375631
C3622
10KOhm
5% 36 CODEC_CBP_R 1 2
CBP
1
I PD#_CODEC CODEC_CBN_R
4 PD# CBN 35 2.2UF/6.3V
1
A 1 2 R3614 2 DMIC_DATA_269
1 02Ohm DMIC_DATA {41} A
GPIO0/DMIC-DATA
1
22PF/50V
1
X5R 10% 2.2UF/6.3V 0.1UF/16V 5%
2
22PF/50V
1
AR69 mx_c0805 X7R 10% C3925
I I C3926 <Variant Name>
1 2 X5R 10% ALC269Q-VB2-GR /EMI_I
2
Critical NPO 5% /EMI_I
Title : CODEC ALC269Q
2
0 Ohm NPO 5%
5% AGND AGND AGND AGND GND AR50
AGND I GND 1 2 Pegatron Corp. Engineer: Scott Chen
GND
PLACE NEAR front audio CODEC FOR EMI 0 Ohm GND Size Project Name Rev
GND
5%
AGND
A3 IPISB-SB 1.00
I
Date: Thursday, April 14, 2011 Sheet 43 of 73
5 4 3 2 1
5 4 3 2 1
COM HEADER
D D
+5V
C9398 U31
2 1 28 26 C9400
C1+ VCC C9401
24 C1- V+ 27 2 1 GND
C9399 1 3 2 1
0.1UF/16V C2+ V- GND
X7R 10% 2 1 2 C2- 0.1UF/16V
PROTO B_RTS1# X7R 10% 0.1UF/16V
{75} RTS1# 0.1UF/16V 14 DIN1 DOUT1 9 X7R 10%
13 10 B_TXD1 PROTO
{75} TXD1 X7R 10% DIN2 DOUT2 PROTO
C 12 11 B_DTR1# C
{75} DTR1# PROTO DIN3 DOUT3
20 4 B_RXD1
ROUT2B RIN1 B_CTS1#
{75} RXD1 19 ROUT1 RIN2 5
18 6 B_DSR1#
{75} CTS1# ROUT2 RIN3
17 7 B_DCD1#
{75} DSR1# ROUT3 RIN4
+5V 16 8
{75} DCD1# ROUT4 RIN5
15 ROUT5
INVALID# 21
22 FORCEOFF#
23 FORCEON GND 25
TRS3243ECPWR
PROTO
GND
+3P3VSB P54
B_DCD1# 1 2 B_DSR1#
B_RXD1 1 2 B_RTS1#
3 3 4 4
1
B_TXD1 5 6 B_CTS1#
B 5 6 B
I B_DTR1# 7 7 8 8 UART1_RI#
R13 9 10
8.2K 9 10
BOX_HEAD_2X5P
2
PROTO
{75} RI# PROTO
Q14 GND
PROTO
3 PMBS3904 PROTO D12
C R17
B 1 RRI2_B 1 2 RRI2_D 2 1 UART1_RI#
4.7K
1
E
1SS355PT
1
2 PROTO PROTO
C53 R22
1000PF/50V 2.2K
2
X7R 10%
2
GND GND
GND
A A
1
AR52
2
Rear Line out D8825 D8820
0 Ohm
5% FRONT_JD 1 2 FRONT_R_L 1 2
I J74
EC26 1
L4011 1 0 Ohm 2 5% I FRONT_R_L 5
{43} FRONT_R AZ2025-01H AZ2025-01H
1 2 4
3 I I
{43} FRONT_JD
D L4012 1 0 Ohm 2 5% I FRONT_L_L 2 D
0.1UF/16V {43} FRONT_L D8824
D8821
NI PHONE_JACK_5P
MIC1_JD 1 2
EC28
FRONT_L_L 1 2
Critical
1 2
2
JP4003 AZ2025-01H
0.1UF/16V I AZ2025-01H
SHORTPIN
NI I
D8822
D8819
AR51
1
1 2 HPOUT_JD 1 2
NOBOM HPOUT_R_R 1 2
0 Ohm
5% AZ2025-01H
1
I I I AZ2025-01H
AGND C4028 C4029 I
I
100PF/50V
100PF/50V
2
2
NPO 5%
NPO 5%
AGND D8818
GND
HPOUT_R_L 1 2
AGND AZ2025-01H
AGND AGND I
C
D8816 C
Critical
Front HP MIC_R_L 1 2
MIC PHONE_JACK_6P
10
9
NP_NC2
NP_NC1
AZ2025-01H
I
8 P_GND2 D8817
7 P_GND1
{43} MIC1_JD 5 5
L4009 4 MIC1_L_L 1 2
MIC_R_L 4
{43} MIC1_R 1 2 3 3
L4010 6
0 Ohm 2 MIC1_L_L 6
{43} MIC1_L 1 2 2 AZ2025-01H
5% 1 1
0 Ohm I
I J72
5% AGND
I
R37429
{43} MIC1_VREF0_L 1 2 Critical
R37430
1 4.7KOHM2 PHONE_JACK_6P
{43} MIC1_VREF0_R
5% 10 NP_NC2
4.7KOHM
I 9 NP_NC1
5% 8 P_GND2
I 7 P_GND1
{43} HPOUT_JD 5 5
B B
I 0 Ohm 4 4
{43} HPOUT_R 2 ER2 1 HPOUT_R_R 3 3
AGND I 0 Ohm 6 6
2 1 HPOUT_R_L 2
{43} HPOUT_L 2
5%ER1 1 1
1
I 5% J75
1
I C4033
100PF/50V
C4032
2
100PF/50V
NPO 5%
2
NPO 5%
AGND AGND
AGND
1
I
1
I C4031
100PF/50V
C4030
2
100PF/50V
NPO 5%
2
NPO 5%
A A
AGND
AGND
<Variant Name>
N
Critical
+3P3V +3P3VSB
U40
D R37435 D
1 2 10 VDD1 VSB 5
19 VDD2
0 Ohm 24 VDD3
5%
1
I I NI NI I NI
CB1 CB3 CB7 4 CB8 CB9
0.1UF/16V 0.1UF/16V 0.1UF/16V GND1 0.1UF/16V 10UF/10V
11
2
GND2 mx_c0805_small
X7R 10% X7R 10% 18 GND3 X7R 10%
25 GND4
GND GND
GND GND GND GND
+3P3V
{24,57,71,74} LAD3 17 LAD3 GPIO2 2
{24,57,71,74} LAD2 20 LAD2 GPIO 6
{24,57,71,74} LAD1 23 LAD1
1
{24,57,71,74} LAD0 26 LAD0
I
R1
4.7K
2
LFRAME# 22 28
{24,57,71,74} LFRAME# LFRAME# LPCPD#
C SERIRQ 27 C
{23,57,74} SERIRQ SERIRQ
CK_33M_TPM 21
{26} CK_33M_TPM LCLK
LRESET# 16
{16,24,71,72,73,74} PLTRST# LRESET#
1
NI CLKRUN# 15 CLKRUN#
CB11
1
0.1UF/16V NI
2
CB10
1
0.1UF/16V
2
I +3P3V +3P3V
R2
4.7K
GND
2
1
GND NI I
R5 R3
4.7K 4.7K
TPM_BASE_ADDR I/O SPACE
R7014 GND
2
0 Ohm
1 2 TPM_XTALI 13 9 TPM_BASE_ADDR
0 2E
{24,75} SUS_CLK XTALI/32k_IN TESTBI/BADD
I TPM_XTALO 14 XTALO TESTI 8 1 4E
NI PP 7 TPM_PP
Y10
1
32.768Khz 12
B NC3 B
NI 1 2 3 NC2 NI NI
XY10 4
GND GND
3
1 NC1
R6
4.7K
R4
4.7K
1
Crystal Holder NI NI
2
C1 C2
18PF/50V 18PF/50V
2
NPO 5% NPO 5%
SLB9635TT
GND GND GND
A A
<Variant Name>
Title : TPM
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 46 of 73
5 4 3 2 1
5 4 3 2 1
USB
+5V_DUAL
1
NI I
+USBV01 UR34 UR35
8.2K 8.2K
J70
1
D Critical I +USBV01 Critical D
2
NI 5% RN4400B
3 90Ohm/100MHz CB4105 U50
0Ohm 4 P_GND1 5
0.1UF/16V 1 8 1
2
LP0- 1 VOUT3 GND
{22} USBN0 2 2 7 VOUT2 VIN1 2
3
3 3 6 VOUT1 VIN2 3
4 4 5 FLG# EN/EN# 4
1
P_GND2 6 I +
1
{22} USBP0 L4100 LP0+ CB4100 Critical RT9711AGF
4
USB_CON_1X4P 0.1UF/16V UCE6 I
2
NI 5% 1
0Ohm 2 RN4400A Critical GND 560UF/6.3V UR33
2
Critical
U4100 GND 8.2K
2
CM1213_04SO +5VA GND
GND GND
CH1 1 6CH4
VN 2 OC01# {22,73}
5 VP
CH2 3 4 CH3
1
I
UR30
GND 15K
2
GND
+USBV01
C C
J71
3 0Ohm 4 P_GND1 5
NI 5% RN4401B 1
LP1- 1
{22} USBN1 2 2
3 3
1
Critical 4
L4102 4
P_GND2 6
90OHM/100MHz/300mA
USB_CON_1X4P
4
B B
A A
+USBV1011
USB_CON_1X4P
5
D D
Critical
P_GND2 P_GND1
NI 5% RN4402B
3 90Ohm/100MHz
0Ohm 4
1
1 1 I +3P3V +5V_DUAL
LP10- 2 CB4103
{22} USBN10 2
3
LP10+ 3 0.1UF/16V
2
3 +5V_DUAL
4 4
1
{22} USBP10 L64 NI I
4
UR36 UR37
NI 5% 1 2 RN4402A 8.2K 8.2K
0Ohm
6
J81 +USBV1011 Critical
2
Critical U51
NI 8 VOUT3 GND 1
U299 +5VA
7
6
VOUT2 VIN1 2
3
VOUT1 VIN2
GND 5 FLG# EN/EN# 4
1
3 4 I +
1
CH2 CH3
CB4101 CE4101 RT9711AGF
2 5 0.1UF/16V 470uF/6.3V I
2
VN VP
UR26
2
1 6 +USBV1011 8.2K
CH1 CH4
2
USB_CON_1X4P Critical GND
5
Critical GND CM1213_04SO GND GND
NI 5% RN4403A
1 90Ohm/100MHz
0Ohm 2
P_GND2 P_GND1
LP11- OC1011# {22,73}
{22} USBN11 1 1
1
2 2
C 3 C
3
1
4 4
{22} USBP11 L75 LP11+ I
2
UR27
NI 5% 3 4 RN4403B 15K
0Ohm
2
J82
Critical +USBV1213
GND
GND
Critical
NI 5% RN4404B
3 90Ohm/100MHz USB_CON_1X4P
0Ohm 4
5
LP12- +3P3V +5V_DUAL
P_GND2 P_GND1
{22} USBN12
4
1
1 1 I
2 CB4104 +5V_DUAL
2
1
L4101 LP12+ 3 0.1UF/16V
{22} USBP12
3
2
3
4 4 NI I
NI 5% 1 2 RN4404A UR38 UR39
0Ohm
8.2K 8.2K
+USBV1213 Critical
2
NI U52
6
J91
U27 Critical
8
7
VOUT3 GND 1
2
CM1213_04SO +5VA VOUT2 VIN1
6 VOUT1 VIN2 3
5 FLG# EN/EN# 4
1
B B
CH1 1 6CH4 GND I +
1
CB4102 CE4102 RT9711AGF
VN 2 5 VP 0.1UF/16V 470uF/6.3V I
2
UR29
2
CH2 3 4 CH3 8.2K
2
+USBV1213 Critical GND
Critical USB_CON_1X4P GND GND
5
NI 5% RN4405A
1 90Ohm/100MHz
0Ohm 2 GND
P_GND2 P_GND1
LP13- OC1213# {22,73}
{22} USBN13
1
1 1
2 2
1
3 3
{22} USBP13 L58 LP13+ 4 I
2
4 UR28
NI 5% 3 4 RN4405B 15K
0Ohm
2
6
J90
Critical
GND
GND
A A
LAYOUT NOTE:
Two Strobes : Matched within 100 mils of each other SATA CONNECTOR
D[0:15] : Matched within +/- 450 mils of two strobes
+5V
D L3604 P160 D
1 2 5V_HDD 1
2
1
P60 80Ohm/100Mhz/2A + NI 3
{23} SATA_TXP0
C459 2 1 0.01UF/25V I 1 GND1 HOLD1 8 I C328 C210 C334 4
SATA_TXP0_C
X7R 10% 2 10UF/25V 22UF/6.3V 0.1UF/16V
2
TX+
C461 2 1 0.01UF/25V I SATA_TXN0_C 3 X5R 10% X7R 10%
WAFER_HD_4P
2
{23} SATA_TXN0 TX- +12V
X7R 10% 4 GND2 I I Critical
{23} SATA_RXN0
C463 2 1 0.01UF/25V I SATA_RXN0_C 5 RX- GND GND
SATA_RXP0_C L297
X7R 10% 6 RX+ GND
{23} SATA_RXP0
C465 2 1 0.01UF/25V I 7 GND3 HOLD2 9 1 2 12V_HDD
X7R 10%
1
SATA_CON_7P 80Ohm/100Mhz/2A +
Critical I CE102 C339 C348
GND 100uF/16V 0.1UF/16V 0.1UF/16V
2
I X7R 10% X7R 10%
2
I I
GND GND GND
GND
C C
B B
2
R3759013
4.7KOHM
5%
1
I
+5V
P161
L3605 1
1 2 SATA_CON3_5V 2
3 HF
1
80Ohm/100Mhz/2A 4
C214 C359
I WAFER_BOX_4P
22UF/6.3V 0.1UF/16V
2
A A
<Variant Name>
+12V
+3P3V
+3P3V +3P3V Critical
D P8 D
3
I 1 1
1
I FD1
2 2
1
I FR1 BAT54CW 3 3
FR4 4.7K 4
4
4.7K NC 5
1
WAFER_HD_4P
2
1
FR2 I +
{74} SYSFAN_PWM 2 1 I CPUFAN_PWM_C FCE1
100uF/16V
150
2
FD3
I 1 CPUFAN_TACH_C
{74} SYSFAN_TACH 3
2
BAW56WPT GND GND
1
NI NI
2 1 NI FCB2 FCB1
0.1UF/16V 0.1UF/16V
2
0 FR17
GND GND
C C
+12V
+3P3V
+3P3V +3P3V Critical
P9
3
I 1 1
1
I FD2
2 2
1
I FR3 BAT54CW 3 3
FR6 4.7K 4
4
4.7K NC 5
2
1
WAFER_HD_4P
2
1
FR8 I +
{74} SYSFAN_PWM_2 2 1 I SYSFAN_PWM_C FCE2
100uF/16V
B 150 B
2
FD4
I 1 SYSFAN_TACH_C
{74} SYSFAN_TACH_2 3
2
BAW56WPT GND GND
1
NI NI
2 1 NI FCB4 FCB3
0.1UF/16V 0.1UF/16V
2
0 FR18
GND GND
A A
<Variant Name>
SM BUS Control
D D
C C
1
7 8
PROTO I I
IR1 IR2
8.2K 8.2K
B B
MP(I) GND mx_r0402_small mx_r0402_small
2
IR6
0 U19
1 2 R_SPI_CS# 1 8
{21} SPI_CS# CS# VCC
mx_r0402_small 2 7 SPI_HOLD#
{21} SPI_MISO SPI_WP# DO(IO1) HOLD#(IO3)
3 WP#(IO2) CLK 6
4 GND DI(IO0) 5
1
I
W25Q64BVSSIG IC2
Critical 0.1UF/16V
2
GND X7R 10%
mx_c0402
{21} SPI_MOSI
{21} SPI_CLK
GND
A A
+19VA_VIN
+19VA_VIN_L
L32
1 2
J103
S1 P_GND 150Ohm/100Mhz/5A
S2 P_GND I L23
S3 P_GND 1 (+)SPRING 1 2
D D
P1 NP_NC1 2 (-)SPRING 150Ohm/100Mhz/5A
P2 NP_NC2 I
P3 NP_NC3 S4 SIGNAL
AD_ID_A {55,76}
L24
2
DC_POWER_JACK_2P 1 2
PR345
0 Ohm 150Ohm/100Mhz/5A
I 5% I
1
1
NI
1
PC1
PC18 0.1UF/50V
2
0.1UF/50V NI
2
GND X7R 10%
GND I
NOBOM ST33 1 GND
TPC26b GND
NOBOM ST34 1
TPC26b
NOBOM ST35 1
TPC26b
C C
B B
A A
<Variant Name>
PEGATRON DT-MB RESTRICTED SECRET
Title : 19V IN
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 52 of 73
5 4 3 2 1
5 4 3 2 1
+19VSB
+19VSB +19VSB
NI Iin=1.63A
PR418 0 +3V_+5V_IN
Trace Width>65mil
1
1 2 LPS_PHY {75}
PR307 Irms=2.52A@TDC PL15
{55} 3/5VSB PWM_EN_A 75KOHM 1 2
2
1%
PC3 PQ46 1UH
+3P3VSB_EN {75}
2
I
1
0.01UF/25V BSC889N03LS Irat=18A NI
1
+VREG5 PR308 X7R 10% + + Critical PC17 +3P3VFB_A
GND 1 2 +19VSB PCE35 PCE38 PC67 0.1UF/50V
NI
2
5 D
6
7
8
27UF/25V 27UF/25V 10UF/25V X7R 10%
2
D 16KOHM GND Critical Critical mx_c1206 D
2
1% I Criticial I
1
I 10UF/25V X5R 10%
S
I U12A X5R 10%
G
PR309 I PC303 0.47UF/16V GND PJP904
8.2KOhm GND 2 1 12 23 1 2 mx_c1206 GND SHORTPIN
4
3
2
1
EN VIN GND GND GND
mx_c0603 PC320 +3V_HG_R_D +3P3VSB NOBOM
2
PC25 PR262
Imax=9.43A
2
1
2 1 4 1 +3V_HG_D 1 2
EN1 DRVH1
+3V_PG_A 5 32 +3V_PHASE_C
mx_r1206
0 Ohm 5%
I
PR3338
TDC=6.601A
470PF/50V PGOOD1 SW1
VP X7R 10% +3V_BST_C
I PR5 8.2K Trace Width>380mil +3P3VSB
31 1 2+3V_BST1_C
2
PR336 0 I PR310 NI 69.8KOHM 1% VBST1 mx_r1206_h26 PL2
+3P3VFB_A 1 2+3P3VFB_R_A 1 2 +3V_VFB_A 9 30 +3V_LG_D 2.2Ohm +3V_PHASE_S 1 2
VFB1 DRVL1 I
0.05
I PR311 30KOHM 10KOhm 1% I PC311 3.0UH
1
GND 2 1% 1 PR312 1 2+3V_COMP_A 10 0.1UF/16V Irat=14A
COMP1
1
I mx_c0603 PC71 + Critical
1
1
I PC310 1500PF/50V 1000PF/50V
560UF/6.3V
1 2 Critical
2
5
PCE3
PC19 +VREF2 1 2 VP PC313 X7R 10% PC70
1
0.1UF/16V PR328 0 Ohm X7R PQ45 680PF/50V I 10UF/6.3V
2
2
5 D
6
7
8
X7R 10% NI PR313 10KOhm NI PC315 100PF/50V X7R 10% 7 +3V_CSP_C 1 2 +3V_CSPR_C NTMFS4839NHT1G mx_c0603 PJP903 PJP900 mx_c0805_small
CSP1
1
I 2 1 PC57S19_22 1 Critical X7R 10% +3V_SN_S SHORTPIN SHORTPIN 10%
X5R
VP PR314 0 Ohm +3V_SKP_A
6 SKIPSEL1 PC323 PR305 I NOBOM NOBOM I
1
2 1 8 I PR329 0 Ohm
S
+VREG3 CSN1
X7R 10%
G
9.53KOHM I
0.1UF/16V
GND 5% GND GND
2
Place near U12 NI PR315 0 Ohm 1% GND PR306
4
3
2
1
I I 1
GND 2 1
C +VREF2 mx_r0805 mx_r1206 C
2
I PC316 0.22UF/10V +3V_CSN_C +3V_CSP_RL_C
1
GND 2 1 13 VREF2
+VREG3 +VREG5 PD301 PR906
I PC317 2.2UF/6.3V 1 GND 9.53KOHM
GND 2 1 22 VREG3 VREG5 29 3 1%
+5VSW I 2 GND
2
I
1
VP PR316 0 Ohm PC325
+5VFB_A 2 1 2 10UF/6.3V BAT54AW
I PR317 332KOHM V5SW NI
PC4 X5R 10%
2
GND 2 1 RF_A 3 +3V_+5V_IN
RF
GND 1 2
0.01UF/25V GND
+19VSB
1
PC32 PQ59
1
X7R 10% PR304 BSC889N03LS
2 1 Iin=3.27A + +
1
I +5VSB_EN
{53,75} 21 EN2 DRVH2 24 +5VO_HG_D 0 Ohm I PCE36 PCE37 +5VFB_A
470PF/50V 5% Trace PC301 27UF/25V 27UF/25V
5 D
6
7
8
+VREG5 1 2 +5V_PG_A 20 27 +5VO_LG_D 10UF/25V Critical NI
2
X7R 10% PGOOD2 DRVL2 I
I PR319 8.2KOhm Width>130mil mx_c1206
1
VP NI 97.6KOHM 25 +5VO_PHASE_C mx_r0805 Criticial X5R 10%
SW2
PR340 0 1% PR339 I PR6 Irms=3.87A@TDC PJP905
S
G
+5VFB_A 1 2 +5VFB_R_A1 2 +5VO_VFB_A 16 26 +5VO_BST_C 1 2 SHORTPIN
VFB2 VBST2 mx_r1206_h26 GND GND GND
+5VSB NOBOM
4
3
2
1
I 1% PR321 24KOHM I PR332 10KOhm 1% 2.2Ohm
GND 1 2 2 1 +5VO_COMP_A 15 0.05 Imax=12.41A
2
COMP2 PR280
I
1
PC34
I PC318
2 1
2200PF/50V VP
PR338 0 Ohm
1 2
mx_r1206
+5V0_HG_R_D
TDC=8.687A +5VSB
B +VREF2 B
0.1UF/16V 19 18 +5VO_CSP_A1 2+5VO_CSPR_A 0 Ohm 5% Trace Width>500mil
2
SKIPSEL2 CSP2
1
X7R 10% NI PR323 10KOhm NI PC319 220PF/50V X7R 10% +5V_BST1_C
I
I 2 1 PC319_2 2 1 PC326 I PL1
1
2
17 I PR301 +5VO_PHASE_S 1 2
CSN2
1
VP PR324 0 Ohm PC304 8.2K
0.1UF/16V
1
Place near U12 9.53KOHM I I Irat=14A + Critical
1
I PR326 0 Ohm PC306
560UF/6.3V
1% X7R 10%
PCE2
NI PR341 0 Ohm GND 2 1 FUNC_A 11 28 +5VO_CSN_C 680PF/50V PC74 Critical PC68
2
FUNC GND I
1
GND 2 1 mx_c0603 mx_c0603 1000PF/50V 10UF/6.3V
2
NI PR333 0 Ohm X7R 10% X7R 10% PJP902 PJP901 mx_c0805_small
GND 2 1 14 33 I SHORTPIN SHORTPIN X5R 10%
TRIP GND_1
5
R1.02 change PR320 from 120K to GND NOBOM NOBOM I
5
PQ48 +5V0_SN_S
124K to tune up +5VSB up 130mv.
5 D
6
7
8
NI PR334 0 Ohm PQ47 NTMFS4839NHT1G I GND GND
2
1
5 D
6
7
8
+3P3VSB +VREG3 2 1 TPS51220RHBR GND NTMFS4839NHT1G NI 5%
Critical Critical 1 Ohm
U12B
S
1
NI PR303
G
I PR342 0 Ohm 34 41 +5VO_CSP_RL_C
S
GND_2 GND_9
1
G
PR294 +VREG5 2 1 TRIP 35 40 mx_r0805
4
3
2
1
2
+3P3VSB 10K GND_3 GND_8 PR913
36 39
4
3
2
1
1% GND_4 GND_7
37 GND_5 GND_6 38 9.53KOHM
I
2
TPS51220RHBR
2
1
1%
NI +5VSB_EN {53,75} Critical GND
PR293
R7247
A
PQ86 A
2
2N7002
1 0
G PR279 only support
3 NI 2 S NI 1 2
D +VREG3 +3P3VA 10mA continue
1
PQ87 mx_r1206
2N7002 0 Ohm 5%
{24,57,74} SLP_S5#
1
SLP_S4# {24,54,57,58,74}
I Title : +5VSB and +3P3VSB
G
2 S PR278 Engineer: Jammes Li
PEGATRON CORP.
+VREG5 1 2 +5VA only support
mx_r1206 Size Project Name Rev
{75} 5V_USB_MAIN# 100mA continue
0 Ohm 5%
I
A3 IPP7A-MM 1.02
Date: Thursday, April 14, 2011 Sheet 53 of 48
5 4 3 2 1
5 4 3 2 1
PR419
+1.5V_DUAL_S3 2 1 +3P3V
+19VSB
3
D 10K PL5
PQ78 NI +5VSB +1.5V_DUAL_VIN
Irms=3.6A@Imax 1 2
1 PU5
{60,62} PWRGD_30MS# G 2N7002 1UH
2 S NI 1UF/16V 2 1PC543 +1.5V_DUAL_V5IN 12 Irat=18A
GND V5IN
1
X7R 10% I I R37543 Critical NI
15 +1.5V_DUAL_BST 1 2+1.5V_DUAL_BST_RC C9349
GND VBST 0 Ohm 0.1UF/50V
2
1
1
D I R37544 5% I + + X7R 10% D
1
{60,62,75} PWRGD_30MS 1 2 PQ58 PQ60 PC204 PCE9 PCE10
0 Ohm BSC889N03LS BSC889N03LS 10UF/25V 33UF/25V 33UF/25V
5
R37555 5% X5R 10% 0.2 0.2
2
{24,57,60,74} SLP_S3# 1 2 +1.5V_DUAL_S3 17 GND
S3 Critical Critical
5 D
6
7
8
5 D
6
7
8
PC544 1 2 0.1UF/25V
100KOHM I X7R 10% mx_c0603_small
GND 1%1UF/16V 2 1PC558 NI Criticial
NI X7R 10% NI GND GND GND
S
G
G
R37556
{24,53,57,58,74} SLP_S4# 1 2 +1.5V_DUAL_S5 16
4
3
2
1
4
3
2
1
S5
100KOHM I R37545
1UF/16V 21% 1PC559 +1.5V_DUAL_HG 2+1.5V_DUAL_HG_IN
GND
X7R 10% I I DRVH 14 1
0 Ohm
+1.5V_DUAL
1
5% Imax = 13.3+1+0.5=14.8A +1P5V_DUAL
R37558 PR627
GND 1 2 +1.5V_DUAL_MODE 19 MODE
PJP509 8.2KOHM TDC=A
SHORTPIN
100KOHM NOBOM
5%
PPL6 Efficiency >80%,>70% at idle
2
+1.5V_DUAL_PHASE I
+1.5V_DUAL_PHASE_C
1% Fsw~300kHz SW 13 2 1 1 2
I
1UH
2
Critical
R516
1
1 PC542 + +
VP
1
1206 10UF/6.3V PCE5 PCE6
PR288 PQ56 PQ55 820UF/2.5V 820UF/2.5V
X5R 10%
1
5 D
6
7
8
5 D
6
7
8
{60} +1P5V_DUAL_PG 1 2 20 NTMFS4839NHT1G NTMFS4839NHT1G NI Critical
2
PGOOD I
+1.5V_DUAL_SUR
C C
+3P3VSB Critical NI
0 I
1
S
S
G
G
PR998 1 2 100KOHM PC539
NI 1% 680PF/50V
4
3
2
1
4
3
2
1
2
mx_c0603_small GND GND GND
1
I X7R 10%
PC540 NI
1000PF/50V
2
11 +1.5V_DUAL_LG GND GND
DRVL
OCP~23A 10
GND GND
PGND
GND R37557 1 2 154KOHM +1.5V_DUAL_TRIP
18
I 1% TRIP PJP508
GND SHORTPIN
GND PC557 2 1 0.1UF/16V NOBOM
I X7R 10% 9 +1.5V_DUAL_SNS PR135 1 2 0 Ohm 2 1
VDDQSNS VP 5%
+1.5V_DUAL_VREF
6 VREF
VLDOIN 2
10KOhm PR540
2 1 +1.5V_DUAL_REFIN
8
1% I REFIN
B B
PC538 2 1 8200PF/16V
Imax=1A
NI X7R 10%
VTT 3 +VTT_DDR
1
10UF/6.3V 10UF/6.3V
7
+1P5V GND
21
GND1 X5R 10% X5R 10%
2
GND2 I NI
22
Imax:=0.5A 23
GND3
GND4
VTTGND 4
+1P5V +1P5V_DUAL
+12V
IRF8707PBF
2
1 S D 8 GND
PR318 2 7 5 +VTTREF
VTTREF
18KOHM 3 6
1% 4 G 5
1
I
1
Critical PQ64
A
PC95 C9393 A
1
10UF/6.3V 0.22UF/10V
2
PC240 TPS51216RUKR
2
I I
1
10UF/25V I
X5R 10% PC44 Critical
2
0.1UF/16V
2
PQ1
R3756611 PMBS3906
62 Ohm
C
I
2
E
3
5% I
B 1
PQ2
R3756711 PMBS3906
62 Ohm
C
I
2
E
3
5% I
B 1
D D
CR61
1 + 2
+19VA_VIN_L
1
GREEN
Q2611
I R3757111 +19VSB
1 8 6.8KOHM
2 7 1%
2
R3756311 R3756411 I
3 6
2.2Ohm
G
100KOHM 4 5
C939811 0.05 C940011 1%
1UF/50V
I
4700PF/50V TPC8107 I 3
D
1
I
0.1 X7R 10% R3756811 I
1MOhm PQ3911
I I 1
C939911 +19VA_VIN_L_G 2N7002
1UF/50V G
0.1 5% 2 S
I I C940211
1000PF/50V
X7R 10%
PQ3
GND
PMBS3906 I
C
I
2
E
3
GND
2
B 1
R3756511
C
R37573 R3756911 C
100KOHM
1% 3/5VSB PWM_EN_A {53}
1
I
100KOhm 2KOHM
1% 5% 3
D
1
D1511 NI I I
1SS355PT PR2 PQ3912
I C940311 1 2 1 2N7002
0.1UF/25V G
X7R 10% 1MOhm 2 S
2
+19VA_VIN_L
I 5%
PU311 I
2
GND 4 5 C940212 PR7
R3757211 VEE +IN2 AD_ID_A {52,55,76}
1
GND 3 6 1000PF/50V 499KOhmGND
{52,55,76} AD_ID_A +IN1 -IN2 PU3 IN- {76}
2 1 2 7 R3757011 X7R 10% I
-IN1 OUT2 PU3 OUT {76}
1 8 3.3KOHM NI
1
OUT1 VCC
100KOHM 1%
2
1% LM393 I
I I GND GND
C940511
0.01UF/25V
X7R 10%
I
B B
GND
A A
1
I 2 I
PC42 PC46
1
I 0.1UF/16V BAT54AW 0.1UF/16V
2
1
PR63 PC22 X7R 10% NI X7R 10%
200K 1UF/25V Critical +12V
1% PQ16 2D GND +5V 2D +3P3V
2
X5R 10% SI4835DDY-T1-GE3 GND
2
I 1 8 Critical Imax=3.62A Critical Imax=TBDA
1
2 7 I 1 PQ40 1 PQ17
3 6 +19V PR74 G 9mOhm/10V TO-252 +5V G 9mOhm/10V TO-252
S S
+19V_HB_C 4 5 10K 3 3 +3P3V
G D
1%
2
1
I PR75
+3P3VSB PR64 +5V/3V_EN
75K +5V/3V_EN 1 2
1
1%
1
PR59 NI
2
10K
2
I 10KOhm I PC97 NI
2
PR60 3 PC24 10UF/6.3V 1% PC43
1% D
1
100K PQ201D_A 1UF/16V X5R 10% I I 10UF/6.3V
I
1
R3759014 I X7R 10% mx_c0805_small PC33 X5R 10%
2
1
3 1 2 1 PQ37 mx_c0603_small 0.1UF/16V mx_c0805_small
D {56,57,59,74} PS_ON#
2
C I G 2N7002 X7R 10% C
PQ33 0 Ohm 2 S
PS_ON#1_A 1 2N7002 GND 5%
G +3P3VSB NI GND GND
3 2 S GND
D
GND
I
1
2
{56,57,59,74} PS_ON#
1 PQ22 I GND
G 2N7002 PC26 R3759016
2 S 0.1UF/16V GND 10KOhm
2
1
X7R 10% 5%
1
C140
1
I R3759015
470PF/50V
2
2
I
3
D
I
1 PQ39
{75} 12V_PG_25MS
G 2N7002
2 S
+3P3V
+5V
+3P3V ==> +1P8V +3P3V
Imax=1.6A
1
B B
I GND
PR266
8.2KOHM I
1
1% I PC64
1
PC224 0.1UF/16V
2
2
X7R 10% VP
2
PR364 2D
PU20 0 Ohm
+1P1V_EN_A 1 6 GND PQ54 GND
EN VCC +1P1V_DRI_C25% +1P1V_DRI_R_C 1
2 GND DRV 5 1
3 4 G 9mOhm/10V TO-252
FB SS S
1
NI +1P1V_SS_A I 3
Critical +1P8V_SFR
1
X7R 10% NI
2
I
1
I
GND GND PC62 2 1 470PF/50V GND PC12
1
I I I
2
PR76 PR77
A
1KOhm PR43 VP A
2 1% 1 1 2 +1P1V_FB2_A 2 1+1P1V_FB3_A
GND GND
1.27KOHM 0 Ohm
mx_r0603
1%
I
PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
GND PC13
2
1000PF/50V
1
Title : +19V,+5V,+3P3V
I Pegatron Corp. Engineer: Scott Chen
X7R 10% Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 56 of 73
5 4 3 2 1
5 4 3 2 1
+3P3V
+3P3VSB +3P3VSB
1
R4823 R4822 PROTO
200 OHM 200 OHM R25
5% 5% 300
PROTO PROTO mx_r0603_small
2
PMBS3906 PROTO
2 PMBS3906 PROTO 2
R8833 R8832
D
E E HIERR#_G D
{24,61} SLP_LAN# 2 1 B 1 {24,31,75} SLP_SUS# 2 1 B 1
PROTO
C C
4.7KOHM Q9350 3 4.7KOHM Q9349 3
R38
5% 5% 4.7K 3
1
PROTO PROTO mx_r0402_small C
1 B PROTO PROTO
+
{13} CATERR# 1 2
Q4
CR9
1
E PMBS3904
CR10 CR8 2 RED
+
GREEN GREEN SMD
2
PROTO PROTO
2
GND GND
GND GND
+3P3VSB +3P3VSB
C C
1
{23} Boot_BLK_rec# +3P3VSB CR24 CR25
+
+3P3VSB GREEN GREEN
1
PROTO PROTO
1
R37432
1
E15:12 100 Ohm R4819
2
5% 200 OHM R4818
5% 200 OHM
2
PROTO PROTO
5%
2
PROTO
1
MINI_JUMPER_BLUE E15 PMBS3906 PROTO 2
R8831
2
1
E PMBS3906 PROTO 2 R4820 R4821
R8830 E
PROTO 2 {24,30,60,61} SLP_A# 2 1 B 1 200 OHM 200 OHM
C {24,53,74} SLP_S5# 2 1 5% 5%
HEADER_1X2P B 1
2
Critical 4.7KOHM Q9348 3 C
3 PROTO PROTO
5% 4.7KOHM Q9347 3 D
GND
PROTO 5% PROTO
PROTO 1 Q9308
{24,75} PWROK 3
G 2N7002 D
2 S
1
+3P3V
1
CR7 PROTO
+
CR6 1 Q9309
+
GREEN {24,64,72} VRM_PWRGD
PROTO GREEN G 2N7002
2 S
PROTO
1
2
R37433
2
4.7KOHM
B +3P3V B
5% +3P3VSB
GND GND
2
PROTO +3P3VSB
GND
1
E17 GND
1 2 R4815 R4816
SERIRQ {23,46,74}
{24,46,71,74} LFRAME# 3 4 LAD1 {24,46,71,74} 200 OHM 200 OHM
5 6 +3P3VSB +3P3VSB
{24,46,71,74} LAD3 5% PROTO 5%
8 LAD2 {24,46,71,74}
2
PROTO PMBS3906 PROTO
2
{24,46,71,74} LAD0 9 10 LPC_SMI# {23,74} R8827
1
1
11 12 PMBS3906 2 PROTO E
{75} HP_DEBUG_RST# HP_DEBUG_CLK {26} R8829
R4814 E
2 1 R4817
{56,59,74} PS_ON#
HEADER_2X6P_K7 200 OHM 2 1
B 1
200 OHM
{24,53,54,58,74} SLP_S4# C
PROTO 5%
B 1
5%
PROTO C 4.7KOHM Q9343 3
2
2
PMBS3906 2 PROTO 4.7KOHM Q9345 3 5% PROTO
R8828 5%
E PROTO
GND 2 1 PROTO
{24,54,60,74} SLP_S3#
1
B 1
C
CR5 CR23
+
4.7KOHM Q9344
1
3
GREEN GREEN
5% CR3
+
PROTO PROTO
PROTO GREEN
PROTO
2
1
2
CR4
+
GREEN
A PROTO GND A
GND
2
5 4 3 2 1
5 4 3 2 1
+5VSB +5V_DUAL
R37562
1 2
0 Ohm
5%
NI
R37561
D 1 2 D
0 Ohm
5%
NI
+19VSB
IRF8707PBF
8 D S 1
7 2
6 3
1
I 5 G 4
PR91 PC45 I
1
+19VSB
71.5KOHM 0.1UF/16V PQ79 Critical
2
1% X7R 10% PC104
1UF/16V
2
I GND X7R 10%
2
PR88
2
120KOHM I
1
3 PR90 GND
1% D
120KOHM PC103
1
I
I 1% 1UF/25V Imax=350mA
2
1 PQ80 X5R 10% Critical
1
G 2N7002 I +3P3VSB PQ11 +3P3V_DUAL
I 2 S FDN340P_NL
PR116 3 0.11ohm @2.5V
1K C I
1
C 1 2 1 B PQ81 GND C
3 D
{24,53,54,57,74} SLP_S4#
PMBS3904 PR89
2
GND
E 71.5KOHM
G
2
1
1% GND
1
1
NI I
2
I
1
PC80 I I PC48
0.1UF/16V PC47 PR51 1UF/16V
2
2
GND X7R 10%
2
GND +5V_DUAL
GND
1
I
I PR50
PR111 10KOhm
10K
2
+3P3V_MINI_PCIE I
3 PQ6405
D
Imax=1.5A 2N7002 I
1
PC49
1 1000PF/50V
G X7R 10%
2
B S 2 B
GND GND
A A
PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
Title : +5V_DUAL,+3P3V_DUAL
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 58 of 73
5 4 3 2 1
5 4 3 2 1
I
PC336 +12V
PR261
0.1UF/16V
X7R 10% PL11
+19V ==> +12V
12V_BOOT_R_C2 12V_PHASE_S
1
0 Ohm
2 1 1
3.0UH
2
Imax=1.72A
2
+19VSB
5%
I PD302 PD303
Irat=14A
I I NI TDC=1.2A
1
mx_r1206 SX34 SX34 Critical PC338 PC339 PC340
Critical Critical 22UF/16V 22UF/16V 22UF/16V PJP20
D 0.2 0.2 0.2 D
SHORTPIN
2
1
PU1 I NOBOM
12V_BOOT_C1 8 PR196
I PL12 1 BOOT PH
2 80Ohm/100Mhz/4A 12V_IN_S 2 7 GND GND GND 1 Ohm
2
VIN GND 12V_COMP_A
3 EN COMP 6 5%
4 5 GND GND GND
2
SS VSENSE
1
+ I I TPS54331DR 12V_FB_PJP_A
1
PCE39 PC342 PC343 12V_SS_A
1
10UF/25V
27UF/25V 10UF/25V Critical PC14
1
NI X5R 10% X5R 10% 1000PF/50V I PR6115
2
1
PC11 X7R 10% PC178 0 Ohm
0.01UF/25V PC15 1000PF/50V VP
2
I
1
+19V
X7R 10% 47PF/50V
2
PR4 mx_r0603
I NPO 5%
I 30KOHM I
1
2
I
2
64.9KOHM I GND GND PR337
PR137 10KOhm
1%
2
GND
1
+12V_DEM_A
12V_FB_A
C C
1
PC88
2
PR113 0.01UF/25V
10KOhm X7R 10% PR3
2
5% NI 715 OHM
1%
2
1
3 I
GND D
GND Q27
{56,57,74} PS_ON#
1
2N7002 +3P3V
GND +1P05V_CPUIO ==> +0P925V
G
2 S I Imax=8.8A +1P05V_CPUIO
+5V
GND
1
NI
PR281
8.2KOHM I
1
1% I PC79
1
PC228 0.1UF/16V
2
0.1UF/16V X7R 10%
2
1 2 X7R 10% VP
2
{62} VCCIO_PWRGD 0 PR167 VP PR376 2D
B PU21 0 Ohm B
+5VSB +VCCSA_EN_A 1 6 GND PQ63 GND
EN VCC +VCCSA_C 25% +VCCSA_R_C 1
2 GND DRV 5 1
3 4 G IPDH6N03LAG
FB SS S
1
NI +VCCSA_SS_A NI 3 Critical +0P925V_SA
1
1
VCCSA_VID_REF_D1_A PC174 APL5611CI-TRG PR282 PR36
1
2
10K PR283 X7R 10%
2
3 NI
D 10.5KOHM I
1%
2
1
PQ41 PC77 NI
1
1 I PC28
GND GND 2 1 GND
1
2N7002
+VCCSA_FB1_A
G 0.022UF/16V +
2
VCCSA_VID#_A 2 S I NI PJP307 PC229 PC227 PCE34
120PF/50V X7R 10%
1
2
0.1UF/16V NPO 5%
NO BOM X5R 10% X5R 10% NI
2
NI 1 2 10KVCCSA_VID_Base_A X7R 10% I
2
PR285 3 I mx_c0603_small I I I
2
1
+1P05V_ME_VIN
+19VSB
Irms=1.99A@Imax
I R37552 PL13
{24,30,57,61} SLP_A# PR206 1 2 100KOHM +1.05V_ME_EN_A 3 10 +1.05V_ME_VBST 1 2+1.05V_ME_VBST_RC 1 2
I 1% EN VBST 0 Ohm
5% 1UH
1
D I + Irat=18A D
1
PQ51 PC205 PCE31 Critical I
2
BSC889N03LS 10UF/25V 33UF/25V C9363
5
GND PC106 2 1 1000PF/50V PC580 X5R 10% 0.2 0.1UF/50V
2
I X7R 10% 0.1UF/25V X7R 10%
1
I
5 D
6
7
8
X7R 10%
I R37560 I Criticial
9 +1.05V_ME_HG 1 2 +1.05V_ME_HG_IN mx_c0603_small GND GND GND
S
DRVH
G
0 Ohm
5% +1P05V_ME,Imax=2.5+6.2=8.7A
4
3
2
1
+1P05V_PCH,Imax=6.2A
PR630 Efficiency >80%,>70% at idle
2 1
PJP514 +1P05V_ME
+5VSB SHORTPIN
NOBOM 8.2KOHM PL7
8 +1.05V_ME_PHASE 2 1 5%
+1.05V_ME_PHASE_C 1 2
SW I
7 V5IN 1UH
2
Irat=18A
GND PC579 2 1 10UF/25V R520 Critical
1
I X5R 10% 1 PC545 + +
1
1206 10UF/6.3V PCE8 PCE33
PQ62 X5R 10% 820UF/2.5V 820UF/2.5V
1
5 D
6
7
8
NTMFS4839NHT1G Critical NI
2
+3P3VSB I
C C
+1.05V_ME_SUR
Critical
I
1
S
G
PR204 1 2 100KOHM 1 PC571
NI 1% PGOOD 680PF/50V
4
3
2
1
2
1
NI I mx_c0603_small GND GND GND
PR195 PC577 X7R 10%
{23,30} APWROK 1 2 1000PF/50V NI
2
0 Ohm
GND PR203 1 2 100KOHM +1.05V_ME_TST 5 6 +1.05V_ME_LG
I 1% TST DRVL
GND
GND GND
PJP513
SHORTPIN
Vref=0.704V NOBOM
4 +1.05V_ME_FB_A PR554 1 2 4.99KOhm PR138 1 2 0 Ohm +1.05V_ME_FB_RC_A 2 1
VFB I 1% VP 5%
OCP~15.6A PC576 2 1 56PF/50V PC578 1 2 0.1UF/25V GND
GND PR205 1 2 110KOHM +1.05V_ME_TRIP 2 NI NPO 5% I X7R 10%
I 1% TRIP
B B
{54,62} PWRGD_30MS# PR555 1 2 10.2KOHM GND
I 1%
+5VSB
1
I
PR296
10K 3
1%
D
I
+1P05V_PCH
2
1 PQ95
6.2A
G 2N7002 +1P05V_ME
I 3 I 2 S 11
D GND GND
1
PR119 PC249 12
GND1
1KOhm I 0.1UF/16V
GND2 13
1 5% 2 1 PQ97 X7R 10%
{54,62,75} PWRGD_30MS
2
1
TPS51211DSCR +12V BSC883N03LS I
PC52
5 D
6
7
8
Critical Critical 0.1UF/16V
2
X7R 10%
Id=98A/Pd=57W
GND
1 I GND
S
G
+5VSB PR109
10K +1P05V_PCH
4
3
2
1
1
PD10 NI 1%
{54} +1P5V_DUAL_PG 1 PR295
2
3 10K 3
D
2 1% Title
A NI +1P05V_PCH_EN <Title> A
2
BAT54AW 1 PQ98
NI NI G 2N7002 Size Document Number Rev
2 S
1
2
1K C NI PC172 PC223
1 2 1 B PQ99 2.2UF/16V 10UF/6.3V Date: Thursday, April 14, 2011 Sheet 60 of 1
{24,54,57,74} SLP_S3#
2
1
E mx_c0805
2 I
5 4 3 2 1
+19VSB
5VREF_SUS
+5VA
1
NI PR417 0 Ohm
PR100 2 1
+19VSB
71.5KOHM
D 3 D
1% D
2
I
I
1 PQ94
1
G 2N7002
PR99 2 S
1
120KOHM
3 PR101
1% D
120KOHM
2
I
I 1%
+3P3VSB 1 PQ92
2
G 2N7002 I
I 2 S
1
PR118 3
1K C I C941014
1
1 2 1 B PQ93 0.1UF/25V
2
PMBS3904 PR96 GND X7R 10%
E 71.5KOHM
2 I
1% GND
1
NI GND
2
PC82 I
0.1UF/16V
2
X7R 10% GND
GND
GND
C C
+3P3VSB
+3P3V_LAN +3P3V_ME
Imax=100mA Imax=1.6A
+3P3VA
1
NI +3P3V_LAN +3P3VSB
C9397 PC54
1
1000PF/50V 0.1UF/16V
2
I X7R 10% X7R 10%
PR107 2
NI S
I NI NI
1
8.2K GND
NI PR416 0 Ohm FDN340P_NL PR98 PR97
2
2 1 3P3V_LAN_PMOS_A 1 PQ21 0 0
{75} LPS_PHY#
I G
mx_r0805_small
mx_r0805_small
I PR108 3 3 D
2
PR81 1K C I NI
1
1 +3P3V_ME_LAN_EN_A
2 1 1 B
2 PQ18_BASE_EN_A PQ18 PC57
{24,57} SLP_LAN#
PMBS3904 0.1UF/16V
8.2K E X7R 10%
2
2
NI
1
PC50
4.7UF/6.3V GND GND
X5R 10%
2
B mx_c0603_small B
GND
+3P3VSB +3P3VSB
+3P3V_ME
1
I C9396
PR110 1000PF/50V
2
8.2K 2
X7R 10% S
Critical
PR112
2
NI FDN340P_NL
1 2 1 PQ38
G
3 D
8.2K
1
I 3
PR82 C I I C941013
1 2 1 B PQ96 0.1UF/16V
{24,30,57,60} SLP_A#
2
PMBS3904 X7R 10%
8.2K E
I
I 2
1
A
PC109 GND A
1UF/16V
2
X7R 10% GND
<Variant Name>
+3P3V
PU7
1
NI
PR414 +19VSB
D 10K +1P05V_CPUIO_VIN D
Irms=3.89A@Imax
2
I PR1 I R37551 PL16
{54,60,75} PWRGD_30MS 1 2 +1.05V_CPUIO_EN_A 3 10 +1.05V_CPUIO_VBST
1 2 +1.05V_CPUIO_VBST_RC 1 2
0 Ohm EN VBST 0 Ohm
5% 5% 1UH
1
I + + Irat=18A
1
3 PQ68 PC189 PCE7 PCE1 Critical NI
D
2
BSC889N03LS 10UF/25V 27UF/25V 27UF/25V C9362
5
PQ50 PC575 X5R 10% Critical Critical 0.1UF/50V
2
1 0.1UF/25V EL/Lf_T=2000hrs_105c/+/-20% X7R 10%
1
{54,60} PWRGD_30MS# 2N7002
5 D
6
7
8
G X7R 10%
2 S NI
I
1
I R37559 Criticial
PC21 9 +1.05V_CPUIO_HG1 2 +1.05V_CPUIO_HG_IN mx_c0603_small GND GND GND GND
S
DRVH
G
0.1UF/16V 0 Ohm
2
X7R 10% 5%
4
3
2
1
NI
+1P05V_CPUIO
GND GND
PR629
1.05V or 1.00V @Imax=17A
2 1
+5V
PJP43
SHORTPIN
+/-1.5% DC,+/-3.5% AC +1P05V_CPUIO
8.2KOHM
NOBOM L26
Efficiency >80%,>70% at idle
8 +1.05V_CPUIO_PHASE 2 1 5% 1 2
SW I
7 V5IN
C 0.36UH C
2
Critical
GND PC569 2 1 10UF/25V R519
I X5R 10% 1
5
1206
5
PQ67
1
5 D
6
7
8
NTMFS4839NHT1G PQ69
+3P3V
5 D
6
7
8
+1.05V_CPUIO_SUR
NI NTMFS4839NHT1G
Critical I
1
S
G
PR200 1 2 100KOHM 1 PC570
S
PGOOD
G
I 1% 680PF/50V
4
3
2
1
2
1
I mx_c0603_small
4
3
2
1
PC573 X7R 10%
{59} VCCIO_PWRGD 1000PF/50V NI
2
GND PR199 1 2 100KOHM +1.05V_CPUIO_TST
5 6
I 1% TST DRVL
GND GND
+1.05V_CPUIO_LG
GND GND
PJP512
B SHORTPIN B
Vref=0.704V NOBOM
4 +1.05V_CPUIO_FB_A PR553 1 2 4.22KOHM PR154 1 2 100 Ohm +1.05V_CPUIO_FB_RC_A 2 1
VFB I 1% I 1%
OCP~25.6A PC572 2 1 56PF/50V PC574 1 2 0.1UF/25V GND
GND PR201 1 2 165KOhm +1.05V_CPUIO_TRIP
2 TRIP NI NPO 5% I X7R 10%
I 1%
R37451
PR552 1 2 10KOhm 1 2 GND 0 2 1 PR163
VCCIO_SENSE {13}
I 1% I
0 Ohm
5% PJP42
I SHORTPIN
1
+5VSB NOBOM
PR415 2 1 VSSIO_SENSE {13}
60.4KOHM
1%
2
I
1
I
+5V 11 PR335
GND GND
12 10K
GND1
GND2 13
1
I
2
PR350
10K TPS51211DSCR 3
D
Critical PQ49
2
+5V 1
A A
G 2N7002
H--->1.05 NI 1 2 10K 3 2 S I
D
PR322 3 I
L--->1.0V
1
E 2 S I mx_c0603_small
2 GND Title
<Title>
D D
+1P05V_CPUIO +1P05V_CPUIO
NI NI NI NI NI NI NI NI
1
PCB1 PCB3 PCB4 PCB8 PCB5 PCB6 PCB7 PCB18
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20%
2
mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small
NI NI NI NI NI NI NI NI
1
1
PCB9 PCB10 PCB11 PCB12 PCB13 PCB14 PCB15 PCB16
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20%
2
2
mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small mx_c0805_small
C C
+1P05V_CPUIO
I I I I I
1
I I I I
1
+ + + +
PCE13 PCE30 PCE15 PCE16
820UF/2.5V 820UF/2.5V 820UF/2.5V 330UF/2V
Critical Critical Critical NI
2
2009/12/18 change to NI
A A
1
+1P05V_CPUIO GND PC193 2 1 4.7UF/6.3V 10 VCC
1
PR230 X5R 10% I PC191 PC190 PC192
1KOhm PR351 0.1UF/10V PR353 0.1UF/10V PR352 0.1UF/10V
1% +19V_CPU_IN 110 Ohm 54.9 OHM 75 OHM
0.1 0.1 0.1
2
1
I 1% 1% 1%
NI NI NI
2
PR256 mx_r0402_small PR245 1 2 1KOhm 12 I I NI
2
VRMP
1KOhm 1% I mx_r0402_small SDIO 4 mx_r0402_small
GND mx_r0402_small
GND mx_r0402_small
GND VIDSOUT {13}
1% GND PC146 2 1 0.01UF/25V
NI I X7R 10% mx_c0402_small 5 VIDSCLK {13}
2
SCLK
D mx_r0402_small GND PR227 1
1%
2 1KOhm
NImx_r0402_small 9 6
D
{24,57,72} VRM_PWRGD ENABLE ALERT# VIDALERT# {13}
PC147 1 2 0.1UF/16V GND
1
X7R 10% I mx_c0402 DRON 33 DRVON {65,66,68}
32 PWM1 {65} PR393
mx_r0402_small PC195
PR235 PC142 mx_c0402 PC153 1 PWM1/ADDR
2 0.1UF/16V GND CSN1 35 CSN1 {64,65} 10KOhm
1 2 2 1 PR274 1 I 7.5KOHM
2 2 1 X7R 10% I mx_c0402 1%
1% I 1% I X7R10% 7 34 VCORE_CSP1_1 PR297 1 2 100KOHM I
2
VR_RDY CSP1
47 OHM 470PF/50V 1800PF/50V PR268 4.7KOHM NI 1% mx_r0402_small mx_r0402_small
VCORE_DIFFOUT_A 52 {64,65} CSP1 1 2 PC171 1 2 0.1UF/16V
X7R 10% DIFFOUT
PR259 I 1% X7R 10% I mx_c0402 GND
1 2 I PC194 2 1 22PF/50V VCORE_COMP_A 48 30 PWM2 {65}
COMP PWM2
I 1% I NPO 5%
CSN2 39 CSN2 {64,65}
1KOhm mx_c0402_small
mx_r0402_small 38 VCORE_CSP2_1 PR275 1 2 100KOHM
CSP2 PR392
VCORE_FB_A 49 FB
PR402 4.7KOHM NI 1% mx_r0402_small
{64,65} CSP2 1 2 PC168 1 2 0.1UF/16V 1 2 GND
I PR236 mx_r0402_small
PC161 mx_c0402 I 1% X7R 10% I mx_c0402
PR229 1 2 1% 1 2 2 1 VCORE_TRBST_A 50 31 PWM3 {66}
TRBST PWM3/VBOOT 10K
2KOhm mx_r0402_small I 1% I X7R 10%
CSN3 37 CSN3 {64,66}
402 OHM 3900PF/50V I
1
1
GND PC199 2 1 0.1UF/16V PC149
GND 1%
X7R 10% NI mx_c0402_small 1000PF/50V GND
X7R 10% 44 VCORE_CSSUM_A I PR370 1 2 43KOHM CSP1 {64,65}
2
CSSUM
I mx_c0402_small 1% I
+5V PR233 1 2 0 Ohm VCORE_VSN 51 45 VCORE_CSCOMP_A PR263 1 2 56KOHM PR400 1 2 I PR373 1 2 43KOHM
{13} VSS_SENSE VSN CSCOMP CSP2 {64,65}
5% I mx_r0402_small I 133KOHM 1% 1% I
1
PJP28 PC159 1% mx_r0402
1
GND 2 1 VSS_SENSE_PJP28
PR248 1 2 100 Ohm 0.1UF/16V 47 VCORE_ILIM_A PR267 1 2 30.9KOhm 1 2
ILIM
PR243 1% I mx_r0402_small X7R 10% 1% I PC286 2 1 X7R 10% PR372 1 2 43KOHM CSP3 {64,66}
2
0 Ohm SHORTPIN NI PRT2 100KOHM 2200PF/50V I mx_c0402_small
1% I
5% NOBOM mx_c0402_small Critical
1% mx_r0603_small PC169 1000PF/50V
NI GND PC285 1 2 I PR272 1 2 1KOhm 2 1
2
GND PC143 2 1 0.1UF/16V VCORE_VSPA_A 15 VSPA ILIMA 20 VCORE_ILIMA_A PR368 1 2 23.7KOHM PRT5 1 2 Critical PC282 2 1 2200PF/50V
X7R 10% NI mx_c0402_small 1% I 100KOHM 1% I X7R 10%
} VCCAXG_SENSE PR359 1 2 0 Ohm mx_r0603_small
1
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
1
10K PRT4
1
54
55
56
57
58
59
60
61
1
I 1%
Critical
I X7R 10% I I
mx_r0603_small Title : VCORE CONTROLLER
2
2
mx_c0402_small I mx_r0402_small I mx_c0402_small mx_r0402_small
2
+19VSB +19V_CPU_IN
+12V PL8
+5V 1 2
0.36UH PQ24 PQ25
1
1
Critical + + + BSC889N03LS BSC889N03LS
5
PR383 PR382 NI + PCE17 PCE29 PCE11 I
1
2.2 Ohm +8V 0 Ohm PC5 PCE32 27UF/25V 27UF/25V 27UF/25V PC276
5 D
6
7
8
5 D
6
7
8
5% 5% 0.1UF/50V 27UF/25V Critical Critical Critical 4.7UF/25V
2
I NI X7R 10% Critical 0.1
2
2
mx_r0805 NI Criticial mx_c1206_h41
mx_r0805
S
G
G
D D
I CORE_PWM1_BOOT_IN_D GND GND GND GND
4
3
2
1
4
3
2
1
PD7 GND GND
PR388
1 PC155 0.1UF/50V
3 1 2 CORE_PWM1_BOOT_R_D 2 1
2 Fsw = 390kHz
I X7R 10% PR247
2.2 Ohm V_CPU_CORE Iin,rms = 7.23A
1
1 2 CORE_PWM1_HGR_D
CORE_PWM1_VCC_C
1
NI mx_r0805 0.05 5% I
C9364 I CORE_PWM1_HG_D
Imx_r1206
PR385 L.L. = 1.7mohm
2
2
8 L27
GND CORE_PWM1_BOOT_D DRVH CORE_PWM1_PH
1 BST SW 7 1 2
{64} PWM1 2 PWM DRVL 5
{64,65,66,68} DRVON 1 2 3 0.36UH
EN
1
4 VCC FLAG 9 I Critical
PR380 6 R289
GND
1
I 2.2 Ohm 1Ohm
1
1
PC275 5% NCP5901MNTBG r1206_h26 PJP32
1
0.1UF/16V I PQ26 PQ27 SHORTPIN PJP33 I
2
5 D
6
7
8
5 D
6
7
8
X7R 10% mx_r0603_small NTMFS4839NHT1G NTMFS4839NHT1G NOBOM SHORTPIN PC158
2
1
mx_c0603_small CORE_PWM1_LG_D Critical Critical NI SHORTPIN NOBOM 22UF/6.3V
2
Core_PWM1_SN_D PC278 SHORTPIN X5R 10%
2
GND 680PF/50V mx_c1206
2
I
G
X7R 10%
1
C PC277 mx_c0402_small C
4
3
2
1
4
3
2
1
GND 1000PF/50V
mx_c0603_small
2
GND GND GND
GND GND
PR386
PR405 +8V 0 Ohm I
1
2.2 Ohm 5% PQ28 PQ29 PC280
5% NI BSC889N03LS BSC889N03LS 4.7UF/25V
2
5
I mx_r0805 0.1
2
2
mx_c1206_h41
5 D
6
7
8
5 D
6
7
8
mx_r0805
I
PD8 CORE_PWM2_BOOT_IN_D NI Criticial
PR389
1 PC279 0.1UF/50V GND
S
G
G
3 1 2 CORE_PWM2_BOOT_R_D 2 1
2
CORE_PWM2_VCC_C
4
3
2
1
4
3
2
1
1
NI mx_r0805 I 0 Ohm
2
1
C9365 mx_r1206_h26 5% I
0.1UF/50V PR387
I
2
1
4 VCC FLAG 9 I Critical
PR257 6 R290
GND
1
2.2 Ohm 1
5
1
5% NCP5901MNTBG r1206_h26 PJP34
1
I PQ30 PQ31 SHORTPIN PJP35 I
2
5 D
6
7
8
5 D
6
7
8
GND NTMFS4839NHT1G NTMFS4839NHT1G SHORTPIN PC281
mx_r0603_small NOBOM
1
I CORE_PWM2_LG_D Critical Critical NI NOBOM 22UF/6.3V
2
1
2
0.1UF/16V 680PF/50V SHORTPIN
S
2
I
G
G
X7R 10% X7R 10% mx_c1206
2
1
mx_c0603_small PC165 mx_c0402_small
4
3
2
1
4
3
2
1
1000PF/50V
mx_c0603_small
2
GND
A
GND GND GND GND GND A
{64} CSP2
{64} CSN2
D
+5V +19V_CPU_IN D
+12V
1
PQ32 PQ34
1
5
PR409 +8V 0 Ohm I
1
2.2 Ohm 5% PC166
5 D
6
7
8
5 D
6
7
8
5% NI 4.7UF/25V
2
I mx_r0805 0.1
2
2
Criticial NI mx_c1206_h41
mx_r0805
S
I
G
PD9 CORE_PWM3_BOOT_IN_D
PR408
4
3
2
1
4
3
2
1
1 PC167 0.1UF/50V GND
3 1 2 CORE_PWM3_BOOT_R_D 2 1
2
I X7R 10%
2.2 Ohm
1
CORE_PWM3_VCC_C
NI mx_r0805 0.05
1
C9366 I 0 Ohm I
2
2
GND 8 L29
CORE_PWM3_BOOT_D DRVH CORE_PWM3_PH
1 BST SW 7 1 2
C 2 5 C
{64} PWM3 PWM DRVL
{64,65,68} DRVON 1 2 3 0.36UH
EN
1
4 VCC FLAG 9 I Critical
PR377 6 R291
GND
1
2.2 Ohm 1
1
5% NCP5901MNTBG r1206_h26 PJP36
1
I PQ35 PQ36 SHORTPIN PJP37 I
2
5 D
6
7
8
5 D
6
7
8
GND NTMFS4839NHT1G NTMFS4839NHT1G SHORTPIN PC271
mx_r0603_small NOBOM
1
CORE_PWM3_LG_D Critical Critical NI NOBOM 22UF/6.3V
2
Core_PWM3_SN_D PC274 SHORTPIN X5R 10%
2
I 680PF/50V SHORTPIN
2
1
G
PC272 X7R 10% mx_c1206
1
0.1UF/16V PC273 mx_c0402_small
4
3
2
1
4
3
2
1
X7R 10% 1000PF/50V
2
mx_c0603_small mx_c0603_small
2
GND GND GND GND GND
B B
+12V==> +8V
+8V +12V
PU3
1 VOUT VIN 8
2 GND1 GND4 7
3 GND2 GND3 6
1
4 NC1 NC2 5
PC20 PC23
1UF/16V GS78L08SF 1UF/16V
2
A A
GND
PEGATRON DT-MB RESTRICTED SECRET
Title : VCORE DRIVER 2-2
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 66 of 73
5 4 3 2 1
5 4 3 2 1
D D
Output CAP
+VCORE
Place CPU bottom side
PL-CAP *4 +2(NI)
MLCC *18 +3(NI)
1
+ + + + + +
PCE18 PCE19 PCE20 PCE21 PCE22 PCE23
820UF/2.5V 820UF/2.5V 820UF/2.5V 820UF/2.5V 820UF/2.5V 220UF/2V
Critical Critical Critical Critical Critical I
2
C C
GND
B B
A A
<Variant Name>
Title
<Title>
5 4 3 2 1
5 4 3 2 1
+V_AXG_IN +19VSB
Irms=6.09A@TDC PL14
1 2
+5V
PQ70 PQ75 1UH
BSC889N03LS BSC889N03LS Irat=18A
5
D
+12V Critical D
PR411
1
+8V
5 D
6
7
8
5 D
6
7
8
0 Ohm + + I
1
1
5% Criticial PCE12 PCE14 PC265
PR413 NI Criticial 33UF/25V 33UF/25V 10UF/25V
2
2.2 Ohm mx_r0805 X5R 10%
S
0.2 0.2
2
G
G
5% mx_c1206
I Critical Critical V_AXG @ TDC= 25A
2
4
3
2
1
4
3
2
1
I AXG_PWM_BOOT_IN_D
mx_r0805 PD11
PR412
PC266 0.1UF/50V GND GND
Imax=35A
1 GND
2
3 1 2 AXG_PWM_BOOT_R_D
2 1
PR258
L.L. = 4.1mohm
AXG_PWM_VCC_C
1
mx_sot323 I 0.05 5% I
1
PU15
X7R 10%
2
8 PL6
AXG_PWM_BOOT_D1 DRVH AXG_PWM_PH
BST SW 7 1 2
GND {64} PWMA 2 5
PWM DRVL 0.36UH
{64,65,66} DRVON 1 2 3 EN
1
4 VCC FLAG 9 I Critical
PR347 6 R181
GND
1
2.2 Ohm 1Ohm
1
5% NCP5901MNTBG r1206_h26 PJP39
1
C I SHORTPIN PPJP40 I C
2
PQ71 PQ72 SHORTPIN PC264
mx_r0603_small NOBOM
1
5 D
6
7
8
5 D
6
7
8
GND NTMFS4839NHT1G NTMFS4839NHT1G NI NOBOM 22UF/6.3V
2
Critical Critical AXG_PWM_SN_D PC263 X5R 10%
2
I 680PF/50V
2
mx_c1206
1
1
G
G
0.1UF/16V PC262 mx_c0402_small
X7R 10% 1000PF/50V
2
4
3
2
1
4
3
2
1
mx_c0603_small
2
GND AXG_PWM_LG_D GND GND GND
GND GND
{64} CSPA
{64} CSNA
B B
1
I I NI NI + + + + +
1
1
PC290 I I PC261 PC259 PC258 PCE27 PCE28 PCE24 PCE25 PCE26
1
22UF/6.3V PC289 PC288 22UF/6.3V 22UF/6.3V 22UF/6.3V 820UF/2.5V 820UF/2.5V 820UF/2.5V 820UF/2.5V 330UF/2V
X5R 20% 22UF/6.3V 22UF/6.3V X5R 20% X5R 20% X5R 20%
Critical Critical Critical Critical NI
2
2
mx_c0805_small X5R 20% X5R 20% mx_c0805_small mx_c0805_small mx_c0805_small
2
mx_c0805_small mx_c0805_small
GND GND
PL-CAP *4
A MLCC *6 A
5 4 3 2 1
5 4 3 2 1
Output CAP
D D
+VCORE
NI I I I I I NI I I I NI I I I I I I NI
1
1
PC211 PC219 PC201 PC212 PC200 PC214 PC209 PC208 PC218 PC215 PC210 PC197 PC206 PC213 PC198 PC217 PC216 PC207 I
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V PC222
X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% X5R 20% 22UF/6.3V
2
2
mx_c0805_small mx_c0805 mx_c0805 mx_c0805 mx_c0805 mx_c0805 mx_c0805_small mx_c0805 mx_c0805 mx_c0805 mx_c0805_small mx_c0805 mx_c0805 mx_c0805 mx_c0805 mx_c0805 mx_c0805 mx_c0805_small X5R 10%
mx_c1206
C C
GND
R3759012
1 2
0 Ohm
5%
GND NI GND
+3P3V_DUAL
+19V +5VA
2
B B
EAC8 EAC7
2
0.1UF/50V 0.1UF/16V
1
EAC4 NI I
0.1UF/50V
1
I
GND
NI EAC2 1 2 0.1UF/16V NI EAC3 1 2 0.1UF/16V GND
GND
A A
NI EAC1 1 2 0.1UF/16V
Title : VCORE CAP
Pegatron Corp. Engineer: Scott Chen
AGND GND Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 69 of 73
5 4 3 2 1
5 4 3 2 1
1
D Critical 1K C6 1 2 SRTCRST# {21} D
5% 1UF/16V Critical
BATT1
1
Critical mx_r0402_small X7R 10%
2
3V/220mAh XBT1 GND
1
KTS
BATT_HOLDER I I
LITHIUM BATT C3 C4
2
CR2032
GND 1UF/16V 1UF/16V
2
NOTE: X7R 10%
mx_c0603_small
X7R 10%
mx_c0603_small
GND
Place C6 near PCH. GND GND
Battery Socket
C C
B B
I I I
5% 5% 5%
3
D I 3
D I 3
D I
PQ89 PQ90 PQ91
2N7002 2N7002 2N7002
1 1 1
{75} CLAMP_CTRL
G G G
2 S 2 S 2 S
A A
Title : RTC/CMOS/SPKR
Pegatron Corp. Engineer: Scott Chen
Size Project Name Rev
A3 IPISB-SB 1.00
Date: Thursday, April 14, 2011 Sheet 70 of 73
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
I
P12
{26} CK_33M_DEBUG 1 2
{16,24,46,72,73,74} PLTRST# 3 4 LFRAME# {24,46,57,74}
{24,46,57,74} LAD0 5 6 LAD1 {24,46,57,74}
{24,46,57,74} LAD2 7 8 LAD3 {24,46,57,74}
9 10
11 12
14
A
HEADER_2X7P_K13 A
GND GND
PEGATRON DT-MB RESTRICTED SECRET
<Variant Name>
D D
43 VCC_OBS_AB TCK1 55
44 VCC_OBS_CD TCK0 57 TCK {13}
PROTO TDO 52 TDO {13}
1
HCB20 54
TRSTn TRST# {13}
0.1UF/16V 56
TDI TDI {13}
Y5V +80-20% 58 TMS {13}
2
mx_c0402_small TMS
+1P05V_CPUIO
GND
1
NI
3 HR61
{13} H_PREQ# OBSFN_A0
{13} H_PRDY# 5 OBSFN_A1
1.5K PROTO
9 mx_r0402_small
HR62
{13} BPM0# OBSDATA_A0
11 249
{13} BPM1#
2
C OBSDATA_A1 1% C
{13} BPM2# 15 OBSDATA_A2
NOTE: {13} BPM3# 17 OBSDATA_A3
39 CPUXDP_HOOK0 2
mx_r0402_small
1
HOOK0 CPUPWRGD {13,24}
CRB is BTM +1P05V_CPUIO
21 OBSFN_B0
23 OBSFN_B1
{13} BPM4# 27 OBSDATA_B0
1
{13} BPM5# 29 OBSDATA_B1 NI
{13} BPM6# 33
35
OBSDATA_B2
HR63
1K NOTE:
{13} BPM7# OBSDATA_B3 mx_r0402_small Place HR64 near HR24, reduce stub
2
NI HR65 2 1 1K mx_r0402_small
PLTRST# {16,24,46,71,73,74}
1
{17,18,73,75} SMB_CLK_MAIN PROTO
HR70 1 2 0SMB_CLK_MAIN_CPUXDP
mx_r0402_small 53 SCL NI
SC43
NOTE: 0.1UF/16V
2
1 X7R 10%
GND1
Please close to each other to reduse stub. GND2 2
GND3 7
GND4 8 GND
4 OBSFN_C0 GND5 13
B B
6 OBSFN_C1 GND6 14
10 OBSDATA_C0 GND7 19
12 OBSDATA_C1 GND8 20
16 OBSDATA_C2 GND9 25
18 OBSDATA_C3 GND10 26
GND11 31
GND12 32
22 OBSFN_D0 GND13 37
24 OBSFN_D1 GND14 38
28 OBSDATA_D0 GND15 49
30 OBSDATA_D1 GND16 50
34 OBSDATA_D2 GND17 59
36 OBSDATA_D3 GND18 60
NP_NC1 61
NP_NC2 62
NC
GND
BtoB_CON_60P
A A
NOTE:
+3P3VSB Place strap resistors of TDO near to XDP connector,
D and TDI and TMS near to CPU. D
INTEL PCH XDP DEBUG PORT
1
PROTO
SR202
0
2
3P3VSB_CPUXDP_JTAG +3P3VSB
+3P3VSB
1
PROTO PROTO PROTO NI
PROTO SR204 SR206 SR208 SR184
PROTO XDP2 200 200 200 20K
SR200 mx_r0402_small mx_r0402_small mx_r0402_small mx_r0402_small
0
2
mx_r0402_small
1 2 PCHXDP_VCC_OBS 43 VCC_OBS_AB TCK1 55
44 VCC_OBS_CD TCK0 57 PCH_JTAG_TCK {24}
TDO 52 PCH_JTAG_TDO {24}
NI TRSTn 54 PCH_JTAG_RST_R NI SR250 2 1 0 mx_r0402_small
PCH_JTAG_RST {24}
1
SCB80 56
TDI PCH_JTAG_TDI {24}
0.1UF/16V 58
TMS PCH_JTAG_TMS {24}
Y5V +80-20%
2
mx_c0402_small
1
+3P3VSB NI PROTO PROTO PROTO PROTO NI NI
1
GND SCB34 SR203 SR205 SR207 SR209 SR258 SCB17
0.1UF/16V 51 100 100 100 10K 1UF/10V
1
3 Y5V +80-20% mx_r0402_small
mx_r0402_small mx_r0402_small mx_r0402_small mx_r0402_small Y5V +80-20%
2
OBSFN_A0
C 5 PROTO mx_c0402_small mx_c0603_small C
2
OBSFN_A1
{22,47} OC01# NI SR232 2 1 0 mx_r0402_small 9 OBSDATA_A0
SR210
{22} OC23# NI SR231 2 1 0 mx_r0402_small 11 OBSDATA_A1
1K
{22} OC45# NI SR234 2 1 0 mx_r0402_small 15 mx_r0402_small
2
OBSDATA_A2
{22} OC67# NI SR233 2 1 0 mx_r0402_small 17 OBSDATA_A3 GND GND GND GND GND GND GND
39 PCHXDP_HOOK0_PWRGD
HOOK0
1
21 OBSFN_B0 NI
23 +1P05V_CPUIO SR211
OBSFN_B1
{22} OC89# NI SR236 2 1 0 mx_r0402_small 27 OBSDATA_B0
0
{22,48} OC1011# NI SR235 2 1 0 mx_r0402_small 29 OBSDATA_B1
mx_r0402_small
1
{22,48} OC1213# NI SR238 2 1 0 mx_r0402_small 33 PROTO
2
OBSDATA_B2
{22} OCDEBUG# NI SR237 2 1 0 mx_r0402_small 35 OBSDATA_B3
SR212
51
+1P05V_PCH mx_r0402_small
SR201 GND NOTE:
2
1 2PCHXDP_ITPCLK/HOOK4 40 ITPCLK/HOOK4 HOOK1 41 PCHXDP_HOOK1 Place SR214 near to sourceSR229
in order to avoid stub.
42 ITPCLK#/HOOK5 HOOK2 45 I 2 0 mx_r0402_small
1 CK_100M_PCHXDP {26}
0 HOOK3 47 I SR230 2 1 0 mx_r0402_small
CK_100M_PCHXDP# {26}
HOOK6/RESET# 46 PCHXDP_HOOK6/RESET# NI SR213 2 1 1K RSMRST# {24,74}
PROTO 48
HOOK7/DBR# SYS_RESET_DBR# {13,24,72}
mx_r0402_small NI SR214 2 1 0 mx_r0402_small
PLTRST# {16,24,46,71,72,74}
{17,18,72,75} SMB_DATA_MAIN PROTO
HR77 1 2 0SMB_DATA_MAIN_PCHXDP
mx_r0402_small
51 SDA I SR215 2 1 0 mx_r0402_small
CPURST_XDP# {16,72}
{17,18,72,75} SMB_CLK_MAIN PROTO
HR76 1 2 0SMB_CLK_MAIN_PCHXDP
mx_r0402_small
53 SCL NI SR221 2 1 0 mx_r0402_small
PCH_DPWROK {24,31}
1
NI
1 SR260
GND1 0
GND2 2
B mx_r0402_small B
GND3 7
8
2
GND4
4 OBSFN_C0 GND5 13
{24} BMBUSY- NI SR252 2 1 0 mx_r0402_small 6 OBSFN_C1 GND6 14
10 OBSDATA_C0 GND7 19
12 OBSDATA_C1 GND8 20 GND
16 OBSDATA_C2 GND9 25
18 OBSDATA_C3 GND10 26
GND11 31
GND12 32
22 OBSFN_D0 GND13 37
24 OBSFN_D1 GND14 38
28 OBSDATA_D0 GND15 49
30 OBSDATA_D1 GND16 50
34 OBSDATA_D2 GND17 59
36 60 PCHXDP_GND18
OBSDATA_D3 GND18
NP_NC1 61
NP_NC2 62
NC
1
NI
SR216
0
BtoB_CON_60P mx_r0402_small
2
GND GND
A A
+BATT
+3P3VSB +3P3VSB
+3P3V
1
2
R7108
R7105 10K R7107
U5A 10K 10MOhm
C7127
2
2
C7110 C7123 C7117 C7121 C7124 16 5%
2
10UF/6.3V VSB3_1
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 28 NI I
1
MLCC/+/-20% X7R 10% VSB3_2 SIO_RSMRST#
D X7R 10% X7R 10% X7R 10% X7R 10% 93 6 1 0 2 R7173 RSMRST# {24,73} D
1
1
VSB3_3 RSMRST#
75 VSB3_4 PS_ON# 12 PS_ON# {56,57,59}
122 110OD +3P3VA
VSB3_5 SMI# SIO_PWRGDPS LPC_SMI# {23,57}
PWRGD_PS 102
2
36 TP_CPUPRSENT 1 0 I 2 R7181
CPU_PRSNT1# SKCOTT# {13}
60 VSS1 PD2/GPIO27/CPU_PRSNT2#/IRDCT1# 88 PD2_IRDCT1# 1 SOT97 NOBOM R7109
2
10 C7131 10K
+3P3VA AVCC VSS2
22 VSS3 0.1UF/16V
84 I X7R 10%
1
VSS4
108 VSS5
GND
+3P3VSB AVCC 49 SIO_PWBTIN# 1 0 2 R7172 GND
C7130 PWBTIN# PWRBTN# {39,72}
2
2
L7103 C7125 C7122 48 +3P3VA
0.1UF/16V PWBTOUT# SB_PWRBTN# {24}
1 2 0.1UF/16V 10UF/6.3V SLP_S3# 4 SLP_S3# {24,54,57,60}
X7R 10% MLCC/+/-20% X7R 10% GND 2 SLP_S4# {24,53,54,57,58}
R2739 2 NI 1 10K
1
1
20% 10UH/125mA I SLP_S4#
SLP_S5# 3 SLP_S5# {24,53,57}
42 AVCC SIOPME# 5 OD LPC_PME# {24}
+BATT 8 SIO_BLINK {39}
BLINK_GR/GPO61/(PA_STR)
SIO_GND 53 VLPS COLOR/GPO60 9 SIO_COLOR {39}
GND PA_STR:
1
37 VBAT R2740 1 FOR WS
SIOVCORE 17 10K 0 FOR DT
VCORF
1
2
VTT
2
MDAT
1
KBDAT
MLCC/+/-20% X7R 10% 1 0 2 47 AGND 79 OD KBD_CLK R7164 2 1 10K +3P3V
2
C R7115 KBCLK C
GND KBRST# 72 OD RST_KB# {23}
1
GA20 96 OD A20GATE {23}
1
GND GND GND GND SIO_GND
1
19 R7180 R7144 NI
{24,46,57,71} LAD3 LAD3
21 4.7K 4.7K R7145 R7157 R7141
{24,46,57,71} LAD2 LAD2
23 4.7K 4.7K 4.7K R7146
{24,46,57,71} LAD1
2
LAD1 4.7K
{24,46,57,71} LAD0 20
2
LAD0 PWM5
{24,46,57,71} LFRAME# 27 98
2
LFRAME# SLCT/GPIO32/IR_RX/PWM5 TACH5
{16,24,46,71,72,73} PLTRST# 25 PCI_RESET# PD7/TACH5/GPIO34/IR_LRX 89
26 90 PD5_IR_TX2 NI
{26} CK_33M_SIO PCI_CLK PD5/PWM6/GPIO25/IR_TX2
{23,46,57} SERIRQ 24 SER_IRQ BUSY_WAIT#/ GPIOE43/IR_TX1/TACH6 99
+5V 18 AFD_DSTRB#/ GPIO50/DDRB_EN/IR_LED# 94 OD IRLED#
{24} LDREQ# LDRQ#
86 PWM4
PD6/GPO63/PWM4/IRDCT2#
1
+1P05V_CPUIO
GPIO02/TACH2/PWM_IN
{39} R_Bright_up# IN OD 92 ERR#/GPIOE11/BTNIN1/TACH7 HMSCL/GPIOE42 62 SMLINK_CLK {21}
2
{39} R_ODD_EJECT# IN OD 91 STB_WRITE#/TACH9/GPIO37/BTNIN3 HMSDA/GPIOE40 64 SMLINK_DATA {21}
IN OD 95 58 SIOPECI R7140 1 2 43 R7168
{39} R_Bright_down# PE/GPIOE13/BTNIN2/TACH8 PECI/TSI_SDA PECI_SIO {13,23}
ACK# 97 56 TSISCL R7155 1 2 2.7K 1% 10K
ACK#/GPIO35/PRGM_PWM/TACH10 TSI_SCL
NOBOM SOT100 1 100 GPIOE41/TACH3 DDRA_EN/MEMHOT#/GPIO04 68 NI
NOBOM SOT103 1 33 57 PROCHOT# {13,64,76}
1
+3P3V GPIO01/TACH4 PROCHOT1# ALERT#
ALERT#/PROCHOT2# 59
OUT 63 55 SIO_THMTRIP# 1 0 2 R7176
{50} SYSFAN_PWM PWM1 THERMTRIP# H_THMTRIP# {13,74}
OUT 61 43 TAD1
{50} SYSFAN_PWM_2 PWM2/GPIO24 AD1
SR137 1 NI 2 4.7K 105 PWM3#/GPIOE45 AD2 44 TAD2
mx_r0402_small 45 TAD3 AVCC AVCC AVCC
B AD3 B
1
C9394 R7161 R7165 R7160
NPCD378HAKFX 150PF/50V 3.01KOHM 3.01KOHM 7.68KOHM
2
1% 1%
NPO 5% I I I
R7142 Critical
Critical 1%
R7169 R7143
2
I
Critical Critical
PCH_THMTRIP# {23}GND 1 2 TAD3_R 1 2 TAD2_R 1 2 TAD1_R
2
10KOHM 10KOHM 10KOHM R7171
2
C7126 R7158 C7120 R7167 C7119 I
3 0.1UF/16V 3% 0 0.1UF/16V 3% 0 0.1UF/16V 3% 0
D
X7R 10% I I X7R 10% I I X7R 10% I
1
I
1
SIO_COLOR 1 PQ88
G 2N7002
2 S
SIO_GND SIO_GND SIO_GND
A A
SUPER I/O
Title :
PEGATRON CORP. Engineer: Jay Chuang
Size Project Name Rev
A3 ZEPHYR-MB 0.80
Date: Thursday, April 14, 2011 Sheet 74 of 98
5 4 3 2 1
5 4 3 2 1
+3P3VSB
+5V
1
R7201 R7202 R7203 R7204 R7205 R7206
2
4.7K 4.7K 4.7K 4.7K 4.7K 4.7K
+3P3V R7245 R7207 R7208 R7209 R7210
+5V 4.7KOHM
10K 10K 1KOhm1KOhm
2
NI NI NI NI NI NI
NI U5B
1
D OD 11 87 SIO11_TRST- D
{24,57} PWROK PWRGD_OUT PD0/GPIO21/TRST#
OD 107 85 SIO11_TDI
{54,60,62} PWRGD_30MS PWRGD_O1 PD1/GPIO06/TDI
PWRGD_50MS# OD 104 82 SIO11_TMS
{76} PWRGD_50MS# PWRGD_O2#/GPIO26 PD4/GPIO30/TMS
OD 71 81 SIO11_TCK-
{56} 12V_PG_25MS 12V_PG_25MS PD3/GPIO22/TCK
+12V 83 OD SIO11_RDY-
X7R 10% INIT#/GPIO07/RDY# SIO11_TDO
SLIN_ASTRB#/GPIO05/TD0 78 OD
11.8KOHM X7R 10% C7203 1 2 0.1UF/16V SIOCOMP3 39
R7213 COMP_IN3
1 1% 2 C7201 1 2 0.1UF/16V C7202 1 2 0.1UF/16V SIOCOMP1 40 COMP_IN1 2 4.7K 1 R7226
R7212 1 1% 2 41 COMP_IN2 NI
X7R 10% 12V_VSBCOMP 38 127 DSR2# R7232
1 2 33
1.78K 12V_VSB_COMP DSR2#/GPIOE46/F1_SCK
GND GND RTS2#/GPIO57 125 GND
GND GND +3P3VSB 124
{76} SIO_12VIN RI2#/GPIO53/BTNIN8
{53} 5V_USB_MAIN#
5V_USB_MAIN# 106 5V_USB_MAIN#/GPIO33 DTR#_BOUT2/TRIS#/GPIO51 123 SIO_GPIO51 1 SOT98 NOBOM
+19VSB 5V_USB_CTRL 31 121 SIO_GPIO56 PROTO 1 SOT99 NOBOM
432KOHM X7R 10% R7235 1 5V_USB_CTRL/GPIO55 SOUT2/GPIO56/BTNIN7
2 10K 3V_AUX_SLOT_ONOD15
3V_AUX_SLOT_ON/GPIO00 DCD2#/GPIO54/F1_SDI 120 SIO_FLASH_SDI 1 R7227 2 33PROTO
R7214 1 1% 2 C7204 1 2 0.1UF/16V +3P3VSB NI SOUT1/TEST# 119 TXD1 {44}
R7215 1 1% 2 +3P3VSB R7220 1 10MOhm 2 118
DTR#_BOUT1/JEN# DTR1# {44}
R7257 1 2 0 SIORST1# 7 117
{21} PME_IN# GPIOE17/(PME_IN#)/GPRST1# RTS1#/BADDR# RTS1# {44}
45.3KOhm R7244 1 2 0 SIORST2# 70 114 +3P3VSB
{16,36,37} PCIE_PLT_RST# GPRST2#/GPIO23 CTS1# CTS1# {44}
GND GND OUT R7256 1 2 0 SIORST3# 29 113
{57} HP_DEBUG_RST# GPRST3#/SGPIO/BTNIN4 RI1# RI# {44}
1
1
30 INTRUDER#/GPRST4/GPIOE12 DSR1# 112 DSR1# {44}
R7217 R7219 +3P3VA +3P3V 115
DCD1# DCD1# {44}
2
10K 10K R7239 1 4.7K 2 126 SIO_FLASH_SDO 1 2 33
SIN2/GPIO31/F1_SD0
NI R7251 1 4.7K NI 2
SIN1 116 R7228
RXD1 {44}
R7236
OUT SIO_BEEP 73 +3P3V +3P3VSB 1KOhm
2
2
{43} SIO_BEEP AUDIO_AMP_DISABLE#OD 69 AUDIO_BEEP
{43} AUDIO_DISABLE OUT CLAMP_CTRL AMP_ON#/GPIOE10
{70} CLAMP_CTRL OD 1
1
BLEED_OFF/GPIO20
{24,36} WAKE# 67 GPIOE15(EV6#)/WDO PROTO
2
OD 66 U7203
WAKE_OUT#/GPIOE44(EV5#)
2
C NOBOM SOT102 1 HOOD_LOCK# OD 32 GPIOE14/HDLOCK#/BTNIN5
C7206 R7233 1 CS# VCC 8 PROTO C
NOBOM SOT101 1 HOOD_UNLOCK# OD 34 GPIOE16/HDUNLOCK#/BTNIN6 2.7K 2.7K 0.1UF/16V 1KOhm SIO_SPI_SO 2
DO(IO1) HOLD#(IO3) 7
35 X7R 10% SIO_SPI_WP#3 6 SIO_SPI_SCLK
{23} HD_LED_IN#
1
R7240 HD_LED_IN#/GPIO36 R7253 R7254 WP#(IO2) CLK
{39} HD_LED_OUT# 1 2 0 HLED_OUT OD 65 4 5 SIO_SPI_SI
1
R7229 1 HD_LED_OUT#/GPO62 GND DI(IO0)
{24,31,57} SLP_SUS# 2 10 OHM LPSWAKE 50
2
LPS_PHY# 51 LPS_WAKE W25Q64BVSSIG
LPS_PHY# SMB2SDA 103 PROTO{21,36}
SMB_DATA_RESUME
52 111 PROTO PROTO(SOCKET)
{24,75} LPS_ON# LPS_ON# SMB2SCL SMB_CLK_RESUME {21,36}
SMB1SDA 101 SMB_DATA_MAIN {17,18,72,73}
1 R7250 2 SMB1SCL 109 SMB_CLK_MAIN {17,18,72,73} GND
20K NI +3P3VSB
R7238 1 2 0 SIO_CLKIN 14
{24,46} SUS_CLK CLOCKI32 R7224
GND
+3P3VSB 128 SIO_FLASH_CS0# 1 2
CTS2#/GPIO52/F1_CS0#/XOR_OUT# FSPISTR
FSPI_STR 46 2 1
U7202 4.7K R7223 10K
4 1 NPCD378HAKFX NI ROM Option
VDD CLKOUT
PROTO
Critical GND
3 CLKEN VSS 2 Un-Install INTERNAL ROM
NI R7223
32.768Khz
2
X7R 10%
GND NI
+5VSB_EN {53}
GND
1
+3P3V
2
B R7221 B
+3P3V +5V 4.7K C7207
3
D I 0.01UF/25V
1
PQ74 X7R 10%
1
I
2N7002
+3P3VA 1 GND NI R7237
G 4.7K
2 S
1
3
D I +3P3VA
PQ77
2
10 Ohm 10 Ohm I
2N7002
1
1
R7241 R7242 1 RTS1#
{24,75} LPS_ON#
R7231 G R7234
2
1
3
D I 3
D I GND
2
2
PQ65 PQ66 NI NI R7246
2N7002 2N7002 5% 4.7K
1 1 LPS_PHY {53} +3P3VSB_EN {53}
CLAMP_CTRL R7243 1 2 0 CLAMP_OFF
G G 3
D NI
2
2 S 2 S
2
NI
PQ82 3
D I
2N7002 GND PQ76 C7208
LPS_PHY# 1 2N7002 0.01UF/25V
{61} LPS_PHY#
1
G 1 GND
X7R 10%
2 S G
2 S GND NI
GND
GND
A A
GND GND
PEGATRON WS-MB RESTRICTED SECRET
SUPER I/O
Title :
PEGATRON CORP. Engineer: Jay Chuang
Size Project Name
NPCD378H_2 Rev
A3 ZEPHYR-MB 0.80
Date: Thursday, April 14, 2011 Sheet 75 of 98
5 4 3 2 1
5 4 3 2 1
{75} SIO_12VIN
+1P05V_CPUIO
Q93513
2
R3758111 C
1 2 1 B R3758911
D {75} PWRGD_50MS# D
+3P3V 1KOhm
4.7KOHM E
2 5%
5% PMBS3904
1
I
I I
2
R3758011
2
10KOhm
+19VA_VIN_L R3759011
1%
0 Ohm
1
I
2
5%
R3757611
1
I
110KOHM PROCHOT# {13,64,74}
1% PU3 OUT {55} 3
D
1
I
Q93521
2
1
R3757711 +5V G 2N7002
3KOHM 2 S I
1%
1
2
R3758411 GND +5V
C PU3 IN- {55} 10KOhm C
52,55,76} AD_ID_A AD_ID_A {52,55,76} 1%
+5V
1
I
2
C9409
2
2
1
2
C940611 26.7KOHM R3757511 PD1 1%
330KOHM I R3758611
0.01UF/25V 1% 20.5KOHM
2
1
I
X7R 10% 1% 1% GND 133KOHM
1
I U7205
MMSZ4692T1G I 1%
1
I I R3758711
1 8
1
1
R3757911 OUT1 VCC I
2 -IN1 OUT2 7 1 2
GND 1 2 3 +IN1 -IN2 6
GND 4 5 100KOHM
3.9KOHM VEE +IN2
1%
2
2
GND 1% LM393 I
1
R3757811 I I R3758511
3.9KOHM C940811 60.4KOHM
1% 3900PF/50V GND 1%
2
X7R 10%
1
1
I I
I
R3758311
B GND 1 2 B
GND GND
604KOhm
1
1%
C941011 I
0.027U/50V
2
X7R 10%
I
GND
A A
Title
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