Scheme Lenovo Y570

A B C D E
http://hobi-elektronika.net
1 1
Compal Confidential
2 2
PIQY1 M/B Schematics Document

Intel Sandy Bridge Processor with DDRIII + Cougar Point PCH
nVIDIA N12P-GT1
3 2010-10-05 3
REV:0.2
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/08/01 Deciphered Date 2010/08/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-6882P
Date: Wednesday, October 06, 2010 Sheet 1 of 63
A B C D E
A B C D E
Compal confidential http://hobi-elektronika.net POWER & BOARD

File Name : LA-6882P
ZZZ1 CAP SENSOR BOARD
I/O BOARD
LA6882P
1 Intel 1
NVidia N12P-GT1
PCI-E X16 Sandy Bridge
VRAM 64*16
GDDR5*8 Socket-rPGA988B
37.5mm*37.5mm DDR3-SO-DIMM X2
BANK 0, 1, 2, 3
HDMI Passive Dual Channel UP TO 8G
CONN level shift
100MHz FDI *8 DMI *4 DDR3-1066(1.5V)
2.7GT/s DDR3-1333(1.5V) 2Channel Speaker
optimus 1.0
CRT Connector
AZALIA Audio Codec Array Digital MIC
RealTek
2 2
optimus 1.0 ALC272/ALC5503
LVDS Intel Audio Jacks
Connector Stereo
Cougar Point HeadPhone Output
14*USB2.0
PCI Express USB(WiMAX)
BlueTooth CONN Microphone Input
6*PCI-E BUS
Mini card Slot 1 PCI-E(WLAN) FCBGA 951
WLAN/WiMAX CMOS Camera
25mm*25mm
PCI Express 6*SATA serial
USB PORT 2.0 x2(Right)
Mini card Slot 2 (port0,1 Option3.0 x2
SSD support SATA3)
A-COVET Light
SPI ROM LPC BUS
SATA(SSD)
USB3.0 BIOS WLAN/WiMAX
3 Controller USB PORT 2.0 x1(Left) 3
USB(WWAN)
2 PORT EC
PCI Express ENE KB930 TV
Card Reader
Mini card Slot 3 Jmicro JMB389
Realtek IR
TV BCM7780/57781
SD/MMC/MS/MS Pro/XD
PCI-E
USB
GIGA LAN
Int.KBD
ESATA HDD AND USB CONN
WLAN/WiMAX Touch Pad SPI ROM (Left)
RJ45 CONN
SATA3.0 HDD CONN
TV Thermal Sensor SATA3.0 HDD (SSD)
4 4
EMC1403
SATA ODD CONN
Issued Date 2008/03/24 Deciphered Date 2008/04/ Title
MB Block Diagram
Custom 0.2
A B C D E
A B C D E
Voltage Rails http://hobi-elektronika.net

SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
+5VS Full ON HIGH HIGH HIGH HIGH ON ON ON ON

+3VS
power S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
plane +1.5VS
+VCCP S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
1 1
+5VALW +1.5V +CPU_CORE
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+B +VGA_CORE
+3VALW +GFX_CORE S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.8VS
State +0.75VS
BOARD ID Table Board ID / SKU ID Table for AD channel
+1.05VS
Vcc 3.3V +/- 5%
Board ID PCB Revision
Ra/Rc/Re 10K +/- 5%
0 0.1 Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
1
0 0 0 V 0 V 0 V EVT
2
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V DVT
3
S0
2 18K +/- 5% 0.436 V 0.503 V 0.538 V PVT
O O O O 4
3 33K +/- 5% 0.712 V 0.819 V 0.875 V MP
5
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
6
S3
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
O O O X 7
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
2
S5 S4/AC
7 NC 2.500 V 3.300 V 3.300 V 2
O O X X USB Port Table
4 External BOM Structure Table
S5 S4/ Battery only USB 2.0 USB 1.1 Port
O X X X USB Port BOM Structure BTO Item
0 USB Port (Left Side) OPTI@ OPTIMUS part
S5 S4/AC & Battery UHCI0
don't exist X X X X 1 USB Port (Left Side) DIS@ Discrete part
2 USB Port (Right Side) UMA@ UMA part
UHCI1 Discrete only part
SMBUS Control Table
3 USB Port (Right Side) DIS_ONLY@
EHCI1 HDMI part (DIS and UMA)
4 HDMI@
Thermal UHCI2
Camera(3D)
SODIMM WLAN Sensor PCH 5 UMA_HDMI@ HDMI part (UMA)
SOURCE VGA BATT KE930 WWAN 6
Camera
DIS_HDMI@ HDMI part (DIS)
X V X X X X X
UHCI3
SMB_EC_CK1 KB930
7 USB20@ USB20 option (Right side 2 ports)
SMB_EC_DA1 +3VALW +3VALW 8 IR USB30@ USB30 option (Right side 2 ports)
X X X X X X V
UHCI4
SMB_EC_CK2 KB930
9 Mini Card(WLAN) USB30_SUB@ USB30 part at sub-board
SMB_EC_DA2 +3VALW +3VS 10 A Cover Light TV@ TV module part
X X X V V X X
EHCI2 UHCI5
SMBCLK PCH
11 TV_SW@ TV module power swith part
3 SMBDATA +3VALW +3VS +3VS 12 Mini Card(TV) NO_TVSW@ No TV module power swith part 3
X X X X X X X
UHCI6
SML0CLK PCH
13 Blue Tooth USB_CHG@ USB charger part
SML0DATA +3VALW NO_CHG@ No USB charger part
SML1CLK
SML1DATA PCH
+3VALW
V
+3VS X V
+3VS X X V
+3VS X PCIE PORT LIST
Port Device
272@
5503@
ALC272 audio codec part
ALC5503 audio codec part
57780@ BCM57780 LAN part
Address
1 LAN
57781@ BCM57781 LAN part
EC SM Bus1 address EC SM Bus2 address 2 WLAN ACOVER@ A cover light part
3 BT@ Blue Tooth part
Device Device Address 4 USB3.0
CMOS@ CMOS Camera part
Smart Battery 0001 011X b Thermal Sensor EMC1403-2 1001_101xb 5 Card Reader
ESATA@ E-SATA part
Thermal Sensor EMC1402-1 100_1100 b 6 TV
VENTURA@ NVDIA VENTURA function part
7 X76@ X76 Level part
PCH SM Bus address 8 S1G@ Samsun VRAM 1G part
S2G@ Samsun VRAM 2G part
Device Address
DDR DIMM0
SKU H1G@ Hynix VRAM 1G part
1001 000Xb
4 ME@ ME part 4
DDR DIMM2 1001 010Xb OPTIMUS UMA@+DIS@+OPTI@
@ Unpop
Discrete only DIS@+DIS_ONLY@
Notes List
B 0.2
LA-6882P
A B C D E
5 4 3 2 1
VGA and GDDR5 Voltage Rails (N12Px GPIO) Performance Mode P0 TDP at Tj = 102 C* (GDDR5)
FBVDDQ PCI Express I/O and I/O and Other
GPIO I/O ACTIVE Function Description GPU Mem NVCLK FBVDD (GPU+Mem) (1.05V) PLLVDD PLLVDD
(4) (1,5) /MCLK NVVDD (1.35V) (1.35V) (6) (1.8V) (1.05V) (3.3V)
GPIO0 N/A N/A Products (W) (W) (MHz) (V) (A) (W) (A) (W) (A) (W) (mA) (W) (mA) (W) (mA) (W) (mA) (W)
D D
GPIO1 IN - Hot plug detect for IFP link C N12P-GT1
64bit TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD
1GB
GPIO2 OUT H Panel Back-Light brightness(PWM capable) GDDR5
GPIO3 OUT H Panel Power Enable

Physical Logical Logical Logical Logical
GPIO4 OUT H Panel Back-Light On/Off (PWM) Strapping pin Power Rail Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
ROM_SO +3VS_VGA XCLK_417 FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE
GPIO5 OUT - GPU VID0
ROM_SCLK +3VS_VGA PCI_DEVID[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM
GPIO6 OUT - GPU VID1 ROM_SI +3VS_VGA RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]
STRAP2 +3VS_VGA PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
GPIO7 OUT N/A
STRAP1 +3VS_VGA 3GIO_PAD_CFG_ADR[3] 3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1] 3GIO_PAD_CFG_ADR[0]
GPIO8 I/O - Thermal Catastrophic Over Temperature STRAP0 +3VS_VGA USER[3] USER[2] USER[1] USER[0]
GPIO9 OUT - Thermal Alert GPIO5 GPIO6

GPIO10 OUT - Memory VREF Control GPU_VID0 GPU_VID1 VGA_CORE P-State
Device ID
0 0 0.825V Deep P12
GPIO11 I/O N/A
C
N12P-GT1 0 1 0.825V P8 C
(40nm) 0x0DEB
GPIO12 IN AC Power Detect Input (10K pull low) 1 1 1.075V P0
GPIO13 OUT N/A
GPIO14 OUT N/A

GPU FB Memory (GDDR5) ROM_SO ROM_SCLK ROM_SI STRAP2 STRAP1 STRAP0
GPIO15 IN Hot Plug Detect for IFPE
Samsung K4G10325FE-HC04
GPIO16 OUT N/A 1800MHz
N12P-GT1 (defaul) 32Mx32 PD 10K PD 15K PD 20K PU 20K PD 35K PU 45K
GPIO17 IN N/A
Hynix H5GQ1H24AFR-T2L
GPIO18 IN N/A 1600MHz
32Mx32 PD 10K PD 15K PD 15K PU 20K PD 35K PU 45K
GPIO19 IN N/A
X76
B
+3VS_VGA B
+1.05VS_VGA
tNVVDD >0
+VGA_CORE
tNV-IFPAB_IOVDD >0
+1.8VS_VGA
tNV-FBVDDQ >0
+1.35VS
1. The ramp rate for any rail must be more than 40us.
2. +VGA_CORE <= +3VS_VGA +0.5V
3. +1.5VS_VGA <= +3VS_VGA +0.5V
4. Optimus follows power sequencing rules
specified in discrete GPU design guide.
A A

VGA Notes List
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
D D
PEG_ICOMPI and RCOMPO signals should be
shorted and routed
with - max length = 500 mils - typical
+1.05VS impedance = 43 mohms
PEG_ICOMPO signals should be routed with -
1
max length = 500 mils
R1
24.9_0402_1% - typical impedance = 14.5 mohms
JCPU1A
2
J22 PEG_COMP
PEG_ICOMPI
PEG_ICOMPO J21
<16> DMI_CRX_PTX_N0 B27 DMI_RX#[0] PEG_RCOMPO H22
<16> DMI_CRX_PTX_N1 B25 DMI_RX#[1]
<16> DMI_CRX_PTX_N2 A25 DMI_RX#[2] PCIE_CRX_GTX_N[0..15] <23>
<16> DMI_CRX_PTX_N3 B24 K33 PCIE_CRX_GTX_N15
DMI_RX#[3] PEG_RX#[0] PCIE_CRX_GTX_N14
PEG_RX#[1] M35
<16> DMI_CRX_PTX_P0 B28 L34 PCIE_CRX_GTX_N13
DMI_RX[0] PEG_RX#[2] PCIE_CRX_GTX_N12
<16> DMI_CRX_PTX_P1 B26 DMI_RX[1] PEG_RX#[3] J35 PEG Static Lane Reversal - CFG2 is for the 16x
DMI
A24 J32 PCIE_CRX_GTX_N11
<16> DMI_CRX_PTX_P2 DMI_RX[2] PEG_RX#[4]
<16> DMI_CRX_PTX_P3 B23 H34 PCIE_CRX_GTX_N10
DMI_RX[3] PEG_RX#[5] PCIE_CRX_GTX_N9
PEG_RX#[6] H31 1: Normal Operation; Lane # definition matches
G21 G33 PCIE_CRX_GTX_N8 CFG2
<16> DMI_CTX_PRX_N0
E22
DMI_TX#[0] PEG_RX#[7]
G30 PCIE_CRX_GTX_N7 socket pin map definition
<16> DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8] PCIE_CRX_GTX_N6
<16> DMI_CTX_PRX_N2 F21 DMI_TX#[2] PEG_RX#[9] F35
D21 E34 PCIE_CRX_GTX_N5 0:Lane Reversed
<16>
<16>
DMI_CTX_PRX_N3
DMI_CTX_PRX_P0 G22
DMI_TX#[3]
DMI_TX[0]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
E32
D33
PCIE_CRX_GTX_N4
PCIE_CRX_GTX_N3 *
D22 D31 PCIE_CRX_GTX_N2
C <16> DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] C
PCI EXPRESS* - GRAPHICS

F20 B33 PCIE_CRX_GTX_N1
<16> DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] PCIE_CRX_GTX_N0
<16> DMI_CTX_PRX_P3 C21 DMI_TX[3] PEG_RX#[15] C32
PCIE_CRX_GTX_P[0..15] <23>
J33 PCIE_CRX_GTX_P15
PEG_RX[0] PCIE_CRX_GTX_P14
PEG_RX[1] L35
DISCRETE ONLY K34 PCIE_CRX_GTX_P13
PEG_RX[2] PCIE_CRX_GTX_P12
<16> FDI_CTX_PRX_N0 A21 FDI0_TX#[0] PEG_RX[3] H35
1K_0402_5% 2 1 R1275 FDI_FSYNC0 H19 H32 PCIE_CRX_GTX_P11
<16> FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4]
DIS_ONLY@ E19 G34 PCIE_CRX_GTX_P10
FDI_FSYNC1 <16> FDI_CTX_PRX_N2 FDI0_TX#[2] PEG_RX[5] PCIE_CRX_GTX_P9
1K_0402_5% 2 1 R1276 F18 G31
Intel(R) FDI
<16> FDI_CTX_PRX_N3 FDI0_TX#[3] PEG_RX[6] PCIE_CRX_GTX_P8
DIS_ONLY@ B21 F33
<16> FDI_CTX_PRX_N4 FDI1_TX#[0] PEG_RX[7]
1K_0402_5% 2 1 R1277 FDI_INT C20 F30 PCIE_CRX_GTX_P7
DIS_ONLY@ D18 E35
FDI_LSYNC0 <16> FDI_CTX_PRX_N6 FDI1_TX#[2] PEG_RX[9] PCIE_CRX_GTX_P5
1K_0402_5% 2 1 R1278 E17 E33
DIS_ONLY@ F32
1K_0402_5% 2 R1279 FDI_LSYNC1 PEG_RX[11] PCIE_CRX_GTX_P3
1 D34
DIS_ONLY@ PEG_RX[12] PCIE_CRX_GTX_P2
<16> FDI_CTX_PRX_P0 A22 E31
FDI0_TX[0] PEG_RX[13] PCIE_CRX_GTX_P1
<16> FDI_CTX_PRX_P1 G19 C33
FDI0_TX[1] PEG_RX[14] PCIE_CRX_GTX_P0
<16> FDI_CTX_PRX_P2 E20 B32
FDI0_TX[2] PEG_RX[15]
<16> FDI_CTX_PRX_P3 G18 PCIE_CTX_GRX_N[0..15] <23>
FDI0_TX[3] PCIE_CTX_GRX_C_N15 C1 0.1U_0402_10V6K PCIE_CTX_GRX_N15
<16> FDI_CTX_PRX_P4 B20 M29 1 2
FDI1_TX[0] PEG_TX#[0] PCIE_CTX_GRX_C_N14 C2 0.1U_0402_10V6K PCIE_CTX_GRX_N14
<16> FDI_CTX_PRX_P5 C19 M32 1 2
<16> FDI_CTX_PRX_P6 D19 M31 1 2
DIS@
<16> FDI_CTX_PRX_P7 F17 L32 1 2
DIS@
L29 1 2
DIS@
FDI_FSYNC0 PEG_TX#[4] PCIE_CTX_GRX_C_N10 C6 0.1U_0402_10V6K PCIE_CTX_GRX_N10
<16> FDI_FSYNC0 J18 K31 1 2
DIS@
+1.05VS FDI_FSYNC1 FDI0_FSYNC PEG_TX#[5] PCIE_CTX_GRX_C_N9 C7 0.1U_0402_10V6K PCIE_CTX_GRX_N9
<16> FDI_FSYNC1 J17 K28 1 2
DIS@
FDI1_FSYNC PEG_TX#[6] PCIE_CTX_GRX_C_N8 C8 0.1U_0402_10V6K PCIE_CTX_GRX_N8
J30 1 2
DIS@
FDI_INT PEG_TX#[7] PCIE_CTX_GRX_C_N7 C9 0.1U_0402_10V6K PCIE_CTX_GRX_N7
<16> FDI_INT H20 J28 1 2
DIS@
FDI_INT PEG_TX#[8] PCIE_CTX_GRX_C_N6 C10 0.1U_0402_10V6K PCIE_CTX_GRX_N6
H29 1 2
DIS@
PEG_TX#[9]
1
FDI_LSYNC0 J19 G27 PCIE_CTX_GRX_C_N5 C11 1 2

DIS@ 0.1U_0402_10V6K PCIE_CTX_GRX_N5
<16> FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10]
R7 FDI_LSYNC1 H17 E29 PCIE_CTX_GRX_C_N4 C12 1 2
B <16> FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] B
24.9_0402_1% F27 PCIE_CTX_GRX_C_N3 C13 1 2
PEG_TX#[12] PCIE_CTX_GRX_C_N2 C14 0.1U_0402_10V6K PCIE_CTX_GRX_N2
D28 1 2
DIS@
F26 1 2
DIS@
2

E25 1 2
DIS@
EDP_COMP PEG_TX#[15]
A18 DIS@ PCIE_CTX_GRX_P[0..15] <23>
eDP_COMPIO PCIE_CTX_GRX_C_P15 C17 0.1U_0402_10V6K PCIE_CTX_GRX_P15
eDP_COMPIO and ICOMPO signals A17
eDP_ICOMPO PEG_TX[0]
M28 1 2
DIS@
eDP_HPD B16 M33 PCIE_CTX_GRX_C_P14 C18 1 2 0.1U_0402_10V6K PCIE_CTX_GRX_P14
should be shorted near balls eDP_HPD PEG_TX[1]
M30 PCIE_CTX_GRX_C_P13 C19 1 2
DIS@ 0.1U_0402_10V6K PCIE_CTX_GRX_P13
PEG_TX[2] PCIE_CTX_GRX_C_P12 PCIE_CTX_GRX_P12
and routed with typical PEG_TX[3]
L31 C20 1 2
DIS@ 0.1U_0402_10V6K
C15 L28 PCIE_CTX_GRX_C_P11 C21 1 2
impedance <25 mohms D15
eDP_AUX PEG_TX[4]
K30 PCIE_CTX_GRX_C_P10 C22 1 2
eDP_AUX# PEG_TX[5]
eDP
K27 PCIE_CTX_GRX_C_P9 C23 1 2

PEG_TX[6] PCIE_CTX_GRX_C_P8 C24 0.1U_0402_10V6K PCIE_CTX_GRX_P8
J29 1 2
DIS@
C17 J27 1 2
DIS@
eDP_TX[0] PEG_TX[8] PCIE_CTX_GRX_C_P6 C26 0.1U_0402_10V6K PCIE_CTX_GRX_P6
F16 H28 1 2
DIS@
C16 G28 1 2
DIS@
G15 E28 1 2
DIS@
F28 1 2
DIS@
C18 D27 1 2
DIS@
eDP_TX#[0] PEG_TX[13] PCIE_CTX_GRX_C_P1 C31 0.1U_0402_10V6K PCIE_CTX_GRX_P1
E16 E26 1 2
DIS@
eDP_TX#[1] PEG_TX[14] PCIE_CTX_GRX_C_P0 C32 0.1U_0402_10V6K PCIE_CTX_GRX_P0
D16 D25 1 2
DIS@
eDP_TX#[2] PEG_TX[15]
F15 DIS@
eDP_TX#[3]
DIS@
Sandy Bridge_rPGA_Rev1p0
ME@
A A

PROCESSOR(1/7) DMI,FDI,PEG
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
JCPU1B
D D
R10 0_0402_5% DG1.0
A28 CLK_CPU_DMI_R 1 2
BCLK CLK_CPU_DMI <15>
MISC
CLOCKS
C26 A27 CLK_CPU_DMII#_R R11 1 2
<18> H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_DMI# <15>
0_0402_5%
AN34
SKTOCC# R12
A16 2 1 1K_0402_5% DG1.0
DPLL_REF_CLK R13
A15 2 1 1K_0402_5% +1.05VS
DPLL_REF_CLK#
+1.05VS
closs to EC 250~750mils H_CATERR# AL33 CATERR#
R9 1 R14
THERMAL
62_0402_5% 0_0402_5%
1 2 H_PECI_ISO AN33 R8 H_DRAMRST#
<19,45> H_PECI PECI SM_DRAMRST# H_DRAMRST# <7>
2
DDR3
MISC
R15
56_0402_5%
<45> H_PROCHOT# H_PROCHOT# 1 2 H_PROCHOT#_R AL32 AK1 SM_RCOMP0 R16 2 1 140_0402_1%
PROCHOT# SM_RCOMP[0] SM_RCOMP1 R17
SM_RCOMP[1] A5 2 1 25.5_0402_1% DDR3 Compensation Signals
R19 A4 SM_RCOMP2 R18 2 1 200_0402_1%
0_0402_5% SM_RCOMP[2]
1 2 H_THEMTRIP#_R AN32
<19> H_THRMTRIP# THERMTRIP#
AP29 XDP_PRDY# +1.05VS

PRDY# XDP_PREQ#
PREQ# AP27
R22 AR26 XDP_TCK XDP_TMS R20 2 1 51_0402_5%

TCK
PWR MANAGEMENT
C 0_0402_5% XDP_TMS XDP_TDI R21 C
AR27 2 1 51_0402_5% PU/PD for JTAG signals
JTAG & BPM

H_PM_SYNC_R TMS XDP_TRST# XDP_TDO R23
<16> H_PM_SYNC 1 2 AM34 PM_SYNC TRST# AP30 2 1 51_0402_5%
AR28 XDP_TDI XDP_TCK R24 2 1 51_0402_5%

R26 TDI XDP_TDO XDP_TRST# R25
AP26 2 1 51_0402_5%
0_0402_5%1 H_CPUPWRGD_R TDO
<19> H_CPUPWRGD 2 AP33 UNCOREPWRGOOD
2
R29 AL35 XDP_DBRESET# R28 2 1 1K_0402_5% +3VS

DBR#
R27 1 2 PM_DRAM_PWRGD_R V8
130_0402_5% SM_DRAMPWROK
10K_0402_5% AT28 XDP_BPM#0
BPM#[0] XDP_BPM#1
AR29
1
BPM#[1] XDP_BPM#2
AR30
BUF_CPU_RST# BPM#[2] XDP_BPM#3
AR33 AT30
RESET# BPM#[3] XDP_BPM#4
AP32
BPM#[4] XDP_BPM#5
AR31
BPM#[5] XDP_BPM#6
AT31
BPM#[6] XDP_BPM#7
AR32
BPM#[7]
ME@
+3VS +3VALW
Buffered reset to CPU
+1.5V_CPU_VDDQ
1
2
C33 +3VS
B R338 0.1U_0402_16V4Z B
1
10K_0402_5%
2 R30
U1 200_0402_5% +1.05VS
1
1
C34
5
0.1U_0402_16V4Z
2
1
P
B PM_SYS_PWRGD_BUF R32 2
4
O 75_0402_5%
<16> PM_DRAM_PWRGD 2
A
G
5
74AHC1G09GW_TSSOP5 R34 U2
3
@ 43_0402_1% 1 3V
P
R33 BUF_CPU_RST# BUFO_CPU_RST# 4 NC
1 2 Y
39_0402_5% 2 PLT_RST#
A PLT_RST# <18>
G
1
SN74LVC1G07DCKR_SC70-5
1 2
3
D @ R35 @
SUSP 2 Q1 0_0402_5%
<10,51,57> SUSP
G 2N7002_SOT23
2
S
3
A A

PROCESSOR(2/7) PM,XDP,CLK
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
JCPU1C
http://hobi-elektronika.net JCPU1D
<12> DDR_A_D[0..63] SA_CLK[0] AB6 M_CLK_DDR0 <12> <13> DDR_B_D[0..63] SB_CLK[0] AE2 M_CLK_DDR2 <13>
SA_CLK#[0] AA6 M_CLK_DDR#0 <12> SB_CLK#[0] AD2 M_CLK_DDR#2 <13>
DDR_A_D0 C5 V9 DDR_B_D0 C9 R9
DDR_A_D1 SA_DQ[0] SA_CKE[0] DDR_CKE0_DIMMA <12> DDR_B_D1 SB_DQ[0] SB_CKE[0] DDR_CKE2_DIMMB <13>
D5 SA_DQ[1] A7 SB_DQ[1]
DDR_A_D2 D3 DDR_B_D2 D10
DDR_A_D3 SA_DQ[2] DDR_B_D3 SB_DQ[2]
D2 C8
D6 AA5 M_CLK_DDR1 <12> A9 AE1 M_CLK_DDR3 <13>
D DDR_A_D5 SA_DQ[4] SA_CLK[1] DDR_B_D5 SB_DQ[4] SB_CLK[1] D
C6 AB5 M_CLK_DDR#1 <12> A8 AD1 M_CLK_DDR#3 <13>
DDR_A_D6 SA_DQ[5] SA_CLK#[1] DDR_B_D6 SB_DQ[5] SB_CLK#[1]
C2 V10 DDR_CKE1_DIMMA <12> D9 R10 DDR_CKE3_DIMMB <13>
DDR_A_D7 SA_DQ[6] SA_CKE[1] DDR_B_D7 SB_DQ[6] SB_CKE[1]
C3 D8
F10 G4
F8 F4
G10 AB4 F1 AB2
DDR_A_D11 SA_DQ[10] RSVD_TP[1] DDR_B_D11 SB_DQ[10] RSVD_TP[11]
G9 AA4 G1 AA2
F9 W9 G5 T9
F7 F5
G8 F2
G7 G2
K4 SA_DQ[16] RSVD_TP[4] AB3 J7 SB_DQ[16] RSVD_TP[14] AA1
DDR_A_D17 K5 AA3 DDR_B_D17 J8 AB1
K1 SA_DQ[18] RSVD_TP[6] W10 K10 SB_DQ[18] RSVD_TP[16] T10
DDR_A_D19 J1 DDR_B_D19 K9
J5 SA_DQ[20] J9 SB_DQ[20]
DDR_A_D21 J4 DDR_B_D21 J10
J2 SA_DQ[22] SA_CS#[0] AK3 DDR_CS0_DIMMA# <12> K8 SB_DQ[22] SB_CS#[0] AD3 DDR_CS2_DIMMB# <13>
DDR_A_D23 K2 AL3 DDR_B_D23 K7 AE3
DDR_A_D24 SA_DQ[23] SA_CS#[1] DDR_CS1_DIMMA# <12> DDR_B_D24 SB_DQ[23] SB_CS#[1] DDR_CS3_DIMMB# <13>
M8 SA_DQ[24] RSVD_TP[7] AG1 M5 SB_DQ[24] RSVD_TP[17] AD6
DDR_A_D25 N10 AH1 DDR_B_D25 N4 AE6
N8 SA_DQ[26] N2 SB_DQ[26]
DDR_A_D27 N7 DDR_B_D27 N1
M10 SA_DQ[28] M4 SB_DQ[28]
DDR_A_D29 M9 AH3 DDR_B_D29 N5 AE4
SA_DQ[29] SA_ODT[0] M_ODT0 <12> SB_DQ[29] SB_ODT[0] M_ODT2 <13>
DDR SYSTEM MEMORY B

DDR_A_D30 N9 AG3 DDR_B_D30 M2 AD4
DDR SYSTEM MEMORY A

DDR_A_D31 SA_DQ[30] SA_ODT[1] M_ODT1 <12> DDR_B_D31 SB_DQ[30] SB_ODT[1] M_ODT3 <13>
M7 SA_DQ[31] RSVD_TP[9] AG2 M1 SB_DQ[31] RSVD_TP[19] AD5
DDR_A_D32 AG6 AH2 DDR_B_D32 AM5 AE5
AG5 SA_DQ[33] AM6 SB_DQ[33]
DDR_A_D34 AK6 DDR_B_D34 AR3
AK5 SA_DQ[35] AP3 SB_DQ[35]
DDR_A_D36 AH5 DDR_B_D36 AN3
C DDR_A_D37 SA_DQ[36] DDR_A_DQS#0 DDR_A_DQS#[0..7] <12> DDR_B_D37 SB_DQ[36] DDR_B_DQS#0 DDR_B_DQS#[0..7] <13> C
AH6 SA_DQ[37] SA_DQS#[0] C4 AN2 SB_DQ[37] SB_DQS#[0] D7
DDR_A_D38 AJ5 G6 DDR_A_DQS#1 DDR_B_D38 AN1 F3 DDR_B_DQS#1
DDR_A_D39 SA_DQ[38] SA_DQS#[1] DDR_A_DQS#2 DDR_B_D39 SB_DQ[38] SB_DQS#[1] DDR_B_DQS#2
AJ6 SA_DQ[39] SA_DQS#[2] J3 AP2 SB_DQ[39] SB_DQS#[2] K6
DDR_A_D40 AJ8 M6 DDR_A_DQS#3 DDR_B_D40 AP5 N3 DDR_B_DQS#3
AK8 SA_DQ[41] SA_DQS#[4] AL6 AN9 SB_DQ[41] SB_DQS#[4] AN5
DDR_A_D42 AJ9 AM8 DDR_A_DQS#5 DDR_B_D42 AT5 AP9 DDR_B_DQS#5
AK9 SA_DQ[43] SA_DQS#[6] AR12 AT6 SB_DQ[43] SB_DQS#[6] AK12
DDR_A_D44 AH8 AM15 DDR_A_DQS#7 DDR_B_D44 AP6 AP15 DDR_B_DQS#7
DDR_A_D45 SA_DQ[44] SA_DQS#[7] DDR_B_D45 SB_DQ[44] SB_DQS#[7]
AH9 AN8
AL9 AR6
AL8 AR5
AP11 DDR_A_DQS[0..7] <12> AR9 DDR_B_DQS[0..7] <13>
DDR_A_D49 SA_DQ[48] DDR_A_DQS0 DDR_B_D49 SB_DQ[48] DDR_B_DQS0
AN11 D4 AJ11 C7
DDR_A_D50 SA_DQ[49] SA_DQS[0] DDR_A_DQS1 DDR_B_D50 SB_DQ[49] SB_DQS[0] DDR_B_DQS1
AL12 F6 AT8 G3
AM12 K3 AT9 J6
AM11 N6 AH11 M3
AL11 AL5 AR8 AN6
AP12 AM9 AJ12 AP8
AN12 AR11 AH12 AK11
AJ14 AM14 AT11 AP14
DDR_A_D57 SA_DQ[56] SA_DQS[7] DDR_B_D57 SB_DQ[56] SB_DQS[7]
AH14 AN14
AL15 AR14
AK15 AT14
AL14 DDR_A_MA[0..15] <12> AT12 DDR_B_MA[0..15] <13>
DDR_A_D61 SA_DQ[60] DDR_A_MA0 DDR_B_D61 SB_DQ[60] DDR_B_MA0
AK14 AD10 AN15 AA8
DDR_A_D62 SA_DQ[61] SA_MA[0] DDR_A_MA1 DDR_B_D62 SB_DQ[61] SB_MA[0] DDR_B_MA1
AJ15 W1 AR15 T7
DDR_A_D63 SA_DQ[62] SA_MA[1] DDR_A_MA2 DDR_B_D63 SB_DQ[62] SB_MA[1] DDR_B_MA2
AH15 W2 AT15 R7
SA_DQ[63] SA_MA[2] DDR_A_MA3 SB_DQ[63] SB_MA[2] DDR_B_MA3
W7 T6
SA_MA[3] DDR_A_MA4 SB_MA[3] DDR_B_MA4
V3 T2
V2 T4
W3 T3
<12> DDR_A_BS0 AE10 W6 <13> DDR_B_BS0 AA9 R2
B SA_BS[0] SA_MA[7] DDR_A_MA8 SB_BS[0] SB_MA[7] DDR_B_MA8 B
<12> DDR_A_BS1 AF10 V1 <13> DDR_B_BS1 AA7 T5
SA_BS[1] SA_MA[8] DDR_A_MA9 SB_BS[1] SB_MA[8] DDR_B_MA9
<12> DDR_A_BS2 V6 W5 <13> DDR_B_BS2 R6 R3
SA_BS[2] SA_MA[9] DDR_A_MA10 SB_BS[2] SB_MA[9] DDR_B_MA10
AD8 AB7
V4 R1
W4 T1
<12> DDR_A_CAS# AE8 AF8 <13> DDR_B_CAS# AA10 AB10
SA_CAS# SA_MA[13] DDR_A_MA14 SB_CAS# SB_MA[13] DDR_B_MA14
<12> DDR_A_RAS# AD9 V5 <13> DDR_B_RAS# AB8 R5
SA_RAS# SA_MA[14] DDR_A_MA15 SB_RAS# SB_MA[14] DDR_B_MA15
<12> DDR_A_WE# AF9 V7 <13> DDR_B_WE# AB9 R4
SA_WE# SA_MA[15] SB_WE# SB_MA[15]
Sandy Bridge_rPGA_Rev1p0 Sandy Bridge_rPGA_Rev1p0

ME@ ME@
+1.5V
@ R36
1
0_0402_5%
1 2 R37
1K_0402_5%
R38
2
1K_0402_5%
S
<6> H_DRAMRST# H_DRAMRST# 3 1 DDR3_DRAMRST#_R 1 2 DDR3_DRAMRST# <12,13>

2
Q2
R39 BSS138_NL_SOT23-3
G
2
4.99K_0402_1%
1
A R40 A
0_0402_5%
1 2 DRAMRST_CNTRL
<15> DRAMRST_CNTRL_PCH
1
C35
Eiffel used 0.01u Security Classification Compal Secret Data Compal Electronics, Inc.
Module design used 0.047u Issued Date 2009/12/01 Deciphered Date 2010/12/31 Title
0.047U_0402_16V4Z
2
PROCESSOR(3/7) DDRIII
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.netCFG Straps for Processor
CFG2
1
R41
1K_0402_1%
2
D D
JCPU1E PEG Static Lane Reversal - CFG2 is for the 16x
RSVD28
L7 1: Normal Operation; Lane # definition matches
RSVD29
AG7 CFG2 socket pin map definition
AK28 CFG[0] RSVD30 AE7
AK29 CFG[1] RSVD31 AK2
CFG2 AL26 W8 0:Lane Reversed
CFG4
AL27
AK26
CFG[2]
CFG[3]
CFG[4]
RSVD32
*
CFG5 AL29 AT26 CFG4
CFG6 CFG[5] RSVD33
AL30 CFG[6] RSVD34 AM33
1
CFG7 AM31 AJ27
CFG[7] RSVD35
AM32 CFG[8]
AM30 @ R42
CFG[9] 1K_0402_1%
AM28 CFG[10]
AM26
2
CFG[11]
AN28 CFG[12]
AN31 CFG[13] RSVD37 T8
AN26 CFG[14] RSVD38 J16
AM27 CFG[15] RSVD39 H16
AK31 CFG[16] RSVD40 G16
AN29 CFG[17]
Display Port Presence Strap
C C
AR35 1 : Disabled; No Physical Display Port
T9
T10
PAD
PAD
AJ31
AH31
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
RSVD41
RSVD42
RSVD43
AT34
AT33
CFG4 * attached to Embedded Display Port
T11 PAD AJ33 AP35
VCC_VAL_SENSE RSVD44
T12 PAD AH33 VSS_VAL_SENSE RSVD45 AR34 0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
AJ26
RSVD5
RESERVED
B34 CFG6
RSVD46
B4 A33
RSVD6 RSVD47 CFG5
D1 A34
RSVD7 RSVD48
B35
RSVD49
1
C35
1 RSVD50
1
@ R43 @ R44
R64 R353 F25 1K_0402_1% 1K_0402_1%
1K_0402_1% 1K_0402_1% RSVD8
F24
@ @ RSVD9
F23
2
RSVD10
D24 AJ32
2
RSVD11 RSVD51
G25 AK32
RSVD12 RSVD52
G24
RSVD13
E23
RSVD14
D23
RSVD15 PAD T13
C30 AH27
RSVD16 VCC_DIE_SENSE
A31
RSVD17
B30
RSVD18
B29
RSVD19 PCIE Port Bifurcation Straps
D30 AN35
RSVD20 RSVD54
B31 AM35
RSVD21 RSVD55
A30 11: (Default) x16 - Device 1 functions 1 and 2 disabled
B
C29
RSVD22
RSVD23
CFG[6:5] *10: x8, x8 - Device 1 function 1 enabled ; function 2 B
J20
disabled
RSVD24
B18
RSVD25 RSVD56
AT2 01: Reserved - (Device 1 function 1 disabled ; function
A19 AT1 2 enabled)
VCCIO_SEL RSVD57
AR1
RSVD58
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
J15
RSVD27
B1
KEY CFG7
1
@R45
@ R45
1K_0402_1%
2
ME@
PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB

CFG7 de assertion
A
0: PEG Wait for BIOS for training A

PROCESSOR(4/7) RSVD,CFG
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
POWER
JCPU1F
+CPU_CORE Cap quantity follow HR_PDDG_Rev07

(6/16 change 10uF_0603_6.3V)*5 22uF*7 NO-STUFF
QC=94A +1.05VS
18A
DC=53A AG35
(22uF_0805_6.3V)*13
VCC1 +1.05VS
1 1 1 1 1 AG34 VCC2 VCCIO1 AH13
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
AG33 AH10 1 1 1 1 1 1 1 1 1 1
VCC3 VCCIO2
C36
C37
C38
C39
C40
22U_0805_6.3V6M
C41
22U_0805_6.3V6M
C42
22U_0805_6.3V6M
C43
22U_0805_6.3V6M
C44
22U_0805_6.3V6M
C54
22U_0805_6.3V6M
C45
22U_0805_6.3V6M
C46
22U_0805_6.3V6M
C55
22U_0805_6.3V6M
C56
22U_0805_6.3V6M
C47
AG32 AG10
VCC4 VCCIO3
AG31 AC10
D 2 2 2 2 2 VCC5 VCCIO4 D
AG30 Y10
VCC6 VCCIO5 2 2 2 2 2 2 2 2 2 2
AG29 U10
VCC7 VCCIO6
AG28 P10
VCC8 VCCIO7
AG27 L10
VCC9 VCCIO8
AG26 J14
VCC10 VCCIO9
AF35 J13
VCC11 VCCIO10
1 1 1 1 1 1 AF34 J12
10U_0603_6.3V6M VCC12 VCCIO11
C48
10U_0603_6.3V6M
C49
10U_0603_6.3V6M
C50
10U_0603_6.3V6M
C51
10U_0603_6.3V6M
C52
10U_0603_6.3V6M
C53
AF33 J11 1 1 1 1 1 1 1 1 1
VCC13 VCCIO12
22U_0805_6.3V6M
C57
22U_0805_6.3V6M
C58
22U_0805_6.3V6M
C59
22U_0805_6.3V6M
C60
22U_0805_6.3V6M
C61
22U_0805_6.3V6M
C62
22U_0805_6.3V6M
C63
22U_0805_6.3V6M
C64
22U_0805_6.3V6M
C65
AF32 H14
@ VCC14 VCCIO13 @ @ @ @ @ @ @
AF31 H12
2 2 2 2 2 2 VCC15 VCCIO14
AF30 H11
VCC16 VCCIO15 2 2 2 2 2 2 2 2 2
AF29 VCC17 VCCIO16 G14
PEG AND DDR

AF26 VCC20 VCCIO19 F14
AD35 VCC21 VCCIO20 F13
AD34 F12
+CPU_CORE (22uF_0805_6.3V)*16 AD33
VCC22 VCCIO21
F11
VCC23 VCCIO22
AD32 VCC24 VCCIO23 E14
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
330U_D2_2.5VY_R9M
AD31 VCC25 VCCIO24 E12 1 1 1 1 1
330U_2.5V_M
C69
C72
C73
AD30 VCC26
C288
AD29 E11 + C922 + + + +
1 1 1 1 1 VCC27 VCCIO25
22U_0805_6.3V6M
C66
22U_0805_6.3V6M
C67
22U_0805_6.3V6M
C68
22U_0805_6.3V6M
C70
22U_0805_6.3V6M
C71
AD28 D14 330U_2.5V_M @ @
VCC28 VCCIO26
AD27 VCC29 VCCIO27 D13
2 2 2 2 2
AD26 VCC30 VCCIO28 D12
2 2 2 2 2
AC35 VCC31 VCCIO29 D11
AC34 VCC32 VCCIO30 C14
AC30 B14
1 1 1 1 1 AC29
VCC36 VCCIO34
B12
OSCAN
VCC37 VCCIO35
22U_0805_6.3V6M
C74
22U_0805_6.3V6M
C75
22U_0805_6.3V6M
C76
22U_0805_6.3V6M
C77
22U_0805_6.3V6M
C78
C C
AC28 A14
AC27
VCC38 VCCIO36
A13
(330U 2.5V M 6.3X5.9 R15M)*1=(SF000002000)
VCC39 VCCIO37
AC26 VCC40 VCCIO38 A12
2 2 2 2 2 AA35 A11
VCC41 VCCIO39
AA34 VCC42
AA33 VCC43 VCCIO40 J23
AA32 VCC44
AA31
VCC45
AA30
VCC46
1 1 1 1 1 AA29
VCC47
22U_0805_6.3V6M
C79
22U_0805_6.3V6M
C80
22U_0805_6.3V6M
C81
22U_0805_6.3V6M
C82
22U_0805_6.3V6M
C83
AA28
VCC48
AA27
VCC49
AA26
2 2 2 2 2 VCC50
CORE SUPPLY
Y35 +1.05VS
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
1
Y31
VCC55 R46
Y30
VCC56
1 1 1 1 Y29 75_0402_5%
VCC57
22U_0805_6.3V6M
C84
22U_0805_6.3V6M
C85
22U_0805_6.3V6M
C86
22U_0805_6.3V6M
C87
Y28
@ @ @ VCC58
Y27 VR_SVID_CLK series-resistors close to VR
2
VCC59
Y26
2 2 2 2 VCC60
V35
VCC61
SVID
V34 AJ29 H_CPU_SVIDALRT# R47 1 2 43_0402_5%
VCC62 VIDALERT# H_CPU_SVIDCLK VR_SVID_ALRT# <60>
V33 AJ30 R48 1 2 0_0402_5%
VCC63 VIDSCLK H_CPU_SVIDDAT VR_SVID_CLK <60>
V32 AJ28 R49 1 2 0_0402_5%
VCC64 VIDSOUT VR_SVID_DAT <60>
V31
+CPU_CORE VCC65
V30
VCC66 R50
V29 2 1 130_0402_5% +1.05VS
VCC67
V28
VCC68
V27
B VCC69 B
V26
VCC70
330U_X_2VM_R6M
330U_X_2VM_R6M
330U_X_2VM_R6M
330U_X_2VM_R6M
1 1 1 1 U35
VCC71
U34
VCC72
C88
C89
C90
C91
+ + + + U33
VCC73
U32
(330uF)*4 U31
VCC74
2 2 2 2 VCC75
U30
VCC76
U29
U28
VCC77 VCC_SENCE 100ohm +-1% pull-up to VCC near processor
VCC78
U27
VCC79
U26
VCC80 +CPU_CORE
R35
VCC81
R34
VCC82
R33
VCC83
1
R32
VCC84 R51
R31
VCC85
R30 100_0402_1%
VCC86
R29
VCC87
SENSE LINES
R28
2
VCC88
R27 AJ35 VCCSENSE_R R52 1 2 0_0402_5%
VCCSENSE <60>
VCC89 VCC_SENSE
R26 AJ34 VSSSENSE_R R53 1 2 0_0402_5%
VSSSENSE <60>
VCC90 VSS_SENSE R1294 10_0402_1%
P35
VCC91 R1295 R1296
P34 2 1 +1.05VS
VCC92
1
P33
VCC93 R54 @ @
P32 B10 VCCIO_SENSE <58>
VCC94 VCCIO_SENSE VSSIO_SENSE 100_0402_1%
P31 A10
VCC95 VSSIO_SENSE 27.4_0402_1% 27.4_0402_1%
P30
VCC96
2
P29
2
VCC97 R1297
P28
VCC98
P27 10_0402_1%
VCC99
P26
VCC100
1
A A
VSS_SENCE 100ohm +-1% pull-down to GND near processor

ME@ Security Classification Compal Secret Data Compal Electronics, Inc.
PROCESSOR(5/7) PWR,BYPASS
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
+1.5V @ J1 +1.5V_CPU_VDDQ
1 2
6/24 R56 change to 15K
1
PAD-OPEN 4x4m +1.5V
1
R55
1 2 220_0402_5% @ C92
<6,51,57> SUSP 0_0402_5% R668 0.1U_0402_10V6K
2
@
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1
D
C95
C96
C286
C287
+3VALW +VSB U3 1 1 1 1
8 1 Q3 2 RUN_ON_CPU1.5VS3#
D D S 2N7002_SOT23 G D
7 2
D S
1
6 3 S
3
D S
1
R56 5 4 +1.5V_CPU_VDDQ 2 2 2 2
R667 D G
100K_0402_5% 15K_0402_1% DMN3030LSS-13_SOP8L-8
2
2
RUN_ON_CPU1.5VS3# RUN_ON_CPU1.5VS3
1
1
1
D D
1 2 2 Q7 2 Q4 R57 C97
<45> CPU1.5V_S3_GATE
0_0402_5% R58 G 2N7002_SOT23 G 2N7002_SOT23 330K_0402_5% 0.1U_0603_25V7K
S S @ 2
2
1 @ 2
<45,51,56,57,58,59> SUSP#
0_0402_5% R59
+VGFX_CORE JCPU1G
POWER
SENSE
LINES
AT24 VAXG1 VAXG_SENSE AK35 VCC_AXG_SENSE <60>
AT23 VAXG2 VSSAXG_SENSE AK34 VSS_AXG_SENSE <60>
1
1 1 1 1 1 1 1 1 1 1 AT21 VAXG3
22U_0805_6.3V6M
C98
22U_0805_6.3V6M
C99
22U_0805_6.3V6M
C100
22U_0805_6.3V6M
C101
22U_0805_6.3V6M
C102
22U_0805_6.3V6M
C103
22U_0805_6.3V6M
C104
22U_0805_6.3V6M
C105
22U_0805_6.3V6M
C106
22U_0805_6.3V6M
C107
AT20 VAXG4
0_0402_5% +1.5V_CPU_VDDQ
AT18 VAXG5
R60 AT17 R61
DIS_ONLY@ 2 2 2 2 2 2 2 2 2 2 VAXG6 0_0402_5%
AR24
2
VAXG7
1
AR23 VAXG8 2 1
C UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ UMA@ R62 C
AR21 VAXG9
AR20 100_0402_1%
VAXG10
VREF
AR18 VAXG11
AR17
2
VAXG12 +V_SM_VREF_CNT +V_SM_VREF
AP24 VAXG13 SM_VREF AL1 2 3
AP23 VAXG14
1
AP21 1 100K_0402_5% @Q5
@ Q5
VAXG15 C114 R666 AP2302GN-HF_SOT23-3 R63
1 1 1 1 1 1 AP20
VAXG16
22U_0805_6.3V6M
C108
22U_0805_6.3V6M
C109
22U_0805_6.3V6M
C110
22U_0805_6.3V6M
C111
22U_0805_6.3V6M
C112
22U_0805_6.3V6M
C113 AP18 0.1U_0402_16V4Z @ 100_0402_1%
VAXG17 1
AP17
VAXG18 2 RUN_ON_CPU1.5VS3
AN24
2
2 2 2 @ 2 @ 2 @ 2 @ VAXG19
AN23
VAXG20
AN21
UMA@ UMA@ VAXG21
AN20
VAXG22
DDR3 -1.5V RAILS

AN18
VAXG23 +1.5V_CPU_VDDQ
AN17
VAXG24
GRAPHICS
AM24 AF7
VAXG25 VDDQ1
AM23 AF4
VAXG26 VDDQ2
330U_D2_2.5VY_R9M
AM21 AF1 1
VAXG27 VDDQ3
330U_D2_2.5VY_R9M
C123
1 1 AM20 AC7 1 1 1 1 1 1
VAXG28 VDDQ4
330U_2.5V_M
C116
10U_0603_6.3V6M
C117
10U_0603_6.3V6M
C118
10U_0603_6.3V6M
C119
10U_0603_6.3V6M
C120
10U_0603_6.3V6M
C121
10U_0603_6.3V6M
C122
AM18 AC4 +
VAXG29 VDDQ5
C115
+ + @ AM17 AC1
UMA@ VAXG30 VDDQ6 @
AL24 Y7
VAXG31 VDDQ7 2 2 2 2 2 2 2
AL23 Y4
2 2 VAXG32 VDDQ8
AL21 Y1
VAXG33 VDDQ9
AL20 U7
VAXG34 VDDQ10
AL18 U4
VAXG35 VDDQ11
AL17 U1
VAXG36 VDDQ12
AK24 P7
VAXG37 VDDQ13
AK23 P4
OSCAN AK21
VAXG38 VDDQ14
P1
VAXG39 VDDQ15
AK20
B (330U 2.5V M 6.3X4.2 R17M)*1=(SF000002Z00) AK18
VAXG40 B
VAXG41
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
AJ21
VAXG45
AJ20
VAXG46
AJ18
VAXG47
AJ17
VAXG48 +VCCSA
AH24
SA RAIL
VAXG49
AH23
VAXG50 +VCCSA
AH21 M27
VAXG51 VCCSA1
AH20 M26
VAXG52 VCCSA2
AH18
VAXG53 VCCSA3
L26 1 R65 2 100_0402_1% VCCSA_SENSE VCCSA_SENSE <57>
330U_D2_2.5VY_R9M
AH17 J26 1 1 1 1 1
VAXG54 VCCSA4
10U_0805_6.3V6M
C124
10U_0805_6.3V6M
C125
10U_0805_6.3V6M
C126
10U_0805_6.3V6M
C127
C128
J25
VCCSA5 @ +
J24
VCCSA6
H26
VCCSA7 2 2 2 2
H25
VCCSA8 2 1 2 0_0402_5% VSSSA_SENSE <57>
1.8V RAIL
R66
+1.8VS R67
0_0805_5%
1 2 +1.8VS_VCCPLL B6 H23 VCCSA_SENSE
VCCPLL1 VCCSA_SENSE
MISC
A6
VCCPLL2
10U_0805_6.3V6M
C130
1U_0402_6.3V6K
C131
1U_0402_6.3V6K
C132
1 1 1 1 A2 @
VCCPLL3
22U_0805_6.3V6M
C154
22U_0805_6.3V6M
C345
1 R68 1 2 0_0402_5%
C22 H_FC_C22
FC_C22
C24
2 @ 2 @ 2 2 VCCSA_VID1
2 R69 1 2 1K_0402_1%
A Sandy Bridge_rPGA_Rev1p0 A
ME@
VCCSA_SEL <57>
6/9 change 330U to 22U X2

PROCESSOR(6/7) PWR
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
JCPU1H JCPU1I
D D
AT35 AJ22
VSS1 VSS81
AT32 AJ19
VSS2 VSS82
AT29 AJ16 T35 F22
VSS3 VSS83 VSS161 VSS234
AT27 AJ13 T34 F19
AT25 AJ10 T33 E30
AT22 AJ7 T32 E27
AT19 AJ4 T31 E24
AT16 AJ3 T30 E21
AT13 AJ2 T29 E18
AT10 AJ1 T28 E15
AT7 AH35 T27 E13
AT4 VSS12 VSS92 AH34 T26 VSS170 VSS243 E10
AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8
AR10 VSS19 VSS99 AH22 N35 VSS177 VSS250 E3
AR2 VSS22 VSS102 AH7 N32 VSS180 VSS253 D35
AP34 VSS23 VSS103 AH4 N31 VSS181 VSS254 D32
AP31 VSS24 VSS104 AG9 N30 VSS182 VSS255 D29
AP22 VSS27 VSS107 AF6 N27 VSS185 VSS258 D17
AP19 VSS28 VSS108 AF5 N26 VSS186 VSS259 C34
AP16 VSS29 VSS109 AF3 M34 VSS187 VSS260 C31
AP13 VSS30 VSS110 AF2 L33 VSS188 VSS261 C28
AP10 VSS31 VSS111 AE35 L30 VSS189 VSS262 C27
C C
AN30 VSS35 VSS115 AE31 L6 VSS193 VSS266 C1
AN27 VSS36 VSS116 AE30 L5 VSS194 VSS267 B22
AN25 AE29 L4 B19
AN22
AN19
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
AE28
AE27
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
AN16 AE26 L1 B13
AN13 AE9 K35 B11
AN10 AD7 K32 B9
AN7 AC9 K29 B8
AN4 AC8 K26 B7
AM29 AC6 J34 B5
AM25 AC5 J31 B3
AM22 AC3 H33 B2
AM19 AC2 H30 A35
AM16 AB35 H27 A32
AM13 AB34 H24 A29
AM10 AB33 H21 A26
AM7 AB32 H18 A23
AM4 AB31 H15 A20
AM3 AB30 H13 A3
AM2 AB29 H10
VSS55 VSS135 VSS213
AM1 AB28 H9
VSS56 VSS136 VSS214
AL34 AB27 H8
VSS57 VSS137 VSS215
AL31 AB26 H7
VSS58 VSS138 VSS216
AL28 Y9 H6
VSS59 VSS139 VSS217
AL25 Y8 H5
VSS60 VSS140 VSS218
AL22 Y6 H4
VSS61 VSS141 VSS219
AL19 Y5 H3
VSS62 VSS142 VSS220
AL16 Y3 H2
VSS63 VSS143 VSS221
AL13 Y2 H1
B VSS64 VSS144 VSS222 B
AL10 W35 G35
VSS65 VSS145 VSS223
AL7 W34 G32
VSS66 VSS146 VSS224
AL4 W33 G29
VSS67 VSS147 VSS225
AL2 W32 G26
VSS68 VSS148 VSS226
AK33 W31 G23
VSS69 VSS149 VSS227
AK30 W30 G20
VSS70 VSS150 VSS228
AK27 W29 G17
VSS71 VSS151 VSS229
AK25 W28 G11
VSS72 VSS152 VSS230
AK22 W27 F34
VSS73 VSS153 VSS231
AK19 W26 F31
VSS74 VSS154 VSS232
AK16 U9 F29
VSS75 VSS155 VSS233
AK13 U8
VSS76 VSS156
AK10 U6
VSS77 VSS157
AK7 U5
VSS78 VSS158
AK4 U3
VSS79 VSS159
AJ25 U2
VSS80 VSS160
Sandy Bridge_rPGA_Rev1p0 Sandy Bridge_rPGA_Rev1p0

ME@ ME@
A A

PROCESSOR(7/7) VSS
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net <7> DDR_A_D[0..63]

+1.5V
1
+VREF_DQ_DIMMA +1.5V +1.5V <7> DDR_A_DQS[0..7]
R70
4BA2/6W 1K_0402_1%
<7> DDR_A_DQS#[0..7] +VREF_DQ_DIMMA
DDR3 SO-DIMM A <7> DDR_A_MA[0..15]
2
JDIMM1
+VREF_DQ_DIMMA 1 2
VREF_DQ VSS1
1
3 4 DDR_A_D4
VSS2 DQ4
0.1U_0402_10V6K
2.2U_0603_6.3V6K
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5
C133
C134
1 1 DDR_A_D1 7 8 R71
D DQ1 VSS3 DDR_A_DQS#0 1K_0402_1% D
9 VSS4 DQS#0 10
DDR_A_DM0 11 12 DDR_A_DQS0
2
DM0 DQS0
13 VSS5 VSS6 14
2 2 DDR_A_D2 DDR_A_D6
15 DQ2 DQ6 16
DQ3 DQ7
19 VSS7 VSS8 20
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 DQ9 DQ13 24
25 VSS9 VSS10 26
DDR_A_DQS#1 27 28 DDR_A_DM1
DDR_A_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 DQS1 RESET# 30 DDR3_DRAMRST# <7,13>
31 VSS11 VSS12 32
35 DQ11 DQ15 36
37 VSS13 VSS14 38
41 DQ17 DQ21 42
43 VSS15 VSS16 44
DDR_A_DQS2 DQS#2 DM2
47 DQS2 VSS17 48
49 50 DDR_A_D22
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS19 DDR_A_D28
55 VSS20 DQ28 56
DDR_A_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_A_DQS#3
DDR_A_DM3 VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
69 DQ27 DQ31 70
71 VSS25 VSS26 72
C C
<7> DDR_CKE0_DIMMA DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA

CKE0 CKE1 DDR_CKE1_DIMMA <7>
75 VDD1 VDD2 76
77 78 DDR_A_MA15
DDR_A_BS2 NC1 A15 DDR_A_MA14
<7> DDR_A_BS2 79 BA2 A14 80
81 VDD3 VDD4 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 A9 A7 86
87 VDD5 VDD6 88
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD7 VDD8 94 OSCAN (220uF_6.3V_5.9L_ESR15m)*1=(SF000001500)
DDR_A_MA1 A3 A2 DDR_A_MA0
97 A1 A0 98
M_CLK_DDR0
99 VDD9 VDD10 100
M_CLK_DDR1
Layout Note: (10uF_0603_6.3V)*8
<7> M_CLK_DDR0 101 CK0 CK1 102 M_CLK_DDR1 <7>
<7> M_CLK_DDR#0 M_CLK_DDR#0 103 104 M_CLK_DDR#1
M_CLK_DDR#1 <7>
Place near DIMM
CK0# CK1#
105 106
DDR_A_MA10 107
VDD11 VDD12
108 DDR_A_BS1 (0.1uF_402_10V)*4
A10/AP BA1 DDR_A_BS1 <7> +1.5V
<7> DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS#
BA0 RAS# DDR_A_RAS# <7>
111 VDD13 VDD14 112
<7> DDR_A_WE# DDR_A_WE# 113 114 DDR_CS0_DIMMA#
WE# S0# DDR_CS0_DIMMA# <7>
1
<7> DDR_A_CAS# DDR_A_CAS# 115 116 M_ODT0
CAS# ODT0 M_ODT0 <7> +1.5V
117 118 R72
DDR_A_MA13 VDD15 VDD16 M_ODT1 1K_0402_1%
119 A13 ODT1 120 M_ODT1 <7>
<7> DDR_CS1_DIMMA# DDR_CS1_DIMMA# 121 122
S1# NC2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
123 124
2
VDD17 VDD18
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
125 126 +VREF_CA 1
NCTEST VREF_CA
C137
C138
C139
C140
C141
C142
C143
C144
C145
C146
C147
C148
127 VSS27 VSS28 128 1 1 1 1 1 1 1 1 1 1 1 1
0.1U_0402_10V6K
2.2U_0603_6.3V6K
DDR_A_D32 129 130 DDR_A_D36 + C149
DQ32 DQ36
1
C135
C136
B DDR_A_D33 131 132 DDR_A_D37 1 1 220U_6.3V_M B
DQ33 DQ37 @ @
133 VSS29 VSS30 134
DDR_A_DQS#4 DDR_A_DM4 R73 2 2 2 2 2 2 2 2 2 2 2 2 2
135 DQS#4 DM4 136
DDR_A_DQS4 137 138 1K_0402_1%
DQS4 VSS31 DDR_A_D38 2 2
139 140
2
DDR_A_D34 VSS32 DQ38 DDR_A_D39
141 DQ34 DQ39 142
DDR_A_D35 143 144
DQ35 VSS33 DDR_A_D44
145 VSS34 DQ44 146
DDR_A_D40 147 148 DDR_A_D45
DDR_A_D41 DQ40 DQ45
149 DQ41 VSS35 150
151 152 DDR_A_DQS#5
DDR_A_DM5 VSS36 DQS#5 DDR_A_DQS5
153 DM5 DQS5 154
155 VSS37 VSS38 156
DDR_A_D42 157 158 DDR_A_D46 Layout Note:
159 DQ43 DQ47 160
161 162 Place near DIMM
DDR_A_D48 VSS39 VSS40 DDR_A_D52
163 DQ48 DQ52 164
DDR_A_D49 165 166 DDR_A_D53
DQ49 DQ53
167 VSS41 VSS42 168
DDR_A_DQS6 DQS#6 DM6 +0.75VS
171 DQS6 VSS43 172
173 174 DDR_A_D54 DDR_A_DM0
DDR_A_D50 VSS44 DQ54 DDR_A_D55 DDR_A_DM1
175 DQ50 DQ55 176
DDR_A_D51 177 178 DDR_A_DM2
DQ51 VSS45 DDR_A_D60 DDR_A_DM3
179 VSS46 DQ60 180
C150
1U_0402_6.3V6K
C151
1U_0402_6.3V6K
C152
1U_0402_6.3V6K
C153
1U_0402_6.3V6K
DDR_A_D56 181 182 DDR_A_D61 DDR_A_DM4
DDR_A_D57 DQ56 DQ61 DDR_A_DM5
183 DQ57 VSS47 184 1 1 1 1
185 186 DDR_A_DQS#7 DDR_A_DM6
DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7 DDR_A_DM7
187 DM7 DQS7 188
189 VSS49 VSS50 190
DDR_A_D58 DDR_A_D62 2 2 2 2
191 DQ58 DQ62 192
DDR_A_D59 193 194 DDR_A_D63 Layout Note:
A DQ59 DQ63 A
1 R81 2 195 VSS51 VSS52 196
10K_0402_5% 197 SA0 EVENT# 198 Place near DIMM
199 200 SMB_DATA_S3
+3VS VDDSPD SDA SMB_DATA_S3 <13,15,37>
2.2U_0603_6.3V6K
0.1U_0402_10V6K
201 202 SMB_CLK_S3

SA1 SCL SMB_CLK_S3 <13,15,37>
C155
C156
1 203 VTT1 VTT2 204 +0.75VS

1 10K_0402_5%
R83
1
205 206 1/76BA1/86W
G1 G2
2
2 LCN_DAN06-K4526-0100 Security Classification Compal Secret Data Compal Electronics, Inc.
2
ME@
DDRIII-SODIMM SLOT1
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net <7> DDR_B_D[0..63]
<7> DDR_B_DQS[0..7]
+VREF_DQ_DIMMB 4BA2/6W +1.5V
<7> DDR_B_DQS#[0..7]
+1.5V +1.5V
<7> DDR_B_MA[0..15]
1
JDIMM2 R84
+VREF_DQ_DIMMB 1 2 1K_0402_1%
VREF_DQ VSS1 DDR_B_D4 +VREF_DQ_DIMMB
3 VSS2 DQ4 4
2.2U_0603_6.3V6K
0.1U_0402_10V6K
DDR_B_D0 5 6 DDR_B_D5
2
DDR_B_D1 DQ0 DQ5
1 1 7 DQ1 VSS3 8
C158
9 10 DDR_B_DQS#0
VSS4 DQS#0
C157
D DDR_B_DM0 11 12 DDR_B_DQS0 D
DM0 DQS0
1
13 VSS5 VSS6 14
2 2 DDR_B_D2 DDR_B_D6
15 DQ2 DQ6 16
DDR_B_D3 17 18 DDR_B_D7 R85
DQ3 DQ7 1K_0402_1%
19 VSS7 VSS8 20
2
DDR_B_D9 DQ8 DQ12 DDR_B_D13
23 DQ9 DQ13 24
25 VSS9 VSS10 26
DDR_B_DQS#1 27 28 DDR_B_DM1
DDR_B_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 DQS1 RESET# 30 DDR3_DRAMRST# <7,12>
31 VSS11 VSS12 32
35 DQ11 DQ15 36
37 VSS13 VSS14 38
41 DQ17 DQ21 42
43 VSS15 VSS16 44
DDR_B_DQS2 DQS#2 DM2
47 DQS2 VSS17 48
49 50 DDR_B_D22
DDR_B_D18 VSS18 DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS19 DDR_B_D28
55 VSS20 DQ28 56
DDR_B_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_B_DQS#3
DDR_B_DM3 VSS22 DQS#3 DDR_B_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
69 DQ27 DQ31 70
71 VSS25 VSS26 72
C C
<7> DDR_CKE2_DIMMB DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB

CKE0 CKE1 DDR_CKE3_DIMMB <7>
75 VDD1 VDD2 76
77 78 DDR_B_MA15
DDR_B_BS2 NC1 A15 DDR_B_MA14
<7> DDR_B_BS2 79 BA2 A14 80
81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 A9 A7 86
87 VDD5 VDD6 88
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 VDD7 VDD8 94
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 VDD9 VDD10 100
M_CLK_DDR2 101 102 M_CLK_DDR3 Layout Note:
<7> M_CLK_DDR2
<7> M_CLK_DDR#2 M_CLK_DDR#2 103
CK0 CK1
104 M_CLK_DDR#3
M_CLK_DDR3 <7> (10uF_0603_6.3V)*8
CK0# CK1# M_CLK_DDR#3 <7>
105 106 Place near DIMM
DDR_B_MA10 VDD11 VDD12 DDR_B_BS1
107 108
<7> DDR_B_BS0 DDR_B_BS0 109
A10/AP BA1
110 DDR_B_RAS#
DDR_B_BS1 <7> +1.5V (0.1uF_402_10V)*4
BA0 RAS# DDR_B_RAS# <7>
111 VDD13 VDD14 112
<7> DDR_B_WE# DDR_B_WE# 113 114 DDR_CS2_DIMMB#
WE# S0# DDR_CS2_DIMMB# <7>
1
<7> DDR_B_CAS# DDR_B_CAS# 115 116 M_ODT2
CAS# ODT0 M_ODT2 <7>
117 118 R86
DDR_B_MA13 VDD15 VDD16 M_ODT3 1K_0402_1% +1.5V
119 A13 ODT1 120 M_ODT3 <7>
<7> DDR_CS3_DIMMB# DDR_CS3_DIMMB# 121 122
S1# NC2
123 124
2
VDD17 VDD18
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
125 126 +VREF_CB
NCTEST VREF_CA
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
127 VSS27 VSS28 128
2.2U_0603_6.3V6K
C161
C162
C163
C164
C165
C166
C167
C168
C169
C170
C171
C172
DDR_B_D32 129 130 DDR_B_D36 1 1 1 1 1 1 1 1 1 1 1 1
DQ32 DQ36
1
C159
DDR_B_D33 131 132 DDR_B_D37 1 1
DQ33 DQ37
C160
B 133 134 B
DDR_B_DQS#4 VSS29 VSS30 DDR_B_DM4 R87 @ @
135 DQS#4 DM4 136
DDR_B_DQS4 1K_0402_1% 2 2 2 2 2 2 2 2 2 2 2 2
137 DQS4 VSS31 138
DDR_B_D38 2 2
139 140
2
DDR_B_D34 VSS32 DQ38 DDR_B_D39
141 DQ34 DQ39 142
DDR_B_D35 143 144
DQ35 VSS33 DDR_B_D44
145 VSS34 DQ44 146
DDR_B_D40 147 148 DDR_B_D45
DDR_B_D41 DQ40 DQ45
149 DQ41 VSS35 150
151 152 DDR_B_DQS#5
DDR_B_DM5 VSS36 DQS#5 DDR_B_DQS5
153 DM5 DQS5 154
155 VSS37 VSS38 156
DDR_B_D42 157 158 DDR_B_D46 Layout Note:
159 DQ43 DQ47 160
161 VSS39 VSS40 162 Place near DIMM
DDR_B_D48 163 164 DDR_B_D52
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDR_B_DQS6 DQS#6 DM6 +0.75VS
171 DQS6 VSS43 172
173 174 DDR_B_D54
DDR_B_D50 VSS44 DQ54 DDR_B_D55 DDR_B_DM0
175 DQ50 DQ55 176
DDR_B_D51 177 178 DDR_B_DM1
DQ51 VSS45 DDR_B_D60 DDR_B_DM2
179 VSS46 DQ60 180
C173
1U_0402_6.3V6K
C174
1U_0402_6.3V6K
C175
1U_0402_6.3V6K
C176
1U_0402_6.3V6K
DDR_B_D56 181 182 DDR_B_D61 DDR_B_DM3
DDR_B_D57 DQ56 DQ61 DDR_B_DM4
183 DQ57 VSS47 184 1 1 1 1
185 186 DDR_B_DQS#7 DDR_B_DM5
DDR_B_DM7 VSS48 DQS#7 DDR_B_DQS7 DDR_B_DM6
187 DM7 DQS7 188
189 190 DDR_B_DM7
DDR_B_D58 VSS49 VSS50 DDR_B_D62 2 2 2 2
191 DQ58 DQ62 192
DDR_B_D59 193 194 DDR_B_D63
DQ59 DQ63
195 VSS51 VSS52 196
A 1 R95 A
10K_0402_5%
2 197 SA0 EVENT# 198
SMB_DATA_S3
Layout Note:
199 VDDSPD SDA 200 SMB_DATA_S3 <12,15,37>
+3VS 1 2 201 SA1 SCL 202 SMB_CLK_S3
SMB_CLK_S3 <12,15,37>
Place near DIMM
2.2U_0603_6.3V6K
0.1U_0402_10V6K
R97 10K_0402_5% 203 204 +0.75VS

VTT1 VTT2 1/76BA1/86W
C178
1 1
C177
205 G1 G2 206
LCN_DAN06-K4926-0100
2 2 ME@ Security Classification Compal Secret Data Compal Electronics, Inc.
DDRIII-SODIMM SLOT2
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
PCH_RTCX1
W=20mils W=20mils 1 2 PCH_RTCX2

R98 10M_0402_5%
+RTCVCC +RTCBATT
R99
1K_0402_5%
32.768KHZ_12.5PF_9H03200413
1 2
4
18P_0402_50V8J
1
1 Y1
OSC
OSC
C179 CLRP1 1 1
1U_0603_10V4Z SHORT PADS C181
2
C180 18P_0402_50V8J
2
NC
NC
D 2 2 D
3
CMOS
+RTCVCC
U4A
SHORT PADS
CLRP2
R101 1 2 1M_0402_5% SM_INTRUDER#
+RTCVCC PCH_RTCX1 A20 C38 LPC_AD0
1 RTCX1 FWH0 / LAD0 LPC_AD0 <37,45>
1
R102 1 2 330K_0402_5% PCH_INTVRMEN A38 LPC_AD1
LPC
PCH_RTCX2 FWH1 / LAD1 LPC_AD2 LPC_AD1 <37,45>
C183 C20 B37 EC and Mini card debug port
RTCX2 FWH2 / LAD2 LPC_AD3 LPC_AD2 <37,45>
R1330 1 2 330K_0402_5% 1U_0603_10V4Z C37
2
2 PCH_RTCRST# FWH3 / LAD3 LPC_AD3 <37,45>
@ 1 2 D20
R103 20K_0402_5% RTCRST# LPC_FRAME#
INTVRMEN FWH4 / LFRAME# D36 LPC_FRAME# <37,45>
烉Integrated 1 2 PCH_SRTCRST# G22 SRTCRST#
* LH烉 Integrated VRM enable R100 20K_0402_5% E36 +3VS
1
RTC
LDRQ0#
1
SHORT PADS
CLRP3
VRM disable SM_INTRUDER# K22 K36 R104 2 1 10K_0402_5%
C182 INTRUDER# LDRQ1# / GPIO23
(INTVRMEN should always be pull high.) 1U_0603_10V4Z PCH_INTVRMEN C17 V5 SERIRQ SERIRQ <45>
2
2 INTVRMEN SERIRQ
AM3 SATA_DTX_C_IRX_N0
+3VS SATA0RXN SATA_DTX_C_IRX_N0 <37>
HDA_BIT_CLK N34 AM1 SATA_DTX_C_IRX_P0 SATA_DTX_C_IRX_P0 <37>
HDA_BCLK SATA0RXP
SATA 6G
AP7 SATA_ITX_C_DRX_N0 0.01U_0402_16V7K 2 1 C184 SATA_ITX_DRX_N0 SSD
SATA0TXN SATA_ITX_DRX_N0 <37>
R105 1 @ 2 1K_0402_5% HDA_SPKR HDA_SYNC L34 AP5 SATA_ITX_C_DRX_P0 0.01U_0402_16V7K 2 1 C185 SATA_ITX_DRX_P0 SATA_ITX_DRX_P0 <37>
HDA_SYNC SATA0TXP
HIGH= Enable ( No Reboot ) HDA_SPKR T10 AM10 SATA_DTX_C_IRX_N1
<42> HDA_SPKR SPKR SATA1RXN SATA_DTX_C_IRX_N1 <41>
LOW= Disable (Default) AM8 SATA_DTX_C_IRX_P1
* HDA_RST# K34 HDA_RST#
SATA1RXP
SATA1TXN AP11 SATA_ITX_C_DRX_N1 0.01U_0402_16V7K 2 1 C273 SATA_ITX_DRX_N1
SATA_DTX_C_IRX_P1 <41>
SATA_ITX_DRX_N1 <41> HDD
AP10 SATA_ITX_C_DRX_P1 0.01U_0402_16V7K 2 1 C272 SATA_ITX_DRX_P1 SATA_ITX_DRX_P1 <41>
SATA1TXP
C +3VALW HDA_SDIN0 E34 AD7 SATA_DTX_C_IRX_N2 C
<42> HDA_SDIN0 HDA_SDIN0 SATA2RXN SATA_DTX_C_IRX_N2 <41>
AD5 SATA_DTX_C_IRX_P2
SATA2RXP SATA_DTX_C_IRX_P2 <41>
R106 2 @ 1 1K_0402_5% HDA_SDOUT G34 AH5 SATA_ITX_C_DRX_N2 0.01U_0402_16V7K 2 1 C186 SATA_ITX_DRX_N2_CONN ODD
HDA_SDIN1 SATA2TXN SATA_ITX_C_DRX_P2 0.01U_0402_16V7K 2 SATA_ITX_DRX_P2_CONN SATA_ITX_DRX_N2_CONN <41>
SATA2TXP AH4 1 C187 SATA_ITX_DRX_P2_CONN <41>
Low = Disabled (Default) C34
*
IHDA
HDA_SDIN2
High = Enabled [Flash Descriptor Security Overide] SATA3RXN AB8
A34 HDA_SDIN3 SATA3RXP AB10
AF3
R109 SATA3TXN
AF1
ME_FLASH HDA_SDOUT SATA3TXP
1 2 A36
SATA
+3VALW <45> ME_FLASH HDA_SDO SATA_DTX_C_IRX_N4
0_0402_5% Y7 SATA_DTX_C_IRX_N4 <48>
SATA4RXN ESATA@ SATA_DTX_C_IRX_P4
SATA4RXP
Y5 SATA_DTX_C_IRX_P4 <48> ESATA
R108 2 1 1K_0402_5% HDA_SYNC R107 1 @ 2 1K_0402_1% PCH_GPIO33 C36 AD3 SATA_ITX_C_DRX_N4 0.01U_0402_16V7K 2 1 C188 SATA_ITX_DRX_N4
HDA_DOCK_EN# / GPIO33 SATA4TXN SATA_ITX_C_DRX_P4 0.01U_0402_16V7K 2 SATA_ITX_DRX_P4 SATA_ITX_DRX_N4 <48>
AD1 1 C189 SATA_ITX_DRX_P4 <48>
Kill_SW# SATA4TXP ESATA@
This signal has a weak internal pull-down <49> Kill_SW# N32
HDA_DOCK_RST# / GPIO13
Y3
R110 SATA5RXN
Y1
On Die PLL VR Select is supplied by 51_0402_5% SATA5RXP
AB3
1.5V when smapled high PCH_JTAG_TCK SATA5TXN
2 1 J3 AB1
* 1.8V when sampled low
JTAG_TCK SATA5TXP
PCH_JTAG_TMS H7 Y11 R111
Needs to be pulled High for Huron River platfrom
JTAG
JTAG_TMS SATAICOMPO 37.4_0402_1% +1.05VS_VCC_SATA
PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
JTAG_TDI SATAICOMPI
R112 PCH_JTAG_TDO H1
33_0402_5% +3VS JTAG_TDO R113 +1.05VS_SATA3
AB12
HDA_BIT_CLK SATA3RCOMPO 49.9_0402_1%
<42> HDA_BITCLK_AUDIO 1 2
2
G
R114 Q10 AB13 SATA3_COMP 1 2

33_0402_5% BSS138_NL_SOT23-3 SATA3COMPI
1 2 HDA_SYNC_R 3 1 HDA_SYNC
<42> HDA_SYNC_AUDIO
R116 SPI_CLK_PCH RBIAS_SATA3 R115 1 2 750_0402_1%
S
T3 AH1
33_0402_5% SPI_CLK SATA3RBIAS
B HDA_RST# SPI_SB_CS0# B
<42> HDA_RST_AUDIO# 1 2 Y14
R118 SPI_CS0# R117
1 2 2 1 10K_0402_5% +3VS
33_0402_5% SPI_SB_CS1# T1
SPI
HDA_SDOUT @ R325 SPI_CS1# HDD_LED#

<42> HDA_SDOUT_AUDIO 1 2 SATALED#
P3 HDD_LED# <50>
0_0402_5%
SPI_SI V4 V14 PCH_GPIO21 2 R119 1
SPI_MOSI SATA0GP / GPIO21 +3VS
10K_0402_5%
SPI_SO_R U3
SPI_MISO SATA1GP / GPIO19
P1 SATA_DET#
SATA_DET# <37> 4MB SPI ROM FOR ME SPI_CLK_PCH
+3VALW +3VALW +3VALW 6/17 follow module design
COUGARPOINT_FCBGA989 R316 2 1 10K_0402_5% +3VS
& Non-share ROM.
1
1
R121 R122 R123 R124
200_0402_5% 200_0402_5% 200_0402_5% 33_0402_5%
4MB SPI ROM FOR ME +3VS +3VS @
2
2
PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI For Fast Boot
& Non-share ROM.
1
1
@ R1346 R127 1 2 SPI_WP# C190

R125 R126 R128 10K_0402_5% 3.3K_0402_5% 22P_0402_50V8J
100_0402_1% 100_0402_1% 100_0402_1% @
+3VS R129 1 2 SPI_HOLD# +3VS
2
3.3K_0402_5%
2
SPI_SB_CS1#_R C191
DPDG1.1 1 2
1
D
R1334 1 2 SPI_WP#_1 Q134 R130
3.3K_0402_5% SPI_SB_CS0#_R 2 0_0402_5% U5 0.1U_0402_16V4Z
<45> SPI_SB_CS0#_R
6/30 update R121, R122, R123 G SPI_SB_CS0# 1 2SPI_SB_CS0#_R 1 8
@ +3VS CS# VCC
R1335 1 2 SPI_HOLD#_1 S SPI_SO_R 1 2 SPI_SO_L 2 7 SPI_HOLD# 33_0402_5%
3
SPI_WP# SO HOLD# SPI_CLK_PCH_0
3.3K_0402_5% 2N7002_SOT23-3 3 6 1 R1342 2 SPI_CLK_PCH
33_0402_5% WP# SCLK SPI_SI_R
@ C923 @ 4 5 1 2 SPI_SI
@1 R131 GND SI
2
A @ R1337
@R1337 S IC FL 32M W25Q32BVSSIG SOIC 8P 33_0402_5% A
0_0402_5% U61 0.1U_0402_16V4Z R133
SPI_SB_CS1# 1 2 SPI_SB_CS1#_R 1 8 @
SPI_SO_R CS# VCC
1 2 SPI_SO_L1 2 7 SPI_HOLD#_1 33_0402_5%
SPI_WP#_1 SO HOLD# SPI_CLK_PCH_1
3 WP# SCLK 6 1 R1340 2 SPI_CLK_PCH
@ 33_0402_5% 4 5 SPI_SI_R1 1 2 SPI_SI
R1338 GND SI
S IC FL 32M W25Q32BVSSIG SOIC 8P 33_0402_5%
@ R1339 Security Classification Compal Secret Data Compal Electronics, Inc.
@ Issued Date 2009/12/01 Deciphered Date 2010/12/31 Title
PCH (1/8) SATA,HDA,SPI, LPC, XDP
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
10K_0402_5%
U4B Q60A
2 1 +3VALW DMN66D0LDW-7 2N_SOT363-6
<38> PCIE_PRX_DTX_N1 PCIE_PRX_DTX_N1 BG34 R134 6 1 SMB_CLK_S3
PCIE_PRX_DTX_P1 PERN1 EC_LID_OUT# SMB_CLK_S3 <12,13,37>
LAN <38> PCIE_PRX_DTX_P1 BJ34 PERP1 SMBALERT# / GPIO11 E12 EC_LID_OUT# <45>
C192 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N1 AV32 2.2K_0402_5% 2.2K_0402_5%
<38> PCIE_PTX_C_DRX_N1
C193 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P1 AU32
PETN1
H14 PCH_SMBCLK 1 R136 2 1 2 R137 DIMM1
2
<38> PCIE_PTX_C_DRX_P1 PETP1 SMBCLK
<37> PCIE_PRX_DTX_N2 PCIE_PRX_DTX_N2 BE34 PERN2 SMBDATA C9 PCH_SMBDATA

+3VALW
1 2 1
+3VS
2 DIMM2
5
PCIE_PRX_DTX_P2 BF34 R135 R138
WLAN
<37> PCIE_PRX_DTX_P2
C194 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N2 BB32
PERP2
PETN2
2.2K_0402_5% 2.2K_0402_5% MINI CARD
C195 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P2 AY32 3 4 SMB_DATA_S3
SMBUS
<37> PCIE_PTX_C_DRX_P2 PETP2 DRAMRST_CNTRL_PCH SMB_DATA_S3 <12,13,37>
A12 DRAMRST_CNTRL_PCH <7>
SML0ALERT# / GPIO60 DMN66D0LDW-7 2N_SOT363-6
BG36
PERN3
BJ36 C8 1 2 Q60B
D PERP3 SML0CLK R335 2.2K_0402_5% D
AV34 2 R329 1 +3VALW
PETN3 1K_0402_5%
AU34 G12 1 2 +3VALW
PETP3 SML0DATA R336 2.2K_0402_5% Q61A
PCIE_PRX_DTX_N4 BF36 DMN66D0LDW-7 2N_SOT363-6
<49> PCIE_PRX_DTX_N4 PERN4
PCIE_PRX_DTX_P4 BE36 10K_0402_5% 6 1 EC_SMB_CK2
<49> PCIE_PRX_DTX_P4 PERP4 EC_SMB_CK2 <23,40,45,50>
USB3.0 C275 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N4 AY34 C13 PCH_GPIO74 2 1
<49> PCIE_PTX_C_DRX_N4 PETN4 SML1ALERT# / PCHHOT# / GPIO74 +3VALW
C274 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P4 BB34 2.2K_0402_5%
<49> PCIE_PTX_C_DRX_P4 PETP4
E14 PCH_SML1CLK R140 1 R141 2 VGA
PCI-E*
2
PCIE_PRX_DTX_N5 SML1CLK / GPIO58
BG37
<44> PCIE_PRX_DTX_N5
<44> PCIE_PRX_DTX_P5
PCIE_PRX_DTX_P5 BH37
PERN5
PERP5 SML1DATA / GPIO75
M16 PCH_SML1DATA
+3VALW
1 2
+3VS EC
5
Card Reader C277 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N5 AY36 R142
<44> PCIE_PTX_C_DRX_P5
C276 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P5 BB36
PETN5
PETP5
2.2K_0402_5% thermal sensor
3 4 EC_SMB_DA2
PCIE_PRX_DTX_N6 EC_SMB_DA2 <23,40,45,50>
<37> PCIE_PRX_DTX_N6 BJ38 PERN6
<37> PCIE_PRX_DTX_P6 TV@ PCIE_PRX_DTX_P6 BG38 DMN66D0LDW-7 2N_SOT363-6
Controller
C284 PCIE_PTX_DRX_N6 PERP6
TV <37> PCIE_PTX_C_DRX_N6 1 2 0.1U_0402_10V7K AU36 PETN6 CL_CLK1 M7 Q61B
C283 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P6 AV36 +3VALW
<37> PCIE_PTX_C_DRX_P6 PETP6
Link
TV@ BG40 PERN7 CL_DATA1 T11
2
BJ40 PERP7
AY40 R143
PETN7
BB40 PETP7 CL_RST1# P10 10K_0402_5%
OPTI@
BE38 R144
1
PERN8 0_0402_5%
BC38 PERP8
AW38 OPTI@ 1 2
PETN8 CLK_REQ_VGA# <23>
AY38 PETP8 10K_0402_5% R145
PEG_A_CLKRQ# / GPIO47 M10 PEG_CLKREQ#_R 1 2
Y40 DIS_ONLY@
CLKOUT_PCIE0N
Y39 CLKOUT_PCIE0P
AB37 CLK_PCIE_VGA#_R R146 1 DIS@ 2 0_0402_5% CLK_PCIE_VGA#
CLKOUT_PEG_A_N CLK_PCIE_VGA# <23>
CLOCKS
C R147 PCH_GPIO73 CLK_PCIE_VGA_R CLK_PCIE_VGA C
+3VALW 2 1 10K_0402_5% J2 AB38 R148 1 2 0_0402_5% CLK_PCIE_VGA <23>
PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P DIS@
R149 1 2 0_0402_5% CLK_PCIE_WLAN1#_R AB49 AV22 CLK_CPU_DMI# CLK_CPU_DMI# R349 1 @ 2 10K_0402_5%

<37> CLK_PCIE_WLAN1# CLK_PCIE_WLAN1_R CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI CLK_CPU_DMI# <6> CLK_CPU_DMI
R150 1 2 0_0402_5% AB47 AU22 R347 1 2 10K_0402_5%
<37> CLK_PCIE_WLAN1 CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI <6>
WLAN @
<37> WLAN_CLKREQ1# R156 1 2 0_0402_5% WLAN_CLKREQ1#_R M1
R158 PCIECLKRQ1# / GPIO18
+3VS 2 1 10K_0402_5% AM12
CLKOUT_DP_N / CLKOUT_BCLK1_N
AM13
R310 CLK_USB30# CLKOUT_DP_P / CLKOUT_BCLK1_P
<49> CLK_PCIE_USB30# 1 2 0_0402_5% AA48
R309 CLK_USB30 CLKOUT_PCIE2N
USB3.0 <49> CLK_PCIE_USB30 1 2 0_0402_5% AA47
CLKOUT_PCIE2P
BF18 CLK_BUF_CPU_DMI# R155 1 2 10K_0402_5%
R308 PCH_GPIO20 CLKIN_DMI_N CLK_BUF_CPU_DMI
<49> USB30_CLKREQ# 1 2 0_0402_5% V10 BE18 R157 1 2 10K_0402_5%
R301 PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
+3VS 2 1 10K_0402_5%
R153 1 2 0_0402_5% CLK_PCIE_LAN#_R Y37 BJ30 CLKIN_DMI2# R159 1 2 10K_0402_5%

<38> CLK_PCIE_LAN# CLKOUT_PCIE3N CLKIN_DMI2_N
LAN R154 1 2 0_0402_5% CLK_PCIE_LAN_R Y36 BG30 CLKIN_DMI2 R160 1 2 10K_0402_5%
<38> CLK_PCIE_LAN CLKOUT_PCIE3P CLKIN_DMI2_P
R151 1 2 0_0402_5% PCH_GPIO25 A8
<38> CLKREQ_LAN# PCIECLKRQ3# / GPIO25 CLK_BUF_DREF_96M#
+3VALW R152 2 1 10K_0402_5% G24 R162 1 2 10K_0402_5%
CLKIN_DOT_96N CLK_BUF_DREF_96M R163 1 10K_0402_5%
E24 2
R332 TV@ 2 0_0402_5% CLK_PCIE_TV#_R CLKIN_DOT_96P
<37> CLK_PCIE_TV# 1 Y43
R334 0_0402_5% CLK_PCIE_TV_R CLKOUT_PCIE4N
<37> CLK_PCIE_TV 1 2 Y45
TV@ CLKOUT_PCIE4P CLK_BUF_PCIE_SATA# R164 1 10K_0402_5%
TV CLKIN_SATA_N / CKSSCD_N
AK7 2
R333 1 TV@ 2 0_0402_5% PCH_GPIO26 L12 AK5 CLK_BUF_PCIE_SATA R166 1 2 10K_0402_5%
<37> CLKREQ_TV# PCIECLKRQ4# / GPIO26 CLKIN_SATA_P / CKSSCD_P
+3VALW R165 2 1 10K_0402_5%
<44> CLK_PCIE_CARD_PCH#
R312 1 2 0_0402_5% CLK_PCIE_CARD_PCH#_R V45 K45 CLK_BUF_ICH_14M R167 1 2 10K_0402_5%
CLKOUT_PCIE5N REFCLK14IN
<44> CLK_PCIE_CARD_PCH
R311 1 2 0_0402_5% CLK_PCIE_CARD_PCH_R V46
CLKOUT_PCIE5P
Card Reader
R342 1 @ 2 0_0402_5% PCH_GPIO44 L14 H45 CLK_PCI_LPBACK
<44> CPPE# PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LPBACK <18>
B R168 XTAL25_IN B
+3VALW 2 1 10K_0402_5%
AB42 V47 XTAL25_IN
CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT XTAL25_OUT
AB40 V49 1 2
CLKOUT_PEG_B_P XTAL25_OUT R169 1M_0402_5%
R170 2 1 10K_0402_5% PCH_GPIO56 E6 R171 +1.05VS_VCCDIFFCLKN
+3VALW PEG_B_CLKRQ# / GPIO56 90.9_0402_1% Y2
Y47 XCLK_RCOMP 1 2 2 1
XCLK_RCOMP
V40 1 1
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P 25MHZ_20PF_7A25000012
C196 C197
R172 2 1 10K_0402_5% PCH_GPIO45 T13 18P_0402_50V8J 18P_0402_50V8J
+3VALW PCIECLKRQ6# / GPIO45 2 2
V38 K43
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 R173
FLEX CLOCKS
V37
CLKOUT_PCIE7P CLK_PCI_DB_R
F47 1 2 22_0402_5% CLK_PCI_DB <37>
R174 PCH_GPIO46 CLKOUTFLEX1 / GPIO65
+3VALW 2 1 10K_0402_5% K12 @
PCIECLKRQ7# / GPIO46
H47
CLKOUTFLEX2 / GPIO66
AK14
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AK13 K49
CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLKOUTFLEX3 / GPIO67 @ R175 @ C198
33_0402_5% 22P_0402_50V8J
COUGARPOINT_FCBGA989 CLK_BUF_ICH_14M 2 1 1 2
Reserve for EMI please close to PCH
@ R176 @ C199
33_0402_5% 22P_0402_50V8J
CLK_PCI_LPBACK 2 1 1 2
A A
Reserve for EMI please close to PCH

PCH (2/8) PCIE, SMBUS, CLK
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
D D
U4C
DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0

<5> DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 <5>
DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1
<5> DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 <5>
<5> DMI_CTX_PRX_N2 DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2 FDI_CTX_PRX_N2 <5>
DMI_CTX_PRX_N3 DMI2RXN FDI_RXN2 FDI_CTX_PRX_N3
<5> DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3 <5>
DMI3RXN FDI_RXN3 FDI_CTX_PRX_N4
BC12 FDI_CTX_PRX_N4 <5>
DMI_CTX_PRX_P0 FDI_RXN4 FDI_CTX_PRX_N5
<5> DMI_CTX_PRX_P0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_CTX_PRX_N5 <5>
DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6
<5> DMI_CTX_PRX_P1 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 <5>
DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7
<5> DMI_CTX_PRX_P2 DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 <5>
<5> DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 BJ20 DMI3RXP FDI_CTX_PRX_P0
FDI_RXP0 BG14 FDI_CTX_PRX_P0 <5>
DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1
<5> DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 <5>
DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2
DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 FDI_CTX_PRX_P3 <5>
<5> DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P4
AV18 BE12
DMI
FDI
BG12 FDI_CTX_PRX_P5 FDI_CTX_PRX_P5 <5>
DMI_CRX_PTX_P0 FDI_RXP5 FDI_CTX_PRX_P6
<5> DMI_CRX_PTX_P0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_CTX_PRX_P6 <5>
DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7
<5> DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 <5>
MC74VHC1G08DFT2G SC70 5P DMI_CRX_PTX_P2 AY18
<5> DMI_CRX_PTX_P2 DMI2TXP
3
DMI_CRX_PTX_P3 AU18
VGATE <5> DMI_CRX_PTX_P3 DMI3TXP FDI_INT
1 AW16
G
A SYS_PWROK FDI_INT FDI_INT <5> +RTCVCC

Y 4
PCH_POK 2 +1.05VS_PCH BJ24 AV12 FDI_FSYNC0
B DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 <5>
P
1
U6 1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1
5
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 <5>

R177 49.9_0402_1% R179
1 2 RBIAS_CPY BH21 AV14 FDI_LSYNC0 330K_0402_5%
C DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 <5> C
R178 750_0402_1%
+3VS 4mil width and place BB10 FDI_LSYNC1
2
FDI_LSYNC1 FDI_LSYNC1 <5>
DSWODVREN - On Die DSW VR Enable
within 500mil of the PCH *
烉
R180 2 1 100K_0402_1% SYS_PWROK H Enable
L Disable
SUSACK# is only used on platform A18 DSWODVREN 0_0402_5%
DSWVRMEN
1
that support the Deep Sx state. 1 2 PCH_RSMRST#_R
System Power Management

R181 R183
T72 PAD SUSACK# C12 E22 PCH_DPWROK_R 1 @ 2 330K_0402_5%
SUSACK# DPWROK PCH_DPWROK <45>
R185 R337 @
0_0402_5% 0_0402_5%
2
+3VS 2 1 SYS_RST# K3 B9 WAKE# 1 2 PCIE_WAKE# <37,38,49>
R184 10K_0402_5% SYS_RESET# WAKE#
1 2 10K_0402_5% +3VALW
R186
R188 1 @ 2 0_0402_5% SYS_PWROK P12 N3 PM_CLKRUN# PAD T73
<60> VGATE SYS_PWROK CLKRUN# / GPIO32
1 R189 2 +3VS
8.2K_0402_5%
R190 1 2 0_0402_5% PWROK L22 G8 SUS_STAT#
<45> PCH_POK PWROK SUS_STAT# / GPIO61
2 @ 1
R302 1 2 0_0402_5% R191 0_0402_5% APWROK L10 N14 SUSCLK
<45> PCH_APWROK APWROK SUSCLK / GPIO62 SUSCLK <45>
AEPWROK can be connect to
PWROK if iAMT disable PM_DRAM_PWRGD B13 D10 SLP_S5#
<6> PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SLP_S5# <45>
1 2 PCH_RSMRST#_R C21 H4 SLP_S4#

<45> EC_RSMRST# RSMRST# SLP_S4# SLP_S4# <45>
R193 0_0402_5%
1 2 SUSWARN#_R K16 F4 SLP_S3#

+3VALW <45> SUSWARN# SUSWARN# / SUS_PWR_DN_ACK / GPIO30 SLP_S3# SLP_S3# <45>
R196 0_0402_5%
Can be left NC
B PBTN_OUT#_R B
<45> PBTN_OUT# 1 2 E20 G10 when IAMT is not
R198 0_0402_5% PWRBTN# SLP_A#
support on the
R192 2 @ 1 200_0402_5% PM_DRAM_PWRGD
D29 ACIN_R PM_SLP_SUS# platfrom
<45,54> ACIN 1 2 RB751V_SOD323 H20
ACPRESENT / GPIO31 SLP_SUS#
G16 PAD T71
R194 2 1 10K_0402_5% SUSWARN#
1 2
R195 2 1 10K_0402_5% ACIN_R R199 @ 0_0402_5%
1 R200 2 PCH_GPIO72 E10 AP14 H_PM_SYNC
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC <6>
8.2K_0402_5%
R201
R197 2 1 10K_0402_5% PCH_RSMRST#_R +3VALW 2 1 RI# A10 K14 PM_SLP_LAN# PAD T74 Can be left NC if no use
10K_0402_5% RI# SLP_LAN# / GPIO29
integrated LAN.
COUGARPOINT_FCBGA989 10/06 Test point request
+3VS
R1290 2 1 200_0402_5% PM_DRAM_PWRGD
7/28 Modify follow Module Design.
A A

PCH (3/8) DMI,FDI,PM,
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
D D
U4D
PCH_ENBKL J47 AP43
<34> PCH_ENBKL L_BKLTEN SDVO_TVCLKINN +3VS
PCH_ENVDD M45 AP45
<34> PCH_ENVDD L_VDD_EN SDVO_TVCLKINP
<34> PCH_PWM P45 L_BKLTCTL SDVO_STALLN AM42

SDVO_STALLP AM40
1
EDID_CLK T40
Pull up R for CONN SIDE <34> EDID_CLK EDID_DATA L_DDC_CLK
K47 AP39 R202 R203
<34> EDID_DATA L_DDC_DATA SDVO_INTN
AP40 2.2K_0402_5% 2.2K_0402_5%
R204 1 CTRL_CLK SDVO_INTP
+3VS 2 2.2K_0402_5% T45 L_CTRL_CLK
UMA_HDMI@ UMA_HDMI@
R205 1 2 2.2K_0402_5% CTRL_DATA P39
2
2.37K_0402_1% L_CTRL_DATA
R206 2 1 LVDS_IBG AF37 P38 HDMICLK HDMICLK <36>
UMA@ LVD_IBG SDVO_CTRLCLK HDMIDAT
AF36 LVD_VBG SDVO_CTRLDATA M39 HDMIDAT <36>
0_0402_5% LVD_VREF AE48
R207 LVD_VREFH
2 1 AE47 LVD_VREFL DDPB_AUXN AT49
UMA@ AT47
DDPB_AUXP
DDPB_HPD AT40 TMDS_B_HPD <36>
AK39
LVDS
<34> LVDS_ACLK# LVDSA_CLK#
<34> LVDS_ACLK AK40 LVDSA_CLK DDPB_0N AV42 TMDS_B_DATA2#_PCH UMA_HDMI@ C200 1 2 0.1U_0402_10V6K
HDMI_TX2-_CK <36>
DDPB_0P AV40 TMDS_B_DATA2_PCH UMA_HDMI@ C201 1 2 0.1U_0402_10V6K
HDMI_TX2+_CK <36>
<34> LVDS_A0# AN48 LVDSA_DATA#0 DDPB_1N AV45 TMDS_B_DATA1#_PCH UMA_HDMI@ C202 1 2 0.1U_0402_10V6K
HDMI_TX1-_CK <36>
AM47 AV46 TMDS_B_DATA1_PCH UMA_HDMI@ C203 1 2 0.1U_0402_10V6K
Digital Display Interface

C <34> LVDS_A1# LVDSA_DATA#1 DDPB_1P HDMI_TX1+_CK <36> C
<34> LVDS_A2# AK47 LVDSA_DATA#2 DDPB_2N AU48 TMDS_B_DATA0#_PCH UMA_HDMI@ C204 1 2 0.1U_0402_10V6K
HDMI_TX0-_CK <36> HDMI
AJ48 LVDSA_DATA#3 DDPB_2P AU47 TMDS_B_DATA0_PCH UMA_HDMI@ C205 1 2 0.1U_0402_10V6K
HDMI_TX0+_CK <36>
DDPB_3N AV47 TMDS_B_CLK#_PCH UMA_HDMI@ C206 1 2 0.1U_0402_10V6K
HDMI_CLK-_CK <36>
<34> LVDS_A0 AN47 LVDSA_DATA0 DDPB_3P AV49 TMDS_B_CLK_PCH UMA_HDMI@ C207 1 2 0.1U_0402_10V6K
HDMI_CLK+_CK <36>
<34> LVDS_A1 AM49 LVDSA_DATA1
<34> LVDS_A2 AK49 LVDSA_DATA2 UMA_HDMI@
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
P42
DDPC_CTRLDATA
<34> LVDS_BCLK# AF40

LVDSB_CLK#
<34> LVDS_BCLK AF39 AP47
LVDSB_CLK DDPC_AUXN
AP49
DDPC_AUXP
<34> LVDS_B0# AH45 AT38
LVDSB_DATA#0 DDPC_HPD
<34> LVDS_B1# AH47
LVDSB_DATA#1
<34> LVDS_B2# AF49 AY47
LVDSB_DATA#2 DDPC_0N
AF45 AY49
LVDSB_DATA#3 DDPC_0P
AY43
DDPC_1N
<34> LVDS_B0 AH43 AY45
DAC_BLU LVDSB_DATA0 DDPC_1P
<35> DAC_BLU <34> LVDS_B1 AH49 BA47
R208 2 LVDSB_DATA1 DDPC_2N
1 150_0402_1% <34> LVDS_B2 AF47
LVDSB_DATA2 DDPC_2P
BA48
UMA@ AF43 BB47
DAC_GRN LVDSB_DATA3 DDPC_3N
<35> DAC_GRN BB49
R209 2 DDPC_3P
1 150_0402_1%
UMA@
DAC_RED N48 M43
<35> DAC_RED CRT_BLUE DDPD_CTRLCLK
R210 2 1 150_0402_1% P49 M36
UMA@ CRT_GREEN DDPD_CTRLDATA
T49
CRT_RED
AT45
CRT
+3VS CRT_DDC_CLK DDPD_AUXN
<35> CRT_DDC_CLK T39 AT43
Pull up R for CONN SIDE CRT_DDC_DATA CRT_DDC_CLK DDPD_AUXP
<35> CRT_DDC_DATA M40 BH41
CRT_DDC_DATA DDPD_HPD
B B
BB43
DDPD_0N
1
<35> CRT_HSYNC M47 BB45

R524 R559 CRT_HSYNC DDPD_0P
<35> CRT_VSYNC M49 BF44
2.2K_0402_5% 2.2K_0402_5% CRT_VSYNC DDPD_1N
BE44
@ @ DDPD_1P
BF42
CRT_IREF DDPD_2N
T43 BE42
2
DAC_IREF DDPD_2P
T42 BJ42
CRT_DDC_CLK CRT_IRTN DDPD_3N
BG42
DDPD_3P
1
CRT_DDC_DATA
R211 COUGARPOINT_FCBGA989
1K_0402_1%
2
A A

PCH (4/9) LVDS,CRT,DP,HDMI
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
+3VS
R297 1 @ 2 8.2K_0402_5% PCH_GPIO53 U4E
NV_CE#0 AY7
RP2
09/11 reserved BG26
NV_CE#1 AV7
AU3
PCI_PIRQA# TP1 NV_CE#2
8 1 BJ26 TP2 NV_CE#3 BG4
7 2 PCI_PIRQD# BH25
PCI_PIRQC# TP3
6 3 BJ16 TP4 NV_DQS0 AT10
5 4 PCI_PIRQB# BG16 BC8
TP5 NV_DQS1
AH38
8.2K_0804_8P4R_5% TP6
AH37 AU2
TP7 NV_DQ0 / NV_IO0
AK43 AT4
D TP8 NV_DQ1 / NV_IO1 D
AK45 AT3
RP1 TP9 NV_DQ2 / NV_IO2
C18 AT1
PCH_GPIO2 TP10 NV_DQ3 / NV_IO3
8 1 N30 AY3
7 2 H3
TP12 NV_DQ5 / NV_IO5
AT5
6 3 PCH_GPIO4 AH12 AV3
NVRAM
5 4 AM4 AV1
AM5 BB1
8.2K_0804_8P4R_5% TP15 NV_DQ8 / NV_IO8
Y13 BA3
K24 BB5
R225 WL_OFF# TP17 NV_DQ10 / NV_IO10
1 2 8.2K_0402_5% L24
BB3
AB46 BB7
AB45 BE8
RSVD
R212 PCH_GPIO52 TP20 NV_DQ13 / NV_IO13
1 2 8.2K_0402_5% NV_DQ14 / NV_IO14 BD4
NV_DQ15 / NV_IO15 BF6
R213 1 2 8.2K_0402_5% PCH_GPIO5
B21 TP21 NV_ALE AV5
M20 AY1 NV_CLE
TP22 NV_CLE
AY16 TP23
R214 1 2 8.2K_0402_5% PCH_GPIO50 BG46 AV10
TP24 NV_RCOMP
@ AT8
NV_RB#
DMI Termination Voltage
BE28 TP25 NV_RE#_WRB0 AY5
BC30 TP26 NV_RE#_WRB1 BA2 Set to Vcc when HIGH
BE32 TP27
NV_CLE
BJ32 TP28 NV_WE#_CK0 AT12 Set to Vss when LOW
WL_OFF# R215 1 @ 2 1K_0402_5% BC28 BF3
TP29 NV_WE#_CK1
BE30 TP30 USB DEBUG=PORT1 AND PORT9 +1.8VS
BF32 TP31
BG32 C24 USB20_N0
TP32 USBP0N USB20_N0 <48>
A16 swap overide Strap/Top-Block AV26 A24 USB20_P0 LEFT USB
TP33 USBP0P USB20_N1 USB20_P0 <48>
C
Swap Override jumper BB26 TP34 USBP1N C25 USB20_N1 <48> C
AU28 B25 USB20_P1 LEFT USB (COMBO) R216
Low=A16 swap AY30 TP36 USBP2N C26 USB20_N2 <49> 2.2K_0402_5%
override/Top-Block AU26 A26 USB20_P2 RIGHT USB
PCI_GNT3# Swap Override enabled AY26 TP38 USBP3N K28 USB20_N3 <49>
High=Default * AV28 H28 USB20_P3 RIGHT USB NV_CLE 1 2
TP39 USBP3P USB20_P3 <49> H_SNB_IVB# <6>
AW30 E28 R217 1K_0402_5%
TP40 USBP4N
USBP4P D28
C28 USB20_N5 CLOSE TO THE BRANCHING POINT
USBP5N USB20_N5 <34>
A28 USB20_P5 USB Camera
USBP5P USB20_P5 <34>
C29
USBP6N
B29
PCI_PIRQA# USBP6P
PCI_PIRQB#
K40
PIRQA# USBP7N
N28 Some PCH config not support USB port 6 & 7.
K38 M28
PCI
PCI_PIRQC# PIRQB# USBP7P USB20_N8
H38 L30 USB20_N8 <50>
PCI_PIRQD# PIRQC# USBP8N USB20_P8
OPTI@
G38
PIRQD# USBP8P
K30
USB20_N9 USB20_P8 <50> IR
G30 USB20_N9 <37>
R314 PCH_GPIO50 USBP9N USB20_P9 +3VALW
1 2 C46 E30 WLAN
USB
<23> DGPU_HOLD_RST# REQ1# / GPIO50 USBP9P USB20_P9 <37>
0_0402_5% PCH_GPIO52 C44 C30 USB20_N10
REQ2# / GPIO52 USBP10N USB20_N10 <50>
R315 1 2 PCH_GPIO54 E40 A30 USB20_P10 A Cover Light RP3
<23,51,57,58,59> DGPU_PWR_EN REQ3# / GPIO54 USBP10P USB20_P10 <50> USB_OC0#
0_0402_5% L32 4 5
OPTI@ PCH_GPIO51 USBP11N USB_OC2#
D47 K32 3 6
PCH_GPIO53 GNT1# / GPIO51 USBP11P USB20_N12 USB_OC7#
E42 G32 USB20_N12 <37> 2 7
WL_OFF# GNT2# / GPIO53 USBP12N USB20_P12 USB_OC5#
<37> WL_OFF# F46
GNT3# / GPIO55 USBP12P
E32
USB20_N13
USB20_P12 <37> TV 1 8
C32 USB20_N13 <47>
USBP13N USB20_P13 10K_1206_8P4R_5%
GPIO53=This Signal has a weak internal pull-up. PCH_GPIO2 USBP13P
A32 USB20_P13 <47> Bluetooth
G42
NOTE: The internal pull-up is disabled after ODD_DA# @ PCH_GPIO3 PIRQE# / GPIO2
<41,45> ODD_DA# 1 2
PCH_GPIO4
G40
PIRQF# / GPIO3 USBRBIAS
Within 500 mils
PLTRST# deasserts. 0_0402_5% R715 C42 C33 1 2
PCH_GPIO5 PIRQG# / GPIO4 USBRBIAS# R218 22.6_0402_1% RP4
D44
PIRQH# / GPIO5 USB_OC1# 4 5
B33 USB_OC4# 3 6
USBRBIAS USB_OC3#
<45> PCI_PME# K10 2 7
B PME# USB_OC6# B
1 8
PLT_RST# C6 A14 USB_OC0#
<6> PLT_RST# PLTRST# OC0# / GPIO59 USB_OC1# USB_OC0# <48>
K20 10K_1206_8P4R_5%
OC1# / GPIO40 USB_OC2# USB_OC1# <49>
R219 22_0402_5% B17
CLK_PCI_LPBACK_R H49 OC2# / GPIO41 USB_OC3#
<15> CLK_PCI_LPBACK 1 2 C16
CLK_PCI_LPC_R CLKOUT_PCI0 OC3# / GPIO42 USB_OC4#
<45> CLK_PCI_LPC 1 2 H43
CLKOUT_PCI1 OC4# / GPIO43
L16
R220 22_0402_5% J48 A16 USB_OC5#
CLKOUT_PCI2 OC5# / GPIO9 USB_OC6#
K42 D14
CLKOUT_PCI3 OC6# / GPIO10 USB_OC7#
H40 C14
PCH_GPIO51 R221 @ CLKOUT_PCI4 OC7# / GPIO14
1 2 1K_0402_5%
COUGARPOINT_FCBGA989
Boot BIOS Strap bit1 BBS1

Boot BIOS 1 2
R222 0_0402_5%
Bit11 Bit10 Destination
0 1 Reserved
GNT1#/
GPIO51 1 0 Reserved MC74VHC1G08DFT2G SC70 5P
3
@
1 1 SPI (Default) 1 PLT_RST#
*
G
A
<23,37,38,44,45,49> BUF_PLT_RST# 4
Y
0 0 LPC B
2
P
1
1 U7
5
@
C208 R223
1U_0402_6.3V6K 100K_0402_5%
A 2 +3VS A
2
PCH (5/9) PCI, USB
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
GPIO69 GPIO70 GPIO71
+3VS
14": Low ALC272: Low DIS ONLY: Low
15": Hi ALC5503: Hi OPTIMUS: Hi
R702 R703 R704
1 0 0
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
1 0 1 OPTI@
1
1 1 0 PCH_GPIO69
5503@
PCH_GPIO70
D 1 1 1 D
PCH_GPIO71 R707 R705 R706
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
6/24 Change to @ follow module design R233 1 2 10K_0402_5% PCH_GPIO0
+3VS
and double check on module design meeting
U4F @ DIS_ONLY@
ICC_EN# <48> ESATA_DET# 1 2
Integrated Clock Chip Enable 0_0402_5% R303 T7 C40 PCH_GPIO68
1
BMBUSY# / GPIO0 TACH4 / GPIO68
H ; Disable R227 1 2 10K_0402_5% ESATA_DET_R# A42 B41 PCH_GPIO69
TACH1 / GPIO1 TACH5 / GPIO69
L ; Enable 272@
* +3VS R228 1 2 10K_0402_5% DEVICE_RST# H36 TACH2 / GPIO6 TACH6 / GPIO70 C41 PCH_GPIO70 +3VS
@
<37,38,44> DEVICE_RST# 6/23 update for MB ID
R235 1 2 1K_0402_5% EC_SMI# EC_SCI# E38 A40 PCH_GPIO71
<45> EC_SCI# TACH3 / GPIO7 TACH7 / GPIO71
2
EC_SMI# C10 R236
<45> EC_SMI# GPIO8
Weak internal pull-high 10K_0402_5%
R229 1 @ 2 10K_0402_5% PCH_GPIO12 C4
+3VALW LAN_PHY_PWR_CTRL / GPIO12
1
R230 1 @ 2 1K_0402_5% SMIB G2 P4
GPIO15 A20GATE GATEA20 <45> +3VS
<49> SMIB
GPIO28 AU16 PCH_PECI_R 1 @ 2
CPU/MISC
ESATA_DET_RR# PECI H_PECI <6,45> PCH_GPIO68 R224
On-Die PLL Voltage Regulator +3VS R231 1 2 10K_0402_5% U2 SATA4GP / GPIO16
0_0402_5% R237 1 2 10K_0402_5%
This signal has a weak internal pull up R232 1 2 10K_0402_1% P5 KB_RST#
烉
RCIN# KB_RST# <45> KB_RST#
@ R226 1 2 10K_0402_5%
烉On-Die
GPIO
H voltage regulator enable 1 2 VGA_PGOOD_R D40 AY11
* L On-Die PLL Voltage Regulator disable
<23,59> VGA_PGOOD
0_0402_5% R339 TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD <6>
R238 1 2 10K_0402_5% BT_DISABLE T5 AY10 PCH_THRMTRIP#_R 1 2 H_THRMTRIP#
+3VS SCLOCK / GPIO22 THRMTRIP# H_THRMTRIP# <6>
R240 1 @ 2 1K_0402_5% PCH_GPIO28 <37> BT_DISABLE
R239 390_0402_5%
ODD_EN E8 T14
+3VALW <41> ODD_EN GPIO24 / MEM_LED INIT3_3V#
PCH_GPIO27 PCH_THRMTRIP#_R <23>
E16 GPIO27
C R241 C
1 2 10K_0402_5% PCH_GPIO28 P8 GPIO28 INIT3_3V
<37,47> BT_OFF# NC_1 AH8
+3VS 1 @ 2 10K_0402_5% BT_OFF# K1 STP_PCI# / GPIO34
R242
NC_2 AK11 This signal has weak internal
PCH_GPIO27 (Have internal Pull-High) R243 1 2 10K_0402_5% PCH_GPIO35 K4 PU, can't pull low
GPIO35
AH10
*High: VCCVRM VR Enable
Low: VCCVRM VR Disable
R259 1 2 10K_0402_5% PCH_GPIO36 V8
SATA2GP / GPIO36
NC_3
AK10
R244 @ PCH_GPIO37 NC_4
+3VS 1 2 10K_0402_5% M5
SATA3GP / GPIO37
P37
R245 @ PCH_GPIO27 PCH_GPIO38 NC_5
1 2 10K_0402_5% R246 1 2 10K_0402_5% N2
SLOAD / GPIO38
Intel schematic reviwe recommand.
R247 1 2 10K_0402_5% PCH_GPIO39 M3
SDATAOUT0 / GPIO39
R248 1 2 10K_0402_5% PCH_GPIO48 V13 BG2 VSS_NCTF_15
SDATAOUT1 / GPIO48 VSS_NCTF_15
R249 1 2 10K_0402_5% PCH_GPIO49 V3 BG48 VSS_NCTF_16
+3VS SATA5GP / GPIO49 VSS_NCTF_16
R251 1 2 10K_0402_5% PCH_GPIO57 D6 BH3 VSS_NCTF_17
+3VALW GPIO57 VSS_NCTF_17
R250 1 @ 2 200_0402_5% PCH_GPIO36 NO_VENTURA@
+3VS
R1345 1 2 10K_0402_5% BH47 VSS_NCTF_18
R264 VSS_NCTF_18
1 2 10K_0402_5% VENTURA@
VSS_NCTF_1 A4 BJ4 VSS_NCTF_19
VSS_NCTF_1 VSS_NCTF_19
NCTF
ESATA_DET_RR# VSS_NCTF_4 VSS_NCTF_22
<48> ESATA_DET# 1
0_0402_5%
2
R340
A46
BJ46 Change VSS_NCTF pin form TEST point to Trace
B @
VSS_NCTF_5 A5
BJ5 VSS_NCTF_23 for layout SPACE reducing.. B
7/29 update for ESATA detect
VSS_NCTF_7 B3 C2 VSS_NCTF_25
VSS_NCTF_8 B47 C48 VSS_NCTF_26
VSS_NCTF_9 BD1 D1 VSS_NCTF_27
VSS_NCTF_10 BD49 D49 VSS_NCTF_28
VSS_NCTF_11 BE1 E1 VSS_NCTF_29
VSS_NCTF_12 BE49 E49 VSS_NCTF_30
VSS_NCTF_13 BF1 F1 VSS_NCTF_31
VSS_NCTF_14 BF49 F49 VSS_NCTF_32
A A

PCH (6/9) GPIO, CPU, MISC
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
PCH Power Rail Table
+1.05VS U4G POWER +3VS S0 Iccmax
L1 Voltage Rail Voltage Current (A)
@ PJP1 1300mA MBK1608221YZF_2P
2 1 +1.05VS_PCH AA23 U48 +VCCADAC 2 1
VCCCORE[1] 1mA VCCADAC
AC23 VCCCORE[2] 1 1 1 V_PROC_IO 1.05 0.001
1U_0402_6.3V6K
C210
1U_0402_6.3V6K
C211
1U_0402_6.3V6K
C212
0.01U_0402_16V7K
C213
0.1U_0402_10V7K
C214
CRT
AD21 C215
PAD-OPEN 4x4m 1 1 1 1 VCCCORE[3]
10U_0603_6.3V6M
C209
AD23 U47 10U_0805_6.3V6M
VCCCORE[4] VSSADAC
VCC CORE
AF21
VCCCORE[5]
V5REF 5 0.001
AF23 2 2 2
D 2 2 2 2 VCCCORE[6] R252 +3VS D
AG21
VCCCORE[7] 0.022_0805_1%
AG23
VCCCORE[8]
V5REF_Sus 5 0.001
AG24 AK36 +VCCA_LVDS 1 2
VCCCORE[9] 1mA VCCALVDS UMA@
AG26
VCCCORE[10]
1
AG27
VCCCORE[11] VSSALVDS
AK37 Vcc3_3 3.3 0.266
AG29 DIS_ONLY@
VCCCORE[12] R253
AJ23
LVDS
VCCCORE[13] 0_0402_5%
AJ26
VCCCORE[14] VCCTX_LVDS[1]
AM37 VccADAC 3.3 0.001
AJ27 +1.8VS
2
VCCCORE[15] L2 UMA@
AJ29 AM38
VCCCORE[16] VCCTX_LVDS[2] 0.1UH_MLF1608DR10KT_10%_1608
AJ31
VCCCORE[17]
VccADPLLA 1.05 0.08
+1.05VS_PCH AP36 +VCCTX_LVDS 2 1
60mA VCCTX_LVDS[3] 0.1uH inductor, 200mA
1 1 1
1
22U_0805_6.3V6M
C218
VCCTX_LVDS[4] AP37 VccADPLLB 1.05 0.08
R254 2 1 0_0603_5% +1.05VS_VCCDPLLEXP AN19 C216 C217 DIS_ONLY@
VCCIO[28] 0.01U_0402_16V7K 0.01U_0402_16V7K UMA@ R255
2 UMA@ 2 UMA@ 2 0_0402_5% VccCore 1.05 1.3
PAD T47 @ +VCCAPLLEXP BJ22 R256 +3VS
2
VCCAPLLEXP 0_0805_5%
This pin can be left as no connect in V33 +3VS_VCC3_3_6 1 2 VccDMI 1.05 0.042
HVCMOS
VCC3_3[6]
AN16 VCCIO[15]
On-Die VR enabled mode (default). 1
AN17 VCCIO[16]
VccIO 1.05 2.925
V34 C219
VCC3_3[7]
0.1U_0402_10V7K
2 VccASW 1.05 1.01
AN21 VCCIO[17]
@ PJP2
2 1 AN26 VCCIO[18]
VccSPI 3.3 0.02
AN27 2925mA AT16 +VCCAFDI_VRM
PAD-OPEN 4x4m VCCIO[19] VCCVRM[3]
+1.05VS_PCH R257 AP21 +VCCP_VCCDMI +1.05VS VccDSW 3.3 0.003
C VCCIO[20] R258 C
0_0805_5%
1 2 +1.05VS_VCC_EXP AP23 AT20 +VCCP_VCCDMI 1 2
@ VCCIO[21] VCCDMI[1]
1 VccpNAND 1.8 0.19
DMI
+1.05VS_PCH
1U_0402_6.3V6K
C222
1U_0402_6.3V6K
C223
1U_0402_6.3V6K
C224
1U_0402_6.3V6K
C225
1 1 1 1 1 AP24 L8 0_0805_5%
VCCIO
VCCIO[22]
10U_0805_6.3V6M
C221
10UH_LB2012T100MR_20% C220
AP26 VCCIO[23] 20mA VCCIO[1] AB36 +1.05VS_VCC_DMI_CCI 1 2 1U_0402_6.3V6K VccRTC 3.3 6 uA
2
2 2 2 2 2 1 1
AT24 @ C285
VCCIO[24] C226 10U_0603_6.3V6M VccSus3_3 3.3 0.119
1U_0402_6.3V6K @
AN33 2 2
VCCIO[25]
VccSusHDA 3.3 / 1.5 0.01
AN34 AG16
+3VS R260 VCCIO[26] VCCPNAND[1] +VCCPNAND R261 +1.8VS
0_0805_5% 0_0805_5% VccVRM 1.8 / 1.5 0.16
NAND / SPI
1 2 +3VS_VCCA3GBG BH29 AG17 1 2
VCC3_3[3] 190mA VCCPNAND[2]
1
C227 VccCLKDMI 1.05 0.02
0.1U_0402_10V7K AJ16 1
VCCPNAND[3] C228
2 +VCCAFDI_VRM AP16 0.1U_0402_10V7K VccSSC 1.05 0.095
+1.05VS_PCH @ R262 VCCVRM[2]
AJ17
VCCPNAND[4] 2
0_0603_5% Place CH53 Near BG6 pin
2 1 +1.05VS_VCCAPLL_FDI BG6 VccDIFFCLKN 1.05 0.055
VCCFDIPLL
+1.05VS_PCH R263
1
1 2 +1.05VS_VCCDPLL_FDI AP17 VCCIO[27]
R313 VccALVDS 3.3 0.001
FDI
@C229
@ C229 0_0805_5% V1 +3V_VCCPSPI 1 2
20mA VCCSPI +3VS
1U_0402_6.3V6K 0_0805_5%
2 AU20 VccTX_LVDS 1.8 0.06
+VCCP_VCCDMI VCCDMI[2] 1
C230
B COUGARPOINT_FCBGA989 1U_0402_6.3V6K B
2
+VCCAFDI_VRM
+1.5VS
R265 2 1 0_0603_5% +VCCAFDI_VRM
VCCVRM = 160mA detail waiting for newest spec
A A

PCH (7/9) PWR
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
+3VS @ R267
0_0805_5%
+1.05VS_PCH @ R268
0_0603_5%
Have internal VRM
http://hobi-elektronika.net VCC3_3 = 266mA detal waiting for newest spec
1 2 2 1 +VCCACLK VCCDMI = 42mA detal waiting for newest spec
L3
10UH_LB2012T100MR_20%
1 2 +3VS_VCC_CLKF33 +3VALW R269
1 1 0_0603_5% U4J POWER R270 +1.05VS_PCH
10U_0805_10V4Z
C231
1U_0402_6.3V6K
C232
1 2 +VCCPDSW 0_0603_5%
1 AD49 N26 +1.05VS_VCCUSBCORE 2 1
VCCACLK VCCIO[29]
2 2 1
C234 P26
0.1U_0402_10V7K VCCIO[30] C233
T16 3mA
D C235 2 VCCDSW3_3 1U_0402_6.3V6K D
P28
0.1U_0402_10V7K VCCIO[31] 2
2 1 +PCH_VCCDSW V12 T27
DCPSUSBYP VCCIO[32]
@ T29
+3VS_VCC_CLKF33 VCCIO[33] R272 +3VALW
T38
+1.05VS_PCH @ R271 @ L4 VCC3_3[5] 0_0603_5%
0_0603_5% 10UH_LB2012T100MR_20% T23 +3V_VCCPUSB 2 1
1 2 +VCCAPLL_CPY 1 2 +VCCAPLL_CPY_PCH BH23
119mA VCCSUS3_3[7]
VCCAPLLDMI2 +3VALW
0.1U_0402_10V7K
C236
T24 1 R273
R274 +VCCDPLL_CPY VCCSUS3_3[8] +5VALW +3VALW
1 +1.05VS_PCH 1 2 0_0603_5% AL29
VCCIO[14]
0_0603_5%
V23 +3V_VCCAUBG 2 1
USB
VCCSUS3_3[9]
C237
10U_0805_6.3V6M
1
2
@ +VCCSUS1 AL24 V24 2 C238
2 DCPSUS[3] VCCSUS3_3[10] 0.1U_0402_10V7K R275 D1
1
P24 100_0402_5% RB751V-40 SOD-323
@ C239 VCCSUS3_3[6] 2 R276 +1.05VS_PCH
1U_0402_6.3V6K AA19 0_0603_5%
1
2 VCCASW[1] +1.05VS_VCCAUPLL +PCH_V5REF_SUS
VCCIO[34] T26 2 1
+1.05VS_PCH R277 AA21 1010mA
VCCASW[2] 1
0_0805_5%
1 2 +1.05VM_VCCASW AA24 M26 +PCH_V5REF_SUS C240
VCCASW[3] 1mA V5REF_SUS 0.1U_0603_25V7K
1 1 2
22U_0805_6.3V6M
C241
22U_0805_6.3V6M
C242
Clock and Miscellaneous

AA26 @
VCCASW[4] +VCCA_USBSUS C243
DCPSUS[4] AN23 1 2 1U_0402_6.3V6K
AA27 VCCASW[5]
2 2 AN24 +3V_VCCPSUS
VCCSUS3_3[1]
AA29 VCCASW[6]
AA31 +5VS +3VS
VCCASW[7]
OSCAN AC26 P34 +PCH_V5REF_RUN R278 +3VALW
VCCASW[8] 1mA V5REF
2
C 0_0603_5% C
SF000001500 1 1 1
1U_0402_6.3V6K
C244
1U_0402_6.3V6K
C245
1U_0402_6.3V6K
C246
AC27 2 1 R279 D2
VCCASW[9] +3V_VCCPSUS 100_0402_5% RB751V-40 SOD-323
N20
(220U 6.3V M V LESR15M VL H5.9)*2 1
PCI/GPIO/LPC
VCCSUS3_3[2] C247
AC29 VCCASW[10]
2 2 2 N22 1U_0402_6.3V
1
+1.05VS_PCH VCCSUS3_3[3] +PCH_V5REF_RUN
AC31 VCCASW[11]
R280 L5 P20 2 R281 +3VS
VCCSUS3_3[4] 1
0_0805_5% 10UH_LB2012T100MR_20% AD29 0_0805_5%
+VCCA_DPLL_L +1.05VS_VCCA_A_DPL VCCASW[12] C248
1 2 1 2 VCCSUS3_3[5]
P22 2 1
AD31 1 1U_0603_10V6K
VCCASW[13] C249 2
1 2 +1.05VS_VCCA_B_DPL W21 AA16 +3VS_VCCPCORE 0.1U_0402_10V7K
L6 VCCASW[14] VCC3_3[1]
2 +3VS
220U_6.3V_M
1U_0402_6.3V6K
C251
220U_6.3V_M
1U_0402_6.3V6K
C253
10UH_LB2012T100MR_20% 1 1 W23 W16 R282

VCCASW[15] VCC3_3[8] 0_0603_5%
1 1
C250
C252
+ + W24 T34 +3VS_VCCPPCI 2 1

VCCASW[16] VCC3_3[4]
1
W26 C254
2 2 2 2 VCCASW[17] 0.1U_0402_10V7K
W29 R283 +3VS
VCCASW[18] 0_0603_5% 2
W31 AJ2 +VCC3_3_2 2 1
R284 VCCASW[19] VCC3_3[2] +1.05VS_SATA3 R285 +1.05VS_PCH
1
0_0603_5% W33 0_0805_5%
+VCCDIFFCLK VCCASW[20] C255
+1.05VS_PCH 2 1 AF13 2 1
VCCIO[5] 0.1U_0402_10V7K
2 1
1 +VCCRTCEXT N16
C256 DCPRTC C257
1 AH13
1U_0402_6.3V6K C258 VCCIO[12] 1U_0402_6.3V6K
0.1U_0402_10V7K +VCCAFDI_VRM Y49 AH14 +1.05VS_SATA3 2
R286 2 VCCVRM[4] VCCIO[13]
0_0603_5% +1.05VS_VCCDIFFCLKN 2
B
2 1 +1.05VS_VCCDIFFCLKN AF14 L7 @ @ R287 +1.05VS_PCH B
+1.05VS_PCH VCCIO[6]
1 +1.05VS_VCCA_A_DPL BD47 10UH_LB2012T100MR_20% 0_0805_5%
SATA
VCCADPLLA 80mA +VCCSATAPLL +VCCSATAPLL_R2
AK1 1 2 1
C259 +1.05VS_VCCA_B_DPL VCCAPLLSATA +VCCAFDI_VRM
BF47 80mA
1U_0402_6.3V6K VCCADPLLB
2 1
AF11 +VCCAFDI_VRM @ C260
R288 +VCCDIFFCLK VCCVRM[1] +1.05VS_VCC_SATA R289 +1.05VS_PCH 10U_0805_6.3V6M
AF17
VCCIO[7]
0_0603_5% AF33
VCCIO[8]
0_0805_5% Place CH80 Near AK1 pin
2 1 +1.05VS_SSCVCC AF34 55mA AC16 +1.05VS_VCC_SATA 2 1 2
+1.05VS_PCH VCCIO[9] VCCIO[2]
1 +1.05VS_VCCDIFFCLKN AG34
VCCIO[11]
AC17 1
C262 VCCIO[3] C261
1U_0402_6.3V6K +1.05VS_SSCVCC AG33 AD17 1U_0402_6.3V6K
2 VCCIO[10] 95mA VCCIO[4]
@ R290 2
0_0603_5% +VCCSST V16 +1.05VS_PCH
+1.05VM_VCCSUS DCPSST
+1.05VS_PCH 2 1 1
1 C263 +1.05VM_VCCSUS T17 T21 +VCCME_22

0.1U_0402_10V7K DCPSUS[1] VCCASW[22]
V19
DCPSUS[2]
MISC
C264 2
1U_0402_6.3V6K +1.05VS R293 V21 +VCCME_23
2 0_0603_5% VCCASW[23]
CPU
@ 1 2 +V_CPU_IO BJ8
V_PROC_IO 1mA +VCCME_21
T19
VCCASW[21]
1 1 1
+RTCVCC +3VALW
4.7U_0603_6.3V6K
C265
0.1U_0402_10V7K
C266
0.1U_0402_10V7K
C267
RTC
A22 P32 +VCCSUSHDA R295 2 1 0_0603_5%

HDA
2 2 2 VCCRTC 10mA VCCSUSHDA

1U_0402_6.3V6K
C268
0.1U_0402_10V7K
C269
0.1U_0402_10V7K
C270
1 1 1 1
COUGARPOINT_FCBGA989 C271
A 0.1U_0402_16V4Z A
2 2 2 2

PCH (8/9) PWR
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
U4I
AY4 VSS[159] VSS[259] H46

AY42 VSS[160] VSS[260] K18
AY46 K26
VSS[161] VSS[261]
AY8 K39
VSS[162] VSS[262]
B11 K46
D U4H VSS[163] VSS[263] D
B15 K7
VSS[164] VSS[264]
H5 B19 L18
VSS[0] VSS[165] VSS[265]
B23 L2
VSS[166] VSS[266]
AA17 AK38 B27 L20
VSS[1] VSS[80] VSS[167] VSS[267]
AA2 AK4 B31 L26
VSS[2] VSS[81] VSS[168] VSS[268]
AA3 AK42 B35 L28
VSS[3] VSS[82] VSS[169] VSS[269]
AA33 AK46 B39 L36
VSS[4] VSS[83] VSS[170] VSS[270]
AA34 AK8 B7 L48
VSS[5] VSS[84] VSS[171] VSS[271]
AB11 AL16 F45 M12
VSS[6] VSS[85] VSS[172] VSS[272]
AB14 AL17 BB12 P16
VSS[7] VSS[86] VSS[173] VSS[273]
AB39 AL19 BB16 M18
VSS[8] VSS[87] VSS[174] VSS[274]
AB4 VSS[9] VSS[88] AL2 BB20 VSS[175] VSS[275] M22
AC19 VSS[13] VSS[92] AL27 BB30 VSS[179] VSS[279] M34
AC33 VSS[17] VSS[96] AL48 BC14 VSS[183] VSS[283] M46
AC34 VSS[18] VSS[97] AM11 BC18 VSS[184] VSS[284] M8
AC48 VSS[19] VSS[98] AM14 BC2 VSS[185] VSS[285] N18
AD10 VSS[20] VSS[99] AM36 BC22 VSS[186] VSS[286] P30
AD11 VSS[21] VSS[100] AM39 BC26 VSS[187] VSS[287] N47
AD19 VSS[24] VSS[103] AM46 BC36 VSS[190] VSS[290] T33
AD26 VSS[26] VSS[105] AN2 BC42 VSS[192] VSS[292] P43
AD27 VSS[27] VSS[106] AN29 BC48 VSS[193] VSS[293] P47
AD33 VSS[28] VSS[107] AN3 BD46 VSS[194] VSS[294] P7
AD34 VSS[29] VSS[108] AN31 BD5 VSS[195] VSS[295] R2
C C
AD36 VSS[30] VSS[109] AP12 BE22 VSS[196] VSS[296] R48
AD37 VSS[31] VSS[110] AP19 BE26 VSS[197] VSS[297] T12
AD38 VSS[32] VSS[111] AP28 BE40 VSS[198] VSS[298] T31
AD39 VSS[33] VSS[112] AP30 BF10 VSS[199] VSS[299] T37
AD40 VSS[35] VSS[114] AP38 BF16 VSS[201] VSS[301] W34
AD43 AP42 BF22 T47
VSS[37] VSS[116] VSS[203] VSS[303]
AD45 AP46 BF24 T8
VSS[38] VSS[117] VSS[204] VSS[304]
AD46 AP8 BF26 V11
VSS[39] VSS[118] VSS[205] VSS[305]
AD8 AR2 BF28 V17
VSS[40] VSS[119] VSS[206] VSS[306]
AE2 AR48 BD3 V26
VSS[41] VSS[120] VSS[207] VSS[307]
AE3 AT11 BF30 V27
VSS[42] VSS[121] VSS[208] VSS[308]
AF10 AT13 BF38 V29
VSS[43] VSS[122] VSS[209] VSS[309]
AF12 AT18 BF40 V31
VSS[44] VSS[123] VSS[210] VSS[310]
AD14 AT22 BF8 V36
VSS[45] VSS[124] VSS[211] VSS[311]
AD16 AT26 BG17 V39
VSS[46] VSS[125] VSS[212] VSS[312]
AF16 AT28 BG21 V43
VSS[47] VSS[126] VSS[213] VSS[313]
AF19 AT30 BG33 V7
VSS[48] VSS[127] VSS[214] VSS[314]
AF24 AT32 BG44 W17
VSS[49] VSS[128] VSS[215] VSS[315]
AF26 AT34 BG8 W19
VSS[50] VSS[129] VSS[216] VSS[316]
AF27 AT39 BH11 W2
VSS[51] VSS[130] VSS[217] VSS[317]
AF29 AT42 BH15 W27
VSS[52] VSS[131] VSS[218] VSS[318]
AF31 AT46 BH17 W48
VSS[53] VSS[132] VSS[219] VSS[319]
AF38 AT7 BH19 Y12
VSS[54] VSS[133] VSS[220] VSS[320]
AF4 AU24 H10 Y38
VSS[55] VSS[134] VSS[221] VSS[321]
AF42 AU30 BH27 Y4
VSS[56] VSS[135] VSS[222] VSS[322]
AF46 AV16 BH31 Y42
VSS[57] VSS[136] VSS[223] VSS[323]
AF5 AV20 BH33 Y46
VSS[58] VSS[137] VSS[224] VSS[324]
AF7 AV24 BH35 Y8
VSS[59] VSS[138] VSS[225] VSS[325]
AF8 AV30 BH39 BG29
VSS[60] VSS[139] VSS[226] VSS[328]
AG19 AV38 BH43 N24
B VSS[61] VSS[140] VSS[227] VSS[329] B
AG2 AV4 BH7 AJ3
VSS[62] VSS[141] VSS[228] VSS[330]
AG31 AV43 D3 AD47
VSS[63] VSS[142] VSS[229] VSS[331]
AG48 AV8 D12 B43
VSS[64] VSS[143] VSS[230] VSS[333]
AH11 AW14 D16 BE10
VSS[65] VSS[144] VSS[231] VSS[334]
AH3 AW18 D18 BG41
VSS[66] VSS[145] VSS[232] VSS[335]
AH36 AW2 D22 G14
VSS[67] VSS[146] VSS[233] VSS[337]
AH39 AW22 D24 H16
VSS[68] VSS[147] VSS[234] VSS[338]
AH40 AW26 D26 T36
VSS[69] VSS[148] VSS[235] VSS[340]
AH42 AW28 D30 BG22
VSS[70] VSS[149] VSS[236] VSS[342]
AH46 AW32 D32 BG24
VSS[71] VSS[150] VSS[237] VSS[343]
AH7 AW34 D34 C22
VSS[72] VSS[151] VSS[238] VSS[344]
AJ19 AW36 D38 AP13
VSS[73] VSS[152] VSS[239] VSS[345]
AJ21 AW40 D42 M14
VSS[74] VSS[153] VSS[240] VSS[346]
AJ24 AW48 D8 AP3
VSS[75] VSS[154] VSS[241] VSS[347]
AJ33 AV11 E18 AP1
VSS[76] VSS[155] VSS[242] VSS[348]
AJ34 AY12 E26 BE16
VSS[77] VSS[156] VSS[243] VSS[349]
AK12 AY22 G18 BC16
VSS[78] VSS[157] VSS[244] VSS[350]
AK3 AY28 G20 BG28
VSS[79] VSS[158] VSS[245] VSS[351]
G26 BJ28
COUGARPOINT_FCBGA989 VSS[246] VSS[352]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3
VSS[258]
A A

PCH (9/9) VSS
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
7/12 Update
UV1A
PCIE_CTX_GRX_N[0..15]
<5> PCIE_CTX_GRX_N[0..15] PCIE_CTX_GRX_P0 +3VS_VGA
AP17 Part 1 of 7 K1
PCIE_CTX_GRX_P[0..15] PCIE_CTX_GRX_N0 PEX_RX0 GPIO0 VGA_GPIO1
<5> PCIE_CTX_GRX_P[0..15] AN17 K2
PCIE_CTX_GRX_P1 PEX_RX0_N GPIO1 VGA_BL_PWM
AN19 K3 VGA_BL_PWM <34>
PCIE_CRX_GTX_N[0..15] PCIE_CTX_GRX_N1 PEX_RX1 GPIO2 VGA_ENVDD PCH_THRMTRIP#_R
<5> PCIE_CRX_GTX_N[0..15] AP19 H3 VGA_ENVDD <34> PCH_THRMTRIP#_R <19>
PEX_RX1_N GPIO3
1
PCIE_CTX_GRX_P2 AR19 H2 VGA_ENBKL
PCIE_CRX_GTX_P[0..15] PCIE_CTX_GRX_N2 PEX_RX2 GPIO4 GPU_VID0 VGA_ENBKL <34>
AR20 H1 RV208
<5> PCIE_CRX_GTX_P[0..15] PEX_RX2_N GPIO5 GPU_VID0 <59>
3
PCIE_CTX_GRX_P3 AP20 H4 GPU_VID1 10K_0402_5%
PCIE_CTX_GRX_N3 PEX_RX3 GPIO6 GPU_VID1 <59>
AN20 H5 DIS@ QV7B
PCIE_CTX_GRX_P4 PEX_RX3_N GPIO7 OVERT# +3VS_VGA
AN22 H6 DMN66D0LDW-7 2N_SOT363-6
2
PCIE_CTX_GRX_N4 PEX_RX4 GPIO8 THERM#_VGA
AP22 J7 5 DIS@
PCIE_CTX_GRX_P5 PEX_RX4_N GPIO9 @ CV252
Under GPU(below 150mils) AR22
PEX_RX5 GPIO10
K4 MEM_VREF <28,29,30,31>
6
D PCIE_CTX_GRX_N5 D
150mA AR23 K5 1 2
4
BLM18PG330SN1D_0603 PCIE_CTX_GRX_P6 PEX_RX5_N GPIO11 GPIO12 @ QV7A
AP23 H7
GPIO
PEX_RX6 GPIO12
5
1 2 +PLLVDD PCIE_CTX_GRX_N6 AN23 J4 UV14 0.1U_0402_16V4Z DMN66D0LDW-7 2N_SOT363-6
+1.05VS_VGA PEX_RX6_N GPIO13 TV1
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
LV1 PCIE_CTX_GRX_P7 AN25 J6 2 OVERT# 2
P
PEX_RX7 GPIO14 B VGA_PGOOD <19,59> DIS@
CV2
CV3
CV1
CV4
CV5
30ohms (ESR=0.01) Bead 2 1 1 1 1 PCIE_CTX_GRX_N7 AP25 L1 4
PCIE_CTX_GRX_P8 PEX_RX7_N GPIO15 Y
DIS@ AR25 L2 1
1
PEX_RX8 GPIO16 A VGA_HDMI_HPD <36>
G
PCIE_CTX_GRX_N8 AR26 L4
PEX_RX8_N GPIO17
DIS@
DIS@
DIS@
DIS@
DIS@
PCIE_CTX_GRX_P9 AP26 M4
3
1 2 2 2 2 PCIE_CTX_GRX_N9 PEX_RX9 GPIO18 NC7SZ08P5X_NL_SC70-5
AN26 L7
PCIE_CTX_GRX_P10 PEX_RX9_N GPIO19
AN28 L5
PCIE_CTX_GRX_N10 PEX_RX10 GPIO20
AP28 K6
PCIE_CTX_GRX_P11 PEX_RX10_N GPIO21
AR28 L6
PCIE_CTX_GRX_N11 PEX_RX11 GPIO22
AR29 M6
PCIE_CTX_GRX_P12 PEX_RX11_N GPIO23 dGPU_HDMI_HPD 1
AP29 M7 2
PCIE_CTX_GRX_N12 PEX_RX12 GPIO24 DIS_ONLY@ RV104 0_0402_5%
AN29
+3VS_VGA PCIE_CTX_GRX_P13 PEX_RX12_N
AN31 N1
PCIE_CTX_GRX_N13 PEX_RX13 MIOA_D0_NC +3VS_VGA
AP31 P4
+3VS_VGA PCIE_CTX_GRX_P14 PEX_RX13_N MIOA_D1_NC
AR31 P1
PCIE_CTX_GRX_N14 PEX_RX14 MIOA_D2_NC
AR32 P2
PEX_RX14_N MIOA_D3_NC
2
DIS@ PCIE_CTX_GRX_P15 AR34 P3

DIS@ RV24 RV25 PCIE_CTX_GRX_N15 PEX_RX15 MIOA_D4_NC OVERT#
AP34 T3 1 2
2.2K_0402_5% 2.2K_0402_5% PEX_RX15_N MIOA_D5_NC RV1 DIS@ 10K_0402_5%
DIS@ MIOA_D6_NC
T2
GPIO12
T1 1 2
MIOA_D7_NC
5
DIS@ PCIE_CRX_GTX_P0 CV6 DIS@ 1 2 0.1U_0402_10V6K PCIE_CRX_C_GTX_P0 AL17 U4 RV2 DIS@ 10K_0402_5%
1
PCIE_CRX_GTX_N0 PCIE_CRX_C_GTX_N0 PEX_TX0 MIOA_D8_NC
PCI EXPRESS
QV1B CV7 DIS@ 1 2 0.1U_0402_10V6K AM17 U1 VGA_EDID_CLK 1 2
VGA_SMB_CK2 PCIE_CRX_GTX_P1 CV8 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P1 PEX_TX0_N MIOA_D9_NC RV3 DIS@ 2.2K_0402_5%
4 3 EC_SMB_CK2 <15,40,45,50> 1 2 AM18 U2
PCIE_CRX_GTX_N1 CV9 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N1 PEX_TX1 MIOA_D10_NC VGA_EDID_DATA
1 2 AM19 U3 1 2
PEX_TX1_N MIOA_D11_NC
2
DIS@ 2N7002DW-T/R7_SOT363-6 PCIE_CRX_GTX_P2 CV10 DIS@ 1 2 0.1U_0402_10V6K PCIE_CRX_C_GTX_P2 AL19 R6 RV4 DIS@ 2.2K_0402_5%
QV1A PCIE_CRX_GTX_N2 CV11 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N2 PEX_TX2 MIOA_D12_NC
1 2 AK19 T6
DVO
VGA_SMB_DA2 PCIE_CRX_GTX_P3 CV12 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P3 PEX_TX2_N MIOA_D13_NC
1 6 EC_SMB_DA2 <15,40,45,50> 1 2 AL20 N6
PCIE_CRX_GTX_N3 CV13 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N3 PEX_TX3 MIOA_D14_NC
1 2 AM20
2N7002DW-T/R7_SOT363-6 PCIE_CRX_GTX_P4 CV14 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P4 PEX_TX3_N
1 2 AM21 Y1
C PCIE_CRX_GTX_N4 PCIE_CRX_C_GTX_N4 PEX_TX4 MIOB_D0_NC C
PU AT EC SIDE, +3VS AND 4.7K CV15 DIS@ 1 2 0.1U_0402_10V6K AM22
PEX_TX4_N MIOB_D1_NC
Y2
PCIE_CRX_GTX_P5 CV16 DIS@ 1 2 0.1U_0402_10V6K PCIE_CRX_C_GTX_P5 AL22 Y3 THERM#_VGA 1 2
PCIE_CRX_GTX_N5 CV17 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N5 PEX_TX5 MIOB_D2_NC RV7 DIS@ 100K_0402_5%
1 2 AK22 AB3
PCIE_CRX_GTX_P6 CV18 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P6 PEX_TX5_N MIOB_D3_NC HDCP_SCL
1 2 AL23 AB2 1 2
PCIE_CRX_GTX_N6 CV19 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N6 PEX_TX6 MIOB_D4_NC RV8 DIS@ 2.2K_0402_5%
1 2 AM23 AB1
PCIE_CRX_GTX_P7 CV20 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P7 PEX_TX6_N MIOB_D5_NC HDCP_SDA
1 2 AM24 AC4 1 2
1 2 AM25 AC1
PCIE_CRX_GTX_P8 CV22 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P8 PEX_TX7_N MIOB_D7_NC VGA_CRT_DATA
1 2 AL25 AC2 1 2
1 2 AK25 AC3
PCIE_CRX_GTX_P9 CV24 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P9 PEX_TX8_N MIOB_D9_NC VGA_CRT_CLK
1 2 AL26 AE3 1 2
PCIE_CRX_GTX_N9 CV25 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N9 PEX_TX9 MIOBD_10_NC RV11 DIS@ 2.2K_0402_5%
1 2 AM26 AE2
PCIE_CRX_GTX_P10 CV26 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P10 PEX_TX9_N MIOB_D11_NC I2CB_SCL
1 2 AM27 U6 1 2
+3VS_VGA +3VS_VGA PCIE_CRX_GTX_N10 CV27 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N10 PEX_TX10 MIOB_D12_NC RV12 DIS@ 2.2K_0402_5%
1 2 AM28 W6
PCIE_CRX_GTX_P11 CV28 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P11 PEX_TX10_N MIOB_D13_NC I2CB_SDA
1 2 AL28 Y6 1 2
1 2 AK28
PCIE_CRX_GTX_P12 CV239 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P12 PEX_TX11_N
1 2 AK29 N3
DIS_ONLY@ PCIE_CRX_GTX_N12 CV30 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N12 PEX_TX12 MIOA_HSYNC_NC
1 2 AL29 L3 At LVDS site
PEX_TX12_N MIOA_VSYNC_NC
2
1 2 @ PCIE_CRX_GTX_P13 CV31 DIS@ 1 2 0.1U_0402_10V6K PCIE_CRX_C_GTX_P13 AM29 VGA_ENVDD 1 DIS@ 2

RV220 0_0402_5% RV105 PCIE_CRX_GTX_N13 CV32 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N13 PEX_TX13 RV14 10K_0402_5%
1 2 AM30 W1
10K_0402_5% PCIE_CRX_GTX_P14 CV33 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_P14 PEX_TX13_N MIOB_HSYNC_NC VGA_ENBKL @
1 2 AM31 W2 1 2
PCIE_CRX_GTX_N14 CV34 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N14 PEX_TX14 MIOB_VSYNC_NC RV15 10K_0402_5%
1 2 AM32
PEX_TX14_N
5
UV2 PCIE_CRX_GTX_P15 CV35 DIS@ 1 2 0.1U_0402_10V6K PCIE_CRX_C_GTX_P15 AN32 N2 VGA_BL_PWM 2 1

1
BUF_PLT_RST# PCIE_CRX_GTX_N15 CV36 DIS@ 0.1U_0402_10V6K PCIE_CRX_C_GTX_N15 PEX_TX15 MIOA_DE_NC RV16 @ 10K_0402_5%
2 1 2 AP32 P5
P
<18,37,38,44,45,49> BUF_PLT_RST# B PEX_TX15_N MIOA_CTL3_NC

4 PLT_RST_VGA# N5
DGPU_HOLD_RST# Y MIOA_VREF_NC VGA_GPIO1
<18> DGPU_HOLD_RST# 1 1 2
A
G
Y5 RV17 DIS@ 100K_0402_5%

MIOB_DE_NC
1
OPTI@ CLK_PCIE_VGA AR16 W3

<15> CLK_PCIE_VGA
3
RV18 CLK_PCIE_VGA# PEX_REFCLK MIOB_CTL3_NC

<15> CLK_PCIE_VGA# AR17 AF1
NC7SZ08P5X_NL_SC70-5 CLK_REQ_GPU# PEX_REFCLK_N MIOB_VREF_NC
10K_0402_5% AR13
PEX_CLKREQ_N CV124
N4 1 2
OPTI@ @ PEX_TSTCLK_OUT MIOA_CLKIN_NC RV19 DIS@ 10K_0402_5%
Differential signal 1 2 AJ17 R4
2
RV20 200_0402_1% PEX_TSTCLK_OUT# PEX_TSTCLK_OUT MIOA_CLKOUT_NC

AJ18
B PEX_TSTCLK_OUT_N B
AE1 1 2
MIOB_CLKIN_NC RV21 DIS@ 10K_0402_5%
V4
PLT_RST_VGA# MIOB_CLKOUT_NC
AM16
PEX_RST_N
AG21
PEX_TERMP MIOA_CLKOUT_NC_N
T4 10K_0402_5%
1 2 PEX_TERMP W4 OPTI@ 300 ohms @100MHz (ESR=0.25)
RV22 DIS@ 2.49K_0402_1% MIOB_CLKOUT_NC_N
1 2 60mA U5
120mA LV5 DIS_ONLY@
RV23 10M_0402_5% +PLLVDD AE9
MIOACAL_PD_VDDQ_NC
T5 +DACA_VDD
Under GPU Near GPU 1 2
PLLVDD MIOACAL_PU_GND_NC +3VS_VGA
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
DIS@ 45mA MMZ1608D301BT_0603
DIS_ONLY@ CV124
DIS_ONLY@ CV125
DIS_ONLY@ CV126
DIS_ONLY@ CV122
DIS_ONLY@ CV127
DIS_ONLY@ CV128
1U_0402_6.3V4Z
SP_PLLVDD, PLLVDD and AF9
SP_PLLVDD MIOBCAL_PD_VDDQ_NC
AA7 1 1 1 1 1 1
YV1 45mA AA6
XTALIN1 VID_PLLVDD Combined MIOBCAL_PU_GND_NC
2XTAL_OUT AD9
VID_PLLVDD
CLK
XTALIN 2 2 2 2 2 2
1 27MHZ_16PF_X5H027000FG1H1 B1
XTAL_IN
CV37 DIS@ CV38 XTAL_OUT B2 AM15 VGA_CRT_R
XTAL_OUT DACA_RED VGA_CRT_G VGA_CRT_R <35>
18P_0402_50V8J 18P_0402_50V8J AM14
XTALOUT DACA_GREEN VGA_CRT_B VGA_CRT_G <35>
DIS@ DIS@ D1 AL14
2 2 XTAL_OUTBUFF DACA_BLUE VGA_CRT_B <35>
2 1 XTALSSIN D2
XTAL_SSIN
1
RV26 DIS@ 10K_0402_5% AM13 VGA_CRT_HSYNC

DACA_HSYNC VGA_CRT_VSYNC VGA_CRT_HSYNC <35>
RV27 Internal Thermal Sensor AL13
DACA_VSYNC VGA_CRT_VSYNC <35>
10K_0402_5%
VGA_SMB_CK2 E2 AJ12 +DACA_VDD
DIS@ I2CS_SCL DACA_VDD
VGA_SMB_DA2 E1 AK12 +DACA_VREF Close to GPU
2
I2CS_SDA DACA_VREF DACA_RSET

AK13
DACA_RSET
0.1U_0402_10V7K
VGA_EDID_CLK E3
LVDS <34> VGA_EDID_CLK I2CC_SCL
1
DACs
CV130
VGA_EDID_DATA E4 AK4 1 VGA_CRT_R 1 2
+3VS_VGA <34> VGA_EDID_DATA I2CC_SDA DACB_RED
DIS_ONLY@
AL4 RV107 RV106 DIS_ONLY@ 150_0402_1%
<18,51,57,58,59> DGPU_PWR_EN I2CB_SCL DACB_GREEN VGA_CRT_G
<33> I2CB_SCL G3 AJ4 124_0402_1% 1 2
I2CB_SDA I2CB_SCL DACB_BLUE DIS_ONLY@ RV108 DIS_ONLY@ 150_0402_1%
I2C
<33> I2CB_SDA G2
I2CB_SDA
2
AM1 2 VGA_CRT_B 1 2
2
DACB_HSYNC
2
RV29 VGA_CRT_CLK G1 AM2 RV109 DIS_ONLY@ 150_0402_1%

10K_0402_5% RV30
CRT <35> VGA_CRT_CLK
VGA_CRT_DATA G4 I2CA_SCL DACB_VSYNC
A
<35> VGA_CRT_DATA I2CA_SDA A
OPTI@ 10K_0402_5% AG7 +DACB_VDD 1 2
DACB_VDD
1 2
HDCP_SCL
G
DIS@ F6 AK6 RV31 DIS@ 10K_0402_5%

QV2 OPTI@ HDCP_SDA I2CH_SCL DACB_VREF
G6 AH7
1
CLK_REQ_GPU# I2CH_SDA DACB_RSET

<15> CLK_REQ_VGA# 1 3
D
N12P-GT1-A1_BGA_973P DIS@
2
2N7002H 1N_SOT23-3
@ RV32
@RV32
10K_0402_5%
@
1 2 N12P-PCIE/DAC/GPIO
1
RV110 0_0402_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
UV1D
Part 4 of 7
<34> VGA_TXCLK+ VGA_TXCLK+ AM11 A2
VGA_TXCLK- IFPA_TXC NC_0
<34> VGA_TXCLK- AM12 IFPA_TXC_N NC_1 A7
<34> VGA_TXOUT0+ VGA_TXOUT0+ AM8 B7
VGA_TXOUT0- IFPA_TXD0 NC_2
<34> VGA_TXOUT0- AL8 IFPA_TXD0_N NC_3 C5
<34> VGA_TXOUT1+ VGA_TXOUT1+ AM10 C7
<34> VGA_TXOUT1- AM9 IFPA_TXD1_N NC_5 D5
<34> VGA_TXOUT2+ VGA_TXOUT2+ AK10 D6
<34> VGA_TXOUT2- AL10 IFPA_TXD2_N NC_7 D7
AK11 IFPA_TXD3 NC_8 E5
D
AL11 IFPA_TXD3_N NC_9 E7 D
NC_10 F4
NC_11 G5
<34> VGA_TZCLK+ VGA_TZCLK+ AP13 H32
VGA_TZCLK- IFPB_TXC NC_12
<34> VGA_TZCLK- AN13 IFPB_TXC_N NC_13 J25
<34> VGA_TZOUT0+ VGA_TZOUT0+ AN8 J26
VGA_TZOUT0- IFPB_TXD4 NC_14
<34> VGA_TZOUT0- AP8 IFPB_TXD4_N NC_15 P6
<34> VGA_TZOUT1+ VGA_TZOUT1+ AP10 U7
<34> VGA_TZOUT1- AN10 IFPB_TXD5_N NC_17 V6
<34> VGA_TZOUT2+ VGA_TZOUT2+ AR11 Y4
<34> VGA_TZOUT2- AR10 IFPB_TXD6_N NC_19 AA4
AN11 IFPB_TXD7 NC_20 AB4
AP11 IFPB_TXD7_N NC_21 AB7
NC_22 AC5
NC
NC_23 AD6
AM7 IFPC_L0 NC_24 AF6
AM6 IFPC_L0_N NC_25 AG6
AL5 IFPC_L1 NC_26 AG20
AM5 IFPC_L1_N NC_27 AJ5
AM3 IFPC_L2 NC_28 AK15
AM4 IFPC_L2_N NC_29 AL7
AP1 IFPC_L3
AR2 IFPC_L3_N
AR8 IFPD_L0
AR7 IFPD_L0_N
AP7 IFPD_L1
AN7 IFPD_L1_N
AN5 IFPD_L2
LVDS/TMDS
C AP5 IFPD_L2_N
C
AR5 IFPD_L3
AR4 IFPD_L3_N
<36> VGA_HDMI_TX2+ VGA_HDMI_TX2+ AH6

VGA_HDMI_TX2- IFPE_L0
<36> VGA_HDMI_TX2- AH5 IFPE_L0_N
<36> VGA_HDMI_TX1+ VGA_HDMI_TX1+ AH4
<36> VGA_HDMI_TX1- AG4 IFPE_L1_N
<36> VGA_HDMI_TX0+ VGA_HDMI_TX0+ AF4
<36> VGA_HDMI_TX0- AF5 IFPE_L2_N
<36> VGA_HDMI_CLK+ VGA_HDMI_CLK+ AE6
VGA_HDMI_CLK- IFPE_L3
<36> VGA_HDMI_CLK- AE5 IFPE_L3_N
D35 VDD_SENSE_VGA VDD_SENSE_VGA <59>
VDD_SENSE_0
AL2 IFPF_L0 VDD_SENSE_1 P7
AL3 IFPF_L0_N VDD_SENSE_2 AD20
AJ3 IFPF_L1
AJ2 IFPF_L1_N
AJ1 IFPF_L2
AH1 AD19 GND_SENSE_VGA GND_SENSE_VGA <59>
IFPF_L2_N GND_SENSE_0
AH2 IFPF_L3 GND_SENSE_1 E35
AH3 IFPF_L3_N GND_SENSE_2 R7
trace width: 16mils
differential voltage sensing.
AP2 IFPC_AUX_I2CW _SCL differential signal routing.
AN3 IFPC_AUX_I2CW _SDA_N TEST
B B
AP4 AP35 TESTMODE
+3VS_VGA IFPD_AUX_I2CX_SCL TESTMODE
AN4 IFPD_AUX_I2CX_SDA_N JTAG_TCK AP14 TV2
1
JTAG_TDI AN14 TV3
JTAG_TDO AN16 TV4
1 2 VGA_HDMI_CLK VGA_HDMI_CLK AE4 AR14 10K_0402_5%
RV113 4.7K_0402_5% HDMI <36> VGA_HDMI_CLK
VGA_HDMI_DATA AD4
IFPE_AUX_I2CY_SCL JTAG_TMS
AP16 1 2
TV5
RV33
<36> VGA_HDMI_DATA IFPE_AUX_I2CY_SDA_N JTAG_TRST_N
DIS_ONLY@ RV34 10K_0402_5% DIS@
2
1 2 VGA_HDMI_DATA DIS@
RV114 4.7K_0402_5% AF3
DIS_ONLY@ IFPF_AUX_I2CZ_SCL
AF2 IFPF_AUX_I2CZ_SDA_N SERIAL
ROM_CS_N C3
D3 ROM_SI ROM_SI <32>
+3VS_VGA ROM_SI ROM_SO
ROM_SO C4 ROM_SO <32>
D4 ROM_SCLK ROM_SCLK <32>
ROM_SCLK
2
RV35
10K_0402_5% GENERAL A5 1 2
DIS@ NC/SPDIF_NC RV36 @ 36K_0402_5%
A4 BUFRST_N
N9 1 2
1
MULTI_STRAP_REF0_GND RV37 DIS@ 40.2K_0402_1%

AB5 CEC
MULTI_STRAP_REF1_GND M9 1 2
<32> STRAP0 STRAP0 W5 RV38 DIS@ 40.2K_0402_1%
STRAP1 STRAP0
<32> STRAP1 W7 STRAP1 THERMDP B5
<32> STRAP2 STRAP2 V7 B4
STRAP2 THERMDN
A A

N12P-LVDS/HDMI/DP/THM
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
+1.35VS_VGA
2000mA UV1E Close to PEX_IOVDD PIN:
+1.05VS_VGA
For GDDR5 setting. Near GPU 3.5A AK16, AK17, AK21, AK24, and AK27
Part 5 of 7
J23 AG11
Near GPU
FBVDDQ_0 PEX_IOVDDQ_0
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
DIS@ CV273
DIS@ CV274
DIS@ CV275
CV276
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
J24 AG12
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@ CV261
DIS@ CV262
DIS@ CV263
DIS@ CV264
DIS@ CV265
DIS@ CV266
DIS@ CV267
DIS@ CV268
DIS@ CV269
DIS@ CV270
DIS@ CV271
DIS@ CV272
DIS@ CV43
DIS@ CV44
DIS@ CV45
DIS@ CV46
DIS@ CV47
DIS@ CV48
DIS@ CV49
DIS@ CV50
DIS@ CV51
DIS@ CV52
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1 1 1 1 1 1 1 1 2 2 2 2 1 1 1 1 J29 AG13 1 1 1 1 1 1 2 2 1 1
AA27 AG15
AA29 AG16
DIS@
AA31 AG17
2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 FBVDDQ_5 PEX_IOVDDQ_5 2 2 2 2 2 2 1 1 2 2
AB27 AG18
AB29 AG22
AC27 AG23
AD27 AG24
FBVDDQ_9 PEX_IOVDDQ_9 +1.05VS_VGA
D AE27
AG25 Under GPU(below 150mils) D
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
+1.35VS_VGA
Under GPU(below 150mils) AJ28
AG26
DIS@ CV53
DIS@ CV54
DIS@ CV55
DIS@ CV56
B18 AJ14 1 1 1 1
E21 AJ15
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
G17 AJ19
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@ CV277
DIS@ CV278
DIS@ CV279
DIS@ CV280
CV281
CV282
CV283
DIS@ CV284
DIS@ CV285
DIS@ CV286
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 G18 AJ21
FBVDDQ_15 PEX_IOVDDQ_15 2 2 2 2
G22 AJ22
G8 AJ24
DIS@
DIS@
DIS@
G9 AJ25
2 2 2 2 2 2 2 2 2 2 FBVDDQ_18 PEX_IOVDDQ_18
H29 AJ27
POWER
J14 AK18
J15 AK20
J16 FBVDDQ_22 PEX_IOVDDQ_22 AK23
J17 FBVDDQ_23 PEX_IOVDDQ_23 AK26
+1.05VS_VGA
J20 FBVDDQ_24 PEX_IOVDDQ_24 AL16 Under GPU(below 150mils)
J21 LV2
FBVDDQ_25
J22 FBVDDQ_26
2 1
0.1U_0402_10V7K
4.7U_0603_6.3V6K
N27 FBVDDQ_27 120ohms @100MHz (ESR=0.18)
1U_0402_6.3V6K
DIS@ CV65
DIS@ CV66
DIS@ CV67
120ohms @100MHz (ESR=0.18) Under GPU(below 150mils) P27 AK16 1 1 1 BLM18PG121SN1D_0603
FBVDDQ_28 PEX_IOVDD_0
R27 FBVDDQ_29 PEX_IOVDD_1 AK17
+1.05VS_VGA T27 AK21
LV6 200mA U27
FBVDDQ_30 PEX_IOVDD_2
AK24
+IFPAB_PLLVDD FBVDDQ_31 PEX_IOVDD_3 2 2 2
2 1 U29 AK27
BLM18PG181SN1D_0603 FBVDDQ_32 PEX_IOVDD_4
V27 FBVDDQ_33 120mA
0.1U_0402_10V7K
DIS_ONLY@ V29 FBVDDQ_34
1U_0402_6.3V6K
DIS_ONLY@ CV139
DIS_ONLY@ CV140
DIS_ONLY@ CV141
CV141 1 1 1 V34 FBVDDQ_35 +PEX_PLLVDD
W27 FBVDDQ_36 PEX_PLLVDD AG14
Y27 FBVDDQ_37 +1.05VS_VGA
4.7U_0603_6.3V6K
2 2 2
+IFPAB_PLLVDD AK9 AG19
240mA (120mA each)
IFPAB_PLLVDD PEX_SVDD_3V3
0.1U_0402_10V7K
4.7U_0603_6.3V6K
10K_0402_5% 1 @ 2 AJ11 F7
IFPAB_RSET PEX_SVDD_3V3_NC
1U_0402_6.3V6K
DIS@ CV68
DIS@ CV287
DIS@ CV69
OPTI@ RV40 1K_0402_1% 1 1 1
+3VS_VGA
+IFPAB_IOVDD AG9
120mA(12~16mils)
C IFPA_IOVDD C
AG10 IFPB_IOVDD VDD33_0 J10
2 2 2
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6K
VDD33_1 J11
1U_0402_6.3V6K
DIS@ CV70
DIS@ CV71
DIS@ CV72
DIS@ CV73
VDD33_2 J12 1 1 1 1
2 DIS@ 1 +IFPC_PLLVDD AJ9 J13
@ IFPC_PLLVDD VDD33_3
1 2 RV42 10K_0402_5% AK7 IFPC_RSET VDD33_4 J9
RV43 1K_0402_1%
2 DIS@ 1 +IFPC_IOVDD AJ8 2 2 2 2
RV44 10K_0402_5% IFPC_IOVDD
P9
DIS@ 1 +IFPD_PLLVDD MIOA_VDDQ_NC_0
2 AC6 R9
IFPD_PLLVDD MIOA_VDDQ_NC_1
2
1 @ 2 RV45 10K_0402_5% AB6 T9 Under GPU(below 150mils)
RV46 1K_0402_1% IFPD_RSET MIOA_VDDQ_NC_2 RV48
U9
DIS@ 1 +IFPD_IOVDD MIOA_VDDQ_NC_3 10K_0402_5%
2 AK8
IFPD_IOVDD
RV47 10K_0402_5% DIS@
AA9
1
+IFPEF_PLLVDD MIOB_VDDQ_NC_0
AJ6 AB9
DIS@ 2 IFPEF_PLLVDD MIOB_VDDQ_NC_1
1 AL1
IFPEF_RSET MIOB_VDDQ_NC_2
W9
RV50 1K_0402_1% Y9
+IFPE_IOVDD MIOB_VDDQ_NC_3
AE7
IFPE_IOVDD
2
AD7
IFPF_IOVDD RV52
10K_0402_5%
DIS@
+3VS to +3VS_VGA J10
1
+3VS +3VS_VGA 1 2
+3VS 1 2 +3VS_VGA
300ohms @100MHz (ESR=0.25)
180ohms @100MHz (ESR=0.2) QV5
+3VS_VGA AO3413_SOT23 JUMP_43X79
Under GPU(below 150mils) 220mA
@
+1.8VS LV9 OPTI@
LV8 300mA 2 1 +IFPEF_PLLVDD
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
D
2 1 +IFPAB_IOVDD BLM18PG181SN1D_0603 3 1
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
1U_0402_6.3V6K
DIS_ONLY@ CV143
DIS_ONLY@ CV146
DIS_ONLY@ CV147
DIS_ONLY@ CV148
DIS_ONLY@ CV149
DIS_ONLY@ CV150
4.7U_0603_6.3V6K
BLM18PG181SN1D_0603 1 IFPA_IOVDD and DIS_ONLY@ 1 1 1 1 1
1
DIS_ONLY@ CV142
DIS_ONLY@ CV144
DIS_ONLY@ CV145
4.7U_0603_6.3V6K
DIS_ONLY@ 1 1 1 CV150
IFPB_IOVDD combined OPTI@
G
B B
2
RV205 RV206
2 2 2 2 2 2 470_0603_5%
<51> DGPU_PWR_EN# 1 2
CV145 2 2 2 10K_0402_5% @
1 2
CV241
1 @
D
0.1U_0402_10V7K
10K_0402_5% RV207
OPTI@ 2 2 1 DGPU_PWR_EN# <51>
G 10K_0402_5%
2 S QV6
3
OPTI@
10K_0402_5% Under GPU(below 150mils) 2N7002_SOT23
OPTI@ +1.05VS_VGA @
Under GPU(below 150mils) 570mA
LV10
0.1U_0402_10V7K
0.1U_0402_10V7K
@ CV242
2 1 +IFPE_IOVDD 1
1U_0402_6.3V6K
0.1U_0402_10V7K
DIS_ONLY@ CV151
DIS_ONLY@ CV152
DIS_ONLY@ CV153
DIS_ONLY@ CV154
BLM18PG181SN1D_0603 1 1 1 1
220ohms @100MHz (ESR=0.05) CV154
DIS_ONLY@ 2
4.7U_0603_6.3V6K
2 2 2 2
10K_0402_5%
OPTI@
A A
Security Classification
2010/07/09
Compal Secret Data
2011/05/11 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
N12P-POWER
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net B3
UV1F
GND_0
Part 6 of 7
B6 V18
GND_1 GND_97
B9 V20
GND_2 GND_98
B12 V22
GND_3 GND_99
B15 V24
GND_4 GND_100
B21 V31
+VGA_CORE +VGA_CORE GND_5 GND_101
B24 Y11
UV1G GND_6 GND_102
B27 Y13
GND_7 GND_103
B30 Y15
GND_8 GND_104
AB11 P21 B33 Y17
VDD_0 Part 7 of 7 VDD_56 GND_9 GND_105
AB13 P23 C2 Y19
D VDD_1 VDD_57 GND_10 GND_106 D
AB15 P25 C34 Y21
VDD_2 VDD_58 GND_11 GND_107
AB17 R11 E6 Y23
AB19 R12 E9 Y25
AB21 R13 E12 AA2
AB23
VDD_6 VDD_62
R14 Near GPU E15
GND_15 GND_111
AA5
AB25 R15 E18 AA11
AC11 R16 E24 AA12
VDD_8 VDD_64 +VGA_CORE GND_17 GND_113
AC12 R17 E27 AA13
AC13 R18 E30 AA14
AC14 R19 F2 AA15
AC15 R20 F31 AA16
CV79
CV80
47U_0805_4V6
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
4.7U_0603_6.3V6K
AC16 R21 F34 AA17
CV77
CV78
CV81
AC17 R22 2 2 1 1 1 F5 AA18
AC18 R23 J2 AA19
AC19 R24 J5 AA20
VDD_16 VDD_72 @ GND_25 GND_121
DIS@
DIS@
DIS@
DIS@
AC20 R25 J31 AA21
VDD_17 VDD_73 1 1 2 2 2 GND_26 GND_122
AC21 T12 J34 AA22
AC22 T14 K9 AA23
AC23 T16 L9 AA24
POWER
AC24 T18 M2 AA25
AC25 T20 M5 AA34
AD12 T22 M11 AB12
AD14
VDD_24 VDD_80
T24 Under GPU M13
GND_33 GND_129
AB14
AD16 V11 M15 AB16
AD18 V13 M17 AB18
AD22 V15 M19 AB20
AD24 V17 M21 AB22
L11 V19 M23 AB24
L12 V21 M25 AC9
4700P_0402_25V7K
4700P_0402_25V7K
4700P_0402_25V7K
1U_0603_10V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.047U_0402_25V6K
0.047U_0402_25V6K
0.047U_0402_25V6K
0.022U_0402_25V7K
0.022U_0402_25V7K
0.022U_0402_25V7K
C L13 V23 M31 AD2 C
DIS@ CV82
DIS@ CV83
DIS@ CV84
DIS@ CV85
DIS@ CV86
DIS@ CV87
CV88
DIS@ CV89
DIS@ CV90
DIS@ CV91
DIS@ CV92
DIS@ CV93
L14 V25 1 1 1 1 1 1 1 1 1 M34 AD5
GND
L15 W11 N11 AD11
L16 W12 N12 AD13
DIS@
L17 W13 N13 AD15
VDD_35 VDD_91 2 2 2 2 2 2 2 2 2 GND_44 GND_140
L18 W14 N14 AD17
L19 W15 N15 AD21
L20 W16 N16 AD23
L21 W17 N17 AD25
L22 W18 N18 AD31
L23 W19 N19 AD34
L24 W20 N20 AE11
L25 W21 N21 AE12
M12 W22 N22 AE13
M14 W23 N23 AE14
M16 W24 N24 AE15
M18 W25 N25 AE16
M20 Y12 P12 AE17
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
CV94
CV95
CV96
CV97
CV98
CV99
DIS@ CV100
DIS@ CV101
CV102
CV103
CV104
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
M22 Y14 1 1 1 1 1 1 1 1 P14 AE18
1
M24 Y16 P16 AE19
P11 Y18 P18 AE20
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
P13 Y20 P20 AE21
2
VDD_52 VDD_108 2 2 2 2 2 2 2 2 GND_61 GND_157
P15 Y22 P22 AE22
P17 Y24 P24 AE23
P19 R2 AE24
VDD_55 GND_64 GND_160
R5 AE25
GND_65 GND_161
R31 AG2
GND_66 GND_162
R34 AG5
GND_67 GND_163
T11 AG31
GND_68 GND_164
T13 AG34
B
N12P-GT1-A1_BGA_973P GND_69 GND_165 B
T15 AK2
GND_70 GND_166
T17 AK5
GND_71 GND_167
DIS@ T19 AK14
GND_72 GND_168
T21 AK31
GND_73 GND_169
T23 AK34
GND_74 GND_170
T25 AL6
GND_75 GND_171
U11 AL9
GND_76 GND_172
U12 AL12
GND_77 GND_173
U13 AL15
GND_78 GND_174
U14 AL18
GND_79 GND_175
U15 AL21
GND_80 GND_176
U16 AL24
GND_81 GND_177
U17 AL27
GND_82 GND_178
U18 AL30
GND_83 GND_179
U19 AN2
GND_84 GND_180
U20 AN34
GND_85 GND_181
U21 AP3
GND_86 GND_182
U22 AP6
GND_87 GND_183
U23 AP9
GND_88 GND_184
U24 AP12
GND_89 GND_185
U25 AP15
GND_90 GND_186
V2 AP18
GND_91 GND_187
V5 AP21
GND_92 GND_188
V9 AP24
GND_93 GND_189
V12 AP27
GND_94 GND_190
V14 AP30
GND_95 GND_191
V16 AP33
GND_96 GND_192
A A
N12P-GT1-A1_BGA_973P
DIS@

N12P-VGA CORE, GND
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
UV1B
FBC_D[0..63] UV1C
FBA_CS#_L <30,31> FBC_D[0..63]
Part 2 of 7 U30
FBA_D[0..63] FBA_D0 FBA_CMD0 FBA_MA3_BA3_L FBA_CS#_L <28> FBC_CS#_L
L32 V30 Part 3 of 7 F18
<28,29> FBA_D[0..63] FBA_D1 FBA_D0 FBA_CMD1 FBA_MA2_BA0_L FBA_MA3_BA3_L <28> FBC_D0 FBC_CMD0 FBC_MA3_BA3_L FBC_CS#_L <30>
N33 U31 FBA_MA2_BA0_L <28> B13 E19 FBC_MA3_BA3_L <30>
FBA_D2 FBA_D1 FBA_CMD2 FBA_MA4_BA2_L FBC_D1 FBC_D0 FBC_CMD1 FBC_MA2_BA0_L
L33 V32 FBA_MA4_BA2_L <28> D13 D18 FBC_MA2_BA0_L <30>
FBA_D3 FBA_D2 FBA_CMD3 FBA_MA5_BA1_L FBC_D2 FBC_D1 FBC_CMD2 FBC_MA4_BA2_L
N34 T35 FBA_MA5_BA1_L <28> A13 C17 FBC_MA4_BA2_L <30>
D FBA_D4 FBA_D3 FBA_CMD4 FBA_WE#_L FBC_D3 FBC_D2 FBC_CMD3 FBC_MA5_BA1_L D
N35 U33 A14 F19
FBA_D5 P35
FBA_D4
FBA_D5
FBA_CMD5
FBA_CMD6
W32 FBA_MA7_MA8_L FBA_WE#_L <28>
FBA_MA7_MA8_L <28>
FBC_D4 C16
FBC_D3
FBC_D4
FBC_CMD4
FBC_CMD5
C19 FBC_WE#_L FBC_MA5_BA1_L <30>
FBC_WE#_L <30>
GDDR5
FBA_D6 P33 W33 FBA_MA6_MA11_L FBC_D5 B16 B17 FBC_MA7_MA8_L
FBA_D7
FBA_D8
P34
FBA_D6
FBA_D7
FBA_CMD7
FBA_CMD8
W31 FBA_ABI#_L
FBA_MA12_RFU_L
FBA_MA6_MA11_L <28>
FBA_ABI#_L <28>
FBC_D6
FBC_D7
A17
FBC_D5
FBC_D6
FBC_CMD6
FBC_CMD7
E20 FBC_MA6_MA11_L
FBC_ABI#_L
FBC_MA7_MA8_L <30>
FBC_MA6_MA11_L <30>
Mode G - Mirror Mode Mapping
K35 W34 FBA_MA12_RFU_L <28> D16 B19 FBC_ABI#_L <30>
FBA_D9 FBA_D8 FBA_CMD9 FBA_CKE_L FBC_D8 FBC_D7 FBC_CMD8 FBC_MA12_RFU_L
K33 U34 FBA_CKE_L <28> C13 D20 FBC_MA12_RFU_L <30>
FBA_D10 FBA_D9 FBA_CMD10 FBA_MA1_MA9_L FBC_D9 FBC_D8 FBC_CMD9 FBC_CKE_L
K34 U35 FBA_MA1_MA9_L <28> B11 A19 FBC_CKE_L <30>
FBA_D11 FBA_D10 FBA_CMD11 FBA_MA0_MA10_L FBC_D10 FBC_D9 FBC_CMD10 FBC_MA1_MA9_L
H33 U32 FBA_MA0_MA10_L <28> C11 D19 FBC_MA1_MA9_L <30>
FBA_D11 FBA_CMD12 FBC_D10 FBC_CMD11
1
FBA_D12 G34 T34 FBA_RAS#_L FBC_D11 A11 C20 FBC_MA0_MA10_L DATA Bus
FBA_D12 FBA_CMD13 FBA_RAS#_L <28> FBC_D11 FBC_CMD12 FBC_MA0_MA10_L <30>
1
FBA_D13 G33 T33 FBA_CAS#_L RV209 FBC_D12 C10 F20 FBC_RAS#_L
FBA_D14 FBA_D13 FBA_CMD14 FBA_RST# FBA_CAS#_L <28> FBC_D13 FBC_D12 FBC_CMD13 FBC_CAS#_L FBC_RAS#_L <30>
E34
FBA_D14 FBA_CMD15
W30 FBA_RST# <28,29> 10K_0402_5% C8
FBC_D13 FBC_CMD14
B20 FBC_CAS#_L <30>
RV210 Address 0..31 32..63
FBA_D15 E33 AB30 FBA_WE#_H FBC_D14 B8 G21 FBC_RST# 10K_0402_5%
FBA_D15 FBA_CMD16 FBA_WE#_H <29> DIS@ FBC_D14 FBC_CMD15 FBC_RST# <30,31>
FBA_D16 G31 AA30 FBA_MA5_BA1_H FBC_D15 A8 F22 FBC_WE#_H FBx_CMD0 CS#
DIS@
2
FBA_D17 FBA_D16 FBA_CMD17 FBA_MA4_BA2_H FBA_MA5_BA1_H <29> FBC_D16 FBC_D15 FBC_CMD16 FBC_MA5_BA1_H FBC_WE#_H <31>
F30 AB31 E8 F24
2
FBA_D18 FBA_D17 FBA_CMD18 FBA_MA2_BA0_H FBA_MA4_BA2_H <29> FBC_D17 FBC_D16 FBC_CMD17 FBC_MA4_BA2_H FBC_MA5_BA1_H <31>
G30
FBA_D18 FBA_CMD19
AA32 FBA_MA2_BA0_H <29> F8
FBC_D17 FBC_CMD18
F23 FBC_MA4_BA2_H <31> FBx_CMD1 A3_BA3
FBA_D19 G32 AB33 FBA_MA3_BA3_H FBC_D18 F10 C25 FBC_MA2_BA0_H
FBA_D20 FBA_D19 FBA_CMD20 FBA_CS#_H FBA_MA3_BA3_H <29> FBC_D19 FBC_D18 FBC_CMD19 FBC_MA3_BA3_H FBC_MA2_BA0_H <31>
K30
FBA_D20 FBA_CMD21
Y32 FBA_CS#_H <29> F9
FBC_D19 FBC_CMD20
C23 FBC_MA3_BA3_H <31> FBx_CMD2 A2_BA0
FBA_D21 K32 Y33 FBA_MA0_MA10_H FBC_D20 F12 F21 FBC_CS#_H
FBA_D22 FBA_D21 FBA_CMD22 FBA_MA1_MA9_H FBA_MA0_MA10_H <29> FBC_D21 FBC_D20 FBC_CMD21 FBC_MA0_MA10_H FBC_CS#_H <31>
H30
FBA_D22 FBA_CMD23
AB34 FBA_MA1_MA9_H <29> D8
FBC_D21 FBC_CMD22
E22 FBC_MA0_MA10_H <31> FBx_CMD3 A4_BA2
FBA_D23 K31 AB35 FBA_ABI#_H FBC_D22 D11 D21 FBC_MA1_MA9_H
FBA_D24 FBA_D23 FBA_CMD24 FBA_MA12_RFU_H FBA_ABI#_H <29> FBC_D23 FBC_D22 FBC_CMD23 FBC_ABI#_H FBC_MA1_MA9_H <31>
L31
FBA_D24 FBA_CMD25
Y35 FBA_MA12_RFU_H <29> E11
FBC_D23 FBC_CMD24
A23 FBC_ABI#_H <31> FBx_CMD4 A5_BA1
FBA_D25 L30 W35 FBA_CKE_H FBC_D24 D12 D22 FBC_MA12_RFU_H
FBA_D26 FBA_D25 FBA_CMD26 FBA_MA6_MA11_H FBA_CKE_H <29> FBC_D25 FBC_D24 FBC_CMD25 FBC_CKE_H FBC_MA12_RFU_H <31>
M32 Y34 E13 B23 FBx_CMD5 WE#
MEMORY INTERFACE
FBA_D27 FBA_D26 FBA_CMD27 FBA_MA7_MA8_H FBA_MA6_MA11_H <29> FBC_D26 FBC_D25 FBC_CMD26 FBC_MA6_MA11_H FBC_CKE_H <31>
N30 Y31 F13 C22
MEMORY INTERFACE C
FBA_D28 FBA_D27 FBA_CMD28 FBA_CAS#_H FBA_MA7_MA8_H <29> FBC_D27 FBC_D26 FBC_CMD27 FBC_MA7_MA8_H FBC_MA6_MA11_H <31>
M30
FBA_D28 FBA_CMD29
Y30 FBA_CAS#_H <29> F14
FBC_D27 FBC_CMD28
B22 FBC_MA7_MA8_H <31> FBx_CMD6 A7_A8
1
FBA_D29 P31 W29 FBA_RAS#_H FBC_D28 F15 A22 FBC_CAS#_H
FBA_D29 FBA_CMD30 FBA_RAS#_H <29> FBC_D28 FBC_CMD29 FBC_CAS#_H <31>
1
FBA_D30 R32 Y29 RV221 FBC_D29 E16 A20 FBC_RAS#_H FBx_CMD7 A6_A11
FBA_D31 FBA_D30 FBA_CMD31 FBC_D30 FBC_D29 FBC_CMD30 FBC_RAS#_H <31>
R30 10K_0402_5% F16 G20 RV222
FBA_D32 FBA_D31 FBA_DBI0# FBC_D31 FBC_D30 FBC_CMD31
AG30
FBA_D32 FBA_DQM0
P32 FBA_DBI0# <28> DIS@ F17
FBC_D31 10K_0402_5% FBx_CMD8 ABI#
FBA_D33 AG32 H34 FBA_DBI1# FBC_D32 D29 A16 FBC_DBI0#
DIS@
2
FBA_D34 FBA_D33 FBA_DQM1 FBA_DBI2# FBA_DBI1# <28> FBC_D33 FBC_D32 FBC_DQM0 FBC_DBI1# FBC_DBI0# <30>
AH31 J30 F27 D10 FBx_CMD9 A12_RFU
2
AF31 P30 FBA_DBI3# <28> F28 F11 FBC_DBI2# <30>
C FBA_D36 FBA_D35 FBA_DQM3 FBA_DBI4# FBC_D35 FBC_D34 FBC_DQM2 FBC_DBI3# C
AF30
FBA_D36 FBA_DQM4
AF32 FBA_DBI4# <29> E28
FBC_D35 FBC_DQM3
D15 FBC_DBI3# <30> FBx_CMD10 CKE#
FBA_D37 AE30 AL32 FBA_DBI5# FBC_D36 D26 D27 FBC_DBI4#
AC32
FBA_D38 FBA_DQM6
AL34 FBA_DBI6# <29> F25
FBC_D37 FBC_DQM5
D34 FBC_DBI5# <31> FBx_CMD11 A1_A9
FBA_D39 AD30 AF35 FBA_DBI7# FBC_D38 D24 A34 FBC_DBI6#
FBA_D40 FBA_D39 FBA_DQM7 FBA_DBI7# <29> FBC_D39 FBC_D38 FBC_DQM6 FBC_DBI7# FBC_DBI6# <31>
AN33
FBA_D40
E25
FBC_D39 FBC_DQM7
D28 FBC_DBI7# <31> FBx_CMD12 A0_A10
FBA_D41 AL31 L35 FBC_D40 E32
FBA_D41 FBA_DQS_RN0 FBC_D40
A
FBA_D42 AM33 G35 FBC_D41 F32 B14 FBx_CMD13 RAS#
FBA_D43 FBA_D42 FBA_DQS_RN1 FBC_D42 FBC_D41 FBC_DQS_RN0
AL33 H31 D33 B10
AK30
FBA_D44 FBA_DQS_RN3
N32 E31
FBC_D43 FBC_DQS_RN2
D9 FBx_CMD14 CAS#
FBA_D45 AK32 AD32 FBC_D44 C33 E14
AJ30
FBA_D46 FBA_DQS_RN5
AJ31 F29
FBC_D45 FBC_DQS_RN4
F26 FBx_CMD15 RST# RST#
FBA_D47 AH30 AJ35 FBC_D46 D30 D31
AH33
FBA_D48 FBA_DQS_RN7
AC34 E29
FBC_D47 FBC_DQS_RN6
A31 FBx_CMD16 WE#
FBA_D49 AH35 FBC_D48 B29 A26
FBA_D50 FBA_D49 FBA_EDC0 FBC_D49 FBC_D48 FBC_DQS_RN7
AH34
FBA_D50 FBA_DQS_WP0
L34 C31
FBC_D49 FBx_CMD17 A5_BA1
FBA_D51 AH32 H35 FBA_EDC1 FBC_D50 C29 C14 FBC_EDC0
FBA_D52 FBA_D51 FBA_DQS_WP1 FBA_EDC2 FBC_D51 FBC_D50 FBC_DQS_WP0 FBC_EDC1
AJ33
FBA_D52 FBA_DQS_WP2
J32 FBA_EDC[3..0] <28> B31
FBC_D51 FBC_DQS_WP1
A10 FBx_CMD18 A4_BA2
FBA_D53 AL35 N31 FBA_EDC3 FBC_D52 C32 E10 FBC_EDC2
FBA_D54 FBA_D53 FBA_DQS_WP3 FBA_EDC4 FBC_D53 FBC_D52 FBC_DQS_WP2 FBC_EDC3 FBC_EDC[3..0] <30>
AM34
FBA_D54 FBA_DQS_WP4
AE31 FBA_EDC[7..4] <29> B32
FBC_D53 FBC_DQS_WP3
D14 FBx_CMD19 A2_BA0
FBA_D55 AM35 AJ32 FBA_EDC5 FBC_D54 B35 E26 FBC_EDC4
FBA_D56 FBA_D55 FBA_DQS_WP5 FBA_EDC6 FBC_D55 FBC_D54 FBC_DQS_WP4 FBC_EDC5 FBC_EDC[7..4] <31>
AF33
FBA_D56 FBA_DQS_WP6
AJ34 B34
FBC_D55 FBC_DQS_WP5
FBA_D57 AE32 AC33 FBA_EDC7 FBC_D56 A29 A32 FBC_EDC6
FBA_D58 FBA_D57 FBA_DQS_WP7 FBC_D57 FBC_D56 FBC_DQS_WP6 FBC_EDC7
AF34
FBA_D58
B28
FBC_D57 FBC_DQS_WP7
B26 FBx_CMD21 CS#
FBA_D59 AE35 P29 FBA_WCK0 FBC_D58 A28
FBA_D60 FBA_D59 FBA_WCK0 FBA_WCK0_N FBA_WCK0 <28> FBC_D59 FBC_D58 FBC_WCK0
30ohms (ESR=0.01) Bead AE34
FBA_D60 FBA_WCK0_N
R29 FBA_WCK0_N <28> C28
FBC_D59 FBC_WCK0
G14 FBC_WCK0 <30> FBx_CMD22 A0_A10
FBA_D61 AE33 L29 FBA_WCK1 FBC_D60 C26 G15 FBC_WCK0_N
+1.05VS_VGA FBA_D62 FBA_D61 FBA_WCK1 FBA_WCK1_N FBA_WCK1 <28> FBC_D61 FBC_D60 FBC_WCK0_N FBC_WCK1 FBC_WCK0_N <30>
Under GPU(below 150mils) AB32
FBA_D62 FBA_WCK1_N
M29 FBA_WCK1_N <28> D25
FBC_D61 FBC_WCK1
G11 FBC_WCK1 <30> FBx_CMD23 A1_A9
FBA_D63 AC35 AG29 FBA_WCK2 FBC_D62 B25 G12 FBC_WCK1_N
FBA_D63 FBA_WCK2 FBA_WCK2_N FBA_WCK2 <29> FBC_D63 FBC_D62 FBC_WCK1_N FBC_WCK2 FBC_WCK1_N <30>
BLM18PG330SN1D_0603 200mA FBA_WCK2_N
AH29 FBA_WCK2_N <29> A25
FBC_D63 FBC_WCK2
G27 FBC_WCK2 <31> FBx_CMD24 ABI#
1 2 +FB_PLLAVDD_0 AG27 AD29 FBA_WCK3 G28 FBC_WCK2_N
FB_DLLAVDD_0 FBA_WCK3 FBA_WCK3 <29> FBC_WCK2_N FBC_WCK2_N <31>
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
LV3 AF27 AE29 FBA_WCK3_N G24 FBC_WCK3 FBx_CMD25 A12_RFU

FB_PLLAVDD_0 FBA_WCK3_N FBA_WCK3_N <29> FBC_WCK3 FBC_WCK3 <31>
DIS@ CV106
DIS@ CV107
DIS@ CV108
DIS@ CV109
DIS@ CV110
DIS@ CV111
1U_0402_6.3V6K
DIS@ 1 1 1 1 1 2 1 DIS@
2 K27 G25 FBC_WCK3_N
B
+1.35VS_VGA FBCAL_PD_VDDQ FBC_WCK3_N FBC_WCK3_N <31> B
+FB_PLLAVDD_1 J19 RV55 40.2_0402_1% FBx_CMD26 CKE#
FB_DLLAVDD_1 FBA_CLK0
J18 T32 FBA_CLK0 <28> 1 DIS@ 2 L27
FB_PLLAVDD_1 FBA_CLK0 FBA_CLK0# FBCAL_PU_GND FBC_CLK0
2 2 2 2 2 1 FBA_CLK0_N
T31 FBA_CLK0# <28>
RV56 40.2_0402_1%
FBC_CLK0
E17 FBC_CLK0 <30> FBx_CMD27 A6_A11
J27 1 DIS@ 2 M27 D17 FBC_CLK0#
FB_VREF_NC FBA_CLK1 FBCAL_TERM_GND FBC_CLK0_N FBC_CLK0# <30>
2RV58 60.4_0402_1%
1 T30
FBA_DEBUG0 FBA_CLK1
AC31 FBA_CLK1 <29>
RV57 60.4_0402_1% FBx_CMD28 A7_A8
FBA_CLK1# FBC_CLK1
2 1 T29
FBA_DEBUG1 FBA_CLK1_N
AC30 FBA_CLK1# <29> +1.35VS_VGA 60.4_0402_1% 2 DIS@ 1 RV60 G19
FBC_DEBUG0 FBC_CLK1
D23 FBC_CLK1 <31>
RV59 10K_0402_5% 2 1 G16 E23 FBC_CLK1# FBx_CMD29 CAS#
FBB_DEBUG1 FBC_CLK1_N FBC_CLK1# <31>
@ RV61 @ 10K_0402_5%
+1.35VS_VGA N12P-GT1-A1_BGA_973P DIS@ FBx_CMD30 RAS#
+1.05VS_VGA
BLM18PG330SN1D_0603 200mA
1 2 +FB_PLLAVDD_1 FBA_RST#
10U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
LV4 FBx_PLLAVDD and FBC_RST#

DIS@ CV112
DIS@ CV113
DIS@ CV114
DIS@ CV115
DIS@ CV116
DIS@ CV117
1U_0402_6.3V6K
DIS@ 1 1 1 1 1 2 FBx_DLLAVDD Combined
1
RV71 RV72
2 2 2 2 2 1
10K_0402_5% 10K_0402_5%
DIS@ DIS@
2
A A

N12P-MEM Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
Memory Partition A - Lower 32 bits UV3
MF=0 MF=1 MF=1 MF=0

http://hobi-elektronika.net UV4
MF=0 MF=1 MF=1 MF=0
A4 FBA_D0 A4 FBA_D24
FBA_EDC0 DQ24 DQ0 FBA_D1 FBA_EDC3 DQ24 DQ0 FBA_D25
C2 A2 C2 A2
EDC0 EDC3 DQ25 DQ1 FBA_D2 EDC0 EDC3 DQ25 DQ1 FBA_D26
C13 B4 C13 B4
FBA_EDC2 EDC1 EDC2 DQ26 DQ2 FBA_D3 FBA_EDC1 EDC1 EDC2 DQ26 DQ2 FBA_D27
<27> FBA_D[0..31] R13
EDC2 EDC1 DQ27 DQ3
B2 BYTE0 R13
EDC2 EDC1 DQ27 DQ3
B2
R2 E4 FBA_D4 R2 E4 FBA_D28 BYTE3
EDC3 EDC0 DQ28 DQ4 FBA_D5 EDC3 EDC0 DQ28 DQ4 FBA_D29
E2 E2
DQ29 DQ5 FBA_D6 DQ29 DQ5 FBA_D30
<27> FBA_EDC[3..0] F4 F4
FBA_DBI0# DQ30 DQ6 FBA_D7 FBA_DBI3# DQ30 DQ6 FBA_D31
<27> FBA_DBI0# D2 F2 <27> FBA_DBI3# D2 F2
DBI0# DBI3# DQ31 DQ7 DBI0# DBI3# DQ31 DQ7
D13 A11 D13 A11
FBA_DBI2# DBI1# DBI2# DQ16 DQ8 FBA_DBI1# DBI1# DBI2# DQ16 DQ8
<27> FBA_DBI2# P13 A13 <27> FBA_DBI1# P13 A13
D P2 B11 P2 B11 D
B13 B13
FBA_CLK0 DQ19 DQ11 FBA_CLK0 DQ19 DQ11
<27> FBA_CLK0 J12 E11 <27> FBA_CLK0 J12 E11
FBA_CLK0# CK DQ20 DQ12 FBA_CLK0# CK DQ20 DQ12
<27> FBA_CLK0# J11 E13 <27> FBA_CLK0# J11 E13
FBA_CKE_L CK# DQ21 DQ13 FBA_CKE_L CK# DQ21 DQ13
J3 F11 J3 F11
<27> FBA_CKE_L CKE# DQ22
DQ23
DQ14
DQ15
F13
<27> FBA_CKE_L CKE# DQ22
DQ23
DQ14
DQ15
F13 GDDR5
U11 FBA_D16 U11 FBA_D8
<27> FBA_MA2_BA0_L
FBA_MA2_BA0_L H11
BA0/A2 BA2/A4
DQ8
DQ9
DQ16
DQ17
U13 FBA_D17
<27> FBA_MA4_BA2_L
FBA_MA4_BA2_L H11
BA0/A2 BA2/A4
DQ8
DQ9
DQ16
DQ17
U13 FBA_D9 Mode G - Mirror Mode Mapping
FBA_MA5_BA1_L K10 T11 FBA_D18 FBA_MA3_BA3_L K10 T11 FBA_D10
<27> FBA_MA5_BA1_L BA1/A5 BA3/A3 DQ10 DQ18 <27> FBA_MA3_BA3_L BA1/A5 BA3/A3 DQ10 DQ18
FBA_MA4_BA2_L K11 T13 FBA_D19 FBA_MA2_BA0_L K11 T13 FBA_D11 BYTE1
FBA_MA3_BA3_L H10 N11 FBA_D20 BYTE2 FBA_MA5_BA1_L H10 N11 FBA_D12 DATA Bus
N13 FBA_D21 N13 FBA_D13
DQ13 DQ21 FBA_D22 DQ13 DQ21 FBA_D14 Address
DQ14 DQ22
M11
DQ14 DQ22
M11 0..31 32..63
FBA_MA7_MA8_L K4 M13 FBA_D23 FBA_MA0_MA10_L K4 M13 FBA_D15
<27> FBA_MA7_MA8_L A8/A7 A10/A0 DQ15 DQ23 <27> FBA_MA0_MA10_L A8/A7 A10/A0 DQ15 DQ23
FBA_MA1_MA9_L H5 U4 FBA_MA6_MA11_L H5 U4 FBx_CMD0 CS#
FBA_MA0_MA10_L H4 U2 FBA_MA7_MA8_L H4 U2
FBA_MA6_MA11_L K5 T4 FBA_MA1_MA9_L K5 T4 FBx_CMD1 A3_BA3
FBA_MA12_RFU_L J5 T2 FBA_MA12_RFU_L J5 T2
<27> FBA_MA12_RFU_L A12/RFU/NC DQ3 DQ27 <27> FBA_MA12_RFU_L A12/RFU/NC DQ3 DQ27
DQ4 DQ28
N4
DQ4 DQ28
N4 FBx_CMD2 A2_BA0
A5 N2 A5 N2
VPP/NC DQ5 DQ29 +1.35VS_VGA VPP/NC DQ5 DQ29
U5
VPP/NC DQ6 DQ30
M4 U5
VPP/NC DQ6 DQ30
M4 FBx_CMD3 A4_BA2
2 RV115 1 M2 2 RV116 1 M2
DIS@ 1K_0402_1% DQ7 DQ31 DIS@ 1K_0402_1% DQ7 DQ31
+1.35VS_VGA +1.35VS_VGA
FBx_CMD4 A5_BA1
J1 J1
MF MF
2 RV117 1 J10 2 RV118 1 J10 FBx_CMD5 WE#
SEN SEN
2 RV119 1 DIS@ 1K_0402_1% J13 B1 2 RV120 1 DIS@ 1K_0402_1% J13 B1
DIS@ 121_0402_1% ZQ VDDQ DIS@ 121_0402_1% ZQ VDDQ
VDDQ
D1
VDDQ
D1 FBx_CMD6 A7_A8
F1 F1
FBA_ABI#_L VDDQ FBA_ABI#_L VDDQ
Follow DG v02 <27> FBA_ABI#_L J4
ABI# VDDQ
M1 <27> FBA_ABI#_L J4
ABI# VDDQ
M1 FBx_CMD7 A6_A11
FBA_RAS#_L G3 P1 FBA_CAS#_L G3 P1
<27> FBA_RAS#_L RAS# CAS# VDDQ <27> FBA_CAS#_L RAS# CAS# VDDQ
FBA_CS#_L G12 T1 FBA_WE#_L G12 T1 FBx_CMD8 ABI#
<27> FBA_CS#_L CS# WE# VDDQ <27> FBA_WE#_L CS# WE# VDDQ
FBA_CLK0 2 RV121 1 FBA_CAS#_L L3 G2 FBA_RAS#_L L3 G2
<27> FBA_CAS#_L CAS# RAS# VDDQ <27> FBA_RAS#_L CAS# RAS# VDDQ
DIS@ 80.6_0402_1% FBA_WE#_L L12 L2 FBA_CS#_L L12 L2 FBx_CMD9 A12_RFU
<27> FBA_WE#_L WE# CS# VDDQ <27> FBA_CS#_L WE# CS# VDDQ
B3 B3
2
VDDQ VDDQ
VDDQ
D3
VDDQ
D3 FBx_CMD10 CKE#
RV123 F3 F3
FBA_WCK0_N VDDQ FBA_WCK1_N VDDQ
160_0402_1% <27> FBA_WCK0_N D5
WCK01# WCK23# VDDQ
H3 <27> FBA_WCK1_N D5
WCK01# WCK23# VDDQ
H3 FBx_CMD11 A1_A9
C @ FBA_WCK0 D4 K3 FBA_WCK1 D4 K3 C
<27> FBA_WCK0 WCK01 WCK23 VDDQ <27> FBA_WCK1 WCK01 WCK23 VDDQ
M3 M3 FBx_CMD12 A0_A10
1
FBA_CLK0# FBA_WCK1_N VDDQ FBA_WCK0_N VDDQ

2 RV125 1 <27> FBA_WCK1_N P5 P3 <27> FBA_WCK0_N P5 P3
DIS@ 80.6_0402_1% FBA_WCK1 WCK23# WCK01# VDDQ FBA_WCK0 WCK23# WCK01# VDDQ
<27> FBA_WCK1 P4
WCK23 WCK01 VDDQ
T3 <27> FBA_WCK0 P4
WCK23 WCK01 VDDQ
T3 FBx_CMD13 RAS#
E5 E5
VDDQ VDDQ
VDDQ
N5
VDDQ
N5 FBx_CMD14 CAS#
DIS@ CV155
+FBA_VREFD_L +FBA_VREFD_L
0.01U_0402_25V7K
1 A10 E10 A10 E10

VREFD VDDQ VREFD VDDQ
U10
VREFD VDDQ
N10 U10
VREFD VDDQ
N10 FBx_CMD15 RST# RST#
+FBA_VREFC0 J14 B12 +FBA_VREFC0 J14 B12
VREFC VDDQ VREFC VDDQ
2 VDDQ
D12
VDDQ
D12 FBx_CMD16 WE#
F12 F12
VDDQ VDDQ
VDDQ
H12
VDDQ
H12 FBx_CMD17 A5_BA1
FBA_RST# J2 K12 FBA_RST# J2 K12
<27,29> FBA_RST# RESET# VDDQ <27,29> FBA_RST# RESET# VDDQ
VDDQ
M12
VDDQ
M12 FBx_CMD18 A4_BA2
P12 P12
VDDQ VDDQ
+1.35VS_VGA VDDQ
T12
VDDQ
T12 FBx_CMD19 A2_BA0
G13 G13
VDDQ VDDQ
H1
VSS VDDQ
L13 H1
VSS VDDQ
L13 FBx_CMD20 A3_BA3
K1 B14 K1 B14
1
VSS VDDQ VSS VDDQ

B5
VSS VDDQ
D14 B5
VSS VDDQ
D14 FBx_CMD21 CS#
RV127 G5 F14 G5 F14
549_0402_1% VSS VDDQ VSS VDDQ
L5
VSS VDDQ
M14 L5
VSS VDDQ
M14 FBx_CMD22 A0_A10
DIS@ T5 P14 T5 P14
RV212 VSS VDDQ VSS VDDQ
B10 T14 B10 T14 FBx_CMD23 A1_A9
2
+FBA_VREFC0 VSS VDDQ VSS VDDQ

1 2 D10 D10
931_0402_1% VSS VSS
G10 G10 FBx_CMD24 ABI#
1
VSS VSS
DIS@ CV157
DIS@ 16 mil
0.01U_0402_25V7K
1 L10 A1 L10 A1
RV128 VSS VSSQ VSS VSSQ
P10
VSS VSSQ
C1 P10
VSS VSSQ
C1 FBx_CMD25 A12_RFU
1.33K_0402_1% T10 E1 T10 E1
DIS@ VSS VSSQ VSS VSSQ
2
H14
VSS VSSQ
N1 H14
VSS VSSQ
N1 FBx_CMD26 CKE#
K14 R1 K14 R1
2
+1.35VS_VGA VSS VSSQ +1.35VS_VGA VSS VSSQ

U1 U1 FBx_CMD27 A6_A11
1
D VSSQ VSSQ
H2 H2
DIS@ VSSQ VSSQ
<23,29,30,31> MEM_VREF
2 G1
VDD VSSQ
K2 G1
VDD VSSQ
K2 FBx_CMD28 A7_A8
G L1 A3 L1 A3
QV9 VDD VSSQ VDD VSSQ
S G4 C3 G4 C3 FBx_CMD29 CAS#
3
2N7002W-T/R7_SOT323-3 VDD VSSQ VDD VSSQ

L4 E3 L4 E3
VDD VSSQ VDD VSSQ
B
+1.35VS_VGA
C5
VDD VSSQ
N3 C5
VDD VSSQ
N3 FBx_CMD30 RAS# B
R5 R3 R5 R3
VDD VSSQ VDD VSSQ
C10 U3 C10 U3
VDD VSSQ VDD VSSQ
R10 C4 R10 C4
1
VDD VSSQ VDD VSSQ

D11 R4 D11 R4
RV129 VDD VSSQ VDD VSSQ
G11 F5 G11 F5
549_0402_1% VDD VSSQ VDD VSSQ
L11 M5 L11 M5
DIS@ VDD VSSQ VDD VSSQ
RV213 P11 F10 P11 F10
VDD VSSQ VDD VSSQ
G14 M10 G14 M10
2
+FBA_VREFD_L VDD VSSQ VDD VSSQ

1 2 L14 C11 L14 C11
R11 R11
1
VSSQ VSSQ
DIS@ CV158
CV288
DIS@ A12 A12

0.01U_0402_25V7K
0.01U_0402_25V7K
1 1 VSSQ VSSQ
RV130 C12 C12
1.33K_0402_1% VSSQ VSSQ
E12 E12
DIS@ VSSQ VSSQ
N12 N12
1
D 2 2 VSSQ VSSQ
DIS@
R12 R12
2
DIS@ 170-BALL VSSQ 170-BALL VSSQ

2 U12 U12
<23,29,30,31> MEM_VREF G VSSQ VSSQ
H13 H13
QV8 SGRAM GDDR5 VSSQ SGRAM GDDR5 VSSQ
S K13 K13
3
2N7002W-T/R7_SOT323-3 VSSQ VSSQ

A14 A14
VSSQ VSSQ
C14 C14
VSSQ VSSQ
E14 E14
VSSQ VSSQ
N14 N14
VSSQ VSSQ
R14 R14
VSSQ VSSQ
U14 U14
VSSQ VSSQ
X76@ X76@
H5GQ1H24AFR-T2L_BGA170 H5GQ1H24AFR-T2L_BGA170
+1.35VS_VGA UV3 SIDE +1.35VS_VGA UV4 SIDE
10U_0603_6.3V6M
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
DIS@ CV166
DIS@ CV159
DIS@ CV160
DIS@ CV161
DIS@ CV162
DIS@ CV163
DIS@ CV164
DIS@ CV165
DIS@ CV174
DIS@ CV173
DIS@ CV172
DIS@ CV171
DIS@ CV170
DIS@ CV169
DIS@ CV168
DIS@ CV167
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 1 1 1 1 1 1 1 2 1 1 1 1 1 1 1
1 2 2 2 2 2 2 2 1 2 2 2 2 2 2 2
A A

N12P-VRAM A Lower
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
Memory Partition A - Upper 32 bits

UV5
http://hobi-elektronika.net UV6
MF=0 MF=1 MF=1 MF=0

MF=0 MF=1 MF=1 MF=0
A4 FBA_D56
FBA_D32 FBA_EDC7 DQ24 DQ0 FBA_D57
A4 C2 A2
FBA_EDC4 DQ24 DQ0 FBA_D33 EDC0 EDC3 DQ25 DQ1 FBA_D58
C2 A2 C13 B4
EDC0 EDC3 DQ25 DQ1 FBA_D34 FBA_EDC5 EDC1 EDC2 DQ26 DQ2 FBA_D59
C13 B4 R13 B2
FBA_EDC6 EDC1 EDC2 DQ26 DQ2 FBA_D35 EDC2 EDC1 DQ27 DQ3 FBA_D60
<27> FBA_D[63..32] R13
EDC2 EDC1 DQ27 DQ3
B2 BYTE4 R2
EDC3 EDC0 DQ28 DQ4
E4 BYTE7
R2 E4 FBA_D36 E2 FBA_D61
EDC3 EDC0 DQ28 DQ4 FBA_D37 DQ29 DQ5 FBA_D62
E2 F4
DQ29 DQ5 FBA_D38 FBA_DBI7# DQ30 DQ6 FBA_D63
<27> FBA_EDC[7..4] F4 <27> FBA_DBI7# D2 F2
FBA_DBI4# DQ30 DQ6 FBA_D39 DBI0# DBI3# DQ31 DQ7
<27> FBA_DBI4# D2 F2 D13 A11
DBI0# DBI3# DQ31 DQ7 FBA_DBI5# DBI1# DBI2# DQ16 DQ8
D13 A11 <27> FBA_DBI5# P13 A13
FBA_DBI6# DBI1# DBI2# DQ16 DQ8 DBI2# DBI1# DQ17 DQ9
D <27> FBA_DBI6# P13 A13 P2 B11 D
P2 B11 B13
DBI3# DBI0# DQ18 DQ10 FBA_CLK1 DQ19 DQ11
B13 <27> FBA_CLK1 J12 E11
FBA_CLK1 DQ19 DQ11 FBA_CLK1# CK DQ20 DQ12
J12 E11 J11 E13
<27> FBA_CLK1
<27> FBA_CLK1#
FBA_CLK1# J11
CK
CK#
DQ20
DQ21
DQ12
DQ13
E13
<27> FBA_CLK1#
<27> FBA_CKE_H
FBA_CKE_H J3
CK#
CKE#
DQ21
DQ22
DQ13
DQ14
F11 GDDR5
FBA_CKE_H J3 F11 F13
<27> FBA_CKE_H CKE# DQ22
DQ23
DQ14
DQ15
F13
DQ23
DQ8
DQ15
DQ16
U11 FBA_D40 Mode G - Mirror Mode Mapping
U11 FBA_D48 FBA_MA4_BA2_H H11 U13 FBA_D41
DQ8 DQ16 <27> FBA_MA4_BA2_H BA0/A2 BA2/A4 DQ9 DQ17
FBA_MA2_BA0_H H11 U13 FBA_D49 FBA_MA3_BA3_H K10 T11 FBA_D42
<27> FBA_MA2_BA0_H BA0/A2 BA2/A4 DQ9 DQ17 <27> FBA_MA3_BA3_H BA1/A5 BA3/A3 DQ10 DQ18
FBA_MA5_BA1_H K10 T11 FBA_D50 FBA_MA2_BA0_H K11 T13 FBA_D43 BYTE5 DATA Bus
FBA_MA4_BA2_H K11 T13 FBA_D51 FBA_MA5_BA1_H H10 N11 FBA_D44
FBA_MA3_BA3_H H10 N11 FBA_D52 BYTE6 N13 FBA_D45 Address 0..31 32..63
<27> FBA_MA3_BA3_H BA3/A3 BA1/A5 DQ12 DQ20 DQ13 DQ21
N13 FBA_D53 M11 FBA_D46
DQ13 DQ21 FBA_D54 FBA_MA0_MA10_H DQ14 DQ22 FBA_D47
DQ14 DQ22
M11 <27> FBA_MA0_MA10_H K4
A8/A7 A10/A0 DQ15 DQ23
M13 FBx_CMD0 CS#
FBA_MA7_MA8_H K4 M13 FBA_D55 FBA_MA6_MA11_H H5 U4
<27> FBA_MA7_MA8_H A8/A7 A10/A0 DQ15 DQ23 <27> FBA_MA6_MA11_H A9/A1 A11/A6 DQ0 DQ24
FBA_MA1_MA9_H H5 U4 FBA_MA7_MA8_H H4 U2 FBx_CMD1 A3_BA3
FBA_MA0_MA10_H H4 U2 FBA_MA1_MA9_H K5 T4
FBA_MA6_MA11_H K5 T4 FBA_MA12_RFU_H J5 T2 FBx_CMD2 A2_BA0
<27> FBA_MA6_MA11_H A11/A6 A9/A1 DQ2 DQ26 <27> FBA_MA12_RFU_H A12/RFU/NC DQ3 DQ27
FBA_MA12_RFU_H J5 T2 N4
<27> FBA_MA12_RFU_H A12/RFU/NC DQ3 DQ27 DQ4 DQ28
DQ4 DQ28
N4
+1.35VS_VGA
A5
VPP/NC DQ5 DQ29
N2 FBx_CMD3 A4_BA2
A5 N2 U5 M4
VPP/NC DQ5 DQ29 VPP/NC DQ6 DQ30
U5 M4 2 RV132 1 M2 FBx_CMD4 A5_BA1
VPP/NC DQ6 DQ30 DQ7 DQ31
2 RV131 1 M2 DIS@ 1K_0402_1%
DIS@ 1K_0402_1% DQ7 DQ31 +1.35VS_VGA
+1.35VS_VGA
J1
MF
FBx_CMD5 WE#
J1 2 RV134 1 J10
MF SEN
2 RV133 1 J10 2 RV136 1 DIS@ 1K_0402_1% J13 B1 FBx_CMD6 A7_A8
SEN ZQ VDDQ
2 RV135 1 DIS@ 1K_0402_1% J13 B1 DIS@ 121_0402_1% D1
DIS@ 121_0402_1% ZQ VDDQ VDDQ
VDDQ
D1
VDDQ
F1 FBx_CMD7 A6_A11
F1 FBA_ABI#_H J4 M1
VDDQ <27> FBA_ABI#_H ABI# VDDQ
Follow DG v02 FBA_ABI#_H J4 M1 FBA_CAS#_H G3 P1 FBx_CMD8 ABI#
<27> FBA_ABI#_H ABI# VDDQ <27> FBA_CAS#_H RAS# CAS# VDDQ
FBA_RAS#_H G3 P1 FBA_WE#_H G12 T1
<27> FBA_RAS#_H RAS# CAS# VDDQ <27> FBA_WE#_H CS# WE# VDDQ
FBA_CS#_H G12 T1 FBA_RAS#_H L3 G2 FBx_CMD9 A12_RFU
<27> FBA_CS#_H CS# WE# VDDQ <27> FBA_RAS#_H CAS# RAS# VDDQ
FBA_CLK1 2 RV137 1 FBA_CAS#_H L3 G2 FBA_CS#_H L12 L2
<27> FBA_CAS#_H CAS# RAS# VDDQ <27> FBA_CS#_H WE# CS# VDDQ
DIS@ 80.6_0402_1% FBA_WE#_H L12 L2 B3 FBx_CMD10 CKE#
<27> FBA_WE#_H WE# CS# VDDQ VDDQ
B3 D3
2
VDDQ VDDQ
VDDQ
D3
VDDQ
F3 FBx_CMD11 A1_A9
RV139 F3 FBA_WCK3_N D5 H3
VDDQ <27> FBA_WCK3_N WCK01# WCK23# VDDQ
C 160_0402_1% FBA_WCK2_N D5 H3 FBA_WCK3 D4 K3 FBx_CMD12 A0_A10 C
<27> FBA_WCK2_N WCK01# WCK23# VDDQ <27> FBA_WCK3 WCK01 WCK23 VDDQ
@ FBA_WCK2 D4 K3 M3
<27> FBA_WCK2 WCK01 WCK23 VDDQ VDDQ
M3 FBA_WCK2_N P5 P3 FBx_CMD13 RAS#
<27> FBA_WCK2_N
1
FBA_CLK1# VDDQ WCK23# WCK01# VDDQ

2 RV141 1 <27> FBA_WCK3_N
FBA_WCK3_N P5 P3 <27> FBA_WCK2
FBA_WCK2 P4 T3
DIS@ 80.6_0402_1% FBA_WCK3 WCK23# WCK01# VDDQ WCK23 WCK01 VDDQ
<27> FBA_WCK3 P4
WCK23 WCK01 VDDQ
T3
VDDQ
E5 FBx_CMD14 CAS#
E5 N5
VDDQ +FBA_VREFD_H VDDQ
VDDQ
N5 A10
VREFD VDDQ
E10 FBx_CMD15 RST# RST#
DIS@ CV175
+FBA_VREFD_H A10 E10 U10 N10

0.01U_0402_25V7K
1 VREFD VDDQ VREFD VDDQ

U10 N10 +FBA_VREFC1 J14 B12 FBx_CMD16 WE#
+FBA_VREFC1 VREFD VDDQ VREFC VDDQ
J14 B12 D12
VREFC VDDQ VDDQ
2 VDDQ
D12
VDDQ
F12 FBx_CMD17 A5_BA1
F12 H12
VDDQ FBA_RST# VDDQ
VDDQ
H12 <27,28> FBA_RST# J2
RESET# VDDQ
K12 FBx_CMD18 A4_BA2
FBA_RST# J2 K12 M12
<27,28> FBA_RST# RESET# VDDQ VDDQ
VDDQ
M12
VDDQ
P12 FBx_CMD19 A2_BA0
P12 T12
VDDQ VDDQ
VDDQ
T12
VDDQ
G13 FBx_CMD20 A3_BA3
G13 H1 L13
VDDQ VSS VDDQ
+1.35VS_VGA
H1
VSS VDDQ
L13 K1
VSS VDDQ
B14 FBx_CMD21 CS#
K1 B14 B5 D14
VSS VDDQ VSS VDDQ
B5
VSS VDDQ
D14 G5
VSS VDDQ
F14 FBx_CMD22 A0_A10
G5 F14 L5 M14
1
VSS VDDQ VSS VDDQ

L5
VSS VDDQ
M14 T5
VSS VDDQ
P14 FBx_CMD23 A1_A9
RV143 T5 P14 B10 T14
549_0402_1% VSS VDDQ VSS VDDQ
B10
VSS VDDQ
T14 D10
VSS
FBx_CMD24 ABI#
DIS@ D10 G10
RV214 VSS VSS
G10 L10 A1 FBx_CMD25 A12_RFU
2
+FBA_VREFC1 VSS VSS VSSQ

1 2 L10 A1 P10 C1
931_0402_1% VSS VSSQ VSS VSSQ
16 mil P10 C1 T10 E1 FBx_CMD26 CKE#
1
VSS VSSQ VSS VSSQ

DIS@ CV177
DIS@
0.01U_0402_25V7K
1 T10 E1 H14 N1
RV144 VSS VSSQ VSS VSSQ
H14
VSS VSSQ
N1
+1.35VS_VGA
K14
VSS VSSQ
R1 FBx_CMD27 A6_A11
1.33K_0402_1% K14 R1 U1
DIS@ +1.35VS_VGA VSS VSSQ VSSQ
U1 H2 FBx_CMD28 A7_A8
1
D 2 VSSQ VSSQ
H2 G1 K2
2
DIS@ VSSQ VDD VSSQ

<23,28,30,31> MEM_VREF
2 G1
VDD VSSQ
K2 L1
VDD VSSQ
A3 FBx_CMD29 CAS#
G L1 A3 G4 C3
QV10 VDD VSSQ VDD VSSQ
S G4 C3 L4 E3 FBx_CMD30 RAS#
3
2N7002W-T/R7_SOT323-3 VDD VSSQ VDD VSSQ

B L4 E3 C5 N3 B
VDD VSSQ VDD VSSQ
C5 N3 R5 R3
VDD VSSQ VDD VSSQ
R5 R3 C10 U3
VDD VSSQ VDD VSSQ
C10 U3 R10 C4
VDD VSSQ VDD VSSQ
R10 C4 D11 R4
+1.35VS_VGA VDD VSSQ VDD VSSQ
D11 R4 G11 F5
VDD VSSQ VDD VSSQ
G11 F5 L11 M5
VDD VSSQ VDD VSSQ
L11 M5 P11 F10
1
VDD VSSQ VDD VSSQ

P11 F10 G14 M10
G14 M10 L14 C11
L14 C11 R11
DIS@ VDD VSSQ VSSQ
RV215 R11 A12
VSSQ VSSQ
A12 C12
2
+FBA_VREFD_H VSSQ VSSQ

1 2 C12 E12
931_0402_1% VSSQ VSSQ
E12 N12
1
VSSQ VSSQ
CV178
CV289
DIS@ N12 R12

0.01U_0402_25V7K
0.01U_0402_25V7K
1 1 VSSQ VSSQ
RV146 R12 170-BALL U12
1
D 1.33K_0402_1% 170-BALL VSSQ VSSQ

U12 H13
DIS@ DIS@ VSSQ SGRAM GDDR5 VSSQ
2 H13 K13
<23,28,30,31> MEM_VREF 2 2 VSSQ VSSQ
DIS@
DIS@
G SGRAM GDDR5 K13 A14

2
QV11 VSSQ VSSQ

S A14 C14
3

C14 E14
VSSQ VSSQ
E14 N14
VSSQ VSSQ
N14 R14
VSSQ VSSQ
R14 U14
VSSQ VSSQ
U14
VSSQ X76@
X76@
+1.35VS_VGA UV5 SIDE H5GQ1H24AFR-T2L_BGA170
H5GQ1H24AFR-T2L_BGA170
+1.35VS_VGA UV6 SIDE
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
DIS@ CV179
DIS@ CV180
DIS@ CV181
DIS@ CV182
DIS@ CV183
DIS@ CV184
DIS@ CV185
DIS@ CV186
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 1 1 1 1 1 1 1
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
DIS@ CV187
DIS@ CV188
DIS@ CV189
DIS@ CV190
DIS@ CV191
DIS@ CV192
DIS@ CV193
DIS@ CV194
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 1 1 1 1 1 1 1
1 2 2 2 2 2 2 2
A A
1 2 2 2 2 2 2 2

N12P-VRAM A Upper
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
Memory Partition C - Lower 32 bits http://hobi-elektronika.net

UV7 UV8
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
A4 FBC_D0 A4 FBC_D24
FBC_EDC0 DQ24 DQ0 FBC_D1 FBC_EDC3 DQ24 DQ0 FBC_D25
C2 A2 C2 A2
EDC0 EDC3 DQ25 DQ1 FBC_D2 EDC0 EDC3 DQ25 DQ1 FBC_D26
C13 B4 C13 B4
FBC_EDC2 EDC1 EDC2 DQ26 DQ2 FBC_D3 FBC_EDC1 EDC1 EDC2 DQ26 DQ2 FBC_D27
<27> FBC_D[0..31] R13 B2 BYTE0 R13 B2
R2 E4 R2 E4 BYTE3
E2 E2
DQ29 DQ5 FBC_D6 DQ29 DQ5 FBC_D30
<27> FBC_EDC[3..0] F4 F4
FBC_DBI0# DQ30 DQ6 FBC_D7 FBC_DBI3# DQ30 DQ6 FBC_D31
D <27> FBC_DBI0# D2 F2 <27> FBC_DBI3# D2 F2 D
D13 A11 D13 A11
FBC_DBI2# DBI1# DBI2# DQ16 DQ8 FBC_DBI1# DBI1# DBI2# DQ16 DQ8
<27> FBC_DBI2# P13 A13 <27> FBC_DBI1# P13 A13
P2 B11 P2 B11
B13 B13
FBC_CLK0 DQ19 DQ11 FBC_CLK0 DQ19 DQ11
J12 E11 J12 E11
<27> FBC_CLK0
<27> FBC_CLK0#
FBC_CLK0# J11
CK
CK#
DQ20
DQ21
DQ12
DQ13
E13
<27> FBC_CLK0
<27> FBC_CLK0#
FBC_CLK0# J11
CK
CK#
DQ20
DQ21
DQ12
DQ13
E13 GDDR5
FBC_CKE_L J3 F11 FBC_CKE_L J3 F11
<27> FBC_CKE_L CKE# DQ22
DQ23
DQ14
DQ15
F13
FBC_D16
<27> FBC_CKE_L CKE# DQ22
DQ23
DQ14
DQ15
F13
FBC_D8
Mode G - Mirror Mode Mapping
U11 U11
FBC_MA2_BA0_L DQ8 DQ16 FBC_D17 FBC_MA4_BA2_L DQ8 DQ16 FBC_D9
<27> FBC_MA2_BA0_L H11 U13 <27> FBC_MA4_BA2_L H11 U13
FBC_MA5_BA1_L BA0/A2 BA2/A4 DQ9 DQ17 FBC_D18 FBC_MA3_BA3_L BA0/A2 BA2/A4 DQ9 DQ17 FBC_D10
<27> FBC_MA5_BA1_L K10
BA1/A5 BA3/A3 DQ10 DQ18
T11 <27> FBC_MA3_BA3_L K10
T11 DATA Bus
FBC_MA4_BA2_L K11 T13 FBC_D19 FBC_MA2_BA0_L K11 T13 FBC_D11 BYTE1
<27> FBC_MA4_BA2_L FBC_MA3_BA3_L BA2/A4 BA0/A2 DQ11 DQ19 FBC_D20 <27> FBC_MA2_BA0_L FBC_MA5_BA1_L BA2/A4 BA0/A2 DQ11 DQ19 FBC_D12
<27> FBC_MA3_BA3_L H10
N11 BYTE2 <27> FBC_MA5_BA1_L H10
N11 Address 0..31 32..63
N13 FBC_D21 N13 FBC_D13
DQ13 DQ21 FBC_D22 DQ13 DQ21 FBC_D14
DQ14 DQ22
M11
DQ14 DQ22
M11 FBx_CMD0 CS#
FBC_MA7_MA8_L K4 M13 FBC_D23 FBC_MA0_MA10_L K4 M13 FBC_D15
<27> FBC_MA7_MA8_L FBC_MA1_MA9_L A8/A7 A10/A0 DQ15 DQ23 <27> FBC_MA0_MA10_L FBC_MA6_MA11_L A8/A7 A10/A0 DQ15 DQ23
<27> FBC_MA1_MA9_L H5
A9/A1 A11/A6 DQ0 DQ24
U4 <27> FBC_MA6_MA11_L H5
A9/A1 A11/A6 DQ0 DQ24
U4 FBx_CMD1 A3_BA3
FBC_MA0_MA10_L H4 U2 FBC_MA7_MA8_L H4 U2
<27> FBC_MA0_MA10_L FBC_MA6_MA11_L A10/A0 A8/A7 DQ1 DQ25 <27> FBC_MA7_MA8_L FBC_MA1_MA9_L A10/A0 A8/A7 DQ1 DQ25
<27> FBC_MA6_MA11_L K5
A11/A6 A9/A1 DQ2 DQ26
T4 <27> FBC_MA1_MA9_L K5
A11/A6 A9/A1 DQ2 DQ26
T4 FBx_CMD2 A2_BA0
FBC_MA12_RFU_L J5 T2 FBC_MA12_RFU_L J5 T2
<27> FBC_MA12_RFU_L A12/RFU/NC DQ3 DQ27 <27> FBC_MA12_RFU_L A12/RFU/NC DQ3 DQ27
DQ4 DQ28
N4
DQ4 DQ28
N4 FBx_CMD3 A4_BA2
A5 N2 A5 N2
VPP/NC DQ5 DQ29 +1.35VS_VGA VPP/NC DQ5 DQ29
U5
VPP/NC DQ6 DQ30
M4 U5
VPP/NC DQ6 DQ30
M4 FBx_CMD4 A5_BA1
2 RV147 1 M2 2 RV148 1 M2
DQ7 DQ31 DQ7 DQ31
DIS@ 1K_0402_1%
+1.35VS_VGA
DIS@ 1K_0402_1%
+1.35VS_VGA
FBx_CMD5 WE#
J1 J1
MF MF
2 RV149 1 J10
SEN
2 RV150 1 J10
SEN FBx_CMD6 A7_A8
2 RV151 1 DIS@ 1K_0402_1% J13 B1 2 RV152 1 DIS@ 1K_0402_1% J13 B1
ZQ VDDQ ZQ VDDQ
DIS@ 121_0402_1%
VDDQ
D1 DIS@ 121_0402_1%
VDDQ
D1 FBx_CMD7 A6_A11
F1 F1
FBC_ABI#_L VDDQ FBC_ABI#_L VDDQ
Follow DG v02 <27> FBC_ABI#_L J4
ABI# VDDQ
M1 <27> FBC_ABI#_L J4
ABI# VDDQ
M1 FBx_CMD8 ABI#
FBC_RAS#_L G3 P1 FBC_CAS#_L G3 P1
<27> FBC_RAS#_L FBC_CS#_L RAS# CAS# VDDQ <27> FBC_CAS#_L FBC_WE#_L RAS# CAS# VDDQ
<27> FBC_CS#_L G12
CS# WE# VDDQ
T1 <27> FBC_WE#_L G12
CS# WE# VDDQ
T1 FBx_CMD9 A12_RFU
FBC_CLK0 2 RV153 1 FBC_CAS#_L L3 G2 FBC_RAS#_L L3 G2
<27> FBC_CAS#_L FBC_WE#_L CAS# RAS# VDDQ <27> FBC_RAS#_L FBC_CS#_L CAS# RAS# VDDQ
DIS@ 80.6_0402_1%
<27> FBC_WE#_L L12
WE# CS# VDDQ
L2 <27> FBC_CS#_L L12
WE# CS# VDDQ
L2 FBx_CMD10 CKE#
B3 B3
VDDQ VDDQ
2
C VDDQ
D3
VDDQ
D3 FBx_CMD11 A1_A9 C
RV155 F3 F3
FBC_WCK0_N VDDQ FBC_WCK1_N VDDQ
160_0402_1% <27> FBC_WCK0_N D5
WCK01# WCK23# VDDQ
H3 <27> FBC_WCK1_N D5
WCK01# WCK23# VDDQ
H3 FBx_CMD12 A0_A10
@ FBC_WCK0 D4 K3 FBC_WCK1 D4 K3
<27> FBC_WCK0 WCK01 WCK23 VDDQ <27> FBC_WCK1 WCK01 WCK23 VDDQ
M3 M3 FBx_CMD13 RAS#
1
FBC_CLK0# FBC_WCK1_N VDDQ FBC_WCK0_N VDDQ

2 RV157 1 <27> FBC_WCK1_N P5 P3 <27> FBC_WCK0_N P5 P3
FBC_WCK1 WCK23# WCK01# VDDQ FBC_WCK0 WCK23# WCK01# VDDQ
DIS@ 80.6_0402_1%
<27> FBC_WCK1 P4
WCK23 WCK01 VDDQ
T3 <27> FBC_WCK0 P4
WCK23 WCK01 VDDQ
T3 FBx_CMD14 CAS#
E5 E5
VDDQ VDDQ
VDDQ
N5
VDDQ
N5 FBx_CMD15 RST# RST#
DIS@ CV195
0.01U_0402_25V7K
1 +FBC_VREFD_L A10 E10 +FBC_VREFD_L A10 E10

VREFD VDDQ VREFD VDDQ
U10
VREFD VDDQ
N10 U10
VREFD VDDQ
N10 FBx_CMD16 WE#
+FBC_VREFC0 J14 B12 +FBC_VREFC0 J14 B12
VREFC VDDQ VREFC VDDQ
2 VDDQ
D12
VDDQ
F12 F12
VDDQ VDDQ
VDDQ
H12
VDDQ
FBC_RST# J2 K12 FBC_RST# J2 K12
<27,31> FBC_RST# RESET# VDDQ <27,31> FBC_RST# RESET# VDDQ
VDDQ
M12
VDDQ
P12 P12
VDDQ VDDQ
+1.35VS_VGA VDDQ
T12
VDDQ
T12 FBx_CMD20 A3_BA3
G13 G13
VDDQ VDDQ
H1
VSS VDDQ
L13 H1
VSS VDDQ
L13 FBx_CMD21 CS#
K1 B14 K1 B14
VSS VDDQ VSS VDDQ
1
B5
VSS VDDQ
D14 B5
VSS VDDQ
D14 FBx_CMD22 A0_A10
RV159 G5 F14 G5 F14
VSS VDDQ VSS VDDQ
549_0402_1% L5
VSS VDDQ
M14 L5
VSS VDDQ
M14 FBx_CMD23 A1_A9
DIS@ T5 P14 T5 P14
B10 T14 B10 T14 FBx_CMD24 ABI#
2
+FBC_VREFC0 VSS VDDQ VSS VDDQ

1 2 D10 D10
VSS VSS
931_0402_1% G10
VSS
G10
VSS FBx_CMD25 A12_RFU
1
DIS@ CV197
0.01U_0402_25V7K
DIS@ 1 L10 A1 L10 A1

VSS VSSQ VSS VSSQ
RV160 P10
VSS VSSQ
C1 P10
VSS VSSQ
C1 FBx_CMD26 CKE#
1.33K_0402_1% T10 E1 T10 E1
VSS VSSQ VSS VSSQ
DIS@
2
H14
VSS VSSQ
N1 H14
VSS VSSQ
N1 FBx_CMD27 A6_A11
K14 R1 K14 R1
2
VSS VSSQ VSS VSSQ

1
D +1.35VS_VGA +1.35VS_VGA
VSSQ
U1
VSSQ
U1 FBx_CMD28 A7_A8
2 DIS@ H2 H2
<23,28,29,31> MEM_VREF VSSQ VSSQ
G G1
VDD VSSQ
K2 G1
VDD VSSQ
K2 FBx_CMD29 CAS#
B S QV12 L1 A3 L1 A3 B
3
VDD VSSQ VDD VSSQ

2N7002W-T/R7_SOT323-3 G4
VDD VSSQ
C3 G4
VDD VSSQ
C3 FBx_CMD30 RAS#
L4 E3 L4 E3
VDD VSSQ VDD VSSQ
C5 N3 C5 N3
VDD VSSQ VDD VSSQ
R5 R3 R5 R3
C10 U3 C10 U3
VDD VSSQ VDD VSSQ
R10 C4 R10 C4
VDD VSSQ VDD VSSQ
D11 R4 D11 R4
VDD VSSQ VDD VSSQ
1
G11 F5 G11 F5
L11 M5 L11 M5
P11 F10 P11 F10
RV217 G14 M10 G14 M10
VDD VSSQ VDD VSSQ
L14 C11 L14 C11
2
+FBC_VREFD_L VDD VSSQ VDD VSSQ

1 2 R11 R11
931_0402_1% VSSQ VSSQ
A12 A12
VSSQ VSSQ
1
DIS@ CV198
CV290
0.01U_0402_25V7K
0.01U_0402_25V7K
DIS@ 1 1 C12 C12

RV162 VSSQ VSSQ
E12 E12
1.33K_0402_1% VSSQ VSSQ
N12 N12
DIS@ VSSQ VSSQ
R12 R12
VSSQ VSSQ
1
D 2 2
DIS@
170-BALL U12 170-BALL U12

2
DIS@ VSSQ VSSQ

2 H13 H13
<23,28,29,31> MEM_VREF G SGRAM GDDR5 VSSQ SGRAM GDDR5 VSSQ
K13 K13
QV13 VSSQ VSSQ
S A14 A14
3

C14 C14
VSSQ VSSQ
E14 E14
VSSQ VSSQ
N14 N14
VSSQ VSSQ
R14 R14
VSSQ +1.35VS_VGA VSSQ
U14 UV8 SIDE U14
VSSQ VSSQ
X76@ X76@
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+1.35VS_VGA UV7 SIDE

DIS@ CV207
DIS@ CV208
DIS@ CV209
DIS@ CV210
DIS@ CV211
DIS@ CV212
DIS@ CV213
DIS@ CV214
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
H5GQ1H24AFR-T2L_BGA170 2 1 1 1 1 1 1 1 H5GQ1H24AFR-T2L_BGA170
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
DIS@ CV199
DIS@ CV200
DIS@ CV201
DIS@ CV202
DIS@ CV203
DIS@ CV204
DIS@ CV205
DIS@ CV206
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 1 1 1 1 1 1 1
1 2 2 2 2 2 2 2
A A
1 2 2 2 2 2 2 2

N12P-VRAM C Lower
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
Memory Partition C - Upper 32 bits

UV9
MF=0 MF=1 MF=1 MF=0 UV10
A4 FBC_D32 MF=0 MF=1 MF=1 MF=0

FBC_EDC4 DQ24 DQ0 FBC_D33
C2 A2
EDC0 EDC3 DQ25 DQ1 FBC_D34 FBC_D56
C13 B4 A4
FBC_EDC6 EDC1 EDC2 DQ26 DQ2 FBC_D35 FBC_EDC7 DQ24 DQ0 FBC_D57
<27> FBC_D[63..32] R13
EDC2 EDC1 DQ27 DQ3
B2 BYTE4 C2
EDC0 EDC3 DQ25 DQ1
A2
R2 E4 FBC_D36 C13 B4 FBC_D58
EDC3 EDC0 DQ28 DQ4 FBC_D37 FBC_EDC5 EDC1 EDC2 DQ26 DQ2 FBC_D59
E2 R13 B2
DQ29 DQ5 FBC_D38 EDC2 EDC1 DQ27 DQ3 FBC_D60
<27> FBC_EDC[7..4] F4 R2 E4 BYTE7
FBC_DBI4# DQ30 DQ6 FBC_D39 EDC3 EDC0 DQ28 DQ4 FBC_D61
<27> FBC_DBI4# D2 F2 E2
DBI0# DBI3# DQ31 DQ7 DQ29 DQ5 FBC_D62
D D13 A11 F4 D
FBC_DBI6# DBI1# DBI2# DQ16 DQ8 FBC_DBI7# DQ30 DQ6 FBC_D63
<27> FBC_DBI6# P13 A13 <27> FBC_DBI7# D2 F2
P2 B11 D13 A11
DBI3# DBI0# DQ18 DQ10 FBC_DBI5# DBI1# DBI2# DQ16 DQ8
B13 <27> FBC_DBI5# P13 A13
FBC_CLK1 DQ19 DQ11 DBI2# DBI1# DQ17 DQ9
J12 E11 P2 B11
<27> FBC_CLK1
<27> FBC_CLK1#
FBC_CLK1# J11
CK
CK#
DQ20
DQ21
DQ12
DQ13
E13
DBI3# DBI0# DQ18
DQ19
DQ10
DQ11
B13 GDDR5
FBC_CKE_H J3 F11 FBC_CLK1 J12 E11
<27> FBC_CKE_H CKE# DQ22
DQ23
DQ14
DQ15
F13
FBC_D48
<27> FBC_CLK1
<27> FBC_CLK1#
FBC_CLK1#
FBC_CKE_H
J11
CK
CK#
DQ20
DQ21
DQ12
DQ13
E13 Mode G - Mirror Mode Mapping
U11 <27> FBC_CKE_H J3 F11
FBC_MA2_BA0_H DQ8 DQ16 FBC_D49 CKE# DQ22 DQ14
<27> FBC_MA2_BA0_H H11 U13 F13
FBC_MA5_BA1_H BA0/A2 BA2/A4 DQ9 DQ17 FBC_D50 DQ23 DQ15 FBC_D40
<27> FBC_MA5_BA1_H K10
T11
DQ8 DQ16
U11 DATA Bus
FBC_MA4_BA2_H K11 T13 FBC_D51 FBC_MA4_BA2_H H11 U13 FBC_D41
<27> FBC_MA4_BA2_H FBC_MA3_BA3_H BA2/A4 BA0/A2 DQ11 DQ19 FBC_D52 <27> FBC_MA4_BA2_H FBC_MA3_BA3_H BA0/A2 BA2/A4 DQ9 DQ17 FBC_D42
<27> FBC_MA3_BA3_H H10
N11 BYTE6 <27> FBC_MA3_BA3_H K10
T11 Address 0..31 32..63
N13 FBC_D53 FBC_MA2_BA0_H K11 T13 FBC_D43 BYTE5
DQ13 DQ21 FBC_D54 <27> FBC_MA2_BA0_H FBC_MA5_BA1_H BA2/A4 BA0/A2 DQ11 DQ19 FBC_D44
DQ14 DQ22
M11 <27> FBC_MA5_BA1_H H10
N11 FBx_CMD0 CS#
FBC_MA7_MA8_H K4 M13 FBC_D55 N13 FBC_D45
<27> FBC_MA7_MA8_H FBC_MA1_MA9_H A8/A7 A10/A0 DQ15 DQ23 DQ13 DQ21 FBC_D46
<27> FBC_MA1_MA9_H H5
A9/A1 A11/A6 DQ0 DQ24
U4
DQ14 DQ22
M11 FBx_CMD1 A3_BA3
FBC_MA0_MA10_H H4 U2 FBC_MA0_MA10_H K4 M13 FBC_D47
<27> FBC_MA0_MA10_H FBC_MA6_MA11_H A10/A0 A8/A7 DQ1 DQ25 <27> FBC_MA0_MA10_H FBC_MA6_MA11_H A8/A7 A10/A0 DQ15 DQ23
<27> FBC_MA6_MA11_H K5
A11/A6 A9/A1 DQ2 DQ26
T4 <27> FBC_MA6_MA11_H H5
A9/A1 A11/A6 DQ0 DQ24
U4 FBx_CMD2 A2_BA0
FBC_MA12_RFU_H J5 T2 FBC_MA7_MA8_H H4 U2
<27> FBC_MA12_RFU_H A12/RFU/NC DQ3 DQ27 <27> FBC_MA7_MA8_H FBC_MA1_MA9_H A10/A0 A8/A7 DQ1 DQ25
DQ4 DQ28
N4 <27> FBC_MA1_MA9_H K5
A11/A6 A9/A1 DQ2 DQ26
T4 FBx_CMD3 A4_BA2
A5 N2 FBC_MA12_RFU_H J5 T2
VPP/NC DQ5 DQ29 <27> FBC_MA12_RFU_H A12/RFU/NC DQ3 DQ27
U5
VPP/NC DQ6 DQ30
M4
DQ4 DQ28
N4 FBx_CMD4 A5_BA1
2 RV163 1 M2 A5 N2
DQ7 DQ31 +1.35VS_VGA VPP/NC DQ5 DQ29
DIS@ 1K_0402_1%
+1.35VS_VGA
U5
VPP/NC DQ6 DQ30
M4 FBx_CMD5 WE#
J1 2 RV164 1 M2
MF DQ7 DQ31
2 RV165 1 J10
SEN
DIS@ 1K_0402_1%
+1.35VS_VGA
FBx_CMD6 A7_A8
2 RV167 1 DIS@ 1K_0402_1% J13 B1 J1
ZQ VDDQ MF
DIS@ 121_0402_1%
VDDQ
D1 2 RV166 1 J10
SEN FBx_CMD7 A6_A11
F1 2 RV168 1 DIS@ 1K_0402_1% J13 B1
FBC_ABI#_H VDDQ ZQ VDDQ
Follow DG v02 <27> FBC_ABI#_H J4
ABI# VDDQ
M1 DIS@ 121_0402_1%
VDDQ
D1 FBx_CMD8 ABI#
FBC_RAS#_H G3 P1 F1
<27> FBC_RAS#_H FBC_CS#_H RAS# CAS# VDDQ FBC_ABI#_H VDDQ
<27> FBC_CS#_H G12
CS# WE# VDDQ
T1 <27> FBC_ABI#_H J4
ABI# VDDQ
M1 FBx_CMD9 A12_RFU
FBC_CLK1 2 RV169 1 FBC_CAS#_H L3 G2 FBC_CAS#_H G3 P1
<27> FBC_CAS#_H FBC_WE#_H CAS# RAS# VDDQ <27> FBC_CAS#_H FBC_WE#_H RAS# CAS# VDDQ
DIS@ 80.6_0402_1%
<27> FBC_WE#_H L12
WE# CS# VDDQ
L2 <27> FBC_WE#_H G12
CS# WE# VDDQ
T1 FBx_CMD10 CKE#
B3 FBC_RAS#_H L3 G2
VDDQ <27> FBC_RAS#_H CAS# RAS# VDDQ
2
D3 FBC_CS#_H L12 L2 FBx_CMD11 A1_A9

VDDQ <27> FBC_CS#_H WE# CS# VDDQ
C RV171 F3 B3 C
FBC_WCK2_N VDDQ VDDQ
160_0402_1% <27> FBC_WCK2_N D5
WCK01# WCK23# VDDQ
H3
VDDQ
D3 FBx_CMD12 A0_A10
@ FBC_WCK2 D4 K3 F3
<27> FBC_WCK2 WCK01 WCK23 VDDQ FBC_WCK3_N VDDQ
M3 D5 H3 FBx_CMD13 RAS#
1
FBC_CLK1# FBC_WCK3_N VDDQ <27> FBC_WCK3_N FBC_WCK3 WCK01# WCK23# VDDQ

2 RV173 1 <27> FBC_WCK3_N P5 P3 <27> FBC_WCK3 D4 K3
FBC_WCK3 WCK23# WCK01# VDDQ WCK01 WCK23 VDDQ
DIS@ 80.6_0402_1%
<27> FBC_WCK3 P4
WCK23 WCK01 VDDQ
T3
VDDQ
M3 FBx_CMD14 CAS#
E5 FBC_WCK2_N P5 P3
VDDQ <27> FBC_WCK2_N FBC_WCK2 WCK23# WCK01# VDDQ
VDDQ
N5 <27> FBC_WCK2 P4
WCK23 WCK01 VDDQ
T3 FBx_CMD15 RST# RST#
DIS@ CV215
0.01U_0402_25V7K
1 +FBC_VREFD_H A10 E10 E5

VREFD VDDQ VDDQ
U10
VREFD VDDQ
N10
VDDQ
N5 FBx_CMD16 WE#
+FBC_VREFC1 J14 B12 +FBC_VREFD_H A10 E10
VREFC VDDQ VREFD VDDQ
2 VDDQ
D12 U10
VREFD VDDQ
N10 FBx_CMD17 A5_BA1
F12 +FBC_VREFC1 J14 B12
VDDQ VREFC VDDQ
VDDQ
H12
VDDQ
FBC_RST# J2 K12 F12
<27,30> FBC_RST# RESET# VDDQ VDDQ
VDDQ
M12
VDDQ
P12 FBC_RST# J2 K12
VDDQ <27,30> FBC_RST# RESET# VDDQ
+1.35VS_VGA VDDQ
T12
VDDQ
G13 P12
VDDQ VDDQ
H1
VSS VDDQ
L13
VDDQ
T12 FBx_CMD21 CS#
K1 B14 G13
VSS VDDQ VDDQ
1
B5
VSS VDDQ
D14 H1
VSS VDDQ
L13 FBx_CMD22 A0_A10
RV175 G5 F14 K1 B14
VSS VDDQ VSS VDDQ
549_0402_1% L5
VSS VDDQ
M14 B5
VSS VDDQ
D14 FBx_CMD23 A1_A9
DIS@ T5 P14 G5 F14
B10 T14 L5 M14 FBx_CMD24 ABI#
2
+FBC_VREFC1 VSS VDDQ VSS VDDQ

1 2 D10 T5 P14
VSS VSS VDDQ
931_0402_1% G10
VSS
B10
VSS VDDQ
T14 FBx_CMD25 A12_RFU
1
DIS@ CV217
0.01U_0402_25V7K
DIS@ 1 L10 A1 D10

VSS VSSQ VSS
RV176 P10
VSS VSSQ
C1 G10
VSS FBx_CMD26 CKE#
1.33K_0402_1% T10 E1 L10 A1
VSS VSSQ VSS VSSQ
DIS@
2
H14
VSS VSSQ
N1 P10
VSS VSSQ
C1 FBx_CMD27 A6_A11
K14 R1 T10 E1
2
VSS VSSQ VSS VSSQ

1
D +1.35VS_VGA
VSSQ
U1 H14
VSS VSSQ
N1 FBx_CMD28 A7_A8
2 DIS@ H2 K14 R1
<23,28,29,30> MEM_VREF VSSQ +1.35VS_VGA VSS VSSQ
G G1
VDD VSSQ
K2
VSSQ
U1 FBx_CMD29 CAS#
S QV14 L1 A3 H2
3
VDD VSSQ VSSQ

B 2N7002W-T/R7_SOT323-3 G4
VDD VSSQ
C3 G1
VDD VSSQ
K2 FBx_CMD30 RAS# B
L4 E3 L1 A3
VDD VSSQ VDD VSSQ
C5 N3 G4 C3
R5 R3 L4 E3
VDD VSSQ VDD VSSQ
C10 U3 C5 N3
VDD VSSQ VDD VSSQ
R10 C4 R5 R3
VDD VSSQ VDD VSSQ
1
D11 R4 C10 U3
G11 F5 R10 C4
L11 M5 D11 R4
RV219 P11 F10 G11 F5
VDD VSSQ VDD VSSQ
G14 M10 L11 M5
2
+FBC_VREFD_H VDD VSSQ VDD VSSQ

1 2 L14 C11 P11 F10
R11 G14 M10
VSSQ VDD VSSQ
1
DIS@ CV218
CV291
0.01U_0402_25V7K
0.01U_0402_25V7K
DIS@ 1 1 A12 L14 C11

RV178 VSSQ VDD VSSQ
C12 R11
1.33K_0402_1% VSSQ VSSQ
E12 A12
DIS@ VSSQ VSSQ
N12 C12
VSSQ VSSQ
1
D 2 2
DIS@
R12 E12
2
DIS@ 170-BALL VSSQ VSSQ

2 U12 N12
<23,28,29,30> MEM_VREF G VSSQ VSSQ
H13 R12
QV15 SGRAM GDDR5 VSSQ 170-BALL VSSQ
S K13 U12
3

A14 H13
VSSQ SGRAM GDDR5 VSSQ
C14 K13
VSSQ VSSQ
E14 A14
VSSQ VSSQ
N14 C14
VSSQ VSSQ
R14 E14
VSSQ VSSQ
U14 N14
VSSQ +1.35VS_VGA VSSQ
UV10 SIDE VSSQ
R14
X76@ U14
+1.35VS_VGA VSSQ
UV9 SIDE
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
H5GQ1H24AFR-T2L_BGA170 X76@
DIS@ CV227
DIS@ CV228
DIS@ CV229
DIS@ CV230
DIS@ CV231
DIS@ CV232
DIS@ CV233
DIS@ CV234
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 1 1 1 1 1 1 1
10U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
H5GQ1H24AFR-T2L_BGA170
DIS@ CV245
DIS@ CV244
DIS@ CV249
DIS@ CV243
DIS@ CV240
DIS@ CV247
DIS@ CV246
DIS@ CV248
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2 1 1 1 1 1 1 1
1 2 2 2 2 2 2 2
1 2 2 2 2 2 2 2
A A

N12P-VRAM C Upper
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
+3VS_VGA
http://hobi-elektronika.net Physical
Strapping pin Power Rail
Logical
Strapping Bit3
Logical
Strapping Bit2
Logical
Strapping Bit1
Logical
Strapping Bit0
ROM_SO +3VS_VGA XCLK_417 FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEVICE
ZZZ ZZZ ROM_SCLK +3VS_VGA PCI_DEVID[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM
ROM_SI +3VS_VGA RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]
2
RV92 RV93 RV94 STRAP2 +3VS_VGA PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
45.3K_0402_1% 34.8K_0402_1% 20K_0402_1%
DIS@ @ DIS@ Hynix Samsung STRAP1 +3VS_VGA 3GIO_PAD_CFG_ADR[3] 3GIO_PAD_CFG_ADR[2] 3GIO_PAD_CFG_ADR[1] 3GIO_PAD_CFG_ADR[0]
D H1G@ S1G@ D
1
X7625938L01 X7625938L02 STRAP0 +3VS_VGA USER[3] USER[2] USER[1] USER[0]
<24> STRAP0 STRAP0
<24> STRAP1 STRAP1
<24> STRAP2 STRAP2 ZZZ
Pull-up to
Resistor Values +3VS_VGA Pull-down to Gnd
2
DIS@ @
@ RV95 RV96 RV97 5K 1000 0000
45.3K_0402_1% 34.8K_0402_1% 4.99K_0402_1%
Samsung 10K 1001 0001
1 S2G@
1
X7625938L03 15K 1010 0010
20K 1011 0011
25K 1100 0100
30K 1101 0101
+3VS_VGA
35K 1110 0110
45K 1111 0111
2
2
C C
RV98 RV99 RV100
4.99K_0402_1% 4.99K_0402_1% 15K_0402_1%
@ @ @
1
<24> ROM_SI ROM_SI

<24> ROM_SO ROM_SO
ROM_SCLK
<24> ROM_SCLK SUB_VENDOR XCLK_417
2
0 No VBIOS ROM 0 277MHz (Default)

2
RV101
X76 20K_0402_1% RV102 RV103
X76@ 10K_0402_1% 15K_0402_1% 1 BIOS ROM is present (Default) 1 Reserved
DIS@ DIS@
1
FB_0_BAR_SIZE USER Straps

0 256MB (Default) User[3:0]
1 Reserved 1000-1100 Customer defined

B B
GPU FB Memory (GDDR5) ROM_SO ROM_SCLK ROM_SI STRAP2 STRAP1 STRAP0
Samsung K4G10325FE-HC04
3GIO_PADCFG PEX_PLL_EN_TERM
1800MHz 3GIO_PADCFG[3:0] 0 Disable (Default)
N12P-GT1 (defaul) 32Mx32 PD 10K PD 15K PD 20K PU 20K PD 35K PU 45K
0110 Notebook Default 1 Enable
Hynix H5GQ1H24AFR-T2L
1600MHz
32Mx32 PD 10K PD 15K PD 15K PU 20K PD 35K PU 45K
SLOT_CLK_CFG
0 GPU and MCH don't share a common reference clock
X76
1 GPU and MCH share a common reference clock (Default)
SMBUS_ALT_ADDR VGA_DEVICE
0 0x9E (Default) 0 3D Device (Class Code 302h)
A 1 0x9C (Multi-GPU usage) 1 VGA Device (Default) A

N12P_MISC
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
TOP side (under inductor)
RV180
<60> CPU_VIN+ 1 2 1 2 10_0402_1%
RV179 0_0402_5%
VENTURA@ 2 VENTURA@ 2
D @ VENTURA@ D
CV235 CV236
Link to Rsense, PWR side 0.1U_0402_16V4Z 0.1U_0402_16V4Z
UV12
1 1 1 8 V_A1
VIN+ A1
<60> CPU_VIN- 1 2 10_0402_1% 2 7 V_A0 VENTURA@
VIN- A0 I2C_DATA_R 2 RV184 1 0_0402_5% I2C_DATA
3 6
RV183 GND SDA I2C_CLK_R 2 I2C_CLK
+3VS 4 5 1
VS SCL 0_0402_5%
VENTURA@
INA219AIDCNRG4_SOT23-8 RV185 VENTURA@
+3VS_VGA VENTURA@
For CPU Ventura
2
RV186 RV187
slave address : 1000010
0_0402_5% @ 0_0402_5% please placemnet near R-sense
@
RV188
1
V_A0 2 1 I2C_DATA_R
VENTURA@ 0_0402_5% +3VS
V_A1
2
RV190 RV191
VENTURA@ @
1
0_0402_5% 0_0402_5% +3VS_VGA
C RV193 RV194 C
1
1
2.2K_0402_5% 2.2K_0402_5%
VENTURA@ VENTURA@
2
G
I2C_DATA 1 3 I2CB_SDA
I2CB_SDA <23>
S
VENTURA@
QV3
Link to GPU
2
2N7002E-T1-GE3_SOT23-3
G
I2C_CLK 1 3 I2CB_SCL
I2CB_SCL <23>
S
VENTURA@
QV4
2N7002E-T1-GE3_SOT23-3
VENTURA@ RV196
<59> GPU_VIN+ 1 2 1 2 10_0402_1%
RV195
0_0402_5% 1 VENTURA@ 2
VENTURA@
CV237 CV238
Link to Rsense, PWR side 0.1U_0402_16V4Z 0.1U_0402_16V4Z
UV13
@ 2 1 1 8 GPU_A1
RV197 1 VIN+ A1
<59> GPU_VIN- 2 10_0402_1% 2 7 GPU_A0
+3VS VIN- A0 I2C_DATA
B 3 6 B
GND SDA I2C_CLK
VENTURA@ +3VS 4 5
VS SCL
INA219AIDCNRG4_SOT23-8
2
RV198 RV199 VENTURA@
0_0402_5% 0_0402_5%
@ VENTURA@
1
GPU_A1
RV189
GPU_A0 2 1 I2C_DATA
VENTURA@ 0_0402_5%
Ventura for GPU SIDE
2
RV202 RV203 Slave Address 1000110

0_0402_5% 0_0402_5% Placement near Rsense
1
@ @
A A

VENTURA Interface
0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
INVPWM
http://hobi-elektronika.net +LEDVDD Ventura_B+
DISPOFF# 1 R813 2 0_0805_5%
470P_0402_50V7K
470P_0402_50V7K
1 1
C525 C523
+LEDVDD
1 @ 1 @ 680P_0402_50V7K C524
C527 JLVDS1 @ 4.7U_0805_25V6-K
2 2
1 1
JLVDS2 2 41
2 2 2 G1
1 1 3 3 G2 42
2 31 DISPOFF# 4 43
2 G1 R815 INVPWM 4 G3
D
For EMI 3 3 G2 32 <45> INVT_PWM 1 2 5 5 G4 44
D
DISPOFF# 4 33 0_0402_5% DIS@ 6 45
INVPWM 4 G3 6 G5
5 5 G4 34 7 7 G6 46
6 R825 1 2 LVDS_BCLK_CONN 8
6 <23> VGA_BL_PWM 8
7 0_0402_5% @ LVDS_BCLK#_CONN 9
DMIC_DATA 7 LVDS_B2_CONN 9
8 10
LCD POWER CIRCUIT DMIC_CLK 9
10
8
9
LVDS_B2#_CONN
LVDS_B1_CONN
11
12
10
11
10 LVDS_B1#_CONN 12
11 11 13 13
LVDS_ACLK_CONN 12 LVDS_B0_CONN 14 USB20_P5 DMIC_DATA
+LCDVDD +5VALW LVDS_ACLK#_CONN 12 LVDS_B0#_CONN 14
13 13 15 15
14 16 USB20_N5 DMIC_CLK
LVDS_A2_CONN 14 LVDS_ACLK_CONN 16
15 15 17 17
+3VS LVDS_A2#_CONN +3VS LVDS_ACLK#_CONN
W=60mils 16 16 18 18
2
LVDS_A1_CONN 17 19
PJDLC05_SOT23-3
PJDLC05_SOT23-3
R816
1
R817 LVDS_A1#_CONN 17 LVDS_A2_CONN 19 D52 D55
18 18 20 20
150_0603_1% 100K_0402_5% 1 LVDS_A0_CONN 19 (60 MIL) LVDS_A2#_CONN 21 @ @
C529 LVDS_A0#_CONN 19 R818 R819 LVDS_A1_CONN 21
20 20 22 22
4.7U_0805_10V4Z EDID_DATA_CONN 21 +LCDVDD_CONN 2.2K_0402_5% 2.2K_0402_5% LVDS_A1#_CONN 23
+LCDVDD_CONN EDID_CLK_CONN 21 LVDS_A0_CONN 23
22 24
2
22 24
1
3
D R820 220K_0402_5%
S 2 LVDS_A0#_CONN
G +3VS 23 23 25 25
2 1 2 2 24 EDID_DATA_CONN 26
Q67 G 24 EDID_CLK_CONN 26
25 27
1
2N7002_SOT23 AO3413_SOT23-3 25 27
S 1
D 26 +3VS 28
3
1
26 28
1
DTC124EK C530 Q68 27 29

+3VS 27 29
W=60mils USB20_P5 28 W=60mils 30
OUT
28 1 30
0.1U_0402_16V4Z USB20_N5 29 @ 31
2 +LCDVDD +LCDVDD_CONN 29 680P_0402_50V7K 31
L15 +CMOS_PW 30 30 +3VS 32 32
R1193 1 0_0402_5% C528
<17> PCH_ENVDD
UMA@
2 2 IN
1 2
2 <42> DMIC_DATA 33
34
33 ESD request
GND
<42> DMIC_CLK 34
ACES_88341-3001 35
R1194 1 0_0402_5% Q69 FBMA-L11-201209-221LMA30T_0805 ME@ 35
<23> VGA_ENVDD 2 36 36
1
DIS_ONLY@ DTC124EKAT146_SC59-3 1 1 37
3
C C531 C532 USB20_P5 37 C

<18> USB20_P5 38 38
R821 @ CMOS <18> USB20_N5 USB20_N5 39
100K_0402_5% 4.7U_0805_10V4Z 0.1U_0402_16V4Z 39
+CMOS_PW 40 40
2 2
W=40mils
2
STARC_107K40-000001-G2
ME@
+3VS
1
R891 1 2 @
0_0402_5%
+3VS R822
4.7K_0402_5%
D30
@ <17> EDID_CLK EDID_CLK R1199 1 UMA@ 2 0_0402_5%
2
5
U23 BKOFF# 1 2 DISPOFF#

<45> BKOFF#
UMA@ DIS_ONLY@
P
NC
R1195 1 2 0_0402_5% 2 4 PCH_PWM_R 1 R823 2 INVPWM <23> VGA_EDID_CLK VGA_EDID_CLK R1196 1 2 0_0402_5% EDID_CLK_CONN RB751V-40 SOD-323
<17> PCH_PWM A Y
1
UMA@ 0_0402_5% @
G
NC7SZ14P5X_NL_SC70-5
<23> VGA_EDID_DATA VGA_EDID_DATA R1197 1 2 0_0402_5% EDID_DATA_CONN R890
3
DIS_ONLY@ 10K_0402_5%
UMA@
2
1 R824 2 <17> EDID_DATA EDID_DATA R1200 1 2 0_0402_5%
2
G
0_0402_5% UMA@
3 1 INVPWM 2 R826 1 +3VS

10K_0402_5% @ R1201 1 UMA@ 0_0402_5%
S
<17> PCH_ENBKL 2 ENBKL <45>

2N7002_SOT23 <23> VGA_ENBKL R1202 1 2 0_0402_5%
2
Q70 DIS_ONLY@
@ R827
B 100K_0402_1% B
For GMCH DPST
1
LVDS_A0 R1239 1 2 0_0402_5% <24> VGA_TXOUT0+ VGA_TXOUT0+ R1240 1 2 0_0402_5% LVDS_A0_CONN
<17> LVDS_A0
LVDS_A0# R1241 1 2 0_0402_5% <24> VGA_TXOUT0- VGA_TXOUT0- R1242 1 2 0_0402_5% LVDS_A0#_CONN
<17> LVDS_A0#
UMA@ DIS_ONLY@
UMA@ DIS_ONLY@
LVDS_A1 R1243 1 2 0_0402_5% <24> VGA_TXOUT1+ VGA_TXOUT1+ R1244 1 2 0_0402_5% LVDS_A1_CONN
<17> LVDS_A1
LVDS_A1# R1245 1 2 0_0402_5% <24> VGA_TXOUT1- VGA_TXOUT1- R1246 1 2 0_0402_5% LVDS_A1#_CONN
<17> LVDS_A1#
UMA@ DIS_ONLY@
LVDS_A2 R1247 1
UMA@
2 0_0402_5% VGA_TXOUT2+ R1248
DIS_ONLY@
1 2 0_0402_5% LVDS_A2_CONN
CMOS Camera
<17> LVDS_A2 <24> VGA_TXOUT2+
LVDS_A2# R1249 1 2 0_0402_5% <24> VGA_TXOUT2- VGA_TXOUT2- R1250 1 2 0_0402_5% LVDS_A2#_CONN (40 MIL)
<17> LVDS_A2#
UMA@ DIS_ONLY@
UMA@ DIS_ONLY@ (40 MIL) R596 R432 +CMOS_PW
LVDS_ACLK R1251 1 2 0_0402_5% <24> VGA_TXCLK+ VGA_TXCLK+ R1252 1 2 0_0402_5% LVDS_ACLK_CONN 0_0603_5% 0_0603_5%
<17> LVDS_ACLK
S
LVDS_ACLK# R1253 1 0_0402_5% VGA_TXCLK- R1254 0_0402_5% LVDS_ACLK#_CONN +3VS_CMOS_IN +CMOS_PW_R
D
<17> LVDS_ACLK# 2 <24> VGA_TXCLK- 1 2 +3VS 1 2 3 1 1 2
UMA@ DIS_ONLY@ 1 CMOS@ 1
UMA@ DIS_ONLY@ CMOS@ CMOS@ CMOS@
LVDS_BCLK R1255 1 0_0402_5% VGA_TZCLK+ R1256 1 0_0402_5% LVDS_BCLK_CONN Q83 C518 C519
G
<17> LVDS_BCLK 2 <24> VGA_TZCLK+ 2
2
LVDS_BCLK# R1257 1 2 0_0402_5% VGA_TZCLK- R1258 1 2 0_0402_5% LVDS_BCLK#_CONN +5VALW SI2301BDS-T1-E3_SOT23-3 0.1U_0402_16V4Z 10U_0805_10V4Z
<17> LVDS_BCLK# <24> VGA_TZCLK- 2 2
UMA@ DIS_ONLY@ R434100K_0402_5% CMOS@
UMA@ DIS_ONLY@ 4.7V
LVDS_B0 R1259 1 2 0_0402_5% <24> VGA_TZOUT0+ VGA_TZOUT0+ R1260 1 2 0_0402_5% LVDS_B0_CONN 1
<17> LVDS_B0
1
LVDS_B0# R1261 1 2 0_0402_5% <24> VGA_TZOUT0- VGA_TZOUT0- R1264 1 2 0_0402_5% LVDS_B0#_CONN CMOS@ R435 CMOS@
<17> LVDS_B0#
UMA@ DIS_ONLY@ 150K_0402_5% C520
OUT
UMA@ DIS_ONLY@ CMOS@ 0.1U_0402_16V4Z
LVDS_B1 R1262 1 0_0402_5% VGA_TZOUT1+ R1263 0_0402_5% LVDS_B1_CONN 2
<17> LVDS_B1 2 <24> VGA_TZOUT1+ 1 2
LVDS_B1# R1265 1 2 0_0402_5% <24> VGA_TZOUT1- VGA_TZOUT1- R1266 1 2 0_0402_5% LVDS_B1#_CONN 2
<17> LVDS_B1# <45> CMOS_OFF# IN
UMA@ DIS_ONLY@
GND
UMA@ DIS_ONLY@
A Q84 A
LVDS_B2 R1267 1 2 0_0402_5% <24> VGA_TZOUT2+ VGA_TZOUT2+ R1268 1 2 0_0402_5% LVDS_B2_CONN DTC124EKAT146_SC59-3
<17> LVDS_B2
3
LVDS_B2# R1269 1 2 0_0402_5% <24> VGA_TZOUT2- VGA_TZOUT2- R1270 1 2 0_0402_5% LVDS_B2#_CONN CMOS@
<17> LVDS_B2#
UMA@ DIS_ONLY@
UMA@ DIS_ONLY@

LVDS/CAMERA
Custom 0.2
LA-6882P
5 4 3 2 1
A B C D E
+5VS +5VS +5VS +5VS +5VS
3 3 3 3 3
1 BLUE 1 GREEN 1 RED 1 JVGA_HS 1 JVGA_VS
2 2 2 BAT54S-7-F_SOT23-3 2 2
VGA_CRT_R R1271 1 2 0_0402_5% @ @ @ @ @
<23> VGA_CRT_R
D31 D32 D33 D34 D35
DIS_ONLY@ BAT54S-7-F_SOT23-3 BAT54S-7-F_SOT23-3 BAT54S-7-F_SOT23-3 BAT54S-7-F_SOT23-3
VGA_CRT_G R1272 1 2 0_0402_5%

<23> VGA_CRT_G
1
VGA_CRT_B R1273 1
DIS_ONLY@
0_0402_5%
+5VS
D36
+CRT_VCC
CRT Connector
F1
1
<23> VGA_CRT_B 2
2 1 1 2 +CRT_VCC_CONN
DIS_ONLY@ 1
RB491D_SC59-3
1.1A_6V_SMD1812P110TF C536
FCM1608CF-121T03 0603 W=40mils 2

0.1U_0402_16V4Z
DAC_RED_1 1 2 RED
L16
FCM1608CF-121T03 0603
DAC_GRN_1 1 2 GREEN
L17
FCM1608CF-121T03 0603 JCRT1
DAC_BLU_1 1 2 BLUE 6
L18 11
1
1 1 1 1 1 1 RED 1
7
R830 R831 R832 C537 C538 C539 C540 C542 C541 CRT_DDC_DAT_CONN 12
150_0402_1% 150_0402_1% 150_0402_1% 10P_0402_50V8J 10P_0402_50V8J GREEN 2
2 2 2 2 2 2
8
2
JVGA_HS 13
10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J10P_0402_50V8J BLUE 3
CLOSE TO CONN 9
JVGA_VS 14 G 16
4 G 17
DAC_RED R1274 1 2 0_0402_5% 10
<17> DAC_RED
CRT_DDC_CLK_CONN 15
2 UMA@ 5 2
DAC_GRN R1181 1 2 0_0402_5% +CRT_VCC 1
<17> DAC_GRN R833
C543 TYCO_1775763-1
UMA@ 1 2 ME@
DAC_BLU R1182 1 2 0_0402_5% 1 100P_0402_50V8J
<17> DAC_BLU 2
C544 1K_0402_5%
UMA@
0.1U_0402_16V4Z
2
1OE#
P
CRT_HSYNC R1183 1 2 0_0402_5% HSYNC_G 2 4 CRT_HSYNC_1 1 2 JVGA_HS
<17> CRT_HSYNC A Y L19
G
UMA@ FCM1608CF-121T03 0603 U24
VGA_CRT_HSYNC R1184 1 2 0_0402_5% SN74AHCT1G125DCKR_SC70-5 1
<23> VGA_CRT_HSYNC
3
@
DIS_ONLY@ C545
10P_0402_50V8J
+CRT_VCC 2
R834
1 2
1
C546 1K_0402_5%
0.1U_0402_16V4Z
CRT_VSYNC R1185 1 0_0402_5% 2
<17> CRT_VSYNC 2
5
1
UMA@
OE#
P
VGA_CRT_VSYNC R1186 1 2 0_0402_5% VSYNC_G 2 4 CRT_VSYNC_1 1 2 JVGA_VS
<23> VGA_CRT_VSYNC
3 FCM1608CF-121T03 0603 A Y L20 3
G
DIS_ONLY@ U25 1
SN74AHCT1G125DCKR_SC70-5
3
@ C547
+3VS 10P_0402_50V8J
+3VS +CRT_VCC 2
1
R835 R836
2.2K_0402_5% 2.2K_0402_5% R837 R838
5
UMA@ UMA@ 2.2K_0402_5% 2.2K_0402_5%

2
<17> CRT_DDC_DATA CRT_DDC_DATA R1189 1 2 0_0402_5% CRT_DDC_DATA_R 4 3 CRT_DDC_DAT_CONN

UMA@
DMN66D0LDW -7 2N_SOT363-6
2
Q73B
<17> CRT_DDC_CLK CRT_DDC_CLK R1190 1 2 0_0402_5% CRT_DDC_CLK_R 1 6 CRT_DDC_CLK_CONN

UMA@ 1 1
DMN66D0LDW -7 2N_SOT363-6 @ @
Q73A C548 C549
<23> VGA_CRT_DATA VGA_CRT_DATA R1191 1 2 0_0402_5% 100P_0402_50V8J 68P_0402_50V8K
DIS_ONLY@ 2 2
<23> VGA_CRT_CLK VGA_CRT_CLK R1192 1 2 0_0402_5%

DIS_ONLY@
4 4

CRT Connector
Custom 0.2
LA-6882P
Date: W ednesday, October 06, 2010 Sheet 35 of 63
A B C D E
5 4 3 2 1
<17>
<17>
HDMI_CLK+_CK
HDMI_CLK-_CK
HDMI_CLK+_CK
HDMI_CLK-_CK
HDMI_TX0+_CK
<17> HDMI_TX0+_CK
<17> HDMI_TX0-_CK HDMI_TX0-_CK
<17> HDMI_TX1+_CK HDMI_TX1+_CK
<17> HDMI_TX1-_CK HDMI_TX1-_CK
<17> HDMI_TX2+_CK HDMI_TX2+_CK
R1130 R1132 <17> HDMI_TX2-_CK HDMI_TX2-_CK
<24> VGA_HDMI_CLK+ VGA_HDMI_CLK+ DIS_HDMI@ CV253 1 2 0.1U_0402_10V6K HDMI_CLK+_CK

<24> VGA_HDMI_CLK- VGA_HDMI_CLK- DIS_HDMI@ CV254 1 2 0.1U_0402_10V6K HDMI_CLK-_CK
<24> VGA_HDMI_TX0+ VGA_HDMI_TX0+ DIS_HDMI@ CV255 1 2 0.1U_0402_10V6K HDMI_TX0+_CK
D <24> VGA_HDMI_TX0- VGA_HDMI_TX0- DIS_HDMI@ CV256 1 2 0.1U_0402_10V6K HDMI_TX0-_CK D
680_0402_1% 680_0402_1% <24> VGA_HDMI_TX1+ VGA_HDMI_TX1+ DIS_HDMI@ CV257 1 2 0.1U_0402_10V6K HDMI_TX1+_CK
UMA_HDMI@ UMA_HDMI@ <24> VGA_HDMI_TX1- VGA_HDMI_TX1- DIS_HDMI@ CV258 1 2 0.1U_0402_10V6K HDMI_TX1-_CK
<24> VGA_HDMI_TX2+ VGA_HDMI_TX2+ DIS_HDMI@ CV259 1 2 0.1U_0402_10V6K HDMI_TX2+_CK
R1135 R1137 <24> VGA_HDMI_TX2- VGA_HDMI_TX2- DIS_HDMI@ CV260 1 2 0.1U_0402_10V6K HDMI_TX2-_CK
+3VS
2
680_0402_1% 680_0402_1%
UMA_HDMI@ UMA_HDMI@ UMA_HDMI@
<17> HDMICLK HDMICLK 1 6 HDMICLK_R
R1140 R1141
DMN66D0LDW -7 2N_SOT363-6
5
Q80A
UMA_HDMI@
<17> HDMIDAT HDMIDAT 4 3 HDMIDAT_R
680_0402_1% 680_0402_1% DMN66D0LDW -7 2N_SOT363-6

UMA_HDMI@ UMA_HDMI@ Q80B
R1134 R1138 +3VS_VGA
2
DIS_HDMI@
1 6 HDMICLK_R
<24> VGA_HDMI_CLK
680_0402_1% 680_0402_1%
C UMA_HDMI@ UMA_HDMI@ DMN66D0LDW -7 2N_SOT363-6 C
5
Q115A DIS_HDMI@
4 3 HDMIDAT_R
<24> VGA_HDMI_DATA
HDMI_CLK+_CONN DIS_HDMI@ 1 2 DMN66D0LDW -7 2N_SOT363-6
R1130 499_0402_1% Q115B
HDMI_CLK-_CONN DIS_HDMI@ 1 2 +5VS
R1132 499_0402_1%
HDMI_TX0+_CONN DIS_HDMI@ 1 2
R1134 499_0402_1%
HDMI_TX0-_CONN DIS_HDMI@ 1 2
2
R1135 499_0402_1% +5VS_HDMI_F
HDMI_TX1+_CONN DIS_HDMI@ 1 2 HDMI@
R1137 499_0402_1% D37
HDMI_TX1-_CONN DIS_HDMI@ 1 2 RB491D_SC59-3
R1138 499_0402_1%
1
HDMI_TX2+_CONN DIS_HDMI@ 1 2
R1140 499_0402_1% R857 @
2
HDMI_TX2-_CONN DIS_HDMI@ 1 2 0_0805_5%
R1141 499_0402_1% F2
1
D +5VS 1.1A_6V_SMD1812P110TF
Q114 +3VS
+3VS 2
G 2N7002H 1N_SOT23-3 HDMI@
09/11 Add
1
3
2
S HDMI@
3
1 @ 2 +5VS_HDMI
2
R1142 100K_0402_5%
R859 1 C561
1M_0402_5% 0.1U_0402_16V4Z
2
B UMA_HDMI@ @ HDMI@ B
1
2
G
@ L23 Q85 D38
1
HDMI_CLK+_CK HDMI_CLK+_CONN UMA_HDMI@ BAT54S-7-F_SOT23-3 R860 R861 2
1 1 2 2
<17> TMDS_B_HPD 3 1 HDMI_DET_UMA 2.2K_0402_5% 2.2K_0402_5%
HDMI@ HDMI@
1
HDMI_CLK-_CK 4 3 HDMI_CLK-_CONN 2N7002_SOT23
4 3
2
W CM-2012-900T_4P R864
20K_0402_5%
@ L24 UMA_HDMI@ JHDMI1
HDMI_TX0+_CK 1 2 HDMI_TX0+_CONN 19
1
1 2 HP_DET
18 +5V
17 DDC/CEC_GND
HDMI_TX0-_CK 4 3 HDMI_TX0-_CONN R1143 L67 HDMIDAT_R 16
4 3 HDMICLK_R SDA
15 SCL
W CM-2012-900T_4P 10K_0402_5% BLM18PG181SN1D_0603 14 Reserved
<23> VGA_HDMI_HPD 1 2 2 1 13 CEC
@ L26 DIS_HDMI@ DIS_HDMI@ HDMI_CLK-_CONN 12 20
HDMI_TX1+_CK HDMI_TX1+_CONN CK- G1
1 1 2 2 11 CK_shield G2 21
1
R1144
HDMI_CLK+_CONN
100K_0402_5%
10 22
DIS_HDMI@
HDMI_TX0-_CONN CK+ G3
9 D0- G4 23
HDMI_TX1-_CK 4 3 HDMI_TX1-_CONN 8
4 3 HDMI_TX0+_CONN D0_shield
7 D0+
W CM-2012-900T_4P HDMI_TX1-_CONN 6
2
D1-
5 D1_shield
@ L27 HDMI_TX1+_CONN 4
HDMI_TX2+_CK HDMI_TX2+_CONN HDMI_TX2-_CONN D1+
1 1 2 2 3 D2-
2 D2_shield
A
HDMI_TX2+_CONN 1 A
HDMI_TX2-_CK HDMI_TX2-_CONN D2+
4 4 3 3
SUYIN_100042GR019M23DZL
W CM-2012-900T_4P
ME@
HDMI_CLK+_CK R865 1 HDMI@ 2 0_0402_5% HDMI_CLK+_CONN
HDMI_CLK-_CK R866 1 HDMI@ 2 0_0402_5% HDMI_CLK-_CONN
HDMI_TX0+_CK R867 1 HDMI@ 2 0_0402_5% HDMI_TX0+_CONN Security Classification Compal Secret Data Compal Electronics,Ltd.
HDMI_TX0-_CK R868 1 HDMI@ 2 0_0402_5% HDMI_TX0-_CONN 2008/03/25 2008/04/ Title
HDMI_TX1+_CK R869 1 HDMI@ 2 0_0402_5% HDMI_TX1+_CONN
HDMI_TX1-_CK R870 1 HDMI@ 2 0_0402_5% HDMI_TX1-_CONN
HDMI CONN
HDMI_TX2+_CK R871 1 HDMI@ 2 0_0402_5% HDMI_TX2+_CONN Size Document Number Rev
HDMI_TX2-_CK R872 1 HDMI@ 2 0_0402_5% HDMI_TX2-_CONN Custom 0.2
LA-6882P
5 4 3 2 1
A B C D E
Mini-Express Card for WLAN/WiMAX(Half) http://hobi-elektronika.net Reserve for SW mini-pcie debug card.
Mini-Express Card for SSD(Full) Series resistors closed to KBC side.
LPC_FRAME#_R R873 1 @ 2 0_0402_5% LPC_FRAME#
LPC_FRAME# <14,45>
LPC_AD3_R R874 1 @ 2 0_0402_5% LPC_AD3
LPC_AD3 <14,45>
LPC_AD2_R R875 1 @ 2 0_0402_5% LPC_AD2
LPC_AD2 <14,45>
LPC_AD1_R R876 1 @ 2 0_0402_5% LPC_AD1
+1.5VS LPC_AD1 <14,45>
LPC_AD0_R R878 1 @ 2 0_0402_5% LPC_AD0
+3VS_WLAN +1.5VS LPC_AD0 <14,45>
PCI_RST#_R R879 1 @ 2 0_0402_5% BUF_PLT_RST#
+3VS +3VS_WLAN CLK_PCI_DB CLK_PCI_DB <15>
J3
1
Mini-Express Card(WLAN/WiMAX) 1 2 J4
1 1 1
1
1 1 2 C563 C564 C565
1
JUMP_43X79
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
@
JUMP_43X79 2 2 2
2
@
JP1
2
<16,38,49> PCIE_WAKE# PCIE_WAKE# 1 2
BT_ACTIVE R877 1 1 2
<47> BT_ACTIVE 2 @ 0_0402_5% 3 4
R892 1 @ 0_0402_5% BT_DISABLE_R 3 4 +1.5VS_WLAN
<19,47> BT_OFF# 2 5 6
WLAN_CLKREQ1# 5 6 LPC_FRAME#_R
<15> WLAN_CLKREQ1# 7 8
R897 1 @ 0_0402_5% 7 8 LPC_AD3_R
<19> BT_DISABLE 2 9 10
9 10 LPC_AD2_R
<15> CLK_PCIE_WLAN1# 11 12
11 12 LPC_AD1_R
<15> CLK_PCIE_WLAN1 13 14
13 14 LPC_AD0_R
15 16
PCI_RST#_R 15 16
17 18
CLK_PCI_DB 17 18 R880 1 0_0402_5%
19 20 2 WL_OFF# <18>
19 20 WL_RST#
21 22
21 22 R881 1
<15> PCIE_PRX_DTX_N2 23 24 2 @ 0_0402_5% +3VALW
23 24 R882 1 0_0402_5%
<15> PCIE_PRX_DTX_P2 25 26 2 +3VS
25 26
27 28
27 28 R883 1
29 30 2 @ 0_0402_5% SMB_CLK_S3 <12,13,15>
29 30 R884 1
<15> PCIE_PTX_C_DRX_N2 31 32 2 @ 0_0402_5% SMB_DATA_S3 <12,13,15>
31 32
<15> PCIE_PTX_C_DRX_P2 33 34
33 34
35 36 USB20_N9 <18>
+3VS_WLAN 35 36
37 38 USB20_P9 <18>
37 38
39 40
39 40 0_0402_5%
41 42 2 1 R885
41 42 0_0402_5% WLAN_LED#
43 44 2 1 R886 WLAN_LED# <47>
100_0402_1% 43 44 +3VS
45 46
R887 45 46
47 48
EC_TX_P80_DATA 1 47 48
<45,46> EC_TX_P80_DATA 2 49 50
EC_RX_P80_CLK 1 49 50 +3VS_WLAN
<45,46> EC_RX_P80_CLK 2 51 52
R888 51 52
100_0402_1% 3 Q133
S
53 54 1
GNDGND +5VS
ACES_51711-0520W-001 AO3414_SOT23-3
@
G
2
2
1
For EC to detect ME@ @
R889 R1329
2
debug card insert. 100K_0402_5% 33K_0402_5% 2
2
2
1
D C921
MC74VHC1G08DFT2G SC70 5P FAST_BOOT# 2
<38,44,45> FAST_BOOT#
3
G 0.1U_0402_16V4Z
DEVICE_RST# 1 Q132 S 1 @
G
<19,38,44> DEVICE_RST#
3
A WL_RST# 2N7002_SOT23-3
4
BUF_PLT_RST# Y @
<18,23,38,44,45,49> BUF_PLT_RST# 2
B
P
@
U60
SSD Active:4.5W(1.5A)
5
+1.5VS_TV +3VS_TV
+3VS_SSD
1 1
+3VS +3VS +3VS_SSD 0.1U_0402_16V4Z 10U_0805_10V4Z C901 C902
1 2
R1343 0_0402_5%
J5
1 1 1 1
@
Mini-Express Card(TV) 4.7U_0805_10V4Z
TV@ 2
4.7U_0805_10V4Z
2 TV@
1 2
1 2 C566 C567 C568 C569
Mini-Express Card(SSD) JUMP_43X79 2 2 2 2 JP14
+3VS_TV +3VS
@ 1 2 +1.5VS_TV
JP3 0.01U_0402_25V7K 10U_0805_10V4Z 1 2 R1206 1
3 4 2 +3VS_TV
3 4
1 2 5 6 1
1 2 CLKREQ_TV# 5 6 0.1U_0402_16V4Z 33K_0402_5%
3 4 <15> CLKREQ_TV# 7 8 1
3 4 7 8 @ C912
5 6 9 10 TVSW@
5 6 9 10 C903
7 8 <15> CLK_PCIE_TV# 11 12
7 8 11 12 2 0.1U_0402_16V4Z
9 10 <15> CLK_PCIE_TV 13 14
9 10 13 14 2 TVSW@
11 12 15 16
5
11 12 15 16 U54
13 14 17 18
13 14 17 18
15 16 19 20 2
P
15 16 19 20 TV_RST# B
17 18 21 22 4
17 18 21 22 Y
19 20 <15> PCIE_PRX_DTX_N6 23 24 1 BUF_PLT_RST# <18,23,38,44,45,49>
19 20 23 24 A
G
0.01U_0402_16V7K 21 22 25 26
3 21 22 <15> PCIE_PRX_DTX_P6 25 26 3
SATA_DTX_C_IRX_P0 2 1 C572 SATA_DTX_IRX_P0 23 24 27 28 TVSW@
3
<14> SATA_DTX_C_IRX_P0 SATA_DTX_C_IRX_N0 2 23 24 27 28
1 C573 SATA_DTX_IRX_N0 25 26 29 30 NC7SZ08P5X_NL_SC70-5
<14> SATA_DTX_C_IRX_N0 25 26 29 30
27 28 <15> PCIE_PTX_C_DRX_N6 31 32
0.01U_0402_16V7K 27 28 31 32
29 30 <15> PCIE_PTX_C_DRX_P6 33 34
SATA_ITX_DRX_N0 29 30 33 34 NO_TVSW@
31 32 35 36
<14> SATA_ITX_DRX_N0
<14> SATA_ITX_DRX_P0 SATA_ITX_DRX_P0 33
35
31
33
35
32
34
36
34
36
+3VS_TV 37
39
35
37
39
36
38
40
38
40
USB20_N12
USB20_P12
<18>
<18>
0_0402_5% 1 2 R1207
TV SW
37 38 41 42
+3VS_SSD 37 38 41 42
39 40 43 44
39 40 @
100_0402_1% 43 44
41 42 45 46
41 42 R1209 45 46
43 44 47 48
43 44 EC_TX_P80_DATA 1 47 48
45 46 <45,46> EC_TX_P80_DATA 2 49 50
100_0402_1% 45 46 EC_RX_P80_CLK 1 49 50
47 48 <45,46> EC_RX_P80_CLK 2 51 52
EC_TX_P80_DATA R893 1 47 48 51 52
<45,46> EC_TX_P80_DATA 2 @ 49 50 R1208
EC_RX_P80_CLK 49 50
<45,46> EC_RX_P80_CLK 1 2 @ 51 52 @ 100_0402_1% 53 54
51 52 GNDGND
R894
100_0402_1% 53 54
GNDGND ACES_51711-0520W-001
DA_DSS 1 2 ACES_51711-0520W-001 ME@ +3VS +1.5VS
DA_DSS R895 0_0402_5%
SATA_DET# 1 2 ME@ +5VS AO3414_SOT23-3 AO3414_SOT23-3
<14> SATA_DET# R896 0_0402_5% Q118 Q119
2
@ TVSW@ D TVSW@ D
For SSD use:
2 R1204 2 R1205
R1203 G 0_0805_5% G 0_0402_5%
33K_0402_5% S NO_TVSW@ S NO_TVSW@
3
2
1
+3VS_TV +1.5VS_TV
<45> TV_POWER_OFF#
1
C900
0.1U_0402_16V4Z
TVSW@ 2
4
TV SW 4
Security Classification
2007/10/15
Compal Secret Data
2008/10/15 Title
Mini-Card
0.2
LA-6882P
A B C D E
5 4 3 2 1
MC74VHC1G08DFT2G SC70 5P http://hobi-elektronika.net
3
DEVICE_RST# 1
G
<19,37,44> DEVICE_RST# A LAN_RST#_R
Y 4
BUF_PLT_RST# 2 U27
<18,23,37,44,45,49> BUF_PLT_RST# B
P
@ +3V_LAN SM010005500 500ma 600ohm@100mhz DCR 0.38 +3V_LAN
U8 L30
5
42 20mil BLM18AG601SN1D_2P
R914 1 VDDO +LAN_BIASVDDH +LAN_BIASVDDH
2 0_0402_5% BIASVDDH 25 1 2
1
+3VS R1210 57780@ C585
SM010005500 500ma 600ohm@100mhz DCR 0.38 +1.2V_LAN LAN_XTALI_80 1 2 0_0402_5% LAN_XTALI 0.1U_0402_16V4Z
D
091211 EMI add 1000P XTALVDDH/XTALVDDH/XTALI
12
2 D
20mil 15 R1211 1 +LAN_XTALVDDH

2 0_0402_5% L28
+1.2V_LAN L29 VDDC 57781@ BLM18AG601SN1D_2P
1 1 1 1 1 1 41
VDDC 20mil
4.7U_0603_6.3V6K
C586
0.1U_0402_16V4Z
C587
0.1U_0402_16V4Z
C588
0.1U_0402_16V4Z
C589
1000P_0402_50V7K
C590
1000P_0402_50V7K
C591
BLM18AG601SN1D_2P +LAN_XTALVDDH 1 2
2 1 +LAN_PCIEPLLVDD 1
1 1 2 2 2 2 2 2 C592
C593 C594 30 +LAN_AVDDH 0.1U_0402_16V4Z
4.7U_0603_6.3V6K 0.1U_0402_16V4Z AVDDH 2
36
2 2 AVDDH L31
20mil BLM18AG601SN1D_2P
+LAN_AVDDH 1 2
27 AVDDL 1 1
+1.2V_LAN 20mil +LAN_AVDDL
33 AVDDL
L32 39 C595 C596
BLM18AG601SN1D_2P AVDDL 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 1 +LAN_GPHYPLLVDDL BCM57781 37 MDI3-
MDI3- <39>
2 2
TRD3_N MDI3+
1 1 TRD3_P 38 MDI3+ <39>
C597 C598 +LAN_GPHYPLLVDDL 24
4.7U_0603_6.3V6K 0.1U_0402_16V4Z GPHY_PLLVDDL MDI2-
TRD2_N 35 MDI2- <39>
34 MDI2+
2 2 TRD2_P MDI2+ <39>
31 MDI1-
TRD1_N MDI1+ MDI1- <39>
TRD1_P 32 MDI1+ <39>
+1.2V_LAN L33 +LAN_PCIEPLLVDD
20mil 18 PCIE_PLLVDDL MDI0-
BLM18AG601SN1D_2P 21 29
+LAN_AVDDL PCIE_PLLVDDL TRD0_N MDI0+ MDI0- <39>
2 1 28 MDI0+ <39>
TRD0_P
1 1
C599 C600
4.7U_0603_6.3V6K 0.1U_0402_16V4Z
C 57780@ C
2 2 R1212 2 ACTIVITY#
1 0_0402_5%
45 R1213 2 1 0_0402_5% LAN_SK#
SO#_LINKLED#/SO#_LINKLED#/TRAFFICLED# 57781@ LAN_SK# <39>
SPD100LED#/SPD100LED#/LINKLED# 48
<15> PCIE_PRX_DTX_P1 C601 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_P1 46 LAN_SK#

C602 1 PCIE_PRX_C_DTX_N1 SCLK_SPD1000LED#/SCLK_SPD1000LED#/SPD1000LED#
<15> PCIE_PRX_DTX_N1 2 0.1U_0402_16V7K 57781@
17 47 R1214 2 1 0_0402_5% ACTIVITY#
<15> PCIE_PTX_C_DRX_P1 PCIE_TXD_P TRAFFICLED#/TRAFFICLED#/SPD100LED# LAN_SK# ACTIVITY# <39>
16 R1215 2 1 0_0402_5%
<15> PCIE_PTX_C_DRX_N1 PCIE_TXD_N
22 3 57780@
R901 1 @ PCIE_RXD_P GPIO0/GPIO0/CLK_REQ#
+3V_LAN 2 4.7K_0402_5% 23 R913 1 @ 2 4.7K_0402_5% +3V_LAN
R902 1 @ LAN_PME# PCIE_RXD_N CLKREQ_LAN#
<16,37,49> PCIE_WAKE# 2 0_0402_5% 1 R1216 1 2 0_0402_5%
R903 1 WAKE#/WAKE#/LOW_PWR
<45> LAN_WAKE# 2 0_0402_5% 57780@
57781@ 6 R1287 1 57780@ 2 0_0402_5% LAN_WAKE# +3V_LAN
57781@ PERST#/PERST#/VDDC +3V_LAN
+1.2V_LAN LAN_RST#_R R904 1 2 0_0402_5% 20 R1218 1 @ 2 0_0402_5% PCIE_WAKE#
R1217 1 PCIE_REFCLK_P
2 0_0402_5% 19
PCIE_REFCLK_N
57781@
57780@ 4 R905 1 2 4.7K_0402_5% 1 @
SMB_CLK/TEST_1/WAKE# R906 1
SMB_DATA/TEST_2/MODE
5 2 4.7K_0402_5% C603
57781@ 0.1U_0402_16V4Z
<15> CLK_PCIE_LAN
2
R1219 1 2 0_0402_5% SPROM_DOUT @
<15> CLK_PCIE_LAN# 2
1K_0402_1%
R907
1K_0402_1%
R908
57780@
43 R1220 1 2 0_0402_5% SPROM_CLK
CS#_EECLK/CS#_EECLK/EEDATA 57781@
LAN_XTALI +3VS U28 @
1
44 R1221 1 2 0_0402_5% SPROM_DOUT 8 1
LAN_XTALO R909 1 SI#_EEDATA/SI#_EEDATA/EECLK VCC A0
2 1K_0402_5% 40 57781@ 7 2
LAN_RST#_R R1222 1 VMAIN_PRSNT SPROM_CLK SPROM_CLK WP A1
2 0_0402_5% 2
LOW_PWR/LOW_PWR/PERST#
R1223 1 2 0_0402_5% 6
SCL NC
3
57780@ 57780@ SPROM_DOUT 5 4
57780@ +1.2V_LAN SDA GND
+LAN_XTALVDDH R1224 1 2 0_0402_5% 40mil L34 AT24C02_SO8
2
1K_0402_1%
R910
B Y4 57781@ 4.7UH_PG031B-4R7MS_1.1A_20% @ B
1K_0402_1%
R911
25MHZ_20PF_7A25000012 LAN_XTALO R1225 2 1 200_0402_1% LAN_XTALO_81 14 11 +1.2V_LAN_OUT 1 2
LAN_XTALI R1226 1 LAN_XTALI_81 XTALO/XTALO/XTALVDDH SR_LX
2 0_0402_5% 13 8
57781@ XTALI/XTALI/XTALO SR_VFB
1 2 1 1
LAN_XTALO R1227 2 1 200_0402_1% 26
1
57780@ RDAC C604 C605
1 1
0.1U_0402_16V4Z 10U_0805_10V4Z
C608 C609 2 2
27P_0402_50V8J 27P_0402_50V8J
2 2
1 2 LAN_RDAC
R912 1.24K_0402_1% +3V_LAN
SPROM_CLK SPROM_DOUT
10 (EECLK) (EEDATA)
SR_VDDP
9
SR_VDD
1 1 On chip 1 0
C606 C607
R1228 1 2 0_0402_5% 7 4.7U_0603_6.3V6K 0.1U_0402_16V4Z AT24C02 1 1
<15> CLKREQ_LAN# CLK_REQ#/CLK_REQ#/DC
57781@
2 2
PAD
J11 @
49
2 1 JOPEN BCM57781A0KMLG_QFN48_6X6 57781@

+3VALW U27
+3V_LAN
BCM57781A0KMLG_QFN48_6X6
+5VALW
60mil
3 Q17
D
AO3414_SOT23-3 BCM57780
1
A @ 57780@ A
@
G
2
R234
33K_0402_5%
1 1
2
C583 C584
4.7U_0603_6.3V6K 0.1U_0402_16V4Z
2
2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
1
D C289 Issued Date 2008/08/10 Deciphered Date 2010/08/01 Title

FAST_BOOT# 2
<37,44,45> FAST_BOOT#
G
1
0.1U_0402_16V4Z
Broadcom BCM57781
Q18 S @ Size Document Number Rev
3
2N7002_SOT23-3 Custom 0.2
@
LA-6882P
5 4 3 2 1
5 4 3 2 1
D
Close to T49 D
T49
C280 2 1 0.01U_0402_16V7K 1 24 MCT3 R320 2 1 75_0402_5%
TCT1 MCT1
MDI3+ 2 1:1 23 MDO3+
<38> MDI3+ TD1+ MX1+
MDI3- 3 22 MDO3-
<38> MDI3- TD1- MX1-
C281 2 1 0.01U_0402_16V7K 4 21 MCT2 R321 2 1 75_0402_5%
TCT2 MCT2
MDI2+ 5 1:1 20 MDO2+
<38> MDI2+ TD2+ MX2+
MDI2- 6 19 MDO2-
<38> MDI2- TD2- MX2-
C282 2 1 0.01U_0402_16V7K 7 18 MCT1 R318 2 1 75_0402_5%
TCT3 MCT3
MDI1+ 8 1:1 17 MDO1+
<38> MDI1+ TD3+ MX3+
MDI1- 9 16 MDO1-
<38> MDI1- TD3- MX3-
C278 2 1 0.01U_0402_16V7K 10 15 MCT0 R319 2 1 75_0402_5%
C TCT4 MCT4 C
MDI0+ 11 1:1 14 MDO0+
<38> MDI0+ TD4+ MX4+
1
C129
Place close to TCT pin 1000P_1206_2KV7K
MDI0- 12 13 MDO0- 2
<38> MDI0- TD4- MX4-
LG-2446S-1
RJ45 Conn.
JRJ45
<38> LAN_SK# LAN_SK# R317 2 1 300_0402_5% 12
Green LED-
1
+3V_LAN 11
C279 GreenLED+
@68P_0402_50V8K MDO3- 8 16
2 PR4- SHLD2
15
C93 @ MDO3+ SHLD1
7
PR4+
2 1 470P_0402_50V7K
MDO1- 6
PR2-
For EMI.
MDO2- 5
ACTIVITY# PR3-
MDO2+ 4
B LAN_SK# PR3+ B
MDO1+ 3
PR2+
3
MDO0- 2
D68 PR1-
14
MDO0+ SHLD2
AZC199-02S.R7G C/C SOT23 1 13
PR1+ SHLD1
@ ACTIVITY# R574 2 1 300_0402_5% 10
<38> ACTIVITY# Yellow LED-
1
1 +3V_LAN 9
Yellow LED+
C610 SUYIN_100073HR012M25KZL
ESD request 68P_0402_50V8K ME@
2
@
A A

LAN Magnetic & RJ45
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
D D
+3VS REMOTE1+
Under VRAM
Close U29 SMSC thermal sensor 1
1
@ C
1
1
REMOTE1+
+3VS placed near by palmrest R920
C621
100P_0402_50V8J
2
B
Q86
MMST3904-7-F_SOT323-3
2 E
10K_0402_5%
3
C622 @ REMOTE1-
2200P_0402_50V7K U29
2
2 REMOTE1-
1 10 EC_SMB_CK2
VDD SMCLK EC_SMB_CK2 <15,23,45,50>
REMOTE1+ 2 9 EC_SMB_DA2
REMOTE2+ 2
DP1 SMDATA EC_SMB_DA2 <15,23,45,50>
REMOTE2+
Close to DDR
1 REMOTE1- 3 8 1
DN1 ALERT#
1
C625 @ C
C623 0.1U_0402_16V4Z REMOTE2+ 4 7 C624 2 Q87
2200P_0402_50V7K 1 DP2 THERM# 100P_0402_50V8J B MMST3904-7-F_SOT323-3
2 REMOTE2- REMOTE2- 2 E
5 6
3
DN2 GND REMOTE2-
F75303M MSOP 10P

REMOTE1,2+/-:
C Address 1001_101xb Trace width/space:10/10 mil C
Trace length:<8"
B B
+5VS FAN1 Conn

@ J16
1 1 2 2
JP4
JUMP_43X79
1 1
2 <45> EC_TACH 2 2
<45> EC_FAN_PW M 3 3
C626 4 4
10U_0805_10V4Z 5 G5
1
6 G6
ACES_85205-04001
ME@
A A
Security Classification Compal Secret Data Compal Electronics,Ltd.

EMC1403_Thermal sensor/FAN
Custom 0.2
LA-6882P
5 4 3 2 1
A B C D E F G H
1 1
SATA HDD Conn.

JHDD1
2 2
1 GND
SATA_ITX_DRX_P1 2
<14> SATA_ITX_DRX_P1
<14> SATA_ITX_DRX_N1 SATA_ITX_DRX_N1 3
A+
A-
SATA ODD Conn.
4 GND
SATA_DTX_C_IRX_N1 C627 1 2 0.01U_0402_16V7K SATA_DTX_IRX_N1 5
<14> SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1 C628 1 SATA_DTX_IRX_P1 B-
2 0.01U_0402_16V7K 6 B+
<14> SATA_DTX_C_IRX_P1 JODD1
7 GND
1
@ J13 SATA_ITX_DRX_P2_CONN GND
8 <14> SATA_ITX_DRX_P2_CONN 2
+3VS_HDD VCC3.3 SATA_ITX_DRX_N2_CONN A+
+3VS 1 2 9 <14> SATA_ITX_DRX_N2_CONN 3
1 2 VCC3.3 A-
10 4
VCC3.3 SATA_DTX_C_IRX_N2 C629 1 SATA_DTX_IRX_N2 GND
11 2 0.01U_0402_16V7K 5
JUMP_43X79 GND <14> SATA_DTX_C_IRX_N2 SATA_DTX_C_IRX_P2 C630 1 SATA_DTX_IRX_P2 B-
12 2 0.01U_0402_16V7K 6
GND <14> SATA_DTX_C_IRX_P2 B+
13 7
@ J12 GND GND
14
+5VS_HDD VCC5
+5VS 1 2 15
1 2 VCC5 R921 @ R710 1
16
VCC5 2 0_0402_5% 8
DP
JUMP_43X79 17 +3VS 1 2 +5V_ODD 9
GND 10K_0402_5% +5V
18 10
Reserved ODD_DA# +5V
19 1 2 11
GND <18,45> ODD_DA# R922 0_0402_5% MD
20 12 15
VCC12 GND GND
21 23 13 14
+5VS +3VS VCC12 GND GND GND
22 24
VCC12 GND
OCTEK_SLS-13PNAB
1 1 1 1 1 1 OCTEK_SAT-22HTAB ME@
@ ME@
C631 C632 C633 C634 C635 C636
1000P_0402_50V7K 0.1U_0402_16V4Z 1U_0603_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2
3 ODD Power Control 3
@ J6
1 2
1 2
JUMP_43X79 +5V_ODD
+5VS Q88
D
3 1
1
1
AO3413_SOT23-3
C637
G
2
R923 0.1U_0402_16V4Z
10K_0402_5% 2
1
2
C638
0.01U_0402_16V7K
1 R1110 2 1 2 C639
100K_0402_5% 10U_0805_10V4Z
1
2
OUT
<19> ODD_EN 2
IN GND
Q89
DTC124EKAT146_SC59-3
3
4 4

HDD/ODD Connector
B 0.2
LA-6882P
A B C D E F G H
5 4 3 2 1
Adjustable Output
J8
2
@
1
HDA_RST_AUDIO#
HDA_SYNC_AUDIO
EMI http://hobi-elektronika.net
+3VS +3VDD_CODEC
+5VDDA_CODEC
+5VAMP HDA_SDOUT_AUDIO R925

+5VS JOPEN 1 2
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 @ 2 HDA_BITCLK_AUDIO CHB1608U301_0603 1 1 1 1
10U_0805_10V4Z
0.1U_0402_16V4Z
U30
C646
C647
C648
C649
R924 R926 33_0402_5% 1 1
+5VDDA_CODEC
C644
C645
2 1 1 5503@
CHB1608U301_0603 IN
5 1 1 1 1
OUT 2 2 2 2
2
GND 2 2
C650
C651
C652
C653
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
10U_0805_10V4Z
0.1U_0402_16V4Z
1 1 3 4 1 1
SHDN BYP 2 2 2 2
C640
Place near Pin9

G9191-475T1U_SOT23-5 @ @ @ @ Place near Pin25 Place near Pin38
C642
C643
0.01U_0402_16V7K
4.7U_0805_10V4Z
Place near Pin1 +5VDDA_CODEC +3VDD_CODEC +IOVDD_CODEC
2 2 2 2
C641
D
1 2 +3VS D
0_0402_5% R927
1 2 +1.5VS
0_0402_5% @ R928
4.75V LDO
10U_0805_10V4Z
0.1U_0402_16V4Z
1 1
+MIC1_VREFO_L
C654
C655
+3VS 2 2
Adjustable Output
25
38
9
U32
R929 U31
AVDD1
AVDD2
DVDD
DVDD_IO
2
2
2 1 1 +12VDD_CODEC
CHB1608U301_0603 IN D22
5
5503@ OUT D23
2
GND RB751V_SOD323 C_LINE_OUTL C660 LINE_OUTL
14 35 1 2 0.1U_0603_25V7K
10U_0805_10V4Z
0.1U_0402_16V4Z
LINE2-L LOUT1_L LINE_OUTL <43>

1 1 3 4 1 1 RB751V_SOD323 Internal Speaker
1
SHDN BYP C_LINE_OUTR C661 2 0.1U_0603_25V7K LINE_OUTR
C656
15 36 1 LINE_OUTR <43>
LINE2-R LOUT1_R
C658
C659
5503@ 5503@ G9091-120T11U_SOT23-5 Vendor recommend. 2.2K
0.01U_0402_16V7K
4.7U_0805_10V4Z
2
5503@ 16 39
2 2 5503@ 2 2 MIC2_L LOUT2_L
C657
5503@ R930 R931 (FBMA-L10-160808-800LMT) COPMAL PN:SM01000DI00

2.2K_0402_5% 2.2K_0402_5% 17 41
MIC2_R LOUT2_R
Vendor recommend. 4.7u 23 48 SPDIF 1 2 SPDIF
SPDIF_OUT <43>
1
LINE1_L SPDIFO1 0_0402_5% R932
24 45
LINE1_R SPDIFO2
1.2V LDO for ALC5503 only.
1 2 4.7U_0603_6.3V6K 1 2 C662 MIC_EXTL_C 21 33 HPOUT_L 2 1
<43> EXT_MIC_L MIC1_L HPOUT_L HP_OUTL <43>
1K_0402_5% R933 63.4_0402_1% R934 Headphone
1 2 4.7U_0603_6.3V6K 1 2 C663 MIC_EXTR_C 22 32 HPOUT_R 2 1
<43> EXT_MIC_R MIC1_R HPOUT_R HP_OUTR <43>
1K_0402_5% R935 63.4_0402_1% R936
+3VS Add 64 ohm serial resistor to avoid ESD
external MIC PC_BEEP 12 37
BEEP_IN MONO_OUT
L66
1
HDA_BITCLK_AUDIO 6 46 DMIC_CLK_R 1 2
<14> HDA_BITCLK_AUDIO BITCLK DMIC_CLK1/2 DMIC_CLK <34>
R331
C 4.7K_0402_5% HDA_SDOUT_AUDIO 5 44 FBMA-10-100505-301T_0402 C
<14> HDA_SDOUT_AUDIO SDATA_OUT DMIC_CLK3/4
@
HDA_SDIN0 1 R938 2 SDATA_IN 8 20 (FBMA-10-100505-301T 0402 ) COPMAL PN:SM01000CY00
<14> HDA_SDIN0
2
33_0402_5% SDATA_IN LINE2_VREFO

HDA_RST_AUDIO# 11 18 For EMI request.
<14> HDA_RST_AUDIO# RESET# LINE1_VREFO
HDA_SYNC_AUDIO 10 28
<14> HDA_SYNC_AUDIO SYNC MIC1_VREFO +MIC1_VREFO_L
2
19
C822 DMIC_DATA MIC2_VREFO
<34> DMIC_DATA 2
GPIO0/DMIC_DATA1/2 CPVREF
100P_0402_50V8J 31 1 2
1 CPVREF C664 2.2U_0603_6.3V6K
@ 3
GPIO1/DMIC_DATA3/4 VREF
27
SENSEA VREF
MIC Sense <43> MIC_JD
20K_0402_1%
2 1
R939
13
SENSE A JDREF
40
10U_0805_10V4Z
0.1U_0402_16V4Z
Reserve for EMI. R939 place near pin13 <43> PLUG_IN 2 1 SENSEB 34
JDREF
1 2 C928
1
SENSE B CBN
C667
C665
Capless HP Sense 5.1K_0402_1% R940 30 1 2
EAPD_R CBN R942 0.1U_0402_16V4Z
1 2 47
R940 place near pin34 <45> EAPD
0_0402_5% R941 EAPD
CBP
29 CBP 1 2 20K_0402_1% C929
43 C666 2.2U_0603_6.3V6K 2 1 1 2
NC 0.1U_0402_16V4Z
2
4 26
DVSS AVSS1 C913
7 42
DVSS AVSS2
1 2
+5VDDA_CODEC 0.1U_0402_16V4Z
ALC272-VA2-GR_LQFP48 Place near Pin27 C914
272@ 1 2
0.1U_0402_16V4Z
R943
Pin Assignment Location Function 1 2
0_0402_5%
36
56
35
52
1
U33 R944
LINE-OUT (Pin35/36) Internal Int Speaker 1 2
AVSS1
AVSS2
AVDD1
AVDD2
VDMIC-CLK
VDMIC-DATA
0_0402_5%
Capless HP-OUT (Pin32/33) External Headphone out R945

B
1 2 B
58 0_0402_5%
DMIC_CLK34 DMIC_CLK_R
DMIC_CLK12
60 LINE1 (Pin23/24) External Line in
30 R946
LINE1_R
29 51 1 2
LINE1_L MONO_OUT 0_0402_5%
MCLKO
63 MIC1(Pin21/22) External Mic in
21
LINE2_R HDA_BITCLK_AUDIO
20 8
LINE2_L BCLK HDA_SYNC_AUDIO
MIC_EXTR_C SYNC
12 MIC2(Pin16/17) Internal Internal Mic GND GNDA
28
MIC_EXTL_C MIC1_R
27 59
MIC1_L SPDIF_OUT2 SPDIF
62
SPDIF_OUT +3VS
23
MIC2_R
PC Beep
1
22
MIC2_L HPOUT_L
43
CBP HPOUT_L HPOUT_R R947
39 42
CBN CBP HPOUT_R 10K_0402_1%
40
CBN
2
SENSEB 44 7 HDA_SDOUT_AUDIO 2 1C668
SENSEA SENSE B SDATA_OUT SDATA_IN
19 10
SENSE A SDATA_IN
1
1U_0603_10V4Z
C_LINE_OUTL 45
C_LINE_OUTR FRONT_L R948
46 5
FRONT_R GPIO1/DMIC-DATA34 DMIC_DATA 10K_0402_1%
4
GPIO0/DMIC-DATA12 +3VDD_CODEC C669 1U_0603_10V4Z
+MIC1_VREFO_L 38
2
VREFO-B
26 1 2PC_BEEP1 2 1 PC_BEEP
VREFO-E R949 20K_0402_5%
25
VREFO-F @
24 49 2 1
VREF VREFO-C VGPIO5/VOL-MUTE/TDO R322 @ 10K_0402_5%
37 50 2 1 EC Beep
1
VREF VGPIO4/VOL-UP/TCLK R323 @ 10K_0402_5% C670 C
47 2 1 R950
VGPIO3/TDI/VOL-DN
2
34 R324 2 @ 1 10K_0402_5% <45> BEEP# 2 1 1 2 2 Q90
VGPIO2/TMS R326 @ 10K_0402_5% C94 B R951
32 2 1 1 2SC2411KT146_SOT23-3
VGPIO1 R328 @ 10K_0402_5% 560_0402_5% E
55 31 2 1 1 2 20K_0402_5%
3
SURR-R VGPIO0/TRST# R327 10K_0402_5% +12VDD_CODEC C671 1U_0603_10V4Z
53
SURR-L 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z @
1
CPVREF 41 2
JDREF CPVEE
54 64 C672
EAPD_R JDREF DVDD-12
61 33 R952
EAPD DVDD-12
A 16 <14> HDA_SPKR 2 1 1 2 A
DVDD-12
11 +IOVDD_CODEC
DVDD-IO
1
HDA_RST_AUDIO# 1U_0603_10V4Z 560_0402_5%
13 3 +3VDD_CODEC ICH Beep
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PC_BEEP RESETB DVDD-33 D45 @

14 1 1 1 R953
PCBEEP IN
C673
C674
C675
RB751V_SOD323
10K_0402_5%
9 57
2
DVSS-IO NC 2 2 2
6 48
DVSS NC
18
NC
65 17
THERMAL PAD NC
15
NC
Place near Pin 16,33,64 Security Classification Compal Secret Data Compal Electronics,Ltd.
ALC5503_QFN64_9X9 2008/03/25 2008/04/ Title
5503@
HD Audio Codec_ALC272
C 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net EXT_MIC_L-2
EXT_MIC_R-2
2
D69
wide 25MIL JSPK1 L37
ZEN ROW PJDLC05C 3P C/A SOT23
SPK_R1- 1 R1280 2 0_0805_5% SPK_R1-_CONN 1 EXT_MIC_L 1 2 EXT_MIC_L-2 @

1 <42> EXT_MIC_L
SPK_R2+ 1 R1281 2 0_0805_5% SPK_R2+_CONN 2
1
SPK_L1- R1282 0_0805_5% SPK_L1-_CONN 2 FBMA-L10-160808-121LMT_2P
1 2 3 3
SPK_L2+ R1283 0_0805_5% SPK_L2+_CONN
1 2 4
5
4 1 1 ESD request
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
D D
GND C676 @ C677
1 1 1 1 6 GND
C678
C679
C680
C681
47P_0402_50V8J 10P_0402_50V8J
ACES_87212-04G0 2 2
Audio Jack
@ 2 @ 2 @ 2 @ 2 GNDA GNDA
ME@
L40 MIC IN
EXT_MIC_R 1 2 EXT_MIC_R-2
<42> EXT_MIC_R
FBMA-L10-160808-121LMT_2P
1 1
SPK_R1-_CONN SPK_L1-_CONN HP_OUTR C682 @ C683 JMIC1
47P_0402_50V8J 10P_0402_50V8J 1
SPK_R2+_CONN SPK_L2+_CONN HP_OUTL 2 2
2
6 GND 7
GNDA GNDA 3 GND 8
2
GND 9
<42> MIC_JD MIC_JD 4 GND 10
@ @ @
1 GNDA 5
D59 D60 D61
PACDN042Y3R_SOT23-3 PACDN042Y3R_SOT23-3 PACDN042Y3R_SOT23-3 10P_0402_50V8J C684 SUYIN_010168FR006G576ZL
1
1
@ ME@
2
GNDA
220P_0402_50V7K 220P_0402_50V7K
Reserve for ESD request.
2
C C
C685 C686
1
Headphone
1
@ R954 @ R955
1K_0402_5% 1K_0402_5%
2
GNDA
JHP1
1 1
HP_OUTR L41 1 2 PR-OUT 2
<42> HP_OUTR 2
FBMA-L10-160808-121LMT_2P
HP_OUTL L42 1 2 PL-OUT 3
<42> HP_OUTL 3
FBMA-L10-160808-121LMT_2P
4 4
<42> PLUG_IN PLUG_IN 5 5

6 6
DRIVE
+5VS 7 7 IC
SPDIF_OUT 8 9
<42> SPDIF_OUT 8 GND
+5VAMP +3VALW 10
GND
1
1 SINGA_2SJ-A373-H03
C688 ME@
2
W=40mil 220P_0402_50V7K C687
2
B U34 R956 0.1U_0402_16V4Z B
2
10K_0402_5%
16 12 @
VDD NC
6
1
PVDD
15 PVDD AMP_OFF# R957 1
GAIN0 GAIN1
SHUTDOWN 19 2 EC_MUTE# EC_MUTE# <45>
0_0402_5% 0 0 6dB
GAIN0 2 GAIN0 SPK_L1-
0 1 10dB
LOUT- 8
GAIN1 3 GAIN1
1 0 15.6dB
14 SPK_R1-
ROUT- 1 1 21.6dB
4 SPK_L2+
LOUT+
LINE_OUTL C926 1
20mil
<42> LINE_OUTL 2 0.033U_0402_16V7K LIN 5 LIN- ROUT+ 18 SPK_R2+ +5VAMP +5VAMP
LINE_OUTR C927 1 2 0.033U_0402_16V7K RIN 17

<42> LINE_OUTR RIN-
GND 1
2
9 LIN+ GND 11
1
R960 R961 13 @ R962 R963

GND 100K_0402_1% 100K_0402_1%
7 RIN+ GND 20
10K_0402_5%
10K_0402_5%
1 GND 21
@ @
2 1
2 1
C691 10 1 GAIN0 GAIN1
2
BYPASS
0.1U_0603_25V7K
1
2 C695 R965 R966
C692 TPA6017A2PW PR_TSSOP20 4.7U_0805_10V4Z 100K_0402_1% 100K_0402_1%
2 @
0.1U_0603_25V7K
2
1
A A

AMP,Audio speaker CONN
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
+CRD_POWER
(20mil)
+CRD_POWER
600mA
1 JREAD1 (20mil)
D C696 22 11 D
XD-VCC SD4-VDD
MS9-VCC 18
10U_0805_10V4Z MDIO0 30 (20mil)
2 MDIO1 XD10-D0 SD_CLK
29 9 1
0.1U_0402_16V4Z
MDIO2 XD11-D1 SD5-CLK MDIO0
Close to CONN. 28 4 1
0.1U_0402_16V4Z
MDIO3 XD12-D2 SD7-DAT0 MDIO1
C700
1 27 3
0.1U_0402_16V4Z
MC74VHC1G08DFT2G SC70 5P MDIO8 XD13-D3 SD8-DAT1 MDIO2
C701
26 XD14-D4 SD9-DAT2 21
3
MDIO9 MDIO3 2
C697
25 XD15-D5 SD1-DAT3 19
DEVICE_RST# MDIO10 MDIO4 2
1 24 16
G
<19,37,38> DEVICE_RST# A 2 XD16-D6 SD2-CMD
4 CARD_RST# MDIO11 23 1 SD_CD#
BUF_PLT_RST# Y XD17-D7 SD-CD MDIO6
<18,23,37,38,45,49> BUF_PLT_RST# 2 B SD-WP 2
P
@ MDIO4 33
U9 MDIO6 XD07-WE
32 6
5
MDIO14 XD08-WP SD6-VSS
34 XD06-ALE SD3-VSS 13
XD_CD# 39
MDIO13 XD01-CD
38 XD02-R/B
MDIO12 37
+3VS XD_CLK XD03-RE MS_CLK
36 XD04-CE MS8-SCLK 17
MDIO7 35 10 MDIO0
XD05-CLE MS4-DATA0 MDIO1
1 2 MS3-DATA1 8
R1344 0_0402_5% 31 12 MDIO2
XD GND MS5-DATA2 MDIO3
40 XD GND MS7-DATA3 15
U35 14 MS_CD#
MS6-INS MDIO4
MS2-BS 7
CLK_PCIE_CARD_PCH# 3 5 +1.8VS_CARD 108mA 5
<15> CLK_PCIE_CARD_PCH# APCLKN APVDD MS1-VSS
CLK_PCIE_CARD_PCH 4 10 (20mil) 41 20
<15> CLK_PCIE_CARD_PCH APCLKP APV18 SD CD/WP GND MS10-VSS
NC/TAV33 36 42 SD CD/WP GND
<15> PCIE_PTX_C_DRX_N5 9 APRXN
8 19 +3VS_CARD T-SOL_144-1300002600_NR
<15> PCIE_PTX_C_DRX_P5 APRXP DV33
20 (40mil) 45mA ME@
C698 2 DV33
<15> PCIE_PRX_DTX_N5 1 0.1U_0402_10V7K PCIE_PRX_C_DTX_N5 11 APTXN DV33 44
C699 2 1 0.1U_0402_10V7K PCIE_PRX_C_DTX_P5 12 18 +1.8VS_CARD
C <15> PCIE_PRX_DTX_P5 APTXP DV18 C
DV18 37 (20mil)
X7R type 1 R968 2 APREXT 7
12K_0402_1% APREXT MDIO0
(12mil) MDIO0 48
47 MDIO1 @
MDIO1 MDIO2 SD_CLK R1009 @ C703 1
43 SDDV/MDIO4 MDIO2 46 2 1 2
1 39 45 MDIO3
TXIN/NC MDIO3 MDIO4 100_0402_5% 100P_0402_50V8J
MDIO6/4 41
C702 42 MDIO5_R 1 2 R969 SD_CLK @
2.2U_0603_6.3V6K MDIO5 MDIO6 0_0402_5% MS_CLK R1036 @ C765 1
24 2 1 2
2 JMB389 G/MDIO6
MDIO7 40 MDIO7 1 2 R1014 MS_CLK
29 MDIO8 0_0402_5% 100_0402_5% 100P_0402_50V8J
BUF_PLT_RST# MDIO8
2 R970 1 CARD_RST# 1 XRSTN MDIO9 28 MDIO9 1 2 R1029 XD_CLK @
<18,23,37,38,45,49> BUF_PLT_RST# GND 2 27 MDIO10 0_0402_5% XD_CLK R1051 2 @ 1 C821 1 2
100_0402_5% @ XTEST MDIO10 MDIO11
1 MDIO11 26
C704 25 MDIO12 100_0402_5% 100P_0402_50V8J
0.1U_0402_16V4Z MDIO12 MDIO13
<15> CPPE# 13 CPPE_N MDIO13 23 Close to IC
XD_CD# 14 22 MDIO14
2 CR1_CD2N MDIO14
Close to connector for EMI request.
NC/SPI_SCK 30
MS_CD# 15 33
SD_CD# CR1_CD1N NC/SPI_CSN
Reserve RC for old IC ESD problem 16 CR1_CD0N NC/SPI_SO 34
JMB389 has internal RC. NC/SPI_SI 35
17 CR1_PCTLN
6 +1.8VS_CARD +1.8VS_CARD +3VS_CARD
APGND
+CRD_POWER NC/GND 31
21 CR1_LEDN NC/GND 32
NC/GND 38
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 1 1 1 1 1 1
1000P_0402_50V7K
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
JMB389-LGAZ0C_LQFP48_7X7 C709 C710
B B
C705
C706
C707
C708
C711
C712
C713
C714
0.1U_0402_16V4Z 10U_0805_10V4Z
LQFP48 Package 2 2 2 2 2 2 2 2 2 2
@ Close to pin 37 Close to pin 18 @
Close to pin10
Close to pin 19,20 Close to pin 36
R973 Close to pin5->1000P->0.1u->10u
+3VS 2 1 Close to pin 44
0_0603_5% +CRD_POWER
+3VS_CARD
3 Q19
D
1
+5VS XD_CD# MDIO6 1 R971 2
AO3414_SOT23-3 1K_0402_5%
@
G
2
1
@ SD_CD# MDIO13 1 R972 2

R266 1K_0402_5%
33K_0402_5% 1 1
C715 C716
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z
@ 2 @ 2
2
1
D C290
FAST_BOOT# 2
<37,38,45> FAST_BOOT#
G 0.1U_0402_16V4Z
Q20 S 1 @
3
2N7002_SOT23-3
A @ A

Carder JMB389
Custom 0.2
LA-6882P
5 4 3 2 1
+3VALW
+EC_AVCC +3VALW
1 1 1 1 1 1
2
0.1U_0402_16V4Z
C717
0.1U_0402_16V4Z
C718
0.1U_0402_16V4Z
C719
0.1U_0402_16V4Z
C720
1000P_0402_50V7K
C723
1000P_0402_50V7K
C724
L43 1 2
+3VALW +EC_AVCC
FBM-11-160808-601-T_0603 2 1 R974
C721 10K_0402_5%
C722 2 2 2 2 2 2
0.1U_0402_16V4Z
111
125
1000P_0402_50V7K
22
33
96
67
1
9
1 2 1 ECAGND 2 U36 BRDID
L44 FBM-11-160808-601-T_0603
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
2
R977
1 2 @ 10K_0402_5%
TP_LED# LED_KB_PWM <50>
1 21 R1341 0_0402_5%
<19> GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F TP_LED# <47>
KB_RST# 2 23 BEEP#
1
<19> KB_RST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 LED_KB_PWM_R BEEP# <42>
<14> SERIRQ 3 26 1 2 PCH_DPWROK <16>
SERIRQ# FANPWM1/GPIO12 ACOFF R1333 0_0402_5%
<14,37> LPC_FRAME# 4 27 ACOFF <52,54>
LPC_AD3 LFRAME# ACOFF/FANPWM2/GPIO13
<14,37> LPC_AD3 5 @
LPC_AD2 LAD3
<14,37> LPC_AD2 7
LAD2 PWM Output +3VS 6/19 Add BRDID
LPC_AD1 8 63 BATT_TEMP
<14,37> LPC_AD1 LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <53>
LAD0 LPC & MISC
<14,37> LPC_AD0 10 64 SG_SW# <49>
BATT_OVP/AD1/GPIO39
1
2 1 2 1 65 +3VS
ADP_I/AD2/GPIO3A ADP_I <53,54>
@ C726 22P_0402_50V8J @ R976 10_0402_5% 12 AD Input 66
<18> CLK_PCI_LPC PCICLK AD3/GPIO3B BRDID IMVP_IMON <60>
13 75 R1298
<18,23,37,38,44,49> BUF_PLT_RST# PCIRST#/GPIO05 AD4/GPIO42
1
1 2 EC_RST# 37 76 EC_SB_CS0# 2 1 SPI_SB_CS0#_R 10K_0402_5%
+3VALW EC_SCI# ECRST# SELIO2#/AD5/GPIO43 SPI_SB_CS0#_R <14>
R978 47K_0402_5% 20 0_0402_5% R1347
2
<19> EC_SCI# SCI#/GPIO0E ESB_INT
2 38 @ R975
<49> SG_SW_LED# CLKRUN#/GPIO1D EC_BATT
68 10K_0402_5%
DAC_BRIG/DA0/GPIO3C FAST_BOOT# EC_BATT <50>
C725 70 +3VALW @
2
EN_DFAN1/DA1/GPIO3D IREF FAST_BOOT# <37,38,44> EC_FAN_PWM
0.1U_0402_16V4Z DA Output 71
1 IREF/DA2/GPIO3E IREF <54>
KSI0 55 72 +3VALW
KSI1 KSI0/GPIO30 DA3/GPIO3F CHGVADJ <54>
56 KSI1/GPIO31
KSI2 57 EC_MUTE# R979 1 2 10K_0402_5% +5VS
KSO[0..17] KSI3 KSI2/GPIO32
<46> KSI3 58 KSI3/GPIO33 PSCLK1/GPIO4A 83 EC_MUTE# <43>
<46> KSO[0..17] KSI4 59 84 USB_ON# USB_ON# R980 1 2 10K_0402_5% TP_CLK R981 1 2 4.7K_0402_5%
KSI[0..7] <46> KSI4 KSI5 KSI4/GPIO34 PSDAT1/GPIO4B ESB_INT USB_ON# <48,49>
60 KSI5/GPIO35 PSCLK2/GPIO4C 85 ESB_INT <50>
<46> KSI[0..7] KSI6 61 PS2 Interface 86 TP_DATA R982 1 2 4.7K_0402_5%
KSI7 KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK CMOS_OFF# <34>
62 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E 87 TP_CLK <46>
+3VALW KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <46>
R983 1 2 47K_0402_5% KSO1 KSO1 40 KSO1/GPIO21
KSO2 41 BATT_TEMP 1 2
KSO2/GPIO22
R984 1 2 47K_0402_5% KSO2 KSO3 42 KSO3/GPIO23 SDICS#/GPXOA00 97 ACOVER_OFF# <50>
C727 100P_0402_50V8J
KSO4 43 98 TV_POWER_OFF# ACIN 1 2
KSO5 KSO4/GPIO24 SDICLK/GPXOA01 TV_POWER_OFF# <37>
+3VALW C728 100P_0402_50V8J
ENE UPDATE 08/10/21 KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW#
ME_FLASH <14>
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# <46>
KSO7 46 SPI Device Interface FRD#SPI_SO 2 1
+3VS +3VALW KSO8 KSO7/GPIO27 100K_0402_1%@ R985
47 KSO8/GPIO28
KSO9 48 119 FRD#SPI_SO
KSO9/GPIO29 SPIDI/RD# FRD#SPI_SO <47>
R986 EC_SMB_CK1 KSO10 49 120 FWR#SPI_SI FSEL#SPICS# 2 1
KSO11 KSO10/GPIO2A SPIDO/WR# SPI_CLK FWR#SPI_SI <47>
2.2K_0402_5% 50 SPI Flash ROM 126 100K_0402_1%@ R987
KSO12 KSO11/GPIO2B SPICLK/GPIO58 FSEL#SPICS# SPI_CLK <47>
51 KSO12/GPIO2C SPICS# 128 FSEL#SPICS# <47>
R988 R989 R990 EC_SMB_DA1 KSO13 52
2.2K_0402_5% KSO14 KSO13/GPIO2D
2.2K_0402_5% 2.2K_0402_5% 53 KSO14/GPIO2E
KSO15 54 73 H_PROCHOT#_EC R1285
KSO16 KSO15/GPIO2F CIR_RX/GPIO40 H_PECI_R R991 1
81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74 2 43_0402_1% H_PECI <6,19>
0_0402_5%
EC_SMB_CK2 KSO17 82 89 <53,60> VR_HOT# VR_HOT# 2 1 H_PROCHOT# <6>
EC_SMB_DA2 KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 CHARGE_LED0# FSTCHG <54>
90 CHARGE_LED0# <47>
BATT_CHGI_LED#/GPIO52 CAPS_LED# R1286
1 1 91 CAPS_LED# <50>
@ @ EC_SMB_CK1 CAPS_LED#/GPIO53 0_0402_5%
<53> EC_SMB_CK1 77
SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54
92 PWR_LED# <47,50>
C729 C730 EC_SMB_DA1 78 93 CHARGE_LED1# H_PROCHOT#_EC 2 1
<53> EC_SMB_DA1 EC_SMB_CK2 SDA1/GPIO45 SUSP_LED#/GPIO55 SYSON CHARGE_LED1# <47>
100P_0402_50V8J 100P_0402_50V8J 79 SM Bus 95
2 2 <15,23,40,50> EC_SMB_CK2 EC_SMB_DA2 SCL2/GPIO46 SYSON/GPIO56 SYSON <49,51,56>
<15,23,40,50> EC_SMB_DA2 80 121 VR_ON <60>
SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 ACIN
127 ACIN <16,54>
AC_IN/GPIO59
<16> SLP_S3# 6 100 EC_RSMRST# <16>

+3VS PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_LID_OUT#
<16> SLP_S5# 14 101 EC_LID_OUT# <15>
EC_SMI# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_ON @
<19> EC_SMI# 15 102 EC_ON <50,55>
CPU1.5V_S3_GATE EC_SMI#/GPIO08 EC_ON/GPXO05 D46 RB751V_SOD323
<10> CPU1.5V_S3_GATE 16 103 ESB_RST# <50>
LID_SW#/GPIO0A EC_SWI#/GPXO06
1
ESB_CLK 17 104 PCH_POK_EC 1 2 PCH_POK

<50> ESB_CLK ESB_DAT SUSP#/GPIO0B ICH_PWROK/GPXO06 BKOFF# PCH_POK <16>
<50> ESB_DAT 18
PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08
105 BKOFF# <34>
R992 SUSWARN# 19 GPIO 106 RF_LED# 1 2 1 2
<16> SUSWARN# EC_PME#/GPIO0D WL_OFF#/GPXO09 RF_LED# <47> +3VS
10K_0402_5% INVT_PWM 25 107 PCH_APWROK <16> R993 0_0402_5% R994 10K_0402_5%
<34> INVT_PWM EC_THERM#/GPIO11 GPXO10
EC_TACH 28 108 SA_PGOOD <57> @
2
EC_TACH <40> EC_TACH ODD_DA# FAN_SPEED1/FANFB1/GPIO14 GPXO11

<18,41> ODD_DA# 29
EC_TX_P80_DATA FANFB2/GPIO15
<37,46> EC_TX_P80_DATA 30
EC_RX_P80_CLK EC_TX/GPIO16
<37,46> EC_RX_P80_CLK 31 110 SLP_S4# <16>
EC_RX/GPIO17 PM_SLP_S4#/GPXID1 +3VALW
<50> ON/OFF# 32 112 ENBKL <34>
EC_FAN_PWM ON_OFF/GPIO18 ENBKL/GPXID2
<40> EC_FAN_PWM 34 114 EAPD <42>
PWR_LED#/GPIO19 GPXID3 NOVO#
<50> NUM_LED# 36
NUMLED#/GPIO1A GPI GPXID4
115 NOVO# <50>
2
116 SUSP#
GPXID5 PBTN_OUT# SUSP# <10,51,56,57,58,59>
117 R995
GPXID6 PBTN_OUT# <16>
118 10K_0402_5%
EC_RTCX1 122 GPXID7
SUSCLK_R 123 XCLK1
2 1 124
1
<16> SUSCLK XCLK0 V18R
0_0402_5% R996 1
AGND
GND
GND
GND
GND
GND
100K_0402_5%
C731
2
1 4.7U_0805_10V4Z 2 1
R139 C815 KB930QF A1 LQFP 128P 2 0_0402_5% R997 LAN_WAKE# <38>
11
24
35
94
113
69
20P_0402_50V8
2 1
2
ECAGND
0_0402_5%@ R999
1
EC_PME#
S
1 3
PCI_PME# <18>
Q91@
2N7002_SOT23
G
2
+3VALW
+3VS
EC_RTCX1 R1299
1 2 ESB_CLK
1 2 SUSCLK_R 4.7K_0402_5%
R1000 10M_0402_5% R1300
@ 1 2 ESB_DAT
4.7K_0402_5%
32.768KHZ_12.5PF_1TJS125DJ4A420P
1
C732 C733
15P_0402_50V8J
Y5
OUT
IN
15P_0402_50V8J
2 2
NC
NC
@ @ @
1 1
2

BIOS & EC I/O Port
09/11 Unstuff Custom 0.2
LA-6882P
5 4 3 2 1
JP5
1
INT_KBD Conn. 2
1
2 EC DEBUG PORT
3 3
KSI[0..7] 4
KSI[0..7] <45> 4
KSO17 5
KSO[0..17] KSO16 5
D KSO[0..17] <45> 6 6 D
KSO15 7
KSO10 7 JP6
8 8
KSO11 9 +3VALW 1
KSO2 C734 1 9 1
2 @ 100P_0402_50V8J KSO1 C735 1 2 @ 100P_0402_50V8J KSO14 10 10 <37,45> EC_TX_P80_DATA
EC_TX_P80_DATA 2 2
KSO13 11 EC_RX_P80_CLK 3
11 <37,45> EC_RX_P80_CLK 3
KSO15 C736 1 2 @ 100P_0402_50V8J KSO7 C737 1 2 @ 100P_0402_50V8J KSO12 12 4
KSO3 12 4
13 13
KSO6 C738 1 2 @ 100P_0402_50V8J KSI2 C739 1 2 @ 100P_0402_50V8J KSO6 14 ACES_85205-0400
KSO8 14
15 15 ME@
KSO8 C740 1 2 @ 100P_0402_50V8J KSO5 C741 1 2 @ 100P_0402_50V8J KSO7 16
KSO4 16
17 17
KSO13 C742 1 2 @ 100P_0402_50V8J KSI3 C743 1 2 @ 100P_0402_50V8J KSO2 18
KSI0 18
19 19
KSO12 C744 1 2 @ 100P_0402_50V8J KSO14 C745 1 2 @ 100P_0402_50V8J KSO1 20
KSO5 20
21 21
KSO11 C746 1 2 @ 100P_0402_50V8J KSI7 C747 1 2 @ 100P_0402_50V8J KSI3 22
KSI2 22
23 23
KSO10 C748 1 2 @ 100P_0402_50V8J KSI6 C749 1 2 @ 100P_0402_50V8J KSO0 24
KSI5 24
25 25
KSO3 C750 1 2 @ 100P_0402_50V8J KSI5 C751 1 2 @ 100P_0402_50V8J KSI4 26
KSO4 C752 1 2 @ 100P_0402_50V8J KSI4 C753 1 2 @ 100P_0402_50V8J

KSO9
KSI6
27
28
26
27 Lid Switch
KSI7 28
29 29 G1 31
KSI0 C754 1 2 @ 100P_0402_50V8J KSO9 C755 1 2 @ 100P_0402_50V8J KSI1 30 32
30 G2
KSO0 C756 1 2 @ 100P_0402_50V8J KSI1 C757 1 2 @ 100P_0402_50V8J ACES_85201-3005N
ME@ +3VALW 1 2 +VCC_LID R1003 1 2 100K_0402_5%
R1002 0_0402_5%
C C
CONN PIN define need double check
2
5711ACDL-M3T1S SOT-23
VDD
1
OUTPUT 3 LID_SW # <45>
C758
To TP/B Conn. 0.1U_0402_16V4Z 2
GND
2
C759
JP19 U37 10P_0402_50V8J
1
1
8 GND
7 GND
TP_RIGHT 6
TP_LEFT 6
5 5
4 4
TP_DATA 3
<45> TP_DATA 3
TP_CLK 2
<45> TP_CLK 2
1 1 +5VS 1 1
@ @
C761 C762 C760 ACES_88058-060N
100P_0402_50V8J 100P_0402_50V8J ME@
2 2 0.1U_0402_16V4Z
3
@
B CONN PIN define need double check D58 B
PACDN042Y3R_SOT23-3
1
To TP Button/B Conn.
JP7
1 1
2 2
TP_RIGHT 3
TP_LEFT 3
4 4
5 GND
6 GND
JOINT_F1017W R-S-04P
ME@
A A

KB /SW /LPC Debug Conn.
B 0.2
LA-6882P
5 4 3 2 1
FOR EC 128KB SPI ROM http://hobi-elektronika.net
(150mil PACKAGE)
P/N : SA00002C100
SPI_CLK_R
+3VALW
20mils
2
1 @
1
C763 R330
0.1U_0402_16V4Z R1005 0_0402_5%
2 10K_0402_5%
1
Changed to BEAD for EMI.
2
U38
<45> FSEL#SPICS# FSEL#SPICS#
Close to EC. Colse to EC
1 8 1
FRD#SPI_SO R1006 1 SPI_SO CS# VCC HOLD#
<45> FRD#SPI_SO 2 15_0402_5% 2 7 R1007 FBMA-10-100505-101T 0402
DO HOLD# SPI_CLK_R SPI_CLK C764
3 6 1 2 SPI_CLK <45>
WP# CLK 10P_0402_50V8J
4 5
GND DIO 2
MX25L1005AMC-12G SOP SPI_SI_EC 1 2 15_0402_5% FWR#SPI_SI @
FWR#SPI_SI <45>
R1008
EMI
LED
LED1
<45,50> PWR_LED# 1 2 2 1 +5VALW
300_0402_5% R1010
12-21SYGCS530-E1S155TR8_W
White
Amber LED2
BATT_LOW_LED# 3 FD1 FD2 FD3 FD4
<45> CHARGE_LED1#
1 1 1 1
1 2 1 +5VALW
470_0402_5% R1012
<45> CHARGE_LED0# 2
BATT_CHG_LED# B:H_4P2
White
H1 H2 H3 H4
12-22-S2ST3D-C30-2C_WHI-ORG HOLEA HOLEA HOLEA HOLEA
D47
@ LED3
<37> WLAN_LED# 1 2 1 2 2 1 +5VS
300_0402_5% R1013
1
RB751V_SOD323 12-21SYGCS530-E1S155TR8_W
D57
@ White
BT_LED# 1 2
RB751V_SOD323
A:H_3P8
H5 H6 H7 H8 H9 H10 H11
<45> RF_LED# 1 2 HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
R1111 0_0402_5%
1
LED5
<45> TP_LED# 1 2 2 1 +5VS
300_0402_5% R1026 C:H_3P0
12-21SYGCS530-E1S155TR8_W
H12 H13 H14

White HOLEA HOLEA HOLEA
1
+5VALW
BT MODULE CONN D:H_3P0 E:H_3P0 F:H_3P0 G:H_3P0

1
H15 H16 H17 H18 H19 H23

BT@ R1022 HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
100K_0402_5%
C775
0.1U_0402_16V4Z
2
1 R1025 2 1 2
1
100K_0402_5%
1
BT@ BT@
+3VS_BT
OUT
2 +3VS Q93 AO3413_SOT23-3

H_2P8 H_2P8 H_3P0 H_4P5X3P0N
<19,37> BT_OFF# IN Q92 30mils H20 H21 H22
GND
DTC124EKAT146_SC59-3 3 1 HOLEA HOLEA HOLEA H24 H25

BT@ 1 HOLEA HOLEA
BT@ 0.1U_0402_16V4Z
3
C776
G
2
1
BT@
1
BT_LED# 2
Q94 JP8
1
DTC124EKAT146_SC59-3 1
@ 1 H26 H27
2
OUT
USB20_P13 2 HOLEA HOLEA

<18> USB20_P13 3
USB20_N13 3
<18> USB20_N13 4 4
BTON_LED
IN 2 BT_ACTIVE
5 5 G1 7
6 8
GND
<37> BT_ACTIVE
1
6 G2
ACES_87213-0600G
ME@
3

LED/EC SPI ROM/BT
B 0.2
LA-6882P
A B C D E
+USB_VCCB
W=80mils Light USB Conn. JUSB1
+5VALW +USB_VCCB E-SATA COMBO 1
U39 R1109 0_0402_5% USB20_N0_C VBUS
LEFT USB PORT <18> USB20_N0 1 2 2 D-
1 8 1 R1108 1 2 0_0402_5% USB20_P0_C 3
GND OUT <18> USB20_P0 D+
C767 0.1U_0402_16V4Z 2 7 4
IN OUT C780 GND1
1 2 1 3 IN OUT 6 5 GND2 1
2
WCM-2012-900T_4P
PJDLC05_SOT23-3
<45,49> USB_ON# USB_ON# 4 5 USB_OC0# 470P_0402_50V7K 6
EN OC# USB_OC0# <18> 2 USB20_N0 USB20_N0_C D49 GND3
4 4 3 3 7 GND4
APL3510BKI_SO8 1 @ 8
C904 GND5
Low Active @ 1000P_0402_50V7K USB20_P0 USB20_P0_C SUYIN_020133GR004M53CZL
1 1 2 2
ME@
2 L64 @
1
OSCAN
(220uF_6.3V_5.9L_ESR17m)*1=(SF000001500)
+USB_VCCB
ESATA and USB Conn.

2
+USB_VCCB
W=80mils 2
220U_6.3V_M
1
1 470P_0402_50V7K
C769
+ C770 JESAT1
1 USB
R1106 0_0402_5% USB20_N1_C VBUS
1 2 2
2 2 <18> USB20_N1
<18> USB20_P1
R1107 1 2 0_0402_5% USB20_P1_C 3
4
D-
D+
USB
5
GND
A+ = RXP
SATA_ITX_DRX_P4 R1015 GND ESATA
1 ESATA@2 0_0402_5% SATA_ITX_DRX_P4_R 6
<14> SATA_ITX_DRX_P4
<14> SATA_ITX_DRX_N4
ESATA@
SATA_ITX_DRX_N4 R1016 1
ESATA@
2 0_0402_5% SATA_ITX_DRX_N4_R 7
A+
A-
A- = RXN
8 GND SHIELD 12
SATA_DTX_C_IRX_N4 0.01U_0402_16V7K 2 1 C771 SATA_DTX_IRX_N4 R1017 1 ESATA@2 0_0402_5% SATA_DTX_IRX_N4_R 9 13
<14> SATA_DTX_C_IRX_N4 SATA_DTX_C_IRX_P4 B- SHIELD
<14> SATA_DTX_C_IRX_P4 2 1 C772 SATA_DTX_IRX_P4 R1018 1 2 0_0402_5% SATA_DTX_IRX_P4_R 10 B+ SHIELD 14
0.01U_0402_16V7K ESATA@ ESATA@ 11 15
GND SHIELD
USB20_N1 4
WCM-2012-900T_4P
3 USB20_N1_C
<19> ESATA_DET#
B- = TXN
4 3
USB20_P1 1 2 USB20_P1_C
B+ = TXP
TAIW_EU131-117CRL-TW
1 2
L65 @
USB20_N1
3 USB20_P1 3
+3VS
3
2
PJDLC05_SOT23-3
D50
2
@ +3VS
R1019
@ 4.7K_0402_5%
0.01U_0402_16V7K
0.1U_0402_16V4Z
1 2
1
2
U40
7 6 C773 C774 R1020 R1021
1
EN VCC @ @ 4.7K_0402_5% 4.7K_0402_5%

VCC 10
SATA_ITX_DRX_P4 1 16 2 1 @ @
SATA_ITX_DRX_N4 RX_0P VCC
2 20
1
RX_0N VCC
SATA_DTX_IRX_P4 5 9
SATA_DTX_IRX_N4 TX_1P D0
4 TX_1N D1 8
2
3 15 SATA_ITX_DRX_P4_R
GND TX_0P SATA_ITX_DRX_N4_R R1023 R1024
13 GND TX_0N 14
17 GND 0_0402_5% 0_0402_5%
18 12 SATA_DTX_IRX_N4_R @ @
GND RX_1N SATA_DTX_IRX_P4_R
19 11
1
GND RX_1P
21 PAD
SN75LVCP412ARTJR_QFN20_4X4
@
4 4

USB ports/E-SATA
Custom 0.2
LA-6882P
A B C D E
5 4 3 2 1
Close to Conn. JP18
USB30_SUB@ 1
CLK_PCIE_USB30 R1188 1 1
<15> CLK_PCIE_USB30 2 0_0402_5% CLK_PCIE_USB30_R 2 2
<15> CLK_PCIE_USB30# CLK_PCIE_USB30# R1198 1 2 0_0402_5% CLK_PCIE_USB30#_R 3
USB30_SUB@ USB30_SUB@ 3
4 4
<15> PCIE_PRX_DTX_P4 PCIE_PRX_DTX_P4 R1288 1 2 0_0402_5% PCIE_PRX_DTX_P4_R 5
PCIE_PRX_DTX_N4 R1291 1 5
D <15> PCIE_PRX_DTX_N4 2 0_0402_5% PCIE_PRX_DTX_N4_R 6 6
D
USB30_SUB@ USB30_SUB@ 7
PCIE_PTX_C_DRX_P4 R1292 1 7
<15> PCIE_PTX_C_DRX_P4 2 0_0402_5% PCIE_PTX_C_DRX_P4_R 8 8
PCIE_PTX_C_DRX_N4 R1293 1 2 0_0402_5% PCIE_PTX_C_DRX_N4_R 9
<15> PCIE_PTX_C_DRX_N4 USB30_SUB@ 9
10 10
USB_ON# 11
USB30_CLKREQ# 11
<15> USB30_CLKREQ# 12 12
PCIE_WAKE# 13
<16,37,38> PCIE_WAKE# SMIB 13
<19> SMIB 14 14
<18,23,37,38,44,45> BUF_PLT_RST# BUF_PLT_RST# 15
SYSON 15
<45,51,56> SYSON 16 16
SG_SW# 17
<45> SG_SW# KILL_SW# 17
<14> KILL_SW# 18 18
<45> SG_SW_LED# SG_SW_LED# 19 19
+1.5V 20 20
21 21
+3VALW 22 22
+5VS 23 23
+USB3_VCCA 24 24
25 25 G1 27
26 26 G2 28
Close to IC
ACES_85201-26051
ME@
C C
09/30 Delete USB3.0 controller
10/04 Short J19 with JP18.

JP20
B 16 16
B
USB20_P2 15
+5VALW +USB3_VCCA <18> USB20_P2 15
USB20_N2 14
<18> USB20_N2 14
@ 13
USB20_P3 13
<18> USB20_P3 12 12 GND 18
J19 USB20_N3 11 17
<18> USB20_N3 11 GND
1 2 10 10
9 9
USB20@ JOPEN 8
C830 U44 <45> SG_SW# 8
W=60mils <14> KILL_SW# 7 7
.1U_0402_16V7K 1 8 <45> SG_SW_LED# 6
GND OUT 6
1 2 2 IN OUT 7 +3VALW 5 5
3 IN OUT 6 +5VS 4 4
<45,48> USB_ON# USB_ON# 1 R1068 2 4 5 1 R1073 2 3
EN OC# USB_OC1# <18> 3
0_0402_5% USB20@ 2
USB20@ APL3510BKI_SO8 0_0402_5% 2
+USB3_VCCA 1 1
2A/Active Low
USB20@ ACES_85201-1605N
ME@
A A

USB Right Ports/ USB Brd Conn.
Custom 0.2
LA-6882P
5 4 3 2 1
ON/OFF switchSW 2
1 3
http://hobi-elektronika.net Cap Sensor Board Conn. 8pin
Power Button Board Conn. 10pin
Power Button 2 4 ENE SB3534 10/05 Change to SM01000CY00, EMI request
SMT1-05_4P
+5VALW +5VS ME@ J18
6
5
+3VALW E&T_6701-Q12N-00R 2 1
+5VS 2 1
12 14
TOP Side J7
11
12 G2 @ JUMP_43X39 JP9
11
2
1 2 10 +5VS_CAPB 1
10 R1114 1
<45> CAPS_LED# 9 9 <45> ESB_INT 1 2 0_0402_5% ESB_INT_R 2 2
SHORT PADS R1115 8 3
Bottom Side 100K_0402_5%
<45> NUM_LED#
<14> HDD_LED# 7
8 R1117 1 2 0_0402_5% ESB_CLK_R 4
3
D53 7 <45> ESB_CLK 4
NOVO_BTN# 6 R1116 1 2 0_0402_5% ESB_DAT_R 5
<45> ESB_DAT
1
ON/OFF# ON/OFFBTN# 6 +3VS_CAPB 5
3 ON/OFF# <45> 5 5 6 6
ON/OFFBTN# 1 <45,47> PW R_LED# 4 J9 7
51_ON# 4 7
2 51_ON# <52> 3 3 +3VS 2 2 1 1 8 8
2 9
DAN202UT106_SC70-3 9/30 remove EC_SMB_CK2, EC_SMB_DA2 1
2
13 @ JUMP_43X39 10
GND
1 G1 GND
<45> ESB_RST#
JP10 ACES_85201-08051
1
D ME@
2 2
EC_ON 2 @
<45,55> EC_ON
G C858 C859
Q95 S 33P_0402_50V8J 33P_0402_50V8J
3
2
2N7002_SOT23-3 1 1
R1112
10K_0402_5%
1
+3VALW
NOVO_BTN# ON/OFFBTN#
FAN Lighting Conn. 2pin (For Y15 only)

2
2
R1118 D54
100K_0402_5% PJSOT24C 3P C/A SOT-23 +5VS
@
D56 JP17
1
NOVO# 2 1 3
<45> NOVO#
1
NOVO_BTN# 1 G1
1 2 2 G2 4
51_ON# 3
<52> 51_ON#
ACES_87212-02G0
ME@
DAN202UT106_SC70-3 EMI REQUEST 1ST = SCA00000E00
2ST = SCA00000R00
+COVER_LIGHT
A Cover Lighting CONN. 8pin JP13
(For Y15 only) <18> USB20_N10
USB20_N10
1
2
1 GND
2
9
USB20_P10 3
<18> USB20_P10
4
3
4
KB Lighting CONN.4pin
<45> EC_BATT 5 5
EC_SMB_CK2 6
<15,23,40,45> EC_SMB_CK2 6
EC_SMB_DA2 7
<15,23,40,45> EC_SMB_DA2 7
8 8 GND 10
ACES_87213-0800G JP12
ME@ +VCC_KB_LED 1 1
2 2
3 3
4 4
5 GND
+COVER_LIGHT 6 GND
(20 MIL) (20 MIL) JOINT_F1017W R-S-04P
ME@
+5VS +VCC_KB_LED
S
+5VALW 3 1
1 Q112
1 ACOVER@
D
Q110 ACOVER@ C522
G
3 1
2
+5VALW SI2301BDS-T1-E3_SOT23-3 C526 10U_0805_10V4Z 1
1
R437100K_0402_5% ACOVER@ 0.1U_0402_16V4Z 2 AO3413_SOT23-3
4.7V 2 KBL@ C693
G
2
1 R937 0.1U_0402_16V4Z
1
ACOVER@ R436 ACOVER@ 10K_0402_5% 2 KBL@

150K_0402_5% C521 KBL@ 1
OUT
C689
2
ACOVER@ 0.1U_0402_16V4Z 0.01U_0402_16V7K
2
1 R1120 2 1 2 C690
2 100K_0402_5% 10U_0805_10V4Z
<45> ACOVER_OFF# IN
1
KBL@ KBL@ 2 KBL@
GND
OUT
Q109
3
ACOVER@ <45> LED_KB_PW M 2 IN
GND
Q111
3
KBL@
IR CONN. 6pin (For Y15 only)

+5VS
J17 JP16
2 2 1 1 1 1
2 2
@ JUMP_43X39 3
4
3
4
USB20_N8 5 7 2008/03/25 2008/04/ Title
<18> USB20_N8 5 G1 Issued Date Deciphered Date
USB20_P8 6 8
<18> USB20_P8 6 G2
other IO connector
ACES_87213-0600G Size Document Number Rev
ME@ Custom 0.2
LA-6882P
A B C D E
+5VALW TO +5VS +3VALW TO +3VS

http://hobi-elektronika.net +1.5V to +1.5VS
7/26 change SI4800 to SI2301
+1.5V +1.5VS
+5VALW
S
+5VS +3VALW +3VS
D
3 1
U46 U47 1 1 1
1
8 D Q120
S 1 8 D S 1 C856 C857 C835
G
1 7 D S 2 1 1 1 7 D S 2 1 1
2
1
1
6 D 10U_0805_10V4Z 10U_0805_10V4Z 1U_0603_10V4Z R1119
C836 S 3 C837 C838 C839
6 D S 3 C840 C841 2 2 2 470_0603_5%
5 G 4 5 G 4
10U_0805_10V4Z D 10U_0805_10V4Z 1U_0603_10V4Z R1113 10U_0805_10V4Z D 10U_0805_10V4Z 1U_0603_10V4Z R1084 SI2301BDS-T1-E3_SOT23-3 @
2
1 2 2 2 2 1
DMN3030LSS-13_SOP8L-8 470_0603_5% DMN3030LSS-13_SOP8L-8 2 2 470_0603_5%
@ @
1 2
1 2
1
+VSB +VSB +3VALW D
D D
2 SUSP
2 SUSP 2 SUSP G
1
G G S Q98
3
S Q96 S Q97 2N7002_SOT23
3
R1085 2N7002_SOT23 R1086 2N7002_SOT23 100K_0402_5% @
20K_0402_5% @ 47K_0402_5% @ R1087
2
5VS_GATE2 R1088 15VS_GATE_R 2 R1090 1 1.5VS_GATE
2
1 1 Q101 0_0402_5% 1 1
1
1
D 10K_0402_5% D R1089 D
SUSP 2 Q99 C842 SUSP 2 Q100 0_0402_5% C843 SUSP# 2 C844 C845
G 2N7002_SOT23 0.1U_0603_25V7K G 2N7002_SOT23 0.1U_0603_25V7K G 0.1U_0603_25V7K
S 2 S @ 2 2N7002_SOT23S 2 2
3
3
0.1U_0603_25V7K
+RTCVCC +5VALW
+1.8VS +1.5V +1.05VS_VGA +0.75VS +1.05VS +5VALW
1
1
1
@
R1096 R1097 @
R1091 R1092 R1093 R1094 R1095 100K_0402_5% 100K_0402_5% R1098
2 470_0603_5% 470_0603_5% 470_0603_5% 22_0603_5% 470_0603_5% 100K_0402_5% 2
2
@ @ @ @ SUSP
1 2
1 2
1 2
1 2
1 2
2
<6,10,57> SUSP
SYSON#
D D D D D Q107 Q108
1
2 SUSP 2 SYSON# 2 SUSP 2 SUSP 2 SUSP DTC124EKAT146_SC59-3 DTC124EKAT146_SC59-3
G G G G G @
OUT
OUT
S Q102 S Q103 S Q104 S Q105 S Q106
3
3
2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23
@ @ @ @ 2 SYSON 2
<10,45,56,57,58,59> SUSP# IN <45,49,56> SYSON IN
GND
GND
3
3
For Intel S3 Power Reduction.
+5VALW
1
R1103
3 3
100K_0402_5%
OPTI@
2
DGPU_PWR_EN#
DGPU_PWR_EN# <25>
R1104
1
0_0402_5% D
2 1 2 Q113
<18,23,57,58,59> DGPU_PWR_EN
G 2N7002_SOT23
OPTI@ S OPTI@
3
1
R1105
100K_0402_5%
OPTI@
2
4 4

DC Interface
Custom 0.2
LA-6882P
A B C D E
5 4 3 2 1
VIN
Precharge detector
DC030006J00
PF101 PL101 15.97V/14.84V FOR
7A_24VDC_429007.WRML
APDIN 1 2 APDIN1
SMB3025500YA_2P
1 2
ADAPTOR
JDCIN1
1 1
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
2
2
1
D D
3
3 PreCHG
4 PQ102
2
4
PC101
PC102
PC103
PC104
PR102 TP0610K-T1-E3_SOT23-3
1K_1206_5%
1 2 2 1 3 1
4602-Q04C-09R 4P P2.5
VIN
PR103 PD102
@ 1K_1206_5% LL4148_LL34-2
1 2
100K_0402_1%
1
1
100K_0402_1%
PR104
PR105
PR106
1K_1206_5%
2
1 2
PR107
2
1K_1206_5%
1 2
VIN
100K_0402_1%
2
PR108
PD101
LL4148_LL34-2 PQ103
1
DDTC115EUA-7-F_SOT323-3
2
PD103 51_ON-1 PD104
LL4148_LL34-2 2
1
2 1 <39,47> ACOFF 1 2
BATT+
1
3 PQ104
PR101 PR109 <48> +5VALW DDTC115EUA-7-F_SOT323-3
68_1206_5% 68_1206_5% RB715F_SOT323-3
PQ101 VS 2
3
C TP0610K-T1-E3_SOT23-3 C
2
2
N1 3 1
0.22U_0603_25V7K
3
1
PR110 PC106
PC105
100K_0402_5% 0.1U_0603_25V7K
B+
2
PR111
2
22K_0402_5% PR112
1 2 51_ON-2 2.2M_0402_5%
<43> 51_ON#
2 1
VL
VS
499K_0402_1%
1
0.01U_0402_25V7K
PR113
1
1
PC107
PR114
100K_0402_1%
2
@
2
PU101A
8
PD105 LM393DG_SO8
2 3 @ PRG+
P
<46,48> MAINPWON PRG-1 1 +
1 O
205K_0402_1%
499K_0402_1%
0.01U_0402_25V7K
3 2 PRG-
-
1
+RTCBATT ACON
- +
1
1000P_0402_50V7K
PR115
PR116
PC110
JRTC1 PR117 PR118 @ RB715F_SOT323-3
4
1
1
560_0603_5% 560_0603_5%
PC109
2 1 +RTCBATT 1 2 CHGRTC-11 2 PC108
+CHGRTC
2
B 0.1U_0603_25V7K B
PRG++ 2
2
ML1220T13RE
45@
PQ105
1 2 PR119 2N7002W-T/R7_SOT323-3 PR120
+3VLP
1
34K_0402_1% D 47K_0402_5%
6251VREF 2 1 2 2 1
PD106 G PACIN <47>
1
RB751V-40_SOD323-2 S
3
PQ106
2
DTC115EUA_SC70-3
PR121
66.5K_0402_1% 2 +5VALW
3
ACIN BATT ONLY
Precharge detector Precharge detector
Min. typ. Max. Min. typ. Max.
L-->H 14.991V 15.381V 15.782V L-->H 7.196V 7.349V 7.505V
A A
H-->L 13.860V 14.247V 14.621V H-->L 6.138V 6.214V 6.056V

2010/01/25 2010/12/31 Title
Issued Date Deciphered Date PWR DCIN / Vin Detector /Pre-charge
Custom PIQY0/Y1 0.1
5 4 3 2 1
5 4 3 2 1
PH201 under CPU botten side :
VMB2 VMB
CPU thermal protection at 92 degree C
PF201 PL201
JBATT1 12A_65V_451012MRL SMB3025500YA_2P
1 1 2 1 2
Recovery at 56 degree C
1 BATT+
2
D 2 EC_SMCA D
3
3 EC_SMDA
4
4 TS
5
5
1
6
6
1
7 PC201 PC202
7 ADP_I <39,47>
100_0402_1%
100_0402_1%
8 1000P_0402_50V7K 0.01U_0402_25V7K +3VALW
2
GND
9
GND
VL
PR201
PR202
TYCO_1775789-1
2
2
@
3.92K_0402_1%
1
2
PR222
PC203 PR204
0.1U_0603_25V7K 10K_0402_1% PR205
2
VL @ 100K_0402_1%
2
@ 100K_0402_1%
PU201
1
1
1 8 G718_TMSN1
EC_SMB_CK1 <39> VCC TMSNS1
PR206
2
<53> VR_HOT# 2 7 G718_RHYST1
GND RHYST1 PR207
EC_SMB_DA1 <39> G718_TMSN2
3 6 9.76K_0402_1%
2
OT1 TMSNS2
1
D
1 2 +3VALW 2 G718_OT2 4 5
1
OT2 RHYST2
19.6K_0402_1%
PR208 G
G718_RHYST2
2
1
6.49K_0402_1% PQ201 S G718TM1U_SOT23-8
PR209
@ 2N7002KW_SOT323-3 PR223 PH201
0_0402_5% 100K_0402_1%_TSM0B104F4251RZ
1
PR210
2 BATT_TEMP <39> A/D
2
10K_0402_5%
C MAINPWON <45,48> C
2
PR224
10K_0402_1%
1
VS
+3VALW +3VALW
0.01U_0402_25V7K
1
PC204
VMB2
PR211 PR212
2
100K_0402_1% 10K_0402_1%
PR213 PR214
2
649K_0402_1% 5.1M_0402_5%
1
1 2 BATT_OUT <47>
PQ203
PR215 TP0610K-T1-E3_SOT23-3
8
10K_0402_1% PQ202
1
BATDE-4 1 D 2N7002KW_SOT323-3
2 BATDE-3 5
P
+ BATDE-1
7 2 B+ 3 1 +VSBP
PR216 O G
6
-
G
2
BATDE-2
100K_0402_1%
0.22U_0603_25V7K
B PU101B B
232K_0402_1% S
3
1
LM393DG_SO8
4
1
PR217
PC205
PC206
0.1U_0603_25V7K
1
2
2
2
2 1 PR219
6251VREF VL 22K_0402_1%
PR218 1 2
10K_0402_1%
2
PR220
100K_0402_1%
PR221
1
1
1K_0402_5% D PJ201
1 2 2 PQ204 @ JUMP_43X39
<48> SPOK
G 2N7002W-T/R7_SOT323-3 1 1
1U_0402_6.3V6K
+VSBP 2 2 +VSB
S
3
1
PC207
2
A A

PWR-BATTERY CONN/OTP
Custom PIQY0/Y1 0.1
5 4 3 2 1
5 4 3 2 1
P2
P3 65W:0.020 = SD00000S100
90W:0.015 = SD00000DL00
B+
PQ301 PQ302
AO4407A_SO8 AO4407A_SO8
120W:0.01 = SD00000K810
PR302
VIN 8
7
1
2
1
2
8
7 0.01_1206_1% CHG_B+
6 3 3 6 PJ301
5 5 1 4 2 1 PQ303
2 1 AO4407A_SO8
2 3 @ JUMP_43X118 1 8
VIN
4
2 7
3 6
2200P_0402_50V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
D 5 D
2
200K_0402_5%
PQ304
1
2
PC302
200K_0402_1%
@PR303
0.1U_0603_25V7K
PC306
4
1
PR301
PC303
PC304
PC305
DTA144EUA_SC70-3 47K_0402_1% CSIN DISCHG_G
PC301
PR304
CSIP
1
@ PR305
1
PQ305B 47K_0402_1%
VIN PreCHG
2
2
2 @ 2N7002KDW -2N_SOT363-6 1 2
3
VIN
2ACOFF-1
@ 191K_0402_1%
2
1
1
2 5 BATT_OUT <46> PR307 PR308
1DISCHG_G-1
PR306
191K_0402_1% 10K_0402_1%
1
2
PD302
4
@ 1SS355_SOD323-2 PR309
1
BATT_ON 2 P2-1 PQ305A PD301 @ 200K_0402_1%
2
PQ306 @ 2N7002KDW -2N_SOT363-6 6251_VDD RB751V-40_SOD323-2 ACSETIN PQ307
DTC115EUA_SC70-3
1 1
1
1
DTC115EUA_SC70-3 PR311
1
0_0402_5% PR312 PD303
3
FSTCHG
2 1 PR310 14.3K_0402_1% PC307 @ 1SS355_SOD323-2
2.2U_0603_6.3V6K
1 <39> FSTCHG 10_1206_5% 1000P_0402_25V8J 2 1 2
2
6
2
PC308
2
1
150K_0402_1%
PR313
2200P_0402_50V7K
2
2
PR314
PQ308A PU301 PC309
100K_0402_5%
10K_0402_1% PQ310
1
PC310
2 2N7002KDW -2N_SOT363-6 0.1U_0603_25V7K
12
1
D D @ 2N7002W -T/R7_SOT323-3
PR316
6251_DCIN
0.1U_0603_25V7K
1 VDD DCIN 24 2 1
1
2 PACIN
100K_0402_1%
2
1
BATT_OUT <46>
1
PC311
G G
1
PR315
ACSETIN
BATT_ON
S 2 23 S
3
ACPRN <48>
3
PQ309 ACSET ACPRN PR317
2N7002W-T/R7_SOT323-3
2
P2-2
2N7002KW _SOT323-3 20_0402_5%
5
6
7
8
C 6251_EN 6251_CSON CSON C
3 EN CSON 22 1 2
1
D
PQ311
PC312
AO4466L_SO8
3
PQ312
0.047U_0402_16V7K ACPRN 2 @
PR319 CELLS 4 21 6251_CSOP 1 2 CSOP G
2
47K_0402_1% PQ308B CELLS CSOP PR318 S
3
PACIN 1 2 5 2N7002KDW -2N_SOT363-6 PC313 6800P_0402_25V7K 20_0402_5% 4
<45> PACIN
1 2 6251_ICOMP 5 20 6251_CSIN 2 1
ICOMP CSIN
2
PC314 PR320
4
PC315 PR321 10K_0402_1% 0.1U_0402_16V7K 20_0402_5%

1 26251_VCOMP-1
1 2 6251_VCOMP 6 19 6251_CSIP 1 2 PL301 PR324
3
2
1
VCOMP CSIP
1
PQ313 PR322 10U_LF919AS-100M-P3_4.5A_20% 0.02_1206_1%

DTC115EUA_SC70-3 0.01U_0402_25V7K 2_0402_5% BATT+
1 26251_ICM 7 ICM PHASE 18 LX_CHG 1 2 CHG
1 4
PR323
5
6
7
8
<39,45> ACOFF 1 2ACOFF-1 2 <39,46> ADP_I 100_0402_1% 2 3
1
PQ314
DH_CHG
AO4466L_SO8
4.7_1206_5%
8 VREF UGATE 17
PR326
PR325 PR328 1 2 6251VREF PR329 PC317
1
10K_0402_1% 154K_0402_1% PC316 0_0603_5% 0.1U_0603_25V7K
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
16251_SN
PR327 2 1 0.1U_0402_16V7K 6251_CHLIM 9 16 BST_CHG 1 2 BST_CHGA 2 1
3
<39> IREF CHLIM BOOT
1
0_0402_5% PR330 4
1
PC318
PC319
PC323
51K_0402_1% PD304
0.01U_0402_25V7K
2 6251_ACLIM 6251_VDDP RB751V-40TE17_SOD323-2

2N7002KW_SOT323-3
1 10 15
2
ACLIM VDDP
1
6251VREF
2
1
PC320
PQ315 PR331
680P_0603_50V7K
1 2 6251_VDD
3
2
1
1
PC321
100K_0402_1% 6251_VADJ
11 14 DL_CHG
2
VADJ LGATE
1
2 PR333 PR332
<46> BATT_OUT
2
G 1K_0402_1% 4.7_0402_5%
2
S 12 13 PC322
3
2
GND PGND 4.7U_0805_6.3V6K
2
ISL6251AHAZ-T_QSOP24
B PR334 B
Connect to EC A/D Pin. 15.4K_0402_1%
1 2
<39> CHGVADJ
1
PR335
CHGVADJ=(Vcell-4)/0.10627 31.6K_0402_1%
3cell : GND
6251_VDD 6251_VDD
Vcell CHGVADJ 65W Adapter 4cell : VDD
2
4V 0V Vaclim=2.39*(1.96K/(1.96K+16.9K))=0.2484V 6251_VDD
2
Iinput=(1/0.02)((0.05*Vaclim)/2.39+0.05) PR338 PR336 PR337
4.2V 1.882V
where Vaclim=0.2484V, Iinput=2.76A 10K_0402_1% @ 100K_0402_1%@ 100K_0402_1%
1
4.35V 3.2935V PR340

1 2 ACIN <16,24,39>
1
PR339 10K_0402_1% CELLS
90W Adapter 47K_0402_1%
3
CC=0.25A~3A PACIN
2
1 2
Vaclim=2.39*(2.87K/(2.87K+16.9K))=0.347V
IREF=1.016*Icharge PR341
Iinput=(1/0.015)((0.05*Vaclim)/2.39+0.05)
1
0_0402_5% 2 5 2 1
IREF=0.254V~3.048V where Vaclim=0.347V, Iinput=3.82A PR342
2
PR343 @ 0_0402_5%
4
<48> ACPRN
VCHLIM need over 95mV 2 BATT_SEL_EC
14.3K_0402_1%
2
PQ316
120W Adapter PQ317A PQ317B
DTC115EUA_SC70-3 @ 2N7002KDW -2N_SOT363-6 @ 2N7002KDW -2N_SOT363-6
3
A Vaclim=2.39*(1K/(1K+50K))=0.047V A
Iinput=(1/0.01)((0.05*Vaclim)/2.39+0.05)
where Vaclim=0.047V, Iinput=5.1A
65W : PR330=16.9K, PR333=1.96K

90W : PR330=16.9K, PR333=2.87K
120W : PR330=50K, PR333=1K THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS PIQY0/Y1 0.2
5 4 3 2 1
5 4 3 2 1
Note:
Use TPS51125 IC can remove RTC refernece LDO
Use TPS51427 IC must keep RTC refernece LDO
2VREF_8205 PJ402
+3VALW P 2 2 1 1 +3VALW
@ JUMP_43X118
1U_0603_10V6K
D D
1
PJ403
PC402
+5VALW P 2 1 +5VALW
2
2 1
@ JUMP_43X118
PR401 PR402
13K_0402_1% 30K_0402_1%
1 2 FB_3V FB_5V 1 2
PR403 PR404
RT8205_B+ 20K_0402_1% 20K_0402_1% RT8205_B+
1 2 1 2
PJ401 Typ: 175mA
B+ 2 1 +3VLP
2 1
ENTRIP2
ENTRIP1
@ JUMP_43X118 PR405 PR406
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0603_25V7K
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
110K_0402_1% 154K_0402_1%
680P_0402_50V7K
@
PC401
PC403
PC410
1 2 1 2
4.7U_0805_10V6K
1
1
PC404
PC405
PC406
PC407
PC408
PC409
2
8
7
6
5
5
6
7
8
PU401 PQ402
2
2
AO4466L_SO8
PC411
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
1
C PQ401 C
25 P PAD
AO4466L_SO8
2
4 4
7 VO2 VO1 24
SPOK <46>
8 23 PR408 PC413
PR407 VREG3 PGOOD 0_0603_5% 0.1U_0603_25V7K
1
2
3
3
2
1
12BST_3V-1
1 2 BST_3V 9 BOOT2 BOOT1 22 BST_5V 1 2BST_5V-1
1 2
0_0603_5%
PL402 PC412 UG_3V 10
VFB=2.0V 21 UG_5V PL401
4.7UH_PCMC063T-4R7MN_5.5A_20% 0.1U_0603_25V7K UGATE2 UGATE1 4.7UH_PCMC063T-4R7MN_5.5A_20%
1 2 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
1
8
7
6
5
1
LG_3V LG_5V
4.7_1206_5%
4.7_1206_5%
12 LGATE2 LGATE1 19
5
6
7
8
PQ403
PR409
PR411
SKIPSEL
AO4712_SO8 PR410 @
VREG5
0_0402_5%
GND
VIN
NC
MAINPW ON 2 RT8205EGQW _W QFN24_4X4
EN
1 1 1
2
2
4
PC414 + 4 PC415 +
13
14
15
16
17
18
1
1
PR412
680P_0603_50V7K
150U_B2_6.3VM_R45M 499K_0402_1% AO4712_SO8 150U_B2_6.3VM_R45M

PC416
680P_0603_50V7K
2 PQ404 2
PC417
1 2
2
1
2
3
2
B+
3
2
1
1
100K_0402_1%
1U_0603_10V6K
VL
1
PC418
1
PR413
PC419
Typ: 175mA
4.7U_0805_10V6K
B B
2
ENTRIP1 ENTRIP2
2
2
RT8205_B+
6
1
PQ405B
PQ405A 2N7002KDW -2N_SOT363-6
0.1U_0603_25V7K
2N7002KDW -2N_SOT363-6 2 5 2VREF_8205 +3.3VALWP OCP(min)=5.81A
2
PC420
+5VALWP OCP(min)=8.44A
<45,46> MAINPWON
1
PR414
0_0402_5%
2 1
PR415
100K_0402_1%
2 1
VL
1
2N7002W-T/R7_SOT323-3
PR416
1
200K_0402_1% D
ACPRN
PQ407
2 1 2 1 2 2 PQ406
G VS DTC115EUA_SC70-3
S PR417
40.2K_0402_1%
2.2U_0603_10V7K
3
A A
1
100K_0402_1%
1
1
PR418
PC421
3
2
<39,43> EC_ON
2
2
PQ408
DTC115EUA_SC70-3
3VALWP/5VALWP
3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom PIQY0/Y1 0.1
5 4 3 2 1
A B C D
1 1
PL503
HCB2012KF-121T50_0805
1.5_51117_B+ 1 2
B+
5
6
7
8
PR502
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
1
PC502
PC503
267K_0402_1% @ PC504
1 2 PQ501 680P_0402_50V7K
AO4406AL_SO8
2
4
PR501 PR504 PC505
0_0402_5% 0_0603_5% 0.1U_0603_25V7K
1 2 1.5V_EN BST_1.5V 1 2BST_1.5V-1 1 2
<39,44> SYSON
3
2
1
2
47K_0402_5%
PL501
PR503
1UH_PCMB103T-1R0MS_13A_20%
15
14
+1.5VP
1
1
PU501 1 2
PC501 @
EN/DEM
NC
BOOT
.1U_0402_16V7K
1
1.5V_TON 2 13 DH_1.5V
TON UGATE
1
@
3 12 LX_1.5V PR505 1
VOUT PHASE
5
6
7
8
4.7_1206_5%
1.5V_V5FILT VFB=0.75V 1.5V_TRIP 1 + PC506
4 VDD CS 11 2
PR507
+5VALW PQ502 330U_X_2VM_R6M
11.5V_SNB 2
2
1.5V_FB 5 10 9.76K_0402_1% AO4456_SO8 2
FB VDDP 2
6 9 DL_1.5V 4
PGOOD LGATE
PGND
PR506
680P_0603_50V7K
GND
1
100_0603_5%
PC508
1 2 @ PC509 PC507
+5VALW 47P_0402_50V8J RT8209BGQW _W QFN14_3P5X3P5 4.7U_0805_10V6K
3
2
1
1 2
2
1
PC510
4.7U_0603_6.3V6K
2
PR508
+1.5VP OCP(min)=15.6A
1 2
1.8VSP max current=4A
10K_0402_1%
1
PR509
10K_0402_1%
2
PJ502 +1.5V
+1.5VP 2 1
2 1
@ JUMP_43X118
3 3
4.5x4.5 2H
PU502 PL502 PJ505

4
PJ504 1UH_PCMB042T-1R0MS_4.5A_20% +1.8VSP 2 1 +1.8VS

1.8V_VIN 10 LX_1.8V 2 1
+5VALW 2 1 2 1 2
PG
2 1 PVIN LX +1.8VSP @ JUMP_43X118

@ JUMP_43X118
68P_0402_50V8J
9 PVIN LX 3
1
1
4.7_1206_5%
1
1
PC512
PC511 8 SVIN
PR510
22U_0805_6.3VAM PR511
6 FB_1.8V 30K_0402_1%
2
2
1.8V_EN FB
22U_0805_6.3VAM
22U_0805_6.3VAM
5
2
2
11.8V_SNB
EN
1
NC
NC
FB=0.6Volt
TP
PC514
PC515
<10,39,44,51,52> SUSP#
680P_0603_50V7K
11
2
1 2
PC513
PR512 0_0402_5%
0.1U_0402_10V7K
2
PC516
SY8033BDBC_DFN10_3X3
2
1
PR513
1M_0402_5%
@
2
1
4
PR514 4
14.7K_0402_1%
2

PWR-+1.5VP/+1.8VSP
A B C D
5 4 3 2 1
Ventura_B+
@ PJ601
51117_VCCSAP_B+ 2 1
2 1
JUMP_43X118
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC602
PC603
1
1
5
6
7
8
PQ601
2
AO4466L_SO8
PR602
280K_0402_1%
1 2
PR601 4
0_0402_5%
<51> VCCPPWRGOOD 1 2 VCCSAP_EN
1
D D
PR603 PC604 +VCCSAP OCP(min)=6.28A
1
@ PR604 0_0603_5% 0.1U_0603_25V7K
3
2
1
47K_0402_5% PC601 BST_VCCSAP
1 2 BST_VCCSAP-1 1 2
@ 0.1U_0402_16V7K
2
PL601
15
14
2
1
PU601 2.2UH_PCMC063T-2R2MN_8A_20%
1 2
NC
BOOT
EN/DEM
+VCCSAP
VCCSAP_TON 2 13 UG_VCCSAP
TON UGATE
1
1
PR606 3 12 LX_VCCSAP
5
6
7
8
100_0603_1% VOUT PHASE PR605 + PC605
+5VALW 1 2 VCCSAP_V5FILT 4 11 VCCSAP_TRIP 1 2 +5VALW 4.7_1206_5% 220U_6.3V_M
VDD CS PR610 PQ602
OS-CON
1VCCSAP_SNB2
VCCSAP_FB 5 10 13K_0402_1% AO4712_SO8 2
1
2
FB VDDP PJ602
+3VS 6 9 LG_VCCSAP 4 PR607 +VCCSAP 2 1 +VCCSA
PGOOD LGATE 2 1
PGND
PC608 0_0402_5% PR608
GND
2
4.7U_0603_6.3V6K 1 2 VSSSA_SENSE <10> @ JUMP_43X118
1
0_0402_5%
1
VCCSAP_PGOOD
PR609 RT8209BGQW_WQFN14_3P5X3P5 PC607
3
2
1
10K_0402_5% 4.7U_0805_10V6K PC606
2
470P_0603_50V8J
2
1
0_0402_5%
PR611
2 1
PR612 SA_PGOOD <39>
PR613
2K_0402_1%
1 2 VCCSAP_FB-1 1 2 VCCSA_SENSE <10>
VFB=0.75V
10_0402_5%
+3VS
C
VID[0] VID[1] VCCSA Vout Require on 2011/ 2012 Required C
1
PR615 0 0 0.9 V Yes/Yes

1
PR614 15K_0402_1%
30K_0402_1% PR616 0 1 0.8 V Yes/Yes
10K_0402_5%
1 1 0.75V No/Yes
2
PQ603 PR617
1 1 0.65V No/Yes
2
1
D 2N7002W-T/R7_SOT323-3 10K_0402_5% PMBT2222A_SOT23-3

2 VCCSASEL-3 2 1 VCCSASEL-2
G PQ604 PR619
1
S 0_0402_5%
3
2VCCSASEL-1
2 1 Note:Use VCCSA_SEL to switch High & Low Level for VID[1]
PC609 PR618 @ VCCSA_SEL <10>
(ie. VCCSA_SEL) due to the VID[0] is don't care for this setting.
1
@ 4700P_0402_25V7K 100K_0402_5%
2
PR620
2
@ 10K_0402_5%
PJ605
+1.35VSP_VGA 2 1 +1.35VS_VGA
2 1
@ JUMP_43X118
Optimus: PR633 PL603

HCB2012KF-121T50_0805
DIS: PR624 1.35_51117_B+ 1 2
PJ603
B+ +0.75VSP 1
1 2
2 +0.75VS
PR630
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
1
PR633 267K_0402_1% @ PC624 @ JUMP_43X79
PC622
PC621
5
6
7
0_0402_5% 1 2 8 680P_0402_50V7K
DGPU_PWR_EN 1 2
2
B B
PQ606
AO4466L_SO8
PR624 PR625 PC617
@ 0_0402_5% 0_0603_5% 0.1U_0603_25V7K 4
1 2 1.35V_EN BST_1.35V 1 2BST_1.35V-1 1 2
SUSP#
2
<10,39,44,49,51> PL602
47K_0402_5%
3
2
1
+1.35VSP_VGA +1.5V
1UH_PCMC063T-1R0MN_11A_20%
PR632
15
14
1
PU603 1 2
PC616 @
NC
BOOT
EN/DEM
.1U_0402_16V7K
1
1.35V_TON 2 13 DH_1.35V
1
1
@ TON UGATE
3 12 LX_1.35V PR631 1 PJ604
1
5
6
7
8
VOUT PHASE 4.7_1206_5% JUMP_43X79

1.35V_V5FILT VFB=0.75V 1.35V_TRIP1 PQ607 + PC618
4
VDD CS
11 2 +5VALW @
2
PR629 AO4712_SO8 220U_B2_2.5VM_R15M
11.35V_SNB 2
1.35V_FB 5 10 9.76K_0402_1%
2
FB VDDP 2 PU602
6
PGOOD LGATE
9 DL_1.35V 4 LDO_0.75_VIN 1
VIN VCNTL
6 +3VALW
PGND
PR626
GND
680P_0603_50V7K
1
100_0603_5% 2 5
1
@ PC623 PC620 GND NC
PC625
1 2
+5VALW
1
47P_0402_50V8J RT8209BGQW_WQFN14_3P5X3P5 4.7U_0805_10V6K PC610 3 7 PC611
7
3
2
1
4.7U_0805_6.3V6K PR621 VREF NC 1U_0603_10V6K

1 2
2
2
1
1K_0402_1% 4 8
PC619 VOUT NC
4.7U_0603_6.3V6K 9
2
2
TP
PR627 LDO_0.75_VREF G2992F1U_SO8
8.06K_0402_1%
1 2
0.1U_0402_16V7K
1
1
+0.75VSP
PC612
1
PR623
2
1K_0402_1%
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
PR628 PR622
PC614
PC615
A A
2
1
10K_0402_1% 24.9K_0402_1% D
<6,10,44> SUSP 1 2LDO_0.75_EN 2

2
2
G
1
S PQ605
3
PC613 2N7002W-T/R7_SOT323-3
1U_0402_6.3V6K
2
PWR +VCCSAP/+1.35VSP_VGA/+0.75VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C PIQY0/Y1 0.1
5 4 3 2 1
5 4 3 2 1
+1.05VS_VCCPP OCP(min)=20.75A
PL702
HCB2012KF-121T50_0805 Ventura_B+
1.05VS_B+ 1 2 Ventura_B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
5
6
7
8
PR702
1
267K_0402_1% @ PC704
PC702
PC703
1
68U_25V_M_R0.36
D D
1 2 PQ701 680P_0402_50V7K
AO4406AL_SO8 +
PC705
2
2
4
PR701 PR703 PC706 2
0_0402_5% 0_0603_5% 0.1U_0603_25V7K
1 2 1.05VS_VCCP_EN BST_1.05VS_VCCP 1 2BST_1.05VS_VCCP-11 2
<10,39,44,49,52> SUSP#
3
2
1
1
PL701
15
14
1
PC701 PU701 1UH_FDUE1040D-1R0M-P3_21.3A_20%
@ .1U_0402_16V7K 2 1 +1.05VS_VCCPP
EN/DEM
NC
BOOT
2
1.05VS_VCCP_TON 2 13 DH_1.05VS_VCCP
TON UGATE
1
PR706 3 12 LX_1.05VS_VCCP PR704
VOUT PHASE
5
6
7
8
100_0603_5% 4.7_1206_5%
1 2 1.05VS_VCCP_V5FILT 4 11 1.05VS_VCCP_TRIP 1 2 +5VALW 1
+5VALW VDD CS PR707 PQ702
330U_X_2VM_R6M
11.05VS_VCCP_SNB2
1.05VS_VCCP_FB 5 VFB=0.75V 10 13.7K_0402_1% AO4456_SO8 +
FB VDDP
PC707
1
2
6 9 DL_1.05VS_VCCP 4
PGOOD LGATE
PGND
PC711 2
GND
4.7U_0603_6.3V6K PR705
2
1
0_0603_5%
RT8209BGQW _W QFN14_3P5X3P5 PC709
680P_0603_50V7K
7
3
2
1
1
@ PC710 4.7U_0805_10V6K
2
47P_0402_50V8J
PC708
1 2
C C
2
PR708 PR711
4.02K_0402_1% 10_0402_5%
1 2 1.05VS_VCCP_FB1 2 1 VCCIO_SENSE <9>
1
PR710
10K_0402_1%
PR709 1 2 VCCPPW RGOOD
+3VS
10K_0402_1% <50>
2
PR712
10K_0402_1%
@
PJ702
1
2 2 1 1
@ JUMP_43X118
PJ703
+1.05VS_VCCPP 2 2 1 1 +1.05VS
+1.5V @ JUMP_43X118
1
+5VALW +5VALW
B PJ704 B
1
JUMP_43X79 PJ705
2 1
1U_0402_6.3V6K
2 @ +1.05VS_VGAP 2 1 +1.05VS_VGA
1
@ JUMP_43X118
PC712
PR713
@ 0_0402_5% VGAPCIE_VIN
2
PD702
Optimus: PR714 @ RB751V-40_SOD323-2
2
1 2 PC713
DIS: PR715 4.7U_0805_6.3V6K
6
PU702
2
PR714 5
VCNTL
0_0402_5% VGAPCIE_POK 7 VIN

DGPU_PW R_EN POK
1 2 VOUT 4 +1.05VS_VGAP
<25> DGPU_PW R_EN
PR715 3
22U_0805_6.3V6M
0.01U_0402_25V7K
VOUT
1
1
@ 0_0402_5% PC714
PC715
SUSP# 1 2 VGAPCIE_EN 8 2
EN FB
1
<10,39,44,49,51> SUSP# PR716

@ 47K_0402_5%
0.1U_0603_25V7K
GND
2
1
1.15K_0402_1%
@ PC716
PR717
VIN 9
1 2
2
APL5912-KAC-TRL_SO8
2
PD701 VGAPCIE_FB
2
@ RB751V-40_SOD323-2
1
PR718
A
3.57K_0402_1% A
2

PWR +1.05VS_VCCPP/1.05VS_VGA
5 4 3 2 1
5 4 3 2 1
GPIO6 GPIO5 Optimus: PR801 http://hobi-elektronika.net

GS: PR840,PR845,PR847,PR853
N12P-GS GPU_VID1 GPU_VID0 VGA_CORE DIS: PR802 GT/GT1:PR843,PR844.PR846,PR854
0 0 1.0V 2 1 PQ807
PR801 10K_0402_1% PR845
1
0 1 0.975V 2 1 DGPU_PW R_EN 0_0402_5% D 2N7002KW _SOT323-3
2 1 2
0.1U_0402_16V7K
1 1 0.825V @ PR802 G PR848 GPU_VID1
10K_0402_5%
2
0_0402_5% S 0_0402_5%
3
2
+3VS
PC801
1 2 SUSP# <3,14,16>
PR839
D
GPIO6 GPIO5 D
1
1 2
1
2
GPU_VID1 GPU_VID0 VGA_CORE +3VS_VGA PR854
N12P-GT/GT1 +3VS +3VS_VGA 0_0402_5% PL801 PR841
2
0 0 1.075V PR842 +3VS_VGA 1 2 1 2
GPU_VID0
HCB4532KF-800T90_1812 0.004_2512_1%
10K_0402_5% PR847 PR851 VGA_B+ 2 VGA_B+1
0_0402_5%
10K_0402_5%
1 4 1 B+
2
0 1 0.925V 0_0402_5% 0_0402_5%
PR804
PR840 10K_0402_5%
1
1 1 2 3 2
1 0.825V
2
PR846
PR852
PR805 10K_0402_5%
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1
2
<25> VGA_PGOOD 0_0402_5%
0_0402_5%
PR843 10K_0402_5%
2
5
+3VS_VGA
PC802
PC803
PC804
1 2
1
PQ806
2
+3VS PR844
PR807
PR810 10K_0402_1%
TPCA8030-H_SOP-ADV8-5
1
1
0_0402_5% D 2N7002KW _SOT323-3
1
2
2
G GPU_VIN- <33> GPU_VIN+ <33>
1
S 4
3
2
PQ801
6264_VID2
10K_0402_5%
@ 10K_0402_5%
6264_VRON
VCC_PRM1
6264_VID5
6264_VID4
6264_VID3
1
6264_PSI
6264_VID0
PR811
PR809
1 2
PR853 PC805
3
2
1
0_0402_5% 0.22U_0603_10V7K
1
BST1_VGA1 2BST1_VGA-1 2 PL802
150K_0402_1%
1
36.5K_0402_1%
@1000P_0402_50V7K
0.047U_0603_25V7M
+VGA_CORE
2
PR808 0.36UH_PCMC104T-R36MN1R17_30A_20%
2
2 2.2_0603_1%
40
39
38
37
36
35
34
33
32
31
2 1
1000P_0402_50V7K
6264_SET
2
PC806
PC807
PR813
PR814
2
10K_0402_1%
6.81K_0603_1%
6.34K_0402_1%
PSI_L
VID5
VID4
VID3
VID2
VID1
VID0
BOOT1
PGOOD
VR_ON
1
1
PC808
PR815
5
PR812
1_0402_5%
1
2
@ UG1_VGA
4.7_1206_5%
1 30 1
330U_D2E_2.5VM_R9M
1
SET UGATE1
2
TPCA8028-H_SOP-ADVANCE8-5
PR818
PR819
C C
3.65K_0805_1%
6264_RBIAS 2 PHASE1_VGA +
PR816
PC809
RBIAS PHASE1 29
PC810
PR817
6264_OFS 3 28 4 0.22U_0603_16V7K
1VGA_SNB1 1
OFS PGND1 PR820 2
1 2
1
PQ802
6264_SOFT 4 27 LG1_VGA 0_0402_5%
SOFT LGATE1
2 1 +5VS
PR821 PC812 6264_OCSET 5 26 PVCC_VGA
680P_0603_50V7K
3
2
1
97.6K_0402_1% 470P_0402_50V7K OCSET PVCC VSUM1 VGA_ISEN1 VCC_PRM1
10K_0402_1%
2 1
2
6264_VW LG2_VGA PC811
PC813
1 2 1 2 6 VW LGATE2 25
PC814 PU801 4.7U_0603_6.3V6K
PR849
220P_0402_50V8J 6264_COMP 7 ISL6264CRZ-T_QFN40_6X6 24
2
COMP PGND2
1 2
6264_FB 8 23 PHASE2_VGA
1
FB PHASE2 VGA_ISEN2
6264_VDIFF 9 22 UG2_VGA
PR823 VDIFF UGATE2
1K_0402_1% 6264_VSEN 10 21 BST2_VGA
VSEN DROOP BOOT2
2 1
ISEN2
ISEN1
VSUM
PR824 PC815 41
1000P_0402_50V7K
GND
VDD
RTN
GND PAD DFB

2
VIN
VO
255_0402_1% 1000P_0402_50V7K
2
1
1 2 1 2 PC817 VGA_B+
PR822
@ PC816
330P_0603_50V8
1
11
6264_DROOP 12
13
14
15
16
17
18
19
20
2.2_0603_1%
1
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
6264_VDD
VDD_SENSE_VGA
6264_DFB
2
2 1 6264_VIN
6
5
6264_RTN VGA_ISEN1
PC820
PC821
PC822
PR825 PC819
BST2_VGA-1
1
0_0402_5% 180P_0402_50V8J
1000P_0402_50V7K
2
B VGA_ISEN2 B
1 2
+VGA_CORE PR827 PR828
PC823
2 1
1K_0402_1% 1.5K_0402_1% 4
1
PQ803
PR826 2 1 1 2 +5VS
10_0402_5%
2
PR829
0.22U_0603_10V7K
0_0402_5%
PC818
3
2
1
2 1 B+
8
ŃġŷŢŭŶŦľĵĴııŌ
1
2
PL803
10_0603_5%
GND_SENSE_VGA
+VGA_CORE
2
VCC_PRM1 0.36UH_PCMC104T-R36MN1R17_30A_20%
10_0603_5%
2
PR831
2 1
PR830
PR832
10K_0603_5%_TSM1A103J4302RE
2
10_0402_5%
11K_0402_1%
10K_0402_1%
1
PH801
1
5
PR833
1_0402_5%
0.022U_0402_16V7K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
1 1
330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
2
2
TPCA8028-H_SOP-ADVANCE8-5
PR836
PR837
4.7_1206_5%
3.65K_0805_1%
1
+ +
PC824
PC825
PC826
PC827
PC828
1U_0402_6.3V6K
PC831
PR834
PR835
2.61K_0402_1%
0.01U_0603_50V7K
1
0.22U_0603_16V7K
PC830
4
2
2 2
PQ804
1 2
1VGA_SNB2 1
1
PR838
PC829
2
1
1
3
2
1
VSUM1 VGA_ISEN2 VCC_PRM1
10K_0402_1%
2
680P_0603_50V7K
VSUM1
PC832
PR850
2
A A
1
VGA_ISEN1

Issued Date 2007/12/12 Title
2006/12/12 Deciphered Date
Power-VGA_CORE
5 4 3 2 1
5 4 3 2 1
Alert# PU resister need close CPU, @ PC901 470P_0402_50V7K CPU_B+ 1 2 Ventura_B+
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K
so the PU resister in HW schematic. 2 1 NTCG PL901
HCB4532KF-800T90_1812
but DAT and CLK need close PWM-IC,
PR901 Ventura_B+ B+ PQ901
1
so the PU resister in POWER schematic.
PC902
PC903
PC956
PC957
3.83K_0402_1% PH901 PR968
2 1 2 1 0.004_2512_1%
ŃġŷŢŭŶŦľĵĸııŌ Ventura_B+ 4 1
2
1000P_0402_50V7K
8.06K_0402_1%
68U_25V_M_R0.36
470KB_0402_5%_ERTJ0EV474J 1
3 2 UGATEG 4
PC904
+
1 2 Choke PN:SH00000JX00
1
PR902
PR903
DCR=1.33~1.396m ohm
PC905
27.4K_0402_1%
2 PL902
3
2
1
+VGFX_CORE 0.36UH_PCMB103T-R36MS1R335_23A_20% +VGFX_CORE
2
PR904 PHASEG 4 1
2 1 CPU_VIN- <33> CPU_VIN+ <33> PC907 1
5
330P_0402_50V7K
10K_0402_1%
SI7170DP-T1-GE3_POWERPAK8-5
D PC906 10_0402_1% BOOTG 2 PR905 1 2 1 PQ902 3 2 D
330U_X_2VM_R6M
+5VS
4.7_1206_5%
PQ903
1 2 2.2_0603_5% +
1
PC910
PC908 PC912 0.22U_0603_10V7K
VCC_AXG_SENSE <10>
1 2PR910
PR906 @ 39P_0402_50V7K PR909 330P_0402_50V7K 330P_0402_50V7K PR908
2
PC909
PR907
499K_0402_1% 2 1 2 1 2 1 PC911 1_0402_5%
VSS_AXG_SENSE <10>
680P_0603_50V7K
1U_0603_10V6K
422_0402_1% 2 1 LGATEG 4 4
2
PC913 PH902
2
2
PC914
150P_0402_50V8J 1000P_0402_50V7K PR913 10K_0402_1%_ERTJ0EG103FA
PC915
2 1 2 1 2 1 2 1 PR916 1 PR914 21 2
1
0_0603_5%
0.22U_0603_10V7K
PR911 PR912 10_0402_1% 2 1 7.5K_0402_1%
3
2
1
3
2
1
2
PR915
475K_0402_1% 2.55K_0402_1% 2.2_0603_5%
BOOT3
PC916 1 PR917 2 .1U_0402_16V7K
ISNG
ISPG
GFXVR_IMON
1
2
PR919 11K_0402_1% PC918
18.2K_0402_1%
+1.05VS_VCCPP
0.047U_0603_16V7K
@ 16.5K_0402_1% 1 2 1 2
2
1
@.1U_0402_16V7K
PC919
PC917 0.033U_0402_16V7K
1
UGATEG
PHASEG
LGATEG
PU902 @ 100_0402_1%
BOOTG
470P_0402_50V7K
PR918
PC920
PC921 @ PR921
NTCG
5 1
2
1
2
2 PR920 1
1
VCC BOOT
130_0402_1%
54.9_0402_1%
1 2 1 2
750_0402_1%
@ 43_0402_1%
PC922
6 8 UGATE3 CPU_B+
<10> VSS_AXG_SENSE FCCM UGATE
1
10U_0805_25V6K
10U_0805_25V6K
PR922
PR923
0.033U_0402_16V7K
ISPG
1
1
PR924
2 7 PHASE3 PQ904
For shortage changed +3VS PWM PHASE
Parallel and tune length
1
+5VS
PC923
PC924
LGATE3
49
48
47
46
45
44
43
42
41
40
39
38
37
3 4
2
2
1
GND LGATE
@
2
1.91K_0402_1%
PR925 ISL6208CRZ-T_QFN8 2 PR926 1ISNG
GND
COMPG
FBG
VSENG
RTNG
ISPG
ISNG
NTCG
PROG2
BOOTG
UGG
PHG
LGG
2
<9> VR_SVID_DAT
1
0_0402_5% 4 @ 0_0402_5%
BOOT2
<9> VR_SVID_ALRT# 1
VWG BOOT2
36 Choke PN:SH00000JX00
DCR=1.33~1.396m ohm
2
PR927
2 35 UGATE2
<9> VR_SVID_CLK 2 IMONG UG2 PL903
3
2
1
PR928 3 34 PHASE2 0.36UH_PCMB103T-R36MS1R335_23A_20%
PGOODG PH2
+3VS 1 2 1 PR929 2 +5VS 4 1 +CPU_CORE
SVID_SDA 4 33
5
1.91K_0402_1% GFX_CORE_PWRGD SDA VSSP2 @ 0_0402_5% ISEN32 PR930 1 3 2 2 PR931 1ISEN1
1
4.7_1206_5%
SVID_ALERT# 5 32 LGATE2 PQ905 PQ906 10K_0402_1% 10K_0402_1%
C ALERT# LG2 C
PR934
PR932 @
SVID_SCLK 6 31 1 2
<9> VSSSENSE VGATE <16> SCLK VDDP
680P_0603_50V7K
1 PR933 2 7 30 PWM3 0_0402_5% 4 4 PR937
1 2
<39> VR_ON VR_ON PWM3 VSUM+ 2 PR935 1 2 1ISEN2
0.047U_0603_16V7K
PC925
0_0402_5% 8 PU901 29 LGATE1 3.65K_0402_1% 10K_0402_1%
PGOOD LG1
19.1K_0402_1%
IMVP_IMON
PC926
ISL95831CRZ-T_TQFN48_6X6 @
1
2.2U_0603_10V6K
PC927
PR956 9 28
3
2
1
3
2
1
2
1
IMON VSSP1 PR938
1
PR936
QC:19.1K 10
VR_HOT# PH1
27 PHASE1 VSUM- 2 1
1_0402_5%
2
DC:19.6K 11 26 UGATE1
2
2
ISEN3/ FB2
For shortage changed NTC UG1 @

12 25 BOOT1
PROG1
ISUMN
ISUMP
VW BOOT1
COMP
ISEN2
ISEN1
VSEN
VDD
RTN
<46> VR_HOT#
VIN
@ PC928 CPU_B+
FB
1
10U_0805_25V6K
10U_0805_25V6K
PR939 2 470P_0402_50V7K
1
5
1 2 PQ907
13
14
15
16
17
18
19
20
21
22
23
24
499_0402_1% PR940 PH903
2
1
PC930
PC931
+1.05VS_VCCPP @ 1 2 1 2
3.83K_0402_1% 470KB_0402_5%_ERTJ0EV474J
ŃġŷŢŭŶŦľĵĸııŌ
2
UGATE2
PC929 2 1 PR943
4 Choke PN:SH00000JX00
DCR=1.33~1.396m ohm
1
47P_0402_50V8J PR941 27.4K_0402_1%
PR942 0 ohm =>98A (Vboot=0v)
PR943
1000P_0402_50V7K
8.06K_0402_1%
change from 43P to 47P 1 2 590_0402_1% 590 ohm=>91A (Vboot=0v) PL904

CPU_B+
3
2
1
1
0.36UH_PCMB103T-R36MS1R335_23A_20%
for shortage problem
4.7_1206_5%
PR944
PC932
PHASE2 4 1 +CPU_CORE
2
2010-03-15 PC933 0_0603_5%
QC: PC935
2
@ 22P_0402_50V8J PR946 2.2_0603_5% PQ908 3 2
1
0.22U_0603_25V7K
DC: PC933
2 1 +5VS PR945
2
PC936
PR947
2 1 BOOT2 2 1 2 1
1U_0603_10V6K
1_0603_5%
ISEN2
ISEN1
PQ909
PC934 10K_0402_1% PR949
ISEN3
B B
680P_0603_50V7K
PC937
0.22U_0402_6.3V6K PC935 0.22U_0603_10V7K PR948 @ 10K_0402_1%
1 2
2 1 LGATE2 4 4 ISEN2 2 1 2 1 ISEN1
2
PC940
PC941
47P_0402_50V8J PC938
PR950
PR951 PC939 VSUM- 2 1 VSUM+ 3.65K_0402_1% PR953
2
1 2 2 1 2 1 2 1 0.22U_0402_6.3V6K PR952 1_0402_5%
3
2
1
3
2
1
1
2.61K_0402_1%
499_0402_1% PC942 VSUM+ 2 1 2 1 VSUM-
0.033U_0402_16V7K
0.033U_0402_16V7K
PR954
@ 499K_0402_1% 470P_0402_50V7K 2 1
0.22U_0603_10V7K
PC943 PR955 PR956 0.22U_0402_6.3V6K

2 1 2 1 2 1 ŃġŷŢŭŶŦľĵĳĶıŌ PR969
@ PC955
PC945
PC944
3.74K_0402_1% @ @ 10K_0402_1%
1 2
1
1
11K_0402_1%
150P_0402_50V8J 220K_0402_1% CPU_B+ 2 1 ISEN3
10U_0805_25V6K
10U_0805_25V6K
PR958
PR957
5
+CPU_CORE 2 1 PH904 PQ910
2
@ 10_0402_1% 10K_0402_5%_ERTJ0ER103J
1
330P_0402_50V7K
PC948
PC949
PC947
2
1
PR959
PR956 2 1
2
PC946
330P_0402_50V7K 2 1 VSUM-
2
<9> VCCSENSE
QC:3.724K 1.54K_0402_1% UGATE1 4 Choke PN:SH00000JX00
2
.1U_0402_16V7K
2 1 PR960
<9> VSSSENSE
DC:2.15K DCR=1.33~1.396m ohm
PC952
PC950 2 1 2 1
PR961 1000P_0402_50V7K
2
2 1 @ PC951 @ 100_0402_1% PL905
3
2
1
@ 10_0402_1% 330P_0402_50V7K 0.36UH_PCMB103T-R36MS1R335_23A_20%
PHASE1
PR959 4 1 +CPU_CORE
4.7_1206_5%
5
5
QC:1.54K=120A 2.2_0603_5%
0.22U_0603_10V7K 10K_0402_1% 3 2 PR965
1
PQ911
PR963
PR962 PC953 PR964 @ 10K_0402_1%
DC:887=70A
PQ912
BOOT1 2 1 2 1 ISEN1 2 1 2 1 ISEN2
*Iccmax in Turbo Mode for SV (35W) is 53A
680P_0603_50V7K
LGATE1 4 4 3.65K_0402_1% PR967
1 2
+CPU_CORE +VGFX_COREP PR966 1_0402_5%
PC954
VSUM+ 2 1 2 1 VSUM-
A A
Icc-max=53A Ipeak=26A , Imax=18.2A , 1.2Ipeak=31.2A
3
2
1
3
2
1
2
Rdson=3.6~4.5m ohm Rdson=3.6~4.5m ohm PR970
DCR=1.1m ohm DCR=1.1m ohm @ 10K_0402_1%
HW output cap: HW output cap: 2 1 ISEN3
@
(1)10U_0805_4V *10 (1)22U_0805_6.3V *12
(2)22U_0805_6.3V *15 (2)470U_D2_2V *2(ESR=4.5m ohm)
(3)470U_D2_2V *4(ESR=4.5m ohm) Security Classification
2010/01/25
Compal Secret Data
2010/12/31 Title
Issued Date Deciphered Date PWR +CPU_CORE/+VGFX_CORE
*OCP setting value=71.5A *OCP setting value=37A Size Document Number Rev
Custom PIQY0/Y1 0.1
5 4 3 2 1
5 4 3 2 1
9HUVLRQFKDQJHOLVW3,5/LVW http://hobi-elektronika.net 3DJHRI

IRU3:5
,WHP 5HDVRQIRUFKDQJH 3* 0RGLI\/LVW 'DWH 3KDVH

D D

C C

B B

A A

PIR (PWR)
5 4 3 2 1
5 4 3 2 1
PIQY1 HW PIR List http://hobi-elektronika.net

OP!EBUF!!!QBHF!!!!!!!!!!!!!!!NPEJGJDBUJPO!MJTU!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!QVSQPTF
FWU!UP!EWU
2 Q29 Sftfswf!S3:8 Sftfswf!qvmm!epxo!gps!QDI!HQJP64/
3 Q29 Fydibohf!TBUB!qpsu1!'!qpsu2 Gps!gbtu!cppu!gvodujpo/
D 4 Q61 Dibohf!LC!mjhiu!dpouspm!djsdvju Dibohf!LC!mjhiu!dpouspm!gspn!QXN!up!po0pgg/ D
5 Q47 Bee!G3!)qpmz.gvtf* Gps!IENJ!qpsu!ejpef!qspufdujpo/

6 Q2: Tuvgg!S414-!votuvgg!S451 Dibohf!FTBUBÈFU$!up!HQJP2/
7 Q5: Tuvgg!S2179-!sftfswf!S2182-S2183-S21::-R232 Sftfswf!VTC4/1!qpxfs!txjdui!dpouspm!jowfsufs!djsdvju/
8 Q59 Bee!S2265 Gps!DIH`PO$!qvmm!epxo/
9 Q56 Tuvgg!S::7-S24:-D926-!votuvgg!S2111-D843-D844-Z6 Dibohf!FD!DML!gspn!dsztubm!up!TVTDML/
: Q48 Bee!V71-!R243-!D:32-!S243:-!R244-!S2439 Bee!XMBO!qpxfs!txjudi!djsdvju
21 Q1: Bee!D:33 Bee!D:33!up!qmbdf!bu!DQV!tejf/
22 Q32 Bee!S2441 Bee!gps!JOUWSFO!dpouspm
23 Q58 Npejgz!MFE2-MFE3-MFE4-MFE6 Dibohf!MFE!uzqf
24 Q56 Npejgz!UQ`MFE$-!QDIÈQXSPL!boe!MFE`LC`QXN!mjol Dibohf!MFE`LC`QXN!up!V47/!qjo37!HQJP23/
25 Q29 Efmfuf!FO`DBSE`QX$-!FO`XPM$ Bee!GBTU`CPPU$!up!sfqmbdf!FO`DBSE`QX$!boe!FO`XPM$
26 Q59 Efmfuf!VTC!dibshfs!djsdvju Sfnpwf!VTC!dibshfs!gvodujpo
27 Q58 Npejgz!I6-I7-I8!tj{f Gspn!I`4Q1!up!I`4Q9
28 Q53 Dibohf!D771-!D772!gspn!4411q!up!1/2v Gps!211I{!Ijhi!Qbtt!gjmufs
29 Q54 Sfqmbdf!S:69-!S:6:!up!D:37-!D:38!1/144v Gps!211I{!Ijhi!Qbtt!gjmufs
2: Q61 Sfnpwf!FD`TNC`DL3-!FD`TNCÈB3!mjol!up!KQ24 Sfnpwf!mjhiu!tfotps!gvodujpo
C C
31 Q53 Bee!D:39-!D:3: FNJ!Sfrvftu

32 Q5: Bee!K2: gps!VTC41-!VTC31!dpmbzpvu!eftjho
Npejgz!K29-!K31 gps!VTC41-!VTC31!dpmbzpvu!eftjho
33 Q25 Bee!R245-!S2458-!S2457 Bee!gps!Gbtu!cppu!TQJ!SPN!tfmfdujpo!cz!FD/
34 Q48-!Q55 Bee!S2455-S2454 Beefe!gps!XMBO!boe!DBSE!sfbefs!Sftfu!tjhobm/
35 Q2: Bee!S2456 Beefe!gps!WFOUVSB!efufdujpo/
B B
A A

PIR (HW)
Custom 0.2
LA-6882P
5 4 3 2 1
5 4 3 2 1
D D
PCH_PWR_EN# 2
U14,+3VALW_PCH
V
AC A1
MODE VIN QH4,+5VALW_PCH
V V
A2 A3 B5
VV
PU2 A5 2
V
PU3
V
B+ +3VALW_PCH
+3VALW B7 2 3
BATT V +5VALW_PCH
BATT
MODE
B1
B2
B+ B4 V
V
V 4 SYS_PWROK
EC
13
PQ2 PCH_RSMRST# PM_DRAM_PWRGD
V
V V PCH
B3 A5 B7 5 14
PBTN_OUT# H_CPUPWRGD
CPU
V V
V
51ON# EC_ON
PM_SLP_S3#
PM_SLP_S4# PLT_RST# 15
C C
PM_SLP_S5#
A4 B6 PM_SLP_A# 6
PM_SLP_SUS#
V
V
ON/OFF V
SYSON 7 SYSON# +1.5V
V
PU5
DGPU_PWR_EN 8a (DIS) VGA_ON
+3VSDGPU
V
Q6 11
SUSP#,SUSP 8
U49
V
VGATE
+5VS
V
+1.5VSDGPU
U40
V
U20
V
+3VS +1.8VSDGPU VGA
U37
B B
V
U13
V
+1.5VS +1.0VSDGPU
PU28
V
PU8
V
+0.75V +VGA_CORE
VCCPPWRGOOD
PU998
V
V
PU9 PU7
+1.05VS_VCCP +VCCSA 8b (DIS)
VGA_PWROK
U47
CK505
VR_ON 9 PU1000
V
10
V
+CPU_CORE
A A

Power sequence
Custom 0.1
LA-6361P
5 4 3 2 1

Scheme Lenovo Y570

Uploaded by

Document Information

Original Description:

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Scheme Lenovo Y570

Uploaded by

Copyright:

Available Formats

A B C D E

PIQY1 M/B Schematics Document

Security Classification Compal Secret Data Compal Electronics, Inc.

Compal confidential http://hobi-elektronika.net POWER & BOARD

Voltage Rails http://hobi-elektronika.net

+5VS Full ON HIGH HIGH HIGH HIGH ON ON ON ON

GPIO3 OUT H Panel Power Enable

GPIO9 OUT - Thermal Alert GPIO5 GPIO6

GPIO13 OUT N/A

GPIO14 OUT N/A

Security Classification Compal Secret Data Compal Electronics, Inc.

PCI EXPRESS* - GRAPHICS

FDI_LSYNC0 J19 G27 PCIE_CTX_GRX_C_N5 C11 1 2

PEG_TX#[14] PCIE_CTX_GRX_C_N0 C16 0.1U_0402_10V6K PCIE_CTX_GRX_N0

K27 PCIE_CTX_GRX_C_P9 C23 1 2

Security Classification Compal Secret Data Compal Electronics, Inc.

AP29 XDP_PRDY# +1.05VS

R22 AR26 XDP_TCK XDP_TMS R20 2 1 51_0402_5%

JTAG & BPM

AR28 XDP_TDI XDP_TCK R24 2 1 51_0402_5%

R29 AL35 XDP_DBRESET# R28 2 1 1K_0402_5% +3VS

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY A

Sandy Bridge_rPGA_Rev1p0 Sandy Bridge_rPGA_Rev1p0

<6> H_DRAMRST# H_DRAMRST# 3 1 DDR3_DRAMRST#_R 1 2 DDR3_DRAMRST# <12,13>

http://hobi-elektronika.netCFG Straps for Processor

JCPU1E PEG Static Lane Reversal - CFG2 is for the 16x

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

Security Classification Compal Secret Data Compal Electronics, Inc.

+CPU_CORE Cap quantity follow HR_PDDG_Rev07

PEG AND DDR

VSS_SENCE 100ohm +-1% pull-down to GND near processor

DDR3 -1.5V RAILS

6/9 change 330U to 22U X2

Sandy Bridge_rPGA_Rev1p0 Sandy Bridge_rPGA_Rev1p0

Security Classification Compal Secret Data Compal Electronics, Inc.

http://hobi-elektronika.net <7> DDR_A_D[0..63]

<7> DDR_CKE0_DIMMA DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA

201 202 SMB_CLK_S3

1 203 VTT1 VTT2 204 +0.75VS

http://hobi-elektronika.net <7> DDR_B_D[0..63]

<7> DDR_CKE2_DIMMB DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB

R97 10K_0402_5% 203 204 +0.75VS

W=20mils W=20mils 1 2 PCH_RTCX2

R114 Q10 AB13 SATA3_COMP 1 2

HDA_SDOUT @ R325 SPI_CS1# HDD_LED#

@ R1346 R127 1 2 SPI_WP# C190

<37> PCIE_PRX_DTX_N2 PCIE_PRX_DTX_N2 BE34 PERN2 SMBDATA C9 PCH_SMBDATA

R149 1 2 0_0402_5% CLK_PCIE_WLAN1#_R AB49 AV22 CLK_CPU_DMI# CLK_CPU_DMI# R349 1 @ 2 10K_0402_5%

R153 1 2 0_0402_5% CLK_PCIE_LAN#_R Y37 BJ30 CLKIN_DMI2# R159 1 2 10K_0402_5%

Reserve for EMI please close to PCH

Reserve for EMI please close to PCH

Security Classification Compal Secret Data Compal Electronics, Inc.

DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0

A SYS_PWROK FDI_INT FDI_INT <5> +RTCVCC

DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 <5>

System Power Management

1 2 PCH_RSMRST#_R C21 H4 SLP_S4#

1 2 SUSWARN#_R K16 F4 SLP_S3#

R1290 2 1 200_0402_5% PM_DRAM_PWRGD

7/28 Modify follow Module Design.