A B C D E F G H

PG110-A00

GP108 64Bit GDDR5 X32

1

HDMI/DP + DVI-D/DP 1

TABLE OF CONTENTS
Page Description
1 Table of Contents
2 Block Diagram
3 PCI Express
4 GPU Frame Buffer
5 FBA bits 31..00
2 2

6 FBA bits 63..32

7 NVVVD Decoupling
8 FBVDDQ and 1V8 Decoupling
9 IFPAB DL-DVI
10 IFPA DP
11 IFPB DP/HDMI
12 JTAG,GPIO&XTAL
13 ROM & STRAPS
14 Power Sequence
15 POWER:1V8 & 5V
3 3

16 POWER: NV3V3, NV12V

17 POWER:PEX_VDD
18 POWER:FBVDDQ
19 POWER:NVVDD
20 POWER:NVVDD
21 Mechanical

4 4

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
Table of Contents
Size Project Name: Design By: Rev

P85C
ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom James Lee V10
PAGE DETAIL Table of Contents
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
Date: Wednesday, April 05, 2017 Sheet 1 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.

A B C D E F G H
 A B C D E F G H

Block Diagram

1 1

NVVDD PH1/2

2 2

FBVDDQ
HDMI
DP

LINK B

FBA LO PEX_VDD PEX_12V

GP108 1V8

FBA HI FAN
3 3
DVI-I

LINK A

DP POWER PEX_3V3
DP

4 4

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
Block Diagram
Size Project Name: Design By: Rev

P85C
ASSEMBLY <ASSEMBLY_DESCRIPTION>
Custom James Lee V10
PAGE DETAIL Block Diagram

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
Date: Wednesday, April 05, 2017 Sheet 2 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.

A B C D E F G H
 A B C D E F G H

PCI Express CN1

12V_PEX 3V3_PEX
NONPHY-X16
12V_PEX 0.400
PLACE DECOUPLING CAPS NEAR PCI-E CONN FINGERS CON_X16 R136 0ohm R133 0ohm JTAG_TRST* 0.400
@electro_mechanic.con_pci_express(sym_1):page3_i2 IN 12
04020.05 ohm COMMON 04020.05 ohm NO STUFF
NO STUFF R134 0ohm JTAG_TCLK
5A 12
C91 C93 C695 C83 04020.05 ohm NO STUFF
IN C84 C86 C693 C694 C684 C681 C679 C683
10uF 10uF 1uF 0.1uF PEX_TRST* 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
B1 +12V TRST* JTAG1 B9 R132 0ohm JTAG_TDI 12
PEX_TCLK
B2 A5
16V 16V 16V 16V IN 16V 16V 16V 16V 6.3V 6.3V 16V 16V
+12V TCLK JTAG2 PEX_TDI
04020.05 ohm NO STUFF
A2 A6
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
R135 0ohm
X6S X6S X7R X7R +12V TDI JTAG3 PEX_TDO 12 JTAG_TDO X7R X7R X7R X7R X6S X6S X7R X7R
A3 A7
OUT
0805 0805 0603 0402 +12V TDO JTAG4 PEX_TMS
04020.05 ohm NO STUFF 0603 0603 0603 0603 0402 0402 0603 0603
1 NO STUFF NO STUFF COMMON COMMON B3 +12V/RSVD TMS JTAG5 A8 R131 0ohm JTAG_TMS 12
COMMON COMMON COMMON COMMON COMMON COMMON NO STUFF NO STUFF 1
IN
3V3_PEX 04020.05 ohm NO STUFF
B8 +3V3 1V8 GND GND GND GND GND GND GND GND
1A A9 +3V3
A10 C569 C567 C543
GND +3V3 22uF 22uF 22uF
R88 R89
100k 100k
B10
4V 4V 4V
3V3_PEX +3V3AUX 5% 5% C677 20% 20% 20%
0402 0402 0.1uF X6S X6S X6S

PEX_PRSNT*
NO STUFF NO STUFF G1A 0603W 0603W 0603W
A1 B5
16V
PRSNT1 SMCLK PEX_SMCLK 12 @digital.u_gpu_gb2c_64(sym_1):page3_i108
NO STUFF NO STUFF NO STUFF
C678 C96 C682 B6 PEX_SMDAT
OUT 10%
10uF 1uF 0.1uF SMDAT BI 12 X7R
BGA595
0402 U502 COMMON

5
1
16V 16V 16V
COMMON
@logic.u_and_2in(sym_1):page3_i54 1/14 PCI_EXPRESS
PEX_B12
B12 4
10% 10% 10%
X6S X7R X7R RSVD GND GND
0805 0603 0402 2 SC70-5 CO-LAYOUT 0805 AND 0603
NO STUFF COMMON COMMON B4 R541
GND COMMON
100k
PEX_VDD
A4 GND 135mA
B7 AA22
5%
GND PEX_DVDD

3
PEX_RST* 0402 PEX_RST_BUF*
A12 GND PERST A11 R1144 0ohm COMMON AC7 PEX_RST PEX_DVDD AB23
B13 AC24 C549 C605 C148 C149 C542 C568 C570
GND GND 04020.05 ohm NO STUFF
SNN_GPU_PEX_CLKREQ* PEX_DVDD 1uF 1uF 4.7uF 4.7uF 10uF 10uF 22uF
A15 GND GND AC6 PEX_CLKREQ PEX_DVDD AD25
B16 AE26
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
GND NET
PEX_REFCLK
DIFFPAIR NV_NETCLASS GND NV_NETCLASS NET PEX_DVDD
B18 A13 AE8 AE27
10% 10% 20% 20% 10% 10% 20%
GND REFCLK PEX_REFCLK*
PEX_REFCLK PEXGEN3_SIGNALS PEX_REFCLK PEX_DVDD X6S X6S X6S X6S X6S X6S X6S
A18 GND REFCLK A14 PEX_REFCLK PEXGEN3_SIGNALS AD8 PEX_REFCLK 0402 0402 0603 0603 0805 0805 0805
COMMON COMMON COMMON COMMON COMMON COMMON NO STUFF
A16 PEX_TXX0 C676 0.22uF PEX_TX0
AC9
PERP0 PEX_TX0 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX0 PLACE UNDER GPU PLACE NEAR GPU MIDWAY BETWEEN GPU AND PS
POWER_BRAKE* A17 PEX_TXX0* C675 0.22uF PEX_TX0*
AB9
PERN0 PEX_TX0 PEXGEN3_SIGNALS 0402 16V PEXGEN3_SIGNALS PEX_TX0
R94 0ohm GND 0402 16V
12 PEX_RX0 COMMON COMMON
B14 AG6
OUT
04020.05 ohm NO STUFF PETP0 PEX_RX0*
PEX_RX0 PEXGEN3_SIGNALS PEX_RX0 GND
2
PETN0 B15 PEX_RX0 PEXGEN3_SIGNALS AG7 PEX_RX0 PEX_HVDD AA10 2
END OF X1 AA12
PEX_HVDD
A21 PEX_TXX1 C674 0.22uF PEX_TX1
AB10 AA13
PERP1 PEX_TX1 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX1 PEX_HVDD
A22 PEX_TXX1* C673 0.22uF PEX_TX1*
AC10 AA16
PEX_B30 PERN1 PEX_TX1 PEXGEN3_SIGNALS 0402 16V PEXGEN3_SIGNALS PEX_TX1 PEX_HVDD 1V8
R97 0ohm B30 RSVD COMMON
0402 16V
COMMON PEX_HVDD AA18 188mA
PEX_RX1
04020.05 ohm NO STUFF PETP1 B19 PEX_RX1 PEXGEN3_SIGNALS AF7 PEX_RX1 PEX_HVDD AA19
PEX_RX1*
PETN1 B20 PEX_RX1 PEXGEN3_SIGNALS AE7 PEX_RX1 PEX_HVDD AA20
A20 AA21 C581 C577 C588 C583 C565 C612 C609 C629 C626
GND PEX_HVDD 1uF 1uF 1uF 1uF 4.7uF 4.7uF 10uF 10uF 22uF
A25 PEX_TXX2 C672 0.22uF PEX_TX2
AD11 AB22
PERP2 PEX_TX2 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX2 PEX_HVDD
B22 A26 PEX_TXX2* C671 0.22uF PEX_TX2*
AC11 AC23 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
GND PERN2 PEX_TX2 PEXGEN3_SIGNALS 0402 16V PEXGEN3_SIGNALS PEX_TX2 PEX_HVDD
AD24
10% 10% 10% 10% 20% 20% 10% 10% 20%
12V_PEX
PEX_RX2 COMMON
0402 16V
COMMON PEX_HVDD X6S X6S X6S X6S X6S X6S X6S X6S X6S
A24 GND PETP2 B23 PEX_RX2 PEXGEN3_SIGNALS AE9 PEX_RX2 PEX_HVDD AE25 0402 0402 0402 0402 0603 0603 0805 0805 0805
PEX_RX2*
nv_cap nv_cap PETN2 B24 PEX_RX2 PEXGEN3_SIGNALS AF9 PEX_RX2 PEX_HVDD AF26 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

B26 GND PEX_HVDD AF27 PLACE UNDER GPU PLACE NEAR GPU MIDWAY BETWEEN GPU AND PS
C94 C90 A29 PEX_TXX3 C663 0.22uF PEX_TX3
AC12
1uF 1uF PERP3 PEX_TX3 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX3
A28 A30 PEX_TXX3* C662 0.22uF PEX_TX3*
AB12
GND PERN3 PEX_TX3 PEXGEN3_SIGNALS 0402 16V PEXGEN3_SIGNALS PEX_TX3
16V 16V
B29 GND COMMON
0402 16V
COMMON CO-LAYOUT 0805 AND 0603 GND
PEX_RX3
A31 B27 AG9
20% 20%
X6S X6S GND PETP3 PEX_RX3*
PEX_RX3 PEXGEN3_SIGNALS PEX_RX3
0603W 0603W B32 GND PETN3 B28 PEX_RX3 PEXGEN3_SIGNALS AG10 PEX_RX3
COMMON COMMON END OF X4
A35 SNN_PEX_TXX4 SNN_PEX_TX4
AB13 C610 C627 C628
PERP4 SNN_PEX_TXX4* SNN_PEX_TX4* PEX_TX4 22uF 22uF 22uF
GND PERN4 A36 AC13 PEX_TX4 4V 4V 4V
GND GND
SNN_PEX_RXX4 SNN_PEX_RX4
B33 AF10
20% 20% 20%
PETP4 SNN_PEX_RXX4* SNN_PEX_RX4* PEX_RX4 1V8 X6S X6S X6S
CO-LAY WITH 0805 CAP PETN4 B34 AE10 PEX_RX4 0603W 0603W 0603W
A34 GND NO STUFF NO STUFF NO STUFF
SNN_PEX_TXX5 SNN_PEX_TX5
PERP5 A39 AD14 PEX_TX5 35mA
SNN_PEX_TXX5* SNN_PEX_TX5*
B36 GND PERN5 A40 AC14 PEX_TX5 PEX_PLL_HVDD AA8
PEX_PLL_HVDD AA9
SNN_PEX_RXX5 SNN_PEX_RX5
A38 GND PETP5 B37 AE12 PEX_RX5 GND
3 B38 SNN_PEX_RXX5* SNN_PEX_RX5*
AF12 C600 3
PETN5 PEX_RX5 0.1uF
B40 GND SNN_PEX_TXX6 SNN_PEX_TX6
A43 AC15
16V
PERP6 SNN_PEX_TXX6* SNN_PEX_TX6*
PEX_TX6
A42 A44 AB15
10%
GND PERN6 PEX_TX6 X7R
0402
SNN_PEX_RXX6 SNN_PEX_RX6
B44 GND PETP6 B41 AG12 PEX_RX6 COMMON
SNN_PEX_RXX6* SNN_PEX_RX6*
PETN6 B42 AG13 PEX_RX6
A46 GND SNN_PEX_TXX7 SNN_PEX_TX7
B47 GND PERP7 A47 AB16 PEX_TX7 GND
SNN_PEX_TXX7* SNN_PEX_TX7*
B49 GND PERN7 A48 AC16 PEX_TX7 PLACE UNDER GPU
A49 GND SNN_PEX_RXX7 SNN_PEX_RX7
PETP7 B45 AF13 PEX_RX7
SNN_PEX_RXX7* SNN_PEX_RX7*
PETN7 B46 AE13 PEX_RX7
END OF X8
SNN_PEX_TXX8 SNN_PEX_TX8
GND PERP8 A52 AD17 PEX_TX8
SNN_PEX_TXX8* SNN_PEX_TX8*
PERN8 A53 AC17 PEX_TX8
B81 PRSNT2 SNN_PEX_RXX8 SNN_PEX_RX8
PETP8 B50 AE15 PEX_RX8
SNN_PEX_RXX8* SNN_PEX_RX8*
PETN8 B51 AF15 PEX_RX8
SNN_PEX_TXX9 SNN_PEX_TX9
PERP9 A56 AC18 PEX_TX9
SNN_PEX_TXX9* SNN_PEX_TX9*
PERN9 A57 AB18 PEX_TX9

PEX LANES 15 - 4 ARE DEFEATURED

A51 GND SNN_PEX_RXX9 SNN_PEX_RX9
PETP9 B54 AG15 PEX_RX9
SNN_PEX_RXX9* SNN_PEX_RX9*
B53 GND PETN9 B55 AG16 PEX_RX9
A54 GND
SNN_PEX_TXX10 SNN_PEX_TX10
PERP10 A60 AB19 PEX_TX10
SNN_PEX_TXX10* SNN_PEX_TX10*
B56 GND PERN10 A61 AC19 PEX_TX10
SNN_PEX_RXX10 SNN_PEX_RX10
A58 GND PETP10 B58 AF16 PEX_RX10
SNN_PEX_RXX10* SNN_PEX_RX10*
4
PETN10 B59 AE16 PEX_RX10 4
B60 GND SNN_PEX_TXX11 SNN_PEX_TX11
PERP11 A64 AD20 PEX_TX11
SNN_PEX_TXX11* SNN_PEX_TX11*
A62 GND PERN11 A65 AC20 PEX_TX11
SNN_PEX_RXX11 SNN_PEX_RX11
B64 GND PETP11 B62 AE18 PEX_RX11
SNN_PEX_RXX11* SNN_PEX_RX11*
PETN11 B63 AF18 PEX_RX11
A66 GND SNN_PEX_TXX12 SNN_PEX_TX12
PERP12 A68 AC21 PEX_TX12
SNN_PEX_TXX12* SNN_PEX_TX12*
B68 GND PERN12 A69 AB21 PEX_TX12
SNN_PEX_RXX12 SNN_PEX_RX12
A70 GND PETP12 B66 AG18 PEX_RX12
SNN_PEX_RXX12* SNN_PEX_RX12*
PETN12 B67 AG19 PEX_RX12
B72 GND SNN_PEX_TXX13 SNN_PEX_TX13
PERP13 A72 AD23 PEX_TX13
SNN_PEX_TXX13* SNN_PEX_TX13*
A74 GND PERN13 A73 AE23 PEX_TX13
SNN_PEX_RXX13 SNN_PEX_RX13
B76 GND PETP13 B70 AF19 PEX_RX13
SNN_PEX_RXX13* SNN_PEX_RX13*
PETN13 B71 AE19 PEX_RX13
A78 GND SNN_PEX_TXX14 SNN_PEX_TX14
PERP14 A76 AF24 PEX_TX14
SNN_PEX_TXX14* SNN_PEX_TX14*
B80 GND PERN14 A77 AE24 PEX_TX14
A82 GND SNN_PEX_RXX14 SNN_PEX_RX14
PETP14 B74 AE21 PEX_RX14
SNN_PEX_RXX14* SNN_PEX_RX14*
PETN14 B75 AF21 PEX_RX14
SNN_PEX_TXX15 SNN_PEX_TX15
GND PERP15 A80 AG24 PEX_TX15
SNN_PEX_TXX15* SNN_PEX_TX15*
PERN15 A81 AG25 PEX_TX15
SNN_PEX_RXX15 SNN_PEX_RX15
PETP15 B78 AG21 PEX_RX15
SNN_PEX_RXX15* SNN_PEX_RX15*
5
PETN15 B79 AG22 PEX_RX15 5

END OF X16
PEX_TERMP
PEX_TERMP AF25 R514 2.49k

50OHM_NETCLASS1
0402 1% COMMON
Galaxy Microsystems (HK) Ltd.
Page Name:
GND PCI Express
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL PCI Express
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 3 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

GPU Frame Buffer

G1B
@digital.u_gpu_gb2c_64(sym_2):page4_i151
FBA_D[63..0] 5,6 BGA595
OUT COMMON

2/14 FBA
FBA_D0
0 E18 FBA_D0
FBA_D1
1 F18 FBA_D1
FBA_D2
2 E16 FBA_D2
FBA_D3
3 F17 FBA_D3
FBA_D4
1 4 D20 FBA_D4 1
FBA_D5
5 D21 FBA_D5
FBA_D6
6 F20 FBA_D6
FBA_D7
7 E21 FBA_D7
FBA_D8
8 E15 FBA_D8
FBA_D9
9 D15 FBA_D9
FBA_D10
10 F15 FBA_D10
FBA_D11
11 F13 FBA_D11
FBA_D12
12 C13 FBA_D12
FBA_D13
13 B13 FBA_D13
FBA_D14
14 E13 FBA_D14
FBA_D15
15 D13 FBA_D15
FBA_D16
16 B15 FBA_D16
FBA_D17
17 C16 FBA_D17
FBA_D18
18 A13 FBA_D18
FBA_D19
19 A15 FBA_D19
FBA_D20
20 B18 FBA_D20
FBA_D21
21 A18 FBA_D21
FBA_D22
22 A19 FBA_D22
FBA_D23
23 C19 FBA_D23
FBA_D24
24 B24 FBA_D24
FBA_D25
25 C23 FBA_D25
FBA_D26
26 A25 FBA_D26
FBA_D27
27 A24 FBA_D27
FBA_D28
28 A21 FBA_D28
FBA_D29
29 B21 FBA_D29
FBA_D30
30 C20 FBA_D30
FBA_D31
31 C21 FBA_D31 FBA_CMD[31..0] 5,6 FB_CMD
FBA_D32
R22
OUT
32
FBA_D33
FBA_D32 FBA_CMD0
2 33 R24 FBA_D33 FBA_CMD0 C27 0 2
FBA_D34 FBA_CMD1
34 T22 FBA_D34 FBA_CMD1 C26 1
FBA_D35 FBA_CMD2
35 R23 FBA_D35 FBA_CMD2 E24 2
FBA_D36 FBA_CMD3
36 N25 FBA_D36 FBA_CMD3 F24 3
FBA_D37 FBA_CMD4
37 N26 FBA_D37 FBA_CMD4 D27 4
FBA_D38 FBA_CMD5
38 N23 FBA_D38 FBA_CMD5 D26 5
FBA_D39 FBA_CMD6
39 N24 FBA_D39 FBA_CMD6 F25 6
FBA_D40 FBA_CMD7
40 V23 FBA_D40 FBA_CMD7 F26 7
FBA_D41 FBA_CMD8
41 V22 FBA_D41 FBA_CMD8 F23 8
FBA_D42 FBA_CMD9
42 T23 FBA_D42 FBA_CMD9 G22 9
FBA_D43 FBA_CMD10
43 U22 FBA_D43 FBA_CMD10 G23 10
FBA_D44 FBA_CMD11
44 Y24 FBA_D44 FBA_CMD11 G24 11
FBA_D45 FBA_CMD12
45 AA24 FBA_D45 FBA_CMD12 F27 12
FBA_D46 FBA_CMD13
46 Y22 FBA_D46 FBA_CMD13 G25 13
FBA_D47 FBA_CMD14
47 AA23 FBA_D47 FBA_CMD14 G27 14
FBA_D48 FBA_CMD15
48 AD27 FBA_D48 FBA_CMD15 G26 15
FBA_D49 FBA_CMD16
49 AB25 FBA_D49 FBA_CMD16 M24 16 FBVDDQ
FBA_D50 FBA_CMD17
50 AD26 FBA_D50 FBA_CMD17 M23 17
FBA_D51 FBA_CMD18
51 AC25 FBA_D51 FBA_CMD18 K24 18
FBA_D52 FBA_CMD19
52 AA27 FBA_D52 FBA_CMD19 K23 19
FBA_D53 FBA_CMD20
53 AA26 FBA_D53 FBA_CMD20 M27 20
FBA_D54 FBA_CMD21
54 W26 FBA_D54 FBA_CMD21 M26 21 CKE*
FBA_D55 FBA_CMD22
55 Y25 FBA_D55 FBA_CMD22 M25 22
FBA_D56 FBA_CMD23 FBA_CMD30
56 R26 FBA_D56 FBA_CMD23 K26 23 R505 10k
FBA_D57 FBA_CMD24
57 T25 FBA_D57 FBA_CMD24 K22 24 0402 5% COMMON
FBA_D58 FBA_CMD25
58 N27 FBA_D58 FBA_CMD25 J23 25
FBA_D59 FBA_CMD26
59 R27 FBA_D59 FBA_CMD26 J25 26
FBA_D60 FBA_CMD27
60 V26 FBA_D60 FBA_CMD27 J24 27
FBA_D61 FBA_CMD28
61 V27 FBA_D61 FBA_CMD28 K27 28
FBA_D62 FBA_CMD29 FBA_CMD14
W27 FBA_D62 FBA_CMD29 K25 R503 10k
FB_DBI
62 29
FBA_D63 FBA_CMD30
3 63 W25 FBA_D63 FBA_CMD30 J27 30 0402 5% COMMON 3
FBA_CMD31
FBA_CMD31 J26 31
SNN_FBA_CMD32
FBA_DBI[7..0] 5,6 FBA_CMD32 B19
FBA_DBI0 FBA_CMD34_DEBUG
D19 F22
OUT
0
FBA_DBI1 FBA_DQM0 FBA_CMD34 FBA_CMD35_DEBUG TP501
1 D14 FBA_DQM1 FBA_CMD35 J22 TP502
FBA_DBI2
2 C17 FBA_DQM2
FOR DEBUG
RESET*
FBA_DBI3
3 C22 FBA_DQM3
FBA_DBI4 FBA_CMD13
4 P24 FBA_DQM4
R509 10k
FBA_DBI5
5 W24 FBA_DQM5 0402 5% COMMON
FBA_DBI6
AA25 FBA_DQM6
FB_EDC
6
FBA_DBI7
7 U25 FBA_DQM7
R510 10k FBA_CMD29

FBA_EDC[7..0] 5,6 0402 5% COMMON

FBA_EDC0
E19
OUT
0
FBA_EDC1 FBA_DQS_WP0
1 C15 FBA_DQS_WP1
FBA_EDC2
2 B16 FBA_DQS_WP2 FBA_CLK0 D24 FBA_CLK0 FBA_CLK0 5 FB_CLK
FBA_EDC3
B22 D25
OUT
3
FBA_DQS_WP3 FBA_CLK0 FBA_CLK0* FBA_CLK0 5 FB_CLK
FBA_EDC4
R25 N22
OUT
4
FBA_DQS_WP4 FBA_CLK1 FBA_CLK1 FBA_CLK1 6 FB_CLK
FBA_EDC5
W23 M22
OUT
5
FBA_DQS_WP5 FBA_CLK1 FBA_CLK1* FBA_CLK1 6 FB_CLK
FBA_EDC6
AB26
OUT
6
FBA_EDC7
FBA_DQS_WP6
7 T26 FBA_DQS_WP7
GND

SNN_FBA_DQS_RN0
F19 FBA_DQS_RN0 FBA_WCK01 D18 FBA_WCK01 FBA_WCK01 5 FB_WCK
SNN_FBA_DQS_RN1
C14 C18
OUT
FBA_DQS_RN1 FBA_WCK01 FBA_WCK01* FBA_WCK01 5 FB_WCK
SNN_FBA_DQS_RN2
A16 D17
OUT
FBA_DQS_RN2 FBA_WCK23 FBA_WCK23 FBA_WCK23 5 FB_WCK
SNN_FBA_DQS_RN3
A22 D16
OUT
FBA_DQS_RN3 FBA_WCK23 FBA_WCK23* FBA_WCK23 5 FB_WCK
SNN_FBA_DQS_RN4
P25 T24
OUT
FBA_DQS_RN4 FBA_WCK45 FBA_WCK45 FBA_WCK45 6 FB_WCK
SNN_FBA_DQS_RN5
W22 U24
OUT
FBA_DQS_RN5 FBA_WCK45 FBA_WCK45* FBA_WCK45 6 FB_WCK
SNN_FBA_DQS_RN6
AB27 V24
OUT
FBA_DQS_RN6 FBA_WCK67 FBA_WCK67 FBA_WCK67 6 FB_WCK 1V8
SNN_FBA_DQS_RN7
T27 V25
OUT
4 FBA_WCK67* 4
FBA_DQS_RN7 FBA_WCK67 FBA_WCK67 6 FB_WCK
OUT

104.5mA
FB_PLL_AVDD
FB_PLL_AVDD F16 LB501 30ohm
BEAD_0603 COMMON

FB_PLL_AVDD P22

FB_REFPLL_AVDD H22

C552
C555 C554 C579 C553 22uF
0.1uF 0.1uF 0.1uF 22uF 4V
16V 16V 16V 6.3V 20%
10% 10% 10% 20% X6S
X7R X7R X7R X6S 0603W
0402 0402 0402 0805 NO STUFF
SNN_FB_VREF_D32
D23 FB_VREF COMMON COMMON COMMON COMMON

GND GND GND GND

CO-LAYOUT 0805 AND 0603

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
GPU Frame Buffer
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL GPU Frame Buffer
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 4 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

FBA bits 31..00 M1B

@memory.u_mem_sd_ddr5_x32(sym_6):page5_i98
M1D BGA170
FBVDDQ
FBA_CMD[15..0] COMMON

Normal
IN 4 @memory.u_mem_sd_ddr5_x32(sym_5):page5_i94
GDDR5_BGA170_MIRR FBVDDQ
BGA170
COMMON
J1 MF_VSS/SOE*
FBA_CMD12
12 G3 RAS
CMD 0..31 32..63
add 1k to VSS
FBA_CMD15
L3 B10 C10 C517 C530 C523 C515 C525 C514 C539 C535
15
FBA_CMD5
CAS VSS VDD 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
5 L12 WE B5 VSS VDD C5
FBA_CMD0
0 G12 CS D10 VSS VDD D11 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

G10 G1
10% 10% 10% 10% 10% 10% 10% 10%
CMD0 CS* VSS VDD X6S X6S X6S X6S X6S X6S X6S X6S
FBA_CMD8
1 CMD1 A3_BA3 8 J4 ABI G5 VSS VDD G11 0402 0402 0402 0402 0402 0402 0402 0402 1
CMD2 A2_BA0 H1 VSS VDD G14 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
FBA_CMD10
CMD3 A4_BA2 10 H4 A0_A10 H14 VSS VDD G4
FBA_CMD11
CMD4 A5_BA1 11 H5 A1_A9 K1 VSS VDD L1
FBA_CMD2
CMD5 WE* 2 H11 A2_BA0 K14 VSS VDD L11
FBA_CMD1
CMD6 A7_A8 1 H10 A3_BA3 L10 VSS VDD L14
CMD7 A6_A11 3
FBA_CMD3
K11 A4_BA2 L5 VSS VDD L4 GND
FBA_CMD4
CMD8 ABI* 4 K10 A5_BA1 P10 VSS VDD P11
FBA_CMD7
CMD9 A12_RFU 7 K5 A6_A11 T10 VSS VDD R10

PLACE Directly Under DRAM

FBA_CMD6
CMD10 A0_A10 6 K4 A7_A8 T5 VSS VDD R5
FBA_CMD9
CMD11 A1_A9 9 J5 RFU_A12
CMD12 RAS* A1 VSSQ VDDQ B1
CMD13 RST* A12 VSSQ VDDQ B12
CMD14 CKE* A14 VSSQ VDDQ B14
CMD15 CAS* A3 VSSQ VDDQ B3
CMD16 CS* C1 VSSQ VDDQ D1
FBA_CMD13
CMD17 A3_BA3 13 J2 RESET C11 VSSQ VDDQ D12
FBA_CMD14
CMD18 A2_BA0 14 J3 CKE C12 VSSQ VDDQ D14
CMD19 A4_BA2 C14 VSSQ VDDQ D3
CMD20 A5_BA1 FBA_CLK0
4 J12 CLK C3 VSSQ VDDQ E10
J11 C4 E5
IN
CMD21 WE* FBA_CLK0*
4 CLK VSSQ VDDQ
E1 F1 FBVDDQ
IN
CMD22 A7_A8 VSSQ VDDQ
CMD23 A6_A11 R144 R143 E12 F12
40.2ohm 40.2ohm VSSQ VDDQ
CMD24 ABI* E14 VSSQ VDDQ F14
CMD25 A12_RFU 1%
0402
1%
0402
E3 VSSQ VDDQ F3
CMD26 A0_A10 COMMON COMMON F10 VSSQ VDDQ G13
CMD27 A1_A9 F5 G2 C520 C534 C155 C501 C518 C513 C511 C531 C157 C156
FBA_CLK0_CM
VSSQ VDDQ 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
CMD28 RAS* H13 VSSQ VDDQ H12
CMD29 RST* H2 VSSQ VDDQ H3 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

2 CMD30 CKE* C153 SNN_FBA_RFU_1

A5 K13 K12
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
2
10nF SNN_FBA_RFU_2 NC_RFU_A5 VSSQ VDDQ X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
CMD31 CAS* V5 NC_RFU_V5 K2 VSSQ VDDQ K3 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
25V
M10 VSSQ VDDQ L13 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
M5 L2
10%
X7R VSSQ VDDQ
0402 N1 VSSQ VDDQ M1
FBVDDQ COMMON N12 VSSQ VDDQ M12
N14 VSSQ VDDQ M14
GND N3 VSSQ VDDQ M3 GND
R502 R1 N10
549ohm VSSQ VDDQ
6 R11 VSSQ VDDQ N5 FBVDDQ
R12 P1
1% OUT
0402 VSSQ VDDQ
COMMON R14 VSSQ VDDQ P12
FBA_VREFC J14 VREFC R3 VSSQ VDDQ P14
0.300 0.140A R4 VSSQ VDDQ P3
R506 R504 C159 R507 121ohm FBA_ZQ_1
J13 V1 T1
1.33k 931ohm 820pF ZQ VSSQ VDDQ
V12 T12 C502 C503 C504 C505
0402 1% COMMON VSSQ VDDQ 10uF 10uF 10uF 10uF
1%
0402
1%
0402
50V
J10 SEN V14 VSSQ VDDQ T14
V3 T3
10% 4V 4V 4V 4V
COMMON COMMON X7R VSSQ VDDQ 20% 20% 20% 20%
0402 X6S X6S X6S X6S
COMMON 0603 0603 0603 0603
COMMON COMMON COMMON COMMON
GND GND GND

GND

GND

3 FBA_VREF_Q PLACE CLOSE TO DRAM

1G1D1S
D Q501 0.300
3 @discrete.q_fet_n_enh(sym_2):page5_i7 3
GPIO10_FBVREF_SEL12 1G SOT323_1G1D1S
COMMON
2
IN
S
R501
10k
30V
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
5% 1.2A

0402 0.2W

COMMON
12V
FBVDDQ

GND
GND

C163 C160 C161 C162

10uF 10uF 22uF 22uF
4V 4V 4V 4V
20% 20% 20% 20%
X6S X6S X6S X6S
FBA_D[31..0]
4 0603 0603 0603W 0603W
BI
COMMON COMMON COMMON COMMON

M1A M1C
@memory.u_mem_sd_ddr5_x32(sym_1):page5_i76
BGA170
@memory.u_mem_sd_ddr5_x32(sym_3):page5_i97
BGA170
GND
COMMON COMMON

NORMAL NORMAL PLACE Around DRAM

FBA_D0 FBA_D16
0 A4 DQ0 16 V11 DQ16
FBA_D1 FBA_D17
FB_DBI 1 A2 DQ1 17 V13 DQ17
FBA_DBI[7..0] FBA_D2
B4 FBA_D18
T11
4,6 FBA_DBI0
2
FBA_D3 DQ2 18
FBA_D19 DQ18
B2 T13
BI
0
FBA_DBI1
3
FBA_D4
DQ3 19
FBA_D20
DQ19
4 1 4 E4 DQ4 20 N11 DQ20 4
FBA_DBI2 FBA_D5 FBA_D21
2 5 E2 DQ5 21 N13 DQ21
FBA_DBI3 FBA_D6 FBA_D22
3 6 F4 DQ6 22 M11 DQ22
FBA_DBI4 FBA_D7 FBA_D23
4 7 F2 DQ7 23 M13 DQ23
FBA_DBI5
5
FBA_DBI6 FBA_EDC0 FBA_EDC2
6 C2 EDC0 R13 EDC2
FBA_DBI7 FBA_DBI0 FBA_DBI2
7 D2 DBI0 P13 DBI2
FB_EDC VREFD A10SNN_FBA_VREFD_1 VREFD V10 SNN_FBA_VREFD_2
FBA_EDC[7..0]
OUT 4,6 FBA_EDC0
0 x32 x16 x32 x16
FBA_EDC1 FBA_D8 FBA_D24
1 8 A11 DQ8 24 V4 DQ24
FBA_EDC2 FBA_D9 FBA_D25
A13 V2
NC NC
2
FBA_EDC3
9
FBA_D10 DQ9 25
FBA_D26 DQ25
B11 T4
NC NC
3
FBA_EDC4
10
FBA_D11
DQ10 NC
26
FBA_D27
DQ26 NC
4 11 B13 DQ11 27 T2 DQ27
FBA_EDC5 FBA_D12 FBA_D28
E11 N4
NC NC
5
FBA_EDC6
12
FBA_D13
DQ12 NC
28
FBA_D29
DQ28 NC
6 13 E13 DQ13 29 N2 DQ29
FBA_EDC7 FBA_D14 FBA_D30
F11 M4
NC NC
7 14
FBA_D15 DQ14 30
FBA_D31 DQ30
F13 M2
NC NC
15
DQ15 NC
31
DQ31 NC

FBA_EDC1 FBA_EDC3
C13 EDC1 GND
R2 EDC3
FBA_DBI1 FBA_DBI3 NC
D13 DBI1 NC
P2 DBI3 NC

4 FBA_WCK01 D4 WCK01 4 FBA_WCK23 P4 WCK23

D5 P5
IN IN
4 FBA_WCK01* WCK01 4 FBA_WCK23* WCK23
IN IN

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
FBA bits 31..00
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL FBA bits 31..00
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 5 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

FBA bits 63..32

FBVDDQ
FBVDDQ
GDDR5_BGA170_MIRR
1 1
M2B
@memory.u_mem_sd_ddr5_x32(sym_7):page6_i87
FBA_CMD[31..16]
CMD 0..31 32..63
4 BGA170_MIRR
IN
COMMON
C521 C524 C538 C528 C536 C510 C516 C529
M2D
Mirrored
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
@memory.u_mem_sd_ddr5_x32(sym_5):page6_i77 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
BGA170_MIRR
J1
10% 10% 10% 10% 10% 10% 10% 10%
CMD0 CS* COMMON SOE*/MF_VDD X6S X6S X6S X6S X6S X6S X6S X6S
CMD1 A3_BA3 add 1k to VDD 0402 0402 0402 0402 0402 0402 0402 0402
FBA_CMD28
CMD2 A2_BA0 28 L3 RAS B10 VSS VDD C10 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
FBA_CMD31
CMD3 A4_BA2 31 G3 CAS B5 VSS VDD C5
FBA_CMD21
CMD4 A5_BA1 21 G12 WE D10 VSS VDD D11
FBA_CMD16
CMD5 WE* 16 L12 CS G10 VSS VDD G1
CMD6 A7_A8 G5 VSS VDD G11
FBA_CMD24
CMD7 A6_A11 24 J4 ABI H1 VSS VDD G14
CMD8 ABI* H14 VSS VDD G4 GND
FBA_CMD26
CMD9 A12_RFU 26 K4 A0_A10 K1 VSS VDD L1

PLACE Directly Under DRAM

FBA_CMD27
CMD10 A0_A10 27 K5 A1_A9 K14 VSS VDD L11
FBA_CMD18
CMD11 A1_A9 18 K11 A2_BA0 L10 VSS VDD L14
FBA_CMD17
CMD12 RAS* 17 K10 A3_BA3 L5 VSS VDD L4
FBA_CMD19
CMD13 RST* 19 H11 A4_BA2 P10 VSS VDD P11
FBA_CMD20
CMD14 CKE* 20 H10 A5_BA1 T10 VSS VDD R10
FBA_CMD23
CMD15 CAS* 23 H5 A6_A11 T5 VSS VDD R5
FBA_CMD22
CMD16 CS* 22 H4 A7_A8
FBA_CMD25
CMD17 A3_BA3 25 J5 RFU_A12 A1 VSSQ VDDQ B1
CMD18 A2_BA0 A12 VSSQ VDDQ B12
CMD19 A4_BA2 A14 VSSQ VDDQ B14
CMD20 A5_BA1 A3 VSSQ VDDQ B3
CMD21 WE* C1 VSSQ VDDQ D1 FBVDDQ
CMD22 A7_A8 C11 VSSQ VDDQ D12
FBA_CMD29
2 CMD23 A6_A11 29 J2 RESET C12 VSSQ VDDQ D14 2
FBA_CMD30
CMD24 ABI* 30 J3 CKE C14 VSSQ VDDQ D3
CMD25 A12_RFU C3 VSSQ VDDQ E10
CMD26 A0_A10 FBA_CLK1 J12 C4 E5 C158 C533 C526 C154 C537 C519 C512 C540 C532 C522
4 CLK VSSQ VDDQ 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
J11 E1 F1
IN
CMD27 A1_A9 FBA_CLK1* 4 CLK VSSQ VDDQ
E12 F12
IN 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
CMD28 RAS* VSSQ VDDQ
E14 F14
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
CMD29 RST* VSSQ VDDQ X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
CMD30 CKE* R512 R511 E3 F3
40.2ohm 40.2ohm VSSQ VDDQ 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
CMD31 CAS* F10 VSSQ VDDQ G13 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
1%
0402
1%
0402
F5 VSSQ VDDQ G2
COMMON COMMON H13 VSSQ VDDQ H12
FBA_CLK1_CM
H2 VSSQ VDDQ H3
K13 VSSQ VDDQ K12
C541 SNN_FBA_RFU7
A5 K2 K3
10nF NC_RFU_A5 VSSQ VDDQ
SNN_FBA_RFU8
V5 NC_RFU_V5 M10 VSSQ VDDQ L13 GND
25V
M5 VSSQ VDDQ L2 FBVDDQ
N1 M1
10%
X7R VSSQ VDDQ
0402 N12 VSSQ VDDQ M12
COMMON N14 VSSQ VDDQ M14
N3 VSSQ VDDQ M3
GND R1 VSSQ VDDQ N10
R11 N5 C509 C507 C506 C508
VSSQ VDDQ 10uF 10uF 10uF 10uF
R12 VSSQ VDDQ P1
R14 VSSQ VDDQ P12 4V 4V 4V 4V

R3 P14
20% 20% 20% 20%
VSSQ VDDQ X6S X6S X6S X6S
5 FBA_VREFC J14 VREFC R4 VSSQ VDDQ P3 0603 0603 0603 0603
V1 T1
IN
COMMON COMMON COMMON COMMON
VSSQ VDDQ
C527 R508 121ohm FBA_ZQ_2_B
J13 V12 T12
820pF ZQ VSSQ VDDQ
0402 1% COMMON V14 VSSQ VDDQ T14
50V
10%
J10 SEN V3 VSSQ VDDQ T3
3 3
X7R
0402 GND

PLACE CLOSE TO DRAM

COMMON

GND GND GND

FBVDDQ

FBA_D[63..32] C167 C164 C165 C166

BI 4 10uF 10uF 22uF 22uF
4V 4V 4V 4V
M2A M2C 20% 20% 20% 20%
X6S X6S X6S X6S
@memory.u_mem_sd_ddr5_x32(sym_2):page6_i66 @memory.u_mem_sd_ddr5_x32(sym_4):page6_i88
BGA170_MIRR BGA170_MIRR 0603 0603 0603W 0603W
COMMON COMMON COMMON COMMON COMMON COMMON

MIRRORED MIRRORED

FB_DBI x32 x16 x32 x16

FBA_DBI[7..0] FBA_D32
V4 FBA_D48
A11
4,5 FBA_DBI0
32
FBA_D33 DQ0 48
FBA_D49 DQ16
V2 A13
BI NC NC
0 33
DQ1 49
DQ17
FBA_DBI1 FBA_D34 FBA_D50 GND
NC NC
1 34 T4 DQ2 50 B11 DQ18
FBA_DBI2 FBA_D35 FBA_D51
T2 B13
NC NC
2 35
DQ3 51
DQ19

PLACE Around DRAM

FBA_DBI3 FBA_D36 NC
FBA_D52 NC
4 3 36 N4 DQ4 52 E11 DQ20 4
FBA_DBI4 FBA_D37 FBA_D53
N2 E13
NC NC
4
FBA_DBI5
37
FBA_D38 DQ5 53
FBA_D54 DQ21
M4 F11
NC NC
5
FBA_DBI6
38
FBA_D39
DQ6 NC
54
FBA_D55
DQ22 NC
6 39 M2 DQ7 55 F13 DQ23
FBA_DBI7 NC NC
7
FBA_EDC4 FBA_EDC6
FB_EDC R2 EDC0 C13 EDC2
FBA_EDC[7..0] FBA_DBI4
P2 FBA_DBI6
D13
NC GND

IN 4,5 FBA_EDC0 DBI0 NC DBI2 NC

0
1
FBA_EDC1
FBA_EDC2
2
VREFD V10SNN_FBA_VREFD_3 VREFD A10SNN_FBA_VREFD_4
FBA_EDC3 FBA_D40 FBA_D56
3 40 V11 DQ8 56 A4 DQ24
FBA_EDC4 FBA_D41 FBA_D57
4 41 V13 DQ9 57 A2 DQ25
FBA_EDC5 FBA_D42 FBA_D58
5 42 T11 DQ10 58 B4 DQ26
FBA_EDC6 FBA_D43 FBA_D59
6 43 T13 DQ11 59 B2 DQ27
FBA_EDC7 FBA_D44 FBA_D60
7 44 N11 DQ12 60 E4 DQ28
FBA_D45 FBA_D61
45 N13 DQ13 61 E2 DQ29
FBA_D46 FBA_D62
46 M11 DQ14 62 F4 DQ30
FBA_D47 FBA_D63
47 M13 DQ15 63 F2 DQ31
FBA_EDC5 FBA_EDC7
R13 EDC1 C2 EDC3
FBA_DBI5 FBA_DBI7
P13 DBI1 D2 DBI3

FBA_WCK45 4 P4 WCK01 FBA_WCK67 4 D4 WCK23

P5 D5
IN IN
FBA_WCK45* 4 WCK01 FBA_WCK67* 4 WCK23
IN IN

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
FBA bits 31..00
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL FBA bits 63..32
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 6 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

NVVVD Decoupling
G1D
NVVDD
@digital.u_gpu_gb2c_64(sym_7):page7_i55
BGA595
COMMON

7/14 VDDS

NVVDD
L11 VDDS
L17 VDDS
M14 VDDS
1 P10 VDDS 1
P12 VDDS
C584 C575 C586 C566 C585 P16
1uF 1uF 1uF 1uF 1uF VDDS
PLACE UNDER GPU P18 VDDS
T14
6.3V 6.3V 6.3V 6.3V 6.3V
VDDS
U11
10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S VDDS
0402 0402 0402 0402 0402 U17 VDDS
COMMON COMMON COMMON COMMON COMMON

nv_res GPU_NVVDD_VSENSE
GM108 R524 0ohm
C576 C587 C604 C582 04020.05 ohm NO STUFF
10uF 10uF 10uF 10uF C615 C608 C598 C578 GPU_NVDS_VSENSE
RSVD VDDS_SENSE F4 nv_res
10uF 10uF 10uF 10uF GPU_GND_S_GSENSE
6.3V 6.3V 6.3V 6.3V
GNDS_SENSE F3 R525 0ohm GPU_NVVDD_GNDSNS
20% 20% 20% 20% 6.3V 6.3V 6.3V 6.3V RSVD
04020.05 ohm NO STUFF
X6S X6S X6S X6S 20% 20% 20% 20%
0603 0603 0603 0603 X6S X6S X6S X6S
COMMON COMMON COMMON COMMON 0603 0603 0603 0603
COMMON COMMON COMMON COMMON

G1C
@digital.u_gpu_gb2c_64(sym_11):page7_i54
BGA595
C580 C592 C597 C602 COMMON
GND
10uF 10uF 10uF 10uF
11/14 NVVDD
K10
6.3V 6.3V 6.3V 6.3V
VDD
K12
20% 20% 20% 20%
X6S X6S X6S X6S VDD
0603 0603 0603 0603 K14 VDD
2 COMMON COMMON COMMON COMMON K16 VDD 2
K18 VDD
L13 VDD
L15 VDD
M10 VDD
M12 VDD
GND M16 VDD
M18 VDD
N11 VDD
N13 VDD
N15 VDD
PLACE NEAR GPU CO-Layout 0603 and 0805 N17 VDD
P14 VDD
R11 VDD
R13 VDD
R15 VDD
C634 C635 C638 C639 C636 C637 C649 C650 C655 C654 R17
22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 10uF 22uF VDD
T10 VDD
T12
10V 4V 10V 4V 10V 4V 10V 4V 16V 4V
VDD
T16
10% 20% 10% 20% 10% 20% 10% 20% 10% 20%
X7R X6S X7R X6S X7R X6S X7R X6S X6S X6S VDD
0805 0603W 0805 0603W 0805 0603W 0805 0603W 0805 0603W T18 VDD
COMMON NO STUFF COMMON NO STUFF COMMON NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF U13 VDD
U15 VDD
V10 VDD
V12 VDD
V14 VDD
V16 VDD nv_res
V18 VDD
R122 0ohm
19 OUT
04020.05 ohm COMMON
C647 C648 C653 C652 C139 C120 C146 C145 C138 C137
3
10uF 22uF 10uF 22uF 10uF 22uF 10uF 22uF 10uF 22uF 3
GPU_NVVDD_VSENSE_L
16V 4V 16V 4V 16V 4V 16V 4V 16V 4V
VDD_SENSE F2 nv_res
GPU_NVVDD_GNDSNS_L
F1 R117 0ohm
10% 20% 10% 20% 10% 20% 10% 20% 10% 20%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S GND_SENSE 19 OUT
0805 0603W 0805 0603W 0805 0603W 0805 0603W 0805 0603W 04020.05 ohm COMMON
NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF

C144 C143 C136 C135 C142 C141 C133 C134 C128 C127
10uF 22uF 10uF 22uF 10uF 22uF 10uF 22uF 10uF 22uF
16V 4V 16V 4V 16V 4V 16V 4V 16V 4V
10% 20% 10% 20% 10% 20% 10% 20% 10% 20%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S G1E
0805 0603W 0805 0603W 0805 0603W 0805 0603W 0805 0603W NVVDD @digital.u_gpu_gb2c_64(sym_6):page7_i56 NVVDD
NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF BGA595
COMMON

6/14 XVDD

G1 XVDD XVDD N4
G2 XVDD XVDD N5
G3 XVDD XVDD N7
C119 C140 C132 C131 C641 C640 C129 C130 G4 P3
22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF XVDD XVDD
G5 XVDD XVDD P4
G6 P6
6.3V 4V 6.3V 4V 6.3V 4V 6.3V 4V
XVDD XVDD
G7 R1
20% 20% 20% 20% 20% 20% 20% 20%
X6S X6S X6S X6S X6S X6S X6S X6S XVDD XVDD
0805 0603W 0805 0603W 0805 0603W 0805 0603W H3 XVDD XVDD R2
4 NO STUFF NO STUFF NO STUFF NO STUFF COMMON NO STUFF NO STUFF NO STUFF H4 XVDD XVDD R3 4
H6 XVDD XVDD R4
J1 XVDD XVDD R5
J2 XVDD XVDD R6
J3 XVDD XVDD R7
J4 XVDD XVDD T1
J5 XVDD XVDD T2
C644 C658 J6 XVDD XVDD T3
C642 C643 C646 C645 C656 C657 C661 C660 J7 T4
330uF 22uF 22uF 22uF 22uF 330uF 22uF 22uF 22uF 22uF XVDD XVDD
K1 XVDD XVDD T5
K2 T6
NO STUFF 4V 6.3V 6.3V 4V NO STUFF 6.3V 4V 6.3V 4V
20% 20% XVDD XVDD
K3 T7
20% 20% 20% 20% 20% 20% 20% 20%
2V@105degC X6S X6S X6S X6S 2V@105degC X6S X6S X6S X6S XVDD XVDD
AL-Polymer 0603W 0805 0805 0603W AL-Polymer 0805 0603W 0805 0603W K4 XVDD XVDD U3
3.5A@105degC,100KHz NO STUFF COMMON COMMON NO STUFF 3.5A@105degC,100KHz NO STUFF NO STUFF NO STUFF NO STUFF K5 XVDD XVDD U4
K6 U6
0.006ohm 0.006ohm
SMD_7343 SMD_7343 XVDD XVDD
K7 XVDD XVDD V1
L3 XVDD XVDD V2
L4 XVDD XVDD V3
M1 XVDD GM108 XVDD V4
GND M2 XVDD XVDD V5
CO-Layout 0603, 0805 and POSCAP M3 XVDD XVDD V6
M4 XVDD XVDD V7
RSVD
M5 XVDD XVDD W1
C630 M7 XVDD XVDD W2
C623 C622 C631 N1 W3
330uF 10uF 22uF 22uF XVDD XVDD
C632 N2 W4
22uF XVDD XVDD
N3
NO STUFF 16V 4V 6.3V
20% 10% 20% 20% 4V
XVDD
2V@105degC X6S X6S X6S 20%
AL-Polymer 0805 0603W 0805 X6S
3.5A@105degC,100KHz COMMON NO STUFF COMMON 0603W
0.006ohm
5 NO STUFF 5
SMD_7343

Galaxy Microsystems (HK) Ltd.

GND
Page Name:
NVVVD Decoupling
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL NVVVD Decoupling
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 7 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

FBVDDQ and 1V8 Decoupling

G1H
FBVDDQ G1G @digital.u_gpu_gb2c_64(sym_13):page8_i47
@digital.u_gpu_gb2c_64(sym_12):page8_i44 BGA595
BGA595 COMMON
COMMON
~5A@1.5V 13/14 GND
12/14 FBVDDQ
A2 GND GND K11
B26 FBVDDQ AB17 GND GND K13
1 C25 FBVDDQ AB20 GND GND K15 1
C590 C563 C561 C562 E23 AB24 K17
1uF 1uF 1uF 1uF FBVDDQ GND GND
E26 FBVDDQ AC2 GND GND L10
6.3V 6.3V 6.3V 6.3V
F14 FBVDDQ AC22 GND GND L12
F21 AC26 L14
10% 10% 10% 10%
X6S X6S X6S X6S FBVDDQ GND GND
0402 0402 0402 0402 G13 FBVDDQ AC5 GND GND L16
COMMON COMMON COMMON COMMON G14 FBVDDQ AC8 GND GND L18
G15 FBVDDQ AD12 GND GND L5
G16 FBVDDQ AD13 GND GND M11
G18 FBVDDQ A26 GND GND M13
G19 FBVDDQ AD15 GND GND M15
G20 FBVDDQ AD16 GND GND M17
C560 C591 C589 C558 G21 AD18 N10
1uF 1uF 1uF 1uF FBVDDQ GND GND
L22 FBVDDQ AD19 GND GND N12
L24 AD21 N14
6.3V 6.3V 6.3V 6.3V
FBVDDQ GND GND
L26 AD22 N16
10% 10% 10% 10%
X6S X6S X6S X6S FBVDDQ GND GND
0402 0402 0402 0402 M21 FBVDDQ AE11 GND GND N18
COMMON COMMON COMMON COMMON N21 FBVDDQ AE14 GND GND P11
R21 FBVDDQ AE17 GND GND P13
T21 FBVDDQ AE20 GND GND P15
V21 FBVDDQ AB11 GND GND P17
W21 FBVDDQ AF1 GND GND P23
H24 FBVDDQ AF11 GND GND P26
C593 C599 H26 AF14 R10
10uF 10uF FBVDDQ GND GND
J21 FBVDDQ AF17 GND GND R12
4V 4V
K21 FBVDDQ AF20 GND GND R14
AF23 R16
20% 20%
X6S X6S GND GND
0603 0603 AF5 GND GND R18
COMMON COMMON AF8 GND GND T11
2 AG2 GND GND T13 2
AG26 GND GND T15
AB14 GND GND T17
PLACE UNDER GPU B1 GND GND U10
B11 GND GND U12
GND B14 GND GND U14
B17 GND GND U16
B20 GND GND U18
B23 GND GND U23
B27 GND GND U26
C559 C594 C595 C596 B5 V11
10uF 22uF 22uF 22uF GND GND
B8 GND GND V13
E11 V15
4V 4V 4V 4V
GND GND
E14 V17
20% 20% 20% 20%
X6S X6S X6S X6S GND GND
0603 0603W 0603W 0603W E17 GND GND Y2
COMMON NO STUFF NO STUFF NO STUFF E2 GND GND Y23
E20 GND GND Y26
FBVDDQ E22 GND GND Y5
PLACE NEAR GPU E25 GND GND AA7
E5 GND GND AB7
E8 GND
GND
FB_CAL_PD_VDDQ
FB_CAL_PD_VDDQ D22 R513 40.2ohm
0402 1% COMMON GND
GND
FB_CAL_PU_GND OPTIONAL GND:
FB_CAL_PU_GND C24 R141 40.2ohm
0402 1% COMMON

FB_CALTERM_GND
FB_CALTERM_GND B25 R142 60.4ohm XVDD AREA
SNN_PIN_H2 SNN_PIN_P2
0402 1% COMMON H2 GND_OPT GND_OPT P2
SNN_PIN_H5 SNN_PIN_P5
3 H5 GND_OPT GND_OPT P5 3
SNN_PIN_L2 SNN_PIN_U2
L2 GND_OPT GND_OPT U2
SNN_PIN_U5
GND_OPT U5
GND

PCB ADR/CMD
PWR REFERENCE
SNN_PIN_H23 SNN_PIN_L23
H23 GND_OPT GND_OPT L23
SNN_PIN_H25 SNN_PIN_L25
H25 GND_OPT GND_OPT L25

G1F
@digital.u_gpu_gb2c_64(sym_14):page8_i46
BGA595
COMMON

14/14 VDD18 1V8

51mA G1I
VDD18 G8
VDD18 G9 @digital.u_gpu_gb2c_64(sym_5):page8_i36

1V8_AON G10 BGA595

G12 C606 C601 C616 C614 COMMON

1V8_AON 0.1uF 0.1uF 1uF 4.7uF
5/14 NC
16V 16V 6.3V 6.3V

GM108
10% 10% 10% 20%
X7R X7R X6S X6S
SNN_GPU_NC_AA14
4 0402 0402 0402 0603 AA14 NC PEX_PLLVDD
4
SNN_GPU_NC_AA15
COMMON COMMON COMMON COMMON AA15 NC
SNN_GPU_NC_AB6 PEX_PLLVDD
AB6 NC
SNN_GPU_NC_AB8
AB8 NC PEX_SVDD_3V3
SNN_GPU_NC_AD10
AD10 NC
SNN_GPU_NC_AD7
GND AD7 NC
SNN_GPU_NC_AE22
AE22 NC
SNN_GPU_NC_AE3 PEX_TSTCLK*
GND AE3 NC
SNN_GPU_NC_AE4
PLACE UNDER GPU PLACE NEAR GPU AE4 NC
SNN_GPU_NC_AF2
AF2 NC
SNN_GPU_NC_AF22
1V8 AF22 NC
SNN_GPU_NC_AF3 PEX_TSTCLK
AF3 NC
SNN_GPU_NC_AF4
AF4 NC
SNN_GPU_NC_AG3
AG3 NC
SNN_GPU_NC_D10
D10 NC
SNN_GPU_NC_E10
E10 NC
C607 C603 C564 C611 SNN_GPU_NC_F10
F10
0.1uF 0.1uF 1uF 4.7uF SNN_GPU_NC_F5 NC
F5 NC
SNN_GPU_NC_F6
F6
16V 16V 6.3V 6.3V
SNN_GPU_NC_W5 NC MLS_REF0
W5
10% 10% 10% 20%
X7R X7R X6S X6S NC
0402 0402 0402 0603
COMMON COMMON COMMON COMMON
GM108 COMPATIBLE DESIGNS MUST
LEAVE NC PINS FLOATING EXCEPT
FOR THOSE SHOWN

GND GND

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
FBVDDQ and 1V8 Decoupling
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL FBVDDQ and 1V8 Decoupling
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 8 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

IFPAB DL DVI-D
DP DVI
DDC_5V
NV3V3

R604
R44 2k
10k 5%
5% DVI G Q590
0402

DVI

1
0402 COMMON
1 COMMON
2N7002LT1G 1
SOT23
2 S D 3

R40 NV3V3
100k
5% DP
0402 R574
DVI
NO STUFF
0ohm
0.05 ohm
0402

DP
COMMON
GND

IFPA_MODE
IN

G Q589 DDC_5V C723

1
2N7002LT1G 10nF
25V
SOT23
NV3V3 2 S D 3 R603 10%
2k X7R
0402
DVI 5%
NO STUFF
R43 0402
COMMON
10k GND
5% DVI DDC_5V
IFPA_AUX
0402
COMMON
DP
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS
2 C5 2
4.7nF
IFPA_AUX
R39 16V
100k 10%

DP
X7R
5%
0402
0402
COMMON
NO STUFF

G1J
@digital.u_gpu_gb2c_64(sym_4):page9_i136
BGA595 GND GND
COMMON IFPA_AUX_SDA_C
IFPA_AUX_SCL_C BI
4/14 IFPAB OUT OUT
OUT
DVI HDMI DP OUT
SL/DL OUT

IFPA_L3 AC4 IFPA_TXC* DVI_HDMI_SIGNALS IFPA_L3 C20 0.1uF

TXC/TXC IFPA_L3 AC3 IFPA_TXC DVI_HDMI_SIGNALS IFPA_L3 0402 COMMON C21 0.1uF 27 SHIELD3
0402 COMMON 25 SHIELD1
IFPAB_RSET
GND R518 1k AA6 IFPAB_RSET
IFPA_TXD0* C22 0.1uF IFPAB_TXD0_C*
0402 1% COMMON TXD0/0 IFPA_L2 Y3 DVI_HDMI_SIGNALS IFPA_L2 DVI_HDMI_SIGNALS 17 TX0-
IFPA_TXD0 C23 0.1uF IFPAB_TXD0_C
IFPA_L2 Y4 DVI_HDMI_SIGNALS IFPA_L2 0402 COMMON DVI_HDMI_SIGNALS 18 TX0+ J4
C24 0.1uF IFPAB_TXD1_C*
IFPA_L1 0402 COMMON DVI_HDMI_SIGNALS 9 TX1- CON_DVI_D
C25 0.1uF IFPAB_TXD1_C
IFPA_L1 DVI_HDMI_SIGNALS 10 DIP_DVI_D
17 9 1
0402 COMMON TX1+
IFPAB_TXD2_C*
330mA TXD1/1 IFPA_L1 AA2 IFPA_TXD1* DVI_HDMI_SIGNALS IFPA_L0 C26 0.1uF 0402 COMMON DVI_HDMI_SIGNALS 1 TX2- 90
IFPAB_TXD2_C
GPU_PLLVDD W7 IFPAB_PLLVDD IFPA_L1 AA3 IFPA_TXD1 DVI_HDMI_SIGNALS IFPA_L0 0402 COMMON C27 0.1uF DVI_HDMI_SIGNALS 2 TX2+ COMMON

3
IN
0402 COMMON SHLD24
11 SHLD13
C618 AA1 IFPA_TXD2* DVI_HDMI_SIGNALS 19
TXD2/2 IFPA_L0 SHLD05
0.1uF
AB1 IFPA_TXD2 12
OUT
IFPA_L0 DVI_HDMI_SIGNALS TX3-
13
16V OUT
3 3
TX3+
4
10%
TX4-
AA5 IFPA_AUX_SDA
X7R
5
OUT
0402 IFPA_AUX_SDA TX4+
AA4 IFPA_AUX_SCL 20
OUT
COMMON
IFPA_AUX_SCL TX5-
21 TX5+
GND 6 DDCC
PLACE NEAR BALL IFPB_L3 AB4 IFPB_TXC* DVI_HDMI_SIGNALS
11
IFPB_L3 7 DDCD
AB5 IFPB_TXC 14
OUT
PEX_VDD TXC IFPB_L3 DVI_HDMI_SIGNALS IFPB_L3 VDDC
11
15
OUT
GND
R20 499ohm YES 22 SHLDC
IFPB_TXD0* IFPAB_TXC_C*
W6 IFP_IOVDD TXD0/3 IFPB_L2 AB2 DVI_HDMI_SIGNALS IFPB_L2
11 0402 1% COMMON DVI_HDMI_SIGNALS 24 TXC-
YES
PLACE NEAR GPU PLACE NEAR BALLS
IFPAB_TXC_C
AB3 23
OUT
DVI_HDMI_SIGNALS IFPB_L2 R21 499ohm DVI_HDMI_SIGNALS TXC+
IFPB_L2 SNN_DACA_VSYNC_DVI
Y6 IFP_IOVDD 0402 1% COMMON 8 VSYNC
610mA
R22 499ohm YES 16 HPD
AD2 DVI_HDMI_SIGNALS IFPB_L1 IFPB_TXD0 24 16 8
TXD1/4 IFPB_L1 11 0402 1% COMMON
C551 C548 C550 C613
IFPB_L1 AD3 DVI_HDMI_SIGNALS IFPB_L1
OUT
R23 499ohm YES
4.7uF 1uF 0.1uF 0.1uF
0402 1% COMMON
6.3V 6.3V 16V 16V R24 499ohm YES
20% 10% 10% 10%
AD1 DVI_HDMI_SIGNALS IFPB_L0 IFPB_TXD1*
TXD2/5 IFPB_L0 11 0402 1% COMMON
YES
X6S X6S X7R X7R
AE1
OUT
0603 0402 0402 0402 IFPB_L0 DVI_HDMI_SIGNALS IFPB_L0 R25 499ohm
COMMON COMMON COMMON COMMON 0402 1% COMMON

IFPB_AUX_SDA
AD5 IFPB_TXD1
IFPB_AUX_SDA 11
IFPB_AUX_SCL
AD4
OUT
26 SHIELD2
IFPB_AUX_SCL
28 SHIELD4
GND

IFPAB
IFPB_TXD2*
11 OUT
(DEFEATURED 0N GM108)

GND
4 IFPB_TXD2 4
11 OUT
DVI_HDMI_SIGNALS IFPB_AUX
11 OUT
DVI_HDMI_SIGNALS IFPB_AUX
11 OUT
R19 499ohm YES
0402 1% COMMON
NV3V3 R18 499ohm YES
0402 1% COMMON

1G1D1S 3IFPAB_TERM_CM
D Q514 0.400
@discrete.q_fet_n_enh(sym_2):page9_i28
1G
SOT23_1G1D1S
COMMON
S 2
60V
0.115A
-1000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A
0.2W
20V

GND

1V8

R577
10k
5%
0402
COMMON
GPIO14_IFPA_HPD
12 3 1B1C1E
OUT
Q512 C
1B GPIO14_IFPA_HPD_R
@discrete.q_npn(sym_1):page9_i26 R600 100k IFPA_HPD_R R601 0ohm IFPA_DVI_DP_HPD
SOT23_1B1C1E IN
0402 5% COMMON 04020.05 ohm COMMON
COMMON
2 E
5 R576 C733 C746 5
100k 220pF 220pF
5% 50V 50V
0402 5% 5%

Galaxy Microsystems (HK) Ltd.

COMMON C0G C0G
GND 0402 0402
COMMON NO STUFF

Page Name:
IFPAB DL-DVI
GND GND GND
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL IFPAB DL-DVI
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 9 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property A
BOM REV to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

IFPA DP

1 1

2 2

3 3

U3 DP_PWR
3V3_PEX
INS16854819
SO8
COMMON 1A
2 IN OUT 8
3 IN OUT 7 C8
R4 C11 C745
OUT 6 10k 0.1uF 10uF 270uF
C37
0.1uF
4
5% 16V 16V COMMON
16V
EN 0402 10% 10% 20%
COMMON 16V@105degC
SNN_PWRA_OC X7R X6S
5 1
10%
4 AL-Polymer 4
X7R OC* GND 0402 0805
COMMON COMMON 5.08A@105.05degC,100KHz
0402
0.01ohm
COMMON
TH_D63P25

GND GND GND GND GND

GND

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
IFPA DP
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL IFPA DP
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 10 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

IFPB HDMI/DP DP_PWR DDC_5V

DP_PWR DDC_5V R13 DP R17 HDMI

NV3V3 0ohm 0ohm
0.05 ohm 0.05 ohm
R11 R14 0402 0402

DP
COMMON COMMON
100k 2k
DP-SKU ONLY
R586
10k 5% 5% IFPB_ESD
5% HDMI 0402 0402
NV12V
DP HDMI
COMMON COMMON
0402 C34 NV3V3
D1B

5
COMMON
1
0.1uF 1
@discrete.d_3pin_ac(sym_1):page11_i95
C726 0.1uF 3 0.215A
16V

0402 16V 100V

10% R596
HDMI 10k
SC70-6_DUAL X7R
10%
COMMON 0402 NV3V3
R587 X7R R32 0ohm COMMON
5% R572
100k COMMON 0402 10k
04020.05 ohm COMMON

4
DP
COMMON
5% 5%
0402 IFPB_AUX_SDA_Q GND R594 0402
COMMON S D D S 3 1B1C1E COMMON
0ohm
2 3[Q_AUX_FET1*_DP] 3 2[Q_AUX_FET2*_DP] GND Q510B C
COMMON COMMON HDMI 0.05 ohm
5B
IFPB_MODE*
@discrete.q_npn(sym_1):page11_i124 6 1B1C1E
Q510A C
0402 SOT363
SOT23_1G1D1S
G G
DP
COMMON
GND
COMMON
IFPB_MODE_R
4 2B R595 10k
INS16821323 INS16821343
Q552 Q593 E @discrete.q_npn(sym_1):page11_i123
SOT363
SOT23_1G1D1S 0402 5% COMMON
COMMON
IFPB_MODE
1 E

1
[Q_AUX_FET1_DP]
GND
DDC_5V C36
SOT23_1G1D1S [Q_AUX_FET2_DP]
G G 10nF GND
Q549 Q3
DPINS16821383

1
25V
INS16821363
NV3V3 SOT23_1G1D1S R15 10%
COMMON COMMON 2k X7R
2 S D 3 3 D S 2 0402
IFPB_AUX_SCL_Q HDMI 5%
D1A COMMON

2
R578 0402
DDC_5V
COMMON @discrete.d_3pin_ac(sym_1):page11_i83
10k GND
6 0.215A
5% HDMI R33 0ohm 100V
0402
DP 04020.05 ohm COMMON
SC70-6_DUAL
COMMON
HDMI R12
COMMON
C1 J3
C724 0.1uF DP 100k 100pF RECEPTACLE

1
5% 50V HDMI_A_SMD
0402 16V
0402 5%
2 10% @electro_mechanic.con_hdmi(sym_1):page11_i108 2
COMMON C0G
R579 X7R COMMON
0402
100k COMMON
SHIELD1
COMMON 20
5% DP 21 SHIELD2
0402
COMMON
GND GND 19 HP_DET
18 +5V 19

17 DDC/CEC_GND 18

IFPB_AUX_SDA GND IFPB_AUX_SDA_C SDA

16
17

9 IFPB_AUX_SCL_C
BI IFPB_AUX_SCL 15 SCL 16
9 SNN_HDMI_RSVD
IN
14 RESERVED 15

SNN_HDMI_CEC CEC
13
14

IFPB_TXC* C736 0.1uF IFPB_TXC_C1* IFPB_TXC_CR1* CK-

DVI_HDMI_SIGNALS R617 6.04ohm DVI_HDMI_SIGNALS 12
13
9 IFPB_TXC_C1 IFPB_TXC_CR1
IN IFPB_TXC 0402 COMMON C737 0.1uF DVI_HDMI_SIGNALS 0402 COMMON R618 6.04ohm DVI_HDMI_SIGNALS 11 CK_SHIELD 12

9 1%
IN
0402 COMMON 0402 1% COMMON 10 CK+ 11

IFPB_TXD0* C738 0.1uF IFPB_TXD0_C1* IFPB_TXD0_CR1* D0-

DVI_HDMI_SIGNALS R619 6.04ohm DVI_HDMI_SIGNALS 9
10

9 IFPB_TXD0_C1 IFPB_TXD0_CR1
IN IFPB_TXD0 0402 COMMON C739 0.1uF DVI_HDMI_SIGNALS 0402 COMMON R620 6.04ohm DVI_HDMI_SIGNALS 8 D0_SHIELD 9

9 1%
D0+
7
IN 8
0402 COMMON 0402 1% COMMON
IFPB_TXD1* C740 0.1uF IFPB_TXD1_C1* IFPB_TXD1_CR1* D1-
DVI_HDMI_SIGNALS R621 6.04ohm DVI_HDMI_SIGNALS 6
7

9 IFPB_TXD1_C1 IFPB_TXD1_CR1
IN IFPB_TXD1 C741 0.1uF DVI_HDMI_SIGNALS R622 6.04ohm DVI_HDMI_SIGNALS 5 D1_SHIELD 6
9 0402 COMMON 0402 1% COMMON
IN
0402 COMMON 0402 1% COMMON 4 D1+ 5

IFPB_TXD2* C742 0.1uF IFPB_TXD2_C1* IFPB_TXD2_CR1* D2-

DVI_HDMI_SIGNALS R623 6.04ohm DVI_HDMI_SIGNALS 3
4

9 C743 0.1uF IFPB_TXD2_C1 IFPB_TXD2_CR1 D2 _SHIELD

R624 6.04ohm 2
IN
DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
3
0402 COMMON 0402 COMMON
9 1%
IN
1V8 0402 COMMON 0402 1% COMMON 1 D2+ 2

22 SHIELD3
R106 23 SHIELD4
10k
5%
0402
COMMON
3 GPIO15_IFPB_HPD 3 3
OUT 12 C
1B1C1E
Q2
IFPB_HPD_C_Q IFPB_HPD_C_R IFPB_HPD_C
1B
@discrete.q_npn(sym_1):page11_i130 R2 100k R1 0ohm
SOT23_1B1C1E
COMMON
0402 5% COMMON 04020.05 ohm COMMON GND DP_PWR
2 E R3 C3 C2
100k 220pF 220pF
PLACE CLOSE
5% 50V 50V
TO CONNECTOR
0402 5% 5% C9 C10
COMMON C0G C0G 10uF 0.1uF
0402 0402
16V 16V
COMMON COMMON
GND GND YES 10% 10%

YES GND YES YES

X6S X7R
GND 0805 0402
LB510 600ohm IFPB_TXD2_L R612 499ohm COMMON COMMON
BEAD_0402 COMMON LB509 600ohm IFPB_TXD2_L* 0402 COMMON R611 499ohm
1%
YES YES
Hotplug Detection
BEAD_0402 COMMON 0402 1% COMMON
LB508 600ohm YES IFPB_TXD1_L R610 499ohm YES GND GND
LB507 600ohm IFPB_TXD1_L* R609 499ohm
BEAD_0402 COMMON 0402 1% COMMON
YES BEAD_0402 COMMON YES 0402 1% COMMON
LB506 600ohm YES IFPB_TXD0_L R608 499ohm YES
LB505 600ohm IFPB_TXD0_L* R607 499ohm
BEAD_0402 COMMON 0402 1% COMMON
YES BEAD_0402 COMMON YES 0402 1% COMMON J2
LB504 600ohm YES IFPB_TXC_L R606 499ohm YES CON_DISPLAYPORT
BEAD_0402 COMMON LB503 600ohm IFPB_TXC_L* 0402 COMMON R605 499ohm DPORT_26P_0_7MM
1%
NV3V3 BEAD_0402 COMMON 0402 1% COMMON COMMON
IFPB_TERM_EN_D
SHIELD6 21
1G1D1S 3 SHIELD5 23
D Q1 SHIELD4 25
@discrete.q_fet_n_enh(sym_2):page11_i25

1G
SOT323_1G1D1S
COMMON
S 2 PWR 20
PWR_RET 19
20
4 4
18 HPD
60V
0.115A
19
-1000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A 18

IFPB_AUX_SDA_C
17 AUXN GND 16
0.2W
20V
17

IFPB_AUX_SCL_C
15 AUXP
16

GND CEC 14 DPF_CEC

15

IFPF_MODE_C
MODE 13
14

C727 0.1uF IFPB_L3_C*

12 LANE_3N
13
DP_SIGNALS
0402 COMMON C728 0.1uF IFPB_L3_C
10 LANE_3P
12
GND 11
DP_SIGNALS
0402 COMMON
11
R613 R614
C729 0.1uF IFPB_L2_C* 5.1M 1M
9 LANE_2N
10
DP_SIGNALS
0402 COMMON C730 0.1uF IFPB_L2_C
7 LANE_2P
9
GND 8 5% 5%
DP_SIGNALS 8 0402 0402
0402 COMMON COMMON COMMON
C731 0.1uF IFPB_L1_C*
6 LANE_1N
7
DP_SIGNALS
0402 COMMON C732 0.1uF IFPB_L1_C
4 LANE_1P
6
GND 5
DP_SIGNALS 5
0402 COMMON
C734 0.1uF IFPB_L0_C*
3 LANE_0N GND GND
4
DP_SIGNALS
IFPB_TXD2 0402 COMMON C735 0.1uF IFPB_L0_C
1 LANE_0P
3
GND 2
DP_SIGNALS 2
0402 COMMON
27
1

SHIELD3 22
SHIELD2 24
SHIELD1 26

GND

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
IFPB DP_HDMI
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL IFPB DP/HDMI
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 11 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

JTAG,GPIO&XTAL

Smart Fan
9 OUT
1 1
G1L
@digital.u_gpu_gb2c_64(sym_9):page12_i132
1V8 BGA595
COMMON

112mA 9/14 XTAL_PLL

GM108
LB502 30ohm GPU_PLLVDD 1V 0.300 L6 XS_PLLVDD PLLVDD
BEAD_0603 COMMON M6 SP_PLLVDD
F11
N6
GPCPLL_AVDD
VID_PLLVDD
NC XTALOUTBUFF GPIO PWM %
NC
1V8
C625 C624 C633 C620 C619 C621 C617
22uF 22uF 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF
1V8
4V 6.3V 6.3V 16V 16V 16V 16V
20%
X6S
20%
X6S
20%
X6S
10%
X7R
10%
X7R
10%
X7R
10%
X7R
PU 66% HIGH
0603W 0805 0603 0402 0402 0402 0402 R119 100k XTALSSIN A10 XTALSSIN XTALOUTBUFF C10 XTALOUTBUFF R120 100k
NO STUFF COMMON COMMON COMMON COMMON COMMON COMMON 0402 5% COMMON 0402 5% COMMON

C11 B10
XTALIN XTALOUT
MID 33% HIGH (2-PIN DEFAULT)
CO-LAYOUT 0805 AND 0603
PLACE NEAR GPU PLACE UNDER GPU

R128 XTALIN Y1 27MHz XTALOUT R127

XTAL XTAL
100k 100k
PD 100% HIGH
GND GND GENERIC_DEZ1 TH_HC49S 30ppm COMMON GENERIC_DEZ1
5% 5%
@clocks.xtal(sym_1):page12_i56
0402 C109 C110 0402
NO STUFF COMMON
27pF 27pF
50V 50V
5% 5%
C0G C0G
2 0402 0402 2
COMMON COMMON

GND GND GND GND G1M

@digital.u_gpu_gb2c_64(sym_3):page12_i133
BGA595
COMMON
1V8
3/14 JTAG

3 JTAG_TCLK AE5 JTAG_TCK

AE6
IN
3 JTAG_TDI JTAG_TDI
R113 G Q22
IN
JTAG_TDO AF6
NV3V3 NV3V3 NV3V3 NV3V3 JTAG_TDO
1

10k 3
AD6
IN
@discrete.q_fet_n_enh(sym_6):page12_i144
3 JTAG_TMS JTAG_TMS
AG4
5% SOT323_1G1D1S IN
COMMON 3 JTAG_TRST* JTAG_TRST
0402 NVJTAG_SEL
2 3 AD9
IN
COMMON S D NVJTAG_SEL
R535 R539
2.2k 2.2k R137 R517
GPU_THERM_OVERT* R111 0ohm 5% 5% G G 10k 10k
14 THERM_OVERT* Q503A Q503B

5
OUT 0402 0402 5% 5%
04020.05 ohm NO STUFF @discrete.q_fet_n_enh(sym_6):page12_i107
@discrete.q_fet_n_enh(sym_6):page12_i108
COMMON COMMON 0402 0402
SOT363 SOT363
NO STUFF NO STUFF COMMON COMMON
1 S D 6 4 S D 3

R536 0ohm I2CS_SCL_R

3 PEX_SMCLK GND GND
OUT
0402 5% COMMON
R540 0ohm I2CS_SDA_R
PEX_SMDAT 3
BI
G1K 0402 5% COMMON
3 3
@digital.u_gpu_gb2c_64(sym_8):page12_i134
BGA595
COMMON

8/14 MISC1

NV3V3 12V_PEX C202 C203

10uF/16V,X5R 10uF/16V,X5R
GPU_I2CS_SCL
I2CS_SCL D9 C1206 C1206
GPU_I2CS_SDA
I2CS_SDA D8 COMMON COMMON
A6 OVERT
SNN_GPU_TS_VREF SNN_I2CC_SCL
AE2 TS_VREF I2CC_SCL A9 C201
SNN_I2CC_SDA
I2CC_SDA B9 2.2UF/16V,X5R GND
C0805
ns
SNN_GPU_THERM_DN
E12 THERMDN
I2CB_SCL C9 21 I2CB_SCL_R 1V8 1V8 NV3V3 NV3V3 3V3_PEX GND 1 8
SNN_GPU_THERM_DP
F12 C8 I2CB_SDA_R OUT
2 VOUT NC3 7
THERMDP I2CB_SDA 21 BI
3 VIN NC2 6
R103 R519 R57 EN GND

GND1
R167 10K R211 100K 4 5
10k 10k 10k
R0402+0.05R COMMON R0402+0.05R COMMON
VSET NC1
C200 U55
5% 5% 5%
0402 0402 0402
R166 1UF/10V,X5R NCT3941S

9
COMMON NO STUFF NO STUFF
100K C0402 COMMON
C6 R92 R93
GPIO0 GPIO0_NVVDD_PWM_VID
19
R0402 COMMON
SNN_GPU_GPIO1 10k 10k +0.05R
B2
OUT
GPIO1 SNN_GPU_GPIO2
NV3V3 COMMON
D6
5% 5%
GPIO2 SNN_GPU_GPIO3 0402 0402
GPIO3 C7 NO STUFF NO STUFF GND
F9 SNN_GPU_GPIO4 C747
GPIO4 SNN_GPU_GPIO5 4.7uF GND
4
GPIO5 A3 GND 4

GPIO6 A4 GPIO6_NVVDD_PSI*
19
6.3V
SNN_GPU_GPIO7
B6
OUT 20%
GPIO7 X6S 12V_PEX
E9 GPIO8_FBVDD_SEL
G Q20
GPIO8 18 0603

1
SNN_GPU_GPIO9
F8
OUT
GPIO9 @discrete.q_fet_n_enh(sym_6):page12_i35 NO STUFF
C5
SOT323_1G1D1S
GPIO10 GPIO10_FBVREF_SEL
5 NO STUFF POWER_BRAKE*
GPIO11_POWER_BRAKE*
E7 2 3
OUT
GPIO11 S D 3 GND
SNN_GPU_GPIO12
D7
IN
GPIO12 NV3V3 NV3V3 NV3V3 CO-LAY WITH 0805 CAP
GPIO13_FAN_TACH 0
GPIO13 B4
GPIO14 B3 GPIO14_IFPA_HPD 9
+0.05R
R0805
C3
IN
GPIO15 GPIO15_IFPB_HPD 11
D502 NO STUFF
D5 GPIO16_FAN_PWM IN R16 R564 R154
GPIO16

3
@discrete.d_3pin_cc(sym_2):page12_i84
SNN_GPU_GPIO17 1k 10k
GPIO17
D4 30V
SNN_GPU_GPIO18
C2 R28 0ohm 5% 5% 0.2A
GPIO18 SNN_GPU_GPIO19 0402 0402
F7
SOT23
04020.05 ohm NO STUFF
GPIO19 SNN_GPU_GPIO20
COMMON NO STUFF NO STUFF
E6

2
GPIO20 FAN_PWM_4PIN
GM108 C4 SNN_GPU_GPIO21
1 J5
GPIO21 SNN_GPU_GPIO22
GPIO22
A7 NV3V3 2
I2CA_SDA SNN_GPU_GPIO23
B7 3
MALE

I2CA_SCL GPIO23 2.00MM

4 0
C748 DIP_FAN_4P
G 1nF C699 C702 COMMON
Q591

1
INS16805265
16V 1uF 1nF 0
SOT323_1G1D1S 10% 16V 16V +0.05R
COMMON X7R R0402
2 3
10% 10%
S D 0402 X7R X7R COMMON
NO STUFF 0603 0402 R168
NO STUFF NO STUFF

GND
GND GND GND
5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
JTAG,GPIO&XTAL
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL JTAG,GPIO&XTAL
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 12 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

ROM & STRAPS

ROM_SO ROM_SI ROM_SCLK SOR_EXPOSED[3:0] 1:ENABLE 0:DISABLE
H=High :Tied to 1.8V
L L L 1111 DEFAULT SOR0/1 ENABLE M=Middle:Tied to 0.9V
L=Low :Tied to 0V
L L H 1110
1V8
1 1

L H L 1101
G1N
@digital.u_gpu_gb2c_64(sym_10):page13_i37 R526
L H H 1100 BGA595 10k
COMMON 5%
0402 U501
H L L 1011
10/14 MISC2 COMMON 1V8
@memory.u_mem_fl_ser_512kx8(sym_1):page13_i31
SO_8
COMMON
7 8
H L H 1010 3
HOLD*
WP*/NC
VCC

D12 ROM_CS* R521 33ohm ROM_CS_R*

1 C651
ROM_CS CS* 0.1uF
H H L 1001
04020.05 ohm COMMON
ROM_SI ROM_SI_R
ROM_SI B12 R530 33ohm 5 DIO
16V

A12 2
10%
ROM_SO ROM_SO
0402 5% COMMON
ROM_SO_R DO X7R
STRAP0 D1 C12 R522 0ohm 6 4
H H H 1000
ROM_SO

STRAP0 ROM_SCLK CLK GND 0402

STRAP1 D2
ROM_SCLK

STRAP1 ROM_SCLK
04020.05 ohm COMMON
ROM_SCLK_R
COMMON
STRAP2 E4 STRAP2
R527 33ohm
STRAP3 E3
L L M 0111 STRAP3 0402 5% COMMON
STRAP4 D3 STRAP4
STRAP5 C1 STRAP5 NC GM108 GND

L M L 0110
SNN_GPU_BUFRST*
D11
L M H 0101 RESERVED BUFRST

2
L H 0100
2
M

H L M 0011

H M L 0010

H M H 0001

H H M 0000

STRAP2 STRAP1 STRAP0 RAMCFG[4:0]

L L L 0000 DEFAULT

L L H 0001

L H L 0010

3
L H H 0011 3

H H L 0110
1V8 1V8
H H H 0111 1V8

L L M 1000 R112 R118 R115

100k 100k 100k R123 R125 R110 R523 R531 R529
100k 100k 100k 100k 100k 100k
L L 1001
5% 5% 5%

M 0402
NO STUFF
0402
NO STUFF
0402
NO STUFF
5% 5% 5% 5% 5% 5%
0402 0402 0402 0402 0402 0402
STRAP2 NO STUFF NO STUFF COMMON NO STUFF NO STUFF NO STUFF
STRAP5 ROM_SO
STRAP1
STRAP4 ROM_SI
STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE STRAP0
STRAP3 ROM_SCLK

M H H 1 1 1 1 R116 R124 R121

100k 100k 100k R126 R129 R114 R520 R532 R528
5% 5% 5% 100k 100k 100k 100k 100k 100k
M H L 1 1 1 0 0402
COMMON
0402
COMMON
0402
COMMON
5%
0402
5%
0402
5%
0402
5%
0402
5%
0402
5%
0402
COMMON COMMON NO STUFF COMMON COMMON COMMON

M L H 1 1 0 1

4 M L L 1 1 0 0 GND 4
GND GND

L H M 1 0 1 1

L M H 1 0 1 0

L M L 1 0 0 1

L L M 1 0 0 0

H H H 0 1 1 1

H H L 0 1 1 0 1:SMB_ALT_ADDR ENABLE

H L H 0 1 0 1 0:SMB_ALT_ADDR DISABLE

H L L 0 1 0 0 1:DEVID_SEL REBRAND
0:DEVID_SEL ORIGNAL
L H H 0 0 1 1
1:PCIE_CFG LOW POWER
5 L H L 0 0 1 0 0:PCIE_CFG HIGH POWER 5

L L H 0 0 0 1 DEFAULT 1:VGA_DEVICE ENABLE

Galaxy Microsystems (HK) Ltd.
L L L 0 0 0 0 0:VGA_DEVICE DISABLE
Page Name:
ROM & STRAPS
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL ROM & STRAPS
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 13 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

Power Sequence

1 R545 10k PS_NVVDD_EN 1

19 OUT
0402 5% COMMON
C690
0.1uF
16V
10%
X7R
0402
NV3V3 3V3_PEX COMMON
GND
NV3V3

R91 R90 C692 10nF

10k 1k GND
0402 25V
5% 5% 10%
0402 0402 X7R
COMMON COMMON COMMON
D4
@discrete.d_3pin_aa(sym_1):page14_i26 PS_NVVDD_S_EN_R PS_NVVDD_PEXVDD_EN
THERM_OVERT* 1 U503
12

5
3 1
IN
R548 0ohm @logic.u_and_2in(sym_1):page14_i143
PS_1V8_PG PS_NVVDD_S_EN PS_PEXVDD_EN
15,16 2 04020.05 ohm COMMON 4 R553 0ohm
17
2
IN OUT
SOT23 SC70-5 04020.05 ohm COMMON

COMMON COMMON
R554 C707
10k 10nF

3
5% 25V

PS_NVVDD_PG GND
0402 10%
IN 18,19 NO STUFF X7R
0402
R550 0ohm NO STUFF
2 04020.05 ohm NO STUFF 2
GND
GND

PS_NV3V3_EN R552 0ohm

IN 16
04020.05 ohm NO STUFF

Optional

PS_DW_CTL
R549 0ohm
16 OUT
04020.05 ohm NO STUFF

POWER DOWN CTL

R551 0ohm
3 04020.05 ohm COMMON 3
Optional

4 4

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
Power Sequence
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL Power Sequence
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 14 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

POWER:1V8 & 5V
12V_PEX

C106 C97 C98 C103 C104

0.1uF 1uF 1uF 1uF 1uF
16V 16V 16V 16V 16V
10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R
0402 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON
1 1

GND

3V3_PEX

12V_PEX 12V_PEX U7
@power_supply.u_swreg_sot23_8hv(sym_1):page15_i92
3V3_PEX R95
RT7296
R107 R104 10k SOT23_8
PS_1V8_BOOT PS_1V8_BOOT_R
10k 10k 5% COMMON
0402
1% 1%
2 VIN 5 R100 4.7ohm C108 0.1uF X7R
NO STUFF BOOT
R109 0402 0402
0402 COMMON 0402 16V
COMMON COMMON 5%
10k PS_1V8_EN COMMON
1B1C1E 3 6 EN/FSYNC 10%
1% INPUT_12V_EN C Q21B 0.03ohm
0402
6 B5 @discrete.q_npn(sym_1):page15_i79 R105
1V8
2.1A MAX
COMMON 1B1C1E 3.5A
C 3.83k C107 PS_1V8_SWTH_VDD
7 VCC SW 3
SOT363
Q21A 0.250 3A
INPUT_3V3_EN B2
COMMON 1uF
@discrete.q_npn(sym_1):page15_i76 E 4 1%
0402 2.1A
SOT363
COMMON
6.3V
0.400
L8 2.2uH 1.8V
COMMON
R108 C124 E 1
10%
1 MOD/PG PS_1V8_SW
SMD_5X5 COMMON
3.01k 10nF X6S
C105
0402
0.1uF R96 R130
4 GND 8
1% 25V
NO STUFF
49.9k FB 0ohm
0402 10%
GND GND 16V C121 C117 C125 C111 C112 C126 C116 C122
NO STUFF X7R 10% 1% PS_1V8_SWTH_FB_U 0.05 ohm 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
0402 GND X7R 0402 0402 6.3V 4V 6.3V 4V 6.3V 4V 6.3V 4V
NO STUFF 0402 COMMON COMMON
GND COMMON
GND
20%
X6S
20%
X6S
20%
X6S
20%
X6S
20%
X6S
20%
X6S
20%
X6S
20%
X6S
GND GND 0805 0603W 0805 0603W 0805 0603W 0805 0603W
R99 COMMON NO STUFF COMMON NO STUFF COMMON NO STUFF COMMON NO STUFF
2 R98 100ohm 2
100k 1%
GND 0402
1%
0402 COMMON
PS_1V8_PG
OUT 14,16 COMMON
GND GND GND GND

PS_1V8_SWTH_FB
Co-Layout 0805 and 0603
GND
C114 15pF
0402 50V
5%
MP1475:316-0470-000 C0G COMMON

R102 12.7k PS_1V8_SWTH_FB_MISC

RT7296F:316-0472-000 0402 1% COMMON
Rtop
R101
10k
1%
Rbot
0402
COMMON

GND
Vout = Vref * (1+Rtop/Rbot)
1.8V = 0.8V * (1+12.7K/10K)

3 3

DDC_5V 5V_PVCC

5V = 5V @ 120mA U1
@power_supply.u_vreg_3pin(sym_2):page15_i89 U504 R563 0ohm
1.25V
12V_PEX @power_supply.u_vreg_3pin(sym_2):page15_i100 04020.05 ohm NO STUFF
GOI,IGOI,TO263
1.25V
SOT223_GOI DDC_5V 12V_PEX GOI,IGOI,TO263
COMMON
0.400 SOT223_GOI
PS_5V_PROT
FR1 1.8ohm 12V 3 2 R156 0ohm 5V
COMMON
0.1A
4 3 2
IN OUT
5% COMMON 06030.05 0.12A
ohm NO STUFF
1206_F
C35 TAB C4 C6 IN OUT
4
1uF R27 0.1uF 4.7uF TAB C710 C712
GND/ADJ

16V 340ohm 16V 6.3V R557 0.1uF 4.7uF

GND/ADJ
10% 1% 10% 20% C711 C713 340ohm 16V 6.3V
X7R 0402 X7R X6S 0.1uF 1uF 1% 10% 20%
1

0603 COMMON 0402 0603 X7R X6S

PS_5V_ADJ 16V 16V 0402
4 COMMON COMMON COMMON 4

1
COMMON 0402 0603
10% 10%
COMMON COMMON
X7R X7R
R29 PS_5VPVCC_ADJ
GND GND GND 0402 0603
1.02k COMMON COMMON R556
GND GND
1% 1.02k
0402 1%
COMMON GND GND 0402
COMMON

GND

GND

100mA DDC_5V
U37
INS16808441
SOT23_5B
COMMON 5V
0.2A
5 IN OUT 1 0.400

PS_5V_DDC_EN
R155 0ohm 4 EN
06030.05 ohm COMMON

SNN_5V_DDC_OC
2 GND OC* 3

5 5
GND

Galaxy Microsystems (HK) Ltd.

Page Name:
POWER:1V8 & 5V
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL POWER:1V8 & 5V
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Friday, April 07, 2017 Sheet 15 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

POWER: NV3V3, NV12V

12V_PEX

DP SKU
1 1
3V3_PEX
C2 C49 R53
1nF 10k R3 NV12V
16V 5%
10% 0402
X7R NO STUFF
0402 S
NO STUFF G 2 Q4 0.1A
3V3_PEX 1 1G1D1S 3
NO STUFF D Q4
D SOT323_1G1D1S
INS16809335 INS16809045
Q592
3 1G
SOT23_1G1D1S
NO STUFF
1G1D1S S 2
R64 C46 R38 Q1
R2 0ohm 0.1uF 100ohm
0.05 ohm 16V 5%
0402 10% 0603
COMMON X7R NO STUFF
3V3_PEX 0402
NO STUFF
GND NV3V3
R54 1k
0402 COMMON
PS_NV3V3_EN_Q PS_NV3V3_EN_DW
5%
R42 3
Co-Layout Q1&Q2
1G1D1S
10k D Q8
5%
@discrete.q_fet_n_enh(sym_2):page16_i102
0402 PS_NV3V3_EN_R
3 1G
SOT323_1G1D1S
NO STUFF 1G1D1S NO STUFF
D Q11 S 2
@discrete.q_fet_n_enh(sym_2):page16_i93 C45 Q3
PS_1V8_PG PS_NV3V3_EN 0.1uF
R77 0ohm 1G
SOT323_1G1D1S
2 2
14,15 COMMON 0.5A
2
IN 16V
3.3V 04020.05 ohm COMMON S
C60 10%
10nF X7R
R30 C38
0402
25V C51 NO STUFF GND 10k 0.1uF
10%
GND 1nF GND 5% 16V

C1
X7R 0402 10%
16V
0402 NO STUFF X7R
10%
NO STUFF 0402
X7R
0402 COMMON

GND
COMMON S
G 2 GND GND
R49 1k 1
COMMON
0402 5% COMMON D SOT323_1G1D1S
Q7 INS16895314
R1 3
Non-DP SKU 1G1D1S

S
For Non-DP SKU, No stuff C2,R3,Q4,Q3,Q1 G 2
1
Stuff R2,C1,R1,Q2 D
COMMON
SOT23_1G1D1S
Q9 INS16962944
3
1G1D1S
14 OUT

SOT23 OPTION

3 12V_PEX 3V3_PEX 3
12V_PEX

12V_PEX D501
R567 2 @discrete.d_3pin_cc(sym_3):page16_i82

1
10k 30V
R573 5% 0.2A
22.1k 0402
6 PEX_VDD PEX_VDD
SOT23
COMMON 1B1C1E
1% C Q508A
COMMON
3

0402 INPUT_PEX6_EN*
COMMON 1B1C1E 3 B2 @discrete.q_npn(sym_1):page16_i75
C Q508B SOT363 PS_DISC_D R516
INPUT_PEX6_VDET B5
COMMON 15ohm R515
@discrete.q_npn(sym_1):page16_i57 E 1 nv_res
SOT363 C697 C698 5% 15ohm
R575 C722 COMMON 10uF 1uF R555 0805
4
5%
E COMMON
3.01k 10nF 16V 16V NV3V3 2k 0805
NO STUFF
1% 25V 10% 10% 5%
X6S X7R
GND
0402 10% 0402
COMMON 0805 0603 COMMON
X7R
GND NO STUFF COMMON R565 R566 PS_PEXVDD_DSH_QR
0402
2k 15ohm
COMMON
1G1D1S 3
5% 5% D Q502
GND GND
0402 0805
@discrete.q_fet_n_enh(sym_2):page16_i134
COMMON COMMON
PS_NV3V3_DIS PS_DW_CTL_INV
3V3_PEX 1G1D1S 3 1G1D1S 3 1G SOT323_1G1D1S
COMMON
D Q507 D Q504 S 2
3V3_PEX GND @discrete.q_fet_n_enh(sym_2):page16_i86 PS_DW_CTL @discrete.q_fet_n_enh(sym_2):page16_i131
R558 PS_NV3V3_EN*
1G1D1S 3 1G SOT323_1G1D1S
14 1G SOT23_1G1D1S
10k D COMMON COMMON
2 2
IN
Q506 S S
R560 5%
@discrete.q_fet_n_enh(sym_2):page16_i79
5.49k 0402
6 1G
SOT23_1G1D1S
COMMON 1B1C1E COMMON
1% C Q505A S 2 GND
0402 INPUT_3V3_EN*
COMMON 1B1C1E 3 B2 @discrete.q_npn(sym_1):page16_i71
C GND
60V
SOT363
4 Q505B 0.3A
4
INPUT_3V3_VDET B5
COMMON
GND
1
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V

@discrete.q_npn(sym_1):page16_i53 E 0.8A
0.35W
SOT363 20V
COMMON
R562 C715 E 4
3.01k 10nF
1% 25V GND
GND
0402 10%
COMMON
GND
X7R
0402
COMMON

GND GND

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
POWER: NV3V3, NV12V
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL POWER: NV3V3, NV12V
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 16 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

POWER:PEX_VDD

1 1

PEX_VDD

FBVDDQ

5V_PVCC

R1145
2R2ohm
0.05 ohm C152 C150
0402 4.7uF 0.1uF
COMMON
6.3V 16V
20% 10%
X6S
0603
X7R
0402
1.0V : 0.745A
C151 COMMON COMMON
1uF
6.3V
2 2
10%
X6S
U8
0402 PEX_VDD
INS16810236
COMMON
SOP8 GND
COMMON
PEX_VDD
GND 3 VIN VOUT 6 1V 0.745A 0.400

4 C545 C546 C571 C557 C573

VCNTL 22uF 22uF 22uF 22uF 22uF
R138
PS_PEXVDD_EN 0ohm
14 2 EN
6.3V 6.3V 6.3V 6.3V 6.3V
PS_PEX_LDO_FB
7
IN 0.05 ohm 20% 20% 20% 20% 20%
SNN_PS_PEXVDD_PG FB 0402 X6S X6S X6S X6S X6S
1 POK COMMON 0805 0805 0805 0805 0805

GND 9 NO STUFF COMMON COMMON COMMON NO STUFF

SNN_PS_PEXVDD_NC
5 NC GND 8
PS_PEX_LDO_FB_R
C147 Co-Layout 0603 and 0805
1nF R139
GND
16V 2.55k
GND 10% 1%
X7R
Rt
Vout = Vref * (1+Rtop/Rbot)
0402 C574 C547 C556 C544 C572
0402 COMMON
COMMON
22uF 22uF 22uF 22uF 22uF
4V 4V 4V 4V 4V
1.00V = 0.8V * (1+2.55k/10.2k)
20% 20% 20% 20% 20%
X6S X6S X6S X6S X6S
R140
0603W 0603W 0603W 0603W 0603W
10.2k NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF
1%
Rb
0402
COMMON

GND

3 GND 3

4 4

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
POWER:PEX_VDD
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL POWER:PEX_VDD
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 17 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

POWER:FBVDDQ
12V_PEX

Input Ripple: ~2A CLOSE TO HFET

C685 C689 C88 C87 C92

1
1uF 1uF 1uF 1uF 0.1uF 1
16V 16V 16V 16V 16V
10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R
0603 0603 0603 0603 0402
COMMON COMMON COMMON COMMON COMMON

12V_PEX

R1146 GND LFPAK D 5

2R2ohm Q18
U6 INS16882380 FBVDDQ = 5A @ 1.5V
PS_FB_UG_R
@power_supply.u_swreg_up6101(sym_1):page18_i90
0.400
R87 0ohm 0.400 4G LFPAK

1
RT8120A COMMON
COMMON PSOP8
0402 0.05 ohm COMMON S
2
30V
38A
0603 COMMON
PS_FB_VCC12
5 VCC 1 R157 0ohm C89 0.1uF 3
5.5mohm@10V / 8.7mohm@4.5V / 0mohm@2.5V
0.05 ohm PS_FB_BOOT 120A
0.400 BOOT 1.6W
20V
12V 0402 0.05 ohm COMMON 0402 16V
10%
C72 X7R
FBVDDQ
1uF
Ripple Current: ~4.5A
PS_FB_UG COMMON
HDRV 2
16V
PS_FB_PHASE
8
10%
PHASE 0.400
L5 1uH 0.300 5A 1.5V
FBVDDQ
X7R
0603 TH COMMON
COMMON
LFPAK D 5
PS_FB_FS
7 COMP/EN Q19 C680
INS16882415 2.2nF C99
GND
3 GND PS_FB_LG C123 C118 C664 C113
LDRV/OCS 4 4G LFPAK 50V
R674 9 PS_FB_FB
0.400
22uF 22uF 22uF 22uF 820uF
FB 6 1
COMMON 10%
GND 0.200 S
24Kohm X7R
2
30V
6.3V 6.3V 6.3V 6.3V COMMON
2 60A
0402 2
20%
R86 C95 3
3mohm@10V / 5.1mohm@4.5V / 0mohm@2.5V
0.05 ohm 20% 20% 20% 20%
160A
COMMON 2.5V@105degC
0402 10k 100pF X6S X6S X6S X6S
1.6W
20V
AL-Polymer

PS_FB_RC_SNUB
COMMON Roc 0805 0805 0805 0805
5% 50V 5A@105degC,100KHz
COMMON NO STUFF NO STUFF COMMON
0402 5% 0.007ohm
COMMON C0G 0.400 TH_D63P25
0402
COMMON
GND GND GND GND GND
R542
R675 6.98k 1ohm
GND
5%
0402 1% NO STUFF
1206
COMMON

GND
GND
C73 100pF
0402 50V
5%
C0G R80 200ohm PS_FB_RC_FB C57 6.8nF PS_FB_RC_FB_R R81 100ohm
0.200
C66 NO STUFF
0402 COMMON 0402 50V 0402 COMMON
5% 5%
0.01UF 10%
25V X7R
COMMON
10%
R82 1.87k
X7R
0402 0402 1% COMMON
COMMON 0.200
R74 6.49k Rt
0402 1% NO STUFF
C71
PS_FB_RC_CP

22pF R66 R73

12V_PEX
50V 6.19k 1.5k
Rb1 Rb
5% 1% 1%
C0G
3 R60 0402 0402
3
0402 NO STUFF COMMON
10k R67
1G1D1S 3 COMMON
5% D Q12B 18.2k
0402 1%
COMMON
@discrete.q_fet_n_enh(sym_2):page18_i94 Vout = Vref * (1+Rt/Rb)
0402
1G1D1S 6 5G SOT363
COMMON COMMON
PS_NVVDD_PG
D Q12A PS_FB_EN*
S 4 GS72V3SP-R:315-0872-000 300K
@discrete.q_fet_n_enh(sym_2):page18_i95
Vref=0.6V: 1.5V = 0.6V * (1+2K/1.33K)
PS_FB_EN_L
R85 1k 2G
60V
SOT363 0.115A
14,19 COMMON
1
IN
0402 5% COMMON S 0.8A

R84 C74
0.2W
20V
GND
100k 1uF
60V
0.115A
GND GND
5% 16V 0.8A

0402 10%
0.2W
20V
COMMON X7R
GPIO11_FBVDD_CTL_Q
0603 GND 1G1D1S 3 GS72V3SP-R:315-0872-000 300K
NO STUFF D Q6 0.200 Vref=0.6V: 1.5V = 0.6V * (1+1.87K/1.5K//6.19K)
@discrete.q_fet_n_enh(sym_2):page18_i35
GND 1.35V = 0.6V * (1+1.87K/1.5K)
GPIO18_FBVDD_CTL_R
GPIO8_FBVDD_SEL
12
R48 1k 1G SOT23_1G1D1S
NO STUFF
2
IN
GND 0402 5% NO STUFF S
R63 C44 APW8720:315-0601-000 300K
10k 10nF
60V
0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V Vref=0.5V: 1.5V = 0.5V * (1+1.87K/1.1K//6.19K)
5% 25V 0.8A

0402 0.35W 1.35V = 0.5V * (1+1.87K/1.1K)

10% 20V
NO STUFF X7R
0402
NO STUFF

GND GND GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
POWER:FBVDDQ
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL POWER:FBVDDQ
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 18 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

POWER:NVVDD

1 1

5V_PVCC

12V_PEX
R50
0ohm
R45 0.05 ohm
NV3V3
2.2ohm 0603
COMMON
5%
R36 0402
NO STUFF
10k U5
5% PS_NVVDD_FS_PU 2V
0402
@power_supply.u_openvreg_type2plus(sym_1):page19_i34 C54 C50
COMMON
R51 C47 QFN3X3 4.7uF 1uF
590k 1uF COMMON 6.3V 16V
PS_NVVDD_PG 14,18
OUT 1% 16V 20% 10%

1V8
0402 10% OPENVREG X6S
0603
X7R
0603
NO STUFF X7R
0603 COMMON COMMON
PS_NVVDD_PVCC
NO STUFF 9 OCS/CB PVCC 18
R559
GND
1k
GND
1% PS_NVVDD_FS
0402
NO STUFF
R46 R52 C48 PS_NVVDD_HG1
HGATE1 2
R75 0ohm PS_NVVDD_HGATE1
61.9k 60.4k 100pF 20 OUT
GPIO6_NVVDD_PSI* R78 10k 04020.05 ohm COMMON
IN 12 1% 1% 50V
2 0402 1% COMMON 2
0402 0402 PS_NVVDD_BOOT1 PS_NVVDD_BOOT_RC1 C59 0.1uF
BOOT1 1
5%
COMMON COMMON
R76 0ohm
C0G
0402 04020.05 ohm COMMON 0402 16V COMMON
R561 NO STUFF PHASE1 20 10% PS_NVVDD_PHASE1 20
4.99k IN

LGATE1 19
1%
GND GND PS_NVVDD_LGATE1
20
0402 OUT
COMMON

R69 7.5k
GND
0402 5% NO STUFF

GND 13 PGOOD

PS_NVVDD_EN 14 3 EN
IN

PS_NVVDD_PSI* PS_NVVDD_HG2
4 PSI HGATE2 14 R34 0ohm PS_NVVDD_HGATE2
20 OUT
04020.05 ohm NO STUFF
GPIO0_NVVDD_PWM_VID
12 5 VID
IN
15 PS_NVVDD_BOOT2 R35 0ohm PS_NVVDD_BOOT_RC2 C39 0.1uF
BOOT2 IN 20
04020.05 ohm NO STUFF 0402 16V NO STUFF
PS_NVVDD_VREF
8 VREF PHASE2 16 PS_NVVDD_PHASE2 10%

C62 PS_NVVDD_VREF_R3 R55 0ohm PS_NVVDD_VREF_R2 R56 20.5k 17

LGATE2 PS_NVVDD_LGATE2 20
1uF C61 OUT
04020.05 ohm COMMON 0402 1% COMMON
6.3V 1uF
10% 6.3V R71 4.32k PS_NVVDD_REFIN R47 20k
X6S
7 GND
10%
PS_NVVDD_VSNS R537 100ohm
0402 X6S
0402 1% COMMON REFIN 0402 5% NO STUFF
IN 20 GND
COMMON 0402 0402 5% COMMON
PS_NVVDD_VREF_R1 PS_NVVDD_REFADJ
NO STUFF R79 0ohm R68 6.19k 6 REFADJ
GND 04020.05 ohm COMMON 0402 1% COMMON
PS_NVVDD_GND_SENSE
3
GNDSNS 10 R533 0ohm GPU_NVVDD_GNDSNS 3
7
C53 R62 309ohm PS_NVVDD_VREF_R4 R61 16.5k 04020.05 ohm COMMON
IN
4.7nF PS_NVVDD_VSNS_R
0402 1% COMMON 0402 1% COMMON
FB/VSNS 11 R37 1k
16V
0402 COMMON
C40
1%
10% 1nF
X7R
12 PS_NVVDD_COMP C43 150pF 16V
0402 COMP
COMMON C52 50V
10%
0402
4.7nF 5%
X7R
0402
R72 0ohm PS_NVVDD_VREFIN_GND 16V C0G
NO STUFF
NO STUFF
GND
21
10%
04020.05 ohm NO STUFF X7R THERM/GND
R70 R568 61.9k PS_NVVDD_COMP_RC C718 4.7nF R41 0 OHM PS_NVVDD_VSNS_RC C41 15nF R534 0ohm GPU_NVVDD_VSENSE
0402 7
0ohm NO STUFF
IN
0402 1% COMMON 0402 16V 0402 1% COMMON 0402 16V 04020.05 ohm COMMON
0.05 ohm 10% 10%
0402 C721 C714 X7R X7R
COMMON GND
1nF 1nF COMMON COMMON
R538 100ohm
GND NVVDD
16V 16V
0402 5% COMMON
10% 10%
X7R X7R
0402 0402
NO STUFF NO STUFF

GND GND

R569
10k
1%
0402
4 NO STUFF 4

GND

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
POWER:NVVDD
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL POWER:NVVDD
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 19 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

POWER:NVVDD

1 1

12V_PEX

C76 C79 C78 C67 C68 C85

0.1uF 1uF 1uF 1uF 1uF
16V 16V 16V 16V 16V 270uF
10% 10% 10% 10% 10% COMMON
X7R X7R X7R X7R X7R 20%
0402 0603 0603 0603 0603 16V@105.05degC
2 LFPAK D 5 COMMON COMMON COMMON COMMON COMMON AL-Polymer 2
Q13 5A@105.05degC,100KHz

@discrete.q_fet_n_enh(sym_5):page20_i5 0.01ohm
TH_D63P25
PS_NVVDD_HGATE1 4G LFPAK
19
1
IN COMMON
S
2
30V
38A
NVVDD
3 GND
5.5mohm@10V / 8.7mohm@4.5V / 0mohm@2.5V
120A
1.6W
20V

PS_NVVDD_PHASE1 L3 0.36uH
OUT 19 22A 1.0V
TH COMMON C101 C100
LFPAK D 5 820uF 820uF
Q15 C668 C666 C659 C669
@discrete.q_fet_n_enh(sym_5):page20_i4 C691 FOR RT8817 22uF 22uF 22uF 22uF NO STUFF COMMON

PS_NVVDD_LGATE1 1nF 20% 20%

19 4G LFPAK 6.3V 6.3V 6.3V 6.3V
2.5V@105degC 2.5V@105degC
PS_NVD_PH1_RI C686 22nF
1
IN COMMON 20% 20% 20% 20%
S 50V R543 8.06k AL-Polymer AL-Polymer
X6S X6S X6S X6S
2
30V
60A 10% 5A@105degC,100KHz 5A@105degC,100KHz
0402 5% COMMON 0402 16V 0805 0805 0805 0805
X7R
C700 3
3mohm@10V / 5.1mohm@4.5V / 0mohm@2.5V
10% 0.007ohm 0.007ohm
160A
0603 COMMON NO STUFF NO STUFF COMMON
1.5nF TH_D63P25 TH_D63P25
1.6W
X7R
20V
COMMON
COMMON
50V
LFPAK D 5
5%
Q16 PS_NVVDD_PH1_SNU GND GND GND GND
C0G
0402 @discrete.q_fet_n_enh(sym_5):page20_i103 GND
COMMON GND 4G LFPAK R546 GND
1ohm
1
COMMON
S
2 C717 10nF
30V
5%
19,20 PS_NVVDD_VSNS
60A

GND C687 3
1206
3mohm@10V / 5.1mohm@4.5V / 0mohm@2.5V
160A OUT
COMMON 0402 16V
1.5nF
1.6W
20V 10%
50V X7R
5% COMMON
C0G
0402
3 NO STUFF GND 3
GND
12V_PEX
GND

C77 C82 C80 C69 C70 C81 C75 C709 C706 C705 C708 C703 C704
0.1uF 0.1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
16V 16V 16V 16V 16V 16V 270uF 16V 16V 16V 16V 16V 16V
10% 10% 10% 10% 10% 10% NO STUFF 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R 20% X7R X7R X7R X7R X7R X7R
0402 0402 0603 0603 0603 0603 16V@105.05degC 0603 0603 0603 0603 0603 0603
NO STUFF NO STUFF COMMON COMMON COMMON COMMON AL-Polymer COMMON COMMON COMMON COMMON COMMON COMMON
5A@105.05degC,100KHz

5
0.01ohm
LFPAK D TH_D63P25
Q14
@discrete.q_fet_n_enh(sym_5):page20_i59
PS_NVVDD_HGATE2 4G LFPAK
19
1
IN NO STUFF
S
2 GND GND
30V
38A
NVVDD
3
5.5mohm@10V / 8.7mohm@4.5V / 0mohm@2.5V
120A
1.6W
20V

PS_NVVDD_PHASE2 L2 0.36uH
OUT 19
TH COMMON

LFPAK D 5
Q17 C696 C115 C667 C665 C670 C102
@discrete.q_fet_n_enh(sym_5):page20_i60 2.2nF FOR RT8817 22uF 22uF 22uF 22uF
820uF
4 PS_NVVDD_LGATE2 4G LFPAK 50V 6.3V 6.3V 6.3V 6.3V
4
19 PS_NVD_PH2_RI
IN
S 1
NO STUFF 10%
R544 10k C688 1nF 20% 20% 20% 20% COMMON
X7R X6S X6S X6S X6S 20%
2
30V
60A
0603 0402 5% NO STUFF 0402 16V 0805 0805 0805 0805 2.5V@105degC
C701 3
3mohm@10V / 5.1mohm@4.5V / 0mohm@2.5V
160A
NO STUFF 10% COMMON NO STUFF NO STUFF AL-Polymer
100pF
1.6W
20V X7R COMMON 5A@105degC,100KHz
50V PS_NVVDD_PH2_SNU NO STUFF 0.007ohm
TH_D63P25
5% R547 GND GND GND GND
C0G 1ohm
0402
NO STUFF GND 5% GND
1206
NO STUFF
C716 1nF PS_NVVDD_VSNS
19,20
GND 0402 16V
OUT

10%
X7R

GND
NO STUFF

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
POWER:NVVDD
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL POWER:NVVDD
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 20 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
 A B C D E F G H

Mechanical

BKT1
BRACKET

1 NO STUFF 1
1

MECH. MOUNTING ALL

(DEPENDS ON I2C BUS PULL UP VOLTAGE)
(TO SELECT TO 3.3V OR 5V)

NV3V3
GND

R1136 Mechanical
0
5%
R0805
COMMON
2 2

D800
1 2

C1918 R1130
30VR
SM_SOD123 10K
0.1UF 0.5A
COMMON
COMMON 5%
X7R R0402
16V COMMON
C0402
10%
U800
GND

8
EEPROMA0 1 5
EEPROMA1 2 A0 SDA R1131

VCC
J18 EEPROMA2 3 A1 100K
MEC2
4 VCC_3V3 A2 5%
COOLING SOLUTION @mechanic.heatsink(sym_5):page21_i11
3 I2C_CLK 6
R0402
4PIN
SCL
COMMON
2 I2C_DATA 4 connected mounting pins COMMON

1 GND1 7

GND
WP

1
2
3
4
VERTICAL
COMMON 24C02/SO8

4
5 pin 90 Degree Connector

MALE
2.0MM
dip_head1x4_2mm_90
GND GND
GND
EXTERNAL PROGRAMMING HEARDER
GND

3 3
R1128 R1129
2.2K 2.2K
5% 5%
R0402 R0402
COMMON COMMON

R1127 0 R1142 0 I2CB_SCL_R

12 OUT
R0603 COMMON R0603 COMMON

R1139 0 R1143 0 I2CB_SDA_R

12 BI
NVVDD
R0603 COMMON R0603 COMMON

GPU_V ns TestP/NC tp_oct2mm_dip

FBVDDQ

DDR_V ns TestP/NC tp_oct2mm_dip

VCC_3V3 VCC_3V3 VCC_3V3
R1137 R1132 R1134 PEX_VDD PEX_VDD
0 0/NC 0/NC
5% 5% 5%
PCI_V ns TestP/NC tp_oct2mm_dip
COMMON EEPROMA2 COMMON EEPROMA1 COMMON EEPROMA0
R0402 R0402 R0402 DDC_5V

5V ns TestP/NC tp_oct2mm_dip
R1138 R1133 R1135
0/NC 0 0
5% 5% 5% 1V8
COMMON COMMON COMMON
R0402 R0402 R0402
4 4

1.8v ns TestP/NC tp_oct2mm_dip

GND GND GND

GND ns TestP/NC tp_oct2mm_dip

GND

5 5

Galaxy Microsystems (HK) Ltd.

Page Name:
Mechanical
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
PAGE DETAIL Mechanical
Custom
P85C James Lee V10

ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Wednesday, April 05, 2017 Sheet 21 of 21
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H