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A B C D E F G H

P45U V10

GP106 8GB/4GB GDDR5, 256b, 256Mx32/128MX32


1
Tall DVI-D + HDMI+ DP 1

TABLE OF CONTENTS
Page Description Page Description

1 Table of Contents 26 PS: 1V8_PLL, 1V8_AON


2 Block Biagram 27 PS: 5V, PEX_VDD
3 PCI Express 28 PS: NV3V3, NV12V
4 GPU FB_AB 29 PS: FBVDD
5 MEMORY: FBA[31:0] 30 PS: NVVDD Controller
2 2

6 MEMORY: FBA[63:32] 31 PS: NVVDD Phase 1-4


7 MEMORY: FBB[31:0] 32 PS:Blank page
8 MEMORY: FBB[63:32] 33 PS: Input, Filtering, and Monitoring
9 MEM FB_AB PWR 34 PS: 12V Power Steering,PSI Control & LED
10 GPU FB_CD 35 PS: Shut Down and Sequencing
11 MEMORY: FBC[31:0] 36 PS: GC6 MISC
12 MEMORY: FBC[63:32] 37 MECH_SN EEPRON
13 MEMORY: FBD[31:0]
14 MEMORY: FBD[63:32]
15 MEM FB_CD PWR
3 3

16 GPU PWR & GND


17 GPU Decoupling
18 IFPAB DVI-D-DL
19 IFPE UNUSED
20 IFPF UNUSED
21 IFPC HDMI
22 IFPD DP
23 MIOA/B Interface and Frame Lock
24 MISC1: Fan, Thermal, JTAG, GPIO,STEREO
25 MISC2: ROM, XTAL,STRAPS
4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
Table of Contents
ASSEMBLY <ASSEMBLY_DESCRIPTION>
Size Project Name: Design By: Rev
PAGE DETAIL Table of Contents Custom Carson V10
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
P45U
Date: Thursday, December 28, 2017 Sheet 1 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page2: Block Diagram

1 1

Power Supply:

Power Supply
NVVDD-PH3_BAL

3-WAY SLI Power Supply


NVVDD-PH3
2 2
FRAME LOCK 2-WAY SLI
DP

Power Supply
EXT_12V 2x3PWR 1
NVVDD-PH2
MEM D MEM D
POWER SUPPLY

LO HI MEM C Power Supply


QD:DP

NVVDD-PH1
LO
HDMI/

MEM C
3 3

HI
Power Supply
GP104/GP106 FBVDD/Q-PH1
PEX_12V Finger
MEM B
DP

LO Power Supply
5V Linear

MEM B
PEX_VDD 3V3 Finger
DVI-I

HI
Open_Vreg option
DP

4
MEM A MEM A 4

HI LO Fan

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
ASSEMBLY <ASSEMBLY_DESCRIPTION>
PAGE DETAIL Block Biagram
Block Biagram
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
Size Project Name: Design By: Rev
Custom Carson V10
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL P45U
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. Date: Thursday, December 28, 2017 Sheet 2 of 37

A B C D E F G PROPERTY NOTE: This document contains


H information confidential and
property to Galaxy Microsystems (HK) Ltd.
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Page3: PCI Express


PEX_TCLK
BI {36} 12V
12V NET VOLTAGE MAX_CURRENT MIN_WIDTH

3V3 12V 12V 5.5A 0.406


CN1
CON_X16 3V3
3.0A 0.400
C979 C978 C980 COMMON R767 0ohm
10uF 4.7uF 0.1uF @electro_mechanic.con_pci_express(sym_1):page3_i662
04020.05 ohm COMMON GND 0V 8.5A 0.400
16V 16V 16V 3.3V 3.3V
20% 10% 10%
B1 B9 NV3V3 NV3V3
X6S X5R X7R +12V TRST* JTAG1
1 0805LP 0603 0402 B2 +12V TCLK JTAG2 A5 1
3V3 COMMON COMMON COMMON A2 +12V TDI JTAG3 A6 GND
A3 A7 PEX_TDO
+12V TDO JTAG4

2
B3 A8 3V3 3V3
G Q524B G Q524A
+12V/RSVD TMS JTAG5
@discrete.q_fet_n_enh(sym_7):page3_i968 @discrete.q_fet_n_enh(sym_7):page3_i970
GND
SOT363 SOT363
B8 +3V3 COMMON COMMON
C88 C970 A9 R754 R755 3 D S 4 6 D S 1
4.7uF 0.1uF +3V3 47k 47k
A10 +3V3 Q_FET_N_ENH/NC Q_FET_N_ENH/NC
6.3V 16V 5% 5%
20% 10% 0402 0402
SNN_3V3AUX B10
X5R X7R +3V3AUX COMMON COMMON
0603 0402 R756 0ohm/NC I2CS_SCL
COMMON COMMON R758 0ohm/NC I2CS_SDA
OUT {24}
04020.05 ohm DNI
PEX_SMCLK
BI {24}
A1 PRSNT1 SMCLK B5 04020.05 ohm DNI
SNN_PE_PRSNT2_A B17 B6 PEX_SMDAT
PRSNT2 SMDAT OUT G1A
BI
GND BGA2152
PEX_CONN_B12 B12 RSVD
COMMON Place between
BI
1/23 PCI_EXPRESS Place under GPU
B4 GND WAKE B11 PEX_WAKE* GPU and PS PEX_VDD
OUT {36}
A4 GND
R892 B7 BB33
STUFF FOR
0ohm/NC GND PEX_DVDD
A12 A11 PEX_RST* PEX_RST_BUF* BK26 BB35
GND PERST OUT {36} {36} IN PEX_RST PEX_DVDD
0.05 ohm
B13 BB36 C831 C855 C856 C830 C142 C910 C884 C890
TESLA ONLY 0402 GND PEX_DVDD 1uF 1uF 1uF 1uF 4.7uF 4.7uF 10uF 10uF
A15 GPU_PEX_CLKREQ* BL26 BC33
DNI GND {36} IN PEX_CLKREQ PEX_DVDD 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
B16 GND PEX_DVDD BC35
10% 10% 10% 10% 20% 20% 10% 10%
B18 GND REFCLK A13 PEX_REFCLK
PEX_REFCLK PEXGEN3_SIGNALS BM26 PEX_REFCLK PEX_DVDD BC36 X6S X6S X6S X6S X6S X6S X7R X7R
OUT
POWER_BRAKE* A18 A14 PEX_REFCLK* BM27 BD33 0402 0402 0402 0402 0603 0603 0805 0805
GND REFCLK PEX_REFCLK PEXGEN3_SIGNALS PEX_REFCLK PEX_DVDD
PEX_DVDD BD36 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
A16 PEX_TXX0 C946 0.22uF PEX_TX0 BG26
UNSTUFF FOR PERP0 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX0
2 R894 A17 PEX_TXX0* 6.3V 10% C945 0.22uF BH26 2
DT/QUADRO PERN0 PEXGEN3_SIGNALS PEX_TX0* PEXGEN3_SIGNALS PEX_TX0
0ohm/NC X5R
GND 6.3V 10%
0.05 ohm PEX_RX0 X5R
0402 PETP0 B14 PEX_RX0 PEXGEN3_SIGNALS C0402 BL27 PEX_RX0 GND
B15 PEX_RX0* C0402 BK27
DNI PETN0 PEX_RX0 PEXGEN3_SIGNALS PEX_RX0
END OF X1 1V8
SNN_PE_PRSNT2_B B31 A21 PEX_TXX1 C944 0.22uF PEX_TX1 BF26
PRSNT2 PERP1 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX1
GPU_EVENT_CONN_R A19 A22 PEX_TXX1* 6.3V 10% C943 0.22uF PEX_TX1* BE26 BB26
OUT RSVD PERN1 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX1 PEX_HVDD
RSVD4_POWER_BRAKE B30 X5R 6.3V 10% BB27
RSVD PEX_HVDD
GC6_FB_EN_CONN_A32 A32 B19 PEX_RX1 X5R BK29 BB29 C825 C826 C827 C773 C815 C803 C893 C841 C813
RSVD PETP1 PEX_RX1 PEXGEN3_SIGNALS C0402 PEX_RX1 PEX_HVDD
IN
PEX_RX1* 1uF 1uF 1uF 1uF 4.7uF 4.7uF 10uF 10uF 22uF
PETN1 B20 PEX_RX1 PEXGEN3_SIGNALS C0402 BL29 PEX_RX1 PEX_HVDD BB32
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
A20 GND PEX_HVDD BC26
C942 0.22uF 10% 10% 10% 10% 20% 20% 10% 10% 20%
B21 A25 PEX_TXX2 PEX_TX2 BF27 BC27
GND PERP2 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX2 PEX_HVDD X6S X6S X6S X6S X6S X6S X7R X7R X6S
B22 A26 PEX_TXX2* 6.3V 10% C940 0.22uF PEX_TX2* BG27 BC29 0402 0402 0402 0402 0603 0603 0805 0805 0805LP
GND PERN2 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX2 PEX_HVDD
A23 X5R 6.3V 10% BC30 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND PEX_HVDD
A24 B23 PEX_RX2 C0402 X5R BM29 BC32
GND PETP2 PEX_RX2 PEXGEN3_SIGNALS PEX_RX2 PEX_HVDD
B25 B24 PEX_RX2* C0402 BM30 BD27
GND PETN2 PEX_RX2 PEXGEN3_SIGNALS PEX_RX2 PEX_HVDD
B26 GND PEX_HVDD BD30
A27 A29 PEX_TXX3 C939 0.22uF PEX_TX3 BG29
GND PERP3 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX3 GND
A28 A30 PEX_TXX3* 6.3V 10% C938 0.22uF PEX_TX3* BH29
GND PERN3 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX3
B29 GND
X5R 6.3V 10%
A31 B27 PEX_RX3 X5R BL30
GND PETP3 PEX_RX3 PEXGEN3_SIGNALS C0402 PEX_RX3
B32 B28 PEX_RX3* C0402 BK30
GND PETN3 PEX_RX3 PEXGEN3_SIGNALS PEX_RX3
END OF X4
A35 PEX_TXX4 C937 0.22uF PEX_TX4 BF29
PERP4 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX4
A36 PEX_TXX4* 6.3V 10% C936 0.22uF PEX_TX4* BE29
PERN4 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX4
SNN_PE_PRSNT2_C B48 X5R 6.3V 10%
GND PRSNT2
SNN_PE_RSVD6 A33 B33 PEX_RX4 C0402 X5R BK32
RSVD PETP4 PEX_RX4 PEXGEN3_SIGNALS PEX_RX4
B34 PEX_RX4* C0402 BL32
PETN4 PEX_RX4 PEXGEN3_SIGNALS PEX_RX4
A34 1V8
GND
B35 A39 PEX_TXX5 C935 0.22uF PEX_TX5 BF30
GND PERP5 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX5
3 B36 A40 PEX_TXX5* 6.3V 10% C934 0.22uF PEX_TX5* BG30 3
GND PERN5 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX5
A37 GND
X5R 6.3V 10% PEX_PLL_HVDD BB30
A38 B37 PEX_RX5 X5R BM32
GND PETP5 PEX_RX5 PEXGEN3_SIGNALS C0402 PEX_RX5
B39 B38 PEX_RX5* C0402 BM33
GND PETN5 PEX_RX5 PEXGEN3_SIGNALS PEX_RX5
B40 C854
GND 0.1uF
A41 A43 PEX_TXX6 C932 0.22uF PEX_TX6 BG32
GND PERP6 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX6 16V
A42 A44 PEX_TXX6* 6.3V 10% C923 0.22uF PEX_TX6* BH32
GND PERN6 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX6 10%
B43 X5R 6.3V 10%
GND X7R
B44 B41 PEX_RX6 X5R BL33
GND PETP6 PEX_RX6 PEXGEN3_SIGNALS C0402 PEX_RX6 0402
A45 B42 PEX_RX6* C0402 BK33 COMMON
GND PETN6 PEX_RX6 PEXGEN3_SIGNALS PEX_RX6
A46 GND
B47 A47 PEX_TXX7 C922 0.22uF PEX_TX7 BF32
GND PERP7 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX7
B49 A48 PEX_TXX7* 6.3V 10% C921 0.22uF PEX_TX7* BE32
GND PERN7 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX7 GND
A49 X5R 6.3V 10%
GND
B45 PEX_RX7 C0402 X5R BK35
PETP7 PEX_RX7 PEXGEN3_SIGNALS PEX_RX7
B46 PEX_RX7* C0402 BL35
PETN7 PEX_RX7 PEXGEN3_SIGNALS PEX_RX7
END OF X8
A52 PEX_TXX8 C919 0.22uF PEX_TX8 BF33
GND PERP8 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX8
A53 PEX_TXX8* 6.3V 10% C918 0.22uF PEX_TX8* BG33
PERN8 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX8
PEX_PRSNT* B81 X5R 6.3V 10%
PRSNT2
SNN_PE_RSVD7 A50 B50 PEX_RX8 X5R BM35
RSVD PETP8 PEX_RX8 PEXGEN3_SIGNALS C0402 PEX_RX8
SNN_PE_RSVD8 B82 B51 PEX_RX8* C0402 BM36
RSVD PETN8 PEX_RX8 PEXGEN3_SIGNALS PEX_RX8

A56 PEX_TXX9 C900 0.22uF PEX_TX9 BG35


PERP9 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX9
A57 PEX_TXX9* 6.3V 10% C896 0.22uF PEX_TX9* BH35
PERN9 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX9
A51 X5R 6.3V 10%
GND
B52 B54 PEX_RX9 C0402 X5R BL36
GND PETP9 PEX_RX9 PEXGEN3_SIGNALS PEX_RX9
B53 B55 PEX_RX9* C0402 BK36
GND PETN9 PEX_RX9 PEXGEN3_SIGNALS PEX_RX9
A54 GND
A55 A60 PEX_TXX10 C913 0.22uF PEX_TX10 BF35
GND PERP10 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX10
4 B56 A61 PEX_TXX10* 6.3V 10% C912 0.22uF PEX_TX10* BE35 4
GND PERN10 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX10
B57 GND
X5R 6.3V 10%
A58 B58 PEX_RX10 X5R BK38
GND PETP10 PEX_RX10 PEXGEN3_SIGNALS C0402 PEX_RX10
A59 B59 PEX_RX10* C0402 BL38
GND PETN10 PEX_RX10 PEXGEN3_SIGNALS PEX_RX10
B60 GND
B61 A64 PEX_TXX11 C902 0.22uF PEX_TX11 BF36
GND PERP11 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX11
A62 A65 PEX_TXX11* 6.3V C901 0.22uF PEX_TX11* BG36
GND PERN11 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX11
A63 GND X5R 10% 6.3V 10%
B64 B62 PEX_RX11 X5R BM38
GND PETP11 PEX_RX11 PEXGEN3_SIGNALS C0402 PEX_RX11
B65 B63 PEX_RX11* C0402 BM39
GND PETN11 PEX_RX11 PEXGEN3_SIGNALS PEX_RX11
A66 GND
A67 A68 PEX_TXX12 C898 0.22uF PEX_TX12 BG38
GND PERP12 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX12
B68 A69 PEX_TXX12* 6.3V C897 0.22uF PEX_TX12* BH38
GND PERN12 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX12
B69 GND X5R 10% 6.3V 10%
A70 B66 PEX_RX12 C0402 X5R BL39
GND PETP12 PEX_RX12 PEXGEN3_SIGNALS PEX_RX12
A71 B67 PEX_RX12* C0402 BK39
GND PETN12 PEX_RX12 PEXGEN3_SIGNALS PEX_RX12
B72 GND
B73 A72 PEX_TXX13 C895 0.22uF PEX_TX13 BF38
GND PERP13 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX13
A74 A73 PEX_TXX13* 6.3V C892 0.22uF PEX_TX13* BE38
GND PERN13 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX13
A75 GND X5R 10% 6.3V 10%
B76 B70 PEX_RX13 X5R BK41
GND PETP13 PEX_RX13 PEXGEN3_SIGNALS C0402 PEX_RX13
B77 B71 PEX_RX13* C0402 BL41
GND PETN13 PEX_RX13 PEXGEN3_SIGNALS PEX_RX13
A78 GND
A79 A76 PEX_TXX14 C891 0.22uF PEX_TX14 BF39
GND PERP14 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX14
B80 A77 PEX_TXX14* 6.3V C888 0.22uF PEX_TX14* BG39
GND PERN14 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX14
A82 GND X5R 10% 6.3V 10%
B74 PEX_RX14 C0402 X5R BM41
PETP14 PEX_RX14 PEXGEN3_SIGNALS PEX_RX14
B75 PEX_RX14* C0402 BM42
PETN14 PEX_RX14 PEXGEN3_SIGNALS PEX_RX14

A80 PEX_TXX15 C887 0.22uF PEX_TX15 BH41


GND PERP15 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX15
5 A81 PEX_TXX15* 6.3V C886 0.22uF PEX_TX15* BG41 5
PERN15 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX15
X5R 10% 6.3V 10%

PETP15 B78 PEX_RX15


PEX_RX15 PEXGEN3_SIGNALS C0402 X5R BL42 PEX_RX15 PEX_TERMP BL44 PEX_TERMP R659 2.49k
B79 PEX_RX15* C0402 BK42 0402 1% COMMON
PETN15 PEX_RX15 PEXGEN3_SIGNALS PEX_RX15
END OF X16

PCIE_16X GND Galaxy Microsystems (HK) Ltd.


ASSEMBLY <ASSEMBLY_DESCRIPTION> Page Name:
PAGE DETAIL PCI Express PCI Express
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL Custom Carson V10
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
P45U
Date: Thursday, December 28, 2017 Sheet 3 of 37
A B C D E F G PROPERTY NOTE: This document contains
H information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page4: MEMORY: GPU Partition A/B

1 1
G1B G1C

BGA2152 BGA2152
COMMON COMMON
FB_DATA FB_CMD FB_DATA FB_CMD
FBA_D[63..0] 2/23 FBA FBA_CMD[31..0] FBB_D[63..0] 3/23 FBB FBB_CMD[31..0]
{5,6} BI BI {7,8} {5,6} BI OUT {7,8}
0 FBA_D0 U51 Y51 FBA_CMD0 0 0 FBB_D0 H32 B35 FBB_CMD0 0
FBA_D0 FBA_CMD0 FBB_D0 FBB_CMD0
1 FBA_D1 U48 Y52 FBA_CMD1 1 1 FBB_D1 D32 A35 FBB_CMD1 1
FBA_D1 FBA_CMD1 FBB_D1 FBB_CMD1
2 FBA_D2 U50 Y49 FBA_CMD2 2 2 FBB_D2 A33 D35 FBB_CMD2 2
FBA_D2 FBA_CMD2 GDDR5 CMD Mapping FBB_D2 FBB_CMD2
3 FBA_D3 U49 AA52 FBA_CMD3 3 3 FBB_D3 B32 A36 FBB_CMD3 3
FBA_D3 FBA_CMD3 FBB_D3 FBB_CMD3
4 FBA_D4 R51 AA51 FBA_CMD4 4 4 FBB_D4 E32 B36 FBB_CMD4 4
FBA_D4 FBA_CMD4 CMD 0..31 32..63 FBB_D4 FBB_CMD4
5 FBA_D5 R50 AA50 FBA_CMD5 5 5 FBB_D5 G32 C36 FBB_CMD5 5
FBA_D5 FBA_CMD5 FBB_D5 FBB_CMD5
6 FBA_D6 R47 AC50 FBA_CMD6 6 6 FBB_D6 J30 C38 FBB_CMD6 6
FBA_D6 FBA_CMD6 CMD0 CAS* FBB_D6 FBB_CMD6
7 FBA_D7 U46 AC51 FBA_CMD7 7 7 FBB_D7 F32 B38 FBB_CMD7 7
FBA_D7 FBA_CMD7 CMD1 CKE* FBB_D7 FBB_CMD7
8 FBA_D8 V46 AC52 FBA_CMD8 8 8 FBB_D8 H36 A38 FBB_CMD8 8
FBA_D8 FBA_CMD8 CMD2 RST* FBB_D8 FBB_CMD8
9 FBA_D9 Y45 AC49 FBA_CMD9 9 9 FBB_D9 G36 D38 FBB_CMD9 9
FBA_D9 FBA_CMD9 CMD3 RAS* FBB_D9 FBB_CMD9
10 FBA_D10 Y47 AD52 FBA_CMD10 10 10 FBB_D10 J36 A39 FBB_CMD10 10
FBA_D10 FBA_CMD10 CMD4 A1_A9 FBB_D10 FBB_CMD10
11 FBA_D11 Y46 AD51 FBA_CMD11 11 11 FBB_D11 F36 B39 FBB_CMD11 11
FBA_D11 FBA_CMD11 CMD5 A0_A10 FBB_D11 FBB_CMD11
12 FBA_D12 V50 AD50 FBA_CMD12 12 12 FBB_D12 F33 C39 FBB_CMD12 12
FBA_D12 FBA_CMD12 CMD6 A12_RFU FBB_D12 FBB_CMD12
13 FBA_D13 V47 AF50 FBA_CMD13 13 13 FBB_D13 D33 C41 FBB_CMD13 13
FBA_D13 FBA_CMD13 CMD7 ABI* FBB_D13 FBB_CMD13
14 FBA_D14 U52 AF51 FBA_CMD14 14 14 FBB_D14 J32 B41 FBB_CMD14 14
FBA_D14 FBA_CMD14 CMD8 A6_A11 FBB_D14 FBB_CMD14
15 FBA_D15 V51 AF52 FBA_CMD15 15 15 FBB_D15 G33 A41 FBB_CMD15 15
FBA_D15 FBA_CMD15 CMD9 A7_A8 FBB_D15 FBB_CMD15
16 FBA_D16 AJ44 AN50 FBA_CMD16 16 16 FBB_D16 E45 B49 FBB_CMD16 16
FBA_D16 FBA_CMD16 CMD10 WE* FBB_D16 FBB_CMD16
17 FBA_D17 AG48 AN51 FBA_CMD17 17 17 FBB_D17 D45 A49 FBB_CMD17 17
FBA_D17 FBA_CMD17 CMD11 A5_BA1 FBB_D17 FBB_CMD17
18 FBA_D18 AJ45 AN52 FBA_CMD18 18 18 FBB_D18 F45 A48 FBB_CMD18 18
FBA_D18 FBA_CMD18 CMD12 A4_BA2 FBB_D18 FBB_CMD18
19 FBA_D19 AG49 AM49 FBA_CMD19 19 19 FBB_D19 G45 D47 FBB_CMD19 19
FBA_D19 FBA_CMD19 CMD13 A2_BA0 FBB_D19 FBB_CMD19
20 FBA_D20 AF46 AM52 FBA_CMD20 20 20 FBB_D20 D42 A47 FBB_CMD20 20
FBA_D20 FBA_CMD20 CMD14 A3_BA3 FBB_D20 FBB_CMD20
21 FBA_D21 AF47 AM51 FBA_CMD21 21 21 FBB_D21 E42 B47 FBB_CMD21 21
FBA_D21 FBA_CMD21 CMD15 CS* FBB_D21 FBB_CMD21
22 FBA_D22 AF48 AM50 FBA_CMD22 22 22 FBB_D22 F42 C47 FBB_CMD22 22
FBA_D22 FBA_CMD22 CMD16 CAS* FBB_D22 FBB_CMD22
2 23 FBA_D23 AD47 AK50 FBA_CMD23 23 23 FBB_D23 H41 C45 FBB_CMD23 23 2
FBA_D23 FBA_CMD23 CMD17 CKE* FBB_D23 FBB_CMD23
24 FBA_D24 AD49 AK51 FBA_CMD24 24 24 FBB_D24 E41 B45 FBB_CMD24 24
FBA_D24 FBA_CMD24 CMD18 RST* FBB_D24 FBB_CMD24
25 FBA_D25 AD48 AK52 FBA_CMD25 25 25 FBB_D25 F39 A45 FBB_CMD25 25
FBA_D25 FBA_CMD25 CMD19 RAS* FBB_D25 FBB_CMD25
26 FBA_D26 AC46 AJ49 FBA_CMD26 26 26 FBB_D26 E39 D44 FBB_CMD26 26
FBA_D26 FBA_CMD26 CMD20 A1_A9 FBB_D26 FBB_CMD26
27 FBA_D27 AC47 AJ52 FBA_CMD27 27 27 FBB_D27 D39 A44 FBB_CMD27 27
FBA_D27 FBA_CMD27 CMD21 A0_A10 FBB_D27 FBB_CMD27
28 FBA_D28 AA47 AJ51 FBA_CMD28 28 28 FBB_D28 F38 B44 FBB_CMD28 28
FBA_D28 FBA_CMD28 CMD22 A12_RFU FBB_D28 FBB_CMD28
29 FBA_D29 AA46 AJ50 FBA_CMD29 29 29 FBB_D29 E38 C44 FBB_CMD29 29
FBA_D29 FBA_CMD29 CMD23 ABI* FBB_D29 FBB_CMD29
30 FBA_D30 AA45 AG50 FBA_CMD30 30 30 FBB_D30 D36 C42 FBB_CMD30 30
FBA_D30 FBA_CMD30 CMD24 A6_A11 FBB_D30 FBB_CMD30
31 FBA_D31 Y44 AG51 FBA_CMD31 31 31 FBB_D31 E36 B42 FBB_CMD31 31
FBA_D31 FBA_CMD31 CMD25 A7_A8 FBB_D31 FBB_CMD31
32 FBA_D32 AW51 AG52 SNN_FBA_CMD<32> 32 FBB_D32 M50 A42 SNN_FBB_CMD<32>
FBA_D32 FBA_CMD32 CMD26 WE* FBB_D32 FBB_CMD32
33 FBA_D33 BA52 AF49 SNN_FBA_CMD<33> 33 FBB_D33 P48 D41 SNN_FBB_CMD<33>
FBA_D33 FBA_CMD33 CMD27 A5_BA1 FBB_D33 FBB_CMD33
34 FBA_D34 AW50 Y50 FBA_DEBUG0 34 FBB_D34 M51 C35 FBB_DEBUG0
FBA_D34 FBA_CMD34 50OHM_NETCLASS1 TP508 CMD28 A4_BA2 FBB_D34 FBB_CMD34 50OHM_NETCLASS1 TP501
35 FBA_D35 BA51 AR50 FBA_DEBUG1 35 FBB_D35 M49 B50 FBB_DEBUG1
FBA_D35 FBA_CMD35 50OHM_NETCLASS1 TP510 CMD29 A2_BA0 FBB_D35 FBB_CMD35 50OHM_NETCLASS1 TP504
36 FBA_D36 BA50 36 FBB_D36 P47
FBA_D36 CMD30 A3_BA3 FBB_D36
37 FBA_D37 BB50 37 FBB_D37 P52
FBA_D37 CMD31 CS* FBB_D37
38 FBA_D38 BA49 38 FBB_D38 R46
FBA_D38 FBB_D38
39 FBA_D39 AW49 AA44 SNN_FBA_DBG_RFU1 39 FBB_D39 P46 J35 SNN_FBB_DBG_RFU1
FBA_D39 FBA_DBG_RFU1 FBB_D39 FBB_DBG_RFU1
40 FBA_D40 AV48 AN44 SNN_FBA_DBG_RFU2 40 FBB_D40 L50 J41 SNN_FBB_DBG_RFU2
FBA_D40 FBA_DBG_RFU2 FBB_D40 FBB_DBG_RFU2
41 FBA_D41 AT49 41 FBB_D41 L51
FBA_D41 FBB_D41
42 FBA_D42 AT47 42 FBB_D42 L52
FBA_D42 FBB_D42
43 FBA_D43 AT48 43 FBB_D43 L49
FBA_D43 FBB_D43
44 FBA_D44 AT46 AG45 FBA_CLK0 44 FBB_D44 M46 H42 FBB_CLK0
FBA_D44 FBA_CLK0 FB_CLK OUT {5} FBB_D44 FBB_CLK0 FB_CLK OUT {7}
45 FBA_D45 AV51 AG46 FBA_CLK0* 45 FBB_D45 L47 G42 FBB_CLK0*
FBA_D45 FBA_CLK0 FB_CLK OUT {5} FBB_D45 FBB_CLK0 FB_CLK OUT {7}
46 FBA_D46 AV52 AK46 FBA_CLK1 46 FBB_D46 M48 F47 FBB_CLK1
FBA_D46 FBA_CLK1 FB_CLK OUT {6} FBB_D46 FBB_CLK1 FB_CLK OUT {8}
47 FBA_D47 AV49 AK45 FBA_CLK1* 47 FBB_D47 M47 E47 FBB_CLK1*
FBA_D47 FBA_CLK1 FB_CLK OUT {6} FBB_D47 FBB_CLK1 FB_CLK OUT {8}
48 FBA_D48 AJ48 48 FBB_D48 D48
FBA_D48 FBB_D48
49 FBA_D49 AJ46 49 FBB_D49 C50
FBA_D49 FBB_D49
50 FBA_D50 AJ47 50 FBB_D50 C48
FBA_D50 FBB_D50
51 FBA_D51 AK49 51 FBB_D51 C49
FBA_D51 FBB_D51
52 FBA_D52 AM47 52 FBB_D52 E49
FBA_D52 FBB_D52
3 53 FBA_D53 AM46 53 FBB_D53 E50 3
FBA_D53 FBB_D53
54 FBA_D54 AN48 54 FBB_D54 F49
FBA_D54 FBB_D54
55 FBA_D55 AN49 55 FBB_D55 F48
FBA_D55 FBB_D55
56 FBA_D56 AM44 U45 FBA_WCK01 56 FBB_D56 F50 J33 FBB_WCK01
FBA_D56 FBA_WCK01 FB_WCK OUT {5} FBB_D56 FBB_WCK01 FB_WCK OUT {7}
57 FBA_D57 AM45 U44 FBA_WCK01* 57 FBB_D57 D52 H33 FBB_WCK01*
FBA_D57 FBA_WCK01 FB_WCK OUT {5} FBB_D57 FBB_WCK01 FB_WCK OUT {7}
58 FBA_D58 AN45 V45 SNN_FBA_WCKB01 58 FBB_D58 J50 G35 SNN_FBB_WCKB01
FBA_D58 FBA_WCKB01 FB_WCK FBB_D58 FBB_WCKB01 FB_WCK
59 FBA_D59 AN46 V44 SNN_FBA_WCKB01* 59 FBB_D59 H48 H35 SNN_FBB_WCKB01*
FBA_D59 FBA_WCKB01 FB_WCK FBB_D59 FBB_WCKB01 FB_WCK
60 FBA_D60 AR48 AC45 FBA_WCK23 60 FBB_D60 H51 J39 FBB_WCK23
FBA_D60 FBA_WCK23 FB_WCK OUT {5} FBB_D60 FBB_WCK23 FB_WCK OUT {7}
61 FBA_D61 AN47 AC44 FBA_WCK23* 61 FBB_D61 J51 H39 FBB_WCK23*
FBA_D61 FBA_WCK23 FB_WCK OUT {5} FBB_D61 FBB_WCK23 FB_WCK OUT {7}
62 FBA_D62 AR47 AD46 SNN_FBA_WCKB23 62 FBB_D62 H49 F41 SNN_FBB_WCKB23
FBA_D62 FBA_WCKB23 FB_WCK FBB_D62 FBB_WCKB23 FB_WCK
63 FBA_D63 AR46 AD45 SNN_FBA_WCKB23* 63 FBB_D63 H52 G41 SNN_FBB_WCKB23*
FBA_D63 FBA_WCKB23 FB_WCK FBB_D63 FBB_WCKB23 FB_WCK
FB_DBI FBA_WCK45 AV47 FBA_WCK45 FB_WCK FB_DBI FBB_WCK45 L46 FBB_WCK45 FB_WCK
OUT {6} OUT {8}
{5,6} IN
FBA_DBI[7..0] FBA_WCK45 AV46 FBA_WCK45* FB_WCK OUT {7,8} {6} IN
FBB_DBI[7..0] FBB_WCK45 L45 FBB_WCK45* FB_WCK OUT {8}
0 FBA_DBI0 U47 AW48 SNN_FBA_WCKB45 0 FBB_DBI0 C32 M44 SNN_FBB_WCKB45
FBA_DQM0 FBA_WCKB45 FB_WCK FBB_DQM0 FBB_WCKB45 FB_WCK
1 FBA_DBI1 Y48 AW47 SNN_FBA_WCKB45* 1 FBB_DBI1 E33 M45 SNN_FBB_WCKB45*
FBA_DQM1 FBA_WCKB45 FB_WCK FBB_DQM1 FBB_WCKB45 FB_WCK
2 FBA_DBI2 AG47 FBA_DQM2 FBA_WCK67 AR45 FBA_WCK67 FB_WCK {6}
2 FBB_DBI2 E44 FBB_DQM2 FBB_WCK67 H47 FBB_WCK67 FB_WCK {8}
OUT OUT
3 FBA_DBI3 AC48 FBA_DQM3 FBA_WCK67 AR44 FBA_WCK67* FB_WCK {6}
3 FBB_DBI3 G39 FBB_DQM3 FBB_WCK67 H46 FBB_WCK67* FB_WCK {8}
OUT OUT
4 FBA_DBI4 BB51 AT45 SNN_FBA_WCKB67 4 FBB_DBI4 P49 J47 SNN_FBB_WCKB67
FBA_DQM4 FBA_WCKB67 FB_WCK FBB_DQM4 FBB_WCKB67 FB_WCK
5 FBA_DBI5 AV50 AT44 SNN_FBA_WCKB67* 5 FBB_DBI5 L48 J46 SNN_FBB_WCKB67*
FBA_DQM5 FBA_WCKB67 FB_WCK FBB_DQM5 FBB_WCKB67 FB_WCK
6 FBA_DBI6 AM48 6 FBB_DBI6 D50
FBA_DQM6 FBB_DQM6
7 FBA_DBI7 AR49 7 FBB_DBI7 H50
FBA_DQM7 FBB_DQM7
FB_EDC FB_EDC
FBA_EDC[7..0] 1V8 FBB_EDC[7..0]
{5,6} IN
FBA_EDC0
{7,8} OUT
FBB_EDC0
0 R48 FBA_DQS_WP0 0 B33 FBB_DQS_WP0
1 FBA_EDC1 V48 1 FBB_EDC1 E35
FBA_DQS_WP1 FBB_DQS_WP1
2 FBA_EDC2 AF44 LB502 2 FBB_EDC2 G44
FBA_DQS_WP2 FBB_DQS_WP2
3 FBA_EDC3 AA48 30ohm 3 FBB_EDC3 H38
FBA_DQS_WP3 FBB_DQS_WP3
4 FBA_EDC4 BB52 4 FBB_EDC4 P50
FBA_DQS_WP4 COMMON FBB_DQS_WP4
5 FBA_EDC5 AT50 5 FBB_EDC5 J48
FBA_DQS_WP5 BEAD_0603 FBB_DQS_WP5
6 FBA_EDC6 AK48 6 FBB_EDC6 D51
FBA_DQS_WP6 FBB_DQS_WP6
4 7 FBA_EDC7 AR51 AN42 1V8_FB_PLL 7 FBB_EDC7 F51 L38 1V8_FB_PLL 4
FBA_DQS_WP7 FBA_PLL_AVDD OUT {4,10} FBB_DQS_WP7 FBB_PLL_AVDD IN {4,10}

W47 C645 C903 Y17 C652


GND 0.1uF 22uF GND 0.1uF
W49 GND Y18 GND
16V 6.3V 16V
W51 GND Y19 GND
10% 20% 10%
W6 GND X7R X6S Y20 GND X7R
W8 GND 0402 0805LP Y21 GND 0402
Y14 GND COMMON COMMON Y22 GND COMMON
Y15 GND Y23 GND
Y16 GND Y24 GND
FBVDD FBVDD GND
GND

GND AF42 FB_REFPLL_AVDD0


GND
R602 R645 R568 R570
L29 FB_REFPLL_AVDD1 10k 10k 10k 10k
1V8_FB_PLL 5% 5% 5% 5%
{4,10} IN 0402 0402 0402 0402
COMMON COMMON COMMON COMMON
FBA_CMD1 FBB_CMD1
C775 C649 FBA_CMD17 FBB_CMD17
0.1uF 0.1uF
16V 16V FBA_CMD2 FBB_CMD2
10% 10%
FBA_CMD18 FBB_CMD18
X7R X7R
0402 0402
COMMON COMMON
R644 R601 R581 R580
10k 10k 10k 10k
5% 5% 5% 5%
0402 0402 0402 0402
COMMON COMMON COMMON COMMON

5 GND 5

GND GND
Galaxy Microsystems (HK) Ltd.
Page Name:
GPU FB_AB
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL GPU FB_AB P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 4 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page5: FRAME BUFFER PARTITION A [31:0]

1 1

FB_DATA
FB_CMD M3B
FBA_D[31..0]
BI {4} FB_EDC @memory.u_mem_sd_ddr5_x32(sym_5):page5_i342
BGA170_MIRR
FBA_EDC[7..0] FBA_CMD[31..0] COMMON
{4,6} IN
FB_EDC IN {4,6}
FBA_DBI[7..0] 3 FBA_CMD3 L3
{4,6} IN RAS
0 FBA_CMD0 G3 CAS
10 FBA_CMD10 G12 WE
15 FBA_CMD15 L12 CS

7 FBA_CMD7 J4
M3D M3A ABI
@memory.u_mem_sd_ddr5_x32(sym_2):page5_i297 @memory.u_mem_sd_ddr5_x32(sym_4):page5_i337 FBA_CMD5
BGA170_MIRR BGA170_MIRR 5 K4 A0_A10
2 COMMON COMMON 4 FBA_CMD4 K5 2
A1_A9
13 FBA_CMD13 K11
MIRRORED MIRRORED A2_BA0
14 FBA_CMD14 K10 A3_BA3
x32 x16 x32 x16 12 FBA_CMD12 H11 A4_BA2
0 FBA_D0 V4 16 FBA_D16 A11 11 FBA_CMD11 H10
DQ0 NC DQ16 NC A5_BA1
1 FBA_D1 V2 17 FBA_D17 A13 8 FBA_CMD8 H5
DQ1 NC DQ17 NC A6_A11
2 FBA_D2 T4 18 FBA_D18 B11 9 FBA_CMD9 H4
DQ2 NC DQ18 NC A7_A8
3 FBA_D3 T2 19 FBA_D19 B13 6 FBA_CMD6 J5
DQ3 NC DQ19 NC RFU_A12
4 FBA_D4 N4 DQ4 NC
20 FBA_D20 E11 DQ20 NC
5 FBA_D5 N2 DQ5 NC
21 FBA_D21 E13 DQ21 NC
6 FBA_D6 M4 DQ6 NC
22 FBA_D22 F11 DQ22 NC
7 FBA_D7 M2 DQ7 NC
23 FBA_D23 F13 DQ23 NC

0 FBA_EDC0 R2 2 FBA_EDC2 C13 2 FBA_CMD2 J2


EDC0 NC EDC2 GND RESET
0 FBA_DBI0 P2 2 FBA_DBI2 D13 1 FBA_CMD1 J3
DBI0 NC DBI2 NC CKE

FBA_CLK0 J12 CLK


{4} IN
VREFD V10 SNN_FBA_VREFD_M3_0
VREFD A10 SNN_FBA_VREFD_M3_1
{4} IN
FBA_CLK0* J11 CLK
8 FBA_D8 V11 DQ8 24 FBA_D24 A4 DQ24
9 FBA_D9 V13 DQ9 25 FBA_D25 A2 DQ25
10 FBA_D10 T11 26 FBA_D26 B4 R613 R612
DQ10 DQ26 40.2ohm 40.2ohm
11 FBA_D11 T13 DQ11 27 FBA_D27 B2 DQ27 1% 1%
12 FBA_D12 N11 DQ12 28 FBA_D28 E4 DQ28 0402 0402
13 FBA_D13 N13 DQ13 29 FBA_D29 E2 DQ29 COMMON COMMON
14 FBA_D14 M11 DQ14 30 FBA_D30 F4 DQ30
15 FBA_D15 M13 31 FBA_D31 F2 FBA_CLK0_RC
DQ15 DQ31
SNN_FBA_RFU1_M1 A5 NC_RFU_A5
1 FBA_EDC1 R13 EDC1 3 FBA_EDC3 C2 EDC3
SNN_FBA_RFU2_M1 V5 NC_RFU_V5
1 FBA_DBI1 P13 3 FBA_DBI3 D2 C756
DBI1 DBI3 10nF
16V
3
{4} IN
FBA_WCK01 P4 WCK01 {4} IN
FBA_WCK23 D4 WCK23 FBVDD 3
10%
FBA_WCK01* P5 WCK01
FBA_WCK23* D5 WCK23
{4} IN {4} IN X7R
0402
R122 COMMON
549ohm
1% GND FBA_VREFC
0402 OUT {6}
COMMON

0.300 J14 VREFC


R121 C156 R614 121ohm FBA_ZQ0 J13
1.33k 820pF ZQ
R120 0402 COMMON
1%
931ohm 1% 50V
0402
J10 SEN
1% 10%
0402 COMMON X7R
COMMON 0402
COMMON

GND
GND GND

0.300
FBA_VREFC_Q

3
D Q26 50V
0.22A
@discrete.q_fet_n_enh(sym_2):page5_i135
3500mohm@10V / 3500mohm@4.5V / 3500mohm@2.5V
SOT23_1G1D1S
{7,11,24}
GPIO10_FBVREF_SEL 1G COMMON
0.22A
0.35W
IN 20V
4 S 2 4
1G1D1S

GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: FBA[31:0]
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MEMORY: FBA[31:0] P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 5 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page6: FRAME BUFFER PARTITION A [63:32]

1 1

M1B
@memory.u_mem_sd_ddr5_x32(sym_5):page6_i154
BGA170
FBA_CMD[31..0] FB_CMD COMMON
IN {4,5}
19 FBA_CMD19 G3 RAS
FBA_D[63..32] 16 FBA_CMD16 L3
BI {4} FB_DATA CAS
26 FBA_CMD26 L12 WE
FBA_EDC[7..0] 31 FBA_CMD31 G12
{4,5} IN FB_EDC CS

FBA_DBI[7..0] 23 FBA_CMD23 J4
{4,5} IN FB_DBI ABI

21 FBA_CMD21 H4 A0_A10
20 FBA_CMD20 H5 A1_A9
29 FBA_CMD29 H11 A2_BA0
30 FBA_CMD30 H10
M1D M1A A3_BA3
28 FBA_CMD28 K11
@memory.u_mem_sd_ddr5_x32(sym_1):page6_i152 @memory.u_mem_sd_ddr5_x32(sym_3):page6_i153
A4_BA2
27 FBA_CMD27 K10
BGA170 BGA170 A5_BA1
2 COMMON COMMON 24 FBA_CMD24 K5 2
A6_A11
25 FBA_CMD25 K4
NORMAL NORMAL A7_A8
22 FBA_CMD22 J5 RFU_A12
32 FBA_D32 A4 DQ0 48 FBA_D48 V11 DQ16
33 FBA_D33 A2 DQ1 49 FBA_D49 V13 DQ17
34 FBA_D34 B4 DQ2 50 FBA_D50 T11 DQ18
35 FBA_D35 B2 DQ3 51 FBA_D51 T13 DQ19
36 FBA_D36 E4 DQ4 52 FBA_D52 N11 DQ20
37 FBA_D37 E2 53 FBA_D53 N13 18 FBA_CMD18 J2
DQ5 DQ21 RESET
38 FBA_D38 F4 54 FBA_D54 M11 17 FBA_CMD17 J3
DQ6 DQ22 CKE
39 FBA_D39 F2 DQ7 55 FBA_D55 M13 DQ23
{4}
FBA_CLK1 J12 CLK
IN
4 FBA_EDC4 C2 EDC0 6 FBA_EDC6 R13 EDC2 {4} IN
FBA_CLK1* J11 CLK
4 FBA_DBI4 D2 DBI0 6 FBA_DBI6 P13 DBI2
VREFD A10 SNN_FBA_VREFD_M1_0
VREFD V10 SNN_FBA_VREFD_M1_1
R619 R618
40.2ohm 40.2ohm
x32 x16 x32 x16
1% 1%
40 FBA_D40 A11 DQ8 NC
56 FBA_D56 V4 DQ24 NC 0402 0402
41 FBA_D41 A13 DQ9 NC
57 FBA_D57 V2 DQ25 NC COMMON COMMON
42 FBA_D42 B11 DQ10 NC
58 FBA_D58 T4 DQ26 NC
43 FBA_D43 B13 59 FBA_D59 T2 FBA_CLK1_RC
DQ11 NC DQ27 NC
44 FBA_D44 E11 DQ12 NC
60 FBA_D60 N4 DQ28 NC
SNN_FBA_RFU1_M3 A5 NC_RFU_A5
45 FBA_D45 E13 61 FBA_D61 N2 C777 SNN_FBA_RFU2_M3 V5
DQ13 NC DQ29 NC 10nF NC_RFU_V5
46 FBA_D46 F11 DQ14 NC
62 FBA_D62 M4 DQ30 NC 16V
47 FBA_D47 F13 DQ15 NC
63 FBA_D63 M2 DQ31 NC 10%
X7R
5 FBA_EDC5 C13 EDC1 GND
7 FBA_EDC7 R2 EDC3 NC
0402
5 FBA_DBI5 D13 DBI1 NC
7 FBA_DBI7 P2 DBI3 NC
COMMON

FBA_WCK45 D4 WCK01
FBA_WCK67 P4 WCK23 GND
{4} IN {4} IN
3
{4} IN
FBA_WCK45* D5 WCK01 {4} IN
FBA_WCK67* P5 WCK23 3

0.300

{5}
FBA_VREFC J14 VREFC
IN

C147 FBA_ZQ2 J13


820pF ZQ
50V R620 J10
10% 121ohm SEN
X7R
1%
0402
0402
COMMON
COMMON

GND
GND GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: FBA[63:32]
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MEMORY: FBA[63:32] P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 6 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page7: FRAME BUFFER PARTITION B [31:0]

1 1

M7B
@memory.u_mem_sd_ddr5_x32(sym_5):page7_i1383
BGA170_MIRR
FBB_CMD[31..0] FB_CMD COMMON
IN {4,8}
FBB_D[31..0] FB_DATA
BI {4} FBB_CMD3
3 L3 RAS
FBB_EDC[7..0] 0 FBB_CMD0 G3
{4,8} IN FB_EDC CAS
10 FBB_CMD10 G12 WE
FBB_DBI[7..0] 15 FBB_CMD15 L12
{4,8} IN FB_DBI CS

7 FBB_CMD7 J4
M7D M7A ABI
@memory.u_mem_sd_ddr5_x32(sym_2):page7_i1321 @memory.u_mem_sd_ddr5_x32(sym_4):page7_i1378 FBB_CMD5
BGA170_MIRR BGA170_MIRR 5 K4 A0_A10
COMMON COMMON 4 FBB_CMD4 K5 A1_A9
13 FBB_CMD13 K11
MIRRORED MIRRORED A2_BA0
14 FBB_CMD14 K10 A3_BA3
2 x32 x16 x32 x16 12 FBB_CMD12 H11 2
A4_BA2
0 FBB_D0 V4 16 FBB_D16 A11 11 FBB_CMD11 H10
DQ0 NC DQ16 NC A5_BA1
1 FBB_D1 V2 17 FBB_D17 A13 8 FBB_CMD8 H5
DQ1 NC DQ17 NC A6_A11
2 FBB_D2 T4 18 FBB_D18 B11 9 FBB_CMD9 H4
DQ2 NC DQ18 NC A7_A8
3 FBB_D3 T2 19 FBB_D19 B13 6 FBB_CMD6 J5
DQ3 NC DQ19 NC RFU_A12
4 FBB_D4 N4 DQ4 NC
20 FBB_D20 E11 DQ20 NC
5 FBB_D5 N2 DQ5 NC
21 FBB_D21 E13 DQ21 NC
6 FBB_D6 M4 DQ6 NC
22 FBB_D22 F11 DQ22 NC
7 FBB_D7 M2 DQ7 NC
23 FBB_D23 F13 DQ23 NC

0 FBB_EDC0 R2 2 FBB_EDC2 C13 2 FBB_CMD2 J2


EDC0 NC EDC2 GND RESET
0 FBB_DBI0 P2 2 FBB_DBI2 D13 1 FBB_CMD1 J3
DBI0 NC DBI2 NC CKE

{4} IN
FBB_CLK0 J12 CLK
VREFD V10 SNN_FBB_VREFD_M7_0
VREFD A10 SNN_FBB_VREFD_M7_1
{4}
FBB_CLK0* J11 CLK
IN
8 FBB_D8 V11 DQ8 24 FBB_D24 A4 DQ24
9 FBB_D9 V13 DQ9 25 FBB_D25 A2 DQ25
10 FBB_D10 T11 26 FBB_D26 B4 R587 R591
DQ10 DQ26 40.2ohm 40.2ohm
11 FBB_D11 T13 DQ11 27 FBB_D27 B2 DQ27 1% 1%
12 FBB_D12 N11 DQ12 28 FBB_D28 E4 DQ28 0402 0402
13 FBB_D13 N13 DQ13 29 FBB_D29 E2 DQ29 COMMON COMMON
14 FBB_D14 M11 DQ14 30 FBB_D30 F4 DQ30
15 FBB_D15 M13 31 FBB_D31 F2 FBB_CLK0_RC
DQ15 DQ31
SNN_FBB_RFU1_M1 A5 NC_RFU_A5
1 FBB_EDC1 R13 3 FBB_EDC3 C2 C563 SNN_FBB_RFU2_M1 V5
EDC1 EDC3 10nF NC_RFU_V5
1 FBB_DBI1 P13 DBI1 3 FBB_DBI3 D2 DBI3 16V
10%
{4} IN
FBB_WCK01 P4 WCK01 {4} IN
FBB_WCK23 D4 WCK23 FBVDD X7R

{4}
FBB_WCK01* P5 WCK01 {4}
FBB_WCK23* D5 WCK23 0402
IN IN
COMMON
3 3
R136 GND
FBB_VREFC 549ohm
OUT {8} 1%
0402
COMMON
0.300 J14 VREFC
C195 R569 121ohm FBB_ZQ0 J13
820pF ZQ
R134 0402 COMMON
1%
1.33k 50V
10%
J10 SEN
R135 1%
931ohm 0402 X7R
COMMON 0402
1%
COMMON
0402
COMMON

GND GND
GND
0.300

FBB_VREFC_Q

3
D Q33 50V
0.22A
@discrete.q_fet_n_enh(sym_2):page7_i1237
3500mohm@10V / 3500mohm@4.5V / 3500mohm@2.5V
SOT23_1G1D1S
GPIO10_FBVREF_SEL 1G 0.22A

{5,11,24} IN COMMON 0.35W


20V
S 2
1G1D1S

4 4

GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: FBB[31:0]
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MEMORY: FBB[31:0] P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 7 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page8: FRAME BUFFER PARTITION B [63:32]

1 1

M8B
@memory.u_mem_sd_ddr5_x32(sym_5):page8_i155
BGA170
FBB_CMD[31..0] FB_CMD COMMON
IN {4,7}
FBB_D[63..32] 19 FBB_CMD19 G3
BI {4} FB_DATA RAS
16 FBB_CMD16 L3 CAS
FBB_EDC[7..0] 26 FBB_CMD26 L12
{4,7} IN FB_EDC WE
31 FBB_CMD31 G12 CS
FBB_DBI[7..0] FB_DBI
{4,7} IN
FBB_CMD23
23 J4 ABI

21 FBB_CMD21 H4 A0_A10
20 FBB_CMD20 H5
M8D M8A A1_A9
29 FBB_CMD29 H11
@memory.u_mem_sd_ddr5_x32(sym_1):page8_i157 @memory.u_mem_sd_ddr5_x32(sym_3):page8_i156
A2_BA0
30 FBB_CMD30 H10
BGA170 BGA170 A3_BA3
COMMON COMMON 28 FBB_CMD28 K11 A4_BA2
27 FBB_CMD27 K10
NORMAL NORMAL A5_BA1
24 FBB_CMD24 K5 A6_A11
2 32 FBB_D32 A4 48 FBB_D48 V11 25 FBB_CMD25 K4 2
DQ0 DQ16 A7_A8
33 FBB_D33 A2 49 FBB_D49 V13 22 FBB_CMD22 J5
DQ1 DQ17 RFU_A12
34 FBB_D34 B4 DQ2 50 FBB_D50 T11 DQ18
35 FBB_D35 B2 DQ3 51 FBB_D51 T13 DQ19
36 FBB_D36 E4 DQ4 52 FBB_D52 N11 DQ20
37 FBB_D37 E2 DQ5 53 FBB_D53 N13 DQ21
38 FBB_D38 F4 DQ6 54 FBB_D54 M11 DQ22
39 FBB_D39 F2 55 FBB_D55 M13 18 FBB_CMD18 J2
DQ7 DQ23 RESET
17 FBB_CMD17 J3 CKE
4 FBB_EDC4 C2 EDC0 6 FBB_EDC6 R13 EDC2
4 FBB_DBI4 D2 DBI0 6 FBB_DBI6 P13 DBI2 {4}
FBB_CLK1 J12 CLK
IN
VREFD A10 SNN_FBB_VREFD_M8_0
VREFD V10 SNN_FBB_VREFD_M8_1
{4}
FBB_CLK1* J11 CLK
IN

x32 x16 x32 x16


40 FBB_D40 A11 56 FBB_D56 V4 R585 R589
DQ8 NC DQ24 NC 40.2ohm 40.2ohm
41 FBB_D41 A13 DQ9 NC
57 FBB_D57 V2 DQ25 NC 1% 1%
42 FBB_D42 B11 DQ10 NC
58 FBB_D58 T4 DQ26 NC 0402 0402
43 FBB_D43 B13 DQ11 NC
59 FBB_D59 T2 DQ27 NC COMMON COMMON
44 FBB_D44 E11 DQ12 NC
60 FBB_D60 N4 DQ28 NC
45 FBB_D45 E13 61 FBB_D61 N2 FBB_CLK1_RC
DQ13 NC DQ29 NC
46 FBB_D46 F11 DQ14 NC
62 FBB_D62 M4 DQ30 NC
SNN_FBB_RFU1_M3 A5 NC_RFU_A5
47 FBB_D47 F13 63 FBB_D63 M2 C561 SNN_FBB_RFU2_M3 V5
DQ15 NC DQ31 NC 10nF NC_RFU_V5
16V
5 FBB_EDC5 C13 EDC1 GND
7 FBB_EDC7 R2 EDC3 NC 10%
5 FBB_DBI5 D13 DBI1 NC
7 FBB_DBI7 P2 DBI3 NC X7R
0402
FBB_WCK45 D4 WCK01
FBB_WCK67 P4 WCK23 COMMON
IN {4} IN {4}
IN
FBB_WCK45*
{4} D5 WCK01 IN
FBB_WCK67*
{4} P5 WCK23
GND

3 3

FBB_VREFC
{7} J14 VREFC
IN

R576 121ohm FBB_ZQ2 J13 ZQ


C197 0402 COMMON
1%
820pF
J10 SEN
50V
10%
X7R
0402
COMMON GND

GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: FBB[63:32]
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MEMORY: FBB[63:32] P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 8 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page9: FRAME BUFFER PARTITION A/B DECOUPLING

FBVDD FBVDD
DECOUPLING AROUND FBA MEMORIES (DQ0-DQ31) DECOUPLING AROUND FBB MEMORIES (DQ0-DQ31)

1
C155 C154 C153 C157 C177 C176 C740 C705 C694 C741 C175 C178 C745 C744 C624 C625 C188 C211 C201 C208 C537 C575 C579 C594 C192 C202 C222 C217 C591 C540 C533 C526 1
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 10uF 10uF 10uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 4V 4V 4V 4V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 20% 20% 20% 20% 20% 20%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603
FBVDD
FBVDD GND
C228 C226 C601 C607 C606
C729 C168 C703 C659 C631 GND 22uF 22uF 22uF 22uF 22uF
22uF 22uF 22uF 22uF 22uF 4V 4V 4V 4V 4V C571 C557 C572 C584 C674 C581 C528 C550
4V 4V 4V 4V 4V C693 C664 C663 C658 C629 C626 C672 C685 20% 20% 20% 20% 20% 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
20% 20% 20% 20% 20% 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF X6S X6S X6S X6S X6S 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
X6S X6S X6S X6S X6S 0603W 0603W 0603W 0603W 0603W
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 10% 10% 10% 10% 10% 10% 10% 10%
0603W 0603W 0603W 0603W 0603W COMMON COMMON COMMON COMMON COMMON
10% 10% 10% 10% 10% 10% 10% 10% X6S X6S X6S X6S X6S X6S X6S X6S
COMMON COMMON COMMON COMMON COMMON 0402 0402 0402 0402 0402 0402 0402 0402
X6S X6S X6S X6S X6S X6S X6S X6S
0402 0402 0402 0402 0402 0402 0402 0402 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
0603 0603 0603 0603 0603
0603 0603 0603 0603 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
0603
GND 0402 0402 0402 0402 0402 0402 0402 0402
GND 0402 0402 0402 0402 0402 0402 0402 0402
FBVDD GND
GND

M3C M1C M7C M8C


@memory.u_mem_sd_ddr5_x32(sym_7):page9_i984 @memory.u_mem_sd_ddr5_x32(sym_6):page9_i1290 @memory.u_mem_sd_ddr5_x32(sym_7):page9_i975 @memory.u_mem_sd_ddr5_x32(sym_6):page9_i1292
FBVDD
BGA170_MIRR BGA170 BGA170_MIRR BGA170
COMMON COMMON FBVDD COMMON COMMON FBVDD
2 2
Mirrored Normal Mirrored Normal
SOE*/MF_VDD J1 J1 MF_VSS/SOE* SOE*/MF_VDD J1 J1 MF_VSS/SOE*
add 1k to VDD add 1k to VSS add 1k to VDD add 1k to VSS
C10
VDD VSS B10 B10 VSS VDD C10 C10
VDD VSS B10 B10 VSS VDD C10
C5
VDD VSS B5 B5 VSS VDD C5 C5
VDD VSS B5 B5 VSS VDD C5
D11
VDD VSS D10 D10 VSS VDD D11 D11
VDD VSS D10 D10 VSS VDD D11
G1
VDD VSS G10 G10 VSS VDD G1 G1
VDD VSS G10 G10 VSS VDD G1
G11
VDD VSS G5 G5 VSS VDD G11 G11
VDD VSS G5 G5 VSS VDD G11
G14
VDD VSS H1 H1 VSS VDD G14 G14
VDD VSS H1 H1 VSS VDD G14
G4
VDD VSS H14 H14 VSS VDD G4 G4
VDD VSS H14 H14 VSS VDD G4
L1
VDD VSS K1 K1 VSS VDD L1 L1
VDD VSS K1 K1 VSS VDD L1
L11
VDD VSS K14 K14 VSS VDD L11 L11
VDD VSS K14 K14 VSS VDD L11
L14
VDD VSS L10 L10 VSS VDD L14 L14
VDD VSS L10 L10 VSS VDD L14
L4
VDD VSS L5 L5 VSS VDD L4 L4
VDD VSS L5 L5 VSS VDD L4
P11
VDD VSS P10 P10 VSS VDD P11 P11
VDD VSS P10 P10 VSS VDD P11
R10
VDD VSS T10 T10 VSS VDD R10 R10
VDD VSS T10 T10 VSS VDD R10
R5
VDD VSS T5 T5 VSS VDD R5 R5
VDD VSS T5 T5 VSS VDD R5

VDDQ B1 VSSQ A1 A1 VSSQ VDDQ B1 VDDQB1 VSSQ A1 A1 VSSQ VDDQ B1


VDDQB12 VSSQ A12 A12 VSSQ VDDQ B12 B12
VDDQ VSSQ A12 A12 VSSQ VDDQ B12
VDDQB14 VSSQ A14 A14 VSSQ VDDQ B14 B14
VDDQ VSSQ A14 A14 VSSQ VDDQ B14
VDDQ B3 VSSQ A3 A3 VSSQ VDDQ B3 VDDQB3 VSSQ A3 A3 VSSQ VDDQ B3
VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1 VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1
D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12 D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12
D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14 D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14
VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3 VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3
VDDQE10 VSSQ C3 C3 VSSQ VDDQ E10 E10
VDDQ VSSQ C3 C3 VSSQ VDDQ E10
VDDQ E5 VSSQ C4 C4 VSSQ VDDQ E5 VDDQE5 VSSQ C4 C4 VSSQ VDDQ E5
VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1 VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1
3 VDDQF12 VSSQ E12 E12 VSSQ VDDQ F12 F12
VDDQ VSSQ E12 E12 VSSQ VDDQ F12 3
VDDQF14 VSSQ E14 E14 VSSQ VDDQ F14 F14
VDDQ VSSQ E14 E14 VSSQ VDDQ F14
VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3 VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3
G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13 G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13
VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2 VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2
H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12 H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12
VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3 VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3
VDDQK12 VSSQ K13 K13 VSSQ VDDQ K12 K12
VDDQ VSSQ K13 K13 VSSQ VDDQ K12
VDDQ K3 VSSQ K2 K2 VSSQ VDDQ K3 VDDQK3 VSSQ K2 K2 VSSQ VDDQ K3
VDDQL13 VSSQ M10 M10 VSSQ VDDQ L13 L13
VDDQ VSSQ M10 M10 VSSQ VDDQ L13
VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2 VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2
VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1 VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1
M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12 M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12
M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14 M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14
VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3 VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3
N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10 N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10
VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5 VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5
VDDQ P1 VSSQ R12 R12 VSSQ VDDQ P1 VDDQP1 VSSQ R12 R12 VSSQ VDDQ P1
VDDQP12 VSSQ R14 R14 VSSQ VDDQ P12 P12
VDDQ VSSQ R14 R14 VSSQ VDDQ P12
VDDQP14 VSSQ R3 R3 VSSQ VDDQ P14 P14
VDDQ VSSQ R3 R3 VSSQ VDDQ P14
VDDQ P3 VSSQ R4 R4 VSSQ VDDQ P3 VDDQP3 VSSQ R4 R4 VSSQ VDDQ P3
VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1 VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1
VDDQT12 VSSQ V12 V12 VSSQ VDDQ T12 T12
VDDQ VSSQ V12 V12 VSSQ VDDQ T12
VDDQT14 VSSQ V14 V14 VSSQ VDDQ T14 T14
VDDQ VSSQ V14 V14 VSSQ VDDQ T14
VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3 VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3

GND GND GND GND


BGA_0170_P080_140X120 BGA_0170_P080_140X120 BGA_0170_P080_140X120 BGA_0170_P080_140X120
4 4

FBVDD
FBVDD

DECOUPLING AROUND FBA MEMORIES (DQ32-DQ63) DECOUPLING AROUND FBB MEMORIES (DQ32-DQ63)

C149 C150 C137 C138 C148 C139 C794 C795 C792 C695 C135 C151 C143 C882 C789 C881 C189 C193 C204 C210 C596 C215 C595 C580 C547 C586 C559 C604 C534 C564 C536 C214
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 10uF 10uF 10uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 4V 4V 4V 4V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 20% 20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 20% 20% 20% 20% 20% 20%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

0402 0402 0402 FBVDD 0402 0402 0603 0603 0402 FBVDD
0402 0402 0402 0603 0603
0402 0402 0402 0402 0402 0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603
C230 C521 C522 C523 C520 GND
GND 22uF 22uF 22uF 22uF 22uF
C857 C877 C865 C833 C883 C860 C880 C870 C863 C843 C844 C864 C840 4V 4V 4V 4V 4V C555 C566 C686 C587 C532 C568 C552 C576
22uF 22uF 22uF 22uF 22uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 20% 20% 20% 20% 20% 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
4V 4V 4V 4V 4V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V X6S X6S X6S X6S X6S 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
0603W 0603W 0603W 0603W 0603W
20% 20% 20% 20% 20% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
COMMON COMMON COMMON COMMON COMMON
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0603W 0603W 0603W 0603W 0603W 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
0603 0603 0603 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
0603 0603

0603 0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
GND
5 GND GND 5
GND

Galaxy Microsystems (HK) Ltd.


Page Name:

ASSEMBLY <ASSEMBLY_DESCRIPTION>
MEM FB_AB PWR
PAGE DETAIL MEM FB_AB PWR
Size Project Name: Design By: Rev
Custom Carson V10
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY P45U
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL Date: Thursday, December 28, 2017 Sheet 9 of 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page10: MEMORY: GPU Partition C/D

1 1
G1D G1E

BGA2152 BGA2152
COMMON COMMON
FB_DATA FB_CMD FB_DATA FB_CMD
FBC_D[63..0] 4/23 FBC FBC_CMD[31..0] FBD_D[63..0] 5/23 FBD FBD_CMD[31..0]
{11,12} BI OUT {11,12} BI OUT

0 FBC_D0 C6 C11 FBC_CMD0 0 0 FBD_D0 AK8 AD2 FBD_CMD0 0


FBC_D0 FBC_CMD0 FBD_D0 FBD_CMD0
1 FBC_D1 D6 B11 FBC_CMD1 1 1 FBD_D1 AK4 AD1 FBD_CMD1 1
FBC_D1 FBC_CMD1 FBD_D1 FBD_CMD1
2 FBC_D2 A6 A11 FBC_CMD2 2 2 FBD_D2 AK2 AD4 FBD_CMD2 2
FBC_D2 FBC_CMD2 GDDR5 CMD Mapping FBD_D2 FBD_CMD2
3 FBC_D3 B6 D11 FBC_CMD3 3 3 FBD_D3 AK3 AC1 FBD_CMD3 3
FBC_D3 FBC_CMD3 FBD_D3 FBD_CMD3
4 FBC_D4 B4 A12 FBC_CMD4 4 4 FBD_D4 AK5 AC2 FBD_CMD4 4
FBC_D4 FBC_CMD4 CMD 0..31 32..63 FBD_D4 FBD_CMD4
5 FBC_D5 A4 B12 FBC_CMD5 5 5 FBD_D5 AK6 AC3 FBD_CMD5 5
FBC_D5 FBC_CMD5 FBD_D5 FBD_CMD5
6 FBC_D6 B3 C12 FBC_CMD6 6 6 FBD_D6 AK9 AA3 FBD_CMD6 6
FBC_D6 FBC_CMD6 CMD0 CAS* FBD_D6 FBD_CMD6
7 FBC_D7 C4 C14 FBC_CMD7 7 7 FBD_D7 AK7 AA2 FBD_CMD7 7
FBC_D7 FBC_CMD7 CMD1 CKE* FBD_D7 FBD_CMD7
8 FBC_D8 D9 B14 FBC_CMD8 8 8 FBD_D8 AG4 AA1 FBD_CMD8 8
FBC_D8 FBC_CMD8 CMD2 RST* FBD_D8 FBD_CMD8
9 FBC_D9 C9 A14 FBC_CMD9 9 9 FBD_D9 AF9 AA4 FBD_CMD9 9
FBC_D9 FBC_CMD9 CMD3 RAS* FBD_D9 FBD_CMD9
10 FBC_D10 E9 D14 FBC_CMD10 10 10 FBD_D10 AG6 Y1 FBD_CMD10 10
FBC_D10 FBC_CMD10 CMD4 A1_A9 FBD_D10 FBD_CMD10
11 FBC_D11 B9 A15 FBC_CMD11 11 11 FBD_D11 AG7 Y2 FBD_CMD11 11
FBC_D11 FBC_CMD11 CMD5 A0_A10 FBD_D11 FBD_CMD11
12 FBC_D12 B8 B15 FBC_CMD12 12 12 FBD_D12 AJ4 Y3 FBD_CMD12 12
FBC_D12 FBC_CMD12 CMD6 A12_RFU FBD_D12 FBD_CMD12
13 FBC_D13 A8 C15 FBC_CMD13 13 13 FBD_D13 AJ5 V3 FBD_CMD13 13
FBC_D13 FBC_CMD13 CMD7 ABI* FBD_D13 FBD_CMD13
14 FBC_D14 F6 C17 FBC_CMD14 14 14 FBD_D14 AJ6 V2 FBD_CMD14 14
FBC_D14 FBC_CMD14 CMD8 A6_A11 FBD_D14 FBD_CMD14
15 FBC_D15 E6 B17 FBC_CMD15 15 15 FBD_D15 AG5 V1 FBD_CMD15 15
FBC_D15 FBC_CMD15 CMD9 A7_A8 FBD_D15 FBD_CMD15
16 FBC_D16 F18 B24 FBC_CMD16 16 16 FBD_D16 Y6 L3 FBD_CMD16 16
FBC_D16 FBC_CMD16 CMD10 WE* FBD_D16 FBD_CMD16
17 FBC_D17 G18 A24 FBC_CMD17 17 17 FBD_D17 Y5 L2 FBD_CMD17 17
FBC_D17 FBC_CMD17 CMD11 A5_BA1 FBD_D17 FBD_CMD17
18 FBC_D18 E18 D23 FBC_CMD18 18 18 FBD_D18 V5 L1 FBD_CMD18 18
FBC_D18 FBC_CMD18 CMD12 A4_BA2 FBD_D18 FBD_CMD18
19 FBC_D19 H18 A23 FBC_CMD19 19 19 FBD_D19 Y4 M4 FBD_CMD19 19
FBC_D19 FBC_CMD19 CMD13 A2_BA0 FBD_D19 FBD_CMD19
20 FBC_D20 D15 B23 FBC_CMD20 20 20 FBD_D20 AA6 M1 FBD_CMD20 20
FBC_D20 FBC_CMD20 CMD14 A3_BA3 FBD_D20 FBD_CMD20
21 FBC_D21 E15 C23 FBC_CMD21 21 21 FBD_D21 AA5 M2 FBD_CMD21 21
FBC_D21 FBC_CMD21 CMD15 CS* FBD_D21 FBD_CMD21
22 FBC_D22 G17 C21 FBC_CMD22 22 22 FBD_D22 AC5 M3 FBD_CMD22 22
FBC_D22 FBC_CMD22 CMD16 CAS* FBD_D22 FBD_CMD22
2 23 FBC_D23 H17 B21 FBC_CMD23 23 23 FBD_D23 AC4 P3 FBD_CMD23 23 2
FBC_D23 FBC_CMD23 CMD17 CKE* FBD_D23 FBD_CMD23
24 FBC_D24 J15 A21 FBC_CMD24 24 24 FBD_D24 AD7 P2 FBD_CMD24 24
FBC_D24 FBC_CMD24 CMD18 RST* FBD_D24 FBD_CMD24
25 FBC_D25 H15 D20 FBC_CMD25 25 25 FBD_D25 AC6 P1 FBD_CMD25 25
FBC_D25 FBC_CMD25 CMD19 RAS* FBD_D25 FBD_CMD25
26 FBC_D26 E14 A20 FBC_CMD26 26 26 FBD_D26 AF6 R4 FBD_CMD26 26
FBC_D26 FBC_CMD26 CMD20 A1_A9 FBD_D26 FBD_CMD26
27 FBC_D27 F14 B20 FBC_CMD27 27 27 FBD_D27 AD6 R1 FBD_CMD27 27
FBC_D27 FBC_CMD27 CMD21 A0_A10 FBD_D27 FBD_CMD27
28 FBC_D28 H11 C20 FBC_CMD28 28 28 FBD_D28 AF7 R2 FBD_CMD28 28
FBC_D28 FBC_CMD28 CMD22 A12_RFU FBD_D28 FBD_CMD28
29 FBC_D29 G11 C18 FBC_CMD29 29 29 FBD_D29 AF8 R3 FBD_CMD29 29
FBC_D29 FBC_CMD29 CMD23 ABI* FBD_D29 FBD_CMD29
30 FBC_D30 F11 B18 FBC_CMD30 30 30 FBD_D30 AF2 U3 FBD_CMD30 30
FBC_D30 FBC_CMD30 CMD24 A6_A11 FBD_D30 FBD_CMD30
31 FBC_D31 E11 A18 FBC_CMD31 31 31 FBD_D31 AF3 U2 FBD_CMD31 31
FBC_D31 FBC_CMD31 CMD25 A7_A8 FBD_D31 FBD_CMD31
32 FBC_D32 J29 D17 SNN_FBC_CMD<32> 32 FBD_D32 F4 U1 SNN_FBD_CMD<32>
FBC_D32 FBC_CMD32 CMD26 WE* FBD_D32 FBD_CMD32
33 FBC_D33 F30 A17 SNN_FBC_CMD<33> 33 FBD_D33 E1 V4 SNN_FBD_CMD<33>
FBC_D33 FBC_CMD33 CMD27 A5_BA1 FBD_D33 FBD_CMD33
34 FBC_D34 H29 A9 FBC_DEBUG0 34 FBD_D34 F3 AD3 FBD_DEBUG0
FBC_D34 FBC_CMD34 50OHM_NETCLASS1 TP503 CMD28 A4_BA2 FBD_D34 FBD_CMD34 50OHM_NETCLASS1 TP509
35 FBC_D35 G30 C24 FBC_DEBUG1 35 FBD_D35 F5 J3 FBD_DEBUG1
FBC_D35 FBC_CMD35 50OHM_NETCLASS1 TP502 CMD29 A2_BA0 FBD_D35 FBD_CMD35 50OHM_NETCLASS1 TP506
36 FBC_D36 B30 36 FBD_D36 D2
FBC_D36 CMD30 A3_BA3 FBD_D36
37 FBC_D37 A30 37 FBD_D37 D1
FBC_D37 CMD31 CS* FBD_D37
38 FBC_D38 H30 38 FBD_D38 C3
FBC_D38 FBD_D38
39 FBC_D39 C30 J14 SNN_FBC_DBG_RFU1 39 FBD_D39 C2 AC9 SNN_FBD_DBG_RFU1
FBC_D39 FBC_DBG_RFU1 FBD_D39 FBD_DBG_RFU1
40 FBC_D40 D27 J23 SNN_FBC_DBG_RFU2 40 FBD_D40 J5 P9 SNN_FBD_DBG_RFU2
FBC_D40 FBC_DBG_RFU2 FBD_D40 FBD_DBG_RFU2
41 FBC_D41 J26 41 FBD_D41 J4
FBC_D41 FBD_D41
42 FBC_D42 F27 42 FBD_D42 L8
FBC_D42 FBD_D42
43 FBC_D43 G27 43 FBD_D43 J2
FBC_D43 FBD_D43
44 FBC_D44 C27 G15 FBC_CLK0 44 FBD_D44 F1 Y8 FBD_CLK0
FBC_D44 FBC_CLK0 FB_CLK OUT {11} FBD_D44 FBD_CLK0 FB_CLK OUT
45 FBC_D45 B27 F15 FBC_CLK0* 45 FBD_D45 F2 Y7 FBD_CLK0*
FBC_D45 FBC_CLK0 FB_CLK OUT {11} FBD_D45 FBD_CLK0 FB_CLK OUT
46 FBC_D46 A27 H21 FBC_CLK1 46 FBD_D46 H4 R8 FBD_CLK1
FBC_D46 FBC_CLK1 FB_CLK OUT {12} FBD_D46 FBD_CLK1 FB_CLK OUT
47 FBC_D47 G29 J21 FBC_CLK1* 47 FBD_D47 H5 R7 FBD_CLK1*
FBC_D47 FBC_CLK1 FB_CLK OUT {12} FBD_D47 FBD_CLK1 FB_CLK OUT
48 FBC_D48 H20 48 FBD_D48 V7
FBC_D48 FBD_D48
49 FBC_D49 D18 49 FBD_D49 V8
FBC_D49 FBD_D49
50 FBC_D50 G20 50 FBD_D50 V6
FBC_D50 FBD_D50
51 FBC_D51 E20 51 FBD_D51 V9
FBC_D51 FBD_D51
52 FBC_D52 F23 52 FBD_D52 U4
FBC_D52 FBD_D52
3 53 FBC_D53 E21 53 FBD_D53 R5 3
FBC_D53 FBD_D53
54 FBC_D54 D21 54 FBD_D54 R6
FBC_D54 FBD_D54
55 FBC_D55 E23 55 FBD_D55 U8
FBC_D55 FBD_D55
56 FBC_D56 G24 F8 FBC_WCK01 56 FBD_D56 P6 AJ8 FBD_WCK01
FBC_D56 FBC_WCK01 FB_WCK OUT {11} FBD_D56 FBD_WCK01 FB_WCK OUT
57 FBC_D57 H26 G8 FBC_WCK01* 57 FBD_D57 R9 AJ7 FBD_WCK01*
FBC_D57 FBC_WCK01 FB_WCK OUT {11} FBD_D57 FBD_WCK01 FB_WCK OUT
58 FBC_D58 F24 G9 SNN_FBC_WCKB01 58 FBD_D58 P4 AG8 SNN_FBD_WCKB01
FBC_D58 FBC_WCKB01 FB_WCK FBD_D58 FBD_WCKB01 FB_WCK
59 FBC_D59 G26 F9 SNN_FBC_WCKB01* 59 FBD_D59 P5 AG9 SNN_FBD_WCKB01*
FBC_D59 FBC_WCKB01 FB_WCK FBD_D59 FBD_WCKB01 FB_WCK
60 FBC_D60 F26 H12 FBC_WCK23 60 FBD_D60 L7 AD8 FBD_WCK23
FBC_D60 FBC_WCK23 FB_WCK OUT {11} FBD_D60 FBD_WCK23 FB_WCK OUT
61 FBC_D61 D26 G12 FBC_WCK23* 61 FBD_D61 L6 AD9 FBD_WCK23*
FBC_D61 FBC_WCK23 FB_WCK OUT {11} FBD_D61 FBD_WCK23 FB_WCK OUT
62 FBC_D62 B26 G14 SNN_FBC_WCKB23 62 FBD_D62 L4 AC7 SNN_FBD_WCKB23
FBC_D62 FBC_WCKB23 FB_WCK FBD_D62 FBD_WCKB23 FB_WCK
63 FBC_D63 C26 H14 SNN_FBC_WCKB23* 63 FBD_D63 L5 AC8 SNN_FBD_WCKB23*
FB_DBI FBC_D63 FBC_WCKB23 FB_WCK FBD_D63 FBD_WCKB23 FB_WCK
FBC_DBI[7..0] J27 FBC_WCK45 J6 FBD_WCK45
{11,12} OUT FBC_WCK45 FB_WCK OUT {12} FB_DBI FBD_WCK45 FB_WCK OUT
H27 FBC_WCK45* FBD_DBI[7..0] J7 FBD_WCK45*
FBC_WCK45 FB_WCK OUT {12} OUT FBD_WCK45 FB_WCK OUT
0 FBC_DBI0 A5 E29 SNN_FBC_WCKB45 0 FBD_DBI0 AJ1 H7 SNN_FBD_WCKB45
FBC_DQM0 FBC_WCKB45 FB_WCK FBD_DQM0 FBD_WCKB45 FB_WCK
1 FBC_DBI1 C8 F29 SNN_FBC_WCKB45* 1 FBD_DBI1 AG1 H6 SNN_FBD_WCKB45*
FBC_DQM1 FBC_WCKB45 FB_WCK FBD_DQM1 FBD_WCKB45 FB_WCK
2 FBC_DBI2 J18 G23 FBC_WCK67 2 FBD_DBI2 AA7 P8 FBD_WCK67
FBC_DQM2 FBC_WCK67 FB_WCK OUT {12} FBD_DQM2 FBD_WCK67 FB_WCK OUT
3 FBC_DBI3 F12 H23 FBC_WCK67* 3 FBD_DBI3 AD5 P7 FBD_WCK67*
FBC_DQM3 FBC_WCK67 FB_WCK OUT {12} FBD_DQM3 FBD_WCK67 FB_WCK OUT
4 FBC_DBI4 D29 H24 SNN_FBC_WCKB67 4 FBD_DBI4 D3 M7 SNN_FBD_WCKB67
FBC_DQM4 FBC_WCKB67 FB_WCK FBD_DQM4 FBD_WCKB67 FB_WCK
5 FBC_DBI5 E27 J24 SNN_FBC_WCKB67* 5 FBD_DBI5 H3 M8 SNN_FBD_WCKB67*
FBC_DQM5 FBC_WCKB67 FB_WCK FBD_DQM5 FBD_WCKB67 FB_WCK
6 FBC_DBI6 F20 6 FBD_DBI6 U5
FBC_DQM6 FBD_DQM6
7 FBC_DBI7 E26 7 FBD_DBI7 M9
FB_EDC FBC_DQM7 FBD_DQM7
FBC_EDC[7..0] FB_EDC
{11,12} OUT
FBD_EDC[7..0]
OUT
0 FBC_EDC0 D5 0 FBD_EDC0 AJ3
FBC_DQS_WP0 FBD_DQS_WP0
1 FBC_EDC1 D8 1 FBD_EDC1 AG2
FBC_DQS_WP1 FBD_DQS_WP1
2 FBC_EDC2 E17 2 FBD_EDC2 AA9
FBC_DQS_WP2 FBD_DQS_WP2
3 FBC_EDC3 E12 3 FBD_EDC3 AF4
FBC_DQS_WP3 FBD_DQS_WP3
4 FBC_EDC4 E30 4 FBD_EDC4 E3
FBC_DQS_WP4 FBD_DQS_WP4
5 FBC_EDC5 B29 5 FBD_EDC5 H2
FBC_DQS_WP5 FBD_DQS_WP5
6 FBC_EDC6 G21 6 FBD_EDC6 U6
FBC_DQS_WP6 FBD_DQS_WP6
4 7 FBC_EDC7 E24 L17 1V8_FB_PLL 7 FBD_EDC7 M5 V11 1V8_FB_PLL 4
FBC_DQS_WP7 FBC_PLL_AVDD IN {4,10} FBD_DQS_WP7 FBD_PLL_AVDD IN {4,10}

Y25 C728 Y33 C681


GND 0.1uF GND 0.1uF
Y26 GND Y34 GND
16V 16V
Y27 GND Y35 GND
10% 10%
Y28 GND X7R Y36 GND X7R
Y29 GND 0402 Y37 GND 0402
Y30 GND COMMON Y38 GND COMMON
Y31 GND Y39 GND
Y32 GND Y9 GND
GND FBVDD FBVDD GND

GND GND GP104 GP106


R574 R575 R626 R600
10k 10k 10k 10k
5% 5% 5% 5% FBD UNUSED
0402 0402 0402 0402
COMMON COMMON COMMON COMMON
FBC_CMD1 FBD_CMD1
FBC_CMD17 FBD_CMD17

FBC_CMD2 FBD_CMD2
FBC_CMD18 FBD_CMD18

R583 R582 R599 R627


10k 10k 10k 10k
5% 5% 5% 5%
0402 0402 0402 0402
COMMON COMMON COMMON COMMON

5 5

GND GND
Galaxy Microsystems (HK) Ltd.
Page Name:
GPU FB_CD
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL GPU FB_CD P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 10 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page11: Frame Buffer Partition C [31:0]

1 1

M5B
@memory.u_mem_sd_ddr5_x32(sym_5):page11_i1415
BGA170_MIRR
FBC_CMD[31..0] FB_CMD COMMON
IN {10,12}
3 FBC_CMD3 L3 RAS
0 FBC_CMD0 G3 CAS
10 FBC_CMD10 G12 WE
15 FBC_CMD15 L12 CS

FBC_D[31..0] 7 FBC_CMD7 J4
BI {10} FB_DATA ABI

FBC_EDC[7..0] 5 FBC_CMD5 K4
{10,12} IN FB_EDC A0_A10
4 FBC_CMD4 K5 A1_A9
FBC_DBI[7..0] 13 FBC_CMD13 K11
{10,12} IN FB_DBI
M5A A2_BA0
14 FBC_CMD14 K10
M5D @memory.u_mem_sd_ddr5_x32(sym_4):page11_i1412
A3_BA3
12 FBC_CMD12 H11
@memory.u_mem_sd_ddr5_x32(sym_2):page11_i1353
BGA170_MIRR A4_BA2
COMMON 11 FBC_CMD11 H10
BGA170_MIRR A5_BA1
2 COMMON 8 FBC_CMD8 H5 2
MIRRORED A6_A11
9 FBC_CMD9 H4
MIRRORED A7_A8
x32 x16 6 FBC_CMD6 J5 RFU_A12
x32 x16 16 FBC_D16 A11 DQ16 NC
0 FBC_D0 V4 DQ0 NC
17 FBC_D17 A13 DQ17 NC
1 FBC_D1 V2 DQ1 NC
18 FBC_D18 B11 DQ18 NC
2 FBC_D2 T4 DQ2 NC
19 FBC_D19 B13 DQ19 NC
3 FBC_D3 T2 DQ3 NC
20 FBC_D20 E11 DQ20 NC
4 FBC_D4 N4 21 FBC_D21 E13 2 FBC_CMD2 J2
DQ4 NC DQ21 NC RESET
5 FBC_D5 N2 22 FBC_D22 F11 1 FBC_CMD1 J3
DQ5 NC DQ22 NC CKE
6 FBC_D6 M4 DQ6 NC
23 FBC_D23 F13 DQ23 NC
7 FBC_D7 M2 DQ7 NC {10}
FBC_CLK0 J12 CLK
IN
2 FBC_EDC2 C13 EDC2 GND {10} IN
FBC_CLK0* J11 CLK
0 FBC_EDC0 R2 EDC0 NC
2 FBC_DBI2 D13 DBI2 NC
0 FBC_DBI0 P2 DBI0 NC R586 R590
40.2ohm 40.2ohm
VREFD A10 SNN_FBA_VREFD_M5_1
1% 1%
VREFD V10 SNN_FBA_VREFD_M5_0 24 FBC_D24 A4 DQ24 0402 0402
8 FBC_D8 V11 DQ8 25 FBC_D25 A2 DQ25 COMMON COMMON
9 FBC_D9 V13 DQ9 26 FBC_D26 B4 DQ26
10 FBC_D10 T11 27 FBC_D27 B2 FBC_CLK0_RC
DQ10 DQ27
11 FBC_D11 T13 DQ11 28 FBC_D28 E4 DQ28
SNN_FBC_RFU1_M1 A5 NC_RFU_A5
12 FBC_D12 N11 29 FBC_D29 E2 C562 SNN_FBC_RFU2_M1 V5
DQ12 DQ29 10nF NC_RFU_V5
13 FBC_D13 N13 DQ13 30 FBC_D30 F4 DQ30 16V
14 FBC_D14 M11 DQ14 31 FBC_D31 F2 DQ31 10%
15 FBC_D15 M13 DQ15 X7R
3 FBC_EDC3 C2 EDC3 FBVDD 0402
1 FBC_EDC1 R13 EDC1 3 FBC_DBI3 D2 DBI3 COMMON
1 FBC_DBI1 P13 DBI1
FBC_WCK23 D4 R131 GND
{10} IN WCK23 549ohm
3
{10} IN
FBC_WCK01 P4 WCK01 {10} IN
FBC_WCK23* D5 WCK23 3
1%
FBC_WCK01* P5 WCK01
FBC_VREFC
{10} IN OUT {12} 0402
COMMON 0.300
J14 VREFC
R132 C194 R577 121ohm FBC_ZQ0 J13
1.33k 820pF ZQ
R133 0402 COMMON
1%
931ohm 1% 50V
0402
J10 SEN
1% 10%
0402 COMMON X7R
COMMON 0402
COMMON
GND
0.300
GND GND

FBC_VREFC_Q

3
D Q32 50V
0.22A
@discrete.q_fet_n_enh(sym_2):page11_i1237
3500mohm@10V / 3500mohm@4.5V / 3500mohm@2.5V
SOT23_1G1D1S
{5,7,24}
GPIO10_FBVREF_SEL 1G COMMON
0.22A
0.35W
IN 20V
S 2
1G1D1S

GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: FBC[31:0]
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MEMORY: FBC[31:0] P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 11 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page12: FRAME BUFFER PARTITION C [63:32]

1 1

M6B
@memory.u_mem_sd_ddr5_x32(sym_5):page12_i157
FB_CMD BGA170
FBC_CMD[31..0] COMMON
IN {10,11}
19 FBC_CMD19 G3 RAS
16 FBC_CMD16 L3 CAS
26 FBC_CMD26 L12 WE
31 FBC_CMD31 G12 CS

23 FBC_CMD23 J4 ABI

FBC_D[63..32] 21 FBC_CMD21 H4
BI {10} FB_DATA A0_A10
20 FBC_CMD20 H5 A1_A9
FBC_EDC[7..0] 29 FBC_CMD29 H11
{10,11} IN FB_EDC A2_BA0
30 FBC_CMD30 H10 A3_BA3
FBC_DBI[7..0] 28 FBC_CMD28 K11
{10,11} IN FB_DBI A4_BA2
2 27 FBC_CMD27 K10 2
M6D M6A A5_BA1
24 FBC_CMD24 K5
@memory.u_mem_sd_ddr5_x32(sym_1):page12_i155 @memory.u_mem_sd_ddr5_x32(sym_3):page12_i156
A6_A11
25 FBC_CMD25 K4
BGA170 BGA170 A7_A8
COMMON COMMON 22 FBC_CMD22 J5 RFU_A12
NORMAL NORMAL
32 FBC_D32 A4 DQ0 48 FBC_D48 V11 DQ16
33 FBC_D33 A2 DQ1 49 FBC_D49 V13 DQ17
34 FBC_D34 B4 DQ2 50 FBC_D50 T11 DQ18
35 FBC_D35 B2 51 FBC_D51 T13 18 FBC_CMD18 J2
DQ3 DQ19 RESET
36 FBC_D36 E4 52 FBC_D52 N11 17 FBC_CMD17 J3
DQ4 DQ20 CKE
37 FBC_D37 E2 DQ5 53 FBC_D53 N13 DQ21
38 FBC_D38 F4 DQ6 54 FBC_D54 M11 DQ22 {10} IN
FBC_CLK1 J12 CLK
39 FBC_D39 F2 DQ7 55 FBC_D55 M13 DQ23 {10} IN
FBC_CLK1* J11 CLK

4 FBC_EDC4 C2 EDC0 6 FBC_EDC6 R13 EDC2


4 FBC_DBI4 D2 6 FBC_DBI6 P13 R584 R588
DBI0 DBI2 40.2ohm 40.2ohm
VREFD A10 SNN_FBA_VREFD_M6_0
VREFD V10 SNN_FBA_VREFD_M6_1
1% 1%
0402 0402
x32 x16 x32 x16 COMMON COMMON
40 FBC_D40 A11 DQ8 NC
56 FBC_D56 V4 DQ24 NC
41 FBC_D41 A13 57 FBC_D57 V2 FBC_CLK1_RC
DQ9 NC DQ25 NC
42 FBC_D42 B11 DQ10 NC
58 FBC_D58 T4 DQ26 NC
SNN_FBC_RFU1_M3 A5 NC_RFU_A5
43 FBC_D43 B13 59 FBC_D59 T2 C560 SNN_FBC_RFU2_M3 V5
DQ11 NC DQ27 NC 10nF NC_RFU_V5
44 FBC_D44 E11 DQ12 NC
60 FBC_D60 N4 DQ28 NC 16V
45 FBC_D45 E13 DQ13 NC
61 FBC_D61 N2 DQ29 NC 10%
46 FBC_D46 F11 DQ14 NC
62 FBC_D62 M4 DQ30 NC X7R
47 FBC_D47 F13 DQ15 NC
63 FBC_D63 M2 DQ31 NC
0402
COMMON
5 FBC_EDC5 C13 EDC1 GND
7 FBC_EDC7 R2 EDC3 NC
3 5 FBC_DBI5 D13 DBI1 7 FBC_DBI7 P2 DBI3
GND 3
NC NC

{10}
FBC_WCK45 D4 WCK01 {10}
FBC_WCK67 P4 WCK23
IN IN
{10}
FBC_WCK45* D5 WCK01 {10}
FBC_WCK67* P5 WCK23
IN IN
IN
FBC_VREFC
{11} 0.300 J14 VREFC
C196 FBC_ZQ2 J13
820pF ZQ
50V
10%
J10 SEN
R578
X7R 121ohm
0402
1%
COMMON
0402
COMMON

GND

GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: FBC[63:32]
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MEMORY: FBC[63:32] P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 12 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page13: FRAME BUFFER PARTITION D[31:0]

1 1

M2B
INS17164626
BGA170_MIRR
10,14 FBD_CMD[31..0] FB_CMD COMMON
IN

3 FBD_CMD3 L3 RAS
0 FBD_CMD0 G3 CAS
10 FBD_CMD10 G12 WE
15 FBD_CMD15 L12 CS

7 FBD_CMD7 J4 ABI

5 FBD_CMD5 K4 A0_A10
FBD_D[31..0] 4 FBD_CMD4 K5
10
BI FB_DATA A1_A9
13 FBD_CMD13 K11 A2_BA0
FBD_EDC[7..0] 14 FBD_CMD14 K10
10,14
IN FB_EDC A3_BA3
12 FBD_CMD12 H11 A4_BA2
FBD_DBI[7..0] 11 FBD_CMD11 H10
10,14
OUT FB_DBI A5_BA1
8 FBD_CMD8 H5 A6_A11
9 FBD_CMD9 H4
M2D A7_A8
6 FBD_CMD6 J5
INS17164057 M2A RFU_A12
BGA170_MIRR
INS17164276
COMMON
BGA170_MIRR
COMMON
MIRRORED
2 2
MIRRORED
x32 x16
0 FBD_D0 V4 x32 x16 2 FBD_CMD2 J2
DQ0 NC RESET
1 FBD_D1 V2 16 FBD_D16 A11 1 FBD_CMD1 J3
DQ1 NC DQ16 NC CKE
2 FBD_D2 T4 DQ2 NC
17 FBD_D17 A13 DQ17 NC
3 FBD_D3 T2 DQ3 NC
18 FBD_D18 B11 DQ18 NC 10
IN
FBD_CLK0 J12 CLK
4 FBD_D4 N4 DQ4 NC
19 FBD_D19 B13 DQ19 NC 10
FBD_CLK0* J11 CLK
IN
5 FBD_D5 N2 DQ5 NC
20 FBD_D20 E11 DQ20 NC
6 FBD_D6 M4 DQ6 NC
21 FBD_D21 E13 DQ21 NC
7 FBD_D7 M2 22 FBD_D22 F11 R609 R610
DQ7 NC DQ22 NC 40.2ohm 40.2ohm
23 FBD_D23 F13 DQ23 NC 1% 1%
0 FBD_EDC0 R2 EDC0 NC 0402 0402
0 FBD_DBI0 P2 DBI0 NC
2 FBD_EDC2 C13 EDC2 GND COMMON COMMON
2 FBD_DBI2 D13 DBI2 NC
FBD_CLK0_RC

VREFD V10 SNN_FBD_VREFD_M2_0 SNN_FBD_RFU1_M1 A5 NC_RFU_A5


8 FBD_D8 V11 A10 SNN_FBD_VREFD_M2_1 C684 SNN_FBD_RFU2_M1 V5
DQ8 VREFD 10nF NC_RFU_V5
9 FBD_D9 V13 DQ9 24 FBD_D24 A4 DQ24 16V
10 FBD_D10 T11 DQ10 25 FBD_D25 A2 DQ25 10%
11 FBD_D11 T13 DQ11 26 FBD_D26 B4 DQ26 FBVDD X7R
12 FBD_D12 N11 DQ12 27 FBD_D27 B2 DQ27 0402
13 FBD_D13 N13 DQ13 28 FBD_D28 E4 DQ28 COMMON
14 FBD_D14 M11 DQ14 29 FBD_D29 E2 DQ29
15 FBD_D15 M13 30 FBD_D30 F4 R124 GND
DQ15 DQ30 549ohm
31 FBD_D31 F2 DQ31 1%
1 FBD_EDC1 R13 EDC1 14
OUT
FBD_VREFC
0402
1 FBD_DBI1 P13 DBI1 3 FBD_EDC3 C2 EDC3 COMMON 0.300
3 FBD_DBI3 D2 DBI3 J14 VREFC
10
FBD_WCK01 P4 WCK01
IN R125 C161
10
FBD_WCK01* P5 WCK01 10
FBD_WCK23 D4 WCK23
FBD_ZQ0 J13 ZQ
IN IN 1.33k 820pF
3 10
IN
FBD_WCK23* D5 WCK23 3
R126 1% 50V
J10
931ohm 0402 10% SEN
R611
COMMON X7R
1% 121ohm
0402
0402 1%
COMMON COMMON
0402
COMMON
GND GND

GND
FBD_VREFC_Q

3
D Q27 50V
0.22A
INS17164355 3500mohm@10V / 3500mohm@4.5V / 3500mohm@2.5V
SOT23_1G1D1S
5,7,11,24
IN
GPIO10_FBVREF_SEL 1G COMMON
0.22A
0.35W
20V
S 2
1G1D1S

GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: FBD[31:0]
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MEMORY: FBD[31:0] P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 13 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page14: FRAME BUFFER PARTITION D[63:32]

1 1

M4B
INS17166942
FB_CMD BGA170
10,13 FBD_CMD[31..0] COMMON
IN

19 FBD_CMD19 G3 RAS
FBD_D[63..32] 16 FBD_CMD16 L3
10
BI CAS
26 FBD_CMD26 L12
FB_DATA WE
FBD_EDC[7..0] 31 FBD_CMD31 G12
10,13
IN CS
FB_EDC
FBD_DBI[7..0] 23 FBD_CMD23 J4
10,13
IN ABI
FB_DBI
21 FBD_CMD21 H4 A0_A10
20 FBD_CMD20 H5
M4D A1_A9
29 FBD_CMD29 H11
INS17166469
A2_BA0
30 FBD_CMD30 H10
BGA170 M4A A3_BA3
COMMON 28 FBD_CMD28 K11
INS17166677
A4_BA2
27 FBD_CMD27 K10
NORMAL BGA170 A5_BA1
2 COMMON 24 FBD_CMD24 K5 2
A6_A11
32 FBD_D32 A4 25 FBD_CMD25 K4
DQ0 NORMAL A7_A8
33 FBD_D33 A2 22 FBD_CMD22 J5
DQ1 RFU_A12
34 FBD_D34 B4 DQ2 48 FBD_D48 V11 DQ16
35 FBD_D35 B2 DQ3 49 FBD_D49 V13 DQ17
36 FBD_D36 E4 DQ4 50 FBD_D50 T11 DQ18
37 FBD_D37 E2 DQ5 51 FBD_D51 T13 DQ19
38 FBD_D38 F4 DQ6 52 FBD_D52 N11 DQ20
39 FBD_D39 F2 53 FBD_D53 N13 18 FBD_CMD18 J2
DQ7 DQ21 RESET
54 FBD_D54 M11 17 FBD_CMD17 J3
DQ22 CKE
4 FBD_EDC4 C2 EDC0 55 FBD_D55 M13 DQ23
4 FBD_DBI4 D2 DBI0 10
FBD_CLK1 J12 CLK
IN
VREFD A10 SNN_FBA_VREFD_M4_0 6 FBD_EDC6 R13 EDC2 10
IN
FBD_CLK1* J11 CLK
6 FBD_DBI6 P13 DBI2
x32 x16 VREFD V10 SNN_FBA_VREFD_M4_1
40 FBD_D40 A11 R605 R606
DQ8 NC 40.2ohm 40.2ohm
41 FBD_D41 A13 DQ9 NC
x32 x16
1% 1%
42 FBD_D42 B11 DQ10 NC
56 FBD_D56 V4 DQ24 NC 0402 0402
43 FBD_D43 B13 DQ11 NC
57 FBD_D57 V2 DQ25 NC COMMON COMMON
44 FBD_D44 E11 DQ12 NC
58 FBD_D58 T4 DQ26 NC
45 FBD_D45 E13 59 FBD_D59 T2 FBD_CLK1_RC
DQ13 NC DQ27 NC
46 FBD_D46 F11 DQ14 NC
60 FBD_D60 N4 DQ28 NC
SNN_FBD_RFU1_M3 A5 NC_RFU_A5
47 FBD_D47 F13 61 FBD_D61 N2 C670 SNN_FBD_RFU2_M3 V5
DQ15 NC DQ29 NC 10nF NC_RFU_V5
62 FBD_D62 M4 DQ30 NC 16V
5 FBD_EDC5 C13 EDC1 GND
63 FBD_D63 M2 DQ31 NC 10%
5 FBD_DBI5 D13 DBI1 NC X7R
7 FBD_EDC7 R2 EDC3 NC
0402
FBD_WCK45 D4 7 FBD_DBI7 P2 COMMON
10
IN WCK01 DBI3 NC
FBD_WCK45* D5
10
IN WCK01
10
FBD_WCK67 P4 WCK23 GND
IN
3 FBD_WCK67* P5 3
10
IN WCK23

0.300
13
FBD_VREFC J14 VREFC
IN

C653 R604 121ohm FBD_ZQ2 J13


820pF ZQ
0402 1% COMMON
50V
J10 SEN
10%
X7R
0402
COMMON

GND GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEMORY: FBD[63:32]
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MEMORY: FBD[63:32] P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 14 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page15: FRAME BUFFER PARTITION C/D DECOUPLING

FBVDD
DECOUPLING AROUND FBC MEMORIES (DQ0-DQ31) FBVDD
DECOUPLING AROUND FBD MEMORIES (DQ0-DQ31)
C206 C199 C198 C212 C573 C545 C592 C186 C190 C577 C220 C218 C538 C524 C589 C632
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 10uF 10uF 10uF C163 C165 C160 C162 C742 C699 C700 C704 C836 C834 C712 C145 C757 C837 C144 C164
1 1
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 4V 4V 4V 4V 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 10uF 10uF 10uF
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 20% 20% 20% 20% 20% 20% 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 4V 4V 4V 4V
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 20% 20% 20% 20% 20% 20%
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603 X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603
FBVDD
C224 C223 C605 C602 C603 GND FBVDD
22uF 22uF 22uF 22uF 22uF C146 C158 C733 C152 C769 GND
4V 4V 4V 4V 4V 22uF 22uF 22uF 22uF 22uF
20% 20% 20% 20% 20% C583 C569 C588 C570 C556 C641 C527 C549 4V 4V 4V 4V 4V
X6S X6S X6S X6S X6S 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 20% 20% 20% 20% 20% C747 C839 C788 C838 C746 C778 C780 C159
0603W 0603W 0603W 0603W 0603W X6S X6S X6S X6S X6S
COMMON COMMON COMMON COMMON COMMON 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
0603W 0603W 0603W 0603W 0603W
10% 10% 10% 10% 10% 10% 10% 10% 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
COMMON COMMON COMMON COMMON COMMON
X6S X6S X6S X6S X6S X6S X6S X6S 10% 10% 10% 10% 10% 10% 10% 10%
0603 0603 0603 0603 0603 0402 0402 0402 0402 0402 0402 0402 0402 X6S X6S X6S X6S X6S X6S X6S X6S
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND 0402 0402 0402 0402 0402 0402 0402 0402 GND

GND
GND

FBVDD
M5C M6C
@memory.u_mem_sd_ddr5_x32(sym_7):page15_i977 @memory.u_mem_sd_ddr5_x32(sym_6):page15_i1202 M2C M4C
FBVDD
BGA170_MIRR BGA170 INS17172485 INS17173138
COMMON COMMON FBVDD
BGA170_MIRR BGA170
COMMON COMMON FBVDD
2 Mirrored Normal 2
SOE*/MF_VDD J1 J1 MF_VSS/SOE*
Mirrored Normal
add 1k to VDD add 1k to VSS SOE*/MF_VDD J1 J1 MF_VSS/SOE*
C10
VDD VSS B10 B10 VSS VDD C10 add 1k to VDD add 1k to VSS
C5
VDD VSS B5 B5 VSS VDD C5 C10
VDD VSS B10 B10 VSS VDD C10
D11
VDD VSS D10 D10 VSS VDD D11 C5
VDD VSS B5 B5 VSS VDD C5
G1
VDD VSS G10 G10 VSS VDD G1 D11
VDD VSS D10 D10 VSS VDD D11
G11
VDD VSS G5 G5 VSS VDD G11 G1
VDD VSS G10 G10 VSS VDD G1
G14
VDD VSS H1 H1 VSS VDD G14 G11
VDD VSS G5 G5 VSS VDD G11
G4
VDD VSS H14 H14 VSS VDD G4 G14
VDD VSS H1 H1 VSS VDD G14
L1
VDD VSS K1 K1 VSS VDD L1 G4
VDD VSS H14 H14 VSS VDD G4
L11
VDD VSS K14 K14 VSS VDD L11 L1
VDD VSS K1 K1 VSS VDD L1
L14
VDD VSS L10 L10 VSS VDD L14 L11
VDD VSS K14 K14 VSS VDD L11
L4
VDD VSS L5 L5 VSS VDD L4 L14
VDD VSS L10 L10 VSS VDD L14
P11
VDD VSS P10 P10 VSS VDD P11 L4
VDD VSS L5 L5 VSS VDD L4
R10
VDD VSS T10 T10 VSS VDD R10 P11
VDD VSS P10 P10 VSS VDD P11
R5
VDD VSS T5 T5 VSS VDD R5 R10
VDD VSS T10 T10 VSS VDD R10
R5
VDD VSS T5 T5 VSS VDD R5
VDDQ B1 VSSQ A1 A1 VSSQ VDDQ B1
VDDQB12 VSSQ A12 A12 VSSQ VDDQ B12 VDDQ B1 VSSQ A1 A1 VSSQ VDDQ B1
VDDQB14 VSSQ A14 A14 VSSQ VDDQ B14 VDDQB12 VSSQ A12 A12 VSSQ VDDQ B12
VDDQ B3 VSSQ A3 A3 VSSQ VDDQ B3 VDDQB14 VSSQ A14 A14 VSSQ VDDQ B14
VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1 VDDQ B3 VSSQ A3 A3 VSSQ VDDQ B3
D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12 VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1
D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14 D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12
VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3 D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14
VDDQE10 VSSQ C3 C3 VSSQ VDDQ E10 VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3
VDDQ E5 VSSQ C4 C4 VSSQ VDDQ E5 VDDQE10 VSSQ C3 C3 VSSQ VDDQ E10
VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1 VDDQ E5 VSSQ C4 C4 VSSQ VDDQ E5
VDDQF12 VSSQ E12 E12 VSSQ VDDQ F12 VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1
3 VDDQF14 VSSQ E14 E14 VSSQ VDDQ F14 VDDQF12 VSSQ E12 E12 VSSQ VDDQ F12 3
VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3 VDDQF14 VSSQ E14 E14 VSSQ VDDQ F14
G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13 VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3
VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2 G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13
H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12 VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2
VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3 H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12
VDDQK12 VSSQ K13 K13 VSSQ VDDQ K12 VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3
VDDQ K3 VSSQ K2 K2 VSSQ VDDQ K3 VDDQK12 VSSQ K13 K13 VSSQ VDDQ K12
VDDQL13 VSSQ M10 M10 VSSQ VDDQ L13 VDDQ K3 VSSQ K2 K2 VSSQ VDDQ K3
VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2 VDDQL13 VSSQ M10 M10 VSSQ VDDQ L13
VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1 VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2
M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12 VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1
M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14 M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12
VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3 M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14
N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10 VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3
VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5 N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10
VDDQ P1 VSSQ R12 R12 VSSQ VDDQ P1 VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5
VDDQP12 VSSQ R14 R14 VSSQ VDDQ P12 VDDQ P1 VSSQ R12 R12 VSSQ VDDQ P1
VDDQP14 VSSQ R3 R3 VSSQ VDDQ P14 VDDQP12 VSSQ R14 R14 VSSQ VDDQ P12
VDDQ P3 VSSQ R4 R4 VSSQ VDDQ P3 VDDQP14 VSSQ R3 R3 VSSQ VDDQ P14
VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1 VDDQ P3 VSSQ R4 R4 VSSQ VDDQ P3
VDDQT12 VSSQ V12 V12 VSSQ VDDQ T12 VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1
VDDQT14 VSSQ V14 V14 VSSQ VDDQ T14 VDDQT12 VSSQ V12 V12 VSSQ VDDQ T12
VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3 VDDQT14 VSSQ V14 V14 VSSQ VDDQ T14
VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3

GND GND
GND GND
BGA_0170_P080_140X120 BGA_0170_P080_140X120
4 4

FBVDD FBVDD
DECOUPLING AROUND FBC MEMORIES (DQ32-DQ63) DECOUPLING AROUND FBD MEMORIES (DQ32-DQ63)
C207 C574 C546 C578 C593 C187 C191 C200 C209 C203 C221 C216 C590 C598 C525 C539
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 10uF 10uF 10uF C623 C616 C617 C657 C171 C620 C610 C615 C654 C613 C612 C655 C611 C618 C166 C169
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 4V 4V 4V 4V 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 10uF 10uF 10uF
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 20% 20% 20% 20% 20% 20% 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V 4V 4V 4V 4V
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 20% 20% 20% 20% 20% 20%
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603 X6S X6S X6S X6S X6S X5R X5R X6S X6S X6S X6S X6S X6S X6S X6S X6S
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603
FBVDD
FBVDD
C225 C529 C600 C227 C599 GND GND
22uF 22uF 22uF 22uF 22uF C628 C174 C180 C619 C614
4V 4V 4V 4V 4V C585 C582 C565 C530 C554 C643 C551 C567 22uF 22uF 22uF 22uF 22uF
20% 20% 20% 20% 20% 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 4V 4V 4V 4V 4V C173 C172 C622 C656 C167 C181 C621 C170
X6S X6S X6S X6S X6S 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 20% 20% 20% 20% 20% 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
0603W 0603W 0603W 0603W 0603W X6S X6S X6S X6S X6S
10% 10% 10% 10% 10% 10% 10% 10% 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
COMMON COMMON COMMON COMMON COMMON 0603W 0603W 0603W 0603W 0603W
X6S X6S X6S X6S X6S X6S X6S X6S 10% 10% 10% 10% 10% 10% 10% 10%
0402 0402 0402 0402 0402 0402 0402 0402 COMMON COMMON COMMON COMMON COMMON
X6S X6S X6S X6S X6S X6S X6S X6S
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 0402 0402 0402 0402 0402 0402 0402 0402
0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

0402 0402 0402 0402 0402 0402 0402 0402


GND GND
GND
GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MEM FB_CD PWR
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MEM FB_CD PWR P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 15 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page16: GPU PWR and GND G1L


NVVDD FBVDD BGA2152 FBVDD
NVVDD COMMON
G1F G1G G1H G1I G1J
20/23 FBVDDQ
BGA2152 BGA2152 BGA2152 NVVDD BGA2152 NVVDD BGA2152
COMMON COMMON COMMON COMMON COMMON
AA10 FBVDDQ FBVDDQ AT43
16/23 GND_1/3 17/23 GND_2/3 22/23 GND_3/3 18/21 VDD_1/2 19/23 VDD_2/2 AA11 FBVDDQ FBVDDQ K12
AA42 FBVDDQ FBVDDQ K14
A2 GND GND AH6 AR20 GND GND B52 BL43 GND GND N6 AA14 VDD VDD AG22 AP21 VDD VDD BB45 AA43 FBVDDQ FBVDDQ K15
A26 GND GND AH8 AR21 GND GND B7 BL5 GND GND N8 AA15 VDD VDD AG23 AP22 VDD VDD BB46 AC10 FBVDDQ FBVDDQ K17
A29 GND GND AJ14 AR22 GND GND BA48 BL7 GND GND P14 AA16 VDD VDD AG40 AP23 VDD VDD BB47 G1K AC11 FBVDDQ FBVDDQ K18
A3 GND GND AJ15 AR23 GND GND BB49 BM2 GND GND P15 AA17 VDD VDD AH14 AP30 VDD VDD BB48 AC42 FBVDDQ FBVDDQ K20
1 A32 GND GND AJ16 AR24 GND GND BC13 BM3 GND GND P16 AA18 VDD VDD AH15 AP31 VDD VDD BC38 BGA2152 AC43 FBVDDQ FBVDDQ K21 1
NVVDD COMMON NVVDD
A50 GND GND AJ17 AR25 GND GND BC16 C1 GND GND P17 AA19 VDD VDD AH16 AP32 VDD VDD BC39 AD10 FBVDDQ FBVDDQ K23
A51 GND GND AJ18 AR26 GND GND BC19 C29 GND GND P18 AA20 VDD VDD AH17 AP33 VDD VDD BC40 23/23 VDDS AD11 FBVDDQ FBVDDQ K24
AA49 GND GND AJ19 AR27 GND GND BC2 C33 GND GND P19 AA21 VDD VDD AH18 AP34 VDD VDD BC41 AD42 FBVDDQ FBVDDQ K26
AA8 GND GND AJ2 AR28 GND GND BC22 C5 GND GND P20 AA22 VDD VDD AH19 AR13 VDD VDD BC45 AD43 FBVDDQ FBVDDQ K27
AB10 GND GND AJ20 AR29 GND GND BC25 C51 GND GND P21 AA23 VDD VDD AH20 AR40 VDD VDD BC47 AP27 VDDS VDDS AC14 AF10 FBVDDQ FBVDDQ K29
AB14 GND GND AJ21 AR30 GND GND BC28 C52 GND GND P22 AA24 VDD VDD AH21 AT14 VDD VDD BC49 AP28 VDDS VDDS AC15 AF43 FBVDDQ FBVDDQ K30
AB15 GND GND AJ22 AR31 GND GND BC31 D10 GND GND P23 AA25 VDD VDD AH22 AT15 VDD VDD BD39 AP29 VDDS VDDS AC16 AG10 FBVDDQ FBVDDQ K32
AB16 GND GND AJ23 AR32 GND GND BC34 D12 GND GND P24 AA26 VDD VDD AH23 AT16 VDD VDD BD41 AP35 VDDS VDDS AC17 AG11 FBVDDQ FBVDDQ K33
AB17 GND GND AJ24 AR33 GND GND BC37 D13 GND GND P25 AA27 VDD VDD AH24 AT17 VDD VDD BD46 AP36 VDDS VDDS AC18 AG42 FBVDDQ FBVDDQ K35
AB18 GND GND AJ25 AR34 GND GND BC4 D16 GND GND P26 AA28 VDD VDD AH25 AT18 VDD VDD BD47 AP37 VDDS VDDS AC24 AG43 FBVDDQ FBVDDQ K36
AB19 GND GND AJ26 AR35 GND GND BC51 D19 GND GND P27 AA29 VDD VDD AH26 AT19 VDD VDD BD48 AP38 VDDS VDDS AC25 AJ10 FBVDDQ FBVDDQ K38
AB2 GND GND AJ27 AR36 GND GND BC6 D22 GND GND P28 AA30 VDD VDD AH27 AT20 VDD VDD BD49 AP39 VDDS VDDS AC26 AJ11 FBVDDQ FBVDDQ K39
AB20 GND GND AJ28 AR37 GND GND BC8 D24 GND GND P29 AA31 VDD VDD AH28 AT21 VDD VDD BD50 AV14 VDDS VDDS AC27 AJ42 FBVDDQ FBVDDQ K41
AB21 GND GND AJ29 AR38 GND GND BD26 D25 GND GND P30 AA32 VDD VDD AH29 AT22 VDD VDD BD51 AV15 VDDS VDDS AC28 AJ43 FBVDDQ FBVDDQ L14
AB22 GND GND AJ30 AR39 GND GND BD29 D28 GND GND P31 AA33 VDD VDD AH30 AT23 VDD VDD BE41 AV16 VDDS VDDS AC29 AK10 FBVDDQ FBVDDQ L15
AB23 GND GND AJ31 AR4 GND GND BD32 D30 GND GND P32 AA34 VDD VDD AH31 AT24 VDD VDD BE42 AV17 VDDS VDDS AC35 AK11 FBVDDQ FBVDDQ L18
AB24 GND GND AJ32 AR52 GND GND BD35 D31 GND GND P33 AA35 VDD VDD AH32 AT25 VDD VDD BE43 AV18 VDDS VDDS AC36 AK42 FBVDDQ FBVDDQ L20
AB25 GND GND AJ33 AR9 GND GND BD38 D34 GND GND P34 AA36 VDD VDD AH33 AT26 VDD VDD BE46 AV24 VDDS VDDS AC37 AK43 FBVDDQ FBVDDQ L21
AB26 GND GND AJ34 AT4 GND GND BD52 D37 GND GND P35 AA37 VDD VDD AH34 AT27 VDD VDD BE47 AV25 VDDS VDDS AC38 AM42 FBVDDQ FBVDDQ L23
AB27 GND GND AJ35 AT5 GND GND BE10 D4 GND GND P36 AA38 VDD VDD AH35 AT28 VDD VDD BE48 AV26 VDDS VDDS AC39 AM43 FBVDDQ FBVDDQ L24
AB28 GND GND AJ36 AT51 GND GND BE13 D40 GND GND P37 AA39 VDD VDD AH36 AT29 VDD VDD BE49 AV27 VDDS VDDS AF14 AN43 FBVDDQ FBVDDQ L26
AB29 GND GND AJ37 AT52 GND GND BE15 D43 GND GND P38 AB13 VDD VDD AH37 AT30 VDD VDD BE50 AV28 VDDS VDDS AF15 AR42 FBVDDQ FBVDDQ L27
AB30 GND GND AJ38 AT8 GND GND BE16 D46 GND GND P39 AB40 VDD VDD AH38 AT31 VDD VDD BE51 AV29 VDDS VDDS AF16 AR43 FBVDDQ FBVDDQ L30
AB31 GND GND AJ39 AU10 GND GND BE18 D49 GND GND P51 AC19 VDD VDD AH39 AT32 VDD VDD BE52 AV35 VDDS VDDS AF17 R42 FBVDDQ FBVDDQ L32
AB32 GND GND AJ9 AU14 GND GND BE19 D7 GND GND R49 AC20 VDD VDD AK19 AT33 VDD VDD BF42 AV36 VDDS VDDS AF18 R43 FBVDDQ FBVDDQ L33
AB33 GND GND AK1 AU15 GND GND BE21 E2 GND GND R52 AC21 VDD VDD AK20 AT34 VDD VDD BF44 AV37 VDDS VDDS AF24 U10 FBVDDQ FBVDDQ L35
AB34 GND GND AK44 AU16 GND GND BE22 E4 GND GND T10 AC22 VDD VDD AK21 AT35 VDD VDD BF45 AV38 VDDS VDDS AF25 U11 FBVDDQ FBVDDQ L36
AB35 GND GND AK47 AU17 GND GND BE24 E48 GND GND T14 AC23 VDD VDD AK22 AT36 VDD VDD BF47 AV39 VDDS VDDS AF26 U43 FBVDDQ FBVDDQ L39
2 AB36 GND GND AL10 AU18 GND GND BE25 E5 GND GND T15 AC30 VDD VDD AK23 AT37 VDD VDD BF49 R14 VDDS VDDS AG27 V10 FBVDDQ FBVDDQ M10 2
AB37 GND GND AL14 AU19 GND GND BE27 E51 GND GND T16 AC31 VDD VDD AK30 AT38 VDD VDD BF51 R15 VDDS VDDS AG28 V42 FBVDDQ FBVDDQ M43
AB38 GND GND AL15 AU2 GND GND BE28 E8 GND GND T17 AC32 VDD VDD AK31 AT39 VDD VDD BG43 R16 VDDS VDDS AG29 V43 FBVDDQ FBVDDQ P10
AB39 GND GND AL16 AU20 GND GND BE30 F10 GND GND T18 AC33 VDD VDD AK32 AT42 VDD VDD BG44 R17 VDDS VDDS AG35 Y10 FBVDDQ FBVDDQ P11
AB4 GND GND AL17 AU21 GND GND BE31 F13 GND GND T19 AC34 VDD VDD AK33 AU43 VDD VDD U16 R18 VDDS VDDS AG36 Y11 FBVDDQ FBVDDQ P42
AB43 GND GND AL18 AU22 GND GND BE33 F16 GND GND T2 AE14 VDD VDD AK34 AV19 VDD VDD U17 R24 VDDS VDDS AG37 Y42 FBVDDQ FBVDDQ P43
AB45 GND GND AL19 AU23 GND GND BE34 F17 GND GND T20 AE15 VDD VDD AL13 AV20 VDD VDD U18 R25 VDDS VDDS AG38 Y43 FBVDDQ FBVDDQ R10
AB47 GND GND AL2 AU24 GND GND BE36 F19 GND GND T21 AE16 VDD VDD AL40 AV21 VDD VDD U19 R26 VDDS VDDS AG39 FBVDDQ R11
AB49 GND GND AL20 AU25 GND GND BE37 F21 GND GND T22 AE17 VDD VDD AM14 AV22 VDD VDD U20 R27 VDDS VDDS AK14
AB51 GND GND AL21 AU26 GND GND BE39 F22 GND GND T23 AE18 VDD VDD AM15 AV23 VDD VDD U21 R28 VDDS VDDS AK15 TP505
AB6 GND GND AL22 AU27 GND GND BE40 F25 GND GND T24 AE19 VDD VDD AM16 AV30 VDD VDD U22 R29 VDDS VDDS AK16
AB8 GND GND AL23 AU28 GND GND BF2 F28 GND GND T25 AE20 VDD VDD AM17 AV31 VDD VDD U23 R35 VDDS VDDS AK17
AD14 AL24 AU29 BF4 F31 T26 AE21 AM18 AV32 U24 R36 AK18 E52 PS_FBVDD_SENSE
GND GND GND GND GND GND VDD VDD VDD VDD VDDS VDDS FBVDDQ_SENSE OUT {29}
AD15 GND GND AL25 AU30 GND GND BF41 F34 GND GND T27 AE22 VDD VDD AM19 AV33 VDD VDD U25 R37 VDDS VDDS AK24
AD16 GND GND AL26 AU31 GND GND BF6 F35 GND GND T28 AE23 VDD VDD AM20 AV34 VDD VDD U26 R38 VDDS VDDS AK25
AD17 GND GND AL27 AU32 GND GND BG10 F37 GND GND T29 AE24 VDD VDD AM21 AV42 VDD VDD U27 R39 VDDS VDDS AK26
AD18 AL28 AU33 BG13 F40 T30 AE25 AM22 AV43 U28 W14 AK27 P45 SNN_FB_VREF_PROBE
GND GND GND GND GND GND VDD VDD VDD VDD VDDS VDDS FB_VREF
AD19 GND GND AL29 AU34 GND GND BG16 F43 GND GND T31 AE26 VDD VDD AM23 AV44 VDD VDD U29 W15 VDDS VDDS AK28 TP507
AD20 GND GND AL30 AU35 GND GND BG19 F44 GND GND T32 AE27 VDD VDD AM24 AW13 VDD VDD U30 W16 VDDS VDDS AK29
AD21 GND GND AL31 AU36 GND GND BG22 F46 GND GND T33 AE28 VDD VDD AM25 AW40 VDD VDD U31 W17 VDDS VDDS AK35
AD22 AL32 AU37 BG25 F52 T34 AE29 AM26 AW42 U32 W18 AK36 FBVDD
GND GND GND GND GND GND VDD VDD VDD VDD VDDS VDDS
AD23 GND GND AL33 AU38 GND GND BG28 F7 GND GND T35 AE30 VDD VDD AM27 AW43 VDD VDD U33 W24 VDDS VDDS AK37 GND
AD24 AL34 AU39 BG31 G2 T36 AE31 AM28 AW44 U34 W25 AK38 R44 FB_CAL_PD_VDDQ R608 40.2ohm
GND GND GND GND GND GND VDD VDD VDD VDD VDDS VDDS FB_CAL_PD_VDDQ
AD25 GND GND AL35 AU4 GND GND BG34 G38 GND GND T37 AE32 VDD VDD AM29 AW45 VDD VDD U35 W26 VDDS VDDS AK39 0402 1% COMMON
AD26 GND GND AL36 AU45 GND GND BG37 G4 GND GND T38 AE33 VDD VDD AM30 AY14 VDD VDD U36 W27 VDDS VDDS AP14 FB_CAL_PU_GND P44 FB_CAL_PU_GND R603 40.2ohm
AD27 GND GND AL37 AU47 GND GND BG40 G47 GND GND T39 AE34 VDD VDD AM31 AY18 VDD VDD U37 W28 VDDS VDDS AP15 0402 1% COMMON
AD28 AL38 AU49 BG42 G49 T4 AE35 AM32 AY22 U38 W29 AP16 R45 FB_CAL_TERM_GND R607 60.4ohm
GND GND GND GND GND GND VDD VDD VDD VDD VDDS VDDS FB_CALTERM_GND
AD29 GND GND AL39 AU51 GND GND BG7 G51 GND GND T43 AE36 VDD VDD AM33 AY26 VDD VDD U39 W35 VDDS VDDS AP17 0402 1% COMMON
AD30 GND GND AL4 AU6 GND GND BH15 G6 GND GND T45 AE37 VDD VDD AM34 AY27 VDD VDD V13 W36 VDDS VDDS AP18
AD31 GND GND AL43 AU8 GND GND BH18 H1 GND GND T47 AE38 VDD VDD AM35 AY31 VDD VDD V40 W37 VDDS VDDS AP24
3 AD32 GND GND AL45 AV4 GND GND BH2 H10 GND GND T49 AE39 VDD VDD AM36 AY35 VDD VDD W19 W38 VDDS VDDS AP25 3
AD33 GND GND AL47 AV45 GND GND BH21 H13 GND GND T51 AF13 VDD VDD AM37 AY39 VDD VDD W20 W39 VDDS VDDS AP26 GND
AD34 GND GND AL49 AV9 GND GND BH24 H16 GND GND T6 AF30 VDD VDD AM38 AY43 VDD VDD W21
AD35 GND GND AL51 AW14 GND GND BH27 H19 GND GND T8 AF31 VDD VDD AM39 AY45 VDD VDD W22
AD36 GND GND AL6 AW15 GND GND BH30 H22 GND GND U7 AF32 VDD VDD AP19 BA43 VDD VDD W23
AD37 GND GND AL8 AW16 GND GND BH33 H25 GND GND U9 AF33 VDD VDD AP20 BA44 VDD VDD W30
AD38 GND GND AM4 AW17 GND GND BH36 H28 GND GND V14 AF34 VDD VDD BK52 BA45 VDD VDD W31
AD39 GND GND AM9 AW18 GND GND BH39 H31 GND GND V15 AF40 VDD VDD BL46 BA46 VDD VDD W32
AD44 AN14 AW19 BH42 H34 V16 AG13 BL47 BA47 W33 BM45 GPU_NVVDDS_SENSE R641 0ohm/NC COMMON GPU_NVVDD_SENSE
GND GND GND GND GND GND VDD VDD VDD VDD VDDS_SENSE 0402 0.05 ohm
OUT {16,30}
AE10 GND GND AN15 AW20 GND GND BH5 H37 GND GND V17 AG19 VDD VDD BL48 BB38 VDD VDD W34 GNDS_SENSE BM44 GPU_NVVDDS_GND_FBRT_SENSE R648 0ohm/NC GPU_NVVDD_GND_FBRT_SENSE
OUT {16,30}
AE2 GND GND AN16 AW21 GND GND BJ10 H40 GND GND V18 AG20 VDD VDD BL49 BB39 VDD 04020.05 ohm COMMON
AE4 GND GND AN17 AW22 GND GND BJ12 H43 GND GND V19 AG21 VDD VDD BL50
AE43 GND GND AN18 AW23 GND GND BJ13 J1 GND GND V20 BG45 VDD VDD BL51
AE45 GND GND AN19 AW24 GND GND BJ14 J12 GND GND V21 BG46 VDD VDD BL52
AE47 GND GND AN20 AW25 GND GND BJ15 J17 GND GND V22 BG47 VDD VDD BM47
AE49 GND GND AN21 AW26 GND GND BJ16 J20 GND GND V23 BG48 VDD VDD BM48
AE51 GND GND AN22 AW27 GND GND BJ17 J38 GND GND V24 BG49 VDD VDD BM49
AE6 GND GND AN23 AW28 GND GND BJ18 J49 GND GND V25 BG50 VDD VDD BM50
AE8 GND GND AN24 AW29 GND GND BJ19 J52 GND GND V26 BG51 VDD VDD BM51
AF1 GND GND AN25 AW30 GND GND BJ20 K13 GND GND V27 BG52 VDD VDD N14
AF19 GND GND AN26 AW31 GND GND BJ21 K16 GND GND V28 BH44 VDD VDD N18
AF20 GND GND AN27 AW32 GND GND BJ22 K19 GND GND V29 BH45 VDD VDD N22
AF21 GND GND AN28 AW33 GND GND BJ23 K2 GND GND V30 BH47 VDD VDD N26 TP511
AF22 GND GND AN29 AW34 GND GND BJ24 K22 GND GND V31 BH48 VDD VDD N27
AF23 GND GND AN30 AW35 GND GND BJ25 K25 GND GND V32 BH49 VDD VDD N31 0.05 ohm
AF27 AN31 AW36 BJ26 K28 V33 BH50 N35 BK45 GPU_NVVDD_S R638 0ohm GPU_NVVDD_SENSE
GND GND GND GND GND GND VDD VDD NVVDD_SENSE 0402
OUT {16,30}
AF28 AN32 AW37 BJ27 K31 V34 BH51 N39 BL45 GPU_NVVDD_GND_FBRT R646 0ohm GPU_NVVDD_GND_FBRT_SENSE
GND GND GND GND GND GND VDD VDD GND_SENSE COMMON
OUT {16,30}
AF29 GND GND AN33 AW38 GND GND BJ28 K34 GND GND V35 BH52 VDD VDD P13 04020.05 ohm COMMON
AF35 GND GND AN34 AW39 GND GND BJ29 K37 GND GND V36 BJ44 VDD VDD P40
TP512
AF36 GND GND AN35 AW4 GND GND BJ30 K4 GND GND V37 BJ45 VDD VDD R19 G1M
4 AF37 GND GND AN36 AW46 GND GND BJ31 K40 GND GND V38 BJ46 VDD VDD R20 4
AF38 GND GND AN37 AW5 GND GND BJ32 K45 GND GND V39 BJ47 VDD VDD R21 BGA2152
COMMON 1V8_AON
AF39 GND GND AN38 AW52 GND GND BJ33 K47 GND GND V49 BJ48 VDD VDD R22
AF45 GND GND AN39 AW8 GND GND BJ34 K49 GND GND V52 BJ49 VDD VDD R23 21/23 NC/1V8
AF5 GND GND AN4 AY10 GND GND BJ35 K51 GND GND W10 BJ50 VDD VDD R30
AG14 AN5 AY2 BJ36 K6 W2 BJ51 R31 SNN_NC_S21_1 AT9 BA10
GND GND GND GND GND GND VDD VDD NC 1V8_AON
AG15 AN8 AY4 BJ37 K8 W4 BJ52 R32 SNN_NC_S21_2 BA6 BB14
GND GND GND GND GND GND VDD VDD NC 1V8_AON
AG16 AP10 AY47 BJ38 M52 W43 BK47 R33 SNN_NC_S21_3 BA9 BC14
GND GND GND GND GND GND VDD VDD NC 1V8_AON
AG17 AP2 AY49 BJ39 M6 W45 BK48 R34 SNN_NC_S21_4 BD14
GND GND GND GND GND GND VDD VDD NC
AG18 AP4 AY51 BJ40 N10 BK49 U14 SNN_NC_S21_5 BE12
GND GND GND GND GND VDD VDD NC
AG24 AP43 AY6 BJ41 N2 BK50 U15 SNN_NC_S21_6 BG6
GND GND GND GND GND VDD VDD NC
AG25 AP45 AY8 BJ42 N4 BK51 SNN_NC_S21_7 BH6
GND GND GND GND GND VDD NC
AG26 AP47 B1 BJ43 N43 SNN_NC_S21_8 BJ11 1V8
GND GND GND GND GND NC
AG3 AP49 B10 BJ7 N45 SNN_NC_S21_9 BJ9
GND GND GND GND GND NC
AG30 AP51 B13 BK1 N47 SNN_NC_S21_10 BK44
GND GND GND GND GND NC
AG31 GND GND AP6 B16 GND GND BL1 N49 GND VDD18 AM10
AG32 GND GND AP8 B19 GND GND BL10 N51 GND VDD18 AM11
AG33 GND GND AR14 B2 GND GND BL13 BL40 GND VDD18 AN10
AG34 GND GND AR15 B22 GND GND BL16 VDD18 AN11
AG44 GND GND AR16 B25 GND GND BL19 VDD18 AR10
AH10 GND GND AR17 B28 GND GND BL2 VDD18 AR11
AH2 GND GND AR18 B31 GND GND BL22 VDD18 AT10
AH4 GND GND AR19 B34 GND GND BL25 GND VDD18 AT11
AH43 GND GND BL37 B37 GND GND BL28 GND VDD18 AV10
AH45 GND GND BD24 B40 GND GND BL31 VDD18 AV11
AH47 GND GND BC24 B43 GND GND BL34 VDD18 AW10
AH49 GND B46 GND GND B5 VDD18 AW11
AH51 GND B48 GND GND B51

5 5

GND GND GND GND


Galaxy Microsystems (HK) Ltd.
Page Name:
GPU PWR & GND
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL GPU PWR & GND P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 16 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page17: GPU Decoupling


NVVDD
NVVDD

NVVDD
FBVDD C112 C706 C771 C111
330uF 470uF 470uF 330uF
FBVDD NVVDD
COMMON COMMON COMMON COMMON
20% 20% 20% 20%
1 2V@105degC 2V@105degC 2V@105degC 2V@105degC 1
AL-Polymer AL-Polymer AL-Polymer AL-Polymer
Partition A 6x 1uF and 2x 10uF 3.5A@105degC,100KHz 3.5A@105degC,100KHz 3.5A@105degC,100KHz 3.5A@105degC,100KHz
0.006ohm 0.006ohm 0.006ohm 0.006ohm
SMD_7343 SMD_7343 SMD_7343 SMD_7343
C91
C859 C806 C671 C752 C727
330uF 47uF 10uF 10uF 10uF 10uF
C734 C743 C749 C791 C759 C720 C807 C737 COMMON 4V 4V 4V 4V 4V
CAP_SMD_7343 CAP_SMD_7343 CAP_SMD_7343 CAP_SMD_7343 20%
1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 20% 20% 20% 20% 20%
2V@105degC X5R X6S X6S X6S X6S
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V
AL-Polymer 0805LP 0603 0603 0603 0603
10% 10% 10% 10% 10% 10% 20% 20%
3.5A@105degC,100KHz COMMON COMMON COMMON COMMON COMMON
X6S X6S X6S X6S X6S X6S X6S X6S GND 0.006ohm
0402 0402 0402 0402 0402 0402 0603 0603
SMD_7343
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
0805 0603 0603 0603 0603

0402 0402 0402 0402 0402 0402 0603 0603 CAP_SMD_7343


GND GND
C861 C842 C846 C873 C812 C832 C761 C718
GND
47uF 47uF 22uF 22uF 22uF 22uF 10uF/NC 10uF/NC
GND
4V 4V 6.3V 6.3V 6.3V 6.3V 4V 4V
20% 20% 20% 20% 20% 20% 20% 20%
X5R X5R X6S X6S X6S X6S X6S X6S
0805LP 0805LP 0805LP 0805LP 0805LP 0805LP 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON C753 C808 C736 C751 C758 C669 C719 C774
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
0805 0805 0805 0805 0805 0805 0603 0603 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S
GND 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

0402 0402 0402 0402 0402 0402 0402 0402

Partition B 6x 1uF and 2x 10uF


2 GND 2

C650 C648 C640 C639 C651 C647 C634 C630


1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V
10% 10% 10% 10% 10% 10% 20% 20%
C696 C738 C697 C793 C716 C682 C776 C763 C779
X6S X6S X6S X6S X6S X6S X6S X6S
10uF 10uF 10uF/NC 10uF 10uF 10uF 10uF/NC 10uF 10uF C668 C662 C690 C726 C725 C691 C660 C784
0402 0402 0402 0402 0402 0402 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 4V 4V 4V 4V 4V 4V 4V 4V 4V 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
20% 20% 20% 20% 20% 20% 20% 20% 20% 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
X6S X6S X6S X6S X6S X6S X6S X6S X6S 10% 10% 10% 10% 10% 10% 10% 10%
0402 0402 0402 0402 0402 0402 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 X6S X6S X6S X6S X6S X6S X6S X6S
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND
0603 0603 0603 0603 0603 0603 0603 0603 0603
Partition C 6x 1uF and 2x 10uF 0402 0402 0402 0402 0402 0402 0402 0402

GND
GND
C661 C635 C644 C646 C638 C642 C609 C633
1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V
10% 10% 10% 10% 10% 10% 20% 20%
X6S X6S X6S X6S X6S X6S X6S X6S
0402
COMMON
0402
COMMON
0402
COMMON
0402
COMMON
0402
COMMON
0402
COMMON
0603
COMMON
0603
COMMON 1V8_AON
1V8_AON
0402 0402 0402 0402 0402 0402 0603 0603
place 1 0.1uF cap near BA10
GND
C676 C748 C809 C710 C799 C755 C767 C679 C766 C811
Partition D 6x 1uF and 2x 10uF
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
3 3
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% C851 C817 C816 C916
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S 4.7uF 1uF 0.1uF 0.1uF
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
C721 C717 C750 C760 C739 C701 C732 C683 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
4V 6.3V 16V 16V
1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10% 10% 10% 10%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 4V X6S X6S X7R X7R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0402 0402 0402
10% 10% 10% 10% 10% 10% 20% 20%
COMMON COMMON COMMON COMMON
X6S X6S X6S X6S X6S X6S X6S X6S
0402 0402 0402 0402 0402 0402 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND 0603 0402 0402 0402

0402 0402 0402 0402 0402 0402 0603 0603


GND
C714 C762 C665 C667 C689 C723 C711 C680 C678 C768 place 1 0.1uf cap for BB14 and BC14 to share
GND
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
1V8_MAIN
GND
1V8

C765 C754 C798 C677 C688 C713 C785 C731 C800 C709
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
C879 C850 C805 C698 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V C853 C828 C829
10uF 10uF 10uF 10uF 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 0.1uF 0.1uF 0.1uF
4V 4V 4V 4V X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
16V 16V 16V
4 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 4
20% 20% 20% 20% 10% 10% 10%
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
X6S X6S X6S X6S X7R X7R X7R
0603 0603 0603 0603 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402

0603 0603 0603 0603 0402 0402 0402


GND
GND
GND

C687 C666 C675 C722 C724 C787 C797 C786 C810 C735
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
C531 C179 C796 C229 C544 C869 C541 C542 C543
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
4V 4V 4V 4V 4V 4V 4V 4V 4V
20% 20% 20% 20% 20% 20% 20% 20% 20%
X6S X6S X6S X6S X6S X6S X6S X6S X6S 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
0603W 0603W 0603W 0603W 0603W 0603W 0603W 0603W 0603W
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND

0603 0603 0603 0603 0603 0603 0603 0603 0603

C636 C637 C692 C783 C802 C707 C764 C715 C702


GND
1uF 1uF 1uF/NC 1uF/NC 1uF 1uF 1uF/NC 1uF/NC 1uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S X6S X6S X6S X6S
0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON DNI COMMON COMMON COMMON COMMON COMMON

5 0402 0402 0402 0402 0402 0402 0402 0402 0402 5

GND
Galaxy Microsystems (HK) Ltd.
Page Name:
GPU Decoupling
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL GPU Decoupling P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 17 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page18: IFPAB DVI-D-DL

1 DDC_5V 1
3V3_PROT

[D_AUX_CLAMP*_DP]

2
D506
@discrete.d_3pin_ac(sym_1):page18_i496
3 0.1A

5
G Q530B 100V
SOT23
@discrete.q_fet_n_enh(sym_6):page18_i482 DNI
SOT363
COMMON

1
4 S D 3
DVI_HDMI_SIGNALS
D_3PIN_AC/NC
GND
R852 R831
G1N 10k 2.2k
3V3_PROT
5% 5%
0402 0402 DDC_5V DDC_5V
BGA2152
COMMON COMMON COMMON DDC_5V
[D_AUX_CLAMP*_DP]

2
D507
7/23 IFPAB @discrete.d_3pin_ac(sym_1):page18_i497

2
R849 G Q530A R858 3 0.1A
10k @discrete.q_fet_n_enh(sym_6):page18_i480
2.2k 100V C29
DL-DVI DVI/HDMI DP
5% SOT363 5% SOT23 100pF/NC
0402 COMMON 0402 DNI
50V
COMMON 1 S D 6 COMMON

1
5%
BH11 IFPA_AUX_SDA
SDA SDA
IFPA_AUX C0G
BG11 IFPA_AUX_SCL 0402
SCL SCL IFPA_AUX DVI_HDMI_SIGNALS
D_3PIN_AC/NC DNI 25 SHIELD1
GND 26 SHIELD2
2 BF21 IFPA_L3* C1037 0.1uF 27 SHIELD3 2
IFPA_L3 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
R637 1k IFPAB_RSET BD23 TXC TXC BG21IFPA_L3 0402 COMMON C1036 0.1uF 28
IFPAB_RSET IFPA_L3 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS GND SHIELD4
TXC TXC
0402 1% COMMON 0402 COMMON
IFPAB_TXD0_C* 17 TX0-
J6
BG23IFPA_L2* C39 0.1uF IFPAB_TXD0_C 18 TX0+
TXD0 TXD0 IFPA_L2 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS @electro_mechanic.con_dvi_d(sym_5):page18_i489
BH23IFPA_L2 0402 COMMON C40 0.1uF IFPAB_TXD1_C* 9 TX1-
GND TXD0 TXD0 IFPA_L2 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
17 9 1
1V8_GPC_DP_VID_PLL DIP_DVI_D
BD21 IFPAB_PLLVDD 0402 COMMON DVI_HDMI_SIGNALS IFPAB_TXD1_C 10 TX1+
{19,21,25} IN DIP_DVI_D
DVI_HDMI_SIGNALS IFPAB_TXD2_C* 1 TX2-
BF23 IFPA_L1* C1032 0.1uF IFPAB_TXD2_C 2 TX2+ COMMON
IFPA_L1 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
C849 TXD1 TXD1
BE23 IFPA_L1 0402 COMMON C1033 0.1uF 3 SHLD24
0.1uF TXD1 TXD1 IFPA_L1 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
C875 0402 COMMON 11 SHLD13
4.7uF 16V
19 SHLD05
6.3V 10% C1034 0.1uF
20% X7R TXD2 TXD2 IFPA_L0 BF24 IFPA_L0* DVI_HDMI_SIGNALS IFPAB_TXD3_C* 12 TX3-
0402 BG24IFPA_L0 0402 COMMON C1035 0.1uF IFPAB_TXD3_C 13 TX3+
X6S TXD2 TXD2 IFPA_L0 DVI_HDMI_SIGNALS
0603 COMMON 0402 COMMON IFPAB_TXD4_C* 4 TX4-
COMMON IFPAB_TXD4_C 5 TX4+
IFPAB_TXD5_C* 20 TX5-
IFPAB_TXD5_C 21 TX5+
IFPAB_AUX_SCL_DVI DVI_HDMI_SIGNALS 6 DDCC
GND IFPAB_AUX_SDA_DVI DVI_HDMI_SIGNALS 7 DDCD
BG12 SNN_IFPB_AUX_SDA 14 VDDC
SDA
IFPB_AUX
BH12 SNN_IFPB_AUX_SCL 15 GND
SCL IFPB_AUX
22 SHLDC
IFPAB_TXC_C* 24 TXC-
BL18 SNN_IFPB_L3* IFPAB_TXC_C 23 TXC+
IFPB_L3
PEX_VDD BB17 TXC BK18 SNN_IFPB_L3 SNN_VS_DVI 8 VSYNC
IFP_IOVDD TXC
IFPB_L3
BB15 DVIA_HPD_C 16 HPD
IFP_IOVDD 24 16 8

BB18 BK20 IFPB_L2* C43 0.1uF


IFP_IOVDD TXD3 TXD0 IFPB_L2 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
BB20 BL20 IFPB_L2 0402 COMMON C44 0.1uF
IFP_IOVDD TXD3 TXD0 IFPB_L2 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
3 0402 COMMON 3

C134 C820 C822 C821 BM20 IFPB_L1* C45 0.1uF


4.7uF 1uF 0.1uF 0.1uF TXD4 TXD1
IFPB_L1 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
BM21 IFPB_L1 0402 COMMON C46 0.1uF
6.3V 6.3V 16V 16V TXD4 TXD1 IFPB_L1 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
0402 COMMON
20% 10% 10% 10%
X6S X6S X7R X7R
0603 0402 0402 0402 BL21 IFPB_L0* C47 0.1uF
TXD5 TXD2 IFPB_L0 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
COMMON COMMON COMMON COMMON BK21 IFPB_L0 0402 COMMON C48 0.1uF
TXD5 TXD2 IFPB_L0 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
0402 COMMON DIP_DVI_D

IFPAB

GND

GND

1V8_AON

499ohm R50
R845 COMMON 0402
1%
10k 499ohm R49
5%
COMMON 1% 0402
0402
COMMON PLACE CLOSE 499ohm R46
GPIO14_IFPA_HPD 3 1B1C1E TO CONNECTOR COMMON 1% 0402
{24} OUT C 499ohm R47
Q529
1 B DVIA_HPD_R_Q
@discrete.q_npn(sym_1):page18_i376 R55 100k DVIA_HPD_R R54 0ohm COMMON 1% 0402
SOT23_1B1C1E 499ohm R52
4 COMMON
0402 5% COMMON 0402 0.05 ohm COMMON 4
2 E C38 C30 COMMON 0402
1%
R56 220pF 220pF/NC 499ohm R51
100k 50V 50V
COMMON 1% 0402
5% 5% 5%
499ohm R48
0402 C0G C0G
COMMON 0402 0402 COMMON 1% 0402

GND COMMON DNI 499ohm R53


COMMON 1% 0402

GND GND
499ohm R57
COMMON 1% 0402

GND
499ohm R58
COMMON 1% 0402
499ohm R59
COMMON 1% 0402
499ohm R60
COMMON 1% 0402
499ohm R61
NV3V3 COMMON 1% 0402
3 IFPAB_TERM_CM 499ohm R62
1G1D1S
D Q10 COMMON 0402
1%
@discrete.q_fet_n_enh(sym_2):page18_i424
SOT23_1G1D1S
1G COMMON
S 2
60V
0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A
0.35W
20V

GND

5 5

Galaxy Microsystems (HK) Ltd.


ASSEMBLY <ASSEMBLY_DESCRIPTION> Page Name:
PAGE DETAIL IFPAB DVI-D-DL IFPAB DVI-D-DL
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Size Project Name: Design By: Rev
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL Custom Carson V10
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
P45U
Date: Thursday, December 28, 2017 Sheet 18 of 37
A B C D E F G PROPERTY NOTE: This document contains information confidential and
property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H

Page19: IFPE UNUSED

1 1

2 2

G1O

BGA2152
GPU

10/23 IFPE
DVI/HDMI DP

R634 1k/NC IFPEF_RSET BD17 BL8


IFPEF_RSET SDA IFPE_AUX
0402 1% SCL IFPE_AUX BK8
COMMON

GND IFPE_L3 BG14


R1061 TXC
1V8_GPC_DP_VID_PLL 0ohm/NC BD15 IFPEF_PLLVDD IFPE_L3 BH14
21,25} IN TXC
04020.05 ohm COMMON

TXD0 IFPE_L2 BF14


TXD0 IFPE_L2 BE14
C847 BF15
0 OHM TXD1 IFPE_L1
TXD1 IFPE_L1 BG15
16V
3
10%
IFPE 3
X7R IFPE_L0 BG17
TXD2
0402 TXD2 IFPE_L0 BH17
COMMON
PEX_VDD
GND
BC18 IFP_IOVDD
R1062 0ohm/NC BC20 IFP_IOVDD
04020.05 ohm COMMON

C904 C132 C819


4.7uF 1uF 0 OHM
6.3V 6.3V 16V
20% 10% 10%
X6S X6S X7R
0603 0402 0402
COMMON COMMON COMMON

GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
IFPE UNUSED
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL IFPE DP P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 19 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page 20: IFPF UNUSED

1 1

2 2

G1P

BGA2152
COMMON

6/23 IFPF

PEX_VDD DVI/HDMI DP

R1063 0ohm/NC BC21 IFP_IOVDD IFPF_AUX BM9


SDA
3 04020.05 ohm COMMON BC23 IFP_IOVDD SCL IFPF_AUX BM8 3

C133 BK11
0 OHM TXC IFPF_L3
TXC IFPF_L3 BL11
16V
10%
X7R IFPF_L2 BM11
TXD0
0402
TXD0 IFPF_L2 BM12
COMMON

TXD1 IFPF_L1 BL12


TXD1 IFPF_L1 BK12
GND
TXD2 IFPF_L0 BK14
IFPF TXD2 IFPF_L0 BL14

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
IFPF UNUSED
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL IFPF DP P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 20 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page 21: IFPC HDMI IFPC_MODE_Q*


3V3_PROT

C1047 R865
10nF 0ohm
HDMI
16V 0.05 ohm
10% 0402
ALL X7R COMMON
0402
DP_PWR_CD
3V3_PROT COMMON

2
G
COMMON
@discrete.q_fet_n_enh(sym_6):page21_i297
GND
R859 SOT363
Q9A R862
10k 100k
1 HDMI 1 S D 6 DP 1
5% 5%
0402 0402
COMMON DNI
I2CW_SDA_Q
0ohm
0402 0.05 ohm COMMON
R861 HDMI D512
R863
@discrete.d_esd(sym_2):page21_i305
2k
NORM HDMI
5V 5%
DDC_5V 0402
10pF
COMMON COMMON DDC_5V

ALL D_ESD/NC
Q9B R868
3V3_PROT
2k

5
G
COMMON GND HDMI
@discrete.q_fet_n_enh(sym_6):page21_i291
5% C3
R869 SOT363 0402 100pF
COMMON
10k 50V
HDMI 4 S D 3
5% 5%
0402 C0G
COMMON 0402
I2CW_SCL_Q
J5
COMMON
RECEPTACLE
G1Q
GND DIP_HDMI

BGA2152 R866 0ohm R867


D513
COMMON 100k
0402 0.05 ohm COMMON @discrete.d_esd(sym_2):page21_i301
5% SHIELD1
8/23 IFPC HDMI 0402
NORM 20
5V 21 SHIELD2
95DIFF_NETCLASS1 DNI DP
1k R643 IFPC_RSET 10pF
BD20 IFPCD_RSET COMMON
2 COMMON 1% 0402 19 HP_DET 2
DVI/HDMI DP IFPC_AUX +5V 19
18 18
17 DDC/CEC_GND
D_ESD/NC 17
GND BD18 IFPCD_PLLVDD IFPC_AUX BL9 IFPC_I2CW_AUX*
95DIFF_NETCLASS1 GND GND 95DIFF_NETCLASS1
I2CW_SDA_C 16 SDA
SDA I2CW_SCL_C SCL 16
IFPC_AUX BK9 IFPC_I2CW_AUX
95DIFF_NETCLASS1 15
SCL IFPC_AUX SNN_HDMI_RESERVED RESERVED 15
14 14
1V8_GPC_DP_VID_PLL C848 13 CEC
{18,19,25} IN 0.1uF C1063 0.1uF R905 5.1ohm IFPC_TXC_RC1* CK- 13

TXC IFPC_L3 BF17 IFPC_TXC* DVI_HDMI_SIGNALS IFPC_TXC_C1* DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS 12 12


16V C1064 0.1uF R906 5.1ohm CK_SHIELD
10% TXC IFPC_L3 BE17 IFPC_TXC DVI_HDMI_SIGNALS 0402 COMMON IFPC_TXC_C1 DVI_HDMI_SIGNALS COMMON 11 11
0402 COMMON COMMON IFPC_TXC_RC1 10 CK+ 24
X7R DVI_HDMI_SIGNALS 10
0402 BF18 IFPC_TXD0* C1057 0.1uF IFPC_TXD0_C1* R903 5.1ohm IFPC_TXD0_RC1* 9 D0-
TXD0 IFPC_L2 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS 9
COMMON BG18 IFPC_TXD0 0402 COMMON C1058 0.1uF IFPC_TXD0_C1 COMMON R904 5.1ohm 8 D0_SHIELD
TXD0 IFPC_L2 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS 8
0402 COMMON COMMON IFPC_TXD0_RC1 7 D0+
IFPC IFPC_L1 BG20 IFPC_TXD1* DVI_HDMI_SIGNALS
C1059 0.1uF IFPC_TXD1_C1* DVI_HDMI_SIGNALS
R899 5.1ohm IFPC_TXD1_RC1*
DVI_HDMI_SIGNALS
DVI_HDMI_SIGNALS 6 D1- 7

TXD1 6
GND BH20 IFPC_TXD1 0402 COMMON C1060 0.1uF IFPC_TXD1_C1 COMMON R900 5.1ohm 5 D1_SHIELD
TXD1 IFPC_L1 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS 5
0402 COMMON COMMON IFPC_TXD1_RC1 4 D1+
DVI_HDMI_SIGNALS 4
BF20 IFPC_TXD2* C1061 0.1uF IFPC_TXD2_C1* R901 5.1ohm IFPC_TXD2_RC1* 3 D2-
TXD2 IFPC_L0 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS 3
PEX_VDD BE20 IFPC_TXD2 0402 COMMON C1062 0.1uF IFPC_TXD2_C1 COMMON R902 5.1ohm 2 D2 _SHIELD
TXD2 IFPC_L0 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS 2
0402 COMMON COMMON IFPC_TXD2_RC1 1 D2+
DVI_HDMI_SIGNALS 1

BB21 1V8_AON 22 SHIELD3


IFP_IOVDD
BB23 IFP_IOVDD Hotplug Detection 23 SHIELD4

C907 C824 C823 R11 HDMI_C_HPD_R_Q R10 100k HDMI_C_HPD_R R21 0ohm HDMI_C_HPD_C
4.7uF 1uF 0.1uF 10k
0402 5% COMMON 0402 0.05 ohm COMMON
6.3V 6.3V 16V 5%
20% 10% 10% 0402
X6S X6S X7R COMMON not found GND
GPIO27_IFPC_HPD 3 C15 C8
0603 0402 0402 1B1C1E
{24} OUT C R9 220pF 100pF/NC
COMMON COMMON COMMON Q3
100k 50V 50V
1B
@discrete.q_npn(sym_1):page21_i88
SOT23_1B1C1E 5% 5% 5%
3 COMMON C0G C0G
3
0402
2 E COMMON 0402 0402
COMMON COMMON
GND

4.7uF and 1.0uF caps are for


IFPC and IFPD IFP_IOVDD pins
GND GND GND GND

HDMI LEVEL SHIFTING PULL DOWNS

NV3V3

0.4MM 0V
HDMI_PD_1

R889 R888 R887 R886 R885 R884 R891 R890


499ohm 499ohm 499ohm 499ohm 499ohm 499ohm 499ohm 499ohm
1% 1% 1% 1% 1% 1% 1% 1%
0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

1G1D1S 3 IFPC_BEAD8 IFPC_BEAD7 IFPC_BEAD6 IFPC_BEAD5 IFPC_BEAD4 IFPC_BEAD3 IFPC_BEAD2 IFPC_BEAD1


D Q5
@discrete.q_fet_n_enh(sym_2):page21_i18 LB8 LB7 LB6 LB5 LB4 LB3 LB2 LB1
SOT23_1G1D1S
1G COMMON
600ohm 600ohm 600ohm 600ohm 600ohm 600ohm 600ohm 600ohm
S 2 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
60V BEAD_0402 BEAD_0402 BEAD_0402 BEAD_0402 BEAD_0402 BEAD_0402 BEAD_0402 BEAD_0402
0.3A
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
0.8A
0.35W
20V

4 4

GND Place to minimize stubs to these PDs

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
IFPC HDMI
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL IFPC HDMI/DP P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 21 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page 22: IFPD DP

DP_PWR_CD

Two cases to be considered:


C21
1. DP AUX to DP connector: AUX AC coupled 0.1uF/NC
1 1
16V
10%
2. DP AUX to DP-DVI dongle: AUX pass through X7R
R29
0402
100k DNI
5%
0402
COMMON

GND
C22 0.1uF
0402 16V
10%
D1
X7R
COMMON @discrete.d_esd(sym_2):page22_i51
NORM
5V
IFPD_AUX_BYP* 10pF
85DIFF_NETCLASS1 COMMON NV12V

S D NV3V3
1 6 3 4 D_ESD/NC
Q532A
D S
Q532B R27
GND
SOT363 SOT363 10k
G @discrete.q_fet_n_enh(sym_6):page22_i31 @discrete.q_fet_n_enh(sym_6):page22_i36 5% R32
COMMON COMMON
0402 10k
G COMMON

5
5%
0402
DP1_MODE 6 1B1C1E COMMON
Q7A C
2B DP1_MODE*
@discrete.q_npn(sym_1):page22_i56 3 1B1C1E
C24 SOT363
Q7B C
10nF COMMON
1 E 5 B DP1_MODE_R
@discrete.q_npn(sym_1):page22_i62 R28 10k
16V SOT363
2 COMMON
0402 5% COMMON 2

5
G G 10%
Q533A Q533B X7R 4 E
@discrete.q_fet_n_enh(sym_6):page22_i30 @discrete.q_fet_n_enh(sym_7):page22_i33 0402
SOT363 SOT363
COMMON
COMMON COMMON
1 S D 6 3 D S 4
IFPD_AUX_BYP
85DIFF_NETCLASS1 GND GND GND
D2
@discrete.d_esd(sym_2):page22_i48
NORM
R30 5V
100k 10pF
5% COMMON
C23 0.1uF
0402
0402 16V COMMON
10%
X7R
D_ESD/NC
DP_PWR_CD
COMMON

R35 R36
GND RECEPTACLE
100k 100k
G1R GND DPORT_26P_0_7MM
5% 5%
J1 SHIELD6 21 C7
0402 0402 COMMON
BGA2152 0.1uF/NC
COMMON COMMON COMMON SHIELD5 23
16V
SHIELD4 25
10%
9/23 IFPD X7R
0402
PWR 20 DNI
20
PWR_RET 19
DVI/HDMI DP GND GND 19
DP_D_HPD_C 18 HPD 18

17 GND
BF11 IFPD_AUX* IFPD_AUX IFPD_AUX_C* 17 AUXN GND 16
SDA IFPD_AUX 95DIFF_NETCLASS1 95DIFF_NETCLASS1 16
BE11 IFPD_AUX IFPD_AUX IFPD_AUX_C 15 AUXP
SCL IFPD_AUX 95DIFF_NETCLASS1 95DIFF_NETCLASS1 15
3 CEC 14 DP1_CEC 3
14
MODE 13 DP1_MODE_C
13
BM14 IFPD_L3* C10 0.1uF IFPD_L3_C* 12 LANE_3N
TXC IFPD_L3 DP_SIGNALS DP_SIGNALS 12
BM15 IFPD_L3 0402 COMMON C11 0.1uF IFPD_L3_C 10 LANE_3P GND 11
TXC IFPD_L3 DP_SIGNALS DP_SIGNALS 11
0402 COMMON R23 R26
IFPD_L2* C16 0.1uF IFPD_L2_C*
10 5.1M/NC 1M
TXD0 IFPD_L2 BL15 DP_SIGNALS DP_SIGNALS 9 LANE_2N 9
IFPD_L2 C17 0.1uF IFPD_L2_C GND 8 5% 5%
IFPD_L2 BK15 DP_SIGNALS 0402 COMMON
DP_SIGNALS 7 LANE_2P
TXD0 8 0402 0402
0402 COMMON
IFPD IFPD_L1 BK17 IFPD_L1* DP_SIGNALS
C12 0.1uF IFPD_L1_C* DP_SIGNALS 6 LANE_1N
7 DNI COMMON

TXD1 6
BL17 IFPD_L1 0402 COMMON C13 0.1uF IFPD_L1_C 4 LANE_1P GND 5
TXD1 IFPD_L1 DP_SIGNALS DP_SIGNALS 5
0402 COMMON
4
BM17 IFPD_L0* C18 0.1uF IFPD_L0_C* 3 LANE_0N
TXD2 IFPD_L0 DP_SIGNALS DP_SIGNALS 3
PEX_VDD BM18 IFPD_L0 0402 COMMON C19 0.1uF IFPD_L0_C 1 LANE_0P GND 2
TXD2 IFPD_L0 DP_SIGNALS DP_SIGNALS 2 GND GND
0402 COMMON
1
1V8_AON
BC15 IFP_IOVDD
BC17 IFP_IOVDD SHIELD3 22
R5 SHIELD2 24
C818 10k
SHIELD1 26
0.1uF 5%
0402
Hotplug Detection

27
16V
COMMON
10%
GPIO17_IFPD_HPD 3
X7R {24} 1B1C1E
OUT C
0402 Q2 DPORT_26P_0_7MM
COMMON 1B
@discrete.q_npn(sym_1):page22_i10DP_D_HPD_R_Q R3 100k DP_D_HPD_R R18 0ohm
SOT23_1B1C1E GND
COMMON 0402 5% COMMON 0402 0.05 ohm COMMON
2 E
GND R2 C1 C5
100k 220pF 100pF/NC
5% 50V 50V
0402 5% 5%
COMMON C0G C0G
4 GND 0402 0402 4
COMMON DNI

GND GND GND

Fused DP_PWR
3V3_F
U525 DP_PWR_CD
Co-Layout
INS9801708
SO8
COMMON
2 IN OUT 8
3 IN OUT 7 C9
C1068 6 C1093 C1091 C20
0.1uF OUT 0.1uF 22uF 560uF/NC 22UF
3V3_DP_PWR_CD_EN R921
16V R882 10k 4.7k 16V 6.3V COMMON 6.3V
10%
4 EN 20%
5% 10% 20% 20%
0402 5% 6.3V@105degC
X7R 0402 X7R X5R X5R
0402 COMMON
SNN_DP_PWR_CD_OC 5 OC* GND 1 COMMON 0402 0805LP AL-Polymer C1206
COMMON COMMON COMMON 5.6A@105degC,100KHz COMMON
0.007ohm
TH_D63P25
GND C7343
C1066
GND GND GND GND GND
0.1uF
16V
Place Bulk CAP close to connector
10%
X7R
5 0402 5
COMMON

GND Galaxy Microsystems (HK) Ltd.


Page Name:
IFPD DP
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL IFPD DP P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 22 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page 23: MIOA/B Interface and Frame Lock

G1T

BGA2152
1V8 COMMON

11/23 MIOA

MIOAD0 AN9
MIOAD1 AM2
1 MIOAD2 AN7 1
C781 C868 C899 C770 C790 C782 R617 AN6
4.7uF 4.7uF 1uF 1uF 0.1uF 0.1uF 1k MIOAD3
MIOAD4 AR1
6.3V 6.3V 6.3V 6.3V 16V 16V 1%
20% 20% 10% 10% 10% 10% 0402 MIOAD5 AR6
X6S X6S X6S X6S X7R X7R COMMON MIOAD6 AR5
0603 0603 0402 0402 0402 0402 MIOAD7 AM8
COMMON COMMON COMMON COMMON COMMON COMMON
MIOAD8 AN3
0.305 MIOAD9 AR8
2.5V MIOAD10 AR3
R616 49.9ohm MIOA_CAL_PD_VDDQ AM5 AR2
MIOACAL_PD_VDDQ MIOAD11
0402 1% COMMON
R615 49.9ohm MIOA_CAL_PU_GND AM6
GND MIOACAL_PU_GND
0402 1% COMMON 0.0V 0.305
0.305
1.65V
MIOA_VREF AM7 MIOA_VREF
GND

MIOA_CTL3 AT7
MIOA_HSYNC AM1
C772 R621 AR7
0.1uF 1k MIOA_VSYNC
MIOA_DE AN1
16V 1%
10% 0402
X7R COMMON
0402
COMMON
MIOA_CLKOUT AN2
2 2
MIOA_CLKIN AM3

GND

3 3

G1S

BGA2152
1V8 COMMON

12/23 MIOB

MIOBD0 AT3
MIOBD1 AV6
4 MIOBD2 AT2 4
C835 C804 C911 C801 AT1
4.7uF 1uF 0.1uF 0.1uF MIOBD3
R622 AW6
6.3V 6.3V 16V 16V 1k MIOBD4
MIOBD5 AV2
20% 10% 10% 10% 1%
X6S X6S X7R X7R 0402 MIOBD6 AV1
0603 0402 0402 0402 COMMON MIOBD7 AV3
COMMON COMMON COMMON COMMON
MIOBD8 AW3
0.305 MIOBD9 BA8
3.3V MIOBD10 AW7
R628 49.9ohm MIOB_CAL_PD_VDDQ AV7 MIOBCAL_PD_VDDQ MIOBD11 BB8
0402 1% COMMON
R629 49.9ohm MIOB_CAL_PU_GND AV8
GND MIOBCAL_PU_GND
0402 1% COMMON 0.0V 0.305
0.305
1.65V
MIOB_VREF AW9 MIOB_VREF
GND

MIOB_CTL3 BB7
MIOB_HSYNC AV5
C814 R625 BA7
0.1uF 1k MIOB_VSYNC
MIOB_DE AW2
16V 1%
10% 0402
X7R COMMON
0402 GP104 GP106
COMMON
MIOB_CLKOUT AW1

5
MIOB UNUSED MIOB_CLKIN AT6 5

GND
Galaxy Microsystems (HK) Ltd.
Page Name:
MIOA/B Interface and Frame Lock
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MIOA/B Interface and Frame Lock P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 23 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page 24: MISC1: Fan, Thermal, JTAG, GPIO


NV3V3
NV3V3 NV3V3

R749 R750 R526 R502 R877 R14 R650


2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 10k R510
5% 5% 5% 5% 5% 5% 5% 10k
0402 0402 0402 0402 0402 0402 0402 5%
COMMON COMMON COMMON COMMON COMMON COMMON COMMON 0402
COMMON

1 THERM_OVERT* 1
OUT {35}

G1U

BGA2152
COMMON

13/23 MISC 1

BG5 BJ8 I2CS_SCL


OVERT I2CS_SCL IN {3}
BH8 I2CS_SDA
I2CS_SDA BI {3}
SNN_TS_VREF BF12 TS_VREF
I2CC_SCL BG9 I2CC_SCL R514 33ohm I2CC_SCL_R
I2CC_SDA R509 33ohm I2CC_SDA_R
OUT {33,37}
I2CC_SDA BH9 0402 5% COMMON
{33,37}
BI
0402 5% COMMON

BG8 I2CB_SCL R875 33ohm I2CB_SCL_R


I2CB_SCL OUT {37}
THERM_DN
I2CB_SDA BF8 I2CB_SDA 0402 5% COMMON R16 33ohm I2CB_SDA_R
BI {37}
0402 5% COMMON
NV3V3 GPIO9_THERM_ALERT*
1V8_AON {33}
C867 IN
BJ1 THERMDN
2.2nF/NC GPIO10_FBVREF_SEL
16V R119 R24 OUT {5,7,11}
BJ2 THERMDP
10% 100k 10k
X7R
5% 5% R123
0402
0402 0402 10k/NC
DNI
COMMON COMMON
THERM_DP GPIO0_NVVDD_PWMVID 5%
GPIO0 BD6 50OHM_NETCLASS1 {30} 0402
OUT
BB5 GPIO1_GC6_FB_EN
GPIO1 50OHM_NETCLASS1 OUT {29,36} COMMON
2 BD1 GPIO2_CG6_GPU_EVENT* 2
GPIO2 50OHM_NETCLASS1 OUT {36}
BE4 SNN_GPIO3_NVVDDS_PWMVID NV3V3 NV3V3 NV3V3 12V_F 12V_PEX6_MISC
GPIO3 50OHM_NETCLASS1
BE1 GPIO4_GC6_1V8_MAIN_EN
GPIO4 50OHM_NETCLASS1 OUT {26,35}
BG2 GPIO5_FRAME_LOCK_INT
GPIO5 50OHM_NETCLASS1
BD2 GPIO6_NVVDD_PSI* R595 R593 D505 R549 R516
GPIO6 50OHM_NETCLASS1 {30,34} GND
10k 1.5k 0ohm/NC 0ohm

3
OUT
BD7 SNN_GPIO7_SLI_LED_DIM
GPIO7 50OHM_NETCLASS1
5% 5%
@discrete.d_3pin_cc(sym_2):page24_i301
0.05 ohm 0.05 ohm
BK24 BH4 GPIO8_FBVDD_SEL 30V
JTAG_TCK GPIO8 IN {29} 0402 0402 0.2A 0805 0805
BL23 BJ3 GPIO9_THERM_ALERT*
JTAG_TMS GPIO9 50OHM_NETCLASS1 COMMON COMMON
SOT23
COMMON COMMON
BM23 JTAG_TDI GPIO10 BD3

2
COMMON
BM24 BH3 GPIO11_LOGO_LED_POWER_BRAKE
JTAG_TDO GPIO11 IN {24,34}
BL24 BE6 GPIO12_LOW_PERF* GPIO16_FAN_PWM 1 J12
JTAG_TRST GPIO12 IN {34}
JTAG_TRST* BB1 GPIO13_FAN_TACH 2 @electro_mechanic.hdr_1x4(sym_1):page24_i307
GPIO13 MALE
BG4 GPIO14_IFPA_HPD 12V_FAN 3
GPIO14 50OHM_NETCLASS1 IN {18} 2.0MM
BG1 SNN_GPIO15_SYS_PEX_RST_MON* 4 VERTICAL
GPIO15
BK23 BE2 C1392 C232 C231 NORM
NVJTAG_SEL GPIO16 1000pF 0.1uF 1uF COMMON
BH1 GPIO17_IFPD_HPD
GPIO17 50OHM_NETCLASS1 IN {22}
BE3 R592 16V 16V 16V
GPIO18 10k/NC 10% 10% 10%
R705 BD4 GPIO19_NVAPI
10k GPIO19 GPIO19_NVAPI {30} 5%
X5R X7R X5R
GPIO20 BE5 SNN_GPIO20_NVVDDS_PSI
0402
0603 0402 0603
5% GPIO21_RASTER_SYNC0
0402 GPIO21 BA5 50OHM_NETCLASS1 DNI COMMON COMMON COMMON
BB6 GPIO22_SWAPRDY_IN
COMMON GPIO22 50OHM_NETCLASS1
BG3 GPIO23_RASTER_SYNC1
GPIO23 50OHM_NETCLASS1
GPIO24 BD5
BB2 GPIO25_DYN_BAL1
GPIO25 OUT {32}
BE7 SNN_GPIO26_DYN_BAL2
GPIO26 GND
BA4 GPIO27_IFPC_HPD
GPIO27 50OHM_NETCLASS1 OUT {21}
BB4 GPIO28_OC_WARN
GPIO28 OUT {33}
BA3 SNN_GPIO29_GPU_PEX_RST_HOLD*
GND GPIO29
BB3 GPIO30_SWAPRDY_OUT
GPIO30 50OHM_NETCLASS1
GPIO31_RFU BA2 SNN_GPIO31 1V8_AON
3 BA1 SNN_GPIO32 3
GPIO32_RFU
R928 R118
10k/NC 2.2k
5% 5% R117 R630 R25 R114
0402 0402 1k/NC 100k/NC 100k/NC 100k/NC
DNI COMMON
5% 5% 5% 5%
1G1D1S 3 0402 0402 0402 0402
D Q25 COMMON COMMON COMMON COMMON
Q25_GATE

@discrete.q_fet_n_enh(sym_2):page24_i707
SOT23_1G1D1S
1G COMMON
S 2 20V
C1194 6.5A
22mohm@10V / 22mohm@4.5V / 22mohm@2.5V
0.1uF/NC 6.5A
1.4W
16V 8V

10%
X7R
0402
DNI

GND 3V3_F

R22
10k/NC
5%
0402
DNI

4 R43 0ohm/NC POWER_BRAKE_R* 4


04020.05 ohm DNI
NV3V3

5
U1
1 @logic.u_and_2in(sym_1):page24_i821
4 R44 0ohm/NC GPIO11_LOGO_LED_POWER_BRAKE
POWER_BRAKE*
OUT {24,34}
{3} 2 SC70-5 04020.05 ohm DNI
IN
DNI

3
U_AND_2IN/NC
GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
MISC1: Fan, Thermal, JTAG, GPIO,STEREO
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL MISC1: Fan, Thermal, JTAG, GPIO,STEREO P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 24 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page25: MISC2: ROM, XTAL, Straps


GROUP0 GROUP1 GROUP2
STRAP2 STRAP1 STRAP0 RAMCFG[4:0] 1V8_AON
1V8_AON 1V8_AON

L L L 00000

L L H 00001 R95 R99 R98


R91 R93 R94 R752 R726 R747 100k 100k/NC 100k/NC
100k/NC 100k/NC 100k/NC 100k/NC 100k/NC 100k/NC 1% 1% 1%
1 1
0402 0402 0402
L H L 00010 1%
0402
1%
0402
1%
0402
1%
0402
1%
0402
1%
0402 COMMON DNI DNI
COMMON COMMON COMMON DNI DNI DNI
STRAP3
L H H 00011 STRAP0 ROM_SI

STRAP4
H H L 00110 STRAP1 ROM_SO

STRAP5
H H H 00111 STRAP2 ROM_SCLK

L L M 01000 R84 R85 R86 R761 R732 R742 R87 R88 R89
100k 100k 100k 100k 100k 100k 100k/NC 100k 100k
1% 1% 1% 1% 1% 1% 1% 1% 1%
0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON DNI COMMON COMMON

ROM_SO ROM_SI ROM_SCLK SOR_EXPOSED[3:0] 1:ENABLE 0:DISABLE

L L L 1111 DEFAULT SOR0/1/2/3 ENABLE


GND GND GND
L L H 1110

L H L 1101
2 2
L H H 1100
CFG[3:0] Config Width Vendor 1V8_AON 1V8_AON
H L L 1011
0000 256Mx32 256-bit Samsung
G1V
H L H 1010 U511
0001 256Mx32 256-bit Micron BGA2152
R728 @memory.u_mem_fl_ser_512kx8(sym_1):page25_i260
10k SO_8
COMMON
COMMON
H H L 1001 0010 256Mx32 256-bit Hynix 15/23 MISC 2
5%
0402
7 HOLD* VCC 8
COMMON 3 WP*/NC
0011 Reserved BJ4 ROM_CS* R740 82ohm ROM_CS_R* 1 C968
ROM_CS CS*
H H H 1000 0402 1% COMMON
0.1uF
0100 Reserved ROM_SI BK2 ROM_SI R753 82ohm ROM_SI_R 5 16V
DIO 10%
BK4 ROM_SO 0402 1% COMMON 2
ROM_SO DO X7R
L L M 0111 0101 Reserved STRAP0 BL3 STRAP0 ROM_SCLK BK3 ROM_SCLK R741 82ohm ROM_SCLK_R 6
CLK GND 4 0402
STRAP1 BL4 0402 1% COMMON COMMON
STRAP1
0110 Reserved STRAP2 BM4 STRAP2
L M L 0110 STRAP3 BM5 STRAP3
0111 Reserved STRAP4 BK5 STRAP4
STRAP5 BJ5 STRAP5
L M H 0101 GND

L H M 0100 BUFRST BF9 SNN_GPU_BUFRST*

H L M 0011
3 3
H M L 0010

H M H 0001

G1W
H H M 0000 @digital.u_gpu_gb4_256(sym_14):page25_i206
1V8 1V8_GPC_DP_VID_PLL BGA2152
OUT {18,19,21} COMMON
LB501 30ohm 14/23 XTAL/PLL
BEAD_0603 COMMON
STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE C871 C874 C862 C852 BD12 SP_PLLVDD
4.7uF 22uF 0.1uF 0.1uF
6.3V 6.3V 16V 16V
BC12 VID_PLLVDD
M H H 1 1 1 1 20%
X6S
20%
X6S
10%
X7R
10%
X7R
0603 0805LP 0402 0402
COMMON COMMON COMMON COMMON
M H L 1 1 1 0

M L H 1 1 0 1 GND GND

M L L 1 1 0 0 C876 C845 C730 C673 U42 GPCPLL_AVDD0


0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V
AF11 GPCPLL_AVDD1
L H M 1 0 1 1 10%
X7R
10%
X7R
10%
X7R
10%
X7R
0402 0402 0402 0402 BB24 XS_PLLVDD
COMMON COMMON COMMON COMMON
4 L M H 1 0 1 0 4

L M L 1 0 0 1 GND

1V8_AON
L L M 1 0 0 0 1V8_AON

R104 10k BJ6 BK6 XTALOUTBUFF R658 49.9k


XTALSSIN XTALOUTBUFF
H H H 0 1 1 1 0402 5% COMMON 0402 1% COMMON
BL6 XTALIN XTALOUT BM6
H H L 0 1 1 0 R661
49.9k
Y1 1%
0402
H L H 0 1 0 1 @clocks.xtal_4pin(sym_2):page25_i165
COMMON
R108
27MHz 50OHM_NETCLASS1
10k/NC
50OHM_NETCLASS1 COMMON
H L L 0 1 0 0 5%
0402
R105
10k/NC XTALIN XTALOUT
COMMON 1 3
FL_REFCLK_T 5%
0402
4 2 GND XTALOUTBUFF
L H H 0 0 1 1 C127
COMMON
18pF/NC C131 C141
XTAL_SMD_4_032X025
50V 27pF 27pF
L H L 0 0 1 0 5%
C0G
50V
5%
co-layout
Y2
INS16844911
50V
5%
1.8V 0.9V 0V

0402 C0G C0G 66% PWM 33% PWM DISABLED (100%)


SMD_32X25
COMMON 0402 27MHz 0402
L L H 0 0 0 1 DEFAULT COMMON COMMON COMMON

1 3
5 L L L 0 0 0 0 GND GND GND 4 2 GND 5

XTAL_4P_S
1:SMB_ALT_ADDR ENABLE 1:PCIE_CFG LOW POWER
H=High :Tied to 1.8V
0:SMB_ALT_ADDR DISABLE 0:PCIE_CFG HIGH POWER Galaxy Microsystems (HK) Ltd.
M=Middle:Tied to 0.9V Page Name:
L=Low :Tied to 0V 1:DEVID_SEL REBRAND 1:VGA_DEVICE ENABLE
GND GND MISC2: ROM, XTAL,STRAPS
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
0:DEVID_SEL ORIGNAL 0:VGA_DEVICE DISABLE Custom Carson V10
PAGE DETAIL MISC2: ROM, XTAL,STRAPS P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 25 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page26: PS: 1V8 PLL, 1V8_AON

12V 5V
12V_F 5V

R709 R689
1v8 Switcher
1 1
0ohm 0ohm/NC
0.05 ohm 0.05 ohm

R0805 R0805 U508


@power_supply.u_swreg_aoz1237(sym_1):page26_i38
0.8V
C929
1uF
16V
10%
VIN 8 1V8_VIN
X6S
1V8_HV_AIN 7 AIN VIN 9
0402
VIN 22
R686 24 C126 C931 C957
0ohm/NC VIN 0.1uF 10uF 10uF
GND
1V8_HV_VCC 21
0.05 ohm VCC 16V 16V 16V
TON 6 PS_1V8_HV_TON R680 130k
10% 10% 10%
1% X7R X6S X6S
R675 0402 PS_1V8_HV_BSTR R96 0ohm
0402 10k 0402 0805 0805
20 PS_1V8_HV_BST R669 0ohm C909 0.1uF
BST 0.05 ohm
1%
0.05 ohm 16V 0603
C905 0402 10% R101 0ohm
R668 1uF 1V8_HV_PGOOD X7R
0402
1 PGOOD 0402 0.05 ohm
4.99k 6.3V
GND 0603
1% 10% R667 R100 0ohm
X6S 10k
0402 SW 10 0.05 ohm
1% R673 10k/NC 1V8_HV_PFM
0402
3 PFM* SW 11 0603
5% 16 1V8_AON R97 0ohm 1V8
SW 0.300
GND 0402
0402 SW 17 130-0633-000 0.05 ohm
SW 18 1.8V 0603
2 PS_1V8_AON_PGOOD R666 0ohm
SW 25 PS_1V8_PHASE L501 1uH 0.300 5A 1.8V 3.0A 0.400 2
OUT {26,28}
0.05 ohm GND GND
0402 1V8_HV_EN 2 C908 IND_NONRKO_SMD_054X057 C122 C858 C914
EN 1nF C924 C121 C926 C925 10uF 22uF
22uF 22uF 22uF 22uF 330uF/NC
R1264 and R500 Can be pad Overlaped to save space 16V R110 49.9k PS_1V8_HV_RJ C130 2.2nF 6.3V 6.3V

@discrete.q_fet_n_enh(sym_5):page26_i100
10% 6.3V 6.3V 6.3V 6.3V 10% 20%
FB 5 X7R 1% 16V
20% 20% 20% 20% 20% X7R X6S
R0402 10%
X6S X6S X6S X6S 2V@105degC
R0402 C128 X7R 0805
1V8_HV_SS 23 AL-Polymer

130V
SS

PS_1V8_HV_SNUB
100pF R0402 0805 0805 0805 0805

2
3
3A@105degC,100KHz
036-0131-000
R660 50V 0.009ohm

Q517
CAP_SMD_7343 0805
C906 1ohm 1% C129 680pF
PGND 12

S
C0G LFPAK
2.2nF 5%
PGND 13 R0402
50V GND
PS_1V8_AON_EN R670 0ohm 16V 10%
4 14

4G
7,28,29,35} IN 10% AGND PGND X7R
0.05 ohm X7R PGND 15 1206 R0402
CO-PLACE CAPS GND
0402
0402 PGND 19
C915 R112 12.7k
0.1uF/NC
QFN023Q_P050_0040_T028X011_T028X014 1%
16V PS_1V8_HV_FB_SENSE R113 100ohm/NC
GND R0402 1V8
10%
X7R 5%
PS_1V8_HV_FB R0402
0402 GND
R624 0ohm
Q_FET_N_ENH/NC
GND 0.05 ohm MULTI_SMD_DFN08_SON08
R677 R0402
GND
10k
1%

R0402

12V_F
GND
3 3

R92 R90
10k/NC 2k/NC
5% 1%

0402 1G1D1S 30603 PS_1V8_MAIN_FET_RC


D Q24
@discrete.q_fet_n_enh(sym_2):page26_i90
PS_1V8_MAIN_FET_Q 1G
S 2
3 C117 R102
1G1D1S
12V D Q6 0.1uF/NC 2k/NC
Q_FET_N_ENH/NC
12V_PEX6_MISC @discrete.q_fet_n_enh(sym_2):page26_i88 C120 50V 1%
12V_F SOT323
1nF/NC 10%
GPIO4_GC6_1V8_MAIN_EN
{24,35} 1G X7R
IN 50V
S 2 0603 0402
C14 10%
20V X7R
R694 R695 0.1uF/NC 6.5A
22mohm@10V / 22mohm@4.5V / 22mohm@2.5V
0ohm 0ohm/NC 25V 6.5A
0402
1.4W
0.05 ohm 0.05 ohm 10% 8V
X7R
Q_FET_N_ENH/NC
0603 SOT23
R0805 R0805

GND GND

C116 C928
0.1uF/NC 22uF/NC
16V 16V
U509
10% 20%
X7R X6S @power_supply.u_swreg_sot23_8hv(sym_1):page26_i115
4 0.807V/NC 4
0402 0805

1V8_VIN 2 VIN 5 PS_1V8_SW_BOOT R696 20ohm/NC PS_1V8_SW_BOOT_R


GND GND BOOT
C927
5%
R708 0ohm/NC PS_1V8_EN 0.1uF/NC
6 EN/FSYNC R0402
16V
C115 10%
0.05 ohm X7R
0.1uF/NC PS_1V8_SW_VCC PS_1V8_PHASE
0402 7 VCC SW 3 0.300 R0402
16V
10% C933 R707
5V 3.3V X7R 1V8_AON
0.1uF/NC 49.9k/NC PS_1V8_SW_ISET
5V 3V3_F 0402
1 MOD/PG
16V 1% C930 15pF/NC
10%
X7R 4 GND FB 8 PS_1V8_SW_FB R688 33.2k/NC 50V PS_1V8_SW_FB_R1 R681 0ohm/NC
1% 5% 0.05 ohm
GND 0402 0402
R682 R692 SOT23_8 R0402
C0G
R0402
10k/NC 10k/NC R0402
1V8
5% 5% PS_1V8_SW_FB_R2 R687 40.2k/NC
GND
R683
1%
100k/NC R623 0ohm/NC
R0402
0402 0402 1% R706
0.05 ohm
31.6k/NC
R0402
1%
0402
PS_1V8_AON_PGOOD R684 0ohm/NC
OUT {26,28}
R0402
0.05 ohm
0402 GND
GND
C515 GC6 POWER SEQUENCE
1nF/NC
50V
5 STUFF R500 WITH 1K 5
10%
X7R
0402

Galaxy Microsystems (HK) Ltd.


GND
Page Name:
PS: 1V8_PLL, 1V8_AON
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL PS: 1V8_PLL, 1V8_AON P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 26 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page27: PS: 5V SWITCHER,PEX VDD PEX_VDD DISCHARGE


3V3_F 12V_F
PEX_VDD

D4

1
@discrete.d_3pin_cc(sym_3):page27_i195
30V R657 R654 R656
0.2A 5.1ohm 5.1ohm 5.1ohm
5% 5% 5%

3
PEX PLL Switcher 5V
0.100 C872 10uF SOT23
PS_PEX_DSH_DR
R0805 R0805 R0805

3V3_F 16V
1 20%
D 7 1
X6S R633 6 PS_PEX_DSCH_QR
2k
R0805 5
5%
3V3_F 12V_PEX6_MISC GND 2
R82 R81 1
1G5D2S
0ohm 0ohm/NC R111 Q516
0.05 ohm 0.05 ohm R80 R83 10k R0603
@discrete.q_fet_n_enh(sym_19):page27_i217
0ohm 0ohm/NC 5%
PS_PEXVDD_EN R781 0ohm PS_PEX_DSH_QC 3
0.05 ohm 0.05 ohm {27,35} IN
3 4
R0805 R0805 0.05 ohm 1G1D1S
D Q515 8 30V
nv_cap 0402 R0402 9A
C917 @discrete.q_fet_n_enh(sym_2):page27_i191 C878 S 12mohm@10V / 17.5mohm@4.5V / 0mohm@2.5V
27A
10uF/NC C113 R674 R0805 R0805 10uF/NC
12V_PEX_VIN
0.400 1G 1.7W
20V
16V 4.7uF 10k/NC 16V
20%
S 2 20%
DFET_SMD_020X020_B
6.3V 5% C114 C119 C118 R676
X5R 30V X6S
10% 0.1uF 10uF 10uF 10k/NC 0.3A
X6S 1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V GND
16V 6.3V 6.3V 1% 1.2A
0.2W
0603 0402 10% 10% 10% 12V R0805
U5 X7R X7R X7R
0805 24,24,34 PS_1V8_AON_PGOOD R786 0ohm SOT323
@power_supply.u_openvreg_type0(sym_1):page27_i139 0402 IN
0.05 ohm
GND GND 0.6V
0402 0805 0805 R0402
GND
GND GND
PEX_OVREG_PGOOD 9 PGOOD VIN 3
{29} OUT
OpenVReg GND
PS_PEXVDD_EN R107 0ohm PEX_OVREG_EN 10
IN {27,35} EN/FS
0.05 ohm 8 PEX_OVREG_BOOT C125 10nF/NC
BOOT/NC nv_ind
R0402 C124 16V L44 1uH/NC
0.1uF PEX_OVREG_VCC 10%
2 VCC PEX_VDD
16V X7R
SW 6 IND_NONRKO_SMD_050X050_C 2.7A
10%
X7R SW 7 PEX_OVREG_SW 0.1000402 LB9 1uH 0.400
2 GND 4 2
PEX_OVREG_FB 1 5 IND_NONRKO_SMD_054X057
FB GND
0402
11 C885 C140 C136 C894
THERM 22uF 0.1uF 22uF 22uF/NC
DFN10_P050_030X030_T027X018_VIAS R671 6.3V 16V 6.3V 6.3V
GND STUFF R327 FOR LOCAL SENSE
0ohm/NC 20% 10% 20% 20%
X6S X7R X6S X6S
0.05 ohm
CCP
RCP GND
C123 1nF PEX_OVREG_FB_RC R109 0ohm 0805 0402 0805 0805
0402
16V 0.05 ohm
10% R0402
X7R
PEX_VDD GND

R0402 1%
R106 6.81k PEX_FB_SENSE R642 0ohm
0.05 ohm
R0402 R0402
R103 Vout = Vref * (1+Rtop/Rbot) Place R591 by the GPU
R2 R1
10k
1% 0.9993 = 0.8 * (1+7.5K/30.1K)

R0402

GND

3 3

12V_F 12V_PEX6_MISC

R860 R856
Place 150W 0ohm/NC 0ohm
0.05 ohm 0.05 ohm Place 120W

5V Switcher R0805 R0805


PS_5V_VIN
3V3_F
C1012 C1022
0.1uF 22uF
U520
16V 16V
@power_supply.u_swreg_sot23_8hv(sym_1):page27_i162
10% 20%
X7R X6S 0.807V
R828 PS_5V_SW_BOOT R810 20ohm PS_5V_SW_BOOT_R
1k
5%
5% 0402 0805
2 VIN 5 0402 C1013
BOOT 0.1uF DDC_5V
U513
GND GND 5V
R0402
PS_5V_EN 6 EN/FSYNC
16V @power_supply.u_power_sw(sym_7):page27_i211
10%
X7R
C1040
0.1uF PS_5V_SW_VCC PS_5V_SW_PHASE L502 4.7uH
7 VCC SW 3 5V 5 IN OUT 1 0.400 5V 0.2A
16V 0402
0.508
10% C1038 R815
X7R 0.300 IND_NONRKO_SMD_054X057 DDC_5V_SW_ENABLE1

3.3V 0.1uF 49.9k/NC R783 0ohm


STUFF IF USING MP1494SGJ 1 MOD/PG 4 EN
16V 1% C1015 C1009
5V 3V3_F 0.05 ohm
0402 10%
PS_5V_SW_FB R846 10.2k PS_5V_SW_FB_R R779 C983 C982 C984 R778 C1004 10uF 10uF
4 X7R 4 GND FB 8 0402 4
0ohm 22uF 22uF 0.1uF 0ohm/NC 220pF
GND 0402 1% 2 GND OC* 3 SNN_DDC_5V_OC 6.3V 6.3V
R793 R814 6.3V 6.3V 16V 0.05 ohm 50V 10% 10%
SOT23_8 0402 X7R X7R
4.99k 10k/NC 0402 20% 20% 10% 5%
X6S X6S X7R C0G
1% 5%
GND 0.05 ohm SOT23_5
R808 0402 0805 0805
0402 GND
100k/NC C1024 15pF 0805 0805 0402 0402
0402 0402
PS_1V8_AON_EN R794 0ohm PS_5V_SW_ISET 1%
50V
OUT {26,28,29,35} 5%
C0G
0.05 ohm 0402
R800 0402
R0402 GND GND
10k/NC
5% R827 40.2k PS_5V_DDC_R

GND 1%
R850 R0402
0402 7.5k
1%

GND
R0402

GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: 5V, PEX_VDD
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL PS: 5V, PEX_VDD P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 27 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page 28:PS: NV3V3, NV12V

1 1
12V_F

C184
0.1uF
16V
10%
R129
10k
5%
NV12V
X7R
12V
1.25W
S -12A
0402 0402 -1000mohm@10V / 100mohm@4.5V / 135mohm@2.5V
G 2 -3A
-20V
1G1D1S 3 R130 10k PS_PG_IOVDD_Q* 1 3V3_F
D Q31 5% D NV12V
@discrete.q_fet_n_enh(sym_2):page28_i12
0402 @discrete.q_fet_p_enh(sym_2):page28_i30 3V3_PROT
1V8_MAIN_PGOOD R138 0ohm/NC PS_PG_IOVDD_R2 1G 3Q29
{35} IN
1G1D1S
0.05 ohm S 2 1G1D1S 3
0402 SOT23 D Q28
30V
0.3A
1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
@discrete.q_fet_n_enh(sym_2):page28_i41 0.200 3.3V
1.2A
0.2W 0.200 12V
R128 100ohm PS_PG_NV12V_Q3 1G
C205 12V
S 2
5% 60V
SOT323
0.1uF/NC C182 0.3A
GND 0805 2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
16V 0.1uF 0.8A C608
0.35W
10% 16V R598 0.1uF
X7R 20V
10% 100ohm 16V
X7R
SOT23
5% 10%
X7R
0402
0402
GND 0603
2 PS_PG_NV12V_Q5 0402 2
GND
GND
1G1D1S 3
D Q30B 6
1G1D1S
@discrete.q_fet_n_enh(sym_2):page28_i39 D Q30A
PS_PG_IOVDD* 5G @discrete.q_fet_n_enh(sym_2):page28_i49
S 4 2G
C185 S 1
60V
0.1uF/NC 0.115A
-1000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V 60V
16V 0.5A 0.115A R597
0.225W -1000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
R137 10% 20V 0.5A 0ohm
X7R 0.225W
0ohm SC70_6
DISCHARGE 20V 0.05 ohm
0.05 ohm SC70_6
0402
GND R0603
0402 GND GND

12V_F
12V_F 3V3_F

R548 0ohm
R517
10k/NC
NV3V3
NV3V3
R522 5%
3
0.05 ohm 1G1D1S
10k/NC D
0402 Q504
5%
3 @discrete.q_fet_n_enh(sym_2):page28_i23 3.3V 3
0402
3V3_F 1G1D1S 6 PS_NV3V3_Q2 1G
D Q501A S 2
0402 60V 0.200
0.3A
@discrete.q_fet_n_enh(sym_2):page28_i16 2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V

3 2G C502 0.8A
1G1D1S 0.35W
0.1uF/NC
5

U503 D Q506 S 1 20V

PS_1V8_AON_PGOOD 1 @discrete.q_fet_n_enh(sym_2):page28_i13
16V Q_FET_N_ENH/NC
{26} IN
PS_NV3V3_R1
60V
10% SOT23
4 1G 0.115A
-1000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V X7R
0.5A
PS_1V8_AON_EN 2 S 2
IN {26,27,29,35} 0.225W
20V
30V
0.3A Q_FET_N_ENH/NC 0402
@logic.u_and_2in(sym_1):page28_i4 1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
3

1.2A SC70_6 C509


0.2W GND GND
12V 0.1uF
U_AND_2IN/NC Q_FET_N_ENH/NC 16V
SOT323 R538 R537 10%
SC70_5 X7R
100ohm/NC 100ohm/NC
GND
5% 5%
0402
GND
0603 0603 0.100
DISCHARGE PS_NV3V3_Q4
1G1D1S 3 GND
D Q501B
@discrete.q_fet_n_enh(sym_2):page28_i20
PS_NV3V3_Q1 5G
S 4
C503
60V
0.1uF/NC 0.115A
-1000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V
16V 0.5A
0.225W
10% 20V
X7R
Q_FET_N_ENH/NC
4 SC70_6 4
GND
0402

GND

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: NV3V3, NV12V
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL PS: NV3V3, NV12V P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 28 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page29: PS: FBVDDQ FBVDD


FBVDD

NETNAME MAX_CURRENT MIN_LINE_WIDTH VOLTAGE

FBVDD/Q Enable
3V3_SEQ FBVDD DISCHARGE
GDDR5X ONLY 12V_PEX6_MISC FBVDD
3V3_F
R507 0ohm 3V3_SEQ 3V3_F 12V_F
0402 DNI
C512
R511 0ohm/NC 0.1uF/NC
NV3V3 3V3_SEQ 3V3_SEQ
1 0402 DNI
16V R1060 D504 1
10k

1
10% R563 R565 R564 R562
X7R 12V_F @discrete.d_3pin_cc(sym_3):page29_i628
15ohm/NC 15ohm/NC 15ohm/NC 15ohm/NC

5
U501 C501 5% 30V
0402
0.1uF/NC 0402 0.2A 1% 1% 1% 1%
DNI PS_1V8_AON_EN 1 @logic.u_and_2in(sym_1):page29_i635 COMMON
{26,27,28,35} IN 16V R523 SOT23 0805 0805 0805 0805
4 COMMON COMMON COMMON COMMON

3
10% 10k/NC COMMON
3V3_F GND
R559 0ohm 2 SC70-5 X7R 5%
NV3V3 04020.05 ohm COMMON 0402 PS_FBVDD_D
DNI 0402
DNI 3 PS_FBVDD_EN_IN C219 10uF/NC PS_FBVDD_Q_R
COMMON 1B1C1E {29}

3
R560 C OUT
Q505B 0805LP 16V
10k/NC PS_FBVDD_EN* B5 20% D_3PIN_CC/NC
R515 3V3_SEQ GND @discrete.q_npn(sym_1):page29_i574
D 7
10k 5% SOT363 X6S R556
0402
U_AND_2IN/NC COMMON COMMON
6
5% 2k/NC
0402 COMMON GND E 4 5

5
5%
COMMON GND 0603
2
PEX_OVREG_PGOOD R505 0ohm 6 C513 1
{27} 1B1C1E COMMON 1G5D2S
IN C 10nF
0402 COMMON NVVDD_PGOOD_R_FB 1 Q505A Q511
PS_NVVDD_PGOOD R506 0ohm/NC PS_FBVDD_EN R501 0ohm PS_NVVDD_PGOOD_R B2 16V
4 @discrete.q_npn(sym_1):page29_i580 @discrete.q_fet_n_enh(sym_19):page29_i637
{30,35} IN SOT363 10% DFN06
0402 DNI 2 U505
04020.05 ohm COMMON
COMMON X7R
PS_FBVDD_DIS 3 COMMON
R508 C504 E 1 3 4
0402 1G1D1S 30V
@logic.u_or_2in(sym_1):page29_i597 5.11k 0.1uF D 9A
COMMON
GND Q510 8 12mohm@10V / 17.5mohm@4.5V / 0mohm@2.5V
SC70 1% 16V
@discrete.q_fet_n_enh(sym_2):page29_i626 C518 S 27A
1.7W

3
0402 10% SOT23_1G1D1S 10uF/NC
DNI
GPIO1_GC6_FB_EN
COMMON
PS_FBVDD_EN_IN 1G COMMON
20V

{24,36} IN X7R {29} IN 16V Q_FET_N_ENH/NC


0402 GND S 2 20%
U_OR_2IN/NC COMMON 60V X6S
0.3A
GND 2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V 0805LP
0.8A
COMMON
GND GND GND 0.35W GND
20V

Q_FET_N_ENH/NC

GND GND
2 2
APW7120
FP6326
NCP1579

12V_F
12V_F

D33

2
12V_F IN4148/NC
SM_SOD123
75VR C28 C82 C81 C86 C996 C995 C79 C80 C993 C994
300MA@25C 0.1uF 1uF 10uF 1uF 1uF 10uF 1uF 10uF 10uF
270uF

1
R147 ns 25V 16V 16V 16V 16V 16V 16V 16V 16V
0 COMMON 10% 10% 20% 10% 10% 20% 10% 20% 20%
20% X7R X7R X5R X7R X7R X5R X7R X5R X5R
+0.05R
16V@105.05degC 0603 0603 0603 0603 0603 0603 0603 0603 0603
R0805
COMMON D 5 AL-Polymer COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
Q55 5A@105.05degC,100KHz C0805 C0805 C0805 C0805
0.01ohm
MDU1514 TH_D63P25
R727 0 PS_FBVDDQ_UG_R 4G DFN55X6_1_27MM DIP_ECAPD6_6MM
C246 COMMON
U11 R0603 +0.05R COMMON S 1 30V
1UF UP1542/RT8120A 18.5A@25C
SOP8_1_27MM_EP 2 0.020R@10V, 0.026R@4.5V
16V 32A
COMMON 3 1.5W GND
10% C242 0.1uF/25VR77 20V
X5R PS_FB_VCC12 5 VCC BOOT
1 PS_FBVDDQ_BOOT 0 R0603

C0603 0.4mm C0603 25V +0.05R COMMON


COMMON 10% C247 FBVDD
NV3V3
X7R 1000PF/NS
COMMON 50V
HDRV 2 10%
R685 L32
10k/NC GND 0.4mm X7R 1.5V
3 PHASE 8 C0402 0.500 3
5%
NO STUFF
0.5mm
ns 5 5 0.22uH
D D
3 R68 0 0402 7 Q53 Q54 R731 IND_NONRKO_TH_105X075 C213 C251 C252
1G1D1S PS_FBVDD_EN_IN COMP/EN
D R0402 1ohm
Q587 0.4mm MDU1511 MDU1511 330uF 820UF 820UF
R744 5%
2N7002LT1G 3 GND LDRV 4 PS_FBVDDQ_LG 0 R0603 4G DFN55X6_1_27MM 4G DFN55X6_1_27MM
R1206
SOT23_1G1D1S COMMON COMMON COMMON COMMON COMMON
PS_FBVDD_EN* 1G COMMON 9 GND FB 6 PS_FBVDDQ_FB S 1 30V S 1 30V COMMON 20% 20% 20%
18.5A@25C 18.5A@25C
S 2 2 0.0115R@10V, 0.016R@4.5V 2 0.020R@10V, 0.026R@4.5V 2V@105degC 2.5V 2.5V
74A 32A
60V R145 3 1.25W 3 1.5W
AL-Polymer AP-CON AP-CON
0.3A
0 20V 20V C962 3A@105degC,100KHz 5.6A@105C 5.6A@105C
2000mohm@10V / -1000mohm@4.5V / -1000mohm@2.5V OCP setting
C1391 0.8A R0402 R74 C249 2200PF 0.009ohm 0.007R 0.007R
0.35W SMD_7343 DIP_ECAPD6_6MM
103pF 20V 40.2K 102pF P: 1.4W 50V DIP_ECAPD6_6MM
16V Rocp2 Rocp1 1% 50V 10%
10% R0402 10% X7R
APW7120 FP6326
X7R COMMON X7R C0603 GND
0402 GND GND GND R150 30K/NC
ns C0402 GND GND COMMON
COMMON R0402 5% COMMON ns GND
GND

C248 15pF ns APW8720


GND
C0402 50V RT8120A
C245 5% APW8725A
GND
10nF C0G NCP1579
16V
C244 10% RT8101GSP C627 C597 C535 C708
15pF X7R 10uF 10uF 10uF 10uF
C0402
50V R148 6.3V 6.3V 6.3V 6.3V
COMMON PS_FB_COMP_RC 0 ns
5% 10% 10% 10% 10%
R0402 +0.05R
C0G X5R X5R X5R X5R
C0402 0805 0805 0805 0805
COMMON COMMON COMMON COMMON COMMON
R146
R1686=10K=UPI
7.5K,1%
4 R1686=15K=RT 4
1%
R0402
COMMON

GND
R1
PS_FB_R
R751 14.7k R757 100ohm
0402 1% COMMON 0402 5% COMMON
R743 R0402 R0402
53.6k
GND
1% R745 0ohm C971 15pF
0402
R127 0ohm PS_FBVDD_SENSE
RT8120 1V8_AON COMMON
R739
0402
R0402
COMMON 0402 50V
5%
IN {16}
APW8720 GPIO8_FBVDD_SEL_Q
R0402 16.5k PS_FB_RC C0G
0402
R0402
COMMON

APW8725A 1% R2 COMMON
NCP1579 R746 0402
C0402 STUFF R393 FOR LOCAL SENSE
COMMON
10k/NC
R0402 STUFF R394 FOR REMOTE SENSE
5%
3
0402
COMMON
1G1D1S
D Q523 SAMSUNG
PS_FB_VSEL INS16795502
R0402 Rbot1 GND
R748 0ohm SOT23_1G1D1S
{24}
GPIO8_FBVDD_SEL 1G COMMON
IN
0402 COMMON S 2 GPIO8 LEVEL FBVDDQ OUTPUT VOLTAGE
R969
0.05 ohm 50V

R0402
10k 0.22A

5%
3500mohm@10V / 3500mohm@4.5V / 3500mohm@2.5V
0.22A
0.35W
1.40V = 0.6V * (1+2K/1.5K) 0 1.35V
0402 20V
COMMON
1.60V = 0.6V * (1+2K/1.5K//6.04K)
R0402
1 1.55V
5 GND 5
GND

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: FBVDD
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL PS: FBVDD P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 29 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page30: PS: NVVDD Controller NV3V3 1V8_AON


5V

R1186
2.2
5%
5 4 3 2 1 0603

NVVDD_VCC NVVDD_EN_1 R1182 0 R0402 PS_NVVDD_EN


PS_NVVDD_EN {35}
R1203 R1207 R1202 R221 R222
R223 R1171 R1165 C1328
10K 10K/NC 10K/NC 10K/NC 10K
Initialization voltage: 1.6V 10K
R0402
ns
5%
R0402
ns
5%
R0402
ns
5%
R0402
ns
5%
R0402
ns
10K
R0402
ns
5%
R0402
10K
R0402
ns
4.7UF
6.3V
10%
1 X5R 5V 1
C0603
NVVDD_VID7

NVVDD_VID6 GND
R1200 R639 R1184
10K 10K 10K
5V U506
NVVDD_VID5 5% 5% 5%
UP1633PQAJ 0402 R0402 R0402
QFN6X6_40_0_5

29

14
ns ns ns
NVVDD_VID4
C1333 15nF ns 41

5VCC

EN
NVVDD_VID3 C0402 GND1
NVVDD_VID7 40
NVVDD_VID6 1 VID7

LOAD LINE=IND(DCR)*RES(R1198)/4(PHASE)*CSN(R1110)
NVVDD_VID2 VID6
NVVDD_VID5 2
R1201 NVVDD_VID4 3 VID5 37 R1167 0 R0402
NVVDD_VID1 GND 10K VID4 PWM1 PWM1 {31}
NVVDD_VID3 4
UP1815:R1194=NC
5%
C1322 NC ns R1079 1% NC ns NVVDD_VID2 5 VID3 36 R1168 0 R0402
NVVDD_VID0 0402 PWM2 {31}
R0402 R0402 NVVDD_VID1 6 VID2 PWM2
R0402 NVVDD_VID0 7 VID1 35 R1169 0 R0402
VID0 PWM3 PWM3 {31}
R1108 R653 R655 R662 R664 R663 R651 R1198 2K,1% NVVDD_VRSEL 9
10K 10K 10K 10K 10K 10K 10K VOUT_S UP1815 VRSEL 34 R1170 0 R0402
R1166 R1194 2K,1% ns PWM4 PWM4 {31}
5% 5% 5% 5% 5% 5% 5%
10K
R0402 R0402 R0402 R0402 R0402 R0402 R0402
ns
R0402 16
R0402 C1324 EAP
470PF 15 27
C0402 DAC ISEN1 ISEN1 {31}
R1081 30 26
NVVDD
0 TB ISEN2 ISEN2 {31}
R0402
C1325 682pF R1083 200 R0402
ns R1082 3K ns 31 25
NVVDD_VID7 GND C0402 R0402 VOUT ISEN3 ISEN3 {31}
3

2 Q46 R647 24 2
ISEN4 ISEN4 {31}
2N7002LT1G 100 VOUT_S 17
R0402 FB
{24} GPIO19_NVAPI 1 SOT23
R1180 1K,1% R1084 0 R0402 C0402
{16} GPU_NVVDD_SENSE R640 0 R0402 NVVDD_SENSE_R C1323 100PF 18
0402
COMP 19
C1327 CSP CSP {31}
2

100PF NC
R0402
R1180 更更更 Stuff--V11 R632 6.8K R0402 C1326 222pF C0402
CSN
20
CSN {31}
C1321
R1085
ns 100pF 8
R0402 0 FBRTN
GND R0402
R1195
ns 0
0402
ns C1319 CHANGE 4.7nF
C1319
103pF 11
R1197 0 R0402 C0402 SS
{16} GPU_NVVDD_GND_FBRT_SENSE NVVDD_GND_SENSE_R
22 23 R1185 0 R0402
OFS PS1
R649 C1320 5V 13
100pF 32 PS2 R1172
100 TM 15K/NC
R0402 R0402 39
ns PS3 R0402
R1183 33
VRHOT ns
GND 100K
R0402 10
ns VR_RDY

IMAX

GND

NC
RT
DAC OFFSET

21

28

12

38
NVVDD OFFSET
R1181
40.2K,1% R1196 0 R0402
R0402
3 3
ns
C1329 R1086 R635 R1204
30K/NC
47PF 20K,1% 23.7K,1%
C0402 R0402 R0402 R0402
ns

1V8_AON
NVVDD OCP
20K,NVVDD OCP=370A
R183
10K
5%
R0402
R1206 0 R0402

{29,35} PS_NVVDD_PGOOD
PS_NVVDD_PGOOD

1V8_AON
1.2=20k*Iout*0.65m/1k/4 R1193

--》Iout=1.2*4*1k/20k/0.65=370A(
--》Iout=1.2*4*1k/20k/0.65=370A(常温)
Iout=1.2*4*1k/20k/0.65=370A(常温) 45K/NC
R0402
ns
R636
10K
5%
R0402

R1192 0 0402
{24,34} GPIO6_NVVDD_PSI*

4 4

5V

12V_F
U802
UP1815QMA8
12V_F SOT23_8P
R259 R260 R261
20K 2.2 2.2 UP1815 R1175 0 R0402 5 4 R169 4.32K,1% R1205 6.19K,1% R0402
R0402 R0603 R0603 6 REFOUT REFIN 3
VCTRL GND R0402
ns ns 7 2
R228 8 VCC VREF 1
20k/NC 3 VID REFADJ R168
1G1D1S
0402 D Q579 C1379 16.5K,1%
ns
INS17561805 R165 C1381 1uF/25V R0402
SOT23_1G1D1S
1G1D1S 3 1G COMMON 0 0.1uF C0603 C1378 R1199
D Q577 S 2 R0402 C0402 4.7nF 20.5K,1%
INS17561750 60V
ns R166 C0402 R0402
SOT23_1G1D1S
1G1D1S 3 PS_NVVDD_EN_R 1G COMMON
0.26A
3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V 309
D Q588 S 2 0.31A
0.3W GND R0402
20V
INS17562491 60V GND
SOT23_1G1D1S Q_FET_N_ENH/NC
PS_NVVDD_EN R226 20k/NC ns 0402 1G COMMON
0.26A
3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A ns
S 2 0.3W GND
20V
60V
{24} GPIO0_NVVDD_PWMVID R1163 0 R0402
0.26A Q_FET_N_ENH/NC
3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.31A ns
C1393 0.3W C1377 C1389 GND
5 0.1uF
20V
0.1uF/NC 0.1uF 5
0402 Q_FET_N_ENH/NC
ns
C0402 C0402
ns ns ns

Galaxy Microsystems (HK) Ltd.


GND GND GND GND GND
Page Name:
PS: NVVDD Controller
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL PS: NVVDD Controller P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 30 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
Page31: PS: NVVDD Phase 1-4
12V_F

C250
C233 C243 C964 C974 C975 C955
0.1uF 10uF/16V 10uF/16V 10uF/16V 10uF/16V 10uF/16V 270UF
25V 16V 16V 16V 16V 16V
10% 20% 20% 20% 20% 20% 20%
X7R X5R X5R X5R X5R X5R 16V
0603 0805 0805 0805 0805 0805 AP-CON
COMMON COMMON COMMON COMMON COMMON COMMON 5.23A@105C
0.010R
DIP_ECAPD6_6MM

LFPAK D 5 ALTERNATES
Q57
12V_F 12V_F MDU1514 GND
R736 0 4G DFN55X6_1_27MM
30V

0.760 R0603 0.760 S 1 69A@25C


0.008R@4.5V, 0.0055R@10V
NVVDD
R1111 2 276A
+0.05R 2.14W@25C NVVDD
10K
3 +/-20V

5%
D804 C961 1.1V
R0402
2

BAT54C 0.1uF NVVDD_SW1 1.0V 85A


C1376 30V C0402 0.760 40A L33 0.760
0.1uF
200MA
D802 0.22uH C1143 C1144 C1145 C1155 C1159
C237

1
SOT23
BAT54C 5 5 R729 IND_NONRKO_TH_105X075 C236 22uF/6.3V 22uF/6.3V 22uF/6.3V 22uF/6.3V 22uF/6.3V
C0402 LFPAK D LFPAK D R699 R771 C954
3

30V Q58 Q59 1 1,1% C1387 C951 C952 C953 820UF 6.3V 6.3V 6.3V 6.3V 6.3V
18K,1% 10uF/6.3 10uF/6.3 820UF
200MA 5% 10uF/6.3 10uF/6.3 10uF/6.3 20% 20% 20% 20% 20%
GND SOT23
MDU1511 MDU1511 R1206 1% +0.05R
6.3V 6.3V COMMON
COMMON X5R X5R X5R X5R X5R
6.3V 6.3V 6.3V
4G DFN55X6_1_27MM
30V 4G DFN55X6_1_27MM
30V R0402 R0402
20% 20%
20% 0805 0805 0805 0805 0805

3
20% 20% 20% 20%
S 1 120A@25C
S 1 120A@25C NVVDD_SW1_RC 2.5V COMMON COMMON COMMON COMMON COMMON
0.760 0.004R@4.5V, 0.003R@10V 0.004R@4.5V, 0.003R@10V X5R X5R X5R X5R X5R 2.5V
C253 2 360A
2 360A 0.300 R679 0805 0805 AP-CON
AP-CON
GND 2.22W@25C 2.22W@25C C0805 0805 0805 5.6A@105C
100pF +/-20V +/-20V 5.1K COMMON 5.6A@105C
3 3 COMMON COMMON COMMON
0.007R
C1388 0.1UF 50V 0.007R
NVVDD_BST1 R115 2.2,1% NVVDD_BST1_C C1355 5% DIP_ECAPD6_6MM
5% DIP_ECAPD6_6MM
R0402
R0402 5% 20V
20V 0.760 0.760 C0603 25V
C0G
1000PF GND
10% 25V
C0402 GND GND GND
X7R GND GND GND GND
ns 10%
X7R
R0603
GND GND GND

R238 R1173 0
4.7,1% GND
R0603
5%
+0.05R
R0603

{30} ISEN1
U8 R1177
13

14

15

16

17

4.7,1%
R0603
GND1

PH1

UG1

BOOT1

GND2

12 NVVDD
LG1 1
11 PWM1 PWM1 {30} 12V_PEX6_NVVDD
VCC2 2 R1174 0 R0402
R244 0 R0402 10 ODB1
ODB2 3 C1146 C1157 C1167 C1168 C1169 C1170
9 VCC1 22uF/6.3V 22uF/6.3V 22uF/6.3V 22uF/6.3V 22uF/6.3V 22uF/6.3V
{30} PWM2 PWM2 C241
4 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
GND
UG2

PH2

LG2
BT2

C238 C239 C240 C959 C960 C956 20% 20% 20% 20% 20% 20%
C1330 0.1uF 10uF/16V 10uF/16V 10uF/16V 10uF/16V 10uF/16V 270UF X5R X5R X5R X5R X5R X5R
0.1uF 0805 0805 0805 0805 0805 0805
25V 16V 16V 16V 16V 16V
C1386 uP1951PQDD C0402 20% COMMON COMMON COMMON COMMON COMMON COMMON
8

10% 20% 20% 20% 20% 20%


0.1uF QFN3X3_16_0_5 16V
X7R X5R X5R X5R X5R X5R
C0402 0603 0805 0805 0805 0805 0805 AP-CON
5 COMMON COMMON COMMON COMMON COMMON COMMON 5.23A@105C
LFPAK D 0.010R
Q60 DIP_ECAPD6_6MM GND
MDU1514 ALTERNATES
R770 0 4G DFN55X6_1_27MM
30V

NVVDD_BST2 R78 2.2,1% NVVDD_BST2_C C254 0.1UF R0603 S 1 69A@25C


NVVDD
0.760 0.760 0.008R@4.5V, 0.0055R@10V

R0402 5% 20V
20V C0603 25V
R1112 2 276A
0.760 0.760 +0.05R 2.14W@25C
10K +/-20V
10% 3 GND
X7R 5%
R0402
NVVDD_SW2
40A 0.760 L34
0.22uH C235
R1189 0 5 5 R735 IND_NONRKO_TH_105X075 C1382 C947 C948 C949 C950
LFPAK D LFPAK D 1 10uF/6.3 10uF/6.3 10uF/6.3 820UF
R0603 Q61 Q62 22uF/6.3V 10uF/6.3
5% R1187 6.3V 6.3V 6.3V 6.3V 6.3V COMMON
+0.05R MDU1511 MDU1511 R1206 1,1% 20% 20% 20% 20% 12V_PEX6_NVVDD
20%
NVVDD_DRVL2 4G DFN55X6_1_27MM
30V 4G DFN55X6_1_27MM
30V R700 X5R X5R X5R
20%
X5R 2.5V
+0.05R X5R
0.760 S 1 120A@25C
0.004R@4.5V, 0.003R@10V
S 1 120A@25C
0.004R@4.5V, 0.003R@10V
18K,1%
R0402
C0805 0805 0805 0805 0805 AP-CON
C255 360A 360A R693
2 2.22W@25C 2 2.22W@25C 1% COMMON COMMON COMMON COMMON 5.6A@105C
100pF +/-20V +/-20V 5.1K 0.007R
3 3 0.300
R0402
DIP_ECAPD6_6MM
50V 5%
NVVDD_SW2_RC
5% R0402
C0G
C963
C0402 GND GND GND
ns 1000PF GND GND GND C257 C256 C976 C999 C1017 C1025 C1027 C1026
12V_F C258
25V 0.1uF 10uF/16V 10uF/16V 10uF/16V 10uF/16V 10uF/16V 10uF/16V 10uF/16V 0.1uF
10%
25V 16V 16V 16V 16V 16V 16V 16V 25V
GND GND GND X7R
10% 20% 20% 20% 20% 20% 20% 20% 10%
R0603
X7R X5R X5R X5R X5R X5R X5R X5R X7R
0603 0805 0805 0805 0805 0805 0805 0805 0603
D805 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
2

BAT54C
C1375 30V GND
200MA
0.1uF SOT23
C0402
3

{30} ISEN2
GND

GND

12V_PEX6_NVVDD
NVVDD_BST3_C
R79 2.2,1% C268 0.1UF
20V 0.760 R0402 5% 20V 0.760 C0603 25V
10% C266
X7R C1357 C1360 C1361 C1362 C1358
0.1uF 10uF/16V 10uF/16V 10uF/16V 10uF/16V 270UF
12V_F
25V 16V 16V 16V 16V
10% 20% 20% 20% 20% 20%
X7R X5R X5R X5R X5R 16V
0603 0805 0805 0805 0805 AP-CON
COMMON COMMON COMMON COMMON COMMON 5.23A@105C
0.010R
LFPAK D 5 DIP_ECAPD6_6MM
Q63
MDU1514
NVVDD_DRVH3_R3 R777 0 NVVDD_DRVH3_R 4G DFN55X6_1_27MM ALTERNATES

0.760 R0603 0.760 S 1 30V


R1190 0 R1113 2 69A@25C
NVVDD_DRVL3_R +0.05R 0.008R@4.5V, 0.0055R@10V
D803 10K 276A NVVDD
R0603 3 2.14W@25C GND
2

BAT54C R772 5% +/-20V


+0.05R
30V
4.7,1% R0402

200MA 5%
R1191 0.760 40A L35
SOT23 R0603
C1332 NVVDD_SW3 0.22uH C264
4.7,1%
3

5 5 R773 IND_NONRKO_TH_105X075 C1385 C989 C990 C991 C992


0.1uF U9 R0603 LFPAK D LFPAK D 820UF
Q64 Q65 1 R780 10uF/6.3 10uF/6.3 10uF/6.3 10uF/6.3 10uF/6.3
C0402
13

14

15

16

17

5% 1,1% 6.3V 6.3V 6.3V 6.3V 6.3V COMMON


MDU1511 MDU1511 R1206 20% 20%
+0.05R 20% 20% 20%
NVVDD_DRVL3 4G DFN55X6_1_27MM 4G DFN55X6_1_27MM 20%
2.5V
GND1

PH1

UG1

BOOT1

GND2

R0402 X5R X5R X5R X5R X5R


12 0.760 S 1 S 1 C0805 0805 0805 0805 0805 AP-CON
LG1 1 C1374 2 30V
2 30V
COMMON 5.6A@105C
GND 120A@25C 120A@25C R697 R701 COMMON COMMON COMMON
11 PWM1 PWM3 {30} 100pF
3 0.004R@4.5V, 0.003R@10V
3 0.004R@4.5V, 0.003R@10V
5.1K
039-0135-000
0.007R
360A 360A 0.300 18K,1% DIP_ECAPD6_6MM
VCC2 2 R245 0 R0402
50V 2.22W@25C 2.22W@25C
NVVDD_SW3_RC 5%
+/-20V +/-20V 1%
R254 0 R0402 10 ODB1 5%
R0402 R0402 GND GND GND GND GND
C0G GND
ODB2 3 C0402
C1371
VCC1 ns 1000PF
9
{30} PWM4 PWM2 25V
4 GND
GND
UG2

PH2

LG2 10%
BT2

C1331 GND GND X7R


0.1uF C0603
C1356 uP1951PQDD C0402
8

QFN3X3_16_0_5
0.1uF
C0402
GND

12V_PEX6_NVVDD

{30} ISEN3

C267
C1363 C1365 C1366 C1367 C1368 C1364
0.1uF 10uF/16V 10uF/16V 10uF/16V 10uF/16V 10uF/16V 270UF
25V 16V 16V 16V 16V 16V
10% 20% 20% 20% 20% 20% 20%
X7R X5R X5R X5R X5R X5R 16V
0603 0805 0805 0805 0805 0805 AP-CON
COMMON COMMON COMMON COMMON COMMON COMMON 5.23A@105C
0.010R
DIP_ECAPD6_6MM

NVVDD_BST4 R116 2.2,1% 0.760 20V 0.760


20VNVVDD_BST4_C C263 0.1UF
R0402 5% C0603 25V GND NVVDD
10%
LFPAK D 5
X7R
Q66
MDU1514
R775 0 NVVDD_DRVH4_R 4G DFN55X6_1_27MM L36
0.760 S 1 0.22uH C265
R0603 30V R774
R1114 2 69A@25C R702 IND_NONRKO_TH_105X075 R776 C1373 C1001 C1002 C1005 C1011
+0.05R 0.008R@4.5V, 0.0055R@10V 1 820UF
10K 276A 18K,1% 1,1% 10uF/6.3 10uF/6.3 10uF/6.3 10uF/6.3 10uF/6.3
3 2.14W@25C 5% COMMON
5% +/-20V
R1206 1% +0.05R 6.3V 6.3V 6.3V 6.3V 6.3V
20%
R0402 R0402 R0402 20% 20% 20% 20% 20%
R698 2.5V
NVVDD_SW4_RC X5R X5R X5R X5R X5R
5.1K C0805 0805 0805 0805
AP-CON
0805 5.6A@105C
NVVDD_SW4 5% COMMON COMMON COMMON COMMON 0.007R
R0402
0.760 40A C1383 DIP_ECAPD6_6MM
0.3mm
1000PF GND GND GND GND GND
GND
25V
LFPAK D 5 LFPAK D 5 10%
Q67 Q68 X7R
R1188 0 C0603
NVVDD_DRVL4 MDU1511 MDU1511
4G 4G R1179
R0603 DFN55X6_1_27MM DFN55X6_1_27MM
0
Galaxy Microsystems (HK) Ltd.
+0.05R S 1 30V
120A@25C
S 1 30V
0.004R@4.5V, 0.003R@10V 120A@25C GND 5%
Page Name:
2 360A 2 0.004R@4.5V, 0.003R@10V
R0402
C1384
100pF
3 2.22W@25C
+/-20V 3 360A
2.22W@25C
+/-20V
{30} ISEN4 PS: NVVDD Phase 1-4
50V C260 0.1uF R1109 0 ns Size Project Name: Design By: Rev
5% {30} CSP C0603 D Carson V10
C0G
C0402
R1110
25V
10% X5R
1K,1%
R0402 1%
P45U
ns {30} CSN Date: Thursday, December 28, 2017 Sheet 31 of 37
R0402 1% C259
GND GND
0.22UF PROPERTY NOTE: This document contains information confidential and
GND C0603 property to Galaxy Microsystems (HK) Ltd.
25V
X5R
ns

GND
A B C D E F G H

Page32:Blank page

1 1

2 2

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
Blank page
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL PS: NVVDD Rail Balance Login & Dynamic Phase P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 32 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page33: PS: Inputs, Filtering, and Monitoring


PEX 3V3 INPUT - 10W
3V3_F 3V3_F
place caps close to INA3221 3V3
3.3V
3A
C505 INA3221_VIN1P R524 20ohm 12V_INP 3V3 R71 0ohm/NC 0.400
0.1uF U502
1% 0.05 ohm
16V @digital.u_pwrmtr_ina3221(sym_1):page33_i374 C508 R533 0402665k 0805
10% 10uF C89 R76 0ohm/NC C958
X7R 1%
16V
0402
0.1uF 10uF

12
0.05 ohm
10% 16V 6.3V
1 VIN1P X5R
0805 1
0402 10% 20%
4 R72 0ohm/NC
VS GND X7R X5R
GND
INA3221_VIN1N R513 20ohm 12V_INN_1 0.05 ohm
0805
{24,37} IN
I2CC_SCL_R 6 SCL 1% 0805
0402 0805
{24,37} BI
I2CC_SDA_R 7 SDA VIN1N 11 0402

5 A0
3V3_F No Stuff for 75W LB504 220ohm
INA3221_VIN2P R550 20ohm 12V_PEX6_1_INP
GND GND
VIN2P 15 1% IND_SMD_0805
C517 0402 LB503 220ohm
GND
10uF R553 665k
16V
1% IND_SMD_0805
R554 R1052 10%
VIN2N 14 X5R
0402
10k 10k
5% 5% INA3221_VIN2N R545 20ohm 12V_PEX6_1_INN
GND
0805
1%
0.05 ohm
INA3221_VIN3P R534
0402 20ohm 12V_PEX6_2_INP
0402 0402
PS_PCIE_GOOD R551 0ohm INA3221_PV 10 PV VIN3P 2 1% Pad overlap R534 & R925
{35} OUT
SNN_INA3221_TC C514 R525 665k R925 20ohm/NC
13 TC 0402 12V_PEX6_2_INN
INA3221_LOW_PERF* 0ohm/NC INA3221_VPU 10uF
R552
0402 16 VPU 1% 1%
{34} IN 16V 75W Stuff
0402 opt
10%
1 0402 R926 20ohm/NC 12V_PEX6_2_INP
0.05 ohm VIN3N X5R
0402
GND 1% Pad Overlap R540 & R926
INA3221_VIN3N R540
0402 20ohm 12V_PEX6_2_INN
0805
1%
8 INA3221_OC_WARN* R521 0ohm/NC
0402 OC_CRIT*
WARN OUT {35}
3 GND 0.05 ohm
GPIO9_THERM_ALERT_R*
TP PAD CRIT 0402
2 R512 0ohm/NC GPIO28_OC_WARN 2
{24}

9
OUT
0.05 ohm
I2C Address:(1000 000b)
QFN016Q_P065_0047_T022X022 0402
R531 0ohm/NC
0.05 ohm
0402
GND 0.05 ohm
R546 0ohm

0402
R539 0ohm/NC GPIO9_THERM_ALERT*
OUT {24}
0.05 ohm
0402
R527 0ohm/NC PULLED-UP TO 3.3V ON GPIO PAGE
0.05 ohm
0402

12V_PEX6_NVVDD
12V_PEX6_2_INN

PCI_Express Power
PEX6 INPUT 1 - 2x3 PCIE CON 75W
12V_PEX6_INN 12V_PEX6_2_INP
J11

MALE
8 12V_PEX6_1_INN 12V_PEX6_MISC
4.2MM 7 12V_PEX6_INP Stuff for 75W Only
90 12V_PEX6_1_INP R927 0ohm/NC
DIP_POWERCON_6P_R 1 12V 0.05 ohm RS1 0.005ohm 12.5A
0.400
2 12V 0805
12.5A
3 12V 0.400 12.5A RS501 0.005ohm 0.400 12.5A
L1 1uH 0.400 RES_04_SMD_064X032_RKO
6 GND

GND

PRSNT* 5 RES_04_SMD_064X032_RKO IND_NONRKO_SMD_078X072 C49


10uF
3 C41 C234 3
4

16V
C548 C553 C42 33uF/NC 47uF 20%
0.1uF 22uF 10uF X5R
20% 20%
16V 16V 16V
16V@105degC 16V@105degC
10% 20% 20%
TA-Polymer TA-Polymer
X7R X6S X5R
Stuff for 75W Only 1.291A@-3.1degC,[ ] 1.2A@105degC,100KHz
0805
0.045ohm 0.045ohm
CAP_SMD_3528 CAP_SMD_7343 GND
GND
0402 0805 R40 0ohm/NC Pad overlap C41 & C234
0.05 ohm 0805
R39
0805 0ohm/NC
0.05 ohm
GND
R38
0805 0ohm/NC
0.05 ohm GND GND GND
R37
0805 0ohm/NC
3V3_F 0.05 ohm
0805

R567 PEX 6 Input Present 1


OUT {34}
1k
1%

0.400
R631 0ohm INPUT_PEX6_DT1* R573 1k INPUT_PEX6_DT1_R*
0402 OUT {34,35}
0.05 ohm 1%
R0402 0402
C558
0.1uF
16V
10%
X7R
4 4

0402

GND

PEX_12V INPUT - 66W


Place close to J14/J16
12V_PEX6_MISC
J14 and J16 is the soldering holes for power cable. Alternate 12V_F
12V_INN
The power cable Need a seperate wire as detect pin 12V

This detect wire need be soldered on J15 5.5A 5.5A R367 0ohm/NC
0.400
L2 1uH 0.400 0.05 ohm
RS502 12V_INP
0.005ohm 12V_INN_1
R363
0805 0ohm/NC
IND_NONRKO_SMD_056X052 0.05 ohm
C988 C1007 C83 C50 R366
0805 0ohm/NC
0.1uF RES_04_SMD_064X032_RKO 10uF 10uF 10uF
0.05 ohm
16V 16V 16V 16V R365 0ohm/NC
0805
10% 10% 10% 10%
X7R X5R X5R X5R 0.05 ohm
0805
Stuff Option for 75W Only
0402 0805 0805
0805
5 5

GND
12V_INP
GND

12V_INN_1
Galaxy Microsystems (HK) Ltd.
Page Name:
PS: Input, Filtering, and Monitoring
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL PS: Input, Filtering, and Monitoring P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 33 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
A B C D E F G H
A B C D E F G H

Page34: PS: 12V Current Steering, PSI Control, and LED

PEX Input - Power Level/PSI* Control


12V CURRENT STEERING (UNDER POWER BOOT): 3V3_F

GUIDES CURRENT FROM PEX EDGE TO PEX 6 PIN INPUT AREA R555
10k
5%
1 1
12V_PEX6_NVVDD
R0402
12V_PEX6_F1_STEER_N INA3221_LOW_PERF*
OUT {33}

C981 4.7uF 6
1G1D1S
16V
D Q513A
10% 3 3W@25C
@discrete.q_fet_n_enh(sym_2):page34_i116
X5R
2 -72A
0.035R@-4.5V; 0.02R@-10V;
{33,35}
INPUT_PEX6_DT1_R* 2G
N/A IN
R0805 R769 1 -30V S 1 3V3_F
R768 100k 12V_PEX6_F1_STEER_RC 4 S 60V
0.115A
5% G 5000mohm@10V / 7500mohm@4.5V / -1000mohm@2.5V
0.8A
R0402 20k 5% Q525 0.2W

3 R0402 5 20V R571


1G1D1S SC70_6
D D
DFN55X6_1_27MM 10k
Q527
12V_STEER_C 5%
R737 1k @discrete.q_fet_n_enh(sym_2):page34_i16 R594
{33} IN
INPUT_PEX6_DT1* INPUT_PEX6_DT1_RC* 1G MDU3603 GND
GPIO6_PSI_Q GPIO6_NVVDD_PSI*
OUT {24,30}
S 2 C973 3
1% R0402 1G1D1S 0.05 ohm
1uF D
R0402 60V Q512B 0ohm
0.26A 16V LOWPWR_MODE R579 100ohm
3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V 1G1D1S 3 LOWPWR_MODE_R @discrete.q_fet_n_enh(sym_2):page34_i119
R0402
10% D
0.31A
0.3W X5R
Q513B 1% 5G
20V

SOT23
@discrete.q_fet_n_enh(sym_2):page34_i117 R0402 S 4
12V_F 5G R572
60V
R0603 100k 0.115A
GND S 4 5000mohm@10V / 7500mohm@4.5V / -1000mohm@2.5V
5% 0.8A
GND 60V 0.2W
C977 4.7uF 12V_F_STEER_N 0.115A
5000mohm@10V / 7500mohm@4.5V / -1000mohm@2.5V
20V

0.8A
SC70_6
16V 0.2W GND
R0402
20V
10%
D 5 SC70_6
X5R
2 Q521 2
R0805 R762 GND
R763 100k 12V_F_STEER_N_R 4G GND
5% S 1 -30V GPIO12_LOW_PERF* GPU SPEED
N/A
R0402 20k 5% 2 0.035R@-4.5V; 0.02R@-10V;
-72A
R0402 3 3W@25C

0 Slow 1V8_AON
3 DFN55X6_1_27MM
1G1D1S
D Q522 MDU3603 1 Normal
@discrete.q_fet_n_enh(sym_2):page34_i14 R596
2.2k
1G
5%
S 2
60V
0.26A
3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V R0402
0.31A
0.3W
20V
1G1D1S 6 GPIO12_LOW_PERF*
SOT23 D OUT {24}
Q512A
@discrete.q_fet_n_enh(sym_2):page34_i115
GND
2G
S 1
60V
0.115A
5000mohm@10V / 7500mohm@4.5V / -1000mohm@2.5V
0.8A
0.2W
20V

SC70_6

GND

3 3

12V_F

GeForce Logo LED


R720 R723 R717 R712
680ohm/NC 680ohm 1k 1k
5% 5% 5% 5%

LED HEADER
NV3V3 R0603 R0603 R0603 R0603

4 4
R690 LED 1 J8
10k LED_Q*
1G1D1S 3 2
5% D Q518
R678 1k @discrete.q_fet_n_enh(sym_2):page34_i86
GPIO11_LOGO_LED_POWER_BRAKE R691 0ohm GPIO11_LOGO_LED_R LED_ON 1G @electro_mechanic.hdr_1x2(sym_1):page34_i91
{24} IN R0402 MALE
0.05 ohm S 2 2.5MM
R0402 C920 0
5% 30V
0.3A
R0402 0.1uF 1900mohm@10V / 1900mohm@4.5V / 1900mohm@2.5V
1.2A
16V 0.2W
12V DIP_FAN_2P
10%
SOT323
X7R

R0402
GND GND

5 5

Galaxy Microsystems (HK) Ltd.


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ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
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PAGE DETAIL PS: 12V Power Steering,PSI Control & LED P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 34 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
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Page37: PS: Shutdown and Sequencing

PEX Input Present 1 POWER CONNECTOR HOT-UNPLUG DETECT


1B1C1E 3 INPUT_HOTUNPLUG* R504 0ohm THERM_OVERT*
R535 C Q502
INPUT_PEX6_DT1_R* R566 1k INPUT_PEX6_DT1_HUP* 10k INPUT_HOT_UNPLUG_DT_R B1 @discrete.q_npn(sym_1):page35_i92 0.05 ohm
{33,34} IN
R0402OFF
1% 5% POWER
R0402 R0402 3V3_F E 2 ON HOTPLUG EVENT
1 STUFF TO LATCH 1
SOT23
R528 INPUT_EN_HPD
10k
5%
1B1C1E 3
C Q507
C506 INPUT_HOT_UNPLUG_R 3 INPUT_HOT_UNPLUG_Q B1 @discrete.q_npn(sym_1):page35_i91
0.1uF C R0402
R541 1B1C1E Q508
25V 10k B1
10%
@discrete.q_npn(sym_1):page35_i70 E 2
X7R 5%
R0402 C516 E 2 SOT23
R0603 0.1uF
16V
SOT23
10%
X7R
INPUT_EN_HPD_Q
GND R0402
GND
1G1D1S 3
D Q503
GND
R503 @discrete.q_fet_n_enh(sym_2):page35_i89
THERM_OVERT* 10k INPUT_NVVDD_EN_HPD 1G
{24,35} IN
5% S 2 60V

R0402 C507 0.26A


3000mohm@10V / 3000mohm@4.5V / 3000mohm@2.5V
0.1uF 0.31A
0.3W
16V 20V

10% SOT23
X7R
R0402

GND GND
2 2

NV3V3 NV3V3 NV3V3


NVVDD ENABLE
D502
High Priority R532
10k
R543
10k/NC
R542
@discrete.d_3pin_aa(sym_1):page35_i29
10k
1V8_AON 3V3_SEQ
70V
Protection Event 5% 5% 70mA 5%
R536 R520
OC_CRIT* R519 0ohm/NC OC_CRIT_D 0ohm/NC 0ohm
{33} R0402 R0402
1 R0402
IN 0.05 ohm 0.05 ohm
0.05 ohm 3
PS_PCIE_GOOD R547
R0402 0ohm INPUT_EXT_PRSNT_D 2
{33} IN
0.05 ohm
R0402 R0402
R0402 SOT323 PS1_NVVDD_EN_PWR

0.100
NV3V3
C511 0.1uF
GND
16V
R530 D501 10%
10k

5
X7R
@discrete.d_3pin_aa(sym_1):page35_i28 U504
R0402
5% 70V PS1_NVVDD_EN_PROT 1 PS_NVVDD_EN
70mA R1058 10k
4
OUT {30}
R0402
2 5%
OVERT_3V3NV_PGODD 1 R0402 C510 R529
10nF 10k/NC
3 @logic.u_and_2in(sym_1):page35_i35

3
3 THERM_OVERT* R518 0ohm 2 R1057 25V 5%
3
IN {24,35} SC70_5 10k/NC 10%
0.05 ohm X7R
5%
R0402 SOT323 GND R0402 R0402

R0402
GND GND
12V_PEX6_MISC 12V_F

GND
R558 R544
10k 10k
5% 5%
1B1C1E 3
C Q509B
1B1C1E 6 12V_PEX_Q B5 @discrete.q_npn(sym_1):page35_i105
R0402 R0402
C Q509A PS_NVVDD_EN_BE_RC
12V_PEX_R_DIV B2 OUT {35}
@discrete.q_npn(sym_1):page35_i101 E 4
R557 C519 E 1 SC70_6
1k 10nF
1% 16V
SC70_6
10%
X7R GND
R0402 R0402
GND
1V8
GND GND
D503
R652
@discrete.d_3pin_aa(sym_1):page35_i7
70V 10k
70mA 5%

4 GPIO4_GC6_1V8_MAIN_EN 1 4
IN {24,26} R0402
1V8_MAIN_PGOOD
3
PS_1V8_AON_EN OUT {28}
IN {26,27,28,29} 2
D_3PIN_AA/NC
SOT323

PEX ENABLE NV3V3

R1053 R1055 0ohm PS_PEXVDD_EN


10k/NC OUT {27}
0.05 ohm
5%
R0402 3V3_F

R1059
R0402 R1056 10k/NC
PS_NVVDD_PGOOD
IN {29,30} 0ohm/NC 5%
0.05 ohm

R0402
PEXVDD_U44_DCPL C1195 0.1uF/NC
R0402 GND
16V
5

U44 10%
X7R
1 R0402 GND
PS_NVVDD_EN_BE_RC 4
{35} 2
IN

@logic.u_and_2in(sym_1):page35_i111
3

5 5

U_AND_2IN/NC
SC70_5
GND Galaxy Microsystems (HK) Ltd.
Page Name:
PS: Shut Down and Sequencing
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL PS: Shut Down and Sequencing P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 35 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
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Page38: GC6 MISC

1 1

PEX_CLKREQ*

3V3 NV3V3
GPU_EVENT*
3V3 NV3V3
R715 R711
10k/NC 10k/NC

SOT323_1G1D1S
5% 5% R722 R719

@discrete.q_fet_n_enh(sym_2):page36_i121
0402 0402 10k/NC 10k/NC

SOT323_1G1D1S
DNI DNI
PEX_CONN_B12 R716 0ohm/NC GPU_PEX_CLKREQ* 5% 5%

Q519

@discrete.q_fet_n_enh(sym_2):page36_i86
{3} {3} 0402 0402

2
BI BI

DNI
04020.05 ohm DNI DNI DNI
PEX_WAKE* R721 0ohm/NC GPIO2_CG6_GPU_EVENT*

Q520
{3} {24}

2
IN OUT

DNI
04020.05 ohm DNI

S
2 PEX_TCLK R714 0ohm/NC PEX_CLKREQ_CONN* 2
{3} BI

1G
04020.05 ohm DNI

S
GPU_EVENT_CONN_R R718 0ohm/NC GPU_EVENT_CONN*

1G1D1S
{3} IN

1G
04020.05 ohm DNI

1G1D1S
NV3V3
3.3V
NV3V3
3.3V

Q_FET_N_ENH/NC

Q_FET_N_ENH/NC

PEX_RST# LOGIC GC6 FB ENABLE

3V3_F 3V3_F

Accept 3V3 Logic


3 R759 R760 3
R713 0ohm 10k/NC 10k/NC
5% 5%
0.05 ohm COMMON
0402 0402
R0402 DNI DNI
1V8_AON
GC6_FB_EN_Q* GC6_FB_EN_CONN_A32
OUT {3}
1G1D1S 3 1B1C1E 3
C93 0.1uF/NC D Q34 C Q526
0402 16V @discrete.q_fet_n_enh(sym_2):page36_i113 B1 @discrete.q_npn(sym_1):page36_i116
SOT323_1G1D1S SOT323_1B1C1E
10%
{24,29} IN
GPIO1_GC6_FB_EN 1G DNI DNI
X7R
COMMON GND S 2 E 2
5

U510
PEX_RST* 1 @logic.u_and_2in(sym_1):page36_i72
R561 10k/NC Q_FET_N_ENH/NC Q_NPN/NC
{3} IN
PEX_RST_BUF*
4 {3}
0402 5% DNI
OUT
2 SC70-5
R710
COMMON
100k/NC GND GND GND
3

5%
0402
DNI
U_AND_2IN/NC
GND

GND

4 4

5 5

Galaxy Microsystems (HK) Ltd.


Page Name:
PS: GC6 MISC
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
PAGE DETAIL PS: GC6 MISC P45U
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 36 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
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(TO SELECT 3.3V OR 5V)

37_MECH_SN EEPRON 3V3_F

R1023
0
5%
R0805
COMMON

D800
1 2
1 1
C1045 R999
30VR
SM_SOD123 10K
0.1UF 0.5A
COMMON
COMMON 5%
X7R R0402
16V COMMON
C0402
10%
U800

8
GND
EEPROMA0 1 5

VCC
EEPROMA1 2 A0 SDA R1015
J20 A1 100K
EEPROMA2 3
4 VCC_3V3 A2 5%
R0402
3 I2C_CLK 6 COMMON
2 I2C_DATA SCL

GND
1 GND1 7
WP

4
VERTICAL
5 pin 90 Degree Connector
COMMON FT24C02A-USR
MALE
2.0MM
dip_head1x4_2mm_90
HDR_1X4_2.00mm 90 DEGREE DIP
GND GND
GND
EXTERNAL PROGRAMMING HEARDER

R897 R997
2.2K 2.2K
5% 5%
2 2
R0402 R0402
COMMON COMMON

R864 0
R0402 COMMON

VCC_3V3 R883 0/NC I2CC_SCL_R


OUT {24,33}
R1024 R0402 +0.05R COMMON
0
5%
COMMON EEPROMA2 R880 0 R893 0/NC I2CC_SDA_R
R0402 BI {24,33}
R0402 COMMON R0402 +0.05R COMMON

R1025 R895 0 I2CB_SCL_R


OUT {24}
0/NC R0402 +0.05R COMMON

5%
COMMON
R0402 R896 0 I2CB_SDA_R
3 3
BI {24}
R0402 +0.05R COMMON

GND

VCC_3V3
R1019
0/NC
5%
COMMON EEPROMA1
R0402

BKT1 BKT2
R1020
0 HOLE125AAA
Brackets: HOLE125AAA
5%
COMMON 1 1
R0402

GND
NVVDD FBVDD PEX_VDD 5V GND 1V8_AON GND GND

4 4

MECH. MOUNTING TOP

MECH. MOUNTING TOP


VCC_3V3
Brackets: R1021
0/NC
5%
COMMON EEPROMA0
1

1
R0402
1

1
R1022 BRACKET BRACKET
0 GPU_V DDR_V PCI_V 5V GND 1V8
5%
COMMON
R0402 TP_OCT2MM_DIP TP_OCT2MM_DIP TP_OCT2MM_DIP TP_OCT2MM_DIP TP_OCT2MM_DIP TP_OCT2MM_DIP

GND
GPU Stiffener:
MOUNTING HOLES FOR HS SS:
MOUNTING HOLES FOR HS DS:
MEC501
BOARD STIFFENER @mechanic.stiffener(sym_5):page37_i26
4PIN
4 connected mounting pins COMMON
1
2
3
4

5 5

GND
Galaxy Microsystems (HK) Ltd.
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MECH_SN EEPRON
ASSEMBLY <ASSEMBLY_DESCRIPTION> Size Project Name: Design By: Rev
Custom Carson V10
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ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY Date: Thursday, December 28, 2017 Sheet 37 of 37
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
PROPERTY NOTE: This document contains information confidential and
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. property to Galaxy Microsystems (HK) Ltd.
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