dSPACE HIL Solutions Overview - M

dSPACE HIL Solutions – Overview
August 2023
dSPACE – Innovative Solutions for Hardware in the loop testing
▪From
Text Autonomous
in Ebene 1 Driving to Zero Emissions Key takeaways
▪ Text in Ebene 2 Comprehensive solutions from

function to integration testing
▪ Text in Ebene 3
Für Zwischenüberschriften bitte Text in Ebene 4 verwenden Continuous invests in real-time
Für kleine Texte bitte Ebene 5 verwenden simulation technology
▪ State-of-the-art CPU, GPU and
FPGA technology available
▪ Support of latest automotive
bus and network standards
▪ Solutions for cybersecurity
testing
▪ Real-time capable automotive
simulation models (ASM)
Comprehensive extensions for
ADAS/AD and E-Mobility
2 © Copyright 2023, dSPACE GmbH

dSPACE HIL Portfolio – Overview
dSPACE Process Consulting – dSPACE Engineering Service – dSPACE Trainings
Simulation Models
Platform and I/O configuration Experimentation and Management and Automation Open Interfaces
Model Configuration
Rest bus configuration Visualization
Road and Maneuver Definition
ECU interfaces
Env. sensor
interfaces
Unit under test I/O, and network interfaces SCALEXIO LabBox SCALEXIO OTS HIL Customized HIL Testbenches
SCALEXIO real-time and I/O hardware

dSPACE HIL Test Solutions

SCALEXIO LabBox Test Systems
Optimized for function and network testing Key takeaways

▪ Compact but modular test
system with powerfull real-
time processor
▪ Wide range of interfaces for
automotive applications
▪ Comprehensive bus and
network support
▪ User programmable FPGA-
accelerators for power
Unit under test electronics simulation
▪ Ruggedized chassis for in-
vehicle use cases (VIL)
▪ Widely software-
configurable

Off-The-Shelf Test Systems
Optimized for testing single ECUs Key takeaways

▪ Pre-configured for typical
automotive applications,
e.g. engine or vehicle
dynamics
▪ Comprehensive bus and
network support
▪ Widely software-configurable
▪ Automotive-ready through
onboard signal conditioning
Unit under test
▪ Integrated FIU for fail-safe
and fail-operational testing
▪ Extensible via versatile range
of I/O boards

Turnkey Test Systems
Ready-to use test systems for any application Key takeaways

▪ Highly flexible and
customizable
▪ Scalable from single ECU up

to turn-key integration
testing
▪ Outstanding performance for

most comprehensive plant
models
▪ Comprehensive support of
automotive bus/network
protocolls
▪ Fail-safe and fail-

operational testing (LV123)
▪ Integration of real loads

Power Level HIL
Testing with full electrical power without a rotating motor Key takeaways
▪ Outstanding & most
realistic current emulation
▪ Highest flexibility & full

power
▪ Improved test coverage at

reduced costs (up to 50%)
▪ Reduction of development
time and improve safety
(LV123 and ISO/DIS 21498)
▪ Mature technology
>15 years experience with
Power HIL systems
Traction controller Motor and battery emulator dSPACE HIL,
with actual inverter (e.g. 250 kVA, >1000V, 600A peak)
> Full-service provider
power supply

Mechanical Test Benches
Validation ECUs with integrated sensors and actuators Key takeaways

Integrated sensors and actuators requires more than the traditional electrical interface ▪ Outstanding real-time
performance (latency, jitter,
Steering and Braking are highly safety critical (ISO 26262)
synchronicity, bandwidth)
Vehicle dynamics real-time simulation required
▪ Scalable standardized turn-
Brake booster Power pack key test bench concepts
including
real pedal
▪ Customer specific benches
Entire
steering for other applications
system
Brake booster test benches Electric power steering test benches

dSPACE HIL – Components

SCALEXIO Real-Time System
Hardware* overview Key takeaways

Real-Time Performance
▪ High-performance processors
▪ Optimized real-time OS
▪ Hard and soft real-time operations
▪ High-bandwidth I/O with low
jitter/latency
▪ Latest FPGA technology
Buses & Networks
▪ Comprehensive support of
automotive standards
Flexibility
▪ Highly scalable architecture
(from signal level to turnkey HIL)
▪ Easy system setup and
*) SCALEXIO Product Information
modification
© Copyright 2023, dSPACE GmbH

Implementation Software – ConfigurationDesk
Separated Model Implementation and I/O Configuration for Building Real-Time Applications
▪ One tool for various environments (Simulink, FMI, V-ECU, etc.)
▪ Less influence on Simulink modeling style (golden model)
but still strong interaction (I/O mapping, jumping, remote access)
▪ I/O configuration reuse for different models
▪ Portable models (e.g., for different hardware, VEOS)
▪ Faster I/O configuration (better overview, multiselection)
▪ Comprehensive help, display of conflicts and solutions Simulink®
▪ Interplay with Bus Manager and ECU Interface Manager

▪ Optimized interaction with Simulink®

Bus & Network Tool Chain
ARXML
ARXML,
DBC, LDF,
FIBEX, ..
RT Simulations Systems
Experiment Tool & Bus-
Monitoring
3rd Party Testtools

Test Tools
Offline Simulation System
Implementation Tools Simulation Platforms Experimentation & Testing

Automotive Networks
Residual simulation of automotive networks Key takeaways

Support of >25 interface types
and protocols
▪ Automotive, e.g. CAN, CAN
FD, LIN, FlexRay, Ethernet
SOME/IP
Supporting latest standards
▪ DBC, LDF, FIBEX, AUTOSAR
▪ E2E Protection, Secure
Onboard Communication,
Global Time Synchronization
Powerful tooling for
configuration, monitoring,
logging and analysis
SOME/IP

Bus & Network Configuration Tools
Basic features Key takeaways

Tools for different bus systems, e.g.
• Bus Manager (CAN & LIN)
• Ethernet Configuration Package (Ethernet
SOME/IP)
• FlexRay Configuration Package
General Features
• Typ. based on a databases (AUTOSAR, DBC,
LDF, FIBEX)
• Graphical and/or automated configuration
• Simulation and manipulation options
• Static, synthetic or dynamic simulation
• Sychronized monitoring support (w/o
additional HW)

Automotive Simulation and Sensor Models, Scenario Generation
Open and scalable Key takeaways

▪ Open and flexible simulation
models
▪ Scalable sensor models from
object list to physics based raw
data generation
▪ Photorealistic camera
simulation
AURELION ▪ Best-in-class models for radar
and lidar sensors
▪ Scenario generation and
import
▪ Open Standards, e.g. OSI,
OpenSCENARIO, OpenDRIVE
support

Experiment Software – ControlDesk
▪ Powerful and easy-to-use monitoring and tuning software

without interruption of your real-time application
▪ Graphical instrumentation, automation, parameter set handling, Bus monitoring and logging
▪ Photorealistic instruments, browser instrument (HTML5), map instruments, plotter, …

dSPACE Test Solutions – Manage and Automate Testing
Maximize HIL system usage by automated test

system/HIL configuration and automated test
execution
Systematic validation of ECU versions and variants
Agile development support through continuous

testing and central data management
Full traceability from requirements to test results,

including direct connections to ALM tools

SCALEXIO Real-Time System

SCALEXIO HIL Roadmap
New SCALEXIO Hardware Product Updates

Improved Real-time Computation
▪ 64 Bit-based real-time OS for
improved performance
▪ SCLX Processing Unit HCP
(6-Core @ 4 GHz) Q2/2023
▪ SCALEXIO Processing Unit HPP
(16-Core @ 2.9 GHz)
New Bus & Network Interfaces for
▪ 10 BaseT1S Ethernet
▪ 100/1000 BaseT1 Ethernet
(MACsec support)
▪ CAN FD SIC
▪ MultiGigBase-T1 Ethernet (under dev.)
Improved FPGA Solutions
▪ Extended FPGA debug solutions
Detailed product information in handout!
© Copyright 2023 dSPACE GmbH

SCALEXIO Real-Time System - Processing Hardware Handout
SCALEXIO Processing Unit DS6001 Processor Board

Powerful platforms for applications with high real-time performance Compact platform with excellent
requirements closed-loop performance
<
High core performance High parallel performance

SCLX PU HCP (P03) SCLX PU HCP (P04) SCLX PU HPP (P02) DS6001 2020-B
▪ Processor: ▪ Processor: Intel ▪ Xeon Gold 6208U ▪ Processor:
E3-1275v6 Alder Lake platform ▪ Clock: 2.9 GHz i7-6820EQ
▪ Clock: 3.8 GHz ▪ Clock: 4.0 GHz ▪ Cores: 16 (15/1)* ▪ Clock: 2.8 GHz
▪ Cores: 4 (3/1)* ▪ Cores: 6 (5/1) ▪ RAM: 64 GB ▪ Cores: 4 (4/1)*
▪ RAM: 16 GB ▪ PCIe Gen5 ▪ 480 GB SSD SCLX HVR Extension ▪ RAM: 4 GB
▪ DDR5 for integration of Soft- DS6001_SSD
Real-time applications ▪ 120 GB
on standard OS
21 © Copyright 2023 dSPACE GmbH

SCALEXIO Processing Unit – High Parallel Performance
SCLX Processing Unit HPP P02 (16-Core)

▪ Running huge and complex models in real-time
▪ Platform for hybrid (rt & non rt) applications, e.g.
AD-HIL setups
Specs HPP-P01 HPP-P02

CPU ▪ Intel XEON 2640v3 at 2.6 GHz with ▪ Intel XEON 6208U at 2.9 GHz with
8 Core 16 Cores
RAM ▪ 8 GB GB ▪ 64 GB ECC
Storage ▪ Optional: 480 GB SSD ▪ 480 GB SSD
Interface ▪ 2x on-board 1Gbit/s Ethernet I/O ▪ 3 on-board 1Gbit/s Ethernet I/O
Interfaces Interfaces (2x 1GBit/s, 1x 10Gbit/s)
▪ 7x PCIe (one slot is reserved for ▪ 7x PCIe (one slot is reserved for
IOCNET) IOCNET)
Host ▪ 1 GBit/s Ethernet Host Interface ▪ 10 GBit/s Ethernet Host Interface Hardware available since 11/2021

SCALEXIO Processing Unit – High Core Performance NEW RLS 2022-B
SCLX Processing Unit HCP (4 Core)

▪ Perfect choice for standard applications and models with
limited parallelism
▪ Highest computation performance per core
HCP-P03 (avail. since 2018) HCP-P04* (Planned for Q4/2022)

CPU ▪ Intel Xeon E3-1275v6 with ▪ Intel Alder Lake i5-12500E with
4 Cores (3/1) at 3.8 GHz 6 Cores (5/1) at 4.0 GHz Enhancements compared to HCP-P03
RAM ▪ 16 GB ECC ▪ 32 GB ECC ➢ Significant reduction of turn around

time (Benchmarks: ASM Engine)
Storage ▪ Optional: 480 GB SSD ▪ 480 GB SSD
➢ On-board user space
Interface ▪ on-board 1Gbit/s Ethernet ▪ 2x on-board Ethernet I/O ➢ High-bandwidth Ethernet Host Interface
I/O Interfaces Interfaces (1GBit/s, 2.5GBit/s)
▪ 5x PCIe, 2x PCI ▪ 7x PCIe slots, 2x PCI
Host ▪ 1 GBit/s Host Interface ▪ 2.5 GBit/s Host Interface
* Subject to change without notice

SCALEXIO I/O Boards – New Automotive Interfaces Handout
Ethernet interface modules for the use with DS6333-PE/CS

▪ DS6333-M3 module for 10 Mbit/s BASE-T1
▪ DS6333-M4 module with MACSec Hardware Support
Under development:
• DS6365 Automotive Multi-Gigabit Ethernet Base-T1
• DS6344 CAN FD SIC Board
DS6333-PE DS6333-CS DS6334-PE DS6335-CS DS6336-PE/CS

Automotive ETH Board Automotive ETH Board ETH Board ETH Board ETH Board
5 Ethernet channels (4 configurable ports BroadR- 4 Ethernet channels 5 Ethernet channels 2 Ethernet channels
Reach / ETH, 1 std. ETH port 10/100/1000 Base-T) (4 std. ETH) 10/100/1000 BASE-T 1/2.5/5/10 Gbit/s BASE-T

FPGA Technology as Computation Accelerator
FPGA Base board I/O Modules
▪ Modular Concept of different user programmable
FPGAs with up to five flexible low latency I/O
for Acceleration of challenging real-time
applications
▪ Sample times can be shifted down in the
Microsecond range
▪ For implementing fast control loops with low

Model complexity
Processor-based
latency or simulation models with high time
DC resolution.
Computation
FPGA-based DC
Computation
▪ Easy implementation of customer-specific
time interfaces and functions, e.g. communication
resol. protocols or I/O data preprocessing.
Nanosec Microsec Millisec

SCALEXIO I/O Boards – FPGA Subsystem
FPGA Base Boards
DS2655 DS2655 DS6601 DS6602

FPGA Base Board FPGA Base Board FPGA Base Board FPGA Base Board
Xilinx Kintex 7K160 Xilinx Kintex 7K410 Ultrascale KU035 Ultrascale+ KU15P
I/O Modules
DS2655M1 DS2655M2 DS6651

Multi-I/O Module Digital I/O Module Multi-I/O Module
5 Analog In, Out, 32 digital channels 6 Analog In, Out,
10 digital channels 16 digital channels

FPGA Base Board Comparison
DS2655 7K160 DS2655 7K410 DS6601 KU035 DS6602 KU15P

Release RLS2013-A RLS2017-B RLS2019-A RLS2019-A
Positioning Allrounder (interims) High-End (new) Allrounder (new) High-End
Technology Kintex-7 Kintex-7 Kintex UltraScale Kintex UltraScale+
Rel. size 1 2,5 2 5,1
FPGA Xilinx Kintex 7K160 Xilinx Kintex 7K410 Xilinx Kintex KU035 Xilinx Kintex KU15P
Logic cells 162240 406720 444000 (system log. cells) 1143000 (system log. cells)
DSP slices 600 1540 1700 1968
Dist. RAM 2188 kBits 5663 kBits 5908 kBits 9800 kBits
Bl. RAM 11700 kBits 28620 kBits 19000 kBits 34600 kBits
Ultra RAM - - - 36000 kBits
MGT-Trans. - - Optional (4 channels) Optional (4 channels
Ext. RAM - - - 4GByte On-Board

RTI FPGA Programming Blockset 3.13
RTIFPGA_BS: Simulink Library with Generic Blocks

FPGA Scope
▪ Configuration of FPGA hardware
▪ Provides FPGA IO Access
▪ Provides Data exchange between FPGA and Processor
Updated by Debugging Feature: FPGA Scope
▪ Plotting 8 signals out of 16 per scope block
▪ Up to 16 scopes per FPGA
▪ Simplified configuration of the scope
in ControlDesk
▪ Enhanced performance:
▪ Up to 2.6 M Samples / s per channel
Further: WatchDog, WordLengthCalc, etc.

SCALEXIO Accessories – Outlook for 2023
SCALEXIO A/D and D/A Connector Panels

▪ Modular 19” Connector Panels providing BNC connectors
▪ Rack and desktop versions
▪ Planned availability: Q1/Q2 2023
Update of the SCALEXIO Ethernet Switch
▪ Ethernet Switch with PTP extension option
▪ Planned availability: Q3/2022
SCALEXIO DSUB Coding Kit
▪ Allows mechanical coding of SCALEXIO I/O Boards with
DSUB50 connector for mismatch protection
▪ SCALEXIO DSUB Coding Kit incl. connector, coding elements and pins
▪ SCALEXIO DSUB Coding Hand Tool for integration of coding pins
* Requires newest version of the bracket. Migration to new brackets for all I/O boards will be finished until end of 2022

SCALEXIO D-SUB Coding Kit
Features & Benefits

▪ Protection against accidental mismatching when connecting
the I/O boards to external devices.
▪ Mechanical coding of the Sub-D connectors of SCALEXIO I/O
Boards
▪ Standard SCALEXIO I/O boards can be equipped with coding
elements and pins.
Limitations (currently):
• Requires newest version of the bracket
• Migration to new brackets for all I/O boards will be finished
until end of 2022
• Please inquire Product Management

SCALEXIO D-Sub Coding Kit
▪ Fasting brackets with recesses for the coding ▪ Male D-Sub connectors with integrated coding
elements and pins: elements
▪ SCALEXIO DSUB Coding Hand Tool for integration of

coding pins

Application Examples

dSPACE HIL accelerates the Validation of Onboard Chargers and DC/DC Converters
Simulation on FPGA powered by Electrical Power Systems Simulation Package Key takeaways
Speed up model setup for
power electronics
Expandability by established
simulation models and high-
voltage power loads
Model optimization thanks to

systematic splitting of circuits
without expert knowledge
Circuit diagram
Simscape Electrical Specialized
Power Systems model dSPACE EPSS dSPACE HIL

Comprehensive Validation of Charging Communication
dSPACE Smart Charging Solution Key takeaways

Simulating hundreds of
Smart Charging Interface Software charging stations types
▪ Support of all common charging standards
Software
▪ Behavior model of charging station Realistic charging sessions with

▪ Conformance test libraries for all standards power
Easy integration into existing

HIL systems
Smart Charging Interface High Voltage EVSE Emulator
▪ ISO15118 Power Line Communication (PLC) ▪ Representation of AC & DC
Hardware
▪ Ethernet raw data mirror charging station Conformance test library and
▪ Manipulation of communication interoperability tests
▪ USB logging interface
▪ Grid manipulation options
Signal Level Power Level

Battery Management Validation with dSPACE BMS HIL
BMS test systems with precise cell voltage emulation Key takeaways
Precise battery cell emulation
Simulation of high-voltage batteries at cell voltage level boards
Open real time simulation models simulating Modular approach allows
the behaviour of the battery customized designs that are still
flexible and extendable
High fidelity open battery
models
iKl uRef New BMS solution coming soon

reference cell
BMS CSC
TRef,Rinnen Ref,
umulti cell i
SOCRef
CSC
delta model
of cell i Ducell i
DiKl
SOC0,CNenn,
DRinnen,DT

Environment Simulation for Driver Assistance Services
Application Area
▪ Advanced driver assistance systems (ADAS)
with radar sensors, lidar sensors, ultrasonic
sensors
▪ Traffic sign recognition, lane departure
warning systems, parking assistant, Car2x, etc.
Important Aspects
▪ Numerous test runs to be repeated under
different conditions
dSPACE Solution
▪ dSPACE provides realistic simulation
scenarios for hardware-in-the-loop testing

Testing Electric Motor ECUs
Application Area
▪ Electric motors are being used more often
Important Aspects
▪ Highly dynamic behavior of the electric motor
▪ High ECU clock rate
dSPACE Solution
▪ dSPACE supplies special FPGA hardware and
software solutions for HIL simulation of electric
machines
▪ ECUs with typical clock rates of 10-20 kHz can
be tested in closed-loop operation

Testing of Hybrid Drives
Application Area
▪ Hybrid electric vehicles (HEV)
▪ Combined simulation of the combustion engine, electric
motors and transmission
Important Aspects
▪ Electric motors can reach 90% of their maximum torque in
only a few milliseconds
▪ ECUs for electric machines have cycle times of approx. 60
to 200 microseconds
▪ Requires HIL simulation speed faster than 60 microseconds
dSPACE Solution
▪ High-resolution signal capturing with the DS2655 EMH
Solution

Simulation for Battery Management System
Application Area
▪ The battery management system (BMS)
monitors the electric and thermic state of the
batteries
▪ Influences each battery and its cells to provide
the necessary energy and maintain optimal
operation
Important Aspects
▪ Batteries for electric vehicles have extremely
high voltages and currents
▪ FIU is needed dSPACE Solution
▪ Restbus simulation for simulating unavailable cells
▪ dSPACE offers specialized hardware and software for
testing a BMS (e.g., ASM multi-cell models)

Testing Engine ECUs
Application Area
▪ Testing one single ECU or several networked
ECUs of an internal combustion engine
Important Aspects
▪ Crankshaft and camshaft simulation
dSPACE Solution
▪ High-resolution signal capturing with the ▪ Parameterizable simulation models for
DS2680 I/O Board different engines
▪ Both boards contain a high-resolution angular ▪ Scalable and adaptable HIL simulators
processing unit (APU) ▪ Exchangeable load racks

Efficiently Frontloading Real Driving Emission Tests
Frontloading RDE tests to the development phase

▪ Integrating simulation-based RDE tests into the
development process to optimize engines and exhaust
systems development
Seamless Tool Chain for RDE Simulation
▪ Seamless tool chain in order to frontload RDE tests to
different development stages, e.g. MIL/SIL/HIL/EIL
▪ Definition of reusable and realistic driving maneuvers
with virtual or real engines and exhaust systems using
ASM
▪ Reuse of simulation models and driving maneuvers on
different Simulation platforms:
▪ VEOS: MIL and SIL
▪ SCALEXIO: HIL and EIL

Testing Vehicle Dynamics ECUs
Application Area
▪ Vehicle dynamics systems like ESP are
extremely safety-relevant
Important Aspects
▪ Require comprehensive HIL tests that make
tough demands on the test system
▪ This requires a very realistic vehicle model
▪ The ECUs perform plausibility and function
checks very precisely. If the ECUs detect
implausibilities, they shut down immediately
dSPACE Solution
▪ dSPACE has many years of experience in
setting up HIL test systems for vehicle
dynamics ECUs, and gives customers every
kind of support needed

Testing ECUs with Integrated Sensors and Actuators
Application Area
▪ ECU has integrated sensors and actuators
▪ HIL simulator cannot be connected at electric power
level
Important Aspects
▪ Physical signals have to be provided to stimulate the
ECU's sensors and actuators
▪ The ECU has to be mounted on a mechanical test bench
dSPACE Solution: Mechatronic parts can also be tested
▪ HIL simulators including integrated pressure, engine
speed and temperature sensors, acceleration sensors,
and yaw rate sensors

Simulation of Electric Power Steering Systems at Mechanical Power Level
Application Area
▪ Sometimes the ECU of electronic power
steering (EPS) or electronic power-
assisted steering (EPAS) systems cannot
be accessed at signal level
Important Aspects
▪ ECUs must be stimulated physically at
mechanical power level, real parts are
needed
dSPACE Solution
▪ HIL simulator equipped with electric
motor simulation is connected with the
mechanical test bench and controls its
components

Testing Individual ECUs or ECU Networks
Objectives of testing single ECUs

▪ ECU interaction between application software,
basis software and ECU hardware
▪ ECU requirements
▪ Electrical error simulation
▪ Diagnostic function
Objectives of testing ECU networks
▪ Bus communication
▪ Energy consumption
▪ Test on timing and interfaces
▪ Arbitration of the ECU network
▪ Bus gateway
▪ Sleep and wake-up

Register Now!
Thank you for listening!

Important Information!
© 2020, dSPACE GmbH
All rights reserved. Written permission is required for reproduction of all or parts of this publication.
The source must be stated in any such reproduction.
This publication and the contents hereof are subject to change without notice.
Benchmark results are based on a specific application. Results are generally not transferable to other applications.
Brand names or product names are trademarks or registered trademarks of their respective companies or organizations.
47 dSPACE-Confidential

dSPACE HIL Solutions Overview - M

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

dSPACE HIL Solutions Overview - M

Uploaded by

Copyright:

Available Formats

dSPACE HIL Solutions – Overview

▪ Text in Ebene 2 Comprehensive solutions from

2 © Copyright 2023, dSPACE GmbH

dSPACE Process Consulting – dSPACE Engineering Service – dSPACE Trainings

SCALEXIO real-time and I/O hardware

3 © Copyright 2023, dSPACE GmbH

4 © Copyright 2023, dSPACE GmbH

Optimized for function and network testing Key takeaways

5 © Copyright 2023, dSPACE GmbH

Optimized for testing single ECUs Key takeaways

6 © Copyright 2023, dSPACE GmbH

Ready-to use test systems for any application Key takeaways

▪ Scalable from single ECU up

▪ Outstanding performance for

▪ Fail-safe and fail-

▪ Integration of real loads

7 © Copyright 2023, dSPACE GmbH

▪ Highest flexibility & full

▪ Improved test coverage at

8 © Copyright 2023, dSPACE GmbH

Validation ECUs with integrated sensors and actuators Key takeaways

Brake booster test benches Electric power steering test benches

9 © Copyright 2023, dSPACE GmbH

10 © Copyright 2023, dSPACE GmbH

Hardware* overview Key takeaways

© Copyright 2023, dSPACE GmbH

▪ Interplay with Bus Manager and ECU Interface Manager

12 © Copyright 2023, dSPACE GmbH

3rd Party Testtools

Implementation Tools Simulation Platforms Experimentation & Testing

© Copyright 2023, dSPACE GmbH

Residual simulation of automotive networks Key takeaways

14 © Copyright 2023, dSPACE GmbH

Basic features Key takeaways

15 © Copyright 2023, dSPACE GmbH

Open and scalable Key takeaways

© Copyright 2023, dSPACE GmbH

▪ Powerful and easy-to-use monitoring and tuning software

17 © Copyright 2023, dSPACE GmbH

Maximize HIL system usage by automated test

Systematic validation of ECU versions and variants

Agile development support through continuous

Full traceability from requirements to test results,

18 © Copyright 2023, dSPACE GmbH

19 © Copyright 2023, dSPACE GmbH

New SCALEXIO Hardware Product Updates

Detailed product information in handout!

© Copyright 2023 dSPACE GmbH

SCALEXIO Processing Unit DS6001 Processor Board

High core performance High parallel performance

21 © Copyright 2023 dSPACE GmbH

SCLX Processing Unit HPP P02 (16-Core)

Specs HPP-P01 HPP-P02

22 © Copyright 2023 dSPACE GmbH

SCLX Processing Unit HCP (4 Core)

HCP-P03 (avail. since 2018) HCP-P04* (Planned for Q4/2022)

RAM ▪ 16 GB ECC ▪ 32 GB ECC ➢ Significant reduction of turn around

* Subject to change without notice

23 © Copyright 2023 dSPACE GmbH

Ethernet interface modules for the use with DS6333-PE/CS

DS6333-PE DS6333-CS DS6334-PE DS6335-CS DS6336-PE/CS

© Copyright 2023 dSPACE GmbH

▪ For implementing fast control loops with low