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Fm-2510 Marine VHF Handheld Tranceiver Sme-A 48
Fm-2510 Marine VHF Handheld Tranceiver Sme-A 48
SERVICE MANUAL
MARINE VHF
RADIOTELEPHONE
MODEL FM-2510
9-52, Ashihara-cho,
Nishino•iya, Japan 662
Telephone: 0798-65-2111
Telefax: 0798-65-4200
PUB.No.SHE-54810-A
CTOSA) FH-2510
- FURU•o - - - - - - - - - - - - - - - - -
CONTENTS
~
CHAPTER 1 CIRCUIT DESCRIPTION 1-1 to 1-27
1.2 General
Somebody may take it too difficult to understand CPU controlled circuit. It is correct
in some extent since so many unreadable factors lying beneath the schematic diagram.
Luckily, CPU control system used in the FM-2510 is not so confusing. No complex bus
is running outside CPU nor sophisticated calculation is performed. Take it simply as a
sequence controller or a multiple pulse generator under the control of external events,
like k~yboard/PTT manipulation, squelch gate open/close, etc.
The FM-2510 consists of two major p.c. boards; the TX/RX BOARD for transmit-
ter/receiver signal processing and the PANEL BOARD for total system control. (Refer
to the block diagram on the next page.)
The PANELBOARD contains keyboard, dial switch, LCD panel, power switch/ volume
. control, squelch control and the piggy-backed hybrid p.c. board. On the hybrid p.c.
board 4-bit one-chip microprocessor and the associated components are mounted. The
PANEL BOARD plays a role for controlling whole transceiver system.
The TX/RX BOARD contains various amplifiers, filters, mixers, oscillators and power
supply circuit to perform actual transmission and reception under the control of the
PANEL BOARD.
1-1
FUAUNO 2 3
1-2
4 5 6
- - - -------------------------------------------.
A
r--------~-----~---------
05P0244
B.P.F
1
RF·.AMP
TX/RX
B.P.F
I
I I I I V" ~ I 05S4427 I ~
SP
-... ~ ~~~,'!!lot
-L I
iI :- L ~ j_J_
~I
~ ~/
"' .. ~ I
I
A A A
1!, I -
Q4
- . ·- ~
- ~.::::t---..;:;_,...,Q14, 15
I
/ ~ FL 1 ;:-- - - / vv
2SK241GR U1 Jl\
M97F
2SK125 16.9MHz 2SK241GR 11 I L _!:~k~ _J : L-- -, T I 2SJ10?BL I pPC1242H
2sc212o
L _j
\\V : <~
~<r·1T·~-V-OL_U_M....,EI
-Y
I: /
: nd----- 25(1815
2 -Y
~~~SE
FRx-16.9MHz
\ LOCALOSC
~
1
L_ ______________ MC3362__ _ _ _ _ :
1
; I
1
L __ - - - - - - - - - - - - - - - - - - - - - , I SQ I I' // RX MUTE SP FT X
:= J! I COORCL I ON/OFF ON/OFF
!\V I
A I
CJ 16,445MHz T • 1 1 /
I
8 T Li@f~QiJLL-:=-~=~-...J ( 8
I
POWER AMP I
r----------, VCO RF SW M57710 tANT SW I
FRX
, .·v:~ I~
/ .~~
MIC
I ~
...
~~~ ....,
_.~,~----------~
Frx
~ _..,
~ ....,
~ ~
r-x...__, I
I
~i
QS, 6, 7 .... . ~
/; ~ ~ / ~
I
I COMPRESSOR I LIMITING L.P.F '
Ius I!\ ,. PRE DRIVER DRIVER 'I' \
~ LP.F
I
I
ANT
LJ ------------- AMP
J.IPC11?0H
L _eljf _ _ _ .ll.f:£.42_5,!LGLJ 05S0374-1
-------1----1----------------------
2SC234? TXSV RX8V 2SC2347 2SC2053 TX+8V
' - - - - + - - - - - + - - - - - - - + - - 1 - 4 Q13/16 ...,.._-++-------- MA INS
I
CR11 12V DC
r------- ------------------------
ru1 o 5 s 3 o o 9 - - - - - - - - - - - - - - - - - - - - - - - - - ,
-~------------------ APC
r--1----------,
I
I
05P0245 I I COM~
REV. POLARITY
PROTECTOR/
I U1 RX I
~ V~
TX CONST. OVER VOLT.
PANEL I ~ ~ L.F 05S3009 : _I +8V +8V + 8V I PROTECTOR
I -~~
c I
I I I
I
I t l I
II
I"/
DET. ~ I~ ~ l/ c
~t·:
I ~----------------- PRE='- 1
I I OSC&DIV. PROG.DIV. '~SD LER I I ---..d LOW
~ ~
~
I
) I
:4.5_rrMHz REF _ V1>"" _ : I .S APC
U8
MB3756 ~
I
I I 25KHi 1'\/ - - I U1 +5V REG L------ -U6 .J ~l
Il "1"
D
I
I PHASE COMPARATOR 1
1' I I
I sv
TA78L06
HI/LOW
I
1 0554424 TX/RX
11
I
I
CPU CLOCK
2.25MHz ..., ROM
I
I
<E--
.....__..J II
I; I CPU RAM l======l==================================-~-===============+=====:::===============-=::;::/_..,
I
PTT
I PANEL KEY SW I ~ 1/0 SQOWOff~---~~~------------~-----~----~
I I I II
I I I
CHANNEL
* I LCD : I ~------------------------------------------------------------------~
; I
I
DRIVER I I
D I L _______ - - - - - - - - - ____ _j I D
I HI/LOW
SPKR
INTL
M/RCL
L ________ - - - - ------------...1
I i
L61
I¥#.. ! SHIFT
ENTER
LCD
U2 LCD4116PH 05112
L{J !DIAL/DIM I
m
APPROVED
~ ."- . . ~ ~
TITLE FM-2510
------~~--------~---------------~
tl @
. . .
BLOCK DIAGRAM
CHECKED
.
~
DRAWN
(iJ
'· (
;).
!I
':.
i
~
ONG.NO. • E5481-009-B
· FURUNO ELECTRIC CO., L TO.
- - FURU-0 - - - - - - - - - - - - - - - - - - -
1.3 Transmitter
Most of the transmitter circuit blocks reside on the TX/RX BOARD.
MIC AMP
Voice signal from the microphone is voltage-adjusted by the MIC GAIN pot R46 and
then reaches the triple stage microphone amplifier U4 and US. (US contains two 4558
type op-amps.)
The first stage U4 is a compression amplifier to obtain 6dB/oct preemphasis response.
The high frequency emphasized AF signal is trimmed by the IDC (Instantaneous
Deviation Control) pot R48 then fed to the next stage. The second and the third amps,
molded in US, are post-limiter and active lowpass filter respectively. They show flat
frequency response up to 2.7kHz and -20dB/oct attenuation response above this fre-
quency. The total frequency response by U4 and US is shown below.
The preemphasis (high freq expansion) and deemphasis (high freq compression done
on receiver side) are necessary signal processing for FM radio to improve signal-to-noise
ratio.
r------(CHASSIS)-----------------------
r-·-·-·-·-·-1-·-·-·-·-·-·-·-·-·-·-·-·-----·-·-·-·-·---·-·-·-·-·-·---·-·
· TX/RX BOARD
1 rxav r - - - - - - - - - - - - - - - - - - - - - - - - 1
i ~ 9
av
I
TX MOD
MIC I 4
JlS ...~
4 SIGNAL
.·. jJ C81 C35
(TO VCO)
z~ I
......
/-=dB/oct + t
?;
~
Q: - :
:
-- 20d8/oct -
!
4:
~
Y k et
d B/ / 20d8/oct
The resultant audio signal of the MIC AMP stage is applied to the varicap diode of the
carrier oscillator (VCO) to cause frequency modulation.
The MIC GAIN pot is adjusted to obtain 6dB/oct emphasis slope, and the IDC pot to
set the maximum frequency deviation to +5kHz.
During reception, the supply voltage (TX 8V) to US is removed to isolate the VCO and
the MIC AMP, which may otherwise cause unwanted frequency modulation on the RX
1st local frequency.
1-3
VCO/PLL (Tx carrier oscillator/Rx 1st local oscillator)
The transmitter carrier frequency is directly generated by the VCO/PLL circuit. (The
receiver 1st local frequency, Frx-16.9MHz, is also generated by the common VCO/PLL
circuit. So, the description will not be repeated in the RECEIVER section.)
VCO/PLL (phase-locked loop) circuit is a kind of servo loop to control VCO frequency
so as to maintain phase (or frequency) coinsidence of a precise reference frequency and
feedback frequency from VCO through 1/N frequency divider network. By changing
the value for N, VCO oscillates any multiples of reference frequency (N x Fref).
F (VCO) = F (REF) xN
FREQ. PROGRAM
In the FM-2510, most of the PLL elements are contained in the one-chip CPU, which
is specially designed for radio tuners.
r--TX AF
...L (MOD)
TXSV RX8V
PROGRAMMABLE
DIVIDER
0
12 bit LATCH
I
I
I
I
0
I I
1 FREQUENCY PROGRAMMING ~
1 BY CPU CPU 1
I L------------------------------------- ____ I
~----------------------------------------------------~------------------
1-4
- FURUNO -------~--------
(VCO)
VCO (voltage controlled oscillator) is basically an L-C resonant oscillator with varicap
(variable capacitance) diodes as a tuning element. The varicap capacitance is controlled
by the reverse bias voltage applied to its anode. (Oscillation frequency gets higher as
the reverse bias voltage goes higher.)
The VCO in the FM-2510 is designed to provide stable output from 138MHz to 159MHz
with the control voltage of approximately 3V to 7V.
CR5 RX 1st. LO
FREO.CONTROL T13~1-- (TO 1st. MIXER)
VOLTAGE CR6
(FROM L PF)---~~~~v+---+--. 1-- TX CARRIER
1 (TO PRE- DRIVER)
MOD AF -----J f-rvv'-.
(FROM MIC AMP) 1
--~----_-_-_-_-_-_-_-_;;_~_;A_~_K-_T-;,_-_F;_Ea_~-~~-~o-~_;_-_-_-_._
. . _ _ ___JT Txav Rxav
The VCO output is distributed to the TX driver or to the RX 1 st mixer by the TXJRX
switching signal from the CPU. To avoid unwanted frequency fluctuation by inter-
ference, the VCO section is covered with the shield case.
(PLL)
Refer to the PLL block diagram on the preceding page. The CPU contains a 1/33-1/32
dual modulus ECL prescaler, 5-bit binary swallow counter, 12-bit binary counter (main
counter), reference frequency divider and a phase comparator on chip.
One input of the phase comparator is supplied with an accurate 25kHz refernce
frequency, which is derived from 4.5MHz crystal oscillator through the reference
frequency divider programmed for 1/180.
The other input of the phase comparator is supplied with a comparing frequency which
is fed back from the VCO through the prescaler, and the 17-bit ( 12 + 5) programmable
divider stage.
The phase comparator compares frequencies of two inputs and delivers phase error
signal to E02 (Error Output 2) terminal. The E02 output status changes as tabulated
below.
Feedback fre
Feedback fre
Feedback fre
1-5
- FURU•o - - - - - - - - - - - - - - - - -
The E02 output controls the external charge/discharge pump, consisting of q3, q4 and
c10/11, to obtain average de voltage in proportion to the frequency error. The simple
C-R lowpass filter, consisting of c12/rl5/rl6, at the pump output is to reject 25kHz
switching ripple, which may otherwise cause vibration on the VCO frequency.
The resultant de voltage controls the VCO frequency so as to minimize the frequency
error at the phase comparator inputs.
~ rrJ BV
r
------, ~ r15
.-----+-q3-+--AA~·~~I-r-16-
i
~~ 1c12
f OV i
1
CHARGE PUMP / LPF
I
The lock/unlock status of the PLL is detected by the internal phase comparator, and
then delivered to PD3 port. This output drives the UNLOCK indicator LED cr5
through the current driver q5. (The LED lights when unlocked.)
(Programmable Divider)
If it is possible to divide the VCO frequency (somewhere around 150MHz) directly
down to 25kHz through cascaded dividers, the circuit construction would be very simple
as in the figure on page 1-4. However, CMOS counters inside the CPU can not catch
up with such a high frequency. So an ECL (emitter-coupled-logic) prescaler, which is
capable of handling VHF, is inserted before the CMOS divider stage. If a simple
prescaler (fixed dividing ratio) is inserted ahead the CMOS divider, the programmable
frequency step (resolution) can not be smaller than the prescaler output frequency.
To divide high frequency without sacrificing dividing resolution, a "pulse swallow
counting system" is adopted by using a dual-modulus prescaler.
F (REF)
25kHz F (VCO)
= F (REF) x (I x M + m)
RELOAD
m
1-6
- - FURU. .O - - - - - - - - - - - - - - - - - - -
For transmission on CH77 (156.875MHz) for instance, the "N" value to be loaded on
the programmable divider is;
N = (Tx freq.)/(Ref. freq.)
= 156875kHz/25kHz
= 6275 (decimal)
= 000011000100 00011 (binary)
= 196 x 321 + 3 x 320 (decimal)
Suppose the main counter is programmed for 1/196, swallow counter for 1/3 and the
prescaler for 1/33.
Receiving 33 pulses from the VCO, the prescaler gives out one pulse. This pulse is
distributed commonly to the swallow counter and to the main counter. When the
swallow counter receives 3 pulses from the prescaler, it gives out a signal to switch the
prescaler for 1/32, and then stops counting. Hereafter, the prescaler gives out a pulse
everytime 32 pulses are received from the VCO. The main counter counts on the output
of prescaler until the programmed value is reached, and then gives a pulse to the phase
comparator. It also generates a pulse to reload the counters and the prescaler with the
initial values.
Now we concentrate on how many VCO pulses are needed to make one output pulse
of the main counter.
n = 33x3 + 32x(196-3)
= 6275 (decimal)
This means that any desired dividing ratio N is obtainable by loading the main counter
with the integer part of N/32, and the swallow counter with remainder (module) of N/32.
In this way, the total VCO/PLL system can oscillate marine VHF frequencies in 25kHz
steps.
1-7
- FURU•o - - - - - - - - - - - - - - - - -
PRE-DRIVER/DRIVER/POWER AMP
During transmission, the VCO output is supplied to the pre-driver stage (08/09), where
the carrier signal is boosted up to approximately 0.2W. US is a 25W RF power amplifier
module, consisting of two amplifier stages. The power supply to the first stage is
controlled by the APC (automatic power control) circuit to limit the RF output to 25W.
While the last stage is directly supplied from mains input. The RF power amp module
has a voltage gain of approximately 50dB.
The RF power output is introduced to 170MHz lowpass filter network (L8-10/C64-69),
and then sent out to a 50-ohm antenna through coaxial cable.
APC/PWR
TX -RE DUCT.
ON/OFF
U3
ANT
TO T
RX FRONTEND ___l
-~
1-8
---IP--~--11-------------------------------------
012
SWITCHED---_,;
12V
U6
R53 PWR Rl/LOW
(from CPU)
1-9
- - FUAU•o _ _ _ _ _ _ _ _ _ _ _ _ _ ___;....._ _ __
When the temperature of the RF power module exceeds approximately 70°C ( 158°F)
the output ofulb will become low enough to shunt the non-inverting bias for ula. The
supply voltage to the RF driver stage is, thus, reduced to protect the RF power module
from overheat.
(T/R Switching Circuit)
To use common antenna and the lowpass filter network for transmission and reception,
the FM-2510 uses a diode switching method. CR8 and CR9 are RF switching diodes
designed to show very low resistance and capacitance when they are forward-biased.
During transmission, both CR8 and CR9 are switched on by the forward-bias from TX
8V. Under this condition, CR8 leads the output of the RF power module efficiently to
the lowpass filter stage, and CR9 absorbs the leaked RF energy to protect the receiver
frontend.
During reception, all the above states will become opposite, and weak incoming signal
can be introduced efficiently to the receiver frontend.
1-10
---IF--~ ..1»--------------------------------------
1 .4 Receiver
The receiver uses a double superheterodyne system with intermediate frequencies of
16.9MHz and 455kHz.
RF signal induced at the antenna passes through the lowpass filter network and then
guided to the frontend of the receiver.
RFAMP/BPF
Incoming signal is first fed to the double-tuned bandpass filter consisting of T1!f2 and
Cl-C4, and then amplified by the MOS FET RF amp Ql. The resultant signal is further
filtered through triple-tuned bandpass filter consisting of T3-T5 and C6-C12. The total
frequency response of the RF amp stage is 155MHz to 165MHz (3dB) as shown below.
T6
INCOMING
SIGNAL
155MHz 165MHz
1-11
FUAU•o
~ ~ ~ ~
T10 03
02 T9
q! I
rx.,
RF
SIGNAL
~
rx.,
J
I if ~ AL
RX8V
1st. LOCAL
FREQUENCY
(Frx- 16.9MHz)
mI
I
Yl
16.445MHz
FL2
455kHz
(CPU) (CPU)
1-12
- FURU-0 - - - - - - - - - - - - - - - - -
The 2nd oscillator, with the external crystal Y1, oscillates at 16.445MHz. The mixer
mixes this 2nd local frequency with the 1st IF signal of 16.9MHz. The 455kHz
(16.9MHz-16.445MHz) component of the mixer output is extracted through the exter-
nal ceramic filter FL2 and then fed back to the internallimiter amplifier. The limited
2nd IF signal is demodulated by the discriminator together with the external guad coil
T12.
The resultant audio signal is buffered and delivered to pin# 16 of U2. The audio signal
is also applied to the internal filter amp. The filter amp, with the associated CR
components, functions as an active high-pass filter peaking at 7.5kHz approx. That is,
the filter amp amplifies noise components, which may appear when no RF carrier is
received. The amplified noise is rectified by cr3/C23, voltage-adjusted by r5/R3
(SQUELCH pot) and then applied to the squelch comparator. When noise exists, i.e.,
when no signal exists, the RX MUTE2 output is in "H" state.
Q4 is a P-channel junction FET working on depression mode, and functions as a analog
switch for gating audio signal.
When some signal is received, q 1 in the hybrid module conducts to remove depression
bias to the analog gate. Demodulated signal, then, passes through this gate and reaches
the AF power amp via the VOLUME pot. While no signal is present, the analog gate
will be cut off to block the audio output.
The analog gate is also switched on and off by the RX MUTE 1 signal from the CPU for
muting unwanted noise which may otherwise appear at transition of TX/RX switching
~r channel-to-channel scanning. (Due to unlocked VCO/ PLL)
Another squelch signal (SQ OPEN/CLOSE = SIG/NO SIG) is output from pin #1 of
U2 to show the RF carrier is received or not. This signal is sensed by the CPU for
dwell/skip decision making during "scan" and "dual watch" operations. The output status
of SQ OPEN/CLOSE is always opposite to that ofRX MUTEl.
The audio signal from the analog gate is voltage adjusted by the VOLUME pot R4 and
then fed the the AF amp circuit.
AFPOWERAMP
The audio signal from the VOLUME pot is applied to the AF power amp U7. The AF
amp has a voltage gain of 50dB approx. or a max output of SW into 4-ohm speaker.
To the input ofU7, 1800Hz beep signal is also applied from the CPU through the preset
pot R58.
The AF power output is distributed to the handset speaker and to relay Kl. By the SP
ON/OFF signal from the CPU, Kl enables or disables the built-in speaker. Ql4/Q15
are for driving the relay coil.
1-13
FURUINIIO
. rL--,,
~·t=l(J
I
I
Pl Jl
,------!--f.}_.:......:.-<' 3 ~ AF SIGNAL
.__ __ _
x
!~ f--------1
I
______ I
___)
~-
1-14
FURU-0
·.-:
w
()
4.5MHz
X'TAL
EO
PHASE ERROR
TO CHARGE PUMP .. )
( LPF .. vco
FROM
vco
TX/RX
TX ON/rn=f
~/UNLOCK (LED)
RX MUTE1 ON/rn=f
ROM
PWR Hi/LO
RAM
SP ON/c:>Ff
LAMP ru:i=/DIM
LAMP c:>fF/MED
LATCH
1.8kHz BEEP
1-
i:iJ KEY SCAN
r·D-~~Y DATA
~ 1-----~
Ol? ~---v 1 KEY
()W
r.......... ---- ..... ,
...J() ...JU) :MATRIX:
..........
I I
LCD
1-15
---~--~ ..----------------------------------------
MICROPROCESSOR (CPU)
u3 on the PANEL BOARD is a 4-bit one-chip microprocessor designed for use with
radio tuners.
It contains CPU, ROM (16 x 2040 steps), RAM (4 x 256 words), LCD/KEY cont-
roller/driver, timer/counter, general-purpose I/0 ports, clock oscillator/divider and PLL
elements (prescaler, programmable divider, phase comparator, etc.).
(ROM)
The ROM (mask) contains the program instructions to perform intended operation.
Source data for all possible channel frequencies and attributes (e.g., Rx only, 1W only,
etc.) are also contained.
(RAM)
The RAM is used to store temporary data during computation, last used channel
-
number, user/private channel numbers and attributes of modified channels set by the
preset switches. The RAM contents are kept-alive by the external lithium battery even
when the power is turned off.
(Clock Oscillator)
The clock oscillator oscillates 4.5MHz reference frequency with the external crystal yl.
The 4.5MHz clock is divided by 2 and the 2.25MHz is used as the internal CPU clock.
The 2.25MHz clock is further divided by 180, and the resultant 25kHz is applied to one
input of the PLL phase comparator as a reference frequency.
(I/0 Ports)
Refer to the table shown below for brief function of each port.
PIN# SIGNAME IN/OUT BRIEF FUNCTION DESCRIPTION
1 N.C.
2
r------------~-
E01
~·----·---
OUT
~-----·--
Phase error output from internal phase corn-
3 E02 OUT parator. "H" level if VCO freq. is low, and "L"
level if it is high. (Hi-Z state if two freqs are equal.)
4 Vdd1 IN Under normal operation, + 5V is supplied to these
8~
Vdd2 IN pins. + 3V from lithium backup battery will take
it over when the mains power is removed.
5 VCOL IN VCO low freq. input. Not used in FM-2510
6 VCOH IN VCO high freq. input. Output of VCO is fed back to
this pin. Connected internally to ECL prescaler.
7 CE IN Chip enable input. + 5V is applied to this pin for
normal operation. If this pin is kept "L" state for
more than 134us, the CPU will execute termination
sequence and go into sleep state.
Continued
1-16
- - FUIRU. .O - - - - - - - - - - - - - - - - - - -
55 SO!KSO OUT
56 COMl OUT LCD common output
57 COM2 OUT
59 K3 IN Key status input of keyboard matrix
62 KO IN
63 AD IN ND converter input. Not used in FM-2510.
64 INT IN I Interrupt input to cause termination sequence
at _power-off.
1-17
- FUAUINIO - - - - - - - - - - - - - - - - -
POWER-ON RESET
At power-on, the CPU must be reset to run the program from the very beginning, it may
otherwise run erratically.
A low-to-high voltage transition at the Vdd (supply) or CE (chip enable) input terminal
causes reset to the CPU. As V dd can never be low state, because of the backup battery,
the CPU reset is done by applying positive transition to the CE terminal.
,--~~~~-;O~;;-·J··----··-··-·· BT~-----------··-··-···
! (3V) ~
+12V
I
~
S12
I crl
i (7.5V) CPU
rl
I r2
CE
i GND
!L ..L------------------------------------------------
_. ___________________________________________ _
r·- - - - -
current, driving q 1/q2 conductive. As the CE L to H transition of CE (with
result, a sharp low-to-high voltage transi- ov Vdd/ iNf H state) causes CPU
reset.
At power-off, all the user presets and last used channel information must be preserved
into backup RAM and the CPU clock generator must be disabled before the backup
battery takes place. Otherwise, the backup battery will be discharged in short period.
-12V
To cause the above termination sequence,
a high-to-low voltage transition must be ..--+-12-v--.J 7:~ ~
applied to the INT terminal while keeping
the CE terminal at low state.
5V
When the power switch is turned off and CE
ov
the input voltage drops down to 7.5V, cr1
zener suddenly stops drawing current, 5V---.--
3V -------~----~--
Vdd
driving q 1/q2 to off state. Consequently, 1
I
I H to L transition of iNi (with
the voltage at CE terminal drops to OV (or 5V--~
I
I CE L state) forces CPU to go
into termination sequence.
low state).
ov ------- -----------
1-18
- FURU-0 - - - - - - - - - - - - - - - -
As the input voltage drops further down to 5V (approx.), a high-to-low voltage transition
is given to the INT (interrupt) terminal. This forces the CPU to execute termination
sequence to back up RAM contents and to disable CPU clock.
When the input voltage is dropped below 3V, the lithium backup battery BTl takes over
the supply to V dd to preserve the RAM contents. As the CPU current drain at the
backup state is approximately lOuA, a 300mAH lithium backup battery should last for
more than 3 years.
KEYBOARD AND SWITCH SENSING
The front panel keys, the internal pushbutton switches and the DIP switch array are
connected in matrix form as shown below.
CPU (ul)
_I1_____ KSO~~-r~r-~-+~~
0. SCAN OUTPUT
'\
M.RCL SHIFT
__Il____ KSl~~--~--~-+~4-
CH
* H/l ENT
FRONT PANEL
KEYS
SPKR DW
____IL_ KS2 t---7-----fi-----+---r-----ir-----.---1------f- - - INTL CH16
-<
LOW PUSH
-
t----7---....----+-..---+..---~
INHIBIT RESET
__fl__ KS4 PWR >- BUTTON
-<
_ _ _n.__ KS5 ~---+---h--'--+.----1- AUTO
lW
SCAN PR IV
USA/
wx
INTERNAL
SWITCHES
DIP
DUP/
r -1 KO - - NP
SI MP
I I /
Q IGIK1
I 1- I
I ~I K2
I I
L _, K3
The keys are sensed by scanning in a certain interval. That is, the CPU puts "H" on row
lines (KSO-KS5) one by one, and at each time, the CPU reads the key data from the
column lines (KO-K3). If a key/switch is in "make" condition, the corresponding bit of
read key data becomes "H." The CPU can identify the pressed key by confirming the
row and the column information.
1-19
- FURU•o - - - - - - - - - - - - - - - - -
r·---------------------------------------
u,
r------·
+ 5V I CPU
PAO 1
r17
I
I
I
I
I
~
I
I
[_ _____ _
m I
---·-----------·---------------------·-
CONTACT I CONTACT I
: : :
CONTACT2
(PAO)
CONTACT2
CPAO) 'UL__jl__
u20 (PAl)
S11 is a 50 steps/revolution rotary switch and delivers two kinds of pulse signals
phase-shifted each other.
When the dial is turned clockwise, the contact 2 makes before the contact 1 does. On
the contrary, the contact 1 makes before the contact 2, when it is turned counterclock-
wtse.
The contact 1 signal is applied to the clock input of u2 (D-FF) after differentiated by
cl7/rl9 (sampling clock). While the contact 2 signal is applied directly to the "D" input
ofu2 (data input).
When the dial is rotated clockwise, the "L" part of contact 1 signal is sampled, and
accordingly, the "Q" output is kept "L" state. The "Q" out-put state will be opposite when
it is turned counterclockwise.
The CPU can sense number of moved steps by reading the internal IF counter, and the
rotated direction (CW/CCW) by reading the "Q" status through PAl.
1-20
.. ..----------------------------------------
---~ ~
DIMMER CONTROL
The brightness ofLCD/keyboard backlight is adjusted in four steps by the control signals
from PD2/PD3 ports of the CPU.
--------------------------------1
U1 ,
I
,. ...................... , ~~.!
~l0S1
! PD2 STATE DS1 DS2
!CDIM/
!CS'l+") !
+ 12V OFF OFF OFF
CPU I ON OFF
q9 i DIM
I MED OFF ON
: PD3
BRT ON ON
:(MED
~--·········jOFF) j
i
I
--------------------------------~
''-'o l BEEP
j BEEP VOLUME
I __
PR=ES;.:;.;ET;.,___
i
I
i
~--·-----------------------·
1-21
- FURU•o - - - - - - - - - - - - - - - - -
(Key Beep)
The key beep is a 50ms burst of 1800Hz
signal, generated everytime a front panel
key is pressed. It is used as an acknow-
ledgement for a key operation.
50mS
(Error Beep)
When wrong (or illegal) key sequence is
performed as in the following examples,
the CPU generates 50ms beep five times
to call operators attention.
50mS 50mS
• Pressed HI/LO key on "1 W only" channel.
• Selected dual watch function while on CH16.
• Recalled memory channel while no channel is programmed.
(Prompt Beep)
When an expected key sequence is
suspended on the way for certain period
as exampled below, three long beeps will
be generated to prompt the operator to
500mS 50mS
complete the key sequence.
• Pressed the SHIFf key, but no secondary function specified yet.
• Memory channel programming is not completed yet.
SPEAKER ON/OFF CONTROL
When a handset is used instead of a microphone, the built-in or external speaker may
be switched off to keep privacy.
By pressing the SHIFT and INTU(SP) key in sequence, the CPU puts on the"~"
indicator on the display, and sends "L" data to PDl port. This activates the relay Kl to
disconnect the built-in (or external) speaker from the AF AMP output. If the above key
sequence is performed again, the states change to opposite to enable the built-in
speaker. The handset speaker is not affected by the SPKR ON/OFF operation, since it
is directly connected to the AFA output.
AF SIGNAL
INTERNAL/
CPU (U1) +12V EXTERNAL SPEAKER
P2
PD 1 SP ON/OR"'
1-22
FUAUIMO
I------ANTENNA
CONST
fa
"
z
0
w I~~
oo fa
~
~
UNLOCK ...JZ
~ci
Q_
en en
"
z
0
X
~
~
~ ~
r-·o - - - - - - - ~ ---------------------------------- C") -------,
I ~ ~ ~ ~ I
I I
I PA3 PTT ON/OFF
:
TX/RX
RX MUTE
ON/OFF
PLL FREQ.
LOCK/ SET
SQUELCH TX
SIG/NOSIG ON/OFF
PER
HI/LO
J : ll
PTT
ON/OFF
PTT
UNLOCK 1
c p u 1 :
~-----------------------------------------------------·
RX MUTE ON/~
(PB3J
TX/RX
CPBOJ
PLL C~R/UNLOCK
(INTERNAL)
TX ON/~
(P81)
C!K] INDICATION
(LCD)
1-23
IPal~--11----------------------------------
CH X CH16 CH X
150mS 850mS
PLL ~/UNLOCK
(INSIDE CPU)
~50mS max.
sa SIG/~ ----DO-N-'T_C...,..AR-E-----,¥ DON'T CARE ¥DON'T CARE
(PA2)
2. If signal is detected on CH16, the receiver stays on CH16 as long as signal is there.
Even when signal disappeared on CH16, the receiver stays there for 5 extra seconds
to be able to leap over a short signal break. -
DUAL WATCH SEQUENCE WITH SIGNAL ON CH16
CH X CH16 CH X
PLL ~/UNLOCK
(INSIDE CPU)
Sa SIG/~
(PA2)
_DO_N_'T_C_AR_E_ __.f O '•~S'r----'f'-___DO_N_'T_C_ARE
\SIGNAL PRESENT \_SIGNAL
ON CH16 LOST.
(ANY LENGTH) (5 SEC)
1-24
---~-.~ ..----------------------------------------
(Scan Sequence)
When a scan mode is selected, the SCAN indicator appears on the display and the set
will start scanning of selected channel group.
In the scan mode, the transceiver control signals are issued in the following sequence.
1. If no signal is present on a channel, the receiver stays there for 150ms (actual RX
period is lOOms) and then proceeds to the next one.
2. If some signal is detected within the sensing period, the receiver locks on the channel
and keeps on signal sensing. If signal is there for more than 5 seconds, the set will
release the channel and will proceed to the next one.
If signal is detected but soon gone, the set stays on the channel for one extra second,
and then proceeds to the next one.
If the signal is lost just before "5 second timeout," the extra stay could be less than 1
second. In any case, the receiver will not stay on a channel for more than 5 seconds.
SCAN SEQUENCE
l· + +
CH2 CH3 CH4 •I• CH5 CHS
+ + CH7
PLL LOCK/UNLOCK
(INSIDE CPU)
I·
5 SEC EXTRA 1 SEC
SQ SIG/~
(PA2) \SIGNAL PRESENT
CONTINUOUSLY
DON'T CARE.
1-25
IPal~--11---------------------------------
CPU
LAMPS j MIXER (U1)
(Vdd) (DS1/2) j
LOGICS i
!
~~~7~---------4
I
.----lrx av I
i
i
0
w
I
<>>
1-N
us l
.......................... t. ····
SWITCH DIODES
(CR6/8/9)
MIC AMP (US)
~-
i en+
j P3 j J3
r·•·········-,
: PWR/ ~ 2 <;......~.._...._._ ____.
1VOL\( ~ ! l
js12 ~ 1 ~--......
L------~·_:::::::_::::,: ___ j I TX ON/OFF
~----------------------~ (CPU)
lOA I
MAINS
~1·~,
: j
----~----------~--~--~~ 012
R68 R54
INPUT
(12V) lOA i : VR1 CR11
~ll
DRIVER (09, U3-Vccl)
POWER CONTROL
(APC MODULE U6)
1-26
- - FURU-0 - - - - - - - - - - - - - - - - - - -
(Overvoltage Protector)
Protection against input overvoltage is done by a crow-bar circuit consisting of
Ql6/Ql3/Ql7NR3 and associated components.
VR3 is an 18V zener diode, and it is in high impedance state under normal input voltage.
If the input voltage exceeds 18V by some r~ason (due to poor charging system, connec-
tion to 24V battery, etc.), an avalanche current flows abruptly. This makes transistors
Ql7/Ql3 conductive, and then fires thyristor Q16. As Q16 is directly connected across
the input lines, lOA fuses Fl/F2 blow off to protect the internal circuit. C27 at the base
of Q 17 is to prevent unwanted thyristor trigger due to noise interference on the power
line.
(Overcurrent protection)
If the set draws excessive current by some fault, lOA fuses on the power lines simply
blow off to protect the internal circuit from more serious damages.
As the RF power module draws comparatively high current (SA approx.) during
transmission, the small POWER switch on the front panel can not handle such current.
For this reason, the main's input is directly connected to the RF power module. The
protection circuits are, thus, active even when the front panel POWER switch is turned
off.
(Voltage Regulators)
The input voltage is switched through the POWER switch S12, and then distributed to
AF power amp, SP ON/OFF relay, APC controller, 8V regulators (TX!RX BOARD)
and to 5V regulator (PANEL BOARD).
The 8V regulator US derives three 8V sources from the switched 12V.
CONST 8V is delivered constantly as long as the set is powered on. It is used in the
charge pump circuit on the PANEL BOARD, VCO circuit, RX IF module and GaAs
FETmixer.
TX 8V is delivered during transmission. It supplies power to the APC controller, T/R
switching diodes (CR8/CR9 and CR6) and the TX AF amp module US.
RX 8V is delivered during reception. It supplies power to the receiver RF/IF amplifier
stages and T/R switching diode U6 ..
Switched 12V supplied to the PANEL BOARD is used as the source for the illumination
lamps DS 1 and DS2. It is also regulated locally on the PANEL BOARD to SV to be
used as power for the CPU and other logic circuits.
1-27
---~~~--~~-------------------------------------
CHAPTER 2 SETTING UP
This chapter is provided with transceiver check, adjustment and DIP switch setting.
TB1
TXJRXBoard
00
OE9
U8
8 (8V: TX)
I
J/P2
-
I
I 1
6(8V: RX)
I
I
I
I
5 (8V)
1 I
I
I
9
T Photo No. 930
2-1
- - FURU-0 - - - - - - - - - - - - - - - - - - -
LF
Vacuum FM-2510
Voltmeter
50 ohms 160.625MHz
~--------------~
8ohms/1W
(enamelled)
2-2
--FURU-0-------------------
Power Meter
FM-2510
ANT
50 ohms
R53 ("APC")
R58 ("BEEP")
TX/RXBoard
T Photo No. 930
2-3
- FURU•o - - - - - - - - - - - - - - - -
PANEL Board
Standard Settings
Depending on the market, the set is delivered from the factory in one of the following
preset conditions.
S10 SUB-TYPE
No Function FM-2510-A FM-2510-8 FM-2510-C
1 USA.WX
Yes No No
(ON) (OFF) (OFF)
2 PRIVATE No No No
(OFF) (OFF) (OFF)
3 SCAN Yes Yes No
(ON) (ON) (OFF)
4 AUTO, lW Yes Yes Yes
(ON) (ON) (ON)
5 DUP/SMP - - -
(OFF) (OFF) (OFF)
6 NP - - -
(OFF) (OFF) (OFF)
CH70 Inhibit Inhibit Inhibit
Major USA, General FRANCE,
Market CANADA HOLLAND
2-4
- FURU•o - - - - - - - - - - - - - - - - -
If the preset does not meet the local regulations, the specifications may be changed by
the authorized agent or dealer, not by the operator or owner of the unit.
For further detail, refer to the Technical Information (Pub. No. TM-E5481-0B), issued
in Nov. 1989.
2-5
- - FURU-0 - - - - - - - - - - - - - - - - - - - - -
CHAPTER 3 MAINTENANC.E
~lOA~
(Lock)
~
~
(Unlock)
r·~~
~
~ ·~ ~
3-1
- - FURU•o - - - - - - - - - - - - - - - - - - -
PANEL Board -
T Photo No.?29
Lithium Battery
(Type: CR2032-Ff4-1, Code No.: 000-110-965)
When mounting a new battery, remove the parts of the portion @ shown below, taking
care not to make shortcircuit of the battery, and solder two terminals of the battery to the
PANEL board.
Solder them.
Portion@
(Cut these ones.)
PANEL Board
After replacing the battery, the MEMORY channels, PROHIBIT channels and LOW
POWER channels should be set again.
3-2
- FURUIMO - - - - - - - - - - - - - - - - -
CHAPTER 4 TROUBLESHOOTING
4.1 Display Self-Test
The LCD display can be checked by the built-in self-diagnosis test. To execute the
test, turn the power on while pressing and holding the [SHIFT] key. If the LCD display
is normal, the display should look something like the figure shown below. This is
displayed for five seconds twice, interrupted by a one-second pause. After that, the
transceiver will get into normal channel 16 reception. If there exists any missing
segment, the LCD or CPU on the CPU block (U1) may be defective. Replace the
PANEL board assembly.
(Hold)
+ rO ...
OFF
INTLUSA
HILOW
SHIFT
.fi(f' DW WX
aCAN MU.O
PraviBBA,x8
TX/RXBoard 00
+ -
(Code No.: 005-371
J/P3
08------------~
(Code No.: 000-110-985) u~ (12V)
PANEL Board
Assembly 9
CUP Block (U 1)
(Code No.: 005-371-410)
Bottom Yiew with Cover detached
4-1
---IP--~--11------------------------------------~
No
Charge battery or
replace it.
Turn on the power.
No
Defective TX/RX
Check the contacts board.
of both P2 and P3 on the
TX/RX board.
Next page
4-2
- FUIRU-0 - - - - - - - - - - - - - - - -
No
l Yes
Measure the voltages I Connect them tightly.
at P2 #5(8V) and #7(12V).
( OV should not be taken
from chassis but ground
on the board.)
j
No
Are they OK?
No
4-3
~al~--1)---------------------------------
Symptom 2 No transmission
Observe the LED (Before using this flow chart, confirm that
(UNLOCK) on Ul of the antenna cable is not immersed with
the PANEL board. water and insulation between center
( + ) and connector case (-) of coaxial
l plug is good.)
No
on the TX
FaultyUl.
Replace
Measure the voltage between the PANEL
P2 #4 (+)and #6 (-)during board assy.
transmission.
No
----------l
r-----~------------~
Measure the voltage Faulty CPU block (Ul)
at pin #S of US on the PANEL board.
on the TX/RX board Replace the board assy.
on transmission.
No
Faulty US.
Replace it.
Measure the voltage---~
across C53 on the TXJRX
board on transmission. _
Faulty U3.
Replace it.
4-4
- FUAUNO - - - - - - - - - - - - - - - - -
Symptom 3 No reception
Observe the LED (Before using this flow chart, be sure that the
(UNLOCK) on Ul of crystal(Yl) is fixed securely, the coaxial plug
the PANEL board. is connected firmly and antenna is not
smashed off.)
1
No
Faulty Ul.
Measure the voltage Replace the
between P2 #4( +) and PANEL
#6(-) on reception. board assy.
No
No
Faulty US.
Check emitter(source) Replace it.
voltage of each transistor
(FET), according to the
RX signal flow.
No
Defective corresponding
circuit. Replace it.
Replace the
TX/RX board.
4-5
FM-2510 VHF RADIOTELEPHONE
SYMBOL TYPE SPECIFICATIONS
I EP-1
CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS
~ ~ l'l :f3
• *' :::J-1-"·~
• ~ ~ ~ l'l:f3 M.
*' :::a-r•~
• ~
05503<12-0 0550332-0 000-1ll-059 FOR J14 ltl011)50001 T3 c-2v 12V 60MA 000-110-964
0)SC3ti0-0 O~S03'l0-0 000-111-0f>O FOR Jl. J3. 1B010500U2 T3 C-2V 12V 60>1A 000-110-964
J6
05S031S7-0 0550.387-0 000-110-9f>2 FOil T'll
RE 51 5 TOR ;'{).,
S't.'ITCit H~H
. 1BOb0001
1BO 150 002
160150003
SKitHAP
5KitH AP
SKH!IAP
2250064
2?50064
2250064
000-110-966
000-110-966
000-110-966
Hl0150004 SKHit AP 2250064 O'l0-11 o-966
180150005 SKHHAr 2250064 000-110-966
1B01~0006 5KHHAP 2250064 000-110-966
1B0150007 SKH:1PA 22500f>5 000-110-967
lBOlSOOOo SKH~.PA 2250065 000-110-967
lBO 150 0 09 SKHMPA 2250065 000-110-967
..
NOTE:
:
F"UIRU. .O FM-2510 VHF RADIOTELEPHONE
I EP-2
SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS
le .JJ. ~ ~ M. M ::J-1'·-ij-
• ;If 2 .fJ
loO 2c o 090
1602C0091
~~
r>0109E103PSOV
ElE-AlEU470
M.
0.01UF 501/
M ::J-1'·-fJ
000-253-436
• •
4 7UF 251/ 000-201-719
1B02C0092 fCE-AHU47.0 4 7UF 251/ 000-201-719
1602C0093 Ulf08X104ML45AC 0 .1UF 11>Y 000-251-4 71
180 2( 0094 lJlE08X104Ml45AC 0 .1UF 1611 000-251-4 71
1B02C0095 UAU05X472Kl05AC 4 70 OPF SOli ()00-111-019
1602C0097 ECC-F1H101JC 1 OOF'F, 5011 000-256-910
1802 05P0244 TX/RX 005-371-400 1602(0098 DIJ109E103P5011 0.01 UF 5011 000-253-436
DWG. No. E5481-008-B 1B02C0100 ECE-A1El1470 47UF 251/ 000-201-719
1602C0101 ECGI-flHH03JZ 0.01UF 5011 000-100-125
1B02C0102 ECE-A1HU010 lUF 5011 000-201-737
1602(0103 DlJ104(J102K5011 1000PF SOli 000-252-171
CAPACITOR :JJf"j'1- 1tl0 2C 0104 FCE-A1CU101 1 OOIJF 161/ 000-201-712
1602C0105 ECF-A1EU470 4 7UF 2511 000-201-719
1802(0001 ECC-FlH010CC 1PF ;OvDC 000-255-201 1!302C0106 ECF:-AlEU470 47UF 2511 000-201-719
1602C0002 ECC-FlH020CC 2PF 50V'f)C 000-255-202 1B02C0107 ECE-AlCU471 470MF 1611 000-201-714
1602(0003 ECC-F1H050CR 5PF )011 000-25 7-227 1tl02C0108 EClil-111H104JZ 0 .1UF 5011 000-261-524
1602C0004 ECC-F l 'i040CR 4PF 50 V 000-257-226 1602C0109 DlH08'3472K5011 4700PF 501/ 000-252-1!16
1602C0005 DD104610U50V 100 0 PF 5011 000-25 2-171
1602C0006 ECC-F1H050CR 5PF 501/ 000-257-227 1tl02C0110 DD1C4tl10?K50V 1000PF 5011 000-252-171
1602C0007 ECC-F1H050CR 5 PF 501/ 000-2S7-227 1B02C0111 UZF08X104t1l45AC 0.1UF 16V 000-251-4 71
1602C0008 ECC-F1H0600~ 6f'F 50 V 000-257-228 1602(0112 ECE-A1 VU4R7 4. 7UF 2511 000-201-727
1t:I02C0009 f)01088472K5011 47•JCPF 5 01/ 000-252-1~6 1802C0113 lJZEORX1il4Ml45AC 0.1lJF 16V 000-251-4 71
11:102(011) TF 311.'-45 2E 102G"~V 5u 1000P 5011 000-111-024
1B02C0010 ECC-F1 H030CC 3PF 5 ovr>c 000-£5~-203 1602(0117 UZE08X104Hl45AC 0.1UF 1611 000-2 51-4 71
1B02C0011 ECC-FlH020CC 2PF SOVDC 000-255-202 1B02C0113 UZE08X104Ml45AC 0 .1UF 1611 000-251-4 71
1B02C0012 ECC-F1H010CC 1PF 50 VDC 000-255-201 1B02C0119 UZE08X104:1l45AC 0 .1UF 1611 000-251-4 71
1602(0013 ECC-F1H680JC 6~PF 50 V 000-255-230
1B02C0014 DD108B472K5011 4700PF 50 V 000-252-11!6 1B02C0120 UZEO ~X 104Ml45AC 0 .1UF 16V 000-251-4 71
1602C0015 DOl 09E103P50V 0.01UF 501/ 000-253-4 ~6 11l02C0121 UZ fO 8X 10 4Ml4 SAC 0 .1UF 161/ 000-2Sl-4 71
1BO 2C0016 DD11>9E 10~P 5011 0. 0 lUF 50 V 000-253-436 1602C0122 UZE08X104t1L4SAC 0 .1UF 161/ 000-251-471
1B02C0017 DU109E103P50V 0.0 1UF 5011 000-2B-436 1602C0123 UZEO 8X 10 4ML4 SAC 0 .1UF 161/ 000-251-4 71
1B02C0018 DIJ104o102K5011 1000PF 50V 000-252-171 1B02C0124 UZE08X104Ml45AC 0 .1UF 1611 000-251-471
1802(0019 DD109E103P50V 0 .01UF 5011 000-253-4 36 1B02C0125 ECE-AlEU471 4 701JF 25V 000-201-723
1B02C0126 D0109El03P5011 0 .01UF 5011 000-253-436
1602C0020 Dll109[103P5011 0. 0 1UF 5011 000-253-436 1802(0127 ECE-AHIU010 lUF 50 V 000-201-737
1802(0021 ECC-F1H010CC 1PF 50VDC 000-255-201 1B02C0129 GR42-6 u10?KSUPT-400 IB.2-T4.0K 000-112-642
1B02C0022 ECE-AHU100 1 OUF 2SII 000-201-71b
1B02C0024 ECE-AlEU470 4 7UF 25V 000-201-719
1BO 2CO 02 5 ECE-A1~U010 1UF 5011 000-201-737
1802(0026 ECE-A1HU010 1UF 50 V 000-201-737 01 ODE ?"1':t-~"
1B02C0027 ECQ-fl1H103JZ 0. 01 UF 50 V 000-100-125
1B02C0028 DD109E103P50V 0.01UF 50 V 000-253-4 36 1802CR0001 155133 000-103-097
1602C0029 ECE-A1CKA101 100lJF 000-108-564 1£l02CR0002 151168 IIARI.CAP. 000-114-120
1B02CR0003 151168 VAR! .CAP. 000-114-120
1BO 2CO 030 DD104B10U50V 1000PF 5011 000-252-171 1B02CR0004 151168 IIARI.CAP. 000-114-120
160 2CO 031 ECC-F1H010CC 1PF 5 OV'f)C 000-255-201 1802Cfl0005 155135 000-108-075
1602(0032 DD104tl151K50V 150PF 501/ ooo-252-173 1tl02CR0006 15 513 5 000-108-075
1B02C0033 DD104ti102K5011 1000PF sov 000-252-171 1602CR0007 15 513 3 000-103-097
1602(0034 ECC-F1H100DC 10PF,5011 000-255-210 1BO 2CR0008 Ml402 000-133-821
1602(0035 ECC-F1H010CC 1PF 5 OVr>C 000-255-201 1602CR0009 Ml402 000-133-821
1602C0036 ECC-F1H100DC 10PF,5011 000-255-210
1B02C0037 DD104B1SlK 5011 150 PF 50 V 000-252-173 1602CR0010 155133 000-103-097
1802(0038 DD104tl102K5011 1000PF 5011 000-252-171 1602CR0011 MA671 000-107-970
1B02C0039 DD104d102K5011 1000PF 50V 000-252-171 1602CR0012 155133 000-103-097
1802(0040 DD109E103P5011 0. 01 UF 50 V 000-253-436
1B02C0041 DD1048102K50V 10 0 0 PF 5 ov 000-252~171
1BO 2C0042 ECC-F1H470JC 47-i>F SO Ill)( 000-255-226 FIlTER 71'1~?-
1BO 2C 0 043 ECC-F1H100DC 10PF,50V 000-255-210
1602C0044 ECC-FlH03oCC 3PF 50V'DC 000-255-203 1B02FL0001 "F 16RC 2 16.90011HZ 0550362-0 000-110-994
1602C0045 DD104~102K501/ 1000PF 5011 000-252-171 1B02FL0002 CFW455E 000-588-817
1B02C0046 DD104BlOU50V 1000PF 5011 000-252-171
1602(0047 OIJ104tl102K5011 1000PF 50 V 000-252-171
1B02CQ048 fCC-F1~470JC
1B02C0049 DD108El472K5011
4 7PF 501/0C
4700PF 5011
000-255-226
000-252-186 JACK ;.. .. ,..,,
1802C0050 DD104b10 2K 5011 1000PF 5011 000-252-171 1B02J0001 IL-S-4P-52T2-EF 1950079-0 000-108-081
1602C0051 ECC-F1H101JC 10 0 PF, 50 V 000-256-910 1B02J0002 IL-S-9P-S2T2-EF 000-110-998
1602(0052 DIJ104tl102KSOV 1000PF 50 V 000-252-171 1Bo2J0003 IL-5-2P-52T2-EF 1950079-0 000-108-109
1602C0053 DD109E103P5011 0. 0 1 UF 50 V 000-253-436 1tl02J0004 ll-S-2P-52T2-EF 1950079-0 000-108-109
1602C0054 DD104tHO 2K 5011 10 0 0 PF 50 V 000-252-171 1B02J0005 IL-S-2P-S2T2-EF 1950079-0 000-108-109
160 2CO 0 55 DD109E103P5011 O.OlUF 50 V 000-253-436 1B02J0006 ll-5-2P-52T2-t:F 1950079-0 000-108-109
1602(0056 DD104B102K50V lOOOPF 5011 000-252-171 1B02J0007 H5J0836-01-500 000-110-999
1B02C0057 ECC-FlH101JC 100PF, sov 000-256-910 1802J0008 IL-5-2P-S2T2-EF 19SOIJ7Y-O 000-108-109
1602C0058 ECE-A1EU470 4 7UF 2511 000-201-719 1BO 2JO 0 09 · I L -5-2 P-52T2-EF 19500 79-0 000-108-109
1B02C005Y ECC-F1H101JC 100PF, 5011 000-256-910
1BO 2J0010 IL-5-2P-52T2-EF 1950079-0 000-108-109
1B02C0060 DD108B472KSOV 4700PF 5011 000-252-1~6 1B02J0011 TMP-JO 1X-v6 0550455 000-509-859
1602C0061 DD055LOR5C500 0 .5PF, 50 01/ 000-111-018 1B02J0012 TMP-JOlX-1/6 0550455 000-509-859
1602(0062 DlJ104!H02K50V 1000PF 50 V 000-252-171 1B02J0013 IL-5-2P-52T2-EF 19500 79-0 000-108-109
1602(0063 UAU05X472Kl05AC 4700PF 5011 000-111-019 1tl0 2JO 014 IL-S-3P-52T2-EF 1950079-0 000-108-082
1802(0064 DDOoCH270J500 27PF 50 011 000-111-020
1B02C0065 D0095L?21K50Q 2 20PF 5001/ 000-111-021
1602(0066 DD06CH270JSOO 27PF 50 ov 000-111-020
1602(0068 DD05CH150J500 15PF 500V 000-111-022 f<ELAY IJ(J-
180 2CO 069 DD07Ct1330J500II 3WF 50 0 V 000-106-1 ~1
1B02K0001 G2Q-1013D 000-110-996
1802(0070 DlJOSCH180JSOO 1RPF 50 0 V 000-110-945
1802(0071 ECC-F1H100DC 10PF,50V 000-255-210
1tl02C0072 UAU05X472Kl05AC 4700PF 50 V 000-111-019
1602(0073 UAUO 5X4 72KLO SAC 4700PF 5011 000-111-019 eo IL J1'tlo
1602(0074 UAU05X472KL05AC 4700PF sov 000-111-019
1602(0075 DIJ109E103P5011 0.01UF 5011 000-253-436 1B02L0001 LAL03KH1ROM 000-111-001
1602(0076 DD108B472K5011 4700PF 5011 000-252-186 1B02L0002 5T517 0550384-0 000-111-002
1B02C0077 ECC-F1H101JC 100PF, 5011 000-256-910 1B02L0003 LALC3KHR!I2M tHO.O 000-111-003
1602C0078 fCC-F1H101JC 100PF, sov 000-256-910 1B02L0004 LALO 3K H4R7M N10. 0 0 0 0-111-0 0 4
1B02C007\I EC~-B1H223JZ 0. 2 2UF 50 V 000-100-127 1602L0005 5T516 0550383-0 000-111-005
1ti02L0006 LALC3KH1ROM 000-111-001
1BO 2CO 080 UZEORX104Ml454C 0 .1UF 16V 000-251-471 1B02L0007 51419 0550365-0 000-111-006
1BO 2CO 081 ECQ-81H223JZ 0.22UF 5011 000-100-127 1B02LOOO.S 51419 0550365-0 000-111-006
1B02C0082 DD104d102KSOV 1000PF 5011 000-252-171 1B02L0009 5T 419 0550365-0 000-111-006
1802(0083 D::H04tl102K5011 10UOPF 5011 000-252-171
1B02C0084 D0104b102K50V 1000PF 5011 000-252-171 1B02L0010 5T 419 0 550 365-0 000-111-0 06
1602(0085 GR42-6 i3102K50PT-400 Q3.2-T4.oK 000-112-642 1B02L0011 51420 0550366-0 000-111-007
1BO 2CO 086 EC5F1AE47o 4 711 F 10V 000-232-636 1tl02L0012 frj-30-50 000-111-001:!
1B02C0087 GR42-6 BlOUSOPT-400 Q3.2-T4.0K 000-112-642
1B02C0088 ECQ-B1H103JZ 0.01UF 5011 000-100-125
1B02C008\I ECQ-111H104JZ 0 .1UF 50 V 000-2()1-524
P051 STOR ;.."?.9
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SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS SYMBOL TYPE SPECIFICATIONS CODE NO. REMARKS
e ... 11. ~
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1B02Q0001 2SK241-GR 000-110-986
1B02Q0002 2SK125 000-129-359 1B02RV0001 ERZ-M14i.l'<-220'! 000-110-992
1B02Q0003 2SK241-GR 000-110-986
1802{1)0004 2SJ107-BL ooo-uo-9q7
1802Q0005 2SC2 34 7 000-126-162
1B02Q0006 2SC2347 000-126-162 lkANSFOfH'ER ~ ';;..},
1802Q0007 2SC2 34 7 000-126-162
1802{1)0008 2SC2347 000-126-162 180210001 5T421 0550367-0 000-111-009
180 21110 0 09 1B02T0002 5 T 42 2 05S0363-0 000-111-010
25C2053 0 0 0-12 5-9 61
180210003 51423 0550369-0 000-111-011
1802Q0010 2SA1015-Y 180210004 5T423 0550369-0 000-111-011
000-118-041
180 26l0 011 2SC1815-Y 000-125-6~1
1BU210005 5 T 421 0550367-0 000-111-009
1B02Q0012 258941-Q 000-110-91!8 1!10210006 51428 0550370-0 000-111-012
1802Q0013 2SA1020-Y 000-118-050 11:l02T0007 5T428 0550370-0 000-111-012
1B02Q0014 2SC2120-Y 000-101-822 1B02T0008 5 T 518 055031l5-0 000-111-013
1802{1)0015 180210009 51410 0550363-0 000-111-014
25C11H5-Y 0 0 0 -12 5 -6 31
1B02Gl0016 SF10B41 000-110-91l9
1802Q0017 2SC1815-Y 000-125-631 1802T0010 51416 0550365-0 000-111-014
1B02T0011 5T416 0550363-0 000-111-014
180210012 7LC352353 N4 ooo-424-1qo
1802T0013 5 T 501 05S03R6-0 000-111-015
1802T0014 ST 411l 0550364-0 000-111-016
RES! STOR HJ?
1 BO 210 015 5T418 0550364-0 000-111-016
1802R0001 ERD-16EJ470 0.1611 47 000-111-0 25
180 2RO 002 ERD-16EJ221 0.16111 220 000-1 tl-026
1802R0003 ERD-16EJ151 0.1611 150 000-111-027
1802R0004 ERD-16EJ151 o.16w 150 000-111-027 TERMINAL (JQAR[l 9J~I\"J
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OWG.NO. C5481-008-D
NO. I
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NAME TYPE CODE
I REMARKS
//
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TITLE MARINE VHF RADIOTELEPHONE 0
FM-251 0 EXPLODED VIEW I
DWG.NO.
E5481-006-B