Antenna Array Architecture ROBERT J. MAILLOUX, FELLOW, IEEE Invited Paper This paper presents an abbreviated view ofthe topics included in modern artay architecture. Too broad for any one presen liom the subject of architecture incldes all the elecromagnetc, ‘ermal, and mechanical aspects that need tobe addressed by he ‘array desig team. Ths paper emphases the interaction between the selection ofan array aperture organization, corporate feds, devices and elements, and includes 4s example a discussion of FHP monolihie array architecture 1. IwtRopuction ‘The “character and style of building,” of a structure or system, is architecture. Architecture implies that there are significant choices to be made, choices that completely alter the design, the packaging, the function, The great variety fof requirements for array antennas has created a myriad fof choices that need to be made by the antenna system ‘engineer, working in union with the radar, communication for avionics system engineer. ‘An existing corporate fed waveguide array with ferrite phase shifters at 2 GHz may be an ideal solution for ‘one task, but one cannot simply scale (divide) all dimen- sions by 60 to produce an equally suitable design at 120, GH, It is likely that at 120 GHe active cicuity will have replaced passive phase shifters, microstip replaced waveguide, patch or dipole elements replaced waveguide radiators, and monolithic fabrication replaced machined part fabrication, Completely diferent architectures are ap- propriate to these two systems. In a communication or radar system the ultimate signal to noise ratio is proportional to the product of transmiter antenna effective isotropic radiated power (EIRP) and the receiver gain (G) divided by the receiver noise temperature (7). The EIRP isthe power x gain product ofthe transmit, system. This EIRP xG/T parameter is a most basic re- ‘quirement, but a number of other electrical and mechanical specifications can take on equal importance. These include the electrical parameters: side lobe controVor adaptive nulling capability, polarization quality, beam scanning time, frequency, bandwidth, power level, scan coverage, cost, Manuscript civ October 9, 190; ised Ap 2, 199 acheter ihe Rone aby RA this Ar ee Bs, TEEE Log Number 910859 telibilty, maintainability: all are parameters that dictate fundamental architectural changes in the era ‘The array designer's or the design team’s task, is to select an appropriate architecture for the array subject 10 given constrains and the variety and interoperability of available components. This paper outlines some of the hoes available to the array system architect. ARCHITECTURE AND #15 ELEMENTS: ‘ORGANIZATION OF THE APERTURE ‘The array of Fig. 1(a) exhibits a degree of organization in that its laid out om a rectangular grid. At this Tevel the only ‘constraint that is applied tothe aperture of the planar array is thatthe spacings dr and dy be small enough to eliminate rating lobes (unwanted diffraction lobes). Tis well known constraint says that for any scan angle (8, @), there can exist, rating lobes at angles given by the direction cosines tum = uy + midy/Ay ty = 19+ dy/X — where uy = sin@eas¢ and vy = sinOsing. The criterion ‘that limits grating dimensions is that lobes that oceur within the unit ciecle teed @ fora rectangular array are allowed to radiate, while those outside are not Figure 1(a) does not show any essential organization that takes place behind the aperture. With a corporate fed array, the aay is often grouped into subarrays of rows, columns or areas as indicated in Figs. 1(b) and (@) with tach subarray fed separately. These figures also show two basic ways of constructing the array aperture. In Fig. 1(6) be array is assembled with circuits on boards that are mounted perpendicular to the array face. This assembly is called "brick “ construction [1]. The arca subarrays of Fig. (6) are assembled into a multiple layer aray in what thas been called “tle” construction [1]. The RF signals for tile subarrays are provided by a network that is parallel 10 the aray face, as shown in the figure. In both cases the subarrays could be monolithic active integrated circuits as shown, of mote conventional technology. US. Government Work Not Protec by US. Copyrightgaa 24D oO, cangt goa o ® Fig 1._Aray_nd subray confguations (a) Ree aay (recangua gi). (>) Come ssbunays wih “bk” cms (e) Area sara wiht" conto ‘The terms “brick” and “tile” relate to the way the aay is assembled, not the organization of the aperture. One ‘could assemble an array of column subarrays using the tile construct if the planar RF power dividers addressed columns of the array, or one could assemble an area subarray by insestng the subarray as a “brik” from behind the aperture. Timiting ease that will be described later is ‘when the aray is composed of single element “bricks” and inthis ease the bricks have been called “modules.” In terms of the quality of the array radiation pattern, the column subarray organization is usually prefereed 10 area subarrays because the power distribution network for ‘each row can be made with the proper taper fo side lobe reduction inthe plane ofthe row or column axis. Side lobe control in the orthogonal plane is provided by the power divider that excites the rows or columns. This selection of row/column excitation is readily achieved using power dividers below or in the plane of the aperture, nd for most applications where space permits, the brick fabrication is prefered because row/column tile fabrication leaves litle oom for phase shifters, corporate power dividers and other ‘components ‘Area subarrays (Fig. 1) are useful primar when the ‘whole array is uniformly illuminated, or atleast when the area subarrays themselves can have uniform illuminations, ‘To achieve low side lobes with area subarrays, the subar ay amplitude taper would need to be different for each subarray, and that is a costly design constraint. When the side lobe requirements are nol too severe, the subarray size ‘ean be chosen to use equal amplitude subarrays and to use as amplitude distribution a series of quantized steps as shown in Fig. 2a) (here shown for a —30-dB Chebyshev itlumination [2]. I'he subarrays are the same sie, then the periodic amplitude error causes well defined grating lobes {o appear a angles given by equation 1 with ir and dy ‘eplaced by the subatray dimensions (Fig. 2(0)). The figure also shows that nearly identical grating lobes occur for 40-08 taper. An important example using area subarrays is or low cost tile subarraysat millimeter wavelengths (See example in Section VIN) ‘Whether the array is composed of eoluma or area subar- rays, the choice of “brick” oF “tle” construction is a major architectural selection. “Brick” construction applies when the array can have greater depth. The increased volume allows more room for cievits, better thermal management with aro ligui cooling, and more convenient maintenance PROCEEDINGS OF THE EEE, VO. 5, NO, JANUARY 192lg 2 Ging aes of wiry emit cogs sh lips (64 cement sry) () amps vmiation (30-8 ‘Gotyaev stay eps) (0) Aray puter for ~30-0B i Temoaton (aba cee parily shown) (by removing bricks). Within each brick, the circuits can be fabricated by monolithic or hybrid integrated circuits if that technology is appropriate to the task. A final, major advantage ofthe “brick” construct sits compatibility with dipole and flared types of elements, which have significant bandwidth compared to the Mat printed elements used in the “ile” construc. “Tile” construction has several potential advantages, of which the primary one is that itis thin, with relatively ‘small volume, and s0 can be made conformal to aircraft ‘or missiles. Because the aperture i thin, it can be folded land stowed for erection in space. If process yields ate kept high, itis also inexpensive to produce, and compatible with robotic or other automatic means of fabrication. The disadvantages ofthis construction are: that it provides litle room for accurate tapered power distribution and so is not tisually employed for low side lobe arrays, that it i in general difficult remove the heat from the structure, that, it requites relatively narrow-band patch and printed dipole clements, and that itis dificult to maintain because parts ‘ofthe array are inacoessible, at least in the fied In matching the array tothe jb, the array system designer has to select three basic architectural components: the type ee © Oy © ig.3.Asay ei 4) lan corporat fed) Volume corp se tc) Sef tiny) Space eda.) Rees ty of array feed, the devices used, and the array elements themselves. These selections are not independent selecting any one impacts atleast one and usually both others. In the following section these options are discussed for a ‘generalized but planar array without special requirements for unusual bandwidth, ete IIL, Agay Faeps ‘Often the first decision made by the array designer is the selection of a corporate or space feed to distribute the RR signal from the input port to array elements. Figure ‘3(@)-{e) depit equal line length and series feeds that are “constrained” by transmission lines and power dividers, while Fig. 3(€) and (¢) show two kinds of space feeds. ‘The power distribution in space feds [4 like the Tens feed (ig, 3) and reflect aay (Fig. 3%€) is not constrained by transmission line circuits and so is lossless except for spillover and refletion loss. Space feeds require significant volume, while corporate fed structures can be made very ‘compact, whether using brick or tile constuction, Space fed arrays have been used (or are planned) for ground based arrays and etectable spaceborne arrays, while corporate fed systems are required for conformal or low profile airborne arays and certain ground based systems at lower frequencies (from HF through UHF). Throughout the SAF frequency range the selection of corporate or space feedsfor ground based arays depends upon the particulars of the system. Constrained feeds can provide highly accurate power istrbution to the array elements. This is proven to be tive for waveguide and air supported strip line power divides that have demonstrated very low side lobe levels. ‘A prime example is the low side lobe AWACS (E-3A) antenna [5] (Fig. 4) that rotates in azimuth, and so uses Precise waveguide arrays as row elements, and scans in the elevation plane. The insert below the figute shows a Iypleal edge slot geometry. The Ulta Low Side lobe array of the TPS-75 uses a similar concept, bu is equipped with ‘a lip beam matrix beam former to form 2 series of shaped elevation beams by combining sets of orthogonal constituent beams, One inherent disadvantage of constrained feed arrays isthe loss associated with the transmission medium and power dividers. Consrained feeds for tile construction are shown in Fig, (a) and for brick construction in Fig, 3(b). For the monolithic square array geometry of Fig. X@) with IV elements and inter element spacing d in both dimensions, the total sansmisson lie length in series with every element (V2 1)d. This same expression is is the length ofall the horizontal sections in series for the configuration of Fig. (6), so the monolithic geometry bas shorter transmission feed lines, because of the vertical line Jengths of Fig. 3b) not included in the above. ‘One can also show that either type of architecture has total of loga(2¥) power dividers in series with each element, fr, in terms of base 10 logarithms #PD's = 332log30(N), @ ‘An array of only 64 elements needs 6 power dividers in any series path. Thus even if the power divider loss is only a few tenths of 2 4B, the loss in these components is significant. When combined with the los due o line atten ‘uation, the net feed loss can be significant. An illustration ‘of how this can impact aray architecture is given in the Tater example at EHP ‘Constrained series feeds (Fig. (¢) are wsed with many radars because of weight and volume constraints. These include a variety of slotted waveguide line sources, and hhave been used in arrays with extremely low sie lobes in the plane of the line source axis. Series feeds are subject {o fundamental limitations in instantaneous bandwidth that varies as the inverse of the array length (or directly with the beamwidth) broadside array of elements spaced /2 spart and length L (using 1/2 using TEM (ait) transmission lines plus a phase reversal between elements ha fractional half power bandwidth of (3) AT _ 0.8869 faeces Despite this limitation, ia system requirement for @ one ‘dimensional scanning array is satisfied by this fractional ‘bandwidth, or if phase shifters can be reset for each beam, for example between hops ofa frequency hopped system, then series feeds may present the ideal solution, ® Fig-4._AWACS (P-3) ow sd te ay showing dpe tied ‘tudes (Connery of Wesnghoos Comore ta ows ‘spat ede sr poet ‘Space feeds (Fig. (6) and (e) are simple and inexpensive to construct and can be extremely efficient. They cin {incorporate amplitude taper inthe design of the feed horn ot feed array, and additonal taper can be introduced precisely by adding resistive dissipation, The Patsot radar [5] (Fi. '5) main array is an example of cost effective array design using space feed technology. IV. Devices aND "MODULES" FOR ARRAYS ‘The accompanying paper by Tang [6] describes signit- icant device developments for atray antennas. The avail- ability of a selection of power sources, phase shifter types and active amplifiers has a major impact on the choice of array architecture, The eatliest aray antennas, and many Dresent systems, are powered by a single RF source. In this case, the power source, whether traveling wave tube, lyst, magnetron or solid state souree, needs to have significant power to overcome distribution and phase shifter losses. Tube type sources for radar typically have hundreds of kilowatts to megawatts of peak power, operating ata duty eyles in the neighborhood of (001. Most communication systems use significantly less peak power, perhaps tens 10 hundreds of wats, but require a much higher duty cycle, bordering on CW in the limiting case. Some radars use ‘TWT’s asthe final ansmiting amplifier, and operate on a 30%-S0% duty eycle to maximize energy on target. ‘The use of a single source for aray RF power requires that losses be maintained as low as possible throughout the fed network and phase shifters. This tends to lead to space fed arrays with low loss phase shifter components, if this can be accommodated by the other issues that effect aray architecture. Unfortunately, space feeds might be too bulky, id ferrite phase shifters too slow for some application. In these applications diode phase shifter devices have foundig. 5. Pat air (Spe fo main ray). (Coates of Raytheon Caron) application with both space fed and corporate fed arrays ‘Compared to ferrites, diodes are lower power devices, and typical PIN diode phase shifters handle tens of watts 7}, while ferite phase shifters (8) handle hundreds of average watts and kilowatts of peak power. Diodes also Tequire substantial bias power when used as switches typically from $0 to several hundred milliwatts, depending ‘on required RF switched power and allowed insertion loss. Finally, diodes are more lossy than ferites. Ferrite phase shifters [8] can have loss under one dB at 44 GHz, while diode phase shifters might have one dB loss at $ GHz, but at least several dB at 44 GH A key advantage to diode phase shifter technology isthe ease of integrating such devices ino printed circuit arays. Many microstrip scanning arrays tse diode phase shifters, with their associated circuitry printed diteely on the array radiating face. An example Of this is shown later inthis paper. Diode phase shifters are the obvious choice for arrays with distributed solid state amplification ‘The term “module” can refer to a diode or ferite phase shifter, or an active transmiterireceiver (T/R) packaged 2s ‘8 unit for insertion into or behind the array face. Figure {6(a) shows an S band T/R module developed by Raytheon Corporation that produces 10 watts for application to a surveillance radar. Such packaged modules are obviously the limiting example of “brick” construction, with each module inserted separately 1 excite the aperture. Replace ‘ment of failed modules is usually designed to be a simple process, Figure 6(6) shows the same T/R module as Fig. 6(a), but repackaged to occupy less volume and mated 0 ‘microstrip antenna clement that is inserted into the front fof the module V. ARRAY ELEMENTS FOR VARIOUS ARRAY ARCHITECTURES. Selection of ile or brick (or module) architectures implies 1 choice of element type. The horizontal mounting of Circuits and devices in the tle configuration requires an element that can be manufactured by monolithic integrated circuit technology. Figure 72), (band (¢) shows a variety of elements used for monolithic ile fabrication, while Fig. 7a) shows a popular balun fed dipole element for “brick” fabrication. The basic microstrip patch element of Fig. (a) can be fed by a microstrip transmission line as shown, of ‘can be probe fed by a coaxial fine beneath the microstrip round plane In this form the microstrip element is narrow band, and offers only several percent bandwidth in an array environ- ment where the substate thickness must be restricted 10 avoid blind spots in the element patter [10]. The dual layer microstip patch of Fig. 7(o) is significantly wider brand hecause it has a double tuned frequency response Good scanning bebavior can be obtained with this element ‘over a bandwidth in excess of 10% [11], The requirement for vertical interconnects through molilayer printed circuit boards also provides «reason for using proximity coupled ‘elements. Slot elements as shown in Fig. 7(¢) have excellent Scanning behavior over wide bandwidths, but need metallicMig. 6. Active and psive sry mods (0) Active 5 an mle (b) Moe vag mirtip cavities to reduce the effects of propagating modes in the parallel plate feed waveguides (12). This adds an extra cost in fabrication, The printed circuit balun fed dipole antenna (Fig 71) is commonly used in “brick” array constructs, and shown in 4 number of antenna textbooks. Design deta are given in several references (13], [18]. This element operates aver up to 40% bandwidth with good scanning ‘charatcrsics, The ared notch and Vivala type elements [18], [26] (Fig. 7(€) and (O) that can provide over two ‘octaves of bandwidth, Arrays constructed with ative or passive modules, fre= quently use wavepuide or waveguide fed slot radiators ‘or dipole elements. Waveguide clements possess excellent broad-band, wide angle scanning characteristics, and would bbe the elements of choice for most applications except for compatibility issues and fabrication cost, Waveguide elements are machined or clecroformed, and most often built as an integral part of the module. ‘VL. SPECIAL ARCHITECTURES FoR WIDE-BAND ARRAYS. ‘The bandwidth of a conventional phase seanned array of length Lis imited because the pattern scans with frequency and hence moves off the target, The fractional bandwidth ‘of am aray is thus limited by this beam squint to af 7 ~ Lsindy 0.836 for scan angle My ‘To avoid the problem of beam squint, wide band arrays are required to use time delay units instead of phase shifters. Unfortunately the only time delay devices that have found extensive use ae acual switched sections of line, and these devices are costly and bulky. The lengths of switched line need to be comparable with the aray length, and require ‘many taps since the smallest incremental change must be on the order ofa few electrical degrees. Recent developments in switched fiber optic beamformers may lead to devices that are more compact while providing excellent broadband time delay [17] Figure 8 shows several basic circuit configurations for building time delay devices into an array. In Fig. 8(@), the time delay is incorporated atthe subsrray level, using ‘contiguous subarrays and time delay at the input to each subartay. The phase shifters within each subarray scan the subaray pattern to the desired angle at center frequency At other frequencies the phase shifters produce a periodicFig. 7, Ary semen (0) Direc coupled miaep gach. 0) Prosiiy coupled irs Fie. 7 Setlamen wit cecromgne coupling () Dipole raaing cement (2) Fo etc Se mea () Fed “Via sie semen. ‘error across the aay and result in grating lobe type side Jobes that ultimately limit the bandwidth (2) "To provide wide-band contol without the practical disad- ‘vantages indicated above, Fig. 8(b) shows an “overlapped” Subarraying system that uses a microwave optical multiple ‘beam feed to form subarrays. Unlike the contiguous subar ying system of Fig, S(@, the optically formed subarrays ‘overlap in the aperture, and each subarray radiates a broad fat-topped pattern that alow maximum bandwidth and ow sidelobes. When this is done the system bandwidth can be increased to approximately M times the phase steered array ‘bandwidth, where M is the numberof subacrays in the aay {and usually the number of elements in the feed array). “Another special architecture for incorporating time delay devies into an array combines a true time delay network tnd a complete set of phase shifters as shown in Fig. B(@). This network provides true time delay at only 3 small qumber of beam positions, a5 few as (wo 10 four ‘The phase shifters sean the beam over these small angle increments between these true time delayed positions. In cffect, the system bandwidth is multiplied by the number of true time delay postions, Moreover, the side lobe behavior is not degraded by the addition of periodic errors. One lisadvantage of the system is that all delay networks are ferent and large time delay units must be accommodated lat clements away from the array center, Although the time ‘delay network is shown as a number of time delay u the true time delays could also be implemented using & ‘multiple beam network as shown in Fig. (2). VIL, AN ARCHITECTURAL EXAMPLE: PLANAR EHP Low PROFILE ARRAY “The impact of component technology on array architec- ture is nowhere more evident than at frequencies above 20 GHz. Recent interest in. developing arrays at these frequencies has highlighted the lack of an adequate device find transmission media, and has forced development of an txttemely high technology solution, monolithic arrays with five devices at each element. The following development makes this choice plausible ‘Consider the example of a large array of 4000-6000 elements, at frequencies between 20 and 100 GHz (roughly the EHE band). An imposed requitement is that the aay fhave a low profile (possibly for conformal mounting). This ‘constant eliminate efficient space feeding technology and ‘waveguide corporate fed designs. The array isto scan with moderate bandwidth in two dimensions, and this eliminates radial waveguides and series feeds (which could otherwiseae « Sel ® mn I © ® Fig 5. Wie-bat uray congarins. (8) Coniganas ine dlaed sabre (0) Oveseped saburay apie wi ine dls. () Avy Ws ret tine dy sctngs ad we shies (G) Te te dey tod for pase ene a), satisfy the low profile requirement) The remaining feed architecture is the corporate monolithic power divider of Fig. 1(6) which emphasizes microstrip transmission with its inherent losses, bu its potential for low cost fabrication. Unfortunately, this kind of array will suffer due to large losses in the transmission lines. Figure 9(2) shows the directivity of uniformly illuminated square stray with various line los parameters and neglecting power divider losses. At broadside the gain for a square aperture of area “A with IV array elements and half wavelength spacing Gain = A 40" Howry, Figure 9(a) shows maximum gain for an array of clements with various Tine losses. The array directivity increases linearly with aperture area for the 2210 loss case. Ifthe array is small enough, and circuit losses not too large, then gain continues to increase with size, but gain is ultimately limited if line losses are not negligible ‘Typical loss values at EHF frequencies are 065 dB per wavelength for copper on quart, and 0.25 dB per wavelength for copper on a high dielectric sof substrate ‘or on GaAs. This figure does not show phase shifter loss, which will reduce each gain curve by a fixed amount. At EHF frequencies, a phase shifter loss of one dB represents the best that could be expected of ferrite technology, but is excluded in this example because of compatibility with ‘the monolithic constuction. PIN diode phase shifters have in the neighborhood of 2 10 3 4B loss at EHF, but at 250 ‘oF more milliwats dissipated per element, the array would ‘ced to dissipate atleast 1000 watts in an area of less than 9 inches in diameter at 20 GHz, and much smaller atthe higher frequencies. GaAs FET switches require negligible switching power, but present day devices in thee bit phase shifters present 8 to 10 dB loss. After adding this additional loss to the data of Fig, 9a) it i clear that in any case ‘most of the line povier is lost in the feed network. The array elfciency (not shown) can be seen as (in dB) as the ditference between the zer0 loss curve and the other curves, so itis clear that very Tile of the input power is actully being radiated, ‘The received G/T ratio is piven by using the above gain and noise temperature 7 evaluated for the passive or active array. This noise temperature is piven for a system with antenna temperature Ty at the antenna. Passive Array Ty e1Ta+ Toll ~ex) o T=T,+(Fa- 1% Active Array T=T. @ T,=(F=WTo+ Te Here thee, i the feed loss forthe passive aray and Ta is the effective antenna temperature seen atthe receiver input terminals. Fg is the noise figure of the passive receiver and F is the nose figure ofthe ative receiver. Figure 9(6) shows the normalized noise figure for the passive array with various tine losses, a receiver noise figure of 3 4B, and again not including phase shifter losses, ‘The figure8 Le ‘aoe ‘coc co) ower of Cements a @ ‘oy 6a (48, ® ig 9 Guin and G/T for pane and acive ays with Fe 2 se ay aay in os fotion of Tie To () AH Gh to pve and ste ays also shows G/T for active aray elements assuming noise figures of 3, 5, and 7 €B. The assumed temperature atthe fntenna terminals i 50°, likely value for such an antenna that does not see the cath directly. Assuming an array of shout 4000 elements, and subtracting some realistic phase shifter losses from the Fig. 9 values, this passive array has tess than 25 dB gain (Fig 9) and G/T far less than the active array data (dashed), even ifthe active amplifier noise gure is as high as 7 dB, This example shows that the active ‘monolithic architecture, with one amplifier, phase shifter, te, per element, has to be considered realistic. At 4000 Clements, the advantage in gain, added to the advantage in G/T is at least & 20 JB in link margin, ‘An example of such an array architecture is the 16 clement subarray [18] shown in Fig. 10. This subarrey is ssembled into the array in a layered tle configuration Selection of an active monolithic array places much ofthe burden on device development, but still the practical details of integrating these solid state devices raises a number of architectural issues. ‘he difficulty of fabricating reliable via holes through GaAs substrates restricts the substrate thickness t0 about (0.004 inches. With patch elements, this eight reduces the clement bandwidth to a few percent, depending upon the chosen frequency, which might require a subarray design MULTHELEMENT CHIP ig. 18.Sineen clement misosti pachsubsray on GaAs at Watt using electromagnetically coupled patches The present low efficiency of GaAs amplifiers leads 10 3 significa thermal problem within the array. For example, & Transmit array with 4000 clements producing 10 milliwatts teach element may operate at less than 8% power added ttiiency. This means 125 milliwatts per element is lost, ‘or 800 watts in the small array. Such a thermal load ‘ight require liquid cooling instead of the much simpler tir cooling. New and more efficient pseudomorphic Hemt {echinlogy with more than 30% efficiency could reduce the thermal load to one fourth of the previous value. This temphasizes the significant impact of device technology on array architecture "The thermal load requires 2 packaging technology that includes thermal conductive paths to remove hundreds of ‘watts from behind the small array face. In addition, for 2 recent example, 12 vertical inlerconnects were required pet element for a three bit phase shifter, amplifier bias, fd RF lines, This leads to 48 000 verica interconnects for 4 4000 element array. Such an immense number again highlights the need for new packaging technology. The new technology of ceramie packaging [19] using multiple layers fof alumina, stocked together using the cofred ceramic process, shows promise of solving the vertical inercon- feet problem. The via holes are stamped and filled with conductive ink, and all cieuit interconnects are patterned fon each layer. The entre structure, all horizontal circuits fand vertical interconnects are fired together to complete 3 tigid package, Using this technique it appears possible 10 form the thousands of required inerconneets for millimeter wave array fabrication, VII. ConcLusion “The architecture of a phased array antenna is resoht- tion of countless trade-offs that balance performance, costand reliability. Modern array technology has increased the ‘umber of options by introducing new devices and new transmission media which need to be integrated into the array design from the outst, ‘This paper has atempted to list some of the options presented to the array design team, and to indicate, 0 the extent possible, how these options interact. Beginning with the organization of the array aperture into various {geometrical subarays, through the selection of “brick” oF “tile” construction of the aperture itself and the choice of solid state or other technology fr array control al of these architectural decisions are within the preview of the antenna design team. REFERENCES (0) Kinz, J, Edvard, and. , Res, "V-band, space-based ‘hase ary” Mleowave vl 0, no yp 85-102, Ja, [2] Ro. Maitoux, “Aray grating lobes de 19 petade phase, amplitude and tine delay quantization IEEE Trans, Antennas Propaga, vol. AP32, 9p I364-136%, Dec. 1984, (9) 3am “Bandi er for pad ay antennas” in Phased array Amemas, Omer tnd Kel, Ei.” New York ‘anech Howse, 1972 (a) 3 Rika aed 1. Metacand, “Beam Forming Feet in ‘nena Handbook, Theory Applications end Deen YT. Lo Snd'S. W. Lee, Eds New Nore Van Nomtand Rah, ch. [51 E. Brookner, Ga, Radar Tecnology Dedham, MA: itech Howe, 197% (6) Ree “Avaywcholgy” Pro. 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Tangres, snd J. F Johanson, “Ende tapered slot antennas on dieltlesubstte,” TEEE TromeAnttans Propagat, vo. APS- pp 1392-140, 19K. (06) RP" Gian, “The Vieidl Ae” preveied at the Nin European Microwave Can, 197, (a7) WeNE"A Walt. Tanponan, , Newberg. and J.J. Lee “Wideband fer-ope ely stork for pared ay amen setng” Eecrom Lei, vo 2, pp lasba97 Oct. 198 [28] 3 Metiennn “Mogolhic phased rays for EHF communica tion ena,” Mirowave. pp. 13-125, Mar 988 (09) BR Shostak. £6" Smit, ieV¥nd RA. Paces “Ary back phe areitecre for mona mlrowave igi ci Presented athe IEEE AP-SIMIT Int Symp May 199 Robert J. Mallow (Fellow, IEEE) recived Ihe BS. degree inlet engines fm Nontesnern Universi, Boston MA, In 196, andthe MS. abd Pa epee fo Haren ‘eiverty, Cie, MA i 162 and 196, serps, rom 1955 t 1970 be wat with he NASA, ‘Beconce Rech Cel, Canrlge MA, From 1970 to 19%6 hes wih the Ae Fore Cambridge Rech Labrrey, MA, Preset "he st Chef of the Aneeas te Components Divison, Rome Lateral, Hamcom Ai Fue Bane, Ma Nel parti eters Ts Unters, Medtrd MA. His ser infest we eth sea of per cs and seam. Dr Malibos & 4 Rome Laboratory Fellow, + member of av Bete Et Ke Ne Sigma Xan Cons of URS le hs Bld oii he IEEE Aston sd Propagation Sect (APS) icing the Presidency in 1983 He har se ben 8 Daingd Les ft [APS tow and Aasocne ir ofthe IEEE Tastes Ov