CSE111 Logic Des

Major Task
Phase-2

Ahmed Almain
Zeyad Sabaa

0
Date of publication Dec 04, 2023

CSE111: Logic Design — Major Task

Ahmed Almain, and Zeyad Sabaa, ASU

ABSTRACT This project aims to design, simulate, and implement a sequential circuit and display its
output on a 7-segment display. This project presents a sequential circuit that counts and displays a specific
sequence of decimal numbers using D-type flip-flops, logic gates, and a 7-segment display. The circuit
generates the sequence of 3, 5, 0, 1, 4, 3, 2, back to 3, and repeats. Logisim was used to design the circuit.
The circuit enable to change the time of the clock. The output of the designed circuit was displayed on a
seven-segment display. The designed circuit offers a counter that counts a specific sequence with specific
time on the hardware.

INDEX TERMS sequential circuit, design, display

I. INTRODUCTION
The design and implementation of sequential
circuits using basic digital components is an
essential skill for computer engineering students.
Sequential circuits are widely used in various II. CIRCUIT DESIGN
applications, such as counters, registers, memory The design process involves several steps:
units, and state machines. One of the common types 1. Specification: The first step in circuit design is to
of sequential circuits is the synchronous counter. A define the problem that the circuit is intended to
synchronous counter can be designed using D-type solve. This includes specifying the inputs and
flip-flops, which are edge-triggered bistable devices outputs and the relationship between them.
that store one bit of information. The input 2. Schematic Capture: This involves creating a
sequence and the next state logic of the counter can diagram of the circuit, using symbols to represent
be hardwired into the circuit using logic gates, such the various components. This schematic serves as
as AND, OR, and NOT gates. The output of the a blueprint for the circuit design.
counter can be displayed on a 7-segment display, 3. Simulation: Once the schematic has been created,
which is a device that consists of seven LEDs it can be simulated to verify that it behaves as
arranged in a rectangular shape, each representing a expected. This involves applying a set of inputs
segment of a digit. By turning on or off the to the circuit and observing the resulting outputs.
appropriate segments, the circuit can display the 4. Layout: After the circuit has been verified
decimal numbers from 0 to 9 and some letters. through simulation, the next step is to create a
In this report, we present a sequential circuit that physical layout. This involves arranging the
counts and displays a specific sequence of decimal components on a silicon wafer in such a way as
numbers using D-type flip-flops, logic gates, and a to minimize the overall size of the circuit and the
7-segment display. The circuit generates the length of the interconnections.
sequence of 3, 5, 0, 1, 4, 3, 2, back to 3, and 5. Fabrication: The final step in circuit design is
repeats, using a synchronous counter. The counter fabrication, where the physical circuit is created
output is decoded into a 7-segment code that drives based on the layout.
the 7-segment display.

1
 3- We will replace the second 3 in the sequence
with 7, so we draw the state diagram for this
circuit.

This circuit aims to design and implement a

sequential circuit that counts and displays a specific
sequence of decimal numbers using D-type flip-
flops, logic gates, and a 7-segment display Figure-
1.

Figure 1 - The Design inputs and outputs

III. DESIGN STEPS

The following steps were used in the design
process:

1- We calculated the sequence of the circuit

form our IDs as shown in figure-2.

Figure 2 – calculating the sequence.

2- After calculating the sequence, we are

required to seek approval from the course
instructor before proceeding with the design
process. And he told us the sequence, which
is 3, 5, 0, 1, 4, 3, 2.

2
4- We draw the state diagram for the circuit as
shown in figure-3.

Figure 3 – state diagram.

5- We set the state table for the states int the

state diagram as shown in figure- 4.

Figure 4 – state table.

3
6- we used K-maps to simplify the outputs
functions as shown in figure- 5.
The function was as follows:

D1 = y1’y3+y1y3’ = y1 XOR y3
D2 = y2y3’ + y11y2 + y1y3’
D3 = y3’ + y1’y2

Figure 5 – K-maps.

4
7- we design a combinational circuit to convert the
7 to 3 as shown in figure- 6.

Figure 6 – converting circuit.

5
IV. SIMULATION
Simulation was performed using Logisim software as
shown in Figure-7.

Figure 7 - Simulated circuit

V. CIRCIUTS PARTS

a) combinational circuit to determine the inputs of

the flip flop

After setting the state table, we need a logic function

to take the present state as inputs and it’s output the
next state, so we design a combinational circuit.
The functions will be as follow:
D1 = y1’y3 + y1y3’ = y1 XOR y3
D2 = y2y3’ + y1y2 + y1y3’
D3 = y3’ + y1’y2
And the circuit diagram will be as shown in figure-8.

6
 Figure 8 -the combinational
circuit

7
b) Memory element (D type flip flop)
We use 3 D-flip flops to store 3 bits and make a
sequential circuit.
We take its input and output as shown in its
datasheet in figure-9.

Figure 9 – D-flip flop datasheet.

c) The clock
We use NE555, 10 micro capacitor,10 nano
capacitor, 10 k ohm, and variable resistance
100 k ohm to make the clock as shown in the
figure-10.
The variable resistance used to change the
frequency.

Figure 10 – the clock.

8
d) The converting circuit
the number 3 repeated in the sequence 2 times
so we need to replace the second 3 with 7 (as it
isn’t existed in the sequence).
Then we have to make a converting circuit as
shown in figure-7.
The functions will be as follow:
X = D1D2’
Y= D2
Z= D3

e)7-segmant display circuit.

This circuit in Figure-7 displays the output on the 7-segmant.
The circuit uses a 7-segmant driver to take the input
and control the screen.

9
Figure 11 - Captured pictures of the implemented

10
Figure 12 - Captured pictures of the implemented

11
VI. CONCLUSION
This project has demonstrated the design and implementation of a sequential circuit that counts and displays a
specific sequence of decimal numbers using D-type flip-flops, logic gates, and a 7-segment display. The project has
shown how to use a synchronous counter with hardwired input sequence and next state logic to generate the desired
sequence, how to use a decoder to convert the binary output of the counter into a 7-segment code, and how to use a
7-segment display to show the decimal numbers. The project has contributed to the learning outcomes of logic
design course, as it has enhanced the skills and knowledge of the students in designing and implementing sequential
circuits using basic digital components.

REFERENCES
M. Morris Mano and Michael D. Ciletti, “Digital Design with an
Introduction to The Verilog HDL” Solution Manual 5th Edition rev
02/14/2012

12