1/29/2025

Microcontroller Systems and

Applications
Course Instructor: Dr. Dev Narayan Yadav
Department of CSE, NIT Rourkela
Email: yadavd@nitrkl.ac.in
Mo. – 8349869748
Room – CS204

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Topics Covered
 Addressing Modes
• Implied Addressing
• Immediate Addressing
• Direct Addressing
• Register Indirect Addressing
• Register Addressing
 Instruction Set of 8085
• Data Transfer Instructions
• Arithmetic Instructions
• Logical Instructions
• Branch Instructions
• Machine Control Instructions

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Addressing Modes

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Addressing Modes
 The microprocessor has different ways of specifying the data
for the instruction. These are called “addressing modes”.
 Addressing modes of 8085:
• Implied Addressing
• Immediate Addressing
• Direct Addressing
• Register Indirect Addressing
• Register Addressing

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Implied Addressing Mode

 The operand is implied in instruction.
 In this mode, the microprocessor knows the location of data to be
process, and thus does not need to define it explicitly.
• CMA : Complement Accumulator
• STC : Set Carry
• CMC :Complement Carry

 Note: Instruction Size  Always 1-byte.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Immediate Addressing Mode

 The operand is in instruction.
 In this instruction data assembled as part of instruction.
 In simple word we can say, the value given by programmer is
directly moved into the location specified.
 The destination location could be register or an address in
memory.
• MVI B, 25H • By looking this instruction how you
• CPI 0CH. will identify that the data is in
instruction itself?
• LXI H, 3050H
• MVI  the I here indicates an
• LXI SP, 4050H Immediate data.

 Note: Instruction Size  2-byte or 3-byte.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Immediate Addressing Mode

 The operand is in instruction.
 In this instruction data assembled as part of instruction.
 In simple word we can say, the value given by programmer is
directly moved into the location specified.
 The destination location could be register or an address in
memory.
• MVI B, 25H • How to identify that the register
• CPI 0CH. given in instruction is referring to a
specific register or a register pair?
• LXI B, 3050H
• LXI  X in the instruction indicates
• LXI D, 4050H use of register pair.

 Note: Instruction Size  2-byte or 3 byte.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Register Addressing Mode

 The operand is in register.
 In this mode, the data to be accessed and operated upon, is present
in a register and us accessed by specifying the name of the
register.
• MOV A, B
• ADD C
• INR B • What is the difference between this two?
• INX B • INR B : B  B + 1 {Can impact Flags)
• INX B : BC  BC+1 {It will not impact flags}

 Note: Instruction Size  Always1-byte.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Direct Addressing Mode

 The address of an operand is in instruction.
 In this mode, the data stored in a memory location is accessed
using its address. Thus memory location is assembled as part of
instruction.
• LDA 2000H • By looking this instruction how to
• STA 2001H identify that the given immediate value
is 16-bit address?
• SHLD 2001H
• Look for I in instruction, if I is not
Memory available then we can conclude that it is
…..
an address.
2000 33
A  33 2001 65
…..

 Note: Instruction Size  Always 3-byte.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Register Indirect Addressing Mode

 The address of an operand is in register.
 In this mode, the register(s) hold the address of the location from
which data is to be retrieved.
• LDAX B Registers Memory
• MOV A, M A 65 F …..
• ADD M B  20 C  01 2000 33
D E 2001 65
• INR M ….
H L

 Note: Instruction Size  Always 1-byte.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Direct vs Register Indirect

 Why to use register indirect if we already have direct addressing?
Memory
Registers 0000 LDA 2001H LXI 2001
A 65 F . LDAX B
B  20 C  01 2000 33
D E 2001 65 3 byte
H L . 4 byte
FFFF

 If It is needed to load data from one/two location  LDA.

 If it is needed to load series of data  LDAX.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

The Operand M
 What is M in the following instructions?
• MOV A, M
• ADD M
• INR M
 The location stored in H-L pair is represented by M.

Registers Memory
A  65 F …..
B C 2020 33
D E 2021 65
H  20 L  21 …..

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Size of an Instruction
 How to identify the size of an instruction?
• MOV B, C • What will be size of this instruction?
• MVI B, 20H • An opcode  MOVE B, C1-Byte
• LXI B, 3050H
• What will be size of this instruction?
• 2-Byte, how?
• 1st byte  MVI B  an opcode
• 2nd byte  8-bit immediate data

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Size of an Instruction
 How to identify the size of an instruction?
• MOV B, C • What will be size of this instruction?
• MVI B, 20H • 3-Byte, how?
• LXI B, 3050H • 1st byte  LXI B  an opcode
• 2nd byte  30H
• 3rd byte  50H
• Can we make an opcode for
immediate value or address?
• No  all opcode will be utilized by
a single instruction.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Correct Instruction Selection

 Selection of an instruction can impact the efficiency (Program
size, # of cycles or T-states required etc.)
 Write an ALP to initialize 00H, 00H, 00H to register A, B and C.

• MVI A, 00H • MVI A, 00H • SUB A

• MVI B, 00H • MOV B, A • MOV B, A
• MVI C, 00H • MVI C, A • MOV C, A

Size  6 byte Size  4 byte Size  3 byte

Memory RD  6 Memory RD  4 Memory RD  3

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

8085 Instruction Set

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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8085 Instructions Sets

 Instruction: Set of commands that tell the processor what to do
(also known as instruction set architecture).
 Total 246 opcodes, 74 instructions (basic functions).
 These instructions can be grouped into five different groups:
• Data Transfer Instructions
• Arithmetic Instructions
• Logic Instructions
• Branch Instructions
• Machine Control Instructions

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Data Transfer Instructions

 MVI Rd, 8-bit-data : Move immediate 8-bit data to Rd.
: MVI A, 05H
: A 05H

 LXI Rp, 16-bit-addr : Move 16-bit address/data into register pair.

: LXI B, 3050H
: B  30, C 50

 Whatever LXI is doing can be done by writing MVI two times i.e.
MVI B, 30H; MVI C 50H. Why it is not a good choice?

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Data Transfer Instructions

 MVI M, 8-bit-data : Move immediate 8-bit data, to the location
hold by register pair H-L.
: MVI M, 25H
Registers Memory
A F …..
B C 2024
D E 2025 25
H20 L205 …..

 MOV Rd, Rs : Move the content of Rs to Rd.

: MOV B, C
: B  C {No change in the data of register C}

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Data Transfer Instructions

 MOV Rd, M : Move the content of location whose
address is in H-L pair to register Rd.
: MOV B, M
Memory Registers
…… A F
5050 25 B 25 C
….. D E
FFFF H50 L50

 MOV M, Rs : Move the content of Rs to the of location

whose address is in H-L pair.
: MOV M, C
Registers Memory
A F …..
B C35 2030 35
D E …..
H20 L30 FFFF

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Data Transfer Instructions

 LDA 16-bit-Addr : Move the content of location whose
address is given in instruction to accumulator.
Memory
…..
: LDA 2010H
2010 65 A  53
…..

 STA 16-bit-Addr : Move the content of Accumulator to the of

location given in instruction.
Memory : STA 4500H
…..
4500 53 A  53
…..

 Note: We do not have LDB, LDC, STB, STC.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Data Transfer Instructions

 LDAX Rp : Load the content of location pointed by
register pair Rp to Accumulator.
: LDAX B

 STAX Rp : Store the content of accumulator to location

pointed by register pair Rp
: STAX B

 Note: We do not have LDAX H and STAX H why?

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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The contents of the memory address specified by the 16-bit address are
loaded into the H register.
The contents of the next consecutive memory address (address + 1) are
loaded into the L register. it is for LHLD 1/29/2025

Data Transfer Instructions

 LHLD 16-bit-Addr : load content of 16-bit address and its
consecutive address to H-L pair.
: LHLD 2000

 SHLD 16-bit-Addr : Store the content of H-L pair to the given 16-
bit address and its consecutive address.
: SHLD 2050

 Note: lower byte lower address, higher byte  higher address.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Data Transfer Instructions

 PCHL : SP will get the value of H-L pair.

 XCHG : Exchange the value of H-L pair and D-E pair.

 XTHL : Exchange top of stack with H-L pair.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Data Transfer Instructions

 XTHL : Exchange top of stack with H-L pair.

Registers Stack Z 34 Stack L 01

A F SP 34 SP 01
B C SP+1 12 SP+1 20
D E SP+2 XX W 12 SP+2 XX H 20
H  20 L  01 … …

Registers
A F
B C
D E
W 12 H  12 L  34 Z 34

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Arithmetic Instructions
 ADD Rs : Add the value of Rs to accumulator and store
the result in accumulator.
: ADD B; A A+B

 ADD M : Add the content of the address stored in H-L

pair and accumulator.
: ADD M; A  A+[M]

 ADI 8-bit data : Add the content of Accumulator and the

immediate data..
: ADI 25H; A A+25H

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Arithmetic Instructions
 SUB Rs : Subtract the value of Rs from A.
: SUB B; A A-B

 SUB M : Subtract the content of the address stored in

H-L pair from accumulator.
: SUB M; A  A-[M]

 SUI 8-bit data : Subtract 8-bit immediate data from

Accumulator.
: SUI 25H; A A-25H

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Arithmetic Instructions
 ADC Rs : ADD with carry.
: ADC B; A A+B+CF
12 FF ADD
00 01
13 00 ADC

 ADC M : A  A+[M]+CF
 ACI 20H : A  A+25H+C
 SBB Rs : SBB B; A A-B-CF
 SBB M : A  A-[M]-CF
 SBI 30H : A A-30H-CF

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Arithmetic Instructions
 INR Rd : Increment Rd.
: B  B+1
: What if B = FF?

 INX Rp : Increment register pair.

: INX B; BC BC+1
: What if BC = FFFF?

 INR M : Increment M.
 DCR Rd : Decrement register Rd.
 DCX Rp : Decrement register pair.
 DCR M : Decrement M.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Arithmetic Instructions
• DAD Rp : double addition, (operand register pair)
: As it is a 16-bit addition, HL pair is used.
: HL HL + DE
: Multiply a 16 bit number by  DAD H

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Arithmetic Instructions
 DAA : Decimal adjust after addition.
: Important for the applications like calculator.
: The only instruction which works same for all
processors (even in modern processors).

24 H 20 H 25 H
25 H 30 H 25 H
49 H 50 H 4A H

Adjustment Adjustment Adjustment

Not Required Not Required Required

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Arithmetic Instructions
 How to Adjust : Lower Nibble (LN) and Higher Nibble (HN)
of Accumulator.
: If LN>9 or AC = 1; A A + 06

25 H 26 H 28 H
25 H 26 H 28 H
25 H 26 H 28 H
25 H 26 H 28 H
4A H 4C H 50 H
4A H 4C H 50 H
06 H 06 H 06 H
Adjustment 50 H Adjustmen 52 H Adjustment 56 H
Required t Required Required

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Arithmetic Instructions
 How to Adjust : If HN>9 or C = 1; A  A + 60 {equivalent
to adding 6 in higher nibble}

50 H 60 H 99 H
50 H 60 H 99 H
50 H 60 H 99 H
50 H 60 H 99 H
A0 H C0 H 32 H
A0 H C0 H 132 H
60 H 60 H 06 H
100 120 H Adjustment 38 H
Adjustmen Adjustment
t Required Required Required
99 H
99 H
32 H
06 H
38 H
60 H
198
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Logic Instructions
 ANA Rs : ANA B; A  A∧B
 ANA M : A  A ∧ [M]
 ANI 8-bit-data : ANI 25H; A A∧25H

 ORA Rs : ORA B; A  A∨B

 ORA M : A  A ∨ [M]
 ORI 8-bit-data : ORI 25H; A A∨25H

 XRA Rs : XRA B; A  A⊕B

 XRA M : A  A ⊕ [M]
 XRI 8-bit-data : XRI 25H; A A⊕25H

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Logic Instructions
 AND (∧) : AND anything with 0  0 00 0

: AND anything with 1  No Change. 01 0

10 0
11 1

 Clear the LN (value is unknown): with arithmetic operation

possible?
A(35)  0 0 1 1 0 1 0 1
ANI F0H  11110000
 00110000

 Use  Set the value of specific bit to 0 without affecting any

other bit (by performing AND with 0, other bits will be ANDed
with 1).

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Logic Instructions
00 0
 OR (∨) : OR anything with 0  No Change
01 1
: OR anything with 1  1
10 1
11 1

 Set value of LN (value is unknown)?

A(35)  0 0 1 1 0 1 0 1
ORI 0FH  00001111
 00111111

 Use  Set the value of specific bit to 1 without affecting any

other bit (by performing OR with 1, other bits will be ORed with
0).

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Logic Instructions
 XOR (∨) : XOR anything with 0  No Change 00 0
: XOR anything with 1  Complement 01 1
10 1
11 0

 Complement LN?
A(35)  0 0 1 1 0 1 0 1
XRI 0FH  00001111
 00111010

 Use  Complement specific bit without affecting any other bit

(by performing XOR with 1, other bits will be XORed with 0).

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Logic Instructions
 CMP Rs : Comparison is done by subtraction
: CMP B; calculate A-B, but do not store the result
check the carry flag.
[A-B]
CF ZF
A>B 0 0
A=B 0 1
A<B 1 0

 Similarly for CMP M and CPI 8-bit-data.

 CMA : A  𝐴̅

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Logic Instructions
 We have AND, OR, EXOR, NOT
 What if we are asked to implement functionality of, NOR and
XNOR?
• NAND = AND  NOT
• NOR = OR  NOT
• XNOR = XOR  NOT

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Logic Instructions
 RLC : Rotate Left with carry

CF MSB LSB

 RRC : Rotate right with carry

MSB LSB CF

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Logic Instructions
 RAL : Rotate Arithmetic Left

CF MSB LSB

 RAR : Rotate Arithmetic Right

MSB LSB CF

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Logic Instructions
 O/P of these operation?
• RLC, RRC:
• Value of LSB and MSB, we will lose carry with this instructions
• RAL, RAR:
• Value of LSB and MSB, without loosing value of CF.

• How to get original number  rotate opposite.

 Note: Operates on Accumulator.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Logic Instructions
 Applications of RLC, RRC, RAL, RAR:
• In the series of numbers  find out the even and odd numbers
• LSB  0, Even
• LSB  1, Odd
• Find out if the number is positive or negative?
• MSB  0, Positive
• MSB  1, Negative
• Count number of 1’s in the value stored in a register?
• Rotate Left 8 time, and check for the value of CF.
• Swap nibbles
• Rotate 4 times
• Check value of specific bit?
• Rotate required number of times
• Multiply and divide a number by 2?
• Rotate Left  Multiply by 2.
• Rotate Right  Divide by 2.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Branch Instructions
 Set of instructions that changes the order in which a
microprocessor executes instructions.
• Conditional: Continually taken
• Unconditional: Conditional branch instructions are dependent on flags.
• Sub-Routine: used for function call.
 All Applications  conditional loop, unconditional loop, infinite
loop, call, etc.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Branch Instructions
 JMP 16-bit-Addr : Jump to the given address unconditionally.

Memory
Microprocessor
…… …….
PC 1000 MVI B 05
1001 JMP 2000
….. ……
2000 ABC
2001 XYZ
….. …..

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Branch Instructions
 JMP 16-bit-Addr : Jump to the given address unconditionally.

Memory 1 Currently the PC is pointing at location

Microprocessor 1000.
…… …….
1
PC 1000 MVI B 05 2 Once the instruction located at 1000
2 1001 JMP 2000 will be fetched, PC will point at
….. …… location 1001.
3
2000 ABC
3 After fetching and decoding the
2001 XYZ
instruction available at 1001 micro-
….. ….. processor will come to know that it is a
JUMP instruction, thus PC will now
point to address 2000.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Branch Instructions
 How actually PC gets new address?
• Can we jump to location 2000 just after fetching JMP?
• Assume PC  1000, and the next instruction of the program is JMP 2000H.
• As JMP 2000H is a 3-byte instruction it will be stored at locations 1000,
1001 and 1002.

Memory
…… …….
PC 1000 JMP
1001 00
1002 20
1003 …..
….. …..
2000 ABC
2001 XYZ
….. …..

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Branch Instructions
 How actually PC gets new address?
• Assume PC  1000, and the next instruction of the program is JMP 2000H.
• As JMP 2000H is a 3-byte instruction it will be stored at locations 1000,
1001 and 1002.
• Can we jump to location 2000 just after fetching JMP?

Memory 1 At First the opcode JMP will be

…… ……. fetched, and PC will point at location
1 Z 00 1001, after decoding the fetched data
PC 1000 JMP
2 1001 00
the processor will come know that it
needs to fetch two more bytes from
1002 20
3 memory.
1003 ….
….. ….. 2 Processor will now fetch next byte
which is 00, and PC will point at
2000 ABC
location 1002. We can not assign value
2001 XYZ 00 to PC right now thus it will be saved
….. ….. at temporary register Z.
Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Branch Instructions
 How actually PC gets new address?

4 3 Now the third byte “20” will be

Memory fetched, and PC will point at location
…… ……. 1003 (because the execution is not
PC
1 Z 00
completed yet and processor does not
1000 JMP
2 1001 00 know the complete JMP address), the
1002 20 W 20 fetched data will be stored at temporary
3 register W.
1003 …..
….. …..
4 2000 ABC 4 After decoding the third byte, processor
will assign the value of Z and W to PC
2001 XYZ
and then PC will point at location
….. ….. 2000.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Branch Instructions
 JC : Jump if CF = 1
 JNC : Jump if CF = 0
 JZ : Jump if ZF = 1
 JNZ : Jump if ZF = 0
 JPE : Jump if P = 1
 JPO : Jump if P = 0
 JM : Jump if SF = 1
 JP : Jump if SF = 0

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Branch Instructions
 Infinite Loops
• Digital Watch, Internet Routers, Embedded Systems,

BACK 1000

Loop Loop
Body Body
….. …..
….. ….
JMP 1000
JMP BACK

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Branch Instructions
 Finite Loop
• Execute loop for specific # of times.
• Sorting, searching, simulations

MVI C 05H
1000 1000
Loop Loop
Body Body
. …..
Exitcond DCR C
JUMP BACK JNZ 1000
Next Instr. Next Instr.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Branch Instructions
 Finite Loops: Important Points
• Instr. JZN will check value of register C or flag?
• It will check Zero flag.
• Max value which can be assigned to any register?
• We can assign 00H to FF H  Max value 255 in decimal.
• What if we want to run code for 256 iterations?
• Assign C  00
• DCR will make it FF (1 iteration)
• Now FF  to 00 (255 iterations)
• Can we have some Instr. between DCR C and JNZ 1000?
• No, because each instruction can impact flag values.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Branch Operations
 Call & Return : For execution of sub-routine (function).
: PC should get its old value after completion
of sub-routine.
: i.e. Camera  WhatsApp, Instagram.

FUN-01

Sub-
Call FUN-01 Routine
Next Instr.
RETURN

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Branch Operations
 Call 2000 1 CALL is also a 3-byte instruction, thus
3 PC will fetch 3-byte data byte by byte,
temporary registers Z and Z will get
Memory
00H and 20H. The PC is pointing at
location 1003. As we have to return to
…… …….
location 1003 we cannot update PC
PC 1000 CALL value at this moment otherwise we will
1 1001 00 Z 00 lost the location hold by PC.
1002 20 W 20
2 And thus, PC value will be pushed to
1003 ….
stack. To PUSH the PC value in stack
….. ….. we have to decrement the SP value two
times, SP-1  10, and SP-203
2 Stack
…… ……. 3 After pushing the PC value to stack PC
SP-2 03 will be updated with the value hold by
temporary registers Z and W and the
SP-1 10
microprocessor will start execution of
SP XYZ the instructions written in sub-routine.
…. ….

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Branch Operations
 Call 2000
Memory 4 Once the execution of sub-routine is
…… …….
finished the stack will be popped and
the popped value will be assigned to
PC 1000 CALL
PC such that PC can point to its old
1001 00 location 1003 again.
1002 20
1003 ….
….. …..

4 Stack
…… …….
SP-2 03
SP-1 10
SP XYZ
…. ….

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Branch Instructions
 Call & Return: Important Points
• Can we assign an address to RETURN?
• Code for pushing PC  Stack (PUSH)
• Code for storing Stack value to PC (POP)

PUSH POP
SP  SP – 1 PCL  [SP]
[SP]  PCH SP  SP+1
SP  SP – 1 PCH  [SP]
[SP]  PCL SP  SP+1

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Branch Operations
 Least used instructions
CALL RETURN
CC : Call if CF = 1 RC : Return if CF = 1
CNC : Call if CF = 0 RNC : Return if CF = 0
CZ : Call if ZF = 1 RZ : Return if ZF = 1
CNZ : Call if ZF = 0 RNZ : Return if ZF = 0
CPE : Call if P = 1 RPE : Return if P = 1
CPO : Call if P = 0 RPO : Return if P = 0
CM : Call if SF = 1 RM : Return if SF = 1
CP : Call if SF = 0 RP : Return if SF = 0

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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Branch Operations
 RSTn : Used to call standard sub-routines.
: Call (nx8; where n=0, 1, 2,…,7)
: 1-byte instruction
: RST0 is equivalent to CALL 0000H
: RST 1  0008
: RST 2  0010
: RST 3  0018
: RST 4  0020
: RST 5  0028
: RST 6  0030
: RST 7  0038

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Machine Control Instruction

 PUSH Rp : Push content of register pair to stack.
 POP Rp : Pop top of stack to register pair.
 PUSH PSW : Push program status word (Accumulator + Flag)
 POP PSW : Pop to program status word (Accumulator + Flag)

 Note 1  PUSH and POP are 16-bit operations.

 Note 2  PUSH and POP does not support direct addressing the
operation can be done only with register pair (thus does not contain X in
the instruction).
 Note 3  Only PUSH and POP can use PSW

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

30
 1/29/2025

Machine Control Operations

 For operating with I/O devices only two instructions are used.
• IN
• OUT

 The address of I/O device are known as PORT.

• PORT Address range: 00 to FF (256 address/devices)
• IN 20H; A  [20H] : {A will get input from port 20H}.
• OUT 80H; [80H]  A : {Content of A will be send to port 80H}.

 All data transfer in this instructions are done through Accumulator.

• If you are asked to print value of B
 First move the value of B to A
 OUT PORT_NUM

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

Machine Control Operations

 SIM : Set Interrupt Mask
• Selectively enable or disable which type of interrupt will be handled.
 RIM : Read Interrupt Mask
• Check value of Interrupt mask register.
 EI (DI) : Enable Interrupt (Disable Interrupt)
• i.e. Airplane Mode
• By default interrupt is disabled (i.e. restart mobile device)
 NOP : No operation (Delay)
• Fetch  Decode  then only processor will know that he has do
nothing (time waste)
 HLT : Halt the 8085
• Do not use halt in board, use RST.

Dr. Dev Narayan Yadav Department of CSE, National Institute of Technology Rourkela

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