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# EEE 531: Semiconductor Device Theory I

EEE 531: Semiconductor Device Theory I
Instructor: Dragica Vasileska
(Notes provided by: Prof. Dieter Schroder)
Department of Electrical Engineering
Arizona State University
Topic covered:
• Introduction to some general concepts for PN-
junctions
EEE 531: Semiconductor Device Theory I
1. PN-junctions - General Consideration:
• PN-junction is a two terminal device.
• Based on the doping profile, PN-junctions can be
separated into two major categories:
- step junctions
p-side n-side
A D
N N −
p-side n-side
A D
N N −
ax
EEE 531: Semiconductor Device Theory I
(A) Equilibrium analysis of step junctions
(a) Built-in voltage V
bi
:
(b) Majority- minority carrier
relationship:
C
E
V
E
i
E
F
E
bi
qV
W
) (x ρ
x
-qN
A
qN
D
) (x V
x
bi
V
) (x E
x
max
E
p
x −
n
x
+
-
p-side
n-side
( ) ( )
( ) [ ]
[ ]

,
_

¸
¸

,
_

¸
¸
·
− ·
− ·
− + − ·
2 2
0 0
0
0
ln ln
exp
exp
i
D A
T
i
n p
B
bi
B F i i p
B i F i n
n
i F
p
F i bi
n
N N
V
n
n p
q
T k
V
T k E E n p
T k E E n n
E E E E qV
[ ]
[ ]
T bi n p
T bi p n
V V n n
V V p p
/ exp
/ exp
0 0
0 0
− ·
− ·
EEE 531: Semiconductor Device Theory I
(c) Depletion region width:
è Solve 1D Poisson equation using depletion charge
approximation, subject to the following boundary condi-
tions:
p-side:
n-side:
è Use the continuity of the two solutions at x=0, and
charge neutrality, to obtain the expression for the depletion
region width W:
0 ) ( ) ( , ) ( , 0 ) ( · · − · · −
p n bi n p
x E x E V x V x V
( )
2
0
2
) (
p
s
A
p
x x
k
qN
x V +
ε
·
( )
bi n
s
D
n
V x x
k
qN
x V + −
ε
− ·
2
0
2
) (
D A
bi D A s
n D p A
n p
p n
N qN
V N N k
W
x N x N
V V
W x x
) ( 2
) 0 ( ) 0 (
0
+ ε
· →
¹
¹
¹
)
¹
·
·
· +
EEE 531: Semiconductor Device Theory I
(d) Maximum electric field:
The maximum electric field, which occurs at the
metallurgical junction, is given by:
(e) Carrier concentration variation:
) (
0 0
max
D A s
D A
x
N N k
W N qN
dx
dV
E
+ ε
− · − ·
·
10
5
10
7
10
9
10
11
10
13
10
15
0 0.5 1 1.5 2 2.5 3 3.5
n [cm
-3
]
p [cm
-3
]
C
o
n
c
e
n
t
r
a
t
i
o
n

[
c
m
-
3
]
Distance [µm]
cm kV E
cm kV E
m W
cm N N
sim
DC
calc
D A
/ 93 . 8
/ 36 . 9
23 . 1
10
) max(
) max(
3 15

·
·
µ ·
· ·

EEE 531: Semiconductor Device Theory I
cm kV E cm kV E m W
cm N N
sim DC calc
D A
/ 93 . 8 , / 36 . 9 , 23 . 1
10
) max( ) max(
3 15
· · µ ·
· ·

-10
15
-5x10
14
0
5x10
14
10
15
0 0.5 1 1.5 2 2.5 3 3.5
ρ
(
x
)
/
q

[
c
m
-
3
]
Distance [µm]
-10
-8
-6
-4
-2
0
0 0.5 1 1.5 2 2.5 3 3.5
E
l
e
c
t
r
i
c

f
i
e
l
d

[
k
V
/
c
m
]
Distance [µm]
EEE 531: Semiconductor Device Theory I
cm kV E cm kV E m W
cm N cm N
sim DC calc
D A
/ 67 , / 53 . 49 , 328 . 0
10 , 10
) max( ) max(
3 18 3 16

· · µ ·
· ·
− −
-10
17
-5x10
16
0
5x10
16
10
17
0.6 0.8 1 1.2 1.4
ρ
(
x
)
/
q

[
c
m
-
3
]
Distance [µm]
-70
-60
-50
-40
-30
-20
-10
0
10
0.6 0.8 1 1.2 1.4
E
l
e
c
t
r
i
c

f
i
e
l
d

[
k
V
/
c
m
]
Distance [µm]
EEE 531: Semiconductor Device Theory I
(f) Depletion layer capacitance:
è Consider a p
+
n, or one-sided junction, for which:
è The depletion layer capacitance is calculated using:
( )
D
bi s
qN
V V k
W
m
0
2 ε
·
0
2
0
) ( 2 1
) ( 2 ε
· →
ε
· · ·
s D
bi
bi
s D D c
k qN
V V
C
V V
k qN
dV
dW qN
dV
dQ
C
m
m
V V
bi

V
2
1 C
D
N
slope
1

Forward bias
Reverse
bias
Measurement setup:
W
dW
~
V
v
ac
EEE 531: Semiconductor Device Theory I
(B) Equilibrium analysis of linearly-graded junction:
(a) Depletion layer width:
(c) Maximum electric field:
(d) Depletion layer capacitance:
Based on accurate numerical simulations, the depletion
layer capacitance can be more accurately calculated if V
bi
is replaced by the gradient voltage V
g
:
( )
3 / 1
0
12
1
]
1

¸
ε
·
qa
V V k
W
bi s
m
( )
3 / 1
2
0
2
12
1
]
1

¸

ε
·
V V
qak
C
bi
s
m
0
2
max
8 ε
− ·
s
k
qaW
E
1
]
1

¸

ε
·
3
0
2
8
ln
3
2
i
T s
T g
qn
V k a
V V

• Based on the doping profile.linearly-graded junctions ND − N A ND − N A ax p-side Step junction n-side p-side n-side Linearly-graded junction EEE 531: Semiconductor Device Theory I . PN-junctions .1.step junctions . PN-junctions can be separated into two major categories: .General Consideration: • PN-junction is a two terminal device.

minority carrier relationship: x E (x) − xp Emax xn pn0 = p p 0 exp[ Vbi / VT ] − n p 0 = nn0 exp[ Vbi / VT ] − x EEE 531: Semiconductor Device Theory I .(A) Equilibrium analysis of step junctions EC Ei qVbi EF EV p-side n-side W (a) Built-in voltage Vbi: qVbi = ( Ei − E F )p + ( E F − Ei )n nn0 = ni exp[ F − Ei ) k BT ] (E p p 0 = ni exp[ i − E F k BT ] E  N A N D  k BT  p p 0 nn0  V ln ≈ T ln 2  Vbi =  n2   n  q  i   i  ρ(x) + -qNA V (x) qND x Vbi (b) Majority.

(c) Depletion region width: è Solve 1D Poisson equation using depletion charge approximation. V ( xn ) = Vbi . to obtain the expression for the depletion region width W: xn + x p = W  V p (0) = Vn (0)  → W = 2k s ε0 ( N A + N D )Vbi  qN A N D  N A x p = N D xn  EEE 531: Semiconductor Device Theory I . subject to the following boundary conditions: V (− x p ) = 0. E (− xn ) = E ( x p ) = 0 qN A (x + x p )2 p-side: V p ( x) = 2k s ε0 qN D ( xn − x )2 + Vbi n-side: Vn ( x) = − 2k s ε0 è Use the continuity of the two solutions at x=0. and charge neutrality.

is given by: Emax dV =− dx x =0 qN A N DW =− k s ε0 ( N A + N D ) N A = N D = 1015 cm− 3 Wcalc = 1.5 Distance [µm] EEE 531: Semiconductor Device Theory I .5 1 1. which occurs at the metallurgical junction.5 3 3.93 kV / cm (e) Carrier concentration variation: 10 15 Concentration [cm-3] 10 10 13 11 n [cm ] 9 -3 -3 10 10 10 p [cm ] 7 5 0 0.(d) Maximum electric field: The maximum electric field.5 2 2.23 µm Emax( DC ) = 9.36 kV / cm Emax( sim ) = 8.

5 Distance [µm] Distance [µm] EEE 531: Semiconductor Device Theory I .5 2 2.5 3 3. Emax( DC ) = 9.5 1 1.5 1 1.5 2 2.5 3 3.23 µm.Wcalc 10 15 N A = N D = 1015 cm − 3 = 1. Emax( sim ) = 8.5 Electric field [kV/cm] 0 0.36 kV / cm.93 kV / cm 0 -2 -4 -6 -8 -10 ρ(x)/q [cm ] -3 5x10 14 0 -5x10 14 -10 15 0 0.

2 1.6 0.8 1 1.6 0.8 1 1. Emax( sim ) = 67 kV / cm 17 10 Electric field [kV/cm] 0 -10 -20 -30 -40 -50 -60 -70 0.4 Distance [µm] Distance [µm] EEE 531: Semiconductor Device Theory I .2 1.4 ρ(x)/q [cm ] -3 5x10 16 0 -5x10 16 -10 17 0. Emax( DC ) = 49. N D = 1018 cm − 3 = 0.328 µm.Wcalc 10 N A = 1016 cm − 3 .53 kV / cm.

for which: 2k s ε0 (Vbi m V ) W= qN D è The depletion layer capacitance is calculated using: C= 1 C2 dQc qN D dW qN D k s ε0 1 2(Vbi m V ) = = → 2= dV dV 2(Vbi m V ) qN D k s ε0 C Measurement setup: 1 slope ∝ ND Reverse bias Forward bias W vac ~ dW Vbi − V V V EEE 531: Semiconductor Device Theory I . or one-sided junction.(f) Depletion layer capacitance: è Consider a p+n.

the depletion layer capacitance can be more accurately calculated if Vbi is replaced by the gradient voltage Vg: a 2 k s ε0VT  2 Vg = VT ln  3  3  8qni  EEE 531: Semiconductor Device Theory I .(B) Equilibrium analysis of linearly-graded junction: (a) Depletion layer width: 12  k ε (V m V ) =  s 0 bi W  qa   1/ 3 (c) Maximum electric field: Emax (d) Depletion layer capacitance: qaW 2 =− 8k s ε0   C=  12  (Vbi m V ) 2 2 qak s ε0 1/ 3 Based on accurate numerical simulations.