CONTENTS:

Introduction
Block Diagram and Pin Description of the 8051
Registers
Memory mapping in 8051
Stack in the 8051
I/O Port Programming
Timer

Introduction :
Three criteria in Choosing a Microcontroller:
1. meeting the computing needs of the task efficiently and cost
effectively
speed, the amount of ROM and RAM, the number of I/O
ports and timers, size, packaging, power consumption
easy to upgrade
cost per unit
2. availability of software development tools
assemblers, debuggers, C compilers, emulator, simulator,
technical support
3. wide availability and reliable sources of the microcontrollers .

8 bit controllers more

requirements

Embedded System :

Development process
Planning of tasks & interactions

Revise !
edit

Debugging ???

taskcode1.A51

Assembler

misc.LIB

taskcode2.c

C-compiler

Linker/Locator
Embedded Systems

Download to board
Burn in EPROM
Fall 2004

8051 Microcontroller Kit Layout

General Purpose Microprocessor

v/s Microcontroller

Block Diagram : 8051

Block Diagram
External interrupts
Interrupt
Control

On-chip
ROM for
program
code

Delay
Generation
Labs

Timer/Counter

On-chip
RAM

Timer 1
Timer 0

Counter
Inputs

CPU

OSC

Bus
Control

4 I/O Ports

P0 P1 P2 P3

Stepper
motor
etc. Lab

Address/Data

Serial
Port

TxD RxD

PC Interface
Lab.

10

Internal
Data
Bus
ROM
Like
Brain

Oscillator
Like
Heart

Prepares
the
sequence
of
operation
s

Data flow
Like
BloodFlow
Ports like
Hands/Legs

11

8051 Block Diagram

12

13

14

Internal
Data
Bus
ROM
Like
Brain

Oscillator
Like
Heart

Prepares
the
sequence
of
operation
s

Data flow
Like
BloodFlow
Ports like
Hands/Legs

15

Signal
Pins

Figure
8051
pinouts &
Functions

8051 Block Diagram

Fetch Cycle

18

8051 Family State Sequence

19

8051 Architecture: Salient features

8 bit CPU with registers A and B

16 bit Program Counter and data pointer DPTR
8 bit Program Status Word
8 bit Stack Pointer
Internal RAM 128 bytes
4 Registers banks, each containing 8 Registers
16 bytes, may be addressed at the bit level
8 bytes of General Purpose memory
Internal ROM 4K
32 I/O pins as 4 eight bit ports: P0-P3
2 sixteen bit timer/counters: T0 and T1
Full duplex serial data receiver/transmitter: SBUF
Control registers: TCON, TMOD, SCON, PCON, IP AND IE
2 external and 3 internal interrupt sources
Oscillator and clock circuits.
20

Pin Description of the 8051

21

8051 Hardware Connections : Crystal Connection to 8051

Using a quartz crystal oscillator ( Frequency 11.0592 MHz)
We can observe the frequency on the XTAL2 pin.

Pin 18

C2
XTAL2
30pF
C1

Pin 19
XTAL1

30pF
GND

Pin 20

22

Pins of 8051
Vcc pin 40
Vcc provides supply voltage to the chip.
The voltage source is +5V.
GND pin 20 ground
XTAL1 and XTAL2 pins 19,18
RST pin 9 reset
It is an input pin and is active high normally low .
The high pulse must be high at least 2 machine cycles.
It is a power-on reset.
Upon applying a high pulse to RST, the microcontroller will
reset and all values in registers will be lost.
23

Pins of 8051

/EA pin 31 external access

There is no on-chip ROM in 8031 and 8032 .
The /EA pin is connected to GND to indicate the code is
stored externally.
/PSEN ALE are used for external ROM.
For 8051, /EA pin is connected to Vcc.
/ means active low.
/PSEN pin 29 program store enable
This is an output pin and is connected to the OE pin of the
ROM.
24

Pins of 8051
ALE pin 30 address latch enable
It is an output pin and is active high.
8051 port 0 provides both address and data.
The ALE pin is used for de-multiplexing the address
and data by connecting to the G pin of the 74LS373
latch.
I/O port pins
The four ports P0, P1, P2, and P3.
Each port uses 8 pins.
All I/O pins are bi-directional.
25

Pins of I/O Port

The 8051 has four I/O ports
Port 0 pins 32-39 P0 P0.0 P0.7
Port 1 pins 1-8 P1 P1.0 P1.7
Port 2 pins 21-28 P2 P2.0 P2.7
Port 3 pins 10-17 P3 P3.0 P3.7
Each port has 8 pins.
Named P0.X X=0,1,...,7 , P1.X, P2.X, P3.X
Ex P0.0 is the bit 0 LSB of P0
Ex P0.7 is the bit 7 MSB of P0
These 8 bits form a byte.
Each port can be used as input or output (bi-direction).
26

Power-On RESET Circuit

Vcc

+
10 uF

31
30 pF

8.2 K
30 pF

11.0592 MHz

19
18

EA/VPP
X1
X2

9 RST

27

Hardware Structure of I/O Pin

Each pin of I/O ports
Internal CPU bus communicate with CPU
A D latch store the value of this pin
D latch is controlled by Write to latch
Write to latch 1 write data into the D latch
2 Tri-state buffer
TB1: controlled by Read pin
Read pin 1 really read the data present at the pin
TB2: controlled by Read latch
Read latch 1 read value from internal latch
A transistor M1 gate
Gate=0: open
Gate=1: close
28

P89V51 RD2 :
Electrical Specs.( Threshold
Voltages)

29

30

P89V51RD2 : Timing Specs.

31

A Pin of Port 1
Read latch

TB2

Vcc
Load(L1)

Internal CPU
bus

Write to latch

Clk

P1.X
pin

P1.X
Q

M1

TB1

P0.x

Read pin

8051 IC
32

Writing 1 to Output Pin P1.X

Read latch

Vcc

TB2

Load(L1) 2. output pin is

Vcc

1. write a 1 to the pin

Internal CPU
bus

Write to latch

Clk

P1.X
pin

P1.X
Q

M1

output 1

TB1
Read pin

8051 IC
33

Writing 0 to Output Pin P1.X

Read latch

Vcc

TB2

Load(L1) 2. output pin is

ground

1. write a 0 to the pin

Internal CPU
bus

Write to latch

Clk

P1.X
pin

P1.X
Q

M1

output 0

TB1
Read pin

8051 IC
34

Reading High at Input Pin

Read latch
1.

TB2

write a 1 to the pin MOV

P1,#0FFH
Internal CPU bus

2. MOV A,P1

Vcc

external pin=High
Load(L1)

P1.X pin

P1.X
Write to latch

Clk

M1

TB1
Read pin
3. Read pin=1 Read latch=0
Write to latch=1

8051 IC
35

Reading Low at Input Pin

Read latch
1.

Vcc

2. MOV A,P1

TB2

write a 1 to the pin

Load(L1)

external pin=Low

MOV P1,#0FFH
Internal CPU bus

P1.X pin

P1.X
Write to latch

Clk

M1

TB1
Read pin
3. Read pin=1 Read latch=0
Write to latch=1

8051 IC
36

You can not Get Logic 1 with

Heavy Load and Weak Pull-up

37

Is it too much?
- its the beginning LOADING
EFFECT
( SOURCE
IS IN
PROBLEM

LOAD

38

A Pin of Port 0
Read latch

TB2

Internal CPU
bus

Write to latch

Clk

P0.X
pin

P1.X
Q

M1

TB1

P1.x

Read pin

8051 IC
39

Port 0 with Pull-Up Resistors

Vcc

Port 0

P0.0
DS5000 P0.1
P0.2
8751
P0.3
P0.4
8951
P0.5
P0.6
P0.7

10 K

40

Address
Lines

Bi-Directional
Data Lines
41

Data 5Ch
is in Flash
Memory

Instruction:
MOV A,# 3CH

74
3C

42

At RAM Address
3C hex - -

Instruction:
MOV A,3CH

Data is
7F hex

ACC
data
will be
7F h

E5
3C

43

Instruction: MOV p2,p0

Mov address, address
85

85
80
A0

44

Port 3 Alternate Functions

45

8051 PROG. MEMORY

46

8051 DATA MEMORY

47

Registers of 8051

48

 RAM memory space allocation in the 8051

7FH
Scratch pad RAM

30H
2FH
Bit-Addressable RAM
20H
1FH
18H
17H
10H
0FH
08H
07H
00H

Register Bank 3
Register Bank 2
Register Bank 1( Stack)
Register Bank 0

49

Address Modes

Bit-Oriented Data Transfer transfers between individual bits.

SFRs with addresses ending in 0 or 8 are bit-addressable. (80, 88, 90, 98,
etc)
Carry flag (C) (bit 7 in the PSW) is used as a single-bit accumulator
RAM bits in addresses 20-2F are bit addressable

Examples of bit transfers of special function register bits:

mov C, P0.0

; C bit 0 of P0
Prof. Cherrice
EE/CS-152: Microprocessors
andTraver

Bit addressable Area of RAM

mov R5,0fah
ANL A,#08H
mov c,23h.2
; Data from RAM location ; 23hex bit .2 is
transferred to carry

mov 35.7,c
; Data from Carry Flag bit is transferred ;
to RAM location 35 decimal bit .7 i.e. ; 23H
Mov p0.1 , c
; Carry bit is transferred to Port 0 bit .1
End
( NOTE : RAM Loactions 20 hex to 2f hex are Bit
Addressable Area ).
51

2F 7F
2E

Bit Addressable Memory

78

2D
2C

20h 2Fh (16 locations

X 8-bits = 128 bits)
Bit addressing:
mov C, 1Ah
or
mov C, 23h.2

2B
2A
29
28
27
26
25
24
23

1A

22
21
20

10
0F
07

08
06

05

04

03

02

01

00
Prof. Cherrice
EE/CS-152: Microprocessors
andTraver

Stack in the 8051

The register used to
access the stack is called
SP (stack pointer)
register.

7FH
Scratch pad RAM
30H
2FH

The stack pointer in the

8051 is only 8 bits wide,
which means that it can
take value 00 to FFH.
When 8051 powered up,
the SP register contains
value 07.

20H
1FH
18H
17H
10H
0FH
08H
07H
00H

Bit-Addressable
RAM
Register Bank 3
Register Bank 2
( Stack)
Register Bank 1
Register Bank 0

53

Stacks
push

pop

stack pointer
stack

Go do the stack exercise..

Prof. Cherrice
EE/CS-152: Microprocessors
andTraver

Timers
There are TWO general purpose 16 bit timers
TIMER MODES:
MODE 0
MODE 1
MODE 2
MODE 3
55

TIMER MODE 0
Setting timer X mode bits to 00 in the TMOD
registers results in using THX register as an
8 bit counter and TLX as a 5 bit counter;
pulse input is divided by 32d in TL so that
TH counts the original oscillator frequency
by a total 384d.

56

TIMER MODE 1
SIMILAR TO MODE 0 EXCEPT tlx IS
CONFIGURED AS A FULL 8 BIT COUNTER

57

TIMER MODE 2
The TLX is used as an 8 bit counter and
THX is used to hold a value that is loaded
into TLX every time TLX overflows from FFH
to 00H.

58

TIMER MODE 3
Timer 0 in mode 3 becomes two completely
separate 8 bit counters. Time 1 may work in
Mode 0, 1 and 2.

59

60

TMOD Register:

Gate : When set, timer

only runs while INT(0,1) is

high.

C/T : Counter/Timer select bit.

M1 : Mode bit 1.
M0 : Mode bit 0.
61

The Timer Control (TCON), Special Function Register:

TF1: Timer 1 overflow flag. Set when

timer rolls from all 1 s to 0
TR1: Timer 1 run control bit. Set to 1 by
program to enable count.
TF0: Timer 0 overflag. Set when timer
rolls from all 1 s to 0
TR0: Timer 0 run control bit. Set to 1 by
program to enable count.

62

TCON
IE1: External interrupt 1 edge flag. Set to 1 when H to L
edge signal is received on port 3 pin 3.3 ( INT1)
IT1: External interrupt 1 signal type control bit. Set to 1 by
program to enable external interrupt 1 to be triggered by a
falling edge signal. Set to 0 by by program to enable a low
level signal on external interrupt 1 to generate and
interrupt.
IE0: External interrupt 0 edge flag. External interrupt 1
edge flag. Set to 1 when H to L edge signal is received on
port 3 pin 3.2(INT0)
IT0: External interrupt 0 signal type control bit
63

PCB: 89c51 Microcontroller Ports

Port 1

Port 3

ATMEL 89c51 Microcontroller

Port 2

Port 0
64

PCB: 89c51 Microcontroller Card

Port 1

Port 3
Crystal
11.0592 MHz

Capacitors
30 pF
Microcontroller

ATMEL 89c51 Microcontroller

Resistor
Array (10K)

Burge
Strip
Header

Port 2

Port 0
65

PCB: 89c51 Microcontroller Card

Port 1

Port 3
Crystal
11.0592 MHz

Capacitors
30 pF
Microcontroller

ATMEL 89c51 Microcontroller

Resistor
Array (10K)

Burge
Strip
Header

Port 2

Port 0
66

PCB: 89c51 Microcontroller

Card
Pin 21
Of
89c51

Pin 40
of
89c51
ATMEL 89c51 Microcontroller

Pin 1 of
89c51

Pin 20
Of
89c51

67

Where is Clock Circuitry ?

ATMEL 89c51 Microcontroller

Clock
Circuitry
section

68

Clock circuitry components

Crystal
11.0592 MHz

Two
Capacitors
33 pF
ATMEL 89c51 Microcontroller

69

LED Array Card : To Port 0

LED Array
card to
PORT 0

ATMEL 89c51 Microcontroller

70

Interfacing DIP Switch & LED Array

PORT 0
DIP Switch

ATMEL Microcontroller 89c51

PORT 1
LED
Array

71

Stepper Motor Interfacing

ATMEL 89c51 Microcontroller

Stepper
Motor

Stepper Motor
Interfacing
P1.0 to P1.3
PORT 1 thru
ULN 2003
Driver

72

P.C. Serial(RS-232) Interfacing with uC 89c51

ATMEL 89c51 Microcontroller

Pin 10,11
to
MAX232

RS232 port
of P.C.

73

Embedded system-Spiral Model

74

75

What is Embedded System?

76

Microcontroller W/S
LAB. EXPERIMENTS
77

OVERVIEW DATA TRANSFERS

SOURCE OF
DATA

DESTINATION
OF DATA

MOV A,#56H

FLASH
MEMORY

ACCUMULATOR IMMEDIATE

MOV A,56H

RAM LOCATION ACCUMULATOR DIRECT

56H

MOV A,R1

RAM REGISTER ACCUMULATOR REGISTER

R1

MOV A,@ 56H

RAM LOCATION ACCUMULATOR REGISTER

WHOSE
INDIRECT
ADDRESS IS
STORED AT
LOCATION 56H

Instruction

ADDRESSING
MODE

Wednesday, July 8, 2015

Infinite Loops

Start: mov C, p3.7

mov p1.6, C
sjmp Start
Microcontroller application programs are almost always infinite loops!

Prof. Cherrice
EE/CS-152: Microprocessors
andTraver

Program for Blinking LEDs on

PORT 0
Include 89c51.mc
Loop:
Mov a,#55h
Mov p0,a
Jmp loop
80

LED In Sinking & Sourcing Mode

81

Lab. Experiment:
Alternately Blink LEDs at PORT 1 considering Delay

MOV A,#55H
MOV P1,A
LOOP: MOV R5,#0FFH
REPEAT3:
MOV R3,#0FFH
REPEAT2:
DJNZ R3,REPEAT2
DJNZ R5,REPEAT3
CPL A
MOV P1,A
JMP LOOP

Delay Loop

82

Lab. Experiment:
Connect LED Array to PORT 1. Scroll LEDs
one by one , in sinking mode

MOV A,#80H
MOV P1,A
LOOP: MOV R5,#0FFH
REPEAT3:
MOV R3,#0FFH
REPEAT2:
DJNZ R3,REPEAT2
DJNZ R5,REPEAT3
RR A
MOV P1,A
JMP LOOP

Delay Loop

83

Experiment 2 : DIP Switch & LED array Interfacing

Assumption : DIP Switch interfaced to

PORT 0 & LED Array interfaced to PORT 1.

MOV A,#0FFH
AGAIN:
MOV A,P0
MOV P1,A
JMP AGAIN
84

Lab. Experiment : Generation of Square

Wave

LOOP:
SETB P1.0
MOV R5,#3FH
CALL DELAY
CLR P1.0
MOV R5,#0FFH
CALL DELAY
JMP LOOP

DELAY:
NOP
DJNZ R5,AGAIN
RET

85

ULN 2003 DRIVER : For Driving

Stepper Motor

86

Lab. Experiment : Stepper Motor Controller

C1 EQU P1.0
C2 EQU P1.1
C3 EQU P1.2
C4 EQU P1.3
DATA EQU P1

MOV DATA , #00H

MOV A,#88H
ENDLESS:
RR A
MOV DATA,A
CALL DELAY
JMP ENDLESS

DELAY:
MOV R7,#0FFH
AGAIN:
NOP
NOP
DJNZ R7,AGAIN
RET

87

88

A simple project using

AT89C51

89

90

Bit addressable Area of RAM

mov R5,0fah
ANL A,#08H
mov c,23h.2

mov 35.7,c

; Data from RAM location

; 23hex bit .2 is transferred to carry
; Data from Carry Flag bit is transferred
; to RAM location 35 decimal bit .7
; Carry bit is transferred to Port 0 bit .1

Mov p0.1 , c
End
( NOTE : RAM Loactions 20 hex to 2f hex are Bit
Addressable Area ).

91

Microcontrollers

92

8051 Pin-out
RST Reset
HIGH for 2 clock cycles
Resets registers and
program counter (to 0000h)
for an orderly startup.

93

Program Status Word (PSW)

Pulse width modulator

Generates pulses with

specific high/low times
Duty cycle: % time high
Square wave: 50%
duty cycle
Common use: control
average voltage to
electric device
Simpler than DCDC converter or
digital-analog
converter
DC motor speed,
dimmer lights
Another use: encode
commands, receiver
uses timer to decode

pwm_o
clk
25% duty cycle average pwm_o is 1.25V

pwm_o
clk
50% duty cycle average pwm_o is 2.5V.

96

Stepper motor controller

Stepper motor: rotates fixed
number of degrees when
given a step signal
In contrast, DC motor just
rotates when power applied,
coasts to stop

Rotation achieved by
applying specific voltage
sequence to coils
Controller greatly simplifies
this

Sequence
1
2
3
4
5
Vd

A
+
+
+
1

B
+
+
+

A
+
+
16

B
+
+
Vm

2 MC3479P 15

14

13

12

Bias/Set

11

Phase A

Clk

10

CW/CCW

O|C

Full/Half Step

GND

Red
White
Yellow
Black

B
B
GND

A
A
B
B

Fall 2004

Stepper motor with controller

(driver)
/* main.c */

MC3479P
Stepper Motor
Driver
10
7
2 A B 15
3 A B 14

void main(void){

sbit clk=P1^1;
sbit cw=P1^0;

8051
CW/CCW
CLK

P1.0
P1.1

*/turn the motor forward */

cw=0;
/* set direction */
clk=0;
/* pulse clock */
delay();
clk=1;

void delay(void){
int i, j;
for (i=0; i<1000; i++)
for ( j=0; j<50; j++)
i = i + 0;
}

/*turn the motor backwards */

cw=1;
/* set direction */
clk=0;
/* pulse clock */
delay();
clk=1;
}

Stepper
Motor

The output pins on the stepper motor driver do not

provide enough current to drive the stepper motor.
To amplify the current, a buffer is needed. One
possible implementation of the buffers is pictured
to the left. Q1 is an MJE3055T NPN transistor
and Q2 is an MJE2955T PNP transistor. A is
connected to the 8051 microcontroller and B is
connected to the stepper motor.

1K

+V
Q1

Q2
1K

Fall 2004

Stepper motor without controller

(driver)

8051

P2.4

/*main.c*/
sbit notA=P2^0;
sbit isA=P2^1;
sbit notB=P2^2;
sbit isB=P2^3;
sbit dir=P2^4;

GND/ +V

P2.3
P2.2
P2.1
P2.0

Stepper
Motor

A possible way to implement the buffers is located below.

The 8051 alone cannot drive the stepper motor, so several
transistors were added to increase the current going to the
stepper motor. Q1 are MJE3055T NPN transistors and Q3
is an MJE2955T PNP transistor. A is connected to the 8051
microcontroller and B is connected to the stepper motor.
1K
+V

+V
Q1
B

1K

Q2

330

void delay(){
int a, b;
for(a=0; a<5000; a++)
for(b=0; b<10000; b++)
a=a+0;
}
void move(int dir, int steps) {
int y, z;
/* clockwise movement */
if(dir == 1){
for(y=0; y<=steps; y++){
for(z=0; z<=19; z+4){
isA=lookup[z];
isB=lookup[z+1];
notA=lookup[z+2];
notB=lookup[z+3];
delay();
}
}
}

/* counter clockwise movement */

if(dir==0){
for(y=0; y<=step; y++){
for(z=19; z>=0; z - 4){
isA=lookup[z];
isB=lookup[z-1];
notA=lookup[z -2];
notB=lookup[z-3];
delay( );
}
}
}
}
void main( ){
int z;
int lookup[20] = {
1, 1, 0, 0,
0, 1, 1, 0,
0, 0, 1, 1,
1, 0, 0, 1,
1, 1, 0, 0 };
while(1){
/*move forward, 15 degrees (2 steps) */
move(1, 2);
/* move backwards, 7.5 degrees (1step)*/
move(0, 1);
}
}

Fall 2004

Intel 8051 RAM

4 register banks

General user RAM

Special Function Registers (SFR)

100

8051 SFRs
Blue: related to the I/O ports

Yellow: control the configuration of 8051

Green: auxiliary SFRs

101

102

103

Block Diagram of 8051

Microcontroller

104

Schematic for Microcontroller

Board

105

106

8051 Block Diagram

107

8051 Family State Sequence

108

RAM

109

110

111

Using 7 Segment Display

112

113

114

115

Bit addressable Area of RAM

mov R5,0fah
ANL A,#08H
mov c,23h.2

mov 35.7,c

; Data from RAM location

; 23hex bit .2 is transferred to carry
; Data from Carry Flag bit is transferred
; to RAM location 35 decimal bit .7
; Carry bit is transferred to Port 0 bit .1

Mov p0.1 , c
End
( NOTE : RAM Loactions 20 hex to 2f hex are Bit
Addressable Area ).

116

Rotating Universal /DC Motor in Clockwise & Anticlockwise

using Microcontroller by Sensing position
REED
Sensor

T
A
N
K

MicroController

2 C.O. /
DPDT
Relay

89c51

DC Motor

117

Assembly Code for Sensing Position

MOV P1,#FFh
MOV A,P1
LOOP:
MOV R1,P1

; port1 as a input port

IF R1 = # FEh then ; 1111 1110

SETB P2.0
END IF
MOV R2,P1

IF R2=#FDh then ; 1111 1101

CLR P2.0
END IF
JMP LOOP

MicroController
89c51
From sensor 1st

Pin 1
P1.0
From sensor 2nd

Pin 2
P1.1
P 2.0

118