Lecture 11

Traffic Signal control Example

 Specifications
The main highway signal shall always remain on.
The sensor on the country road will give a signal (x=1)
when there are enough cars on the country road.
The highway signal shall go green yellow red and
then the country road signal shall go red green.
When country road cars are passed signal will be x=0
and country road signal shall go green yellow red
and then highway signal shall go red green.
Delay from one color to another shall be controllable
State Diagram Representation
 Brain storming
Inputs?
Outputs? Image: joanswan.blogspot.com

Sequential or combinational?
How to go from one to another state?
Test bench?
 Verilog Code

//`define is a compiler directive used to define text macros; makes code comprehensible
endmodule
Test Bench
end endmodule