Professional Documents
Culture Documents
Embedded Systems
Dr.SP.Natarajan
Professor,
Dept. Of Instrumentation
Engg.,
Annamalai University
Outline
Introduction
Embedded System Design
Formal System Specification
Introduction to POLIS Design Methodology
As example that uses a formal system specification
References
Glossary
Introduction
Main characteristics
– Typical Embedded System Constraints
– Distinctive Embedded System Attributes
– Reactive Real-Time Embedded Systems
What is an embedded system?
Embedded System =
Computer Inside a Product
What is an embedded system?
An embedded system
– uses a computer to perform some function, but
– is not used (nor perceived) as a computer
Software is used for features and flexibility
Hardware is used for performance
Typical characteristics
– it performs a single function
– it is part of a larger (controlled) system
– cost and reliability are often the most significant aspects
Typical Embedded System Organization
ADC
ASIC
DAC
FPGA
Embedded System Applications
Consumer electronics
(microwave oven, camera, ...)
Telecommunication switching and terminal
equipment
(cellular phone, ...)
Automotive, aero-spatial
(engine control, anti-lock brake, ...)
Plant control and production automation
(robot, plant monitor, ...)
Defense
(radar, intelligent weapon, ...)
Typical Embedded System Constraints
Hardware/Software
Partitioning and Allocation
HW Design SW Design
& Build & Code
Interface
Design
HW/SW
Integration
Problems with Past Design Method
Hardware/Software
Partitioning and Allocation
HW Design SW Design
& Build & Code
Interface
Design
HW/SW
Integration
Embedded System Design
Behavior/Architecture Co-Design Methodology
Architectural
Architectural
Behavioral Architectural
Architectural
Specifications
Specifications
Specification Specifications
Specifications
Mapping
High Level
Performance Simulation
System C HDL
Synthesis
Behavior/Architecture Co-Design
Goals
Consist of
– A functional specification, given as a set of explicit or
implicit relations which involve inputs, outputs and possibly
internal (state) information
– A set of properties that the design must satisfy, given as a
set of relations over inputs, outputs, and states, that can be
checked against the functional specification.
– A set of performance indices that evaluate the quality of
the design in terms of cost, reliability, speed, size, etc.,
given as a set of equations involving, among other things,
inputs and outputs.
– A set of constraints on performance indices, specified as
a set of inequalities.
Language
A language is based on
– a set of symbols
– rules for combining them (its syntax)
– rules for interpreting combinations of symbols (its
semantics).
Synthesis
The stage in the design refinement where a more
abstract specification is translated into a less
abstract specification
For embedded systems, synthesis is a combination
of manual and automatic processes, and is often
divided into three stages
– mapping to architecture, in which the general structure of
an implementation is chosen
– partitioning, in which the sections of a specification are
bound to the architectural units
– hardware and software synthesis, in which the details of
the units are filled out
Mapping from Specification to
Architecture
POLIS Co-design
– POLIS Co-design Methodology
Polis Design Flow
– The ESTEREL language
– The ECL language
– CFSM (Codesign Finite State Machines)
– Why hardware prototypes ?
POLIS Co-design
<More…>
POLIS Co-design Methodology
Partitioning CFSMs
Rapid prototyping
Polis Design Flow
System specification:
– ESTEREL
– ECL
– graphical CFSM net editor
SW synthesis and estimation
High-level co-simulation
– functional debugging
– architecture selection and evaluation
Formal verification
SW, HW, RTOS synthesis
Low-level co-simulation and prototyping
The ESTEREL language
Designed at INRIA
Textual imperative language with sequential
an concurrent statements that describe
hierarchically-arranged processes
High-level reactive control (signals,
concurrency, pre-emption)
Rigorous mathematical semantics (FSM)
Strong analysis and optimization tools
<Example>
The ECL language
ECL
Specification
Simulation
Model
Implementation
HW / SW
CFSM
<Example>
Finite State Machines (FSM)
FSMs are an attractive model for embedded systems because:
– The amount of memory required is always decidable
– Halting and performance questions are always decidable
– In theory, each state can be examined in finite time
A FSM consists of:
– A set of input symbols
– A set of output signals
– A finite set of states with an initial state
– An output function mapping inputs and states to outputs
– A next-state function mapping inputs and states to (next) states
Good for modeling sequential behavior
Impractical for modeling concurrency without mechanisms
that reduce the complexity (e.g. non-determinism)
Event
Examples:
– valued event : temperature sample
– pure event : excessive temperature alarm
Why hardware prototypes ?
ASIC
– Application-Specific Integrated Circuit. A piece of custom-
designed hardware in a chip.
Glossary
FPGA
– Field Programmable Gate Array. A type of logic chip, with
thousands of internal gates, that can be programmed.
FPGAs are especially popular for prototyping integrated
circuit designs. However, once the design is finalized, hard-
wired chips called ASICs are often used instead for their
faster performance and lower cost.
Glossary
Firmware
– Embedded software that is stored as object code within a
ROM. This name is more common among the users of
digital signal processors.
Microcontroller
– A microcontroller is very similar to a microprocessor. The
main difference is that a microcontroller is designed
specifically for use in embedded systems. Microcontrollers
typically include a CPU, memory (a small amount of RAM
and/or ROM), and other peripherals on the same chip.
Common examples are the PIC and 8051, Intel's 80196,
and Motorola's 68HCxx series.
Glossary
MAC (multiply-and-accumulate)
– A special CPU instruction, common on
digital signal processors, that performs both a multiplication
and an addition in a single instruction cycle. The result of
the multiplication is typically added to a sum kept in a
register. A multiply-and-accumulate (MAC) instruction is
helpful for speeding up the execution of the digital filters
and transforms required in signal processing applications.
Real-time system
– Any computer system, embedded or otherwise, that has
deadlines. The following question can be used to distinguish
real-time systems from the rest: "Is a late answer as bad, or
even worse, than a wrong answer?" In other words, what
happens if the computation doesn't finish in time? If nothing
bad happens, it's not a real-time system. If someone dies or
the mission fails, it's generally considered "hard" real-time,
which is meant to imply that the system has "hard"
deadlines. Everything in between is "soft" real-time.
Key aspects of the methodology
module counter:
input go, reset, req; output ack(integer);
var t:integer in
loop do req and not go
t:=0; => ack(t)
every go do
s1 s0
t:=t+1;
await req; emit ack(t) go => t:=t+1
end
watching reset reset => t:=0
end end.
Example : complete ECL module
typedef { byte hdr[HSIZE]; byte data[DSIZE]; int crc; } frame_t;
module frame_proc (input byte in, output frame_t out)
{
signal frame_t frame; signal bad_crc;
byte buf[SIZE]; frame_t f; int crc;
while (1) { /* get bytes into frame */
for (i = 0; i < SIZE; i++) {await (in); buf[i] = in;}
create_frame_from_buffer(&f, buf);
emit (frame, f);
} PAR
while (1) { /* check CRC */
await (frame);
for (i = 0; i < HSIZE; i++) crc ^= frame.hdr[i];
if (crc != frame.crc) emit (bad_crc);
} PAR
while (1) { /* process address (if correct) */
await (frame);
do { /* … */; emit (out, frame) } abort (bad_crc);
}}
CFSM Example
Informal specification:
If the driver
turns on the key, and
does not fasten the seat belt within 5 seconds
then an alarm beeps
for 5 seconds, or
until the driver fastens the seat belt, or
until the driver turns off the key
CFSM Example
END_TIMER_10 or
BELT_ON or
ALARM
KEY_OFF => ALARM_OFF