Electromagnetic compatibility of

Integrated Circuits

Etienne SICARD
INSA/DGEI
University of Toulouse
31077 Toulouse - France Sept. 18-22, 2017
Etienne.sicard@insa-toulouse.fr

Alexandre BOYER
INSA/DGEI – LAAS-CNRS
University of Toulouse
31077 Toulouse - France
Alexandre.boyer@insa-toulouse.fr
www.etienne-sicard.fr > Teaching > EMC of ICs

www.ic-emc.org
1 December 19
Objectives
 Understand parasitic emission
mechanisms
 Introduce parasitic emission
reduction strategies
 Give an overview of emission and
susceptibility measurement
standards
 Power Decoupling Network
modelling
 Basis of conducted and radiated
emission modelling
 Basis of immunity modelling
 Hands-on experience in IC
emission and immunity
measurements

2 December 19
 Agenda
Date Morning Afternoon
Welcome
Day 1,
Overview, Basic concepts Illustration of basic concepts using IC-EMC
Sept 18
(E. Sicard)
• Group 1: lab – emission measurement
methods
Day 2, Measurement methods (A. Boyer)
• Group 2: simulation of emission measurement
Sept 19
methods
• Group 2: lab – emission measurement
Measurement methods (A. Boyer)
Day 3, methods
Modelling EMC of ICs ( E. Sicard)
Sept 20 • Group 1: simulation of emission measurement
methods

• Group 1: lab – immunity measurement

Day 4,
EMC guidelines (E. Sicard) methods
Sept 21
• Group 2: simulation of immunity
• Group 2: lab – immunity measurement
EMC of 3D-Ics (E. Sicard)
Day 5, methods
Case study
Sept 22 • Group 1: simulation of immunity
Evaluation

3 December 19
Illustration with IC-EMC

IC-EMC - A TOOL FOR EMC PREDICTION AT IC LEVEL

Key tools
 A schematic editor
 An interface to WinSpice
 A post-processor to compare simulated with
measured spectrum
 An Electromagnetic solver for radiated field Spectrum Immunity Smith
 Freeware, online analysis simulation Chart
Near-field Impedance IBIS
 250 pp documentation, 15 case studies
simulation simulation interfac

4 December 19
References

Books Freeware Workshops

Nov. 2019
www.ic-emc.org www.emccompo.org

Standards www.iec.ch
• IEC 61967, 2001, Integrated Circuits Emissions
• IEC 62132, 2003, Integrated circuits Immunity
• IEC 62433, 2008, Integrated Circuit Model

5 December 19
1. EMC of ICs
An overview
Outlines

 Electronic Market Growth

 Electromagnetic interference
 What is EMC
 Technology scale down
 Going 3D
 Origin of parasitic emission
 Trends towards higher emission
 Origin on susceptibility
 Emission issues
 Susceptibility issues
 EMC issues
 Conclusion

7 December 19
Electronic Market Growth
Market Growth

30% Individuals

Companies HDTV 4G
PC at home MP3
3G IoT
Internet DVD Society
20% PC in companies
ADAS
GSM Flat screens Local Energy
Audio CD
Automotive Security 4%
Defense
10% Medical 2017

Recession Recession Bank 3%

-10% crash
2016
Telecom
crash

83 86 89 92 95 98 01 04 07 10 13 16 19
Adapted from Electronique International Mai 21, 2009 Year
Electronic Market Growth

 Vision 2020 Share of system sales

 Increasing 2020 vs 2015
disposable Smartphones
income,
 expanding
urban PC
population,
Tablets
 growing Internet of Things
internet
Game
penetration Medical
consoles
and
 availability of Servers
strong
distribution -10% 0 10% 20% Growth
network

9 December 19
Electromagnetic Interference
EMI ISSUES IN WIRELESS DEVICES

 Numerous interference cases reported over the ISM band 2400 – 2483.5 MHz.
 From Cisco, « 20 Myths of WiFi Interference », White Paper, 2008:
• “Interference contributes to 50 % of the problems on the customer’s Wi-Fi network. “
• “In a recent survey of 300 of their customers, a major Wi-Fi tools provider reported that
“troubleshooting interference won ‘top honors’ as the biggest challenge in managing a
Wi-Fi network.””
• “67 percent of all residential Wi-Fi problems are linked to interfering devices, such as
cordless phones, baby monitors, and microwave ovens.”
• “At 8m, a microwave oven degrades data throughput by 64%.”

10
Electromagnetic Interference
EMI ISSUES IN MEDICAL DEVICES Interference Technology –
June 2015

“Pacemakers can mistakenly detect

electromagnetic interference (EMI)
from smartphones as a cardiac signal,
causing them to briefly stop working.
This leads to a pause in the cardiac
rhythm of the pacing dependent patient
and may result in syncope.” Dr. Lennerz
“For implantable cardioverter
defibrillators (ICDs) the external signal
mimics a life threatening ventricular
tachyarrhythmia, leading the ICD to
deliver a painful shock” Dr. Lennerz

http://www.interferencetechnology.com
11 December 19
Electromagnetic Interference
EMI ISSUES IN MEDICAL DEVICES Interference Technology –
March 2014

 Electromagnetic radiation from portable

suction devices could interfere with some
defibrillators, rendering them inoperable in a
medical emergency.
 Philips HeartStart MRx defibrillators are
known to fail without warning during battery
power operation if subjected to high
electromagnetic interference (EMI).
 Laerdal LSU 4000 portable suction units
emitted EMI with field strengths up to 180
V/m, put the defibrillators at risk for
malfunction.
12
Electromagnetic Interference
EMI ISSUES IN AUTOMOTIVE

http://incompliancemag.com/2-12-million-vehicles-recalled-for-airbag-issues
In Compliance, 2015

13
Electromagnetic Interference
EMI ISSUES IN AUTOMOTIVE
 ADAS - Advanced Driver
Assistance Systems
 Autonomous driving in 2030
 Much more sensors, cameras,
embedded calculators & security
Electromagnetic Interference
EMI ISSUES IN AVIATION

Interference Technology –
January 2013

FAA said Wi-Fi systems may interfere

with the Honeywell phase 3 display
units aboard 157 Boeing airplanes in
use by various U.S. airlines. These
display units are critical for flight safety,
providing crewmembers with
information such as airspeed, altitude,
heading, and pitch and roll [..] the issue
was discovered two years ago during
testing to certify a Wi-Fi system for use
on Boeing 737 Next Generation.

15
What is EMC ?
DEFINITION

« The ability of a component, equipment or system to operate satisfyingly in a

given electromagnetic environment, without introducing any harmful
electromagnetic disturbances to all systems placed in this environment. »

 Essential constraint to ensure functional safety of electronic or electrical

applications
 Guarantee the simultaneous operation of every electrical or electronic
equipment in a given electromagnetic environment
 Reduce both the parasitic electromagnetic emission and the sensitivity or
susceptibility to electromagnetic interferences.

16
 What is EMC?
ZOOM AT DEVICES

10 mm
100 mm

17 December 19
Integrated
Circuits…

1mm 10µm

1V
100 µA

100 nm
1 µm 18 December 19
© Intel Xeon
What is EMC?

WHY EMC OF IC ?

• Until mid 90’s, IC designers had no

consideration about EMC problems in
their design..
• Starting 1996, automotive customers
started to select ICs on EMC criteria
• Starting 2005, mobile industry required
EMC in System in package
• Massive 3D integration will require
careful EMC design

19 December 19
 Technology scale down

Technology 130nm 90nm 45nm 28nm 14nm 5nm

Complexity
250M 500M 2G 7G 15G 150 G

Packaging

Mobile 4G+ 5G
3G 3G+ 4G
generation
2004 2007 2010 2013 2016 2020

Core DSPs Dual core Quad Core Octa Core ?

Embedded Dual DSP Quad DSP Multi DSP
10 Mb RF 3D Image Proc 3D 4K Image Proc
blocks Mem Graphic Process. Crypto processor Crypto, sensor,
100 Mb Mem Reconf FPGA, position processor
Sensors Multi RF Agregated RF
1 Gb Memories 2 Gb Memories
Multi-sensors
Technology scale down

TOWARDS 100 GIGA DEVICES

100,000,000,000

8-core µP = 2 GT

Dual core µP+ cache = 100MT

32 bit µP :1MT

16 bit µP = 100 KT

8bit µP : 10 KT

2020
 Technology scale down

 Drastic reduction of the silicon area

MOSFET FINFET MB
100 mm2 FET
50 mm2
19 mm2
Logic 10 mm2
IO Logic
IO Logic 5 mm2
3 mm21,2 mm2
I
O Logic I
O Logic I
Memory Memory Memory Memory Memory
O
Logic

Memory
I
O
Logic
Memor
y
I
O

45 nm 32 nm 20 nm 14 nm 10 nm 7 nm 5 nm

Adapted from Mistry, K. (2017). 10 nm technology leadership, Technology and

Manufacturing Day, Intel. 2017.
Technology scale down
INCREASED COMPLEXITY
Technology 1st year External Internal Max. Gate SRAM Gate Gate Typ gate
of Supply supply Current density area current capa delay (ps)
produc. (V) (V) (A) (K/mm2) (µm2) (mA) (fF)
0.8 µm 1990 5 5 <1 15 80.0 0.9 40 180
0.5 µm 1993 5 5 3 28 40.0 0.75 30 130
0.35 µm 1995 5 3.3 12 50 20.0 0.6 25 100
0.25 µm 1997 5 2.5 30 90 10.0 0.4 20 75
0.18 µm 1999 3.3 1.8 50 160 5.0 0.3 15 50
0.12 µm 2001 2.5 1.2 150 240 2.4 0.2 10 35
90 nm 2004 2.5 1.0 186 480 1.4 0.1 7 25
65 nm 2006 2.5 1.0 236 900 0.6 0.07 5 22
45 nm 2008 1.8 1.0 283 2 000 0.35 0.05 3 18
32 nm 2010 1.8 0.9 290 3 500 0.20 0.04 3 14
28 nm 2012 1.5 0.9 300 4 800 0.15 0.03 2 10
20 nm 2014 1.2 0.8 300 8 000 0.10 0.02 1.5 8
14 nm 2016 1.2 0.8 350 15 000 0.07 0.015 1.0 6
10 nm 2018 1.0 0.6 350 30 000 0.03 0.011 0.8 4
7 nm 2020 1.0 0.5 350 50 000 0.02 0.008 0.6 3

Adapted from M. Ramdani E. Sicard, “The Electromagnetic Compatibility of Integrated Circuits—

Past, Present, and Future”, IEEE Trans. EMC, VOL. 51, N. 1, Feb. 2009

23 December 19
 Technology scale down

Scale down benefits

65nm
 ..
 …
 …

28nm

14nm

-50% -80%

65nm 28nm 14nm

 Technology scale down FinFET for increasing
Multi-bridge
drive current and
FET
reducing leakage
MOS High K Metal Gate
to increase field
Current drive effect
(mA/µm)
Strain to increase
mobility
2.5
FINFET
2.0

1.5 MOSFET
Ioff:
1.0 100nA/µm
10nA
1 nA MBFET
0.5

0.0
130 90 65 45 32 20 14 10 7 5 3

Intrinsic perf. Gate material Strain Technology node (nm)

 Technology scale down
 14-nm Xeon by Intel ™
 IBM, GlobalFoundries,
Samsung, SUNY first 7-nm
testchip 2017

 Qualcom Snapdragon 635 in

10-nm Si lattice: ___ nm
 Technology scale down
 TECHNOLOGY INNOVATION & COST

Fab cost (Million $) Design cost (Million $)

7300 270
6700
6200

4850 190

4000
140

2500 100
2000
1450 60
15 24 34

• Strain, eSiGe,
• High-K, low-K dielectric, Airgap
• Metal gate
• FinFET/ Gate-All-Around FET
• Double, quad patterning
Technology scale down

IMPORTANCE OF MEMORY

50% 20%

35%
55%
Going 3D

Stacked process layers

 8, 16, 32 layers of active
devices
 1 tera-bit/cm2 achieved 5
years ahead from
roadmaps
Going 3D
Package-on-package (PoP)
Upper MEM MEM to SoC
(TMV)

PCB

PCB

SoC to PCB MEM to PCB

Bottom SoC
(TMV)

E. Sicard, EMC performance analysis of a Processor/Memory System using PCB and

Package-On-Package, EMC Compo 2015 Edinburgh
 Going 3D
I/O Technology
 Multi-Giga-Bit link between processors &
memories : video, object recogn., 3D
capture
 Generation 4x and 5 on the market
 Generation 6 under development DDR4x: 230 ps, 0.25 V
Data Rate swing
per pin
(Gb/s)
100 Gb/s
Graphics
trends

GDDR6
GDDR5
Low power
GDDR4 trends
10 Gb/s
GDDR3 LP5
LP4x
GDDR2 LP4
LP3
LP2 DDR5
DDR4x
DDR4 DDR trends
DDR2 DDR3

1 Gb/s

2010 2012 2014 2016 2018 2020

 Going 3D
Processor die
THERE IS PLENTY OF
SPACE ON THE TOP Through Silicon
Possible 3rd die Via (TSV)
 3D technology uses
stacked dies, Thinned Direct bond
through-silicon- memory die interconnect (DBI)
vias 10 µm Upper die

 Enables 10-20
Gb/s/pin at 1.0V
Multicore
 Samsung 3D 350 µm
(Galaxy 6) vs PoP thickness

(Galaxy 5) : Bottom die

 30% faster Package

 20% less power leadframe
(GND)
 Less heat

http://www.youtube.com/watch?v=Rw9fpsigCfk
EMC at IC Level

• SUSCEPTIBILITY
• EMISSION
Personal
Carbon airplane Equipment Devices

interferences

Boards

Radar

Hardware fault Safety

Components systems
Software failure
Function Loss
Origin of Parasitic Emission

BASIC MECHANISMS FOR CURRENT SWITCHING

VDD Switching current

IDD

Vin
Voltage Time
Output
capa

VSS ISS Time

CMOS inverter exemple Question: waveform, amplitude?

34 December 19
Origin of Parasitic Emission
CMOS INVERTER IN IC-EMC
Waveforms strongly depend on load

Switching current

Voltage Time

Time

Basic > interconnects > GateSwitching.sch

35 December 19
Origin of Parasitic Emission

STRONGER SWITCHING CURRENT:

i(t)

i(t)
Vdd

i(t)

Time
50ps
Vss Internal
Switching gates switching current Very large
Simultaneous
 Main transient current sources: Switching Current
 Clock-driven blocks, synchronized logic
Time
 Memory read/write/refresh
 I/O switching

36 December 19
 Origin of Parasitic Emission

EXAMPLE: EVALUATION OF SWITCHING CURRENT

• ____ VDD, ___ technology

• ____ mA / gate in ____ ps
•____ % is gate
• ____ gates in ____ Bit Micro => ____ A
• ____ % switching activity => ____ A
• ____ % current peak spread (non synchronous switching)
•____ in ____ ps
Current (A) Current (A)
Vdd

Current / gate
i(t) ____
Vss
Current / Ic
____
time time
____ ns ____ ns

37 December 19
Origin of Parasitic Emission

Wires act as antennas

V(t)

Vdd

Vss

Time

L  _ nH / mm V  _
38 December 19
Origin of Parasitic Emission
WIRES+CURRENT = NOISE
 DSPIC33F noise measurement with active probe on X10
 Activation of the core by a 40 MHz internal PLL
 Synchronous ADDR0..15 bus switching 0x0000, 0xFFFF

DSPIC_VDD_VofT.tran

39 December 19
Origin of Parasitic Emission

WIRES RADIATE

40 December 19
 Emission Issues

WHY TECHNOLOGY SCALE DOWN MAKES THINGS WORSE ?

Volt • Current level keeps

Old process almost constant but:
New process • Faster current
switching
Time

Current
Stronger di/dt
di/dt
Old process
New process
Time
Increase parasitic noise

41 December 19
Susceptibility Issues

DECREASED NOISE MARGIN IN ICS

3.3 V ____
inside, 5V noise
Supply (V) outside margin

5.0
1V ____
inside, noise
3.3 I/O supply 1.2V margin
outside

2.5 Core supply

1.8
1.2
1.0

0.35µ 0.18µ 130n 90n 65n 45n 32n 20n 14n 10n 7n
Technology
42 December 19
 Susceptibility Issues

UNINTENTIONAL ELECTROMAGNETIC SOURCES

Power HF VHF UHF SHF xHF THF

1GW Weather Radar

Radars • Fields
1MW radiated
Thunderstorm impact by
TV UHF

1KW
electronic
TV VHF devices
2-4G BS
1W 4G 2G 3G
• Continuou
s waves &
1mW Frequency
pulsed
waves
3 MHz 30 MHz 300 MHz 3 GHz 30 GHz 300 GHz
25m 2.5m 0.25m 25mm 2.5mm 0.25mm /4 (ideal antenna)
Susceptibility Issues

SYSTEM-ON-CHIP, 3D STACKING: DANGER

EMC Level
(dB)
Susceptibility
50 level
40 High risk of
30 interference
20 Safe
Unsafe margin
10
interference
margin
0
-10
-20
Sum of
-30
perturbations
-40
1 10 100 1000
Frequency (MHz)
44 December 19
 EMC Issues
 TOWARDS HIGHER FREQUENCIES

2,3,4,5G mobile frequencies

4G 2-3G 2-4G 3G 4G
Today
800 900 1800 1900 2600

5G 1 GHz 2 GHz 3 GHz

700

Tomorrow 5G 5G 5G 5G
3300 4400 26 250 42 500

10 GHz 20 GHz 30 GHz 40 GHz

 EMC Issues

 EMC at IC level usually characterized up to

5 GHz
 Requests at 6 GHz for communicating cars
 5G will start at 26-28 GHz
 Automatic drive : up to 80 GHz

Parasitic Emission
(dB) Customer 10
100 Concerns in 5 years
years
80
Customer pressure

60

40 IC Parasitic Emission

20
IC technology scale down
0
10 MHz 100 MHz 1 GHz 10 GHz 100 GHz
Technology
 Nano-CMOS
operates below 1V,
noise margin
around 50 mV
 Close to medium
voltage (12, 24, 48
V) and high voltage
(98, 240, 300, 400,
850 V) functions
 ADC with 16-24 bit
resolution work at
10-100 µV resolution
Conclusion

 EMI reported in all kinds of devices

 IC involved in many EMI problems
 IC technology evolution towards
higher complexity
 On-chip switching currents in the
10-100 A range
 ICs are good antennas in the GHz
range
 Increased switching noise
 Increased emission issues
 Reduced noise margins
 System-on-chips, systems-in-
package rise new EMC issues

48 December 19